1 //===- SelectionDAGDumper.cpp - Implement SelectionDAG::dump() ------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This implements the SelectionDAG::dump method and friends. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #include "SDNodeDbgValue.h" 14 #include "llvm/ADT/APFloat.h" 15 #include "llvm/ADT/APInt.h" 16 #include "llvm/ADT/SmallPtrSet.h" 17 #include "llvm/ADT/StringExtras.h" 18 #include "llvm/CodeGen/ISDOpcodes.h" 19 #include "llvm/CodeGen/MachineBasicBlock.h" 20 #include "llvm/CodeGen/MachineConstantPool.h" 21 #include "llvm/CodeGen/MachineMemOperand.h" 22 #include "llvm/CodeGen/SelectionDAG.h" 23 #include "llvm/CodeGen/SelectionDAGNodes.h" 24 #include "llvm/CodeGen/TargetInstrInfo.h" 25 #include "llvm/CodeGen/TargetLowering.h" 26 #include "llvm/CodeGen/TargetRegisterInfo.h" 27 #include "llvm/CodeGen/TargetSubtargetInfo.h" 28 #include "llvm/CodeGen/ValueTypes.h" 29 #include "llvm/Config/llvm-config.h" 30 #include "llvm/IR/BasicBlock.h" 31 #include "llvm/IR/Constants.h" 32 #include "llvm/IR/DebugInfoMetadata.h" 33 #include "llvm/IR/DebugLoc.h" 34 #include "llvm/IR/Function.h" 35 #include "llvm/IR/Intrinsics.h" 36 #include "llvm/IR/ModuleSlotTracker.h" 37 #include "llvm/IR/Value.h" 38 #include "llvm/Support/Casting.h" 39 #include "llvm/Support/CommandLine.h" 40 #include "llvm/Support/Compiler.h" 41 #include "llvm/Support/Debug.h" 42 #include "llvm/Support/ErrorHandling.h" 43 #include "llvm/Support/MachineValueType.h" 44 #include "llvm/Support/Printable.h" 45 #include "llvm/Support/raw_ostream.h" 46 #include "llvm/Target/TargetIntrinsicInfo.h" 47 #include "llvm/Target/TargetMachine.h" 48 #include <cstdint> 49 #include <iterator> 50 51 using namespace llvm; 52 53 static cl::opt<bool> 54 VerboseDAGDumping("dag-dump-verbose", cl::Hidden, 55 cl::desc("Display more information when dumping selection " 56 "DAG nodes.")); 57 58 std::string SDNode::getOperationName(const SelectionDAG *G) const { 59 switch (getOpcode()) { 60 default: 61 if (getOpcode() < ISD::BUILTIN_OP_END) 62 return "<<Unknown DAG Node>>"; 63 if (isMachineOpcode()) { 64 if (G) 65 if (const TargetInstrInfo *TII = G->getSubtarget().getInstrInfo()) 66 if (getMachineOpcode() < TII->getNumOpcodes()) 67 return std::string(TII->getName(getMachineOpcode())); 68 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>"; 69 } 70 if (G) { 71 const TargetLowering &TLI = G->getTargetLoweringInfo(); 72 const char *Name = TLI.getTargetNodeName(getOpcode()); 73 if (Name) return Name; 74 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>"; 75 } 76 return "<<Unknown Node #" + utostr(getOpcode()) + ">>"; 77 78 #ifndef NDEBUG 79 case ISD::DELETED_NODE: return "<<Deleted Node!>>"; 80 #endif 81 case ISD::PREFETCH: return "Prefetch"; 82 case ISD::ATOMIC_FENCE: return "AtomicFence"; 83 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 84 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS: return "AtomicCmpSwapWithSuccess"; 85 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 86 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 87 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 88 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 89 case ISD::ATOMIC_LOAD_CLR: return "AtomicLoadClr"; 90 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 91 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 92 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 93 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 94 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 95 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 96 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 97 case ISD::ATOMIC_LOAD_FADD: return "AtomicLoadFAdd"; 98 case ISD::ATOMIC_LOAD: return "AtomicLoad"; 99 case ISD::ATOMIC_STORE: return "AtomicStore"; 100 case ISD::PCMARKER: return "PCMarker"; 101 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 102 case ISD::SRCVALUE: return "SrcValue"; 103 case ISD::MDNODE_SDNODE: return "MDNode"; 104 case ISD::EntryToken: return "EntryToken"; 105 case ISD::TokenFactor: return "TokenFactor"; 106 case ISD::AssertSext: return "AssertSext"; 107 case ISD::AssertZext: return "AssertZext"; 108 case ISD::AssertAlign: return "AssertAlign"; 109 110 case ISD::BasicBlock: return "BasicBlock"; 111 case ISD::VALUETYPE: return "ValueType"; 112 case ISD::Register: return "Register"; 113 case ISD::RegisterMask: return "RegisterMask"; 114 case ISD::Constant: 115 if (cast<ConstantSDNode>(this)->isOpaque()) 116 return "OpaqueConstant"; 117 return "Constant"; 118 case ISD::ConstantFP: return "ConstantFP"; 119 case ISD::GlobalAddress: return "GlobalAddress"; 120 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 121 case ISD::FrameIndex: return "FrameIndex"; 122 case ISD::JumpTable: return "JumpTable"; 123 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 124 case ISD::RETURNADDR: return "RETURNADDR"; 125 case ISD::ADDROFRETURNADDR: return "ADDROFRETURNADDR"; 126 case ISD::FRAMEADDR: return "FRAMEADDR"; 127 case ISD::SPONENTRY: return "SPONENTRY"; 128 case ISD::LOCAL_RECOVER: return "LOCAL_RECOVER"; 129 case ISD::READ_REGISTER: return "READ_REGISTER"; 130 case ISD::WRITE_REGISTER: return "WRITE_REGISTER"; 131 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 132 case ISD::EH_DWARF_CFA: return "EH_DWARF_CFA"; 133 case ISD::EH_RETURN: return "EH_RETURN"; 134 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP"; 135 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP"; 136 case ISD::EH_SJLJ_SETUP_DISPATCH: return "EH_SJLJ_SETUP_DISPATCH"; 137 case ISD::ConstantPool: return "ConstantPool"; 138 case ISD::TargetIndex: return "TargetIndex"; 139 case ISD::ExternalSymbol: return "ExternalSymbol"; 140 case ISD::BlockAddress: return "BlockAddress"; 141 case ISD::INTRINSIC_WO_CHAIN: 142 case ISD::INTRINSIC_VOID: 143 case ISD::INTRINSIC_W_CHAIN: { 144 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1; 145 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue(); 146 if (IID < Intrinsic::num_intrinsics) 147 return Intrinsic::getBaseName((Intrinsic::ID)IID).str(); 148 if (!G) 149 return "Unknown intrinsic"; 150 if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo()) 151 return TII->getName(IID); 152 llvm_unreachable("Invalid intrinsic ID"); 153 } 154 155 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 156 case ISD::TargetConstant: 157 if (cast<ConstantSDNode>(this)->isOpaque()) 158 return "OpaqueTargetConstant"; 159 return "TargetConstant"; 160 case ISD::TargetConstantFP: return "TargetConstantFP"; 161 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 162 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 163 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 164 case ISD::TargetJumpTable: return "TargetJumpTable"; 165 case ISD::TargetConstantPool: return "TargetConstantPool"; 166 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 167 case ISD::MCSymbol: return "MCSymbol"; 168 case ISD::TargetBlockAddress: return "TargetBlockAddress"; 169 170 case ISD::CopyToReg: return "CopyToReg"; 171 case ISD::CopyFromReg: return "CopyFromReg"; 172 case ISD::UNDEF: return "undef"; 173 case ISD::VSCALE: return "vscale"; 174 case ISD::MERGE_VALUES: return "merge_values"; 175 case ISD::INLINEASM: return "inlineasm"; 176 case ISD::INLINEASM_BR: return "inlineasm_br"; 177 case ISD::EH_LABEL: return "eh_label"; 178 case ISD::ANNOTATION_LABEL: return "annotation_label"; 179 case ISD::HANDLENODE: return "handlenode"; 180 181 // Unary operators 182 case ISD::FABS: return "fabs"; 183 case ISD::FMINNUM: return "fminnum"; 184 case ISD::STRICT_FMINNUM: return "strict_fminnum"; 185 case ISD::FMAXNUM: return "fmaxnum"; 186 case ISD::STRICT_FMAXNUM: return "strict_fmaxnum"; 187 case ISD::FMINNUM_IEEE: return "fminnum_ieee"; 188 case ISD::FMAXNUM_IEEE: return "fmaxnum_ieee"; 189 case ISD::FMINIMUM: return "fminimum"; 190 case ISD::STRICT_FMINIMUM: return "strict_fminimum"; 191 case ISD::FMAXIMUM: return "fmaximum"; 192 case ISD::STRICT_FMAXIMUM: return "strict_fmaximum"; 193 case ISD::FNEG: return "fneg"; 194 case ISD::FSQRT: return "fsqrt"; 195 case ISD::STRICT_FSQRT: return "strict_fsqrt"; 196 case ISD::FCBRT: return "fcbrt"; 197 case ISD::FSIN: return "fsin"; 198 case ISD::STRICT_FSIN: return "strict_fsin"; 199 case ISD::FCOS: return "fcos"; 200 case ISD::STRICT_FCOS: return "strict_fcos"; 201 case ISD::FSINCOS: return "fsincos"; 202 case ISD::FTRUNC: return "ftrunc"; 203 case ISD::STRICT_FTRUNC: return "strict_ftrunc"; 204 case ISD::FFLOOR: return "ffloor"; 205 case ISD::STRICT_FFLOOR: return "strict_ffloor"; 206 case ISD::FCEIL: return "fceil"; 207 case ISD::STRICT_FCEIL: return "strict_fceil"; 208 case ISD::FRINT: return "frint"; 209 case ISD::STRICT_FRINT: return "strict_frint"; 210 case ISD::FNEARBYINT: return "fnearbyint"; 211 case ISD::STRICT_FNEARBYINT: return "strict_fnearbyint"; 212 case ISD::FROUND: return "fround"; 213 case ISD::STRICT_FROUND: return "strict_fround"; 214 case ISD::FROUNDEVEN: return "froundeven"; 215 case ISD::STRICT_FROUNDEVEN: return "strict_froundeven"; 216 case ISD::FEXP: return "fexp"; 217 case ISD::STRICT_FEXP: return "strict_fexp"; 218 case ISD::FEXP2: return "fexp2"; 219 case ISD::STRICT_FEXP2: return "strict_fexp2"; 220 case ISD::FLOG: return "flog"; 221 case ISD::STRICT_FLOG: return "strict_flog"; 222 case ISD::FLOG2: return "flog2"; 223 case ISD::STRICT_FLOG2: return "strict_flog2"; 224 case ISD::FLOG10: return "flog10"; 225 case ISD::STRICT_FLOG10: return "strict_flog10"; 226 227 // Binary operators 228 case ISD::ADD: return "add"; 229 case ISD::SUB: return "sub"; 230 case ISD::MUL: return "mul"; 231 case ISD::MULHU: return "mulhu"; 232 case ISD::MULHS: return "mulhs"; 233 case ISD::AVGFLOORU: return "avgflooru"; 234 case ISD::AVGFLOORS: return "avgfloors"; 235 case ISD::AVGCEILU: return "avgceilu"; 236 case ISD::AVGCEILS: return "avgceils"; 237 case ISD::ABDS: return "abds"; 238 case ISD::ABDU: return "abdu"; 239 case ISD::SDIV: return "sdiv"; 240 case ISD::UDIV: return "udiv"; 241 case ISD::SREM: return "srem"; 242 case ISD::UREM: return "urem"; 243 case ISD::SMUL_LOHI: return "smul_lohi"; 244 case ISD::UMUL_LOHI: return "umul_lohi"; 245 case ISD::SDIVREM: return "sdivrem"; 246 case ISD::UDIVREM: return "udivrem"; 247 case ISD::AND: return "and"; 248 case ISD::OR: return "or"; 249 case ISD::XOR: return "xor"; 250 case ISD::SHL: return "shl"; 251 case ISD::SRA: return "sra"; 252 case ISD::SRL: return "srl"; 253 case ISD::ROTL: return "rotl"; 254 case ISD::ROTR: return "rotr"; 255 case ISD::FSHL: return "fshl"; 256 case ISD::FSHR: return "fshr"; 257 case ISD::FADD: return "fadd"; 258 case ISD::STRICT_FADD: return "strict_fadd"; 259 case ISD::FSUB: return "fsub"; 260 case ISD::STRICT_FSUB: return "strict_fsub"; 261 case ISD::FMUL: return "fmul"; 262 case ISD::STRICT_FMUL: return "strict_fmul"; 263 case ISD::FDIV: return "fdiv"; 264 case ISD::STRICT_FDIV: return "strict_fdiv"; 265 case ISD::FMA: return "fma"; 266 case ISD::STRICT_FMA: return "strict_fma"; 267 case ISD::FMAD: return "fmad"; 268 case ISD::FREM: return "frem"; 269 case ISD::STRICT_FREM: return "strict_frem"; 270 case ISD::FCOPYSIGN: return "fcopysign"; 271 case ISD::FGETSIGN: return "fgetsign"; 272 case ISD::FCANONICALIZE: return "fcanonicalize"; 273 case ISD::FPOW: return "fpow"; 274 case ISD::STRICT_FPOW: return "strict_fpow"; 275 case ISD::SMIN: return "smin"; 276 case ISD::SMAX: return "smax"; 277 case ISD::UMIN: return "umin"; 278 case ISD::UMAX: return "umax"; 279 280 case ISD::FPOWI: return "fpowi"; 281 case ISD::STRICT_FPOWI: return "strict_fpowi"; 282 case ISD::SETCC: return "setcc"; 283 case ISD::SETCCCARRY: return "setcccarry"; 284 case ISD::STRICT_FSETCC: return "strict_fsetcc"; 285 case ISD::STRICT_FSETCCS: return "strict_fsetccs"; 286 case ISD::SELECT: return "select"; 287 case ISD::VSELECT: return "vselect"; 288 case ISD::SELECT_CC: return "select_cc"; 289 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 290 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 291 case ISD::CONCAT_VECTORS: return "concat_vectors"; 292 case ISD::INSERT_SUBVECTOR: return "insert_subvector"; 293 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 294 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 295 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 296 case ISD::VECTOR_SPLICE: return "vector_splice"; 297 case ISD::SPLAT_VECTOR: return "splat_vector"; 298 case ISD::SPLAT_VECTOR_PARTS: return "splat_vector_parts"; 299 case ISD::VECTOR_REVERSE: return "vector_reverse"; 300 case ISD::STEP_VECTOR: return "step_vector"; 301 case ISD::CARRY_FALSE: return "carry_false"; 302 case ISD::ADDC: return "addc"; 303 case ISD::ADDE: return "adde"; 304 case ISD::ADDCARRY: return "addcarry"; 305 case ISD::SADDO_CARRY: return "saddo_carry"; 306 case ISD::SADDO: return "saddo"; 307 case ISD::UADDO: return "uaddo"; 308 case ISD::SSUBO: return "ssubo"; 309 case ISD::USUBO: return "usubo"; 310 case ISD::SMULO: return "smulo"; 311 case ISD::UMULO: return "umulo"; 312 case ISD::SUBC: return "subc"; 313 case ISD::SUBE: return "sube"; 314 case ISD::SUBCARRY: return "subcarry"; 315 case ISD::SSUBO_CARRY: return "ssubo_carry"; 316 case ISD::SHL_PARTS: return "shl_parts"; 317 case ISD::SRA_PARTS: return "sra_parts"; 318 case ISD::SRL_PARTS: return "srl_parts"; 319 320 case ISD::SADDSAT: return "saddsat"; 321 case ISD::UADDSAT: return "uaddsat"; 322 case ISD::SSUBSAT: return "ssubsat"; 323 case ISD::USUBSAT: return "usubsat"; 324 case ISD::SSHLSAT: return "sshlsat"; 325 case ISD::USHLSAT: return "ushlsat"; 326 327 case ISD::SMULFIX: return "smulfix"; 328 case ISD::SMULFIXSAT: return "smulfixsat"; 329 case ISD::UMULFIX: return "umulfix"; 330 case ISD::UMULFIXSAT: return "umulfixsat"; 331 332 case ISD::SDIVFIX: return "sdivfix"; 333 case ISD::SDIVFIXSAT: return "sdivfixsat"; 334 case ISD::UDIVFIX: return "udivfix"; 335 case ISD::UDIVFIXSAT: return "udivfixsat"; 336 337 // Conversion operators. 338 case ISD::SIGN_EXTEND: return "sign_extend"; 339 case ISD::ZERO_EXTEND: return "zero_extend"; 340 case ISD::ANY_EXTEND: return "any_extend"; 341 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 342 case ISD::ANY_EXTEND_VECTOR_INREG: return "any_extend_vector_inreg"; 343 case ISD::SIGN_EXTEND_VECTOR_INREG: return "sign_extend_vector_inreg"; 344 case ISD::ZERO_EXTEND_VECTOR_INREG: return "zero_extend_vector_inreg"; 345 case ISD::TRUNCATE: return "truncate"; 346 case ISD::FP_ROUND: return "fp_round"; 347 case ISD::STRICT_FP_ROUND: return "strict_fp_round"; 348 case ISD::FP_EXTEND: return "fp_extend"; 349 case ISD::STRICT_FP_EXTEND: return "strict_fp_extend"; 350 351 case ISD::SINT_TO_FP: return "sint_to_fp"; 352 case ISD::STRICT_SINT_TO_FP: return "strict_sint_to_fp"; 353 case ISD::UINT_TO_FP: return "uint_to_fp"; 354 case ISD::STRICT_UINT_TO_FP: return "strict_uint_to_fp"; 355 case ISD::FP_TO_SINT: return "fp_to_sint"; 356 case ISD::STRICT_FP_TO_SINT: return "strict_fp_to_sint"; 357 case ISD::FP_TO_UINT: return "fp_to_uint"; 358 case ISD::STRICT_FP_TO_UINT: return "strict_fp_to_uint"; 359 case ISD::FP_TO_SINT_SAT: return "fp_to_sint_sat"; 360 case ISD::FP_TO_UINT_SAT: return "fp_to_uint_sat"; 361 case ISD::BITCAST: return "bitcast"; 362 case ISD::ADDRSPACECAST: return "addrspacecast"; 363 case ISD::FP16_TO_FP: return "fp16_to_fp"; 364 case ISD::STRICT_FP16_TO_FP: return "strict_fp16_to_fp"; 365 case ISD::FP_TO_FP16: return "fp_to_fp16"; 366 case ISD::STRICT_FP_TO_FP16: return "strict_fp_to_fp16"; 367 case ISD::LROUND: return "lround"; 368 case ISD::STRICT_LROUND: return "strict_lround"; 369 case ISD::LLROUND: return "llround"; 370 case ISD::STRICT_LLROUND: return "strict_llround"; 371 case ISD::LRINT: return "lrint"; 372 case ISD::STRICT_LRINT: return "strict_lrint"; 373 case ISD::LLRINT: return "llrint"; 374 case ISD::STRICT_LLRINT: return "strict_llrint"; 375 376 // Control flow instructions 377 case ISD::BR: return "br"; 378 case ISD::BRIND: return "brind"; 379 case ISD::BR_JT: return "br_jt"; 380 case ISD::BRCOND: return "brcond"; 381 case ISD::BR_CC: return "br_cc"; 382 case ISD::CALLSEQ_START: return "callseq_start"; 383 case ISD::CALLSEQ_END: return "callseq_end"; 384 385 // EH instructions 386 case ISD::CATCHRET: return "catchret"; 387 case ISD::CLEANUPRET: return "cleanupret"; 388 389 // Other operators 390 case ISD::LOAD: return "load"; 391 case ISD::STORE: return "store"; 392 case ISD::MLOAD: return "masked_load"; 393 case ISD::MSTORE: return "masked_store"; 394 case ISD::MGATHER: return "masked_gather"; 395 case ISD::MSCATTER: return "masked_scatter"; 396 case ISD::VAARG: return "vaarg"; 397 case ISD::VACOPY: return "vacopy"; 398 case ISD::VAEND: return "vaend"; 399 case ISD::VASTART: return "vastart"; 400 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 401 case ISD::EXTRACT_ELEMENT: return "extract_element"; 402 case ISD::BUILD_PAIR: return "build_pair"; 403 case ISD::STACKSAVE: return "stacksave"; 404 case ISD::STACKRESTORE: return "stackrestore"; 405 case ISD::TRAP: return "trap"; 406 case ISD::DEBUGTRAP: return "debugtrap"; 407 case ISD::UBSANTRAP: return "ubsantrap"; 408 case ISD::LIFETIME_START: return "lifetime.start"; 409 case ISD::LIFETIME_END: return "lifetime.end"; 410 case ISD::PSEUDO_PROBE: 411 return "pseudoprobe"; 412 case ISD::GC_TRANSITION_START: return "gc_transition.start"; 413 case ISD::GC_TRANSITION_END: return "gc_transition.end"; 414 case ISD::GET_DYNAMIC_AREA_OFFSET: return "get.dynamic.area.offset"; 415 case ISD::FREEZE: return "freeze"; 416 case ISD::PREALLOCATED_SETUP: 417 return "call_setup"; 418 case ISD::PREALLOCATED_ARG: 419 return "call_alloc"; 420 421 // Floating point environment manipulation 422 case ISD::FLT_ROUNDS_: return "flt_rounds"; 423 case ISD::SET_ROUNDING: return "set_rounding"; 424 425 // Bit manipulation 426 case ISD::ABS: return "abs"; 427 case ISD::BITREVERSE: return "bitreverse"; 428 case ISD::BSWAP: return "bswap"; 429 case ISD::CTPOP: return "ctpop"; 430 case ISD::CTTZ: return "cttz"; 431 case ISD::CTTZ_ZERO_UNDEF: return "cttz_zero_undef"; 432 case ISD::CTLZ: return "ctlz"; 433 case ISD::CTLZ_ZERO_UNDEF: return "ctlz_zero_undef"; 434 case ISD::PARITY: return "parity"; 435 436 // Trampolines 437 case ISD::INIT_TRAMPOLINE: return "init_trampoline"; 438 case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline"; 439 440 case ISD::CONDCODE: 441 switch (cast<CondCodeSDNode>(this)->get()) { 442 default: llvm_unreachable("Unknown setcc condition!"); 443 case ISD::SETOEQ: return "setoeq"; 444 case ISD::SETOGT: return "setogt"; 445 case ISD::SETOGE: return "setoge"; 446 case ISD::SETOLT: return "setolt"; 447 case ISD::SETOLE: return "setole"; 448 case ISD::SETONE: return "setone"; 449 450 case ISD::SETO: return "seto"; 451 case ISD::SETUO: return "setuo"; 452 case ISD::SETUEQ: return "setueq"; 453 case ISD::SETUGT: return "setugt"; 454 case ISD::SETUGE: return "setuge"; 455 case ISD::SETULT: return "setult"; 456 case ISD::SETULE: return "setule"; 457 case ISD::SETUNE: return "setune"; 458 459 case ISD::SETEQ: return "seteq"; 460 case ISD::SETGT: return "setgt"; 461 case ISD::SETGE: return "setge"; 462 case ISD::SETLT: return "setlt"; 463 case ISD::SETLE: return "setle"; 464 case ISD::SETNE: return "setne"; 465 466 case ISD::SETTRUE: return "settrue"; 467 case ISD::SETTRUE2: return "settrue2"; 468 case ISD::SETFALSE: return "setfalse"; 469 case ISD::SETFALSE2: return "setfalse2"; 470 } 471 case ISD::VECREDUCE_FADD: return "vecreduce_fadd"; 472 case ISD::VECREDUCE_SEQ_FADD: return "vecreduce_seq_fadd"; 473 case ISD::VECREDUCE_FMUL: return "vecreduce_fmul"; 474 case ISD::VECREDUCE_SEQ_FMUL: return "vecreduce_seq_fmul"; 475 case ISD::VECREDUCE_ADD: return "vecreduce_add"; 476 case ISD::VECREDUCE_MUL: return "vecreduce_mul"; 477 case ISD::VECREDUCE_AND: return "vecreduce_and"; 478 case ISD::VECREDUCE_OR: return "vecreduce_or"; 479 case ISD::VECREDUCE_XOR: return "vecreduce_xor"; 480 case ISD::VECREDUCE_SMAX: return "vecreduce_smax"; 481 case ISD::VECREDUCE_SMIN: return "vecreduce_smin"; 482 case ISD::VECREDUCE_UMAX: return "vecreduce_umax"; 483 case ISD::VECREDUCE_UMIN: return "vecreduce_umin"; 484 case ISD::VECREDUCE_FMAX: return "vecreduce_fmax"; 485 case ISD::VECREDUCE_FMIN: return "vecreduce_fmin"; 486 487 // Vector Predication 488 #define BEGIN_REGISTER_VP_SDNODE(SDID, LEGALARG, NAME, ...) \ 489 case ISD::SDID: \ 490 return #NAME; 491 #include "llvm/IR/VPIntrinsics.def" 492 } 493 } 494 495 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 496 switch (AM) { 497 default: return ""; 498 case ISD::PRE_INC: return "<pre-inc>"; 499 case ISD::PRE_DEC: return "<pre-dec>"; 500 case ISD::POST_INC: return "<post-inc>"; 501 case ISD::POST_DEC: return "<post-dec>"; 502 } 503 } 504 505 static Printable PrintNodeId(const SDNode &Node) { 506 return Printable([&Node](raw_ostream &OS) { 507 #ifndef NDEBUG 508 OS << 't' << Node.PersistentId; 509 #else 510 OS << (const void*)&Node; 511 #endif 512 }); 513 } 514 515 // Print the MMO with more information from the SelectionDAG. 516 static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO, 517 const MachineFunction *MF, const Module *M, 518 const MachineFrameInfo *MFI, 519 const TargetInstrInfo *TII, LLVMContext &Ctx) { 520 ModuleSlotTracker MST(M); 521 if (MF) 522 MST.incorporateFunction(MF->getFunction()); 523 SmallVector<StringRef, 0> SSNs; 524 MMO.print(OS, MST, SSNs, Ctx, MFI, TII); 525 } 526 527 static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO, 528 const SelectionDAG *G) { 529 if (G) { 530 const MachineFunction *MF = &G->getMachineFunction(); 531 return printMemOperand(OS, MMO, MF, MF->getFunction().getParent(), 532 &MF->getFrameInfo(), 533 G->getSubtarget().getInstrInfo(), *G->getContext()); 534 } 535 536 LLVMContext Ctx; 537 return printMemOperand(OS, MMO, /*MF=*/nullptr, /*M=*/nullptr, 538 /*MFI=*/nullptr, /*TII=*/nullptr, Ctx); 539 } 540 541 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 542 LLVM_DUMP_METHOD void SDNode::dump() const { dump(nullptr); } 543 544 LLVM_DUMP_METHOD void SDNode::dump(const SelectionDAG *G) const { 545 print(dbgs(), G); 546 dbgs() << '\n'; 547 } 548 #endif 549 550 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 551 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 552 if (i) OS << ","; 553 if (getValueType(i) == MVT::Other) 554 OS << "ch"; 555 else 556 OS << getValueType(i).getEVTString(); 557 } 558 } 559 560 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 561 if (getFlags().hasNoUnsignedWrap()) 562 OS << " nuw"; 563 564 if (getFlags().hasNoSignedWrap()) 565 OS << " nsw"; 566 567 if (getFlags().hasExact()) 568 OS << " exact"; 569 570 if (getFlags().hasNoNaNs()) 571 OS << " nnan"; 572 573 if (getFlags().hasNoInfs()) 574 OS << " ninf"; 575 576 if (getFlags().hasNoSignedZeros()) 577 OS << " nsz"; 578 579 if (getFlags().hasAllowReciprocal()) 580 OS << " arcp"; 581 582 if (getFlags().hasAllowContract()) 583 OS << " contract"; 584 585 if (getFlags().hasApproximateFuncs()) 586 OS << " afn"; 587 588 if (getFlags().hasAllowReassociation()) 589 OS << " reassoc"; 590 591 if (getFlags().hasNoFPExcept()) 592 OS << " nofpexcept"; 593 594 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) { 595 if (!MN->memoperands_empty()) { 596 OS << "<"; 597 OS << "Mem:"; 598 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(), 599 e = MN->memoperands_end(); i != e; ++i) { 600 printMemOperand(OS, **i, G); 601 if (std::next(i) != e) 602 OS << " "; 603 } 604 OS << ">"; 605 } 606 } else if (const ShuffleVectorSDNode *SVN = 607 dyn_cast<ShuffleVectorSDNode>(this)) { 608 OS << "<"; 609 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) { 610 int Idx = SVN->getMaskElt(i); 611 if (i) OS << ","; 612 if (Idx < 0) 613 OS << "u"; 614 else 615 OS << Idx; 616 } 617 OS << ">"; 618 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 619 OS << '<' << CSDN->getAPIntValue() << '>'; 620 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 621 if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEsingle()) 622 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 623 else if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEdouble()) 624 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 625 else { 626 OS << "<APFloat("; 627 CSDN->getValueAPF().bitcastToAPInt().print(OS, false); 628 OS << ")>"; 629 } 630 } else if (const GlobalAddressSDNode *GADN = 631 dyn_cast<GlobalAddressSDNode>(this)) { 632 int64_t offset = GADN->getOffset(); 633 OS << '<'; 634 GADN->getGlobal()->printAsOperand(OS); 635 OS << '>'; 636 if (offset > 0) 637 OS << " + " << offset; 638 else 639 OS << " " << offset; 640 if (unsigned int TF = GADN->getTargetFlags()) 641 OS << " [TF=" << TF << ']'; 642 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 643 OS << "<" << FIDN->getIndex() << ">"; 644 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 645 OS << "<" << JTDN->getIndex() << ">"; 646 if (unsigned int TF = JTDN->getTargetFlags()) 647 OS << " [TF=" << TF << ']'; 648 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 649 int offset = CP->getOffset(); 650 if (CP->isMachineConstantPoolEntry()) 651 OS << "<" << *CP->getMachineCPVal() << ">"; 652 else 653 OS << "<" << *CP->getConstVal() << ">"; 654 if (offset > 0) 655 OS << " + " << offset; 656 else 657 OS << " " << offset; 658 if (unsigned int TF = CP->getTargetFlags()) 659 OS << " [TF=" << TF << ']'; 660 } else if (const TargetIndexSDNode *TI = dyn_cast<TargetIndexSDNode>(this)) { 661 OS << "<" << TI->getIndex() << '+' << TI->getOffset() << ">"; 662 if (unsigned TF = TI->getTargetFlags()) 663 OS << " [TF=" << TF << ']'; 664 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 665 OS << "<"; 666 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 667 if (LBB) 668 OS << LBB->getName() << " "; 669 OS << (const void*)BBDN->getBasicBlock() << ">"; 670 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 671 OS << ' ' << printReg(R->getReg(), 672 G ? G->getSubtarget().getRegisterInfo() : nullptr); 673 } else if (const ExternalSymbolSDNode *ES = 674 dyn_cast<ExternalSymbolSDNode>(this)) { 675 OS << "'" << ES->getSymbol() << "'"; 676 if (unsigned int TF = ES->getTargetFlags()) 677 OS << " [TF=" << TF << ']'; 678 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 679 if (M->getValue()) 680 OS << "<" << M->getValue() << ">"; 681 else 682 OS << "<null>"; 683 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) { 684 if (MD->getMD()) 685 OS << "<" << MD->getMD() << ">"; 686 else 687 OS << "<null>"; 688 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 689 OS << ":" << N->getVT().getEVTString(); 690 } 691 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 692 OS << "<"; 693 694 printMemOperand(OS, *LD->getMemOperand(), G); 695 696 bool doExt = true; 697 switch (LD->getExtensionType()) { 698 default: doExt = false; break; 699 case ISD::EXTLOAD: OS << ", anyext"; break; 700 case ISD::SEXTLOAD: OS << ", sext"; break; 701 case ISD::ZEXTLOAD: OS << ", zext"; break; 702 } 703 if (doExt) 704 OS << " from " << LD->getMemoryVT().getEVTString(); 705 706 const char *AM = getIndexedModeName(LD->getAddressingMode()); 707 if (*AM) 708 OS << ", " << AM; 709 710 OS << ">"; 711 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 712 OS << "<"; 713 printMemOperand(OS, *ST->getMemOperand(), G); 714 715 if (ST->isTruncatingStore()) 716 OS << ", trunc to " << ST->getMemoryVT().getEVTString(); 717 718 const char *AM = getIndexedModeName(ST->getAddressingMode()); 719 if (*AM) 720 OS << ", " << AM; 721 722 OS << ">"; 723 } else if (const MaskedLoadSDNode *MLd = dyn_cast<MaskedLoadSDNode>(this)) { 724 OS << "<"; 725 726 printMemOperand(OS, *MLd->getMemOperand(), G); 727 728 bool doExt = true; 729 switch (MLd->getExtensionType()) { 730 default: doExt = false; break; 731 case ISD::EXTLOAD: OS << ", anyext"; break; 732 case ISD::SEXTLOAD: OS << ", sext"; break; 733 case ISD::ZEXTLOAD: OS << ", zext"; break; 734 } 735 if (doExt) 736 OS << " from " << MLd->getMemoryVT().getEVTString(); 737 738 const char *AM = getIndexedModeName(MLd->getAddressingMode()); 739 if (*AM) 740 OS << ", " << AM; 741 742 if (MLd->isExpandingLoad()) 743 OS << ", expanding"; 744 745 OS << ">"; 746 } else if (const MaskedStoreSDNode *MSt = dyn_cast<MaskedStoreSDNode>(this)) { 747 OS << "<"; 748 printMemOperand(OS, *MSt->getMemOperand(), G); 749 750 if (MSt->isTruncatingStore()) 751 OS << ", trunc to " << MSt->getMemoryVT().getEVTString(); 752 753 const char *AM = getIndexedModeName(MSt->getAddressingMode()); 754 if (*AM) 755 OS << ", " << AM; 756 757 if (MSt->isCompressingStore()) 758 OS << ", compressing"; 759 760 OS << ">"; 761 } else if (const auto *MGather = dyn_cast<MaskedGatherSDNode>(this)) { 762 OS << "<"; 763 printMemOperand(OS, *MGather->getMemOperand(), G); 764 765 bool doExt = true; 766 switch (MGather->getExtensionType()) { 767 default: doExt = false; break; 768 case ISD::EXTLOAD: OS << ", anyext"; break; 769 case ISD::SEXTLOAD: OS << ", sext"; break; 770 case ISD::ZEXTLOAD: OS << ", zext"; break; 771 } 772 if (doExt) 773 OS << " from " << MGather->getMemoryVT().getEVTString(); 774 775 auto Signed = MGather->isIndexSigned() ? "signed" : "unsigned"; 776 auto Scaled = MGather->isIndexScaled() ? "scaled" : "unscaled"; 777 OS << ", " << Signed << " " << Scaled << " offset"; 778 779 OS << ">"; 780 } else if (const auto *MScatter = dyn_cast<MaskedScatterSDNode>(this)) { 781 OS << "<"; 782 printMemOperand(OS, *MScatter->getMemOperand(), G); 783 784 if (MScatter->isTruncatingStore()) 785 OS << ", trunc to " << MScatter->getMemoryVT().getEVTString(); 786 787 auto Signed = MScatter->isIndexSigned() ? "signed" : "unsigned"; 788 auto Scaled = MScatter->isIndexScaled() ? "scaled" : "unscaled"; 789 OS << ", " << Signed << " " << Scaled << " offset"; 790 791 OS << ">"; 792 } else if (const MemSDNode *M = dyn_cast<MemSDNode>(this)) { 793 OS << "<"; 794 printMemOperand(OS, *M->getMemOperand(), G); 795 OS << ">"; 796 } else if (const BlockAddressSDNode *BA = 797 dyn_cast<BlockAddressSDNode>(this)) { 798 int64_t offset = BA->getOffset(); 799 OS << "<"; 800 BA->getBlockAddress()->getFunction()->printAsOperand(OS, false); 801 OS << ", "; 802 BA->getBlockAddress()->getBasicBlock()->printAsOperand(OS, false); 803 OS << ">"; 804 if (offset > 0) 805 OS << " + " << offset; 806 else 807 OS << " " << offset; 808 if (unsigned int TF = BA->getTargetFlags()) 809 OS << " [TF=" << TF << ']'; 810 } else if (const AddrSpaceCastSDNode *ASC = 811 dyn_cast<AddrSpaceCastSDNode>(this)) { 812 OS << '[' 813 << ASC->getSrcAddressSpace() 814 << " -> " 815 << ASC->getDestAddressSpace() 816 << ']'; 817 } else if (const LifetimeSDNode *LN = dyn_cast<LifetimeSDNode>(this)) { 818 if (LN->hasOffset()) 819 OS << "<" << LN->getOffset() << " to " << LN->getOffset() + LN->getSize() << ">"; 820 } 821 822 if (VerboseDAGDumping) { 823 if (unsigned Order = getIROrder()) 824 OS << " [ORD=" << Order << ']'; 825 826 if (getNodeId() != -1) 827 OS << " [ID=" << getNodeId() << ']'; 828 if (!(isa<ConstantSDNode>(this) || (isa<ConstantFPSDNode>(this)))) 829 OS << " # D:" << isDivergent(); 830 831 if (G && !G->GetDbgValues(this).empty()) { 832 OS << " [NoOfDbgValues=" << G->GetDbgValues(this).size() << ']'; 833 for (SDDbgValue *Dbg : G->GetDbgValues(this)) 834 if (!Dbg->isInvalidated()) 835 Dbg->print(OS); 836 } else if (getHasDebugValue()) 837 OS << " [NoOfDbgValues>0]"; 838 } 839 } 840 841 LLVM_DUMP_METHOD void SDDbgValue::print(raw_ostream &OS) const { 842 OS << " DbgVal(Order=" << getOrder() << ')'; 843 if (isInvalidated()) 844 OS << "(Invalidated)"; 845 if (isEmitted()) 846 OS << "(Emitted)"; 847 OS << "("; 848 bool Comma = false; 849 for (const SDDbgOperand &Op : getLocationOps()) { 850 if (Comma) 851 OS << ", "; 852 switch (Op.getKind()) { 853 case SDDbgOperand::SDNODE: 854 if (Op.getSDNode()) 855 OS << "SDNODE=" << PrintNodeId(*Op.getSDNode()) << ':' << Op.getResNo(); 856 else 857 OS << "SDNODE"; 858 break; 859 case SDDbgOperand::CONST: 860 OS << "CONST"; 861 break; 862 case SDDbgOperand::FRAMEIX: 863 OS << "FRAMEIX=" << Op.getFrameIx(); 864 break; 865 case SDDbgOperand::VREG: 866 OS << "VREG=" << Op.getVReg(); 867 break; 868 } 869 Comma = true; 870 } 871 OS << ")"; 872 if (isIndirect()) OS << "(Indirect)"; 873 if (isVariadic()) 874 OS << "(Variadic)"; 875 OS << ":\"" << Var->getName() << '"'; 876 #ifndef NDEBUG 877 if (Expr->getNumElements()) 878 Expr->dump(); 879 #endif 880 } 881 882 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 883 LLVM_DUMP_METHOD void SDDbgValue::dump() const { 884 if (isInvalidated()) 885 return; 886 print(dbgs()); 887 dbgs() << "\n"; 888 } 889 #endif 890 891 /// Return true if this node is so simple that we should just print it inline 892 /// if it appears as an operand. 893 static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G) { 894 // Avoid lots of cluttering when inline printing nodes with associated 895 // DbgValues in verbose mode. 896 if (VerboseDAGDumping && G && !G->GetDbgValues(&Node).empty()) 897 return false; 898 if (Node.getOpcode() == ISD::EntryToken) 899 return false; 900 return Node.getNumOperands() == 0; 901 } 902 903 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 904 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 905 for (const SDValue &Op : N->op_values()) { 906 if (shouldPrintInline(*Op.getNode(), G)) 907 continue; 908 if (Op.getNode()->hasOneUse()) 909 DumpNodes(Op.getNode(), indent+2, G); 910 } 911 912 dbgs().indent(indent); 913 N->dump(G); 914 } 915 916 LLVM_DUMP_METHOD void SelectionDAG::dump() const { 917 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:\n"; 918 919 for (const SDNode &N : allnodes()) { 920 if (!N.hasOneUse() && &N != getRoot().getNode() && 921 (!shouldPrintInline(N, this) || N.use_empty())) 922 DumpNodes(&N, 2, this); 923 } 924 925 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 926 dbgs() << "\n"; 927 928 if (VerboseDAGDumping) { 929 if (DbgBegin() != DbgEnd()) 930 dbgs() << "SDDbgValues:\n"; 931 for (auto *Dbg : make_range(DbgBegin(), DbgEnd())) 932 Dbg->dump(); 933 if (ByvalParmDbgBegin() != ByvalParmDbgEnd()) 934 dbgs() << "Byval SDDbgValues:\n"; 935 for (auto *Dbg : make_range(ByvalParmDbgBegin(), ByvalParmDbgEnd())) 936 Dbg->dump(); 937 } 938 dbgs() << "\n"; 939 } 940 #endif 941 942 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 943 OS << PrintNodeId(*this) << ": "; 944 print_types(OS, G); 945 OS << " = " << getOperationName(G); 946 print_details(OS, G); 947 } 948 949 static bool printOperand(raw_ostream &OS, const SelectionDAG *G, 950 const SDValue Value) { 951 if (!Value.getNode()) { 952 OS << "<null>"; 953 return false; 954 } 955 956 if (shouldPrintInline(*Value.getNode(), G)) { 957 OS << Value->getOperationName(G) << ':'; 958 Value->print_types(OS, G); 959 Value->print_details(OS, G); 960 return true; 961 } 962 963 OS << PrintNodeId(*Value.getNode()); 964 if (unsigned RN = Value.getResNo()) 965 OS << ':' << RN; 966 return false; 967 } 968 969 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 970 using VisitedSDNodeSet = SmallPtrSet<const SDNode *, 32>; 971 972 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, 973 const SelectionDAG *G, VisitedSDNodeSet &once) { 974 if (!once.insert(N).second) // If we've been here before, return now. 975 return; 976 977 // Dump the current SDNode, but don't end the line yet. 978 OS.indent(indent); 979 N->printr(OS, G); 980 981 // Having printed this SDNode, walk the children: 982 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 983 if (i) OS << ","; 984 OS << " "; 985 986 const SDValue Op = N->getOperand(i); 987 bool printedInline = printOperand(OS, G, Op); 988 if (printedInline) 989 once.insert(Op.getNode()); 990 } 991 992 OS << "\n"; 993 994 // Dump children that have grandchildren on their own line(s). 995 for (const SDValue &Op : N->op_values()) 996 DumpNodesr(OS, Op.getNode(), indent+2, G, once); 997 } 998 999 LLVM_DUMP_METHOD void SDNode::dumpr() const { 1000 VisitedSDNodeSet once; 1001 DumpNodesr(dbgs(), this, 0, nullptr, once); 1002 } 1003 1004 LLVM_DUMP_METHOD void SDNode::dumpr(const SelectionDAG *G) const { 1005 VisitedSDNodeSet once; 1006 DumpNodesr(dbgs(), this, 0, G, once); 1007 } 1008 #endif 1009 1010 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, 1011 const SelectionDAG *G, unsigned depth, 1012 unsigned indent) { 1013 if (depth == 0) 1014 return; 1015 1016 OS.indent(indent); 1017 1018 N->print(OS, G); 1019 1020 for (const SDValue &Op : N->op_values()) { 1021 // Don't follow chain operands. 1022 if (Op.getValueType() == MVT::Other) 1023 continue; 1024 OS << '\n'; 1025 printrWithDepthHelper(OS, Op.getNode(), G, depth - 1, indent + 2); 1026 } 1027 } 1028 1029 void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G, 1030 unsigned depth) const { 1031 printrWithDepthHelper(OS, this, G, depth, 0); 1032 } 1033 1034 void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const { 1035 // Don't print impossibly deep things. 1036 printrWithDepth(OS, G, 10); 1037 } 1038 1039 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 1040 LLVM_DUMP_METHOD 1041 void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const { 1042 printrWithDepth(dbgs(), G, depth); 1043 } 1044 1045 LLVM_DUMP_METHOD void SDNode::dumprFull(const SelectionDAG *G) const { 1046 // Don't print impossibly deep things. 1047 dumprWithDepth(G, 10); 1048 } 1049 #endif 1050 1051 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 1052 printr(OS, G); 1053 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 1054 if (i) OS << ", "; else OS << " "; 1055 printOperand(OS, G, getOperand(i)); 1056 } 1057 if (DebugLoc DL = getDebugLoc()) { 1058 OS << ", "; 1059 DL.print(OS); 1060 } 1061 } 1062