168ac7b17SMircea Trofin //===- MLRegAllocEvictAdvisor.cpp - ML eviction advisor -------------------===//
268ac7b17SMircea Trofin //
368ac7b17SMircea Trofin // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
468ac7b17SMircea Trofin // See https://llvm.org/LICENSE.txt for license information.
568ac7b17SMircea Trofin // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
668ac7b17SMircea Trofin //
768ac7b17SMircea Trofin //===----------------------------------------------------------------------===//
868ac7b17SMircea Trofin //
968ac7b17SMircea Trofin // Implementation of the ML eviction advisor and reward injection pass
1068ac7b17SMircea Trofin //
1168ac7b17SMircea Trofin //===----------------------------------------------------------------------===//
1268ac7b17SMircea Trofin 
1368ac7b17SMircea Trofin #include "RegAllocEvictionAdvisor.h"
14e67430ccSMircea Trofin #include "RegAllocGreedy.h"
15e67430ccSMircea Trofin #include "RegAllocScore.h"
16e67430ccSMircea Trofin #include "llvm/Analysis/AliasAnalysis.h"
1768ac7b17SMircea Trofin #include "llvm/Analysis/MLModelRunner.h"
1868ac7b17SMircea Trofin #include "llvm/Analysis/ModelUnderTrainingRunner.h"
1968ac7b17SMircea Trofin #include "llvm/Analysis/NoInferenceModelRunner.h"
20e67430ccSMircea Trofin #include "llvm/Analysis/ReleaseModeModelRunner.h"
2168ac7b17SMircea Trofin #include "llvm/Analysis/Utils/TFUtils.h"
2268ac7b17SMircea Trofin #include "llvm/CodeGen/CalcSpillWeights.h"
23e67430ccSMircea Trofin #include "llvm/CodeGen/MachineBasicBlock.h"
2468ac7b17SMircea Trofin #include "llvm/CodeGen/MachineBlockFrequencyInfo.h"
2568ac7b17SMircea Trofin #include "llvm/CodeGen/MachineFunction.h"
2668ac7b17SMircea Trofin #include "llvm/CodeGen/MachineLoopInfo.h"
27e67430ccSMircea Trofin #include "llvm/CodeGen/MachineRegisterInfo.h"
28e67430ccSMircea Trofin #include "llvm/CodeGen/Passes.h"
2968ac7b17SMircea Trofin #include "llvm/CodeGen/RegisterClassInfo.h"
3068ac7b17SMircea Trofin #include "llvm/CodeGen/VirtRegMap.h"
313150bce0SMircea Trofin #include "llvm/Config/config.h"
3268ac7b17SMircea Trofin #include "llvm/InitializePasses.h"
3368ac7b17SMircea Trofin #include "llvm/Pass.h"
3468ac7b17SMircea Trofin #include "llvm/PassRegistry.h"
3568ac7b17SMircea Trofin #include "llvm/Support/CommandLine.h"
3668ac7b17SMircea Trofin #include "llvm/Support/ErrorHandling.h"
3768ac7b17SMircea Trofin #include "llvm/Target/TargetMachine.h"
3868ac7b17SMircea Trofin 
39e67430ccSMircea Trofin #include <array>
4068ac7b17SMircea Trofin #include <memory>
4168ac7b17SMircea Trofin 
4268ac7b17SMircea Trofin using namespace llvm;
4368ac7b17SMircea Trofin 
4468ac7b17SMircea Trofin #define DEBUG_TYPE "ml-regalloc"
45b1af01feSMircea Trofin 
46e67430ccSMircea Trofin // Generated header in release (AOT) mode
47b1af01feSMircea Trofin #if defined(LLVM_HAVE_TF_AOT_REGALLOCEVICTMODEL)
48e67430ccSMircea Trofin #include "RegallocEvictModel.h"
49e67430ccSMircea Trofin #endif
50e67430ccSMircea Trofin 
51e67430ccSMircea Trofin // Options that only make sense in development mode
52e67430ccSMircea Trofin #ifdef LLVM_HAVE_TF_API
53e67430ccSMircea Trofin static cl::opt<std::string> TrainingLog(
54e67430ccSMircea Trofin     "regalloc-training-log", cl::Hidden,
55e67430ccSMircea Trofin     cl::desc("Training log for the register allocator eviction model"));
56e67430ccSMircea Trofin 
57e67430ccSMircea Trofin static cl::opt<std::string> ModelUnderTraining(
58e67430ccSMircea Trofin     "regalloc-model", cl::Hidden,
59e67430ccSMircea Trofin     cl::desc("The model being trained for register allocation eviction"));
60e67430ccSMircea Trofin 
61e67430ccSMircea Trofin #endif // #ifdef LLVM_HAVE_TF_API
62e67430ccSMircea Trofin 
63e67430ccSMircea Trofin /// The score injection pass.
64e67430ccSMircea Trofin /// This pass calculates the score for a function and inserts it in the log, but
65e67430ccSMircea Trofin /// this happens only in development mode. It's a no-op otherwise.
66e67430ccSMircea Trofin namespace llvm {
67e67430ccSMircea Trofin class RegAllocScoring : public MachineFunctionPass {
68e67430ccSMircea Trofin public:
69e67430ccSMircea Trofin   static char ID;
70e67430ccSMircea Trofin 
71e67430ccSMircea Trofin   RegAllocScoring() : MachineFunctionPass(ID) {
72e67430ccSMircea Trofin     initializeRegAllocScoringPass(*PassRegistry::getPassRegistry());
73e67430ccSMircea Trofin   }
74e67430ccSMircea Trofin 
75e67430ccSMircea Trofin   ~RegAllocScoring() override = default;
76e67430ccSMircea Trofin 
77e67430ccSMircea Trofin   StringRef getPassName() const override {
78e67430ccSMircea Trofin     return "Register Allocation Pass Scoring";
79e67430ccSMircea Trofin   }
80e67430ccSMircea Trofin 
81e67430ccSMircea Trofin   /// RegAllocReward analysis usage.
82e67430ccSMircea Trofin   void getAnalysisUsage(AnalysisUsage &AU) const override {
83e67430ccSMircea Trofin     AU.setPreservesAll();
84e67430ccSMircea Trofin     AU.addRequired<RegAllocEvictionAdvisorAnalysis>();
85e67430ccSMircea Trofin     AU.addRequired<MachineBlockFrequencyInfo>();
86e67430ccSMircea Trofin     AU.addRequired<AAResultsWrapperPass>();
87e67430ccSMircea Trofin     MachineFunctionPass::getAnalysisUsage(AU);
88e67430ccSMircea Trofin   }
89e67430ccSMircea Trofin 
90e67430ccSMircea Trofin   /// Performs this pass
91e67430ccSMircea Trofin   bool runOnMachineFunction(MachineFunction &) override;
92e67430ccSMircea Trofin };
93e67430ccSMircea Trofin 
94e67430ccSMircea Trofin char RegAllocScoring::ID = 0;
95073e0968SMircea Trofin FunctionPass *createRegAllocScoringPass() { return new RegAllocScoring(); }
96073e0968SMircea Trofin 
97073e0968SMircea Trofin } // namespace llvm
98e67430ccSMircea Trofin 
99e67430ccSMircea Trofin INITIALIZE_PASS(RegAllocScoring, "regallocscoringpass",
100e67430ccSMircea Trofin                 "Register Allocation Scoring Pass", false, false)
101e67430ccSMircea Trofin 
102e67430ccSMircea Trofin // ===================================
103e67430ccSMircea Trofin // Common ML Advisor declarations
104e67430ccSMircea Trofin // ===================================
10568ac7b17SMircea Trofin namespace {
10668ac7b17SMircea Trofin // This is the maximum number of interfererring ranges. That's the number of
10768ac7b17SMircea Trofin // distinct AllocationOrder values, which comes from MCRegisterClass::RegsSize.
10868ac7b17SMircea Trofin // For X86, that's 32.
10968ac7b17SMircea Trofin // TODO: find a way to get this, statically, in a programmatic way.
11068ac7b17SMircea Trofin static const int64_t MaxInterferences = 32;
11168ac7b17SMircea Trofin 
11268ac7b17SMircea Trofin // Logically, we can think of the feature set given to the evaluator as a 2D
11368ac7b17SMircea Trofin // matrix. The rows are the features (see next). The columns correspond to the
11468ac7b17SMircea Trofin // interferences. We treat the candidate virt reg as an 'interference', too, as
11568ac7b17SMircea Trofin // its feature set is the same as that of the interferring ranges. So we'll have
11668ac7b17SMircea Trofin // MaxInterferences + 1 columns and by convention, we will use the last column
11768ac7b17SMircea Trofin // for the virt reg seeking allocation.
11868ac7b17SMircea Trofin static const int64_t CandidateVirtRegPos = MaxInterferences;
11968ac7b17SMircea Trofin static const int64_t NumberOfInterferences = CandidateVirtRegPos + 1;
12068ac7b17SMircea Trofin 
12168ac7b17SMircea Trofin // Most features are as described above, so we'll reuse this vector in defining
12268ac7b17SMircea Trofin // them.
12368ac7b17SMircea Trofin static const std::vector<int64_t> PerLiveRangeShape{1, NumberOfInterferences};
12468ac7b17SMircea Trofin 
12568ac7b17SMircea Trofin // --------------
12668ac7b17SMircea Trofin // Features table
12768ac7b17SMircea Trofin // --------------
12868ac7b17SMircea Trofin // For each interfering live range (incl. the candidate) we collect a number of
12968ac7b17SMircea Trofin // features. However, because the features are of different types (and because
13068ac7b17SMircea Trofin // of ML best practices), we organize the tensors per feature, not per
13168ac7b17SMircea Trofin // candidate. Each such tensor has a scalar value corresponding to the
13268ac7b17SMircea Trofin // interferring live range at that position, in the order in AllocationOrder.
13368ac7b17SMircea Trofin // The last position corresponds to the virt reg seeking allocation.
13468ac7b17SMircea Trofin // Exception to all that is the progression feature, which is just a scalar (see
13568ac7b17SMircea Trofin // its documentation for details).
13668ac7b17SMircea Trofin // Note on naming: the "_by_max" are normalized using the largest value of that
13768ac7b17SMircea Trofin // tensor, as observed in the current decision making stage (i.e. for the
13868ac7b17SMircea Trofin // current call to the advisor's tryFindEvictionCandidate)
13968ac7b17SMircea Trofin //
14068ac7b17SMircea Trofin // The feature list format: type, name, shape, documentation.
14168ac7b17SMircea Trofin // Note: we can really just use int64 and float, hence the modeling of some
14268ac7b17SMircea Trofin // bools as int64 values.
14368ac7b17SMircea Trofin #define RA_EVICT_FEATURES_LIST(M)                                              \
14468ac7b17SMircea Trofin   M(int64_t, mask, PerLiveRangeShape,                                          \
14568ac7b17SMircea Trofin     "boolean values, 0 for unavailable candidates (i.e. if a position is 0, "  \
14668ac7b17SMircea Trofin     "it "                                                                      \
14768ac7b17SMircea Trofin     "can't be evicted)")                                                       \
14868ac7b17SMircea Trofin   M(int64_t, is_free, PerLiveRangeShape,                                       \
14968ac7b17SMircea Trofin     "boolean values, 1 if this phys reg is actually free (no interferences)")  \
15068ac7b17SMircea Trofin   M(float, nr_urgent, PerLiveRangeShape,                                       \
15168ac7b17SMircea Trofin     "number of 'urgent' intervals, normalized. Urgent are those that are OK "  \
15268ac7b17SMircea Trofin     "to break cascades")                                                       \
15368ac7b17SMircea Trofin   M(float, nr_broken_hints, PerLiveRangeShape,                                 \
15468ac7b17SMircea Trofin     "if this position were evicted, how many broken hints would there be")     \
15568ac7b17SMircea Trofin   M(int64_t, is_hint, PerLiveRangeShape,                                       \
15668ac7b17SMircea Trofin     "is this a preferred phys reg for the candidate")                          \
15768ac7b17SMircea Trofin   M(int64_t, is_local, PerLiveRangeShape,                                      \
15868ac7b17SMircea Trofin     "is this live range local to a basic block")                               \
15968ac7b17SMircea Trofin   M(float, nr_rematerializable, PerLiveRangeShape,                             \
16068ac7b17SMircea Trofin     "nr rematerializable ranges")                                              \
16168ac7b17SMircea Trofin   M(float, nr_defs_and_uses, PerLiveRangeShape,                                \
16268ac7b17SMircea Trofin     "bb freq - weighed nr defs and uses")                                      \
16368ac7b17SMircea Trofin   M(float, weighed_reads_by_max, PerLiveRangeShape,                            \
16468ac7b17SMircea Trofin     "bb freq - weighed nr of reads, normalized")                               \
16568ac7b17SMircea Trofin   M(float, weighed_writes_by_max, PerLiveRangeShape,                           \
16668ac7b17SMircea Trofin     "bb feq - weighed nr of writes, normalized")                               \
16768ac7b17SMircea Trofin   M(float, weighed_read_writes_by_max, PerLiveRangeShape,                      \
16868ac7b17SMircea Trofin     "bb freq - weighed nr of uses that are both read and writes, normalized")  \
16968ac7b17SMircea Trofin   M(float, weighed_indvars_by_max, PerLiveRangeShape,                          \
17068ac7b17SMircea Trofin     "bb freq - weighed nr of uses that are indvars, normalized")               \
17168ac7b17SMircea Trofin   M(float, hint_weights_by_max, PerLiveRangeShape,                             \
17268ac7b17SMircea Trofin     "bb freq - weighed nr of uses that are hints, normalized")                 \
17368ac7b17SMircea Trofin   M(float, start_bb_freq_by_max, PerLiveRangeShape,                            \
17468ac7b17SMircea Trofin     "the freq in the start block, normalized")                                 \
17568ac7b17SMircea Trofin   M(float, end_bb_freq_by_max, PerLiveRangeShape,                              \
17668ac7b17SMircea Trofin     "freq of end block, normalized")                                           \
17768ac7b17SMircea Trofin   M(float, hottest_bb_freq_by_max, PerLiveRangeShape,                          \
17868ac7b17SMircea Trofin     "hottest BB freq, normalized")                                             \
17968ac7b17SMircea Trofin   M(float, liverange_size, PerLiveRangeShape,                                  \
18068ac7b17SMircea Trofin     "size (instr index diff) of the LR")                                       \
18168ac7b17SMircea Trofin   M(float, use_def_density, PerLiveRangeShape,                                 \
18268ac7b17SMircea Trofin     "the max weight, as computed by the manual heuristic")                     \
18368ac7b17SMircea Trofin   M(int64_t, max_stage, PerLiveRangeShape,                                     \
18468ac7b17SMircea Trofin     "largest stage of an interval in this LR")                                 \
18568ac7b17SMircea Trofin   M(int64_t, min_stage, PerLiveRangeShape,                                     \
18668ac7b17SMircea Trofin     "lowest stage of an interval in this LR")                                  \
18768ac7b17SMircea Trofin   M(float, progress, {1}, "ratio of current queue size to initial size")
18868ac7b17SMircea Trofin 
18968ac7b17SMircea Trofin // The model learns to pick one of the mask == 1 interferences. This is the name
19068ac7b17SMircea Trofin // of the output tensor.
19168ac7b17SMircea Trofin // The contract with the model is that the output will be guaranteed to be to a
19268ac7b17SMircea Trofin // mask == 1 position.
193b1af01feSMircea Trofin // Using a macro here to avoid 'not used' warnings (and keep cond compilation to
194b1af01feSMircea Trofin // a minimum)
195b1af01feSMircea Trofin #define DecisionName "index_to_evict"
19668ac7b17SMircea Trofin 
19768ac7b17SMircea Trofin // Named features index.
19868ac7b17SMircea Trofin enum FeatureIDs {
19968ac7b17SMircea Trofin #define _FEATURE_IDX(_, name, __, ___) name,
20068ac7b17SMircea Trofin   RA_EVICT_FEATURES_LIST(_FEATURE_IDX)
20168ac7b17SMircea Trofin #undef _FEATURE_IDX
20268ac7b17SMircea Trofin       FeatureCount
20368ac7b17SMircea Trofin };
20468ac7b17SMircea Trofin 
20568ac7b17SMircea Trofin // The ML advisor will typically have a sparse input to the evaluator, because
20668ac7b17SMircea Trofin // various phys regs won't be available. It's easier (maintenance-wise) to
20768ac7b17SMircea Trofin // bulk-reset the state of the evaluator each time we are about to use it again.
20868ac7b17SMircea Trofin template <typename T> size_t getTotalSize(const std::vector<int64_t> &Shape) {
20968ac7b17SMircea Trofin   size_t Ret = sizeof(T);
21068ac7b17SMircea Trofin   for (const auto V : Shape)
21168ac7b17SMircea Trofin     Ret *= V;
21268ac7b17SMircea Trofin   return Ret;
21368ac7b17SMircea Trofin }
21468ac7b17SMircea Trofin 
21568ac7b17SMircea Trofin void resetInputs(MLModelRunner &Runner) {
21668ac7b17SMircea Trofin #define _RESET(TYPE, NAME, SHAPE, __)                                          \
21768ac7b17SMircea Trofin   std::memset(Runner.getTensorUntyped(FeatureIDs::NAME), 0,                    \
21868ac7b17SMircea Trofin               getTotalSize<TYPE>(SHAPE));
21968ac7b17SMircea Trofin   RA_EVICT_FEATURES_LIST(_RESET)
22068ac7b17SMircea Trofin #undef _RESET
22168ac7b17SMircea Trofin }
22268ac7b17SMircea Trofin 
223e67430ccSMircea Trofin using CandidateRegList =
224e67430ccSMircea Trofin     std::array<std::pair<MCRegister, bool>, NumberOfInterferences>;
225e67430ccSMircea Trofin using FeaturesListNormalizer = std::array<float, FeatureIDs::FeatureCount>;
226e67430ccSMircea Trofin 
227e67430ccSMircea Trofin /// The ML evictor (commonalities between release and development mode)
228e67430ccSMircea Trofin class MLEvictAdvisor : public RegAllocEvictionAdvisor {
229e67430ccSMircea Trofin public:
230*bc3b3721SMircea Trofin   MLEvictAdvisor(MachineFunction &MF, const RAGreedy &RA, MLModelRunner *Runner,
231*bc3b3721SMircea Trofin                  const MachineBlockFrequencyInfo &MBFI,
232e67430ccSMircea Trofin                  const MachineLoopInfo &Loops);
233e67430ccSMircea Trofin 
234e67430ccSMircea Trofin protected:
235e67430ccSMircea Trofin   const RegAllocEvictionAdvisor &getDefaultAdvisor() const {
236e67430ccSMircea Trofin     return static_cast<const RegAllocEvictionAdvisor &>(DefaultAdvisor);
237e67430ccSMircea Trofin   }
238e67430ccSMircea Trofin 
239e67430ccSMircea Trofin   // The assumption is that if the Runner could not be constructed, we emit-ed
240e67430ccSMircea Trofin   // error, and we shouldn't be asking for it here.
241e67430ccSMircea Trofin   const MLModelRunner &getRunner() const { return *Runner; }
242e67430ccSMircea Trofin 
243e67430ccSMircea Trofin   /// This just calls Evaluate on the Runner, but in the development mode case,
244e67430ccSMircea Trofin   /// if we're just capturing the log of the default advisor, it needs to call
245e67430ccSMircea Trofin   /// the latter instead, so we need to pass all the necessary parameters for
246e67430ccSMircea Trofin   /// it. In the development case, it will also log.
247e67430ccSMircea Trofin   virtual int64_t tryFindEvictionCandidatePosition(
248e67430ccSMircea Trofin       LiveInterval &VirtReg, const AllocationOrder &Order, unsigned OrderLimit,
249e67430ccSMircea Trofin       uint8_t CostPerUseLimit, const SmallVirtRegSet &FixedRegisters) const;
250e67430ccSMircea Trofin 
251e67430ccSMircea Trofin   /// Load the features of the given VirtReg (allocated or not) at column Pos,
252e67430ccSMircea Trofin   /// but if  that can't be evicted, return false instead.
253e67430ccSMircea Trofin   bool
254e67430ccSMircea Trofin   loadInterferenceFeatures(LiveInterval &VirtReg, MCRegister PhysReg,
255e67430ccSMircea Trofin                            bool IsHint, const SmallVirtRegSet &FixedRegisters,
256e67430ccSMircea Trofin                            std::array<float, FeatureIDs::FeatureCount> &Largest,
257e67430ccSMircea Trofin                            size_t Pos) const;
258e67430ccSMircea Trofin 
259e67430ccSMircea Trofin private:
260e67430ccSMircea Trofin   static float getInitialQueueSize(const MachineFunction &MF);
261e67430ccSMircea Trofin 
262e67430ccSMircea Trofin   MCRegister tryFindEvictionCandidate(
263e67430ccSMircea Trofin       LiveInterval &VirtReg, const AllocationOrder &Order,
264e67430ccSMircea Trofin       uint8_t CostPerUseLimit,
265e67430ccSMircea Trofin       const SmallVirtRegSet &FixedRegisters) const override;
266e67430ccSMircea Trofin 
267e67430ccSMircea Trofin   void extractFeatures(const SmallVectorImpl<LiveInterval *> &Intervals,
268e67430ccSMircea Trofin                        std::array<float, FeatureIDs::FeatureCount> &Largest,
269e67430ccSMircea Trofin                        size_t Pos, int64_t IsHint, int64_t LocalIntfsCount,
270e67430ccSMircea Trofin                        float NrUrgent) const;
271e67430ccSMircea Trofin 
272e67430ccSMircea Trofin   // Point-in-time: we didn't learn this, so we always delegate to the default.
273e67430ccSMircea Trofin   bool canEvictHintInterference(
274e67430ccSMircea Trofin       LiveInterval &VirtReg, MCRegister PhysReg,
275e67430ccSMircea Trofin       const SmallVirtRegSet &FixedRegisters) const override {
276e67430ccSMircea Trofin     return getDefaultAdvisor().canEvictHintInterference(VirtReg, PhysReg,
277e67430ccSMircea Trofin                                                         FixedRegisters);
278e67430ccSMircea Trofin   }
279e67430ccSMircea Trofin 
280e67430ccSMircea Trofin   // Hold on to a default advisor for:
281e67430ccSMircea Trofin   // 1) the implementation of canEvictHintInterference, because we didn't learn
282e67430ccSMircea Trofin   // that nuance yet;
283e67430ccSMircea Trofin   // 2) for bootstrapping (logging) in the development mode case.
284e67430ccSMircea Trofin   const DefaultEvictionAdvisor DefaultAdvisor;
285e67430ccSMircea Trofin   MLModelRunner *const Runner;
286e67430ccSMircea Trofin   const MachineBlockFrequencyInfo &MBFI;
287e67430ccSMircea Trofin   const MachineLoopInfo &Loops;
288e67430ccSMircea Trofin 
289e67430ccSMircea Trofin   // Indices of those features we don't want to normalize.
290e67430ccSMircea Trofin   // This could be static and shared, but its initialization is non-trivial.
291e67430ccSMircea Trofin   std::bitset<FeatureIDs::FeatureCount> DoNotNormalize;
292e67430ccSMircea Trofin   const float InitialQSize;
293e67430ccSMircea Trofin };
294e67430ccSMircea Trofin 
295e67430ccSMircea Trofin // ===================================
296e67430ccSMircea Trofin // Release (AOT) - specifics
297e67430ccSMircea Trofin // ===================================
298b1af01feSMircea Trofin #if defined(LLVM_HAVE_TF_AOT_REGALLOCEVICTMODEL)
299e67430ccSMircea Trofin const std::array<std::string, FeatureIDs::FeatureCount> FeatureNames{
300e67430ccSMircea Trofin #define _GETNAME(_, NAME, __, ___) #NAME,
301e67430ccSMircea Trofin     RA_EVICT_FEATURES_LIST(_GETNAME)
302e67430ccSMircea Trofin #undef _GETNAME
303e67430ccSMircea Trofin };
304e67430ccSMircea Trofin class ReleaseModeEvictionAdvisorAnalysis final
305e67430ccSMircea Trofin     : public RegAllocEvictionAdvisorAnalysis {
306e67430ccSMircea Trofin public:
307e67430ccSMircea Trofin   ReleaseModeEvictionAdvisorAnalysis()
308e67430ccSMircea Trofin       : RegAllocEvictionAdvisorAnalysis(AdvisorMode::Release) {}
309e67430ccSMircea Trofin   // support for isa<> and dyn_cast.
310e67430ccSMircea Trofin   static bool classof(const RegAllocEvictionAdvisorAnalysis *R) {
311e67430ccSMircea Trofin     return R->getAdvisorMode() == AdvisorMode::Release;
312e67430ccSMircea Trofin   }
313e67430ccSMircea Trofin 
314e67430ccSMircea Trofin private:
315e67430ccSMircea Trofin   void getAnalysisUsage(AnalysisUsage &AU) const override {
316e67430ccSMircea Trofin     AU.addRequired<MachineBlockFrequencyInfo>();
317e67430ccSMircea Trofin     AU.addRequired<MachineLoopInfo>();
318e67430ccSMircea Trofin     RegAllocEvictionAdvisorAnalysis::getAnalysisUsage(AU);
319e67430ccSMircea Trofin   }
320e67430ccSMircea Trofin 
321e67430ccSMircea Trofin   std::unique_ptr<RegAllocEvictionAdvisor>
322*bc3b3721SMircea Trofin   getAdvisor(MachineFunction &MF, const RAGreedy &RA) override {
323e67430ccSMircea Trofin     if (!Runner)
324e67430ccSMircea Trofin       Runner = std::make_unique<ReleaseModeModelRunner<RegallocEvictModel>>(
325e67430ccSMircea Trofin           MF.getFunction().getContext(), FeatureNames, DecisionName);
326e67430ccSMircea Trofin     return std::make_unique<MLEvictAdvisor>(
327e67430ccSMircea Trofin         MF, RA, Runner.get(), getAnalysis<MachineBlockFrequencyInfo>(),
328e67430ccSMircea Trofin         getAnalysis<MachineLoopInfo>());
329e67430ccSMircea Trofin   }
330e67430ccSMircea Trofin   std::unique_ptr<ReleaseModeModelRunner<RegallocEvictModel>> Runner;
331e67430ccSMircea Trofin };
332b1af01feSMircea Trofin #endif
333e67430ccSMircea Trofin 
334e67430ccSMircea Trofin // ===================================
33568ac7b17SMircea Trofin // Development mode-specifics
336e67430ccSMircea Trofin // ===================================
337e67430ccSMircea Trofin //
338e67430ccSMircea Trofin // Features we log
33968ac7b17SMircea Trofin #ifdef LLVM_HAVE_TF_API
34068ac7b17SMircea Trofin #define _DECL_FEATURES(type, name, shape, _)                                   \
34168ac7b17SMircea Trofin   TensorSpec::createSpec<type>(#name, shape),
34268ac7b17SMircea Trofin 
34368ac7b17SMircea Trofin static const std::vector<TensorSpec> InputFeatures{
344e67430ccSMircea Trofin     {RA_EVICT_FEATURES_LIST(_DECL_FEATURES)},
345e67430ccSMircea Trofin };
34668ac7b17SMircea Trofin #undef _DECL_FEATURES
34768ac7b17SMircea Trofin static const TensorSpec Output =
34868ac7b17SMircea Trofin     TensorSpec::createSpec<int64_t>(DecisionName, {1});
349b2d2e931SMircea Trofin static const TensorSpec Reward = TensorSpec::createSpec<float>("reward", {1});
35068ac7b17SMircea Trofin 
351e67430ccSMircea Trofin // Features we bind on the model. The tensor names have a prefix, and we also
352e67430ccSMircea Trofin // need to include some tensors that are expected to be present by the training
353e67430ccSMircea Trofin // algo.
354e67430ccSMircea Trofin // TODO: can we just get rid of these?
355e67430ccSMircea Trofin #define _DECL_TRAIN_FEATURES(type, name, shape, _)                             \
356e67430ccSMircea Trofin   TensorSpec::createSpec<type>(std::string("action_") + #name, shape),
357e67430ccSMircea Trofin 
358e67430ccSMircea Trofin static const std::vector<TensorSpec> TrainingInputFeatures{
359e67430ccSMircea Trofin     {RA_EVICT_FEATURES_LIST(_DECL_TRAIN_FEATURES)
360e67430ccSMircea Trofin          TensorSpec::createSpec<float>("action_discount", {1}),
361e67430ccSMircea Trofin      TensorSpec::createSpec<int32_t>("action_step_type", {1}),
362e67430ccSMircea Trofin      TensorSpec::createSpec<float>("action_reward", {1})}};
363e67430ccSMircea Trofin #undef _DECL_TRAIN_FEATURES
364e67430ccSMircea Trofin 
365e67430ccSMircea Trofin class DevelopmentModeEvictAdvisor : public MLEvictAdvisor {
366e67430ccSMircea Trofin public:
367*bc3b3721SMircea Trofin   DevelopmentModeEvictAdvisor(MachineFunction &MF, const RAGreedy &RA,
368e67430ccSMircea Trofin                               MLModelRunner *Runner,
369e67430ccSMircea Trofin                               const MachineBlockFrequencyInfo &MBFI,
370e67430ccSMircea Trofin                               const MachineLoopInfo &Loops, Logger *Log)
371e67430ccSMircea Trofin       : MLEvictAdvisor(MF, RA, Runner, MBFI, Loops), Log(Log) {}
372e67430ccSMircea Trofin 
373e67430ccSMircea Trofin private:
374e67430ccSMircea Trofin   int64_t tryFindEvictionCandidatePosition(
375e67430ccSMircea Trofin       LiveInterval &VirtReg, const AllocationOrder &Order, unsigned OrderLimit,
376e67430ccSMircea Trofin       uint8_t CostPerUseLimit,
377e67430ccSMircea Trofin       const SmallVirtRegSet &FixedRegisters) const override;
378e67430ccSMircea Trofin 
379e67430ccSMircea Trofin   Logger *const Log;
380e67430ccSMircea Trofin };
381e67430ccSMircea Trofin 
382e67430ccSMircea Trofin class DevelopmentModeEvictionAdvisorAnalysis final
383e67430ccSMircea Trofin     : public RegAllocEvictionAdvisorAnalysis {
384e67430ccSMircea Trofin public:
385e67430ccSMircea Trofin   DevelopmentModeEvictionAdvisorAnalysis()
386e67430ccSMircea Trofin       : RegAllocEvictionAdvisorAnalysis(AdvisorMode::Development) {}
387e67430ccSMircea Trofin   // support for isa<> and dyn_cast.
388e67430ccSMircea Trofin   static bool classof(const RegAllocEvictionAdvisorAnalysis *R) {
389e67430ccSMircea Trofin     return R->getAdvisorMode() == AdvisorMode::Development;
390e67430ccSMircea Trofin   }
391e67430ccSMircea Trofin 
392e67430ccSMircea Trofin   /// get the logger for the given function, or nullptr if we didn't collect
393e67430ccSMircea Trofin   /// one. This is used to inject the score by the RegAllocScoring pass.
394e67430ccSMircea Trofin   Logger *getLogger(const MachineFunction &MF) const {
395e67430ccSMircea Trofin     auto I = LogMap.find(MF.getName());
396e67430ccSMircea Trofin     if (I == LogMap.end())
397e67430ccSMircea Trofin       return nullptr;
398e67430ccSMircea Trofin     return I->second.get();
399e67430ccSMircea Trofin   }
400e67430ccSMircea Trofin 
401e67430ccSMircea Trofin private:
402e67430ccSMircea Trofin   void getAnalysisUsage(AnalysisUsage &AU) const override {
403e67430ccSMircea Trofin     AU.addRequired<MachineBlockFrequencyInfo>();
404e67430ccSMircea Trofin     AU.addRequired<MachineLoopInfo>();
405e67430ccSMircea Trofin     RegAllocEvictionAdvisorAnalysis::getAnalysisUsage(AU);
406e67430ccSMircea Trofin   }
407e67430ccSMircea Trofin 
408e67430ccSMircea Trofin   // Save all the logs (when requested).
409e67430ccSMircea Trofin   bool doFinalization(Module &M) override {
410e67430ccSMircea Trofin     if (TrainingLog.empty())
411e67430ccSMircea Trofin       return false;
412e67430ccSMircea Trofin     std::error_code EC;
413e67430ccSMircea Trofin     auto OS = std::make_unique<raw_fd_ostream>(TrainingLog, EC);
414e67430ccSMircea Trofin     if (EC) {
415e67430ccSMircea Trofin       M.getContext().emitError(EC.message() + ":" + TrainingLog);
416e67430ccSMircea Trofin       return false;
417e67430ccSMircea Trofin     }
418e67430ccSMircea Trofin     Logger::flushLogs(*OS, LogMap);
419e67430ccSMircea Trofin     return false;
420e67430ccSMircea Trofin   }
421e67430ccSMircea Trofin 
422e67430ccSMircea Trofin   std::unique_ptr<RegAllocEvictionAdvisor>
423*bc3b3721SMircea Trofin   getAdvisor(MachineFunction &MF, const RAGreedy &RA) override {
424e67430ccSMircea Trofin     LLVMContext &Ctx = MF.getFunction().getContext();
425e67430ccSMircea Trofin     if (ModelUnderTraining.empty() && TrainingLog.empty()) {
426e67430ccSMircea Trofin       Ctx.emitError("Regalloc development mode should be requested with at "
427e67430ccSMircea Trofin                     "least logging enabled and/or a training model");
428e67430ccSMircea Trofin       return nullptr;
429e67430ccSMircea Trofin     }
430e67430ccSMircea Trofin     if (!Runner) {
431e67430ccSMircea Trofin       if (ModelUnderTraining.empty())
432e67430ccSMircea Trofin         Runner = std::make_unique<NoInferenceModelRunner>(Ctx, InputFeatures);
433e67430ccSMircea Trofin       else
434e67430ccSMircea Trofin         Runner = ModelUnderTrainingRunner::createAndEnsureValid(
435e67430ccSMircea Trofin             Ctx, ModelUnderTraining, DecisionName, TrainingInputFeatures);
436e67430ccSMircea Trofin       if (!Runner) {
437e67430ccSMircea Trofin         Ctx.emitError("Regalloc: could not set up the model runner");
438e67430ccSMircea Trofin         return nullptr;
439e67430ccSMircea Trofin       }
440e67430ccSMircea Trofin     }
441e67430ccSMircea Trofin 
442e67430ccSMircea Trofin     Logger *Log = nullptr;
443e67430ccSMircea Trofin     if (!TrainingLog.empty()) {
444e67430ccSMircea Trofin       std::vector<LoggedFeatureSpec> LFS;
445e67430ccSMircea Trofin       for (const auto &FS : InputFeatures)
446e67430ccSMircea Trofin         LFS.push_back({FS, None});
447e67430ccSMircea Trofin       if (auto *MUTR = dyn_cast<ModelUnderTrainingRunner>(Runner.get()))
448e67430ccSMircea Trofin         if (MUTR->outputLoggedFeatureSpecs().size() > 1)
449e67430ccSMircea Trofin           append_range(LFS, drop_begin(MUTR->outputLoggedFeatureSpecs()));
450e67430ccSMircea Trofin       // We always log the output; in particular, if we're not evaluating, we
451e67430ccSMircea Trofin       // don't have an output spec json file. That's why we handle the
452e67430ccSMircea Trofin       // 'normal' output separately.
453e67430ccSMircea Trofin       LFS.push_back({Output, None});
454e67430ccSMircea Trofin       auto I = LogMap.insert(std::make_pair(
455e67430ccSMircea Trofin           MF.getFunction().getName(),
456e67430ccSMircea Trofin           std::make_unique<Logger>(LFS, Reward, /*IncludeReward*/ true)));
457e67430ccSMircea Trofin       assert(I.second);
458e67430ccSMircea Trofin       Log = I.first->second.get();
459e67430ccSMircea Trofin     }
460e67430ccSMircea Trofin     return std::make_unique<DevelopmentModeEvictAdvisor>(
461e67430ccSMircea Trofin         MF, RA, Runner.get(), getAnalysis<MachineBlockFrequencyInfo>(),
462e67430ccSMircea Trofin         getAnalysis<MachineLoopInfo>(), Log);
463e67430ccSMircea Trofin   }
464e67430ccSMircea Trofin 
465e67430ccSMircea Trofin   std::unique_ptr<MLModelRunner> Runner;
466e67430ccSMircea Trofin   StringMap<std::unique_ptr<Logger>> LogMap;
467e67430ccSMircea Trofin };
46868ac7b17SMircea Trofin #endif //#ifdef LLVM_HAVE_TF_API
46968ac7b17SMircea Trofin } // namespace
470e67430ccSMircea Trofin 
471e67430ccSMircea Trofin float MLEvictAdvisor::getInitialQueueSize(const MachineFunction &MF) {
472e67430ccSMircea Trofin   auto &MRI = MF.getRegInfo();
473e67430ccSMircea Trofin   float Ret = 0.0;
474e67430ccSMircea Trofin   for (unsigned I = 0, E = MRI.getNumVirtRegs(); I != E; ++I) {
475e67430ccSMircea Trofin     Register Reg = Register::index2VirtReg(I);
476e67430ccSMircea Trofin     if (MRI.reg_nodbg_empty(Reg))
477e67430ccSMircea Trofin       continue;
478e67430ccSMircea Trofin     ++Ret;
479e67430ccSMircea Trofin   }
480e67430ccSMircea Trofin   return Ret;
481e67430ccSMircea Trofin }
482e67430ccSMircea Trofin 
483*bc3b3721SMircea Trofin MLEvictAdvisor::MLEvictAdvisor(MachineFunction &MF, const RAGreedy &RA,
484e67430ccSMircea Trofin                                MLModelRunner *Runner,
485e67430ccSMircea Trofin                                const MachineBlockFrequencyInfo &MBFI,
486e67430ccSMircea Trofin                                const MachineLoopInfo &Loops)
487e67430ccSMircea Trofin     : RegAllocEvictionAdvisor(MF, RA), DefaultAdvisor(MF, RA),
488e67430ccSMircea Trofin       Runner(std::move(Runner)), MBFI(MBFI), Loops(Loops),
489e67430ccSMircea Trofin       InitialQSize(MLEvictAdvisor::getInitialQueueSize(MF)) {
490e67430ccSMircea Trofin   assert(this->Runner);
491e67430ccSMircea Trofin   DoNotNormalize.set(FeatureIDs::mask);
492e67430ccSMircea Trofin   DoNotNormalize.set(FeatureIDs::is_free);
493e67430ccSMircea Trofin   DoNotNormalize.set(FeatureIDs::is_hint);
494e67430ccSMircea Trofin   DoNotNormalize.set(FeatureIDs::is_local);
495e67430ccSMircea Trofin   DoNotNormalize.set(FeatureIDs::min_stage);
496e67430ccSMircea Trofin   DoNotNormalize.set(FeatureIDs::max_stage);
497e67430ccSMircea Trofin   DoNotNormalize.set(FeatureIDs::progress);
498e67430ccSMircea Trofin }
499e67430ccSMircea Trofin 
500e67430ccSMircea Trofin int64_t MLEvictAdvisor::tryFindEvictionCandidatePosition(
501e67430ccSMircea Trofin     LiveInterval &, const AllocationOrder &, unsigned, uint8_t,
502e67430ccSMircea Trofin     const SmallVirtRegSet &) const {
503e67430ccSMircea Trofin   int64_t Ret = Runner->evaluate<int64_t>();
504e67430ccSMircea Trofin   assert(Ret >= 0);
505e67430ccSMircea Trofin   assert(Ret <= CandidateVirtRegPos);
506e67430ccSMircea Trofin   return Ret;
507e67430ccSMircea Trofin }
508e67430ccSMircea Trofin 
509e67430ccSMircea Trofin bool MLEvictAdvisor::loadInterferenceFeatures(
510e67430ccSMircea Trofin     LiveInterval &VirtReg, MCRegister PhysReg, bool IsHint,
511e67430ccSMircea Trofin     const SmallVirtRegSet &FixedRegisters, FeaturesListNormalizer &Largest,
512e67430ccSMircea Trofin     size_t Pos) const {
513e67430ccSMircea Trofin   // It is only possible to evict virtual register interference.
514e67430ccSMircea Trofin   if (Matrix->checkInterference(VirtReg, PhysReg) > LiveRegMatrix::IK_VirtReg) {
515e67430ccSMircea Trofin     // leave unavailable
516e67430ccSMircea Trofin     return false;
517e67430ccSMircea Trofin   }
518e67430ccSMircea Trofin 
519e67430ccSMircea Trofin   const bool IsLocal = LIS->intervalIsInOneMBB(VirtReg);
520e67430ccSMircea Trofin   int64_t LocalIntfs = 0;
521e67430ccSMircea Trofin   float NrUrgent = 0.0f;
522e67430ccSMircea Trofin 
523e67430ccSMircea Trofin   // The cascade tracking is the same as in the default advisor
524e67430ccSMircea Trofin   unsigned Cascade = RA.getExtraInfo().getCascadeOrCurrentNext(VirtReg.reg());
525e67430ccSMircea Trofin 
526e67430ccSMircea Trofin   SmallVector<LiveInterval *, MaxInterferences> InterferingIntervals;
527e67430ccSMircea Trofin   for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units) {
528e67430ccSMircea Trofin     LiveIntervalUnion::Query &Q = Matrix->query(VirtReg, *Units);
529e67430ccSMircea Trofin     // Different from the default heuristic, we don't make any assumptions about
530e67430ccSMircea Trofin     // what having more than 10 results in the query may mean.
531e67430ccSMircea Trofin     const auto &IFIntervals = Q.interferingVRegs();
532e67430ccSMircea Trofin     if (IFIntervals.empty() && InterferingIntervals.empty())
533e67430ccSMircea Trofin       continue;
534e67430ccSMircea Trofin     InterferingIntervals.append(IFIntervals.begin(), IFIntervals.end());
535e67430ccSMircea Trofin     for (LiveInterval *Intf : reverse(IFIntervals)) {
536e67430ccSMircea Trofin       assert(Register::isVirtualRegister(Intf->reg()) &&
537e67430ccSMircea Trofin              "Only expecting virtual register interference from query");
538e67430ccSMircea Trofin       // This is the same set of legality checks as in the default case: don't
539e67430ccSMircea Trofin       // try to evict fixed regs or 'done' ones. Also don't break cascades,
540e67430ccSMircea Trofin       // except in the urgent case, with the same nuances used in the default
541e67430ccSMircea Trofin       // heuristic.
542e67430ccSMircea Trofin       // We could try sharing this between the advisors, but it may end up
543e67430ccSMircea Trofin       // more complex than it is right now.
544e67430ccSMircea Trofin       if (FixedRegisters.count(Intf->reg()))
545e67430ccSMircea Trofin         return false;
546e67430ccSMircea Trofin       if (RA.getExtraInfo().getStage(*Intf) == RS_Done)
547e67430ccSMircea Trofin         return false;
548e67430ccSMircea Trofin       bool Urgent =
549e67430ccSMircea Trofin           !VirtReg.isSpillable() &&
550e67430ccSMircea Trofin           (Intf->isSpillable() ||
551e67430ccSMircea Trofin            RegClassInfo.getNumAllocatableRegs(MRI->getRegClass(VirtReg.reg())) <
552e67430ccSMircea Trofin                RegClassInfo.getNumAllocatableRegs(
553e67430ccSMircea Trofin                    MRI->getRegClass(Intf->reg())));
554e67430ccSMircea Trofin       // Only evict older cascades or live ranges without a cascade.
555e67430ccSMircea Trofin       unsigned IntfCascade = RA.getExtraInfo().getCascade(Intf->reg());
556e67430ccSMircea Trofin       if (Cascade <= IntfCascade) {
557e67430ccSMircea Trofin         if (!Urgent)
558e67430ccSMircea Trofin           return false;
559e67430ccSMircea Trofin         ++NrUrgent;
560e67430ccSMircea Trofin       }
561e67430ccSMircea Trofin 
562e67430ccSMircea Trofin       LocalIntfs += (IsLocal && LIS->intervalIsInOneMBB(*Intf) &&
563e67430ccSMircea Trofin                      (!EnableLocalReassign || !canReassign(*Intf, PhysReg)));
564e67430ccSMircea Trofin     }
565e67430ccSMircea Trofin   }
566e67430ccSMircea Trofin   // OK, so if we made it this far, this LR is an eviction candidate, load its
567e67430ccSMircea Trofin   // features.
568e67430ccSMircea Trofin   extractFeatures(InterferingIntervals, Largest, Pos, IsHint, LocalIntfs,
569e67430ccSMircea Trofin                   NrUrgent);
570e67430ccSMircea Trofin   return true;
571e67430ccSMircea Trofin }
572e67430ccSMircea Trofin 
573e67430ccSMircea Trofin MCRegister MLEvictAdvisor::tryFindEvictionCandidate(
574e67430ccSMircea Trofin     LiveInterval &VirtReg, const AllocationOrder &Order,
575e67430ccSMircea Trofin     uint8_t CostPerUseLimit, const SmallVirtRegSet &FixedRegisters) const {
576e67430ccSMircea Trofin   auto MaybeOrderLimit = getOrderLimit(VirtReg, Order, CostPerUseLimit);
577e67430ccSMircea Trofin   if (!MaybeOrderLimit)
578e67430ccSMircea Trofin     return MCRegister::NoRegister;
579e67430ccSMircea Trofin   unsigned OrderLimit = *MaybeOrderLimit;
580e67430ccSMircea Trofin 
581e67430ccSMircea Trofin   // The heuristic sets initial costs such as, if CostPerUseLimit is
582e67430ccSMircea Trofin   // max<uint8_t>, then any of the costs of the legally-evictable intervals
583e67430ccSMircea Trofin   // would be lower. When that happens, one of those will be selected.
584e67430ccSMircea Trofin   // Therefore, we allow the candidate be selected, unless the candidate is
585e67430ccSMircea Trofin   // unspillable, in which case it would be incorrect to not find a register for
586e67430ccSMircea Trofin   // it.
587e67430ccSMircea Trofin   const bool MustFindEviction =
588e67430ccSMircea Trofin       (!VirtReg.isSpillable() && CostPerUseLimit == static_cast<uint8_t>(~0u));
589e67430ccSMircea Trofin   // Number of available candidates - if 0, no need to continue.
590e67430ccSMircea Trofin   size_t Available = 0;
591e67430ccSMircea Trofin   // Make sure we don't have leftover partial state from an attempt where we had
592e67430ccSMircea Trofin   // no available candidates and bailed out early.
593e67430ccSMircea Trofin   resetInputs(*Runner);
594e67430ccSMircea Trofin 
595e67430ccSMircea Trofin   // Track the index->register mapping because AllocationOrder doesn't do that
596e67430ccSMircea Trofin   // and we'd have to scan it.
597e67430ccSMircea Trofin   // Also track their mask, to write asserts/debug.
598e67430ccSMircea Trofin   CandidateRegList Regs;
599e67430ccSMircea Trofin   Regs.fill({0, false});
600e67430ccSMircea Trofin 
601e67430ccSMircea Trofin   // Track the largest value of features seen during this eviction session. We
602e67430ccSMircea Trofin   // only normalize (some of) the float features, but it's just simpler to
603e67430ccSMircea Trofin   // dimension 'Largest' to all the features, especially since we have the
604e67430ccSMircea Trofin   // 'DoNotNormalize' list.
605e67430ccSMircea Trofin   FeaturesListNormalizer Largest;
606e67430ccSMircea Trofin   Largest.fill(0.0);
607e67430ccSMircea Trofin 
608e67430ccSMircea Trofin   // Same overal idea as in the default eviction policy - we visit the values of
609e67430ccSMircea Trofin   // AllocationOrder one at a time. If it's not legally available, we mask off
610e67430ccSMircea Trofin   // the corresponding feature column (==do nothing because we already reset all
611e67430ccSMircea Trofin   // the features to 0)
612e67430ccSMircea Trofin   // Use Pos to capture the column we load features at - in AllocationOrder
613e67430ccSMircea Trofin   // order.
614e67430ccSMircea Trofin   size_t Pos = 0;
615e67430ccSMircea Trofin   for (auto I = Order.begin(), E = Order.getOrderLimitEnd(OrderLimit); I != E;
616e67430ccSMircea Trofin        ++I, ++Pos) {
617e67430ccSMircea Trofin     MCRegister PhysReg = *I;
618a8a7bf92SMircea Trofin     assert(!Regs[Pos].second);
619e67430ccSMircea Trofin     assert(PhysReg);
620e67430ccSMircea Trofin     if (!canAllocatePhysReg(CostPerUseLimit, PhysReg)) {
621e67430ccSMircea Trofin       continue;
622e67430ccSMircea Trofin     }
623e67430ccSMircea Trofin     if (loadInterferenceFeatures(VirtReg, PhysReg, I.isHint(), FixedRegisters,
624e67430ccSMircea Trofin                                  Largest, Pos)) {
625e67430ccSMircea Trofin       ++Available;
626a8a7bf92SMircea Trofin       Regs[Pos] = std::make_pair(PhysReg, true);
627e67430ccSMircea Trofin     }
628e67430ccSMircea Trofin   }
629e67430ccSMircea Trofin   if (Available == 0) {
630e67430ccSMircea Trofin     // Nothing to decide, nothing to learn.
631e67430ccSMircea Trofin     assert(!MustFindEviction);
632e67430ccSMircea Trofin     return MCRegister::NoRegister;
633e67430ccSMircea Trofin   }
634a8a7bf92SMircea Trofin   const size_t ValidPosLimit = Pos;
635e67430ccSMircea Trofin   // If we must find eviction, the candidate should be masked out of the
636e67430ccSMircea Trofin   // decision making process.
637e67430ccSMircea Trofin   Regs[CandidateVirtRegPos].second = !MustFindEviction;
638e67430ccSMircea Trofin   if (!MustFindEviction)
639e67430ccSMircea Trofin     extractFeatures(SmallVector<LiveInterval *, 1>(1, &VirtReg), Largest,
640e67430ccSMircea Trofin                     CandidateVirtRegPos, /*IsHint*/ 0, /*LocalIntfsCount*/ 0,
641e67430ccSMircea Trofin                     /*NrUrgent*/ 0.0);
642e67430ccSMircea Trofin   assert(InitialQSize > 0.0 && "We couldn't have gotten here if we had "
643e67430ccSMircea Trofin                                "nothing to allocate initially.");
644e67430ccSMircea Trofin   // Normalize the features.
645e67430ccSMircea Trofin   for (auto &V : Largest)
646e67430ccSMircea Trofin     V = V ? V : 1.0;
647e67430ccSMircea Trofin   for (size_t FeatureIndex = 0; FeatureIndex < FeatureIDs::FeatureCount;
648e67430ccSMircea Trofin        ++FeatureIndex) {
649e67430ccSMircea Trofin     if (DoNotNormalize.test(FeatureIndex))
650e67430ccSMircea Trofin       continue;
651e67430ccSMircea Trofin     for (size_t Pos = 0; Pos < NumberOfInterferences; ++Pos) {
652e67430ccSMircea Trofin       Runner->getTensor<float>(FeatureIndex)[Pos] /= Largest[FeatureIndex];
653e67430ccSMircea Trofin     }
654e67430ccSMircea Trofin   }
655e67430ccSMircea Trofin   *Runner->getTensor<float>(FeatureIDs::progress) =
656e67430ccSMircea Trofin       static_cast<float>(RA.getQueueSize()) / InitialQSize;
657e67430ccSMircea Trofin 
658e67430ccSMircea Trofin   // Get a decision.
659e67430ccSMircea Trofin   size_t CandidatePos = tryFindEvictionCandidatePosition(
660e67430ccSMircea Trofin       VirtReg, Order, OrderLimit, CostPerUseLimit, FixedRegisters);
661e67430ccSMircea Trofin   // The contract with the ML side is that CandidatePos is mask == 1 (i.e.
662e67430ccSMircea Trofin   // Regs[CandidatePos].second)
663e67430ccSMircea Trofin   assert(Regs[CandidatePos].second);
664e67430ccSMircea Trofin   if (CandidatePos == CandidateVirtRegPos) {
665e67430ccSMircea Trofin     assert(!MustFindEviction);
666e67430ccSMircea Trofin     return MCRegister::NoRegister;
667e67430ccSMircea Trofin   }
668a8a7bf92SMircea Trofin   assert(CandidatePos < ValidPosLimit);
6690e691aedSFangrui Song   (void)ValidPosLimit;
670e67430ccSMircea Trofin   return Regs[CandidatePos].first;
671e67430ccSMircea Trofin }
672e67430ccSMircea Trofin 
673e67430ccSMircea Trofin // Overall, this currently mimics what we do for weight calculation, but instead
674e67430ccSMircea Trofin // of accummulating the various features, we keep them separate.
675e67430ccSMircea Trofin void MLEvictAdvisor::extractFeatures(
676e67430ccSMircea Trofin     const SmallVectorImpl<LiveInterval *> &Intervals,
677e67430ccSMircea Trofin     std::array<float, FeatureIDs::FeatureCount> &Largest, size_t Pos,
678e67430ccSMircea Trofin     int64_t IsHint, int64_t LocalIntfsCount, float NrUrgent) const {
679e67430ccSMircea Trofin   int64_t NrDefsAndUses = 0;
680e67430ccSMircea Trofin   int64_t NrBrokenHints = 0;
681e67430ccSMircea Trofin   float R = 0;
682e67430ccSMircea Trofin   float W = 0;
683e67430ccSMircea Trofin   float RW = 0;
684e67430ccSMircea Trofin   float IndVarUpdates = 0;
685e67430ccSMircea Trofin   float HintWeights = 0.0;
686e67430ccSMircea Trofin   float StartBBFreq = 0.0;
687e67430ccSMircea Trofin   float EndBBFreq = 0.0;
688e67430ccSMircea Trofin   float HottestBlockFreq = 0.0;
689e67430ccSMircea Trofin   int32_t NrRematerializable = 0;
690e67430ccSMircea Trofin   float TotalWeight = 0.0;
691e67430ccSMircea Trofin 
692e67430ccSMircea Trofin   SlotIndex EndSI = LIS->getSlotIndexes()->getZeroIndex();
693e67430ccSMircea Trofin   SlotIndex StartSI = LIS->getSlotIndexes()->getLastIndex();
694e67430ccSMircea Trofin   int64_t MaxStage = 0;
695e67430ccSMircea Trofin   int64_t MinStage =
696e67430ccSMircea Trofin       Intervals.empty() ? 0 : std::numeric_limits<int64_t>::max();
697e67430ccSMircea Trofin 
698e67430ccSMircea Trofin   for (const auto *L : Intervals) {
699e67430ccSMircea Trofin     const LiveInterval &LI = *L;
700e67430ccSMircea Trofin     MaxStage = std::max<int64_t>(
701e67430ccSMircea Trofin         MaxStage, static_cast<int64_t>(RA.getExtraInfo().getStage(LI)));
702e67430ccSMircea Trofin     MinStage = std::min<int64_t>(
703e67430ccSMircea Trofin         MinStage, static_cast<int64_t>(RA.getExtraInfo().getStage(LI)));
704e67430ccSMircea Trofin 
705e67430ccSMircea Trofin     TotalWeight = std::max(TotalWeight, LI.weight());
706e67430ccSMircea Trofin 
707e67430ccSMircea Trofin     if (LI.beginIndex() < StartSI)
708e67430ccSMircea Trofin       StartSI = LI.beginIndex();
709e67430ccSMircea Trofin 
710e67430ccSMircea Trofin     if (LI.endIndex() > EndSI)
711e67430ccSMircea Trofin       EndSI = LI.endIndex();
712e67430ccSMircea Trofin 
713e67430ccSMircea Trofin     SmallPtrSet<MachineInstr *, 8> Visited;
714e67430ccSMircea Trofin     const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
715e67430ccSMircea Trofin     NrBrokenHints += VRM->hasPreferredPhys(LI.reg());
716e67430ccSMircea Trofin 
717e67430ccSMircea Trofin     for (MachineRegisterInfo::reg_instr_nodbg_iterator
718e67430ccSMircea Trofin              I = MRI->reg_instr_nodbg_begin(LI.reg()),
719e67430ccSMircea Trofin              E = MRI->reg_instr_nodbg_end();
720e67430ccSMircea Trofin          I != E;) {
721e67430ccSMircea Trofin       MachineInstr *MI = &*(I++);
722e67430ccSMircea Trofin 
723e67430ccSMircea Trofin       ++NrDefsAndUses;
724e67430ccSMircea Trofin       if (!Visited.insert(MI).second)
725e67430ccSMircea Trofin         continue;
726e67430ccSMircea Trofin 
727e67430ccSMircea Trofin       if (MI->isIdentityCopy() || MI->isImplicitDef())
728e67430ccSMircea Trofin         continue;
729e67430ccSMircea Trofin 
730e67430ccSMircea Trofin       bool Reads, Writes;
731e67430ccSMircea Trofin       std::tie(Reads, Writes) = MI->readsWritesVirtualRegister(LI.reg());
732e67430ccSMircea Trofin 
733e67430ccSMircea Trofin       float Freq = MBFI.getBlockFreqRelativeToEntryBlock(MI->getParent());
734e67430ccSMircea Trofin       if (Freq > HottestBlockFreq)
735e67430ccSMircea Trofin         HottestBlockFreq = Freq;
736e67430ccSMircea Trofin       R += (Reads && !Writes) * Freq;
737e67430ccSMircea Trofin       W += (!Reads && Writes) * Freq;
738e67430ccSMircea Trofin       RW += (Reads && Writes) * Freq;
739e67430ccSMircea Trofin 
740e67430ccSMircea Trofin       auto *MBB = MI->getParent();
741e67430ccSMircea Trofin       auto *Loop = Loops.getLoopFor(MBB);
742e67430ccSMircea Trofin       bool IsExiting = Loop ? Loop->isLoopExiting(MBB) : false;
743e67430ccSMircea Trofin 
744e67430ccSMircea Trofin       if (Writes && IsExiting && LIS->isLiveOutOfMBB(LI, MBB))
745e67430ccSMircea Trofin         IndVarUpdates += Freq;
746e67430ccSMircea Trofin 
747e67430ccSMircea Trofin       if (MI->isCopy() && VirtRegAuxInfo::copyHint(MI, LI.reg(), TRI, *MRI))
748e67430ccSMircea Trofin         HintWeights += Freq;
749e67430ccSMircea Trofin     }
750e67430ccSMircea Trofin     NrRematerializable += VirtRegAuxInfo::isRematerializable(
751e67430ccSMircea Trofin         LI, *LIS, *VRM, *MF.getSubtarget().getInstrInfo());
752e67430ccSMircea Trofin   }
753e67430ccSMircea Trofin   size_t Size = 0;
754e67430ccSMircea Trofin   if (!Intervals.empty()) {
755e67430ccSMircea Trofin     StartBBFreq =
756e67430ccSMircea Trofin         MBFI.getBlockFreqRelativeToEntryBlock(LIS->getMBBFromIndex(StartSI));
757e67430ccSMircea Trofin     if (EndSI >= LIS->getSlotIndexes()->getLastIndex())
758e67430ccSMircea Trofin       EndSI = LIS->getSlotIndexes()->getLastIndex().getPrevIndex();
759e67430ccSMircea Trofin     EndBBFreq =
760e67430ccSMircea Trofin         MBFI.getBlockFreqRelativeToEntryBlock(LIS->getMBBFromIndex(EndSI));
761e67430ccSMircea Trofin     Size = StartSI.distance(EndSI);
762e67430ccSMircea Trofin   }
763e67430ccSMircea Trofin   // Set the features at the column 'Pos'.
764e67430ccSMircea Trofin #define SET(ID, TYPE, VAL)                                                     \
765e67430ccSMircea Trofin   do {                                                                         \
766e67430ccSMircea Trofin     Runner->getTensor<TYPE>(FeatureIDs::ID)[Pos] = static_cast<TYPE>(VAL);     \
767e67430ccSMircea Trofin     if (!DoNotNormalize.test(FeatureIDs::ID))                                  \
768e67430ccSMircea Trofin       Largest[FeatureIDs::ID] =                                                \
769e67430ccSMircea Trofin           std::max(Largest[FeatureIDs::ID], static_cast<float>(VAL));          \
770e67430ccSMircea Trofin   } while (false)
771e67430ccSMircea Trofin   SET(mask, int64_t, 1);
772e67430ccSMircea Trofin   SET(is_free, int64_t, Intervals.empty());
773e67430ccSMircea Trofin   SET(nr_urgent, float, NrUrgent);
774e67430ccSMircea Trofin   SET(nr_broken_hints, float, NrBrokenHints);
775e67430ccSMircea Trofin   SET(is_hint, int64_t, IsHint);
776e67430ccSMircea Trofin   SET(is_local, int64_t, LocalIntfsCount);
777e67430ccSMircea Trofin   SET(nr_rematerializable, float, NrRematerializable);
778e67430ccSMircea Trofin   SET(nr_defs_and_uses, float, NrDefsAndUses);
779e67430ccSMircea Trofin   SET(weighed_reads_by_max, float, R);
780e67430ccSMircea Trofin   SET(weighed_writes_by_max, float, W);
781e67430ccSMircea Trofin   SET(weighed_read_writes_by_max, float, RW);
782e67430ccSMircea Trofin   SET(weighed_indvars_by_max, float, IndVarUpdates);
783e67430ccSMircea Trofin   SET(hint_weights_by_max, float, HintWeights);
784e67430ccSMircea Trofin   SET(start_bb_freq_by_max, float, StartBBFreq);
785e67430ccSMircea Trofin   SET(end_bb_freq_by_max, float, EndBBFreq);
786e67430ccSMircea Trofin   SET(hottest_bb_freq_by_max, float, HottestBlockFreq);
787e67430ccSMircea Trofin   SET(liverange_size, float, Size);
788e67430ccSMircea Trofin   SET(use_def_density, float, TotalWeight);
789e67430ccSMircea Trofin   SET(max_stage, int64_t, MaxStage);
790e67430ccSMircea Trofin   SET(min_stage, int64_t, MinStage);
791e67430ccSMircea Trofin #undef SET
792e67430ccSMircea Trofin }
793e67430ccSMircea Trofin 
794e67430ccSMircea Trofin // Development mode-specific implementations
795e67430ccSMircea Trofin #ifdef LLVM_HAVE_TF_API
796e67430ccSMircea Trofin RegAllocEvictionAdvisorAnalysis *llvm::createDevelopmentModeAdvisor() {
797e67430ccSMircea Trofin   return new DevelopmentModeEvictionAdvisorAnalysis();
798e67430ccSMircea Trofin }
799e67430ccSMircea Trofin 
800e67430ccSMircea Trofin int64_t DevelopmentModeEvictAdvisor::tryFindEvictionCandidatePosition(
801e67430ccSMircea Trofin     LiveInterval &VirtReg, const AllocationOrder &Order, unsigned OrderLimit,
802e67430ccSMircea Trofin     uint8_t CostPerUseLimit, const SmallVirtRegSet &FixedRegisters) const {
803e67430ccSMircea Trofin   int64_t Ret = 0;
804e67430ccSMircea Trofin   if (isa<ModelUnderTrainingRunner>(getRunner())) {
805e67430ccSMircea Trofin     Ret = MLEvictAdvisor::tryFindEvictionCandidatePosition(
806e67430ccSMircea Trofin         VirtReg, Order, OrderLimit, CostPerUseLimit, FixedRegisters);
807e67430ccSMircea Trofin   } else {
808e67430ccSMircea Trofin     MCRegister PhysReg = getDefaultAdvisor().tryFindEvictionCandidate(
809e67430ccSMircea Trofin         VirtReg, Order, CostPerUseLimit, FixedRegisters);
810e67430ccSMircea Trofin     // Find the index of the selected PhysReg. We need it for logging, otherwise
811e67430ccSMircea Trofin     // this is wasted cycles (but so would starting development mode without a
812e67430ccSMircea Trofin     // model nor logging)
813e67430ccSMircea Trofin     if (!PhysReg)
814e67430ccSMircea Trofin       Ret = CandidateVirtRegPos;
815e67430ccSMircea Trofin     else
816e67430ccSMircea Trofin       for (auto I = Order.begin(), E = Order.getOrderLimitEnd(OrderLimit);
817e67430ccSMircea Trofin            I != E; ++I, ++Ret)
818e67430ccSMircea Trofin         if (*I == PhysReg)
819e67430ccSMircea Trofin           break;
820e67430ccSMircea Trofin   }
821e67430ccSMircea Trofin   if (TrainingLog.empty())
822e67430ccSMircea Trofin     return Ret;
823e67430ccSMircea Trofin   size_t CurrentFeature = 0;
824e67430ccSMircea Trofin   for (; CurrentFeature < FeatureIDs::FeatureCount; ++CurrentFeature) {
825e67430ccSMircea Trofin     Log->logSpecifiedTensorValue(
826e67430ccSMircea Trofin         CurrentFeature, reinterpret_cast<const char *>(
827e67430ccSMircea Trofin                             getRunner().getTensorUntyped(CurrentFeature)));
828e67430ccSMircea Trofin   }
829e67430ccSMircea Trofin   if (auto *MUTR = dyn_cast<ModelUnderTrainingRunner>(&getRunner()))
830e67430ccSMircea Trofin     for (size_t I = 1; I < MUTR->outputLoggedFeatureSpecs().size();
831e67430ccSMircea Trofin          ++I, ++CurrentFeature)
832e67430ccSMircea Trofin       Log->logSpecifiedTensorValue(
833e67430ccSMircea Trofin           CurrentFeature,
834e67430ccSMircea Trofin           reinterpret_cast<const char *>(
835e67430ccSMircea Trofin               MUTR->lastEvaluationResult()->getUntypedTensorValue(I)));
836e67430ccSMircea Trofin   // The output is right after the features and the extra outputs
837e67430ccSMircea Trofin   Log->logInt64Value(CurrentFeature, &Ret);
838e67430ccSMircea Trofin   return Ret;
839e67430ccSMircea Trofin }
840e67430ccSMircea Trofin 
841e67430ccSMircea Trofin bool RegAllocScoring::runOnMachineFunction(MachineFunction &MF) {
842e67430ccSMircea Trofin   if (auto *DevModeAnalysis = dyn_cast<DevelopmentModeEvictionAdvisorAnalysis>(
843e67430ccSMircea Trofin           &getAnalysis<RegAllocEvictionAdvisorAnalysis>()))
844e67430ccSMircea Trofin     if (auto *Log = DevModeAnalysis->getLogger(MF))
845e67430ccSMircea Trofin       Log->logFloatFinalReward(static_cast<float>(
846e67430ccSMircea Trofin           calculateRegAllocScore(
847e67430ccSMircea Trofin               MF, getAnalysis<MachineBlockFrequencyInfo>(),
848e67430ccSMircea Trofin               getAnalysis<AAResultsWrapperPass>().getAAResults())
849e67430ccSMircea Trofin               .getScore()));
850e67430ccSMircea Trofin 
851e67430ccSMircea Trofin   return false;
852e67430ccSMircea Trofin }
853e67430ccSMircea Trofin #endif // #ifdef LLVM_HAVE_TF_API
854e67430ccSMircea Trofin 
855b1af01feSMircea Trofin #if defined(LLVM_HAVE_TF_AOT_REGALLOCEVICTMODEL)
856e67430ccSMircea Trofin RegAllocEvictionAdvisorAnalysis *llvm::createReleaseModeAdvisor() {
857e67430ccSMircea Trofin   return new ReleaseModeEvictionAdvisorAnalysis();
858e67430ccSMircea Trofin }
859b1af01feSMircea Trofin #endif
860e67430ccSMircea Trofin 
861e67430ccSMircea Trofin // In all cases except development mode, we don't need scoring.
862e67430ccSMircea Trofin #if !defined(LLVM_HAVE_TF_API)
863e67430ccSMircea Trofin bool RegAllocScoring::runOnMachineFunction(MachineFunction &) { return false; }
864e67430ccSMircea Trofin #endif
865