168ac7b17SMircea Trofin //===- MLRegAllocEvictAdvisor.cpp - ML eviction advisor -------------------===//
268ac7b17SMircea Trofin //
368ac7b17SMircea Trofin // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
468ac7b17SMircea Trofin // See https://llvm.org/LICENSE.txt for license information.
568ac7b17SMircea Trofin // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
668ac7b17SMircea Trofin //
768ac7b17SMircea Trofin //===----------------------------------------------------------------------===//
868ac7b17SMircea Trofin //
968ac7b17SMircea Trofin // Implementation of the ML eviction advisor and reward injection pass
1068ac7b17SMircea Trofin //
1168ac7b17SMircea Trofin //===----------------------------------------------------------------------===//
1268ac7b17SMircea Trofin 
1368ac7b17SMircea Trofin #include "RegAllocEvictionAdvisor.h"
14e67430ccSMircea Trofin #include "RegAllocGreedy.h"
15e67430ccSMircea Trofin #include "RegAllocScore.h"
16e67430ccSMircea Trofin #include "llvm/Analysis/AliasAnalysis.h"
1768ac7b17SMircea Trofin #include "llvm/Analysis/MLModelRunner.h"
1868ac7b17SMircea Trofin #include "llvm/Analysis/ModelUnderTrainingRunner.h"
1968ac7b17SMircea Trofin #include "llvm/Analysis/NoInferenceModelRunner.h"
20e67430ccSMircea Trofin #include "llvm/Analysis/ReleaseModeModelRunner.h"
2168ac7b17SMircea Trofin #include "llvm/Analysis/Utils/TFUtils.h"
2268ac7b17SMircea Trofin #include "llvm/CodeGen/CalcSpillWeights.h"
23e67430ccSMircea Trofin #include "llvm/CodeGen/MachineBasicBlock.h"
2468ac7b17SMircea Trofin #include "llvm/CodeGen/MachineBlockFrequencyInfo.h"
2568ac7b17SMircea Trofin #include "llvm/CodeGen/MachineFunction.h"
2668ac7b17SMircea Trofin #include "llvm/CodeGen/MachineLoopInfo.h"
27e67430ccSMircea Trofin #include "llvm/CodeGen/MachineRegisterInfo.h"
28e67430ccSMircea Trofin #include "llvm/CodeGen/Passes.h"
2968ac7b17SMircea Trofin #include "llvm/CodeGen/RegisterClassInfo.h"
3068ac7b17SMircea Trofin #include "llvm/CodeGen/VirtRegMap.h"
313150bce0SMircea Trofin #include "llvm/Config/config.h"
3268ac7b17SMircea Trofin #include "llvm/InitializePasses.h"
3368ac7b17SMircea Trofin #include "llvm/Pass.h"
3468ac7b17SMircea Trofin #include "llvm/PassRegistry.h"
3568ac7b17SMircea Trofin #include "llvm/Support/CommandLine.h"
3668ac7b17SMircea Trofin #include "llvm/Support/ErrorHandling.h"
3768ac7b17SMircea Trofin #include "llvm/Target/TargetMachine.h"
3868ac7b17SMircea Trofin 
39e67430ccSMircea Trofin #include <array>
4068ac7b17SMircea Trofin #include <memory>
4168ac7b17SMircea Trofin 
4268ac7b17SMircea Trofin using namespace llvm;
4368ac7b17SMircea Trofin 
4468ac7b17SMircea Trofin #define DEBUG_TYPE "ml-regalloc"
45b1af01feSMircea Trofin 
46e67430ccSMircea Trofin // Generated header in release (AOT) mode
47b1af01feSMircea Trofin #if defined(LLVM_HAVE_TF_AOT_REGALLOCEVICTMODEL)
48e67430ccSMircea Trofin #include "RegallocEvictModel.h"
49e67430ccSMircea Trofin #endif
50e67430ccSMircea Trofin 
51e67430ccSMircea Trofin // Options that only make sense in development mode
52e67430ccSMircea Trofin #ifdef LLVM_HAVE_TF_API
53e67430ccSMircea Trofin static cl::opt<std::string> TrainingLog(
54e67430ccSMircea Trofin     "regalloc-training-log", cl::Hidden,
55e67430ccSMircea Trofin     cl::desc("Training log for the register allocator eviction model"));
56e67430ccSMircea Trofin 
57e67430ccSMircea Trofin static cl::opt<std::string> ModelUnderTraining(
58e67430ccSMircea Trofin     "regalloc-model", cl::Hidden,
59e67430ccSMircea Trofin     cl::desc("The model being trained for register allocation eviction"));
60e67430ccSMircea Trofin 
61e67430ccSMircea Trofin #endif // #ifdef LLVM_HAVE_TF_API
62e67430ccSMircea Trofin 
63660ff655SMircea Trofin extern cl::opt<unsigned> EvictInterferenceCutoff;
64660ff655SMircea Trofin 
65e67430ccSMircea Trofin /// The score injection pass.
66e67430ccSMircea Trofin /// This pass calculates the score for a function and inserts it in the log, but
67e67430ccSMircea Trofin /// this happens only in development mode. It's a no-op otherwise.
68e67430ccSMircea Trofin namespace llvm {
69e67430ccSMircea Trofin class RegAllocScoring : public MachineFunctionPass {
70e67430ccSMircea Trofin public:
71e67430ccSMircea Trofin   static char ID;
72e67430ccSMircea Trofin 
73e67430ccSMircea Trofin   RegAllocScoring() : MachineFunctionPass(ID) {
74e67430ccSMircea Trofin     initializeRegAllocScoringPass(*PassRegistry::getPassRegistry());
75e67430ccSMircea Trofin   }
76e67430ccSMircea Trofin 
77e67430ccSMircea Trofin   ~RegAllocScoring() override = default;
78e67430ccSMircea Trofin 
79e67430ccSMircea Trofin   StringRef getPassName() const override {
80e67430ccSMircea Trofin     return "Register Allocation Pass Scoring";
81e67430ccSMircea Trofin   }
82e67430ccSMircea Trofin 
83e67430ccSMircea Trofin   /// RegAllocReward analysis usage.
84e67430ccSMircea Trofin   void getAnalysisUsage(AnalysisUsage &AU) const override {
85e67430ccSMircea Trofin     AU.setPreservesAll();
86e67430ccSMircea Trofin     AU.addRequired<RegAllocEvictionAdvisorAnalysis>();
87e67430ccSMircea Trofin     AU.addRequired<MachineBlockFrequencyInfo>();
88e67430ccSMircea Trofin     AU.addRequired<AAResultsWrapperPass>();
89e67430ccSMircea Trofin     MachineFunctionPass::getAnalysisUsage(AU);
90e67430ccSMircea Trofin   }
91e67430ccSMircea Trofin 
92e67430ccSMircea Trofin   /// Performs this pass
93e67430ccSMircea Trofin   bool runOnMachineFunction(MachineFunction &) override;
94e67430ccSMircea Trofin };
95e67430ccSMircea Trofin 
96e67430ccSMircea Trofin char RegAllocScoring::ID = 0;
97073e0968SMircea Trofin FunctionPass *createRegAllocScoringPass() { return new RegAllocScoring(); }
98073e0968SMircea Trofin 
99073e0968SMircea Trofin } // namespace llvm
100e67430ccSMircea Trofin 
101e67430ccSMircea Trofin INITIALIZE_PASS(RegAllocScoring, "regallocscoringpass",
102e67430ccSMircea Trofin                 "Register Allocation Scoring Pass", false, false)
103e67430ccSMircea Trofin 
104e67430ccSMircea Trofin // ===================================
105e67430ccSMircea Trofin // Common ML Advisor declarations
106e67430ccSMircea Trofin // ===================================
10768ac7b17SMircea Trofin namespace {
10868ac7b17SMircea Trofin // This is the maximum number of interfererring ranges. That's the number of
10968ac7b17SMircea Trofin // distinct AllocationOrder values, which comes from MCRegisterClass::RegsSize.
11068ac7b17SMircea Trofin // For X86, that's 32.
11168ac7b17SMircea Trofin // TODO: find a way to get this, statically, in a programmatic way.
11268ac7b17SMircea Trofin static const int64_t MaxInterferences = 32;
11368ac7b17SMircea Trofin 
11468ac7b17SMircea Trofin // Logically, we can think of the feature set given to the evaluator as a 2D
11568ac7b17SMircea Trofin // matrix. The rows are the features (see next). The columns correspond to the
11668ac7b17SMircea Trofin // interferences. We treat the candidate virt reg as an 'interference', too, as
11768ac7b17SMircea Trofin // its feature set is the same as that of the interferring ranges. So we'll have
11868ac7b17SMircea Trofin // MaxInterferences + 1 columns and by convention, we will use the last column
11968ac7b17SMircea Trofin // for the virt reg seeking allocation.
12068ac7b17SMircea Trofin static const int64_t CandidateVirtRegPos = MaxInterferences;
12168ac7b17SMircea Trofin static const int64_t NumberOfInterferences = CandidateVirtRegPos + 1;
12268ac7b17SMircea Trofin 
12368ac7b17SMircea Trofin // Most features are as described above, so we'll reuse this vector in defining
12468ac7b17SMircea Trofin // them.
12568ac7b17SMircea Trofin static const std::vector<int64_t> PerLiveRangeShape{1, NumberOfInterferences};
12668ac7b17SMircea Trofin 
12768ac7b17SMircea Trofin // --------------
12868ac7b17SMircea Trofin // Features table
12968ac7b17SMircea Trofin // --------------
13068ac7b17SMircea Trofin // For each interfering live range (incl. the candidate) we collect a number of
13168ac7b17SMircea Trofin // features. However, because the features are of different types (and because
13268ac7b17SMircea Trofin // of ML best practices), we organize the tensors per feature, not per
13368ac7b17SMircea Trofin // candidate. Each such tensor has a scalar value corresponding to the
13468ac7b17SMircea Trofin // interferring live range at that position, in the order in AllocationOrder.
13568ac7b17SMircea Trofin // The last position corresponds to the virt reg seeking allocation.
13668ac7b17SMircea Trofin // Exception to all that is the progression feature, which is just a scalar (see
13768ac7b17SMircea Trofin // its documentation for details).
13868ac7b17SMircea Trofin // Note on naming: the "_by_max" are normalized using the largest value of that
13968ac7b17SMircea Trofin // tensor, as observed in the current decision making stage (i.e. for the
14068ac7b17SMircea Trofin // current call to the advisor's tryFindEvictionCandidate)
14168ac7b17SMircea Trofin //
14268ac7b17SMircea Trofin // The feature list format: type, name, shape, documentation.
14368ac7b17SMircea Trofin // Note: we can really just use int64 and float, hence the modeling of some
14468ac7b17SMircea Trofin // bools as int64 values.
14568ac7b17SMircea Trofin #define RA_EVICT_FEATURES_LIST(M)                                              \
14668ac7b17SMircea Trofin   M(int64_t, mask, PerLiveRangeShape,                                          \
14768ac7b17SMircea Trofin     "boolean values, 0 for unavailable candidates (i.e. if a position is 0, "  \
14868ac7b17SMircea Trofin     "it "                                                                      \
14968ac7b17SMircea Trofin     "can't be evicted)")                                                       \
15068ac7b17SMircea Trofin   M(int64_t, is_free, PerLiveRangeShape,                                       \
15168ac7b17SMircea Trofin     "boolean values, 1 if this phys reg is actually free (no interferences)")  \
15268ac7b17SMircea Trofin   M(float, nr_urgent, PerLiveRangeShape,                                       \
15368ac7b17SMircea Trofin     "number of 'urgent' intervals, normalized. Urgent are those that are OK "  \
15468ac7b17SMircea Trofin     "to break cascades")                                                       \
15568ac7b17SMircea Trofin   M(float, nr_broken_hints, PerLiveRangeShape,                                 \
15668ac7b17SMircea Trofin     "if this position were evicted, how many broken hints would there be")     \
15768ac7b17SMircea Trofin   M(int64_t, is_hint, PerLiveRangeShape,                                       \
15868ac7b17SMircea Trofin     "is this a preferred phys reg for the candidate")                          \
15968ac7b17SMircea Trofin   M(int64_t, is_local, PerLiveRangeShape,                                      \
16068ac7b17SMircea Trofin     "is this live range local to a basic block")                               \
16168ac7b17SMircea Trofin   M(float, nr_rematerializable, PerLiveRangeShape,                             \
16268ac7b17SMircea Trofin     "nr rematerializable ranges")                                              \
16368ac7b17SMircea Trofin   M(float, nr_defs_and_uses, PerLiveRangeShape,                                \
16468ac7b17SMircea Trofin     "bb freq - weighed nr defs and uses")                                      \
16568ac7b17SMircea Trofin   M(float, weighed_reads_by_max, PerLiveRangeShape,                            \
16668ac7b17SMircea Trofin     "bb freq - weighed nr of reads, normalized")                               \
16768ac7b17SMircea Trofin   M(float, weighed_writes_by_max, PerLiveRangeShape,                           \
16868ac7b17SMircea Trofin     "bb feq - weighed nr of writes, normalized")                               \
16968ac7b17SMircea Trofin   M(float, weighed_read_writes_by_max, PerLiveRangeShape,                      \
17068ac7b17SMircea Trofin     "bb freq - weighed nr of uses that are both read and writes, normalized")  \
17168ac7b17SMircea Trofin   M(float, weighed_indvars_by_max, PerLiveRangeShape,                          \
17268ac7b17SMircea Trofin     "bb freq - weighed nr of uses that are indvars, normalized")               \
17368ac7b17SMircea Trofin   M(float, hint_weights_by_max, PerLiveRangeShape,                             \
17468ac7b17SMircea Trofin     "bb freq - weighed nr of uses that are hints, normalized")                 \
17568ac7b17SMircea Trofin   M(float, start_bb_freq_by_max, PerLiveRangeShape,                            \
17668ac7b17SMircea Trofin     "the freq in the start block, normalized")                                 \
17768ac7b17SMircea Trofin   M(float, end_bb_freq_by_max, PerLiveRangeShape,                              \
17868ac7b17SMircea Trofin     "freq of end block, normalized")                                           \
17968ac7b17SMircea Trofin   M(float, hottest_bb_freq_by_max, PerLiveRangeShape,                          \
18068ac7b17SMircea Trofin     "hottest BB freq, normalized")                                             \
18168ac7b17SMircea Trofin   M(float, liverange_size, PerLiveRangeShape,                                  \
18268ac7b17SMircea Trofin     "size (instr index diff) of the LR")                                       \
18368ac7b17SMircea Trofin   M(float, use_def_density, PerLiveRangeShape,                                 \
18468ac7b17SMircea Trofin     "the max weight, as computed by the manual heuristic")                     \
18568ac7b17SMircea Trofin   M(int64_t, max_stage, PerLiveRangeShape,                                     \
18668ac7b17SMircea Trofin     "largest stage of an interval in this LR")                                 \
18768ac7b17SMircea Trofin   M(int64_t, min_stage, PerLiveRangeShape,                                     \
18868ac7b17SMircea Trofin     "lowest stage of an interval in this LR")                                  \
18968ac7b17SMircea Trofin   M(float, progress, {1}, "ratio of current queue size to initial size")
19068ac7b17SMircea Trofin 
19168ac7b17SMircea Trofin // The model learns to pick one of the mask == 1 interferences. This is the name
19268ac7b17SMircea Trofin // of the output tensor.
19368ac7b17SMircea Trofin // The contract with the model is that the output will be guaranteed to be to a
19468ac7b17SMircea Trofin // mask == 1 position.
195b1af01feSMircea Trofin // Using a macro here to avoid 'not used' warnings (and keep cond compilation to
196b1af01feSMircea Trofin // a minimum)
197b1af01feSMircea Trofin #define DecisionName "index_to_evict"
19868ac7b17SMircea Trofin 
19968ac7b17SMircea Trofin // Named features index.
20068ac7b17SMircea Trofin enum FeatureIDs {
20168ac7b17SMircea Trofin #define _FEATURE_IDX(_, name, __, ___) name,
20268ac7b17SMircea Trofin   RA_EVICT_FEATURES_LIST(_FEATURE_IDX)
20368ac7b17SMircea Trofin #undef _FEATURE_IDX
20468ac7b17SMircea Trofin       FeatureCount
20568ac7b17SMircea Trofin };
20668ac7b17SMircea Trofin 
20768ac7b17SMircea Trofin // The ML advisor will typically have a sparse input to the evaluator, because
20868ac7b17SMircea Trofin // various phys regs won't be available. It's easier (maintenance-wise) to
20968ac7b17SMircea Trofin // bulk-reset the state of the evaluator each time we are about to use it again.
21068ac7b17SMircea Trofin template <typename T> size_t getTotalSize(const std::vector<int64_t> &Shape) {
21168ac7b17SMircea Trofin   size_t Ret = sizeof(T);
21268ac7b17SMircea Trofin   for (const auto V : Shape)
21368ac7b17SMircea Trofin     Ret *= V;
21468ac7b17SMircea Trofin   return Ret;
21568ac7b17SMircea Trofin }
21668ac7b17SMircea Trofin 
21768ac7b17SMircea Trofin void resetInputs(MLModelRunner &Runner) {
21868ac7b17SMircea Trofin #define _RESET(TYPE, NAME, SHAPE, __)                                          \
21968ac7b17SMircea Trofin   std::memset(Runner.getTensorUntyped(FeatureIDs::NAME), 0,                    \
22068ac7b17SMircea Trofin               getTotalSize<TYPE>(SHAPE));
22168ac7b17SMircea Trofin   RA_EVICT_FEATURES_LIST(_RESET)
22268ac7b17SMircea Trofin #undef _RESET
22368ac7b17SMircea Trofin }
22468ac7b17SMircea Trofin 
2259aa2c914SMircea Trofin // Per-live interval components that get aggregated into the feature values that
2269aa2c914SMircea Trofin // will be passed to the evaluator.
2279aa2c914SMircea Trofin struct LIFeatureComponents {
2289aa2c914SMircea Trofin   double R = 0;
2299aa2c914SMircea Trofin   double W = 0;
2309aa2c914SMircea Trofin   double RW = 0;
2319aa2c914SMircea Trofin   double IndVarUpdates = 0;
2329aa2c914SMircea Trofin   double HintWeights = 0.0;
2339aa2c914SMircea Trofin   int64_t NrDefsAndUses = 0;
2349aa2c914SMircea Trofin   float HottestBlockFreq = 0.0;
2359aa2c914SMircea Trofin   bool IsRemat = false;
2369aa2c914SMircea Trofin };
2379aa2c914SMircea Trofin 
238e67430ccSMircea Trofin using CandidateRegList =
239e67430ccSMircea Trofin     std::array<std::pair<MCRegister, bool>, NumberOfInterferences>;
240e67430ccSMircea Trofin using FeaturesListNormalizer = std::array<float, FeatureIDs::FeatureCount>;
241e67430ccSMircea Trofin 
242e67430ccSMircea Trofin /// The ML evictor (commonalities between release and development mode)
243e67430ccSMircea Trofin class MLEvictAdvisor : public RegAllocEvictionAdvisor {
244e67430ccSMircea Trofin public:
24579b98f0aSMircea Trofin   MLEvictAdvisor(const MachineFunction &MF, const RAGreedy &RA,
24679b98f0aSMircea Trofin                  MLModelRunner *Runner, const MachineBlockFrequencyInfo &MBFI,
247e67430ccSMircea Trofin                  const MachineLoopInfo &Loops);
248e67430ccSMircea Trofin 
249e67430ccSMircea Trofin protected:
250e67430ccSMircea Trofin   const RegAllocEvictionAdvisor &getDefaultAdvisor() const {
251e67430ccSMircea Trofin     return static_cast<const RegAllocEvictionAdvisor &>(DefaultAdvisor);
252e67430ccSMircea Trofin   }
253e67430ccSMircea Trofin 
254e67430ccSMircea Trofin   // The assumption is that if the Runner could not be constructed, we emit-ed
255e67430ccSMircea Trofin   // error, and we shouldn't be asking for it here.
256e67430ccSMircea Trofin   const MLModelRunner &getRunner() const { return *Runner; }
257e67430ccSMircea Trofin 
258e67430ccSMircea Trofin   /// This just calls Evaluate on the Runner, but in the development mode case,
259e67430ccSMircea Trofin   /// if we're just capturing the log of the default advisor, it needs to call
260e67430ccSMircea Trofin   /// the latter instead, so we need to pass all the necessary parameters for
261e67430ccSMircea Trofin   /// it. In the development case, it will also log.
262*592f52deSMircea Trofin   virtual int64_t
263*592f52deSMircea Trofin   tryFindEvictionCandidatePosition(const LiveInterval &VirtReg,
264*592f52deSMircea Trofin                                    const AllocationOrder &Order,
265*592f52deSMircea Trofin                                    unsigned OrderLimit, uint8_t CostPerUseLimit,
266*592f52deSMircea Trofin                                    const SmallVirtRegSet &FixedRegisters) const;
267e67430ccSMircea Trofin 
268e67430ccSMircea Trofin   /// Load the features of the given VirtReg (allocated or not) at column Pos,
269e67430ccSMircea Trofin   /// but if  that can't be evicted, return false instead.
270e67430ccSMircea Trofin   bool
271*592f52deSMircea Trofin   loadInterferenceFeatures(const LiveInterval &VirtReg, MCRegister PhysReg,
272e67430ccSMircea Trofin                            bool IsHint, const SmallVirtRegSet &FixedRegisters,
273e67430ccSMircea Trofin                            std::array<float, FeatureIDs::FeatureCount> &Largest,
274e67430ccSMircea Trofin                            size_t Pos) const;
275e67430ccSMircea Trofin 
276e67430ccSMircea Trofin private:
277e67430ccSMircea Trofin   static float getInitialQueueSize(const MachineFunction &MF);
278e67430ccSMircea Trofin 
279e67430ccSMircea Trofin   MCRegister tryFindEvictionCandidate(
280*592f52deSMircea Trofin       const LiveInterval &VirtReg, const AllocationOrder &Order,
281e67430ccSMircea Trofin       uint8_t CostPerUseLimit,
282e67430ccSMircea Trofin       const SmallVirtRegSet &FixedRegisters) const override;
283e67430ccSMircea Trofin 
284*592f52deSMircea Trofin   void extractFeatures(const SmallVectorImpl<const LiveInterval *> &Intervals,
285e67430ccSMircea Trofin                        std::array<float, FeatureIDs::FeatureCount> &Largest,
286e67430ccSMircea Trofin                        size_t Pos, int64_t IsHint, int64_t LocalIntfsCount,
287e67430ccSMircea Trofin                        float NrUrgent) const;
288e67430ccSMircea Trofin 
289e67430ccSMircea Trofin   // Point-in-time: we didn't learn this, so we always delegate to the default.
290e67430ccSMircea Trofin   bool canEvictHintInterference(
291*592f52deSMircea Trofin       const LiveInterval &VirtReg, MCRegister PhysReg,
292e67430ccSMircea Trofin       const SmallVirtRegSet &FixedRegisters) const override {
293e67430ccSMircea Trofin     return getDefaultAdvisor().canEvictHintInterference(VirtReg, PhysReg,
294e67430ccSMircea Trofin                                                         FixedRegisters);
295e67430ccSMircea Trofin   }
296e67430ccSMircea Trofin 
2979aa2c914SMircea Trofin   const LIFeatureComponents
2989aa2c914SMircea Trofin   getLIFeatureComponents(const LiveInterval &LI) const;
2999aa2c914SMircea Trofin 
300e67430ccSMircea Trofin   // Hold on to a default advisor for:
301e67430ccSMircea Trofin   // 1) the implementation of canEvictHintInterference, because we didn't learn
302e67430ccSMircea Trofin   // that nuance yet;
303e67430ccSMircea Trofin   // 2) for bootstrapping (logging) in the development mode case.
304e67430ccSMircea Trofin   const DefaultEvictionAdvisor DefaultAdvisor;
305e67430ccSMircea Trofin   MLModelRunner *const Runner;
306e67430ccSMircea Trofin   const MachineBlockFrequencyInfo &MBFI;
307e67430ccSMircea Trofin   const MachineLoopInfo &Loops;
308e67430ccSMircea Trofin 
309e67430ccSMircea Trofin   // Indices of those features we don't want to normalize.
310e67430ccSMircea Trofin   // This could be static and shared, but its initialization is non-trivial.
311e67430ccSMircea Trofin   std::bitset<FeatureIDs::FeatureCount> DoNotNormalize;
312e67430ccSMircea Trofin   const float InitialQSize;
313e67430ccSMircea Trofin };
314e67430ccSMircea Trofin 
315e67430ccSMircea Trofin // ===================================
316e67430ccSMircea Trofin // Release (AOT) - specifics
317e67430ccSMircea Trofin // ===================================
318b1af01feSMircea Trofin #if defined(LLVM_HAVE_TF_AOT_REGALLOCEVICTMODEL)
319e67430ccSMircea Trofin const std::array<std::string, FeatureIDs::FeatureCount> FeatureNames{
320e67430ccSMircea Trofin #define _GETNAME(_, NAME, __, ___) #NAME,
321e67430ccSMircea Trofin     RA_EVICT_FEATURES_LIST(_GETNAME)
322e67430ccSMircea Trofin #undef _GETNAME
323e67430ccSMircea Trofin };
324e67430ccSMircea Trofin class ReleaseModeEvictionAdvisorAnalysis final
325e67430ccSMircea Trofin     : public RegAllocEvictionAdvisorAnalysis {
326e67430ccSMircea Trofin public:
327e67430ccSMircea Trofin   ReleaseModeEvictionAdvisorAnalysis()
328e67430ccSMircea Trofin       : RegAllocEvictionAdvisorAnalysis(AdvisorMode::Release) {}
329e67430ccSMircea Trofin   // support for isa<> and dyn_cast.
330e67430ccSMircea Trofin   static bool classof(const RegAllocEvictionAdvisorAnalysis *R) {
331e67430ccSMircea Trofin     return R->getAdvisorMode() == AdvisorMode::Release;
332e67430ccSMircea Trofin   }
333e67430ccSMircea Trofin 
334e67430ccSMircea Trofin private:
335e67430ccSMircea Trofin   void getAnalysisUsage(AnalysisUsage &AU) const override {
336e67430ccSMircea Trofin     AU.addRequired<MachineBlockFrequencyInfo>();
337e67430ccSMircea Trofin     AU.addRequired<MachineLoopInfo>();
338e67430ccSMircea Trofin     RegAllocEvictionAdvisorAnalysis::getAnalysisUsage(AU);
339e67430ccSMircea Trofin   }
340e67430ccSMircea Trofin 
341e67430ccSMircea Trofin   std::unique_ptr<RegAllocEvictionAdvisor>
34279b98f0aSMircea Trofin   getAdvisor(const MachineFunction &MF, const RAGreedy &RA) override {
343e67430ccSMircea Trofin     if (!Runner)
344e67430ccSMircea Trofin       Runner = std::make_unique<ReleaseModeModelRunner<RegallocEvictModel>>(
345e67430ccSMircea Trofin           MF.getFunction().getContext(), FeatureNames, DecisionName);
346e67430ccSMircea Trofin     return std::make_unique<MLEvictAdvisor>(
347e67430ccSMircea Trofin         MF, RA, Runner.get(), getAnalysis<MachineBlockFrequencyInfo>(),
348e67430ccSMircea Trofin         getAnalysis<MachineLoopInfo>());
349e67430ccSMircea Trofin   }
350e67430ccSMircea Trofin   std::unique_ptr<ReleaseModeModelRunner<RegallocEvictModel>> Runner;
351e67430ccSMircea Trofin };
352b1af01feSMircea Trofin #endif
353e67430ccSMircea Trofin 
354e67430ccSMircea Trofin // ===================================
35568ac7b17SMircea Trofin // Development mode-specifics
356e67430ccSMircea Trofin // ===================================
357e67430ccSMircea Trofin //
358e67430ccSMircea Trofin // Features we log
35968ac7b17SMircea Trofin #ifdef LLVM_HAVE_TF_API
36068ac7b17SMircea Trofin #define _DECL_FEATURES(type, name, shape, _)                                   \
36168ac7b17SMircea Trofin   TensorSpec::createSpec<type>(#name, shape),
36268ac7b17SMircea Trofin 
36368ac7b17SMircea Trofin static const std::vector<TensorSpec> InputFeatures{
364e67430ccSMircea Trofin     {RA_EVICT_FEATURES_LIST(_DECL_FEATURES)},
365e67430ccSMircea Trofin };
36668ac7b17SMircea Trofin #undef _DECL_FEATURES
36768ac7b17SMircea Trofin static const TensorSpec Output =
36868ac7b17SMircea Trofin     TensorSpec::createSpec<int64_t>(DecisionName, {1});
369b2d2e931SMircea Trofin static const TensorSpec Reward = TensorSpec::createSpec<float>("reward", {1});
37068ac7b17SMircea Trofin 
371e67430ccSMircea Trofin // Features we bind on the model. The tensor names have a prefix, and we also
372e67430ccSMircea Trofin // need to include some tensors that are expected to be present by the training
373e67430ccSMircea Trofin // algo.
374e67430ccSMircea Trofin // TODO: can we just get rid of these?
375e67430ccSMircea Trofin #define _DECL_TRAIN_FEATURES(type, name, shape, _)                             \
376e67430ccSMircea Trofin   TensorSpec::createSpec<type>(std::string("action_") + #name, shape),
377e67430ccSMircea Trofin 
378e67430ccSMircea Trofin static const std::vector<TensorSpec> TrainingInputFeatures{
379e67430ccSMircea Trofin     {RA_EVICT_FEATURES_LIST(_DECL_TRAIN_FEATURES)
380e67430ccSMircea Trofin          TensorSpec::createSpec<float>("action_discount", {1}),
381e67430ccSMircea Trofin      TensorSpec::createSpec<int32_t>("action_step_type", {1}),
382e67430ccSMircea Trofin      TensorSpec::createSpec<float>("action_reward", {1})}};
383e67430ccSMircea Trofin #undef _DECL_TRAIN_FEATURES
384e67430ccSMircea Trofin 
385e67430ccSMircea Trofin class DevelopmentModeEvictAdvisor : public MLEvictAdvisor {
386e67430ccSMircea Trofin public:
38779b98f0aSMircea Trofin   DevelopmentModeEvictAdvisor(const MachineFunction &MF, const RAGreedy &RA,
388e67430ccSMircea Trofin                               MLModelRunner *Runner,
389e67430ccSMircea Trofin                               const MachineBlockFrequencyInfo &MBFI,
390e67430ccSMircea Trofin                               const MachineLoopInfo &Loops, Logger *Log)
391e67430ccSMircea Trofin       : MLEvictAdvisor(MF, RA, Runner, MBFI, Loops), Log(Log) {}
392e67430ccSMircea Trofin 
393e67430ccSMircea Trofin private:
394e67430ccSMircea Trofin   int64_t tryFindEvictionCandidatePosition(
395*592f52deSMircea Trofin       const LiveInterval &VirtReg, const AllocationOrder &Order,
396*592f52deSMircea Trofin       unsigned OrderLimit, uint8_t CostPerUseLimit,
397e67430ccSMircea Trofin       const SmallVirtRegSet &FixedRegisters) const override;
398e67430ccSMircea Trofin 
399e67430ccSMircea Trofin   Logger *const Log;
400e67430ccSMircea Trofin };
401e67430ccSMircea Trofin 
402e67430ccSMircea Trofin class DevelopmentModeEvictionAdvisorAnalysis final
403e67430ccSMircea Trofin     : public RegAllocEvictionAdvisorAnalysis {
404e67430ccSMircea Trofin public:
405e67430ccSMircea Trofin   DevelopmentModeEvictionAdvisorAnalysis()
406e67430ccSMircea Trofin       : RegAllocEvictionAdvisorAnalysis(AdvisorMode::Development) {}
407e67430ccSMircea Trofin   // support for isa<> and dyn_cast.
408e67430ccSMircea Trofin   static bool classof(const RegAllocEvictionAdvisorAnalysis *R) {
409e67430ccSMircea Trofin     return R->getAdvisorMode() == AdvisorMode::Development;
410e67430ccSMircea Trofin   }
411e67430ccSMircea Trofin 
412e67430ccSMircea Trofin   /// get the logger for the given function, or nullptr if we didn't collect
413e67430ccSMircea Trofin   /// one. This is used to inject the score by the RegAllocScoring pass.
414e67430ccSMircea Trofin   Logger *getLogger(const MachineFunction &MF) const {
415e67430ccSMircea Trofin     auto I = LogMap.find(MF.getName());
416e67430ccSMircea Trofin     if (I == LogMap.end())
417e67430ccSMircea Trofin       return nullptr;
418e67430ccSMircea Trofin     return I->second.get();
419e67430ccSMircea Trofin   }
420e67430ccSMircea Trofin 
421e67430ccSMircea Trofin private:
422e67430ccSMircea Trofin   void getAnalysisUsage(AnalysisUsage &AU) const override {
423e67430ccSMircea Trofin     AU.addRequired<MachineBlockFrequencyInfo>();
424e67430ccSMircea Trofin     AU.addRequired<MachineLoopInfo>();
425e67430ccSMircea Trofin     RegAllocEvictionAdvisorAnalysis::getAnalysisUsage(AU);
426e67430ccSMircea Trofin   }
427e67430ccSMircea Trofin 
428e67430ccSMircea Trofin   // Save all the logs (when requested).
429e67430ccSMircea Trofin   bool doFinalization(Module &M) override {
430e67430ccSMircea Trofin     if (TrainingLog.empty())
431e67430ccSMircea Trofin       return false;
432e67430ccSMircea Trofin     std::error_code EC;
433e67430ccSMircea Trofin     auto OS = std::make_unique<raw_fd_ostream>(TrainingLog, EC);
434e67430ccSMircea Trofin     if (EC) {
435e67430ccSMircea Trofin       M.getContext().emitError(EC.message() + ":" + TrainingLog);
436e67430ccSMircea Trofin       return false;
437e67430ccSMircea Trofin     }
438e67430ccSMircea Trofin     Logger::flushLogs(*OS, LogMap);
439e67430ccSMircea Trofin     return false;
440e67430ccSMircea Trofin   }
441e67430ccSMircea Trofin 
442e67430ccSMircea Trofin   std::unique_ptr<RegAllocEvictionAdvisor>
44379b98f0aSMircea Trofin   getAdvisor(const MachineFunction &MF, const RAGreedy &RA) override {
444e67430ccSMircea Trofin     LLVMContext &Ctx = MF.getFunction().getContext();
445e67430ccSMircea Trofin     if (ModelUnderTraining.empty() && TrainingLog.empty()) {
446e67430ccSMircea Trofin       Ctx.emitError("Regalloc development mode should be requested with at "
447e67430ccSMircea Trofin                     "least logging enabled and/or a training model");
448e67430ccSMircea Trofin       return nullptr;
449e67430ccSMircea Trofin     }
450e67430ccSMircea Trofin     if (!Runner) {
451e67430ccSMircea Trofin       if (ModelUnderTraining.empty())
452e67430ccSMircea Trofin         Runner = std::make_unique<NoInferenceModelRunner>(Ctx, InputFeatures);
453e67430ccSMircea Trofin       else
454e67430ccSMircea Trofin         Runner = ModelUnderTrainingRunner::createAndEnsureValid(
455e67430ccSMircea Trofin             Ctx, ModelUnderTraining, DecisionName, TrainingInputFeatures);
456e67430ccSMircea Trofin       if (!Runner) {
457e67430ccSMircea Trofin         Ctx.emitError("Regalloc: could not set up the model runner");
458e67430ccSMircea Trofin         return nullptr;
459e67430ccSMircea Trofin       }
460e67430ccSMircea Trofin     }
461e67430ccSMircea Trofin 
462e67430ccSMircea Trofin     Logger *Log = nullptr;
463e67430ccSMircea Trofin     if (!TrainingLog.empty()) {
464e67430ccSMircea Trofin       std::vector<LoggedFeatureSpec> LFS;
465e67430ccSMircea Trofin       for (const auto &FS : InputFeatures)
466e67430ccSMircea Trofin         LFS.push_back({FS, None});
467e67430ccSMircea Trofin       if (auto *MUTR = dyn_cast<ModelUnderTrainingRunner>(Runner.get()))
468e67430ccSMircea Trofin         if (MUTR->outputLoggedFeatureSpecs().size() > 1)
469e67430ccSMircea Trofin           append_range(LFS, drop_begin(MUTR->outputLoggedFeatureSpecs()));
470e67430ccSMircea Trofin       // We always log the output; in particular, if we're not evaluating, we
471e67430ccSMircea Trofin       // don't have an output spec json file. That's why we handle the
472e67430ccSMircea Trofin       // 'normal' output separately.
473e67430ccSMircea Trofin       LFS.push_back({Output, None});
474e67430ccSMircea Trofin       auto I = LogMap.insert(std::make_pair(
475e67430ccSMircea Trofin           MF.getFunction().getName(),
476e67430ccSMircea Trofin           std::make_unique<Logger>(LFS, Reward, /*IncludeReward*/ true)));
477e67430ccSMircea Trofin       assert(I.second);
478e67430ccSMircea Trofin       Log = I.first->second.get();
479e67430ccSMircea Trofin     }
480e67430ccSMircea Trofin     return std::make_unique<DevelopmentModeEvictAdvisor>(
481e67430ccSMircea Trofin         MF, RA, Runner.get(), getAnalysis<MachineBlockFrequencyInfo>(),
482e67430ccSMircea Trofin         getAnalysis<MachineLoopInfo>(), Log);
483e67430ccSMircea Trofin   }
484e67430ccSMircea Trofin 
485e67430ccSMircea Trofin   std::unique_ptr<MLModelRunner> Runner;
486e67430ccSMircea Trofin   StringMap<std::unique_ptr<Logger>> LogMap;
487e67430ccSMircea Trofin };
48868ac7b17SMircea Trofin #endif //#ifdef LLVM_HAVE_TF_API
48968ac7b17SMircea Trofin } // namespace
490e67430ccSMircea Trofin 
491e67430ccSMircea Trofin float MLEvictAdvisor::getInitialQueueSize(const MachineFunction &MF) {
492e67430ccSMircea Trofin   auto &MRI = MF.getRegInfo();
493e67430ccSMircea Trofin   float Ret = 0.0;
494e67430ccSMircea Trofin   for (unsigned I = 0, E = MRI.getNumVirtRegs(); I != E; ++I) {
495e67430ccSMircea Trofin     Register Reg = Register::index2VirtReg(I);
496e67430ccSMircea Trofin     if (MRI.reg_nodbg_empty(Reg))
497e67430ccSMircea Trofin       continue;
498e67430ccSMircea Trofin     ++Ret;
499e67430ccSMircea Trofin   }
500e67430ccSMircea Trofin   return Ret;
501e67430ccSMircea Trofin }
502e67430ccSMircea Trofin 
50379b98f0aSMircea Trofin MLEvictAdvisor::MLEvictAdvisor(const MachineFunction &MF, const RAGreedy &RA,
504e67430ccSMircea Trofin                                MLModelRunner *Runner,
505e67430ccSMircea Trofin                                const MachineBlockFrequencyInfo &MBFI,
506e67430ccSMircea Trofin                                const MachineLoopInfo &Loops)
507e67430ccSMircea Trofin     : RegAllocEvictionAdvisor(MF, RA), DefaultAdvisor(MF, RA),
508e67430ccSMircea Trofin       Runner(std::move(Runner)), MBFI(MBFI), Loops(Loops),
509e67430ccSMircea Trofin       InitialQSize(MLEvictAdvisor::getInitialQueueSize(MF)) {
510e67430ccSMircea Trofin   assert(this->Runner);
511e67430ccSMircea Trofin   DoNotNormalize.set(FeatureIDs::mask);
512e67430ccSMircea Trofin   DoNotNormalize.set(FeatureIDs::is_free);
513e67430ccSMircea Trofin   DoNotNormalize.set(FeatureIDs::is_hint);
514e67430ccSMircea Trofin   DoNotNormalize.set(FeatureIDs::is_local);
515e67430ccSMircea Trofin   DoNotNormalize.set(FeatureIDs::min_stage);
516e67430ccSMircea Trofin   DoNotNormalize.set(FeatureIDs::max_stage);
517e67430ccSMircea Trofin   DoNotNormalize.set(FeatureIDs::progress);
518e67430ccSMircea Trofin }
519e67430ccSMircea Trofin 
520e67430ccSMircea Trofin int64_t MLEvictAdvisor::tryFindEvictionCandidatePosition(
521*592f52deSMircea Trofin     const LiveInterval &, const AllocationOrder &, unsigned, uint8_t,
522e67430ccSMircea Trofin     const SmallVirtRegSet &) const {
523e67430ccSMircea Trofin   int64_t Ret = Runner->evaluate<int64_t>();
524e67430ccSMircea Trofin   assert(Ret >= 0);
525e67430ccSMircea Trofin   assert(Ret <= CandidateVirtRegPos);
526e67430ccSMircea Trofin   return Ret;
527e67430ccSMircea Trofin }
528e67430ccSMircea Trofin 
529e67430ccSMircea Trofin bool MLEvictAdvisor::loadInterferenceFeatures(
530*592f52deSMircea Trofin     const LiveInterval &VirtReg, MCRegister PhysReg, bool IsHint,
531e67430ccSMircea Trofin     const SmallVirtRegSet &FixedRegisters, FeaturesListNormalizer &Largest,
532e67430ccSMircea Trofin     size_t Pos) const {
533e67430ccSMircea Trofin   // It is only possible to evict virtual register interference.
534e67430ccSMircea Trofin   if (Matrix->checkInterference(VirtReg, PhysReg) > LiveRegMatrix::IK_VirtReg) {
535e67430ccSMircea Trofin     // leave unavailable
536e67430ccSMircea Trofin     return false;
537e67430ccSMircea Trofin   }
538e67430ccSMircea Trofin 
539e67430ccSMircea Trofin   const bool IsLocal = LIS->intervalIsInOneMBB(VirtReg);
540e67430ccSMircea Trofin   int64_t LocalIntfs = 0;
541e67430ccSMircea Trofin   float NrUrgent = 0.0f;
542e67430ccSMircea Trofin 
543e67430ccSMircea Trofin   // The cascade tracking is the same as in the default advisor
544e67430ccSMircea Trofin   unsigned Cascade = RA.getExtraInfo().getCascadeOrCurrentNext(VirtReg.reg());
545e67430ccSMircea Trofin 
546*592f52deSMircea Trofin   SmallVector<const LiveInterval *, MaxInterferences> InterferingIntervals;
547e67430ccSMircea Trofin   for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units) {
548e67430ccSMircea Trofin     LiveIntervalUnion::Query &Q = Matrix->query(VirtReg, *Units);
549e67430ccSMircea Trofin     // Different from the default heuristic, we don't make any assumptions about
550e67430ccSMircea Trofin     // what having more than 10 results in the query may mean.
551ed2deab5SMircea Trofin     const auto &IFIntervals = Q.interferingVRegs(EvictInterferenceCutoff);
552e67430ccSMircea Trofin     if (IFIntervals.empty() && InterferingIntervals.empty())
553e67430ccSMircea Trofin       continue;
554ed2deab5SMircea Trofin     if (IFIntervals.size() >= EvictInterferenceCutoff)
555ed2deab5SMircea Trofin       return false;
556e67430ccSMircea Trofin     InterferingIntervals.append(IFIntervals.begin(), IFIntervals.end());
557*592f52deSMircea Trofin     for (const LiveInterval *Intf : reverse(IFIntervals)) {
558e67430ccSMircea Trofin       assert(Register::isVirtualRegister(Intf->reg()) &&
559e67430ccSMircea Trofin              "Only expecting virtual register interference from query");
560e67430ccSMircea Trofin       // This is the same set of legality checks as in the default case: don't
561e67430ccSMircea Trofin       // try to evict fixed regs or 'done' ones. Also don't break cascades,
562e67430ccSMircea Trofin       // except in the urgent case, with the same nuances used in the default
563e67430ccSMircea Trofin       // heuristic.
564e67430ccSMircea Trofin       // We could try sharing this between the advisors, but it may end up
565e67430ccSMircea Trofin       // more complex than it is right now.
566e67430ccSMircea Trofin       if (FixedRegisters.count(Intf->reg()))
567e67430ccSMircea Trofin         return false;
568e67430ccSMircea Trofin       if (RA.getExtraInfo().getStage(*Intf) == RS_Done)
569e67430ccSMircea Trofin         return false;
570e67430ccSMircea Trofin       bool Urgent =
571e67430ccSMircea Trofin           !VirtReg.isSpillable() &&
572e67430ccSMircea Trofin           (Intf->isSpillable() ||
573e67430ccSMircea Trofin            RegClassInfo.getNumAllocatableRegs(MRI->getRegClass(VirtReg.reg())) <
574e67430ccSMircea Trofin                RegClassInfo.getNumAllocatableRegs(
575e67430ccSMircea Trofin                    MRI->getRegClass(Intf->reg())));
576e67430ccSMircea Trofin       // Only evict older cascades or live ranges without a cascade.
577e67430ccSMircea Trofin       unsigned IntfCascade = RA.getExtraInfo().getCascade(Intf->reg());
578e67430ccSMircea Trofin       if (Cascade <= IntfCascade) {
579e67430ccSMircea Trofin         if (!Urgent)
580e67430ccSMircea Trofin           return false;
581e67430ccSMircea Trofin         ++NrUrgent;
582e67430ccSMircea Trofin       }
583e67430ccSMircea Trofin 
584e67430ccSMircea Trofin       LocalIntfs += (IsLocal && LIS->intervalIsInOneMBB(*Intf) &&
585e67430ccSMircea Trofin                      (!EnableLocalReassign || !canReassign(*Intf, PhysReg)));
586e67430ccSMircea Trofin     }
587e67430ccSMircea Trofin   }
588e67430ccSMircea Trofin   // OK, so if we made it this far, this LR is an eviction candidate, load its
589e67430ccSMircea Trofin   // features.
590e67430ccSMircea Trofin   extractFeatures(InterferingIntervals, Largest, Pos, IsHint, LocalIntfs,
591e67430ccSMircea Trofin                   NrUrgent);
592e67430ccSMircea Trofin   return true;
593e67430ccSMircea Trofin }
594e67430ccSMircea Trofin 
595e67430ccSMircea Trofin MCRegister MLEvictAdvisor::tryFindEvictionCandidate(
596*592f52deSMircea Trofin     const LiveInterval &VirtReg, const AllocationOrder &Order,
597e67430ccSMircea Trofin     uint8_t CostPerUseLimit, const SmallVirtRegSet &FixedRegisters) const {
598e67430ccSMircea Trofin   auto MaybeOrderLimit = getOrderLimit(VirtReg, Order, CostPerUseLimit);
599e67430ccSMircea Trofin   if (!MaybeOrderLimit)
600e67430ccSMircea Trofin     return MCRegister::NoRegister;
601e67430ccSMircea Trofin   unsigned OrderLimit = *MaybeOrderLimit;
602e67430ccSMircea Trofin 
603e67430ccSMircea Trofin   // The heuristic sets initial costs such as, if CostPerUseLimit is
604e67430ccSMircea Trofin   // max<uint8_t>, then any of the costs of the legally-evictable intervals
605e67430ccSMircea Trofin   // would be lower. When that happens, one of those will be selected.
606e67430ccSMircea Trofin   // Therefore, we allow the candidate be selected, unless the candidate is
607e67430ccSMircea Trofin   // unspillable, in which case it would be incorrect to not find a register for
608e67430ccSMircea Trofin   // it.
609e67430ccSMircea Trofin   const bool MustFindEviction =
610e67430ccSMircea Trofin       (!VirtReg.isSpillable() && CostPerUseLimit == static_cast<uint8_t>(~0u));
611e67430ccSMircea Trofin   // Number of available candidates - if 0, no need to continue.
612e67430ccSMircea Trofin   size_t Available = 0;
613e67430ccSMircea Trofin   // Make sure we don't have leftover partial state from an attempt where we had
614e67430ccSMircea Trofin   // no available candidates and bailed out early.
615e67430ccSMircea Trofin   resetInputs(*Runner);
616e67430ccSMircea Trofin 
617e67430ccSMircea Trofin   // Track the index->register mapping because AllocationOrder doesn't do that
618e67430ccSMircea Trofin   // and we'd have to scan it.
619e67430ccSMircea Trofin   // Also track their mask, to write asserts/debug.
620e67430ccSMircea Trofin   CandidateRegList Regs;
621e67430ccSMircea Trofin   Regs.fill({0, false});
622e67430ccSMircea Trofin 
623e67430ccSMircea Trofin   // Track the largest value of features seen during this eviction session. We
624e67430ccSMircea Trofin   // only normalize (some of) the float features, but it's just simpler to
625e67430ccSMircea Trofin   // dimension 'Largest' to all the features, especially since we have the
626e67430ccSMircea Trofin   // 'DoNotNormalize' list.
627e67430ccSMircea Trofin   FeaturesListNormalizer Largest;
628e67430ccSMircea Trofin   Largest.fill(0.0);
629e67430ccSMircea Trofin 
630e67430ccSMircea Trofin   // Same overal idea as in the default eviction policy - we visit the values of
631e67430ccSMircea Trofin   // AllocationOrder one at a time. If it's not legally available, we mask off
632e67430ccSMircea Trofin   // the corresponding feature column (==do nothing because we already reset all
633e67430ccSMircea Trofin   // the features to 0)
634e67430ccSMircea Trofin   // Use Pos to capture the column we load features at - in AllocationOrder
635e67430ccSMircea Trofin   // order.
636e67430ccSMircea Trofin   size_t Pos = 0;
637e67430ccSMircea Trofin   for (auto I = Order.begin(), E = Order.getOrderLimitEnd(OrderLimit); I != E;
638e67430ccSMircea Trofin        ++I, ++Pos) {
639e67430ccSMircea Trofin     MCRegister PhysReg = *I;
640a8a7bf92SMircea Trofin     assert(!Regs[Pos].second);
641e67430ccSMircea Trofin     assert(PhysReg);
642e67430ccSMircea Trofin     if (!canAllocatePhysReg(CostPerUseLimit, PhysReg)) {
643e67430ccSMircea Trofin       continue;
644e67430ccSMircea Trofin     }
645e67430ccSMircea Trofin     if (loadInterferenceFeatures(VirtReg, PhysReg, I.isHint(), FixedRegisters,
646e67430ccSMircea Trofin                                  Largest, Pos)) {
647e67430ccSMircea Trofin       ++Available;
648a8a7bf92SMircea Trofin       Regs[Pos] = std::make_pair(PhysReg, true);
649e67430ccSMircea Trofin     }
650e67430ccSMircea Trofin   }
651e67430ccSMircea Trofin   if (Available == 0) {
652e67430ccSMircea Trofin     // Nothing to decide, nothing to learn.
653e67430ccSMircea Trofin     assert(!MustFindEviction);
654e67430ccSMircea Trofin     return MCRegister::NoRegister;
655e67430ccSMircea Trofin   }
656a8a7bf92SMircea Trofin   const size_t ValidPosLimit = Pos;
657e67430ccSMircea Trofin   // If we must find eviction, the candidate should be masked out of the
658e67430ccSMircea Trofin   // decision making process.
659e67430ccSMircea Trofin   Regs[CandidateVirtRegPos].second = !MustFindEviction;
660e67430ccSMircea Trofin   if (!MustFindEviction)
661*592f52deSMircea Trofin     extractFeatures(SmallVector<const LiveInterval *, 1>(1, &VirtReg), Largest,
662e67430ccSMircea Trofin                     CandidateVirtRegPos, /*IsHint*/ 0, /*LocalIntfsCount*/ 0,
663e67430ccSMircea Trofin                     /*NrUrgent*/ 0.0);
664e67430ccSMircea Trofin   assert(InitialQSize > 0.0 && "We couldn't have gotten here if we had "
665e67430ccSMircea Trofin                                "nothing to allocate initially.");
666e67430ccSMircea Trofin   // Normalize the features.
667e67430ccSMircea Trofin   for (auto &V : Largest)
668e67430ccSMircea Trofin     V = V ? V : 1.0;
669e67430ccSMircea Trofin   for (size_t FeatureIndex = 0; FeatureIndex < FeatureIDs::FeatureCount;
670e67430ccSMircea Trofin        ++FeatureIndex) {
671e67430ccSMircea Trofin     if (DoNotNormalize.test(FeatureIndex))
672e67430ccSMircea Trofin       continue;
673e67430ccSMircea Trofin     for (size_t Pos = 0; Pos < NumberOfInterferences; ++Pos) {
674e67430ccSMircea Trofin       Runner->getTensor<float>(FeatureIndex)[Pos] /= Largest[FeatureIndex];
675e67430ccSMircea Trofin     }
676e67430ccSMircea Trofin   }
677e67430ccSMircea Trofin   *Runner->getTensor<float>(FeatureIDs::progress) =
678e67430ccSMircea Trofin       static_cast<float>(RA.getQueueSize()) / InitialQSize;
679e67430ccSMircea Trofin 
680e67430ccSMircea Trofin   // Get a decision.
681e67430ccSMircea Trofin   size_t CandidatePos = tryFindEvictionCandidatePosition(
682e67430ccSMircea Trofin       VirtReg, Order, OrderLimit, CostPerUseLimit, FixedRegisters);
683e67430ccSMircea Trofin   // The contract with the ML side is that CandidatePos is mask == 1 (i.e.
684e67430ccSMircea Trofin   // Regs[CandidatePos].second)
685e67430ccSMircea Trofin   assert(Regs[CandidatePos].second);
686e67430ccSMircea Trofin   if (CandidatePos == CandidateVirtRegPos) {
687e67430ccSMircea Trofin     assert(!MustFindEviction);
688e67430ccSMircea Trofin     return MCRegister::NoRegister;
689e67430ccSMircea Trofin   }
690a8a7bf92SMircea Trofin   assert(CandidatePos < ValidPosLimit);
6910e691aedSFangrui Song   (void)ValidPosLimit;
692e67430ccSMircea Trofin   return Regs[CandidatePos].first;
693e67430ccSMircea Trofin }
694e67430ccSMircea Trofin 
6959aa2c914SMircea Trofin const LIFeatureComponents
6969aa2c914SMircea Trofin MLEvictAdvisor::getLIFeatureComponents(const LiveInterval &LI) const {
6979aa2c914SMircea Trofin   LIFeatureComponents Ret;
6989aa2c914SMircea Trofin   SmallPtrSet<MachineInstr *, 8> Visited;
6999aa2c914SMircea Trofin   const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo();
7009aa2c914SMircea Trofin 
7019aa2c914SMircea Trofin   for (MachineRegisterInfo::reg_instr_nodbg_iterator
7029aa2c914SMircea Trofin            I = MRI->reg_instr_nodbg_begin(LI.reg()),
7039aa2c914SMircea Trofin            E = MRI->reg_instr_nodbg_end();
7049aa2c914SMircea Trofin        I != E;) {
7059aa2c914SMircea Trofin     MachineInstr *MI = &*(I++);
7069aa2c914SMircea Trofin 
7079aa2c914SMircea Trofin     ++Ret.NrDefsAndUses;
7089aa2c914SMircea Trofin     if (!Visited.insert(MI).second)
7099aa2c914SMircea Trofin       continue;
7109aa2c914SMircea Trofin 
7119aa2c914SMircea Trofin     if (MI->isIdentityCopy() || MI->isImplicitDef())
7129aa2c914SMircea Trofin       continue;
7139aa2c914SMircea Trofin 
7149aa2c914SMircea Trofin     bool Reads, Writes;
7159aa2c914SMircea Trofin     std::tie(Reads, Writes) = MI->readsWritesVirtualRegister(LI.reg());
7169aa2c914SMircea Trofin 
7179aa2c914SMircea Trofin     float Freq = MBFI.getBlockFreqRelativeToEntryBlock(MI->getParent());
7189aa2c914SMircea Trofin     Ret.HottestBlockFreq = std::max(Freq, Ret.HottestBlockFreq);
7199aa2c914SMircea Trofin 
7209aa2c914SMircea Trofin     Ret.R += (Reads && !Writes) * Freq;
7219aa2c914SMircea Trofin     Ret.W += (!Reads && Writes) * Freq;
7229aa2c914SMircea Trofin     Ret.RW += (Reads && Writes) * Freq;
7239aa2c914SMircea Trofin 
7249aa2c914SMircea Trofin     auto *MBB = MI->getParent();
7259aa2c914SMircea Trofin     auto *Loop = Loops.getLoopFor(MBB);
7269aa2c914SMircea Trofin     bool IsExiting = Loop ? Loop->isLoopExiting(MBB) : false;
7279aa2c914SMircea Trofin 
7289aa2c914SMircea Trofin     if (Writes && IsExiting && LIS->isLiveOutOfMBB(LI, MBB))
7299aa2c914SMircea Trofin       Ret.IndVarUpdates += Freq;
7309aa2c914SMircea Trofin 
7319aa2c914SMircea Trofin     if (MI->isCopy() && VirtRegAuxInfo::copyHint(MI, LI.reg(), TRI, *MRI))
7329aa2c914SMircea Trofin       Ret.HintWeights += Freq;
7339aa2c914SMircea Trofin   }
7349aa2c914SMircea Trofin   Ret.IsRemat = VirtRegAuxInfo::isRematerializable(
7359aa2c914SMircea Trofin       LI, *LIS, *VRM, *MF.getSubtarget().getInstrInfo());
7369aa2c914SMircea Trofin   return Ret;
7379aa2c914SMircea Trofin }
7389aa2c914SMircea Trofin 
739e67430ccSMircea Trofin // Overall, this currently mimics what we do for weight calculation, but instead
740e67430ccSMircea Trofin // of accummulating the various features, we keep them separate.
741e67430ccSMircea Trofin void MLEvictAdvisor::extractFeatures(
742*592f52deSMircea Trofin     const SmallVectorImpl<const LiveInterval *> &Intervals,
743e67430ccSMircea Trofin     std::array<float, FeatureIDs::FeatureCount> &Largest, size_t Pos,
744e67430ccSMircea Trofin     int64_t IsHint, int64_t LocalIntfsCount, float NrUrgent) const {
745e67430ccSMircea Trofin   int64_t NrDefsAndUses = 0;
746e67430ccSMircea Trofin   int64_t NrBrokenHints = 0;
7479aa2c914SMircea Trofin   double R = 0.0;
7489aa2c914SMircea Trofin   double W = 0.0;
7499aa2c914SMircea Trofin   double RW = 0.0;
7509aa2c914SMircea Trofin   double IndVarUpdates = 0.0;
7519aa2c914SMircea Trofin   double HintWeights = 0.0;
752e67430ccSMircea Trofin   float StartBBFreq = 0.0;
753e67430ccSMircea Trofin   float EndBBFreq = 0.0;
754e67430ccSMircea Trofin   float HottestBlockFreq = 0.0;
755e67430ccSMircea Trofin   int32_t NrRematerializable = 0;
756e67430ccSMircea Trofin   float TotalWeight = 0.0;
757e67430ccSMircea Trofin 
758e67430ccSMircea Trofin   SlotIndex EndSI = LIS->getSlotIndexes()->getZeroIndex();
759e67430ccSMircea Trofin   SlotIndex StartSI = LIS->getSlotIndexes()->getLastIndex();
760e67430ccSMircea Trofin   int64_t MaxStage = 0;
761e67430ccSMircea Trofin   int64_t MinStage =
762e67430ccSMircea Trofin       Intervals.empty() ? 0 : std::numeric_limits<int64_t>::max();
763e67430ccSMircea Trofin 
764e67430ccSMircea Trofin   for (const auto *L : Intervals) {
765e67430ccSMircea Trofin     const LiveInterval &LI = *L;
766e67430ccSMircea Trofin     MaxStage = std::max<int64_t>(
767e67430ccSMircea Trofin         MaxStage, static_cast<int64_t>(RA.getExtraInfo().getStage(LI)));
768e67430ccSMircea Trofin     MinStage = std::min<int64_t>(
769e67430ccSMircea Trofin         MinStage, static_cast<int64_t>(RA.getExtraInfo().getStage(LI)));
770e67430ccSMircea Trofin 
771e67430ccSMircea Trofin     TotalWeight = std::max(TotalWeight, LI.weight());
772e67430ccSMircea Trofin 
773e67430ccSMircea Trofin     if (LI.beginIndex() < StartSI)
774e67430ccSMircea Trofin       StartSI = LI.beginIndex();
775e67430ccSMircea Trofin 
776e67430ccSMircea Trofin     if (LI.endIndex() > EndSI)
777e67430ccSMircea Trofin       EndSI = LI.endIndex();
7789aa2c914SMircea Trofin     const LIFeatureComponents LIFC = getLIFeatureComponents(LI);
779a3f14918SMircea Trofin     NrBrokenHints += VRM->hasPreferredPhys(LI.reg());
780e67430ccSMircea Trofin 
7819aa2c914SMircea Trofin     NrDefsAndUses += LIFC.NrDefsAndUses;
7829aa2c914SMircea Trofin     HottestBlockFreq = std::max(HottestBlockFreq, LIFC.HottestBlockFreq);
7839aa2c914SMircea Trofin     R += LIFC.R;
7849aa2c914SMircea Trofin     W += LIFC.W;
7859aa2c914SMircea Trofin     RW += LIFC.RW;
786e67430ccSMircea Trofin 
7879aa2c914SMircea Trofin     IndVarUpdates += LIFC.IndVarUpdates;
788e67430ccSMircea Trofin 
7899aa2c914SMircea Trofin     HintWeights += LIFC.HintWeights;
7909aa2c914SMircea Trofin     NrRematerializable += LIFC.IsRemat;
791e67430ccSMircea Trofin   }
792e67430ccSMircea Trofin   size_t Size = 0;
793e67430ccSMircea Trofin   if (!Intervals.empty()) {
794e67430ccSMircea Trofin     StartBBFreq =
795e67430ccSMircea Trofin         MBFI.getBlockFreqRelativeToEntryBlock(LIS->getMBBFromIndex(StartSI));
796e67430ccSMircea Trofin     if (EndSI >= LIS->getSlotIndexes()->getLastIndex())
797e67430ccSMircea Trofin       EndSI = LIS->getSlotIndexes()->getLastIndex().getPrevIndex();
798e67430ccSMircea Trofin     EndBBFreq =
799e67430ccSMircea Trofin         MBFI.getBlockFreqRelativeToEntryBlock(LIS->getMBBFromIndex(EndSI));
800e67430ccSMircea Trofin     Size = StartSI.distance(EndSI);
801e67430ccSMircea Trofin   }
802e67430ccSMircea Trofin   // Set the features at the column 'Pos'.
803e67430ccSMircea Trofin #define SET(ID, TYPE, VAL)                                                     \
804e67430ccSMircea Trofin   do {                                                                         \
805e67430ccSMircea Trofin     Runner->getTensor<TYPE>(FeatureIDs::ID)[Pos] = static_cast<TYPE>(VAL);     \
806e67430ccSMircea Trofin     if (!DoNotNormalize.test(FeatureIDs::ID))                                  \
807e67430ccSMircea Trofin       Largest[FeatureIDs::ID] =                                                \
808e67430ccSMircea Trofin           std::max(Largest[FeatureIDs::ID], static_cast<float>(VAL));          \
809e67430ccSMircea Trofin   } while (false)
810e67430ccSMircea Trofin   SET(mask, int64_t, 1);
811e67430ccSMircea Trofin   SET(is_free, int64_t, Intervals.empty());
812e67430ccSMircea Trofin   SET(nr_urgent, float, NrUrgent);
813e67430ccSMircea Trofin   SET(nr_broken_hints, float, NrBrokenHints);
814e67430ccSMircea Trofin   SET(is_hint, int64_t, IsHint);
815e67430ccSMircea Trofin   SET(is_local, int64_t, LocalIntfsCount);
816e67430ccSMircea Trofin   SET(nr_rematerializable, float, NrRematerializable);
817e67430ccSMircea Trofin   SET(nr_defs_and_uses, float, NrDefsAndUses);
818e67430ccSMircea Trofin   SET(weighed_reads_by_max, float, R);
819e67430ccSMircea Trofin   SET(weighed_writes_by_max, float, W);
820e67430ccSMircea Trofin   SET(weighed_read_writes_by_max, float, RW);
821e67430ccSMircea Trofin   SET(weighed_indvars_by_max, float, IndVarUpdates);
822e67430ccSMircea Trofin   SET(hint_weights_by_max, float, HintWeights);
823e67430ccSMircea Trofin   SET(start_bb_freq_by_max, float, StartBBFreq);
824e67430ccSMircea Trofin   SET(end_bb_freq_by_max, float, EndBBFreq);
825e67430ccSMircea Trofin   SET(hottest_bb_freq_by_max, float, HottestBlockFreq);
826e67430ccSMircea Trofin   SET(liverange_size, float, Size);
827e67430ccSMircea Trofin   SET(use_def_density, float, TotalWeight);
828e67430ccSMircea Trofin   SET(max_stage, int64_t, MaxStage);
829e67430ccSMircea Trofin   SET(min_stage, int64_t, MinStage);
830e67430ccSMircea Trofin #undef SET
831e67430ccSMircea Trofin }
832e67430ccSMircea Trofin 
833e67430ccSMircea Trofin // Development mode-specific implementations
834e67430ccSMircea Trofin #ifdef LLVM_HAVE_TF_API
835e67430ccSMircea Trofin RegAllocEvictionAdvisorAnalysis *llvm::createDevelopmentModeAdvisor() {
836e67430ccSMircea Trofin   return new DevelopmentModeEvictionAdvisorAnalysis();
837e67430ccSMircea Trofin }
838e67430ccSMircea Trofin 
839e67430ccSMircea Trofin int64_t DevelopmentModeEvictAdvisor::tryFindEvictionCandidatePosition(
840*592f52deSMircea Trofin     const LiveInterval &VirtReg, const AllocationOrder &Order,
841*592f52deSMircea Trofin     unsigned OrderLimit, uint8_t CostPerUseLimit,
842*592f52deSMircea Trofin     const SmallVirtRegSet &FixedRegisters) const {
843e67430ccSMircea Trofin   int64_t Ret = 0;
844e67430ccSMircea Trofin   if (isa<ModelUnderTrainingRunner>(getRunner())) {
845e67430ccSMircea Trofin     Ret = MLEvictAdvisor::tryFindEvictionCandidatePosition(
846e67430ccSMircea Trofin         VirtReg, Order, OrderLimit, CostPerUseLimit, FixedRegisters);
847e67430ccSMircea Trofin   } else {
848e67430ccSMircea Trofin     MCRegister PhysReg = getDefaultAdvisor().tryFindEvictionCandidate(
849e67430ccSMircea Trofin         VirtReg, Order, CostPerUseLimit, FixedRegisters);
850e67430ccSMircea Trofin     // Find the index of the selected PhysReg. We need it for logging, otherwise
851e67430ccSMircea Trofin     // this is wasted cycles (but so would starting development mode without a
852e67430ccSMircea Trofin     // model nor logging)
853e67430ccSMircea Trofin     if (!PhysReg)
854e67430ccSMircea Trofin       Ret = CandidateVirtRegPos;
855e67430ccSMircea Trofin     else
856e67430ccSMircea Trofin       for (auto I = Order.begin(), E = Order.getOrderLimitEnd(OrderLimit);
857e67430ccSMircea Trofin            I != E; ++I, ++Ret)
858e67430ccSMircea Trofin         if (*I == PhysReg)
859e67430ccSMircea Trofin           break;
860e67430ccSMircea Trofin   }
861e67430ccSMircea Trofin   if (TrainingLog.empty())
862e67430ccSMircea Trofin     return Ret;
863e67430ccSMircea Trofin   size_t CurrentFeature = 0;
864e67430ccSMircea Trofin   for (; CurrentFeature < FeatureIDs::FeatureCount; ++CurrentFeature) {
865e67430ccSMircea Trofin     Log->logSpecifiedTensorValue(
866e67430ccSMircea Trofin         CurrentFeature, reinterpret_cast<const char *>(
867e67430ccSMircea Trofin                             getRunner().getTensorUntyped(CurrentFeature)));
868e67430ccSMircea Trofin   }
869e67430ccSMircea Trofin   if (auto *MUTR = dyn_cast<ModelUnderTrainingRunner>(&getRunner()))
870e67430ccSMircea Trofin     for (size_t I = 1; I < MUTR->outputLoggedFeatureSpecs().size();
871e67430ccSMircea Trofin          ++I, ++CurrentFeature)
872e67430ccSMircea Trofin       Log->logSpecifiedTensorValue(
873e67430ccSMircea Trofin           CurrentFeature,
874e67430ccSMircea Trofin           reinterpret_cast<const char *>(
875e67430ccSMircea Trofin               MUTR->lastEvaluationResult()->getUntypedTensorValue(I)));
876e67430ccSMircea Trofin   // The output is right after the features and the extra outputs
877e67430ccSMircea Trofin   Log->logInt64Value(CurrentFeature, &Ret);
878e67430ccSMircea Trofin   return Ret;
879e67430ccSMircea Trofin }
880e67430ccSMircea Trofin 
881e67430ccSMircea Trofin bool RegAllocScoring::runOnMachineFunction(MachineFunction &MF) {
882e67430ccSMircea Trofin   if (auto *DevModeAnalysis = dyn_cast<DevelopmentModeEvictionAdvisorAnalysis>(
883e67430ccSMircea Trofin           &getAnalysis<RegAllocEvictionAdvisorAnalysis>()))
884e67430ccSMircea Trofin     if (auto *Log = DevModeAnalysis->getLogger(MF))
885e67430ccSMircea Trofin       Log->logFloatFinalReward(static_cast<float>(
886e67430ccSMircea Trofin           calculateRegAllocScore(
887e67430ccSMircea Trofin               MF, getAnalysis<MachineBlockFrequencyInfo>(),
888e67430ccSMircea Trofin               getAnalysis<AAResultsWrapperPass>().getAAResults())
889e67430ccSMircea Trofin               .getScore()));
890e67430ccSMircea Trofin 
891e67430ccSMircea Trofin   return false;
892e67430ccSMircea Trofin }
893e67430ccSMircea Trofin #endif // #ifdef LLVM_HAVE_TF_API
894e67430ccSMircea Trofin 
895b1af01feSMircea Trofin #if defined(LLVM_HAVE_TF_AOT_REGALLOCEVICTMODEL)
896e67430ccSMircea Trofin RegAllocEvictionAdvisorAnalysis *llvm::createReleaseModeAdvisor() {
897e67430ccSMircea Trofin   return new ReleaseModeEvictionAdvisorAnalysis();
898e67430ccSMircea Trofin }
899b1af01feSMircea Trofin #endif
900e67430ccSMircea Trofin 
901e67430ccSMircea Trofin // In all cases except development mode, we don't need scoring.
902e67430ccSMircea Trofin #if !defined(LLVM_HAVE_TF_API)
903e67430ccSMircea Trofin bool RegAllocScoring::runOnMachineFunction(MachineFunction &) { return false; }
904e67430ccSMircea Trofin #endif
905