1 //===-- lib/CodeGen/GlobalISel/CallLowering.cpp - Call lowering -----------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 ///
10 /// \file
11 /// This file implements some simple delegations needed for call lowering.
12 ///
13 //===----------------------------------------------------------------------===//
14 
15 #include "llvm/CodeGen/GlobalISel/CallLowering.h"
16 #include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
17 #include "llvm/CodeGen/MachineOperand.h"
18 #include "llvm/CodeGen/MachineRegisterInfo.h"
19 #include "llvm/IR/DataLayout.h"
20 #include "llvm/IR/Instructions.h"
21 #include "llvm/IR/Module.h"
22 #include "llvm/Target/TargetLowering.h"
23 
24 using namespace llvm;
25 
26 bool CallLowering::lowerCall(
27     MachineIRBuilder &MIRBuilder, const CallInst &CI, unsigned ResReg,
28     ArrayRef<unsigned> ArgRegs, std::function<unsigned()> GetCalleeReg) const {
29   auto &DL = CI.getParent()->getParent()->getParent()->getDataLayout();
30 
31   // First step is to marshall all the function's parameters into the correct
32   // physregs and memory locations. Gather the sequence of argument types that
33   // we'll pass to the assigner function.
34   SmallVector<ArgInfo, 8> OrigArgs;
35   unsigned i = 0;
36   for (auto &Arg : CI.arg_operands()) {
37     ArgInfo OrigArg{ArgRegs[i], Arg->getType(), ISD::ArgFlagsTy{}};
38     setArgFlags(OrigArg, i + 1, DL, CI);
39     OrigArgs.push_back(OrigArg);
40     ++i;
41   }
42 
43   MachineOperand Callee = MachineOperand::CreateImm(0);
44   if (Function *F = CI.getCalledFunction())
45     Callee = MachineOperand::CreateGA(F, 0);
46   else
47     Callee = MachineOperand::CreateReg(GetCalleeReg(), false);
48 
49   ArgInfo OrigRet{ResReg, CI.getType(), ISD::ArgFlagsTy{}};
50   if (!OrigRet.Ty->isVoidTy())
51     setArgFlags(OrigRet, AttributeSet::ReturnIndex, DL, CI);
52 
53   return lowerCall(MIRBuilder, Callee, OrigRet, OrigArgs);
54 }
55 
56 template <typename FuncInfoTy>
57 void CallLowering::setArgFlags(CallLowering::ArgInfo &Arg, unsigned OpIdx,
58                                const DataLayout &DL,
59                                const FuncInfoTy &FuncInfo) const {
60   const AttributeSet &Attrs = FuncInfo.getAttributes();
61   if (Attrs.hasAttribute(OpIdx, Attribute::ZExt))
62     Arg.Flags.setZExt();
63   if (Attrs.hasAttribute(OpIdx, Attribute::SExt))
64     Arg.Flags.setSExt();
65   if (Attrs.hasAttribute(OpIdx, Attribute::InReg))
66     Arg.Flags.setInReg();
67   if (Attrs.hasAttribute(OpIdx, Attribute::StructRet))
68     Arg.Flags.setSRet();
69   if (Attrs.hasAttribute(OpIdx, Attribute::SwiftSelf))
70     Arg.Flags.setSwiftSelf();
71   if (Attrs.hasAttribute(OpIdx, Attribute::SwiftError))
72     Arg.Flags.setSwiftError();
73   if (Attrs.hasAttribute(OpIdx, Attribute::ByVal))
74     Arg.Flags.setByVal();
75   if (Attrs.hasAttribute(OpIdx, Attribute::InAlloca))
76     Arg.Flags.setInAlloca();
77 
78   if (Arg.Flags.isByVal() || Arg.Flags.isInAlloca()) {
79     Type *ElementTy = cast<PointerType>(Arg.Ty)->getElementType();
80     Arg.Flags.setByValSize(DL.getTypeAllocSize(ElementTy));
81     // For ByVal, alignment should be passed from FE.  BE will guess if
82     // this info is not there but there are cases it cannot get right.
83     unsigned FrameAlign;
84     if (FuncInfo.getParamAlignment(OpIdx))
85       FrameAlign = FuncInfo.getParamAlignment(OpIdx);
86     else
87       FrameAlign = getTLI()->getByValTypeAlignment(ElementTy, DL);
88     Arg.Flags.setByValAlign(FrameAlign);
89   }
90   if (Attrs.hasAttribute(OpIdx, Attribute::Nest))
91     Arg.Flags.setNest();
92   Arg.Flags.setOrigAlign(DL.getABITypeAlignment(Arg.Ty));
93 }
94 
95 template void
96 CallLowering::setArgFlags<Function>(CallLowering::ArgInfo &Arg, unsigned OpIdx,
97                                     const DataLayout &DL,
98                                     const Function &FuncInfo) const;
99 
100 template void
101 CallLowering::setArgFlags<CallInst>(CallLowering::ArgInfo &Arg, unsigned OpIdx,
102                                     const DataLayout &DL,
103                                     const CallInst &FuncInfo) const;
104 
105 bool CallLowering::handleAssignments(MachineIRBuilder &MIRBuilder,
106                                      CCAssignFn *AssignFn,
107                                      ArrayRef<ArgInfo> Args,
108                                      ValueHandler &Handler) const {
109   MachineFunction &MF = MIRBuilder.getMF();
110   const Function &F = *MF.getFunction();
111   const DataLayout &DL = F.getParent()->getDataLayout();
112 
113   SmallVector<CCValAssign, 16> ArgLocs;
114   CCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, F.getContext());
115 
116   unsigned NumArgs = Args.size();
117   for (unsigned i = 0; i != NumArgs; ++i) {
118     MVT CurVT = MVT::getVT(Args[i].Ty);
119     if (AssignFn(i, CurVT, CurVT, CCValAssign::Full, Args[i].Flags, CCInfo))
120       return false;
121   }
122 
123   for (unsigned i = 0, e = Args.size(); i != e; ++i) {
124     CCValAssign &VA = ArgLocs[i];
125 
126     if (VA.isRegLoc())
127       Handler.assignValueToReg(Args[i].Reg, VA.getLocReg(), VA);
128     else if (VA.isMemLoc()) {
129       unsigned Size = VA.getValVT() == MVT::iPTR
130                           ? DL.getPointerSize()
131                           : alignTo(VA.getValVT().getSizeInBits(), 8) / 8;
132       unsigned Offset = VA.getLocMemOffset();
133       MachinePointerInfo MPO;
134       unsigned StackAddr = Handler.getStackAddress(Size, Offset, MPO);
135       Handler.assignValueToAddress(Args[i].Reg, StackAddr, Size, MPO, VA);
136     } else {
137       // FIXME: Support byvals and other weirdness
138       return false;
139     }
140   }
141   return true;
142 }
143 
144 unsigned CallLowering::ValueHandler::extendRegister(unsigned ValReg,
145                                                     CCValAssign &VA) {
146   LLT LocTy{VA.getLocVT()};
147   switch (VA.getLocInfo()) {
148   default: break;
149   case CCValAssign::Full:
150   case CCValAssign::BCvt:
151     // FIXME: bitconverting between vector types may or may not be a
152     // nop in big-endian situations.
153     return ValReg;
154   case CCValAssign::AExt:
155     assert(!VA.getLocVT().isVector() && "unexpected vector extend");
156     // Otherwise, it's a nop.
157     return ValReg;
158   case CCValAssign::SExt: {
159     unsigned NewReg = MRI.createGenericVirtualRegister(LocTy);
160     MIRBuilder.buildSExt(NewReg, ValReg);
161     return NewReg;
162   }
163   case CCValAssign::ZExt: {
164     unsigned NewReg = MRI.createGenericVirtualRegister(LocTy);
165     MIRBuilder.buildZExt(NewReg, ValReg);
166     return NewReg;
167   }
168   }
169   llvm_unreachable("unable to extend register");
170 }
171