1 //===- Loads.cpp - Local load analysis ------------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file defines simple local analyses for load instructions.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "llvm/Analysis/Loads.h"
14 #include "llvm/Analysis/AliasAnalysis.h"
15 #include "llvm/Analysis/AssumeBundleQueries.h"
16 #include "llvm/Analysis/CaptureTracking.h"
17 #include "llvm/Analysis/LoopInfo.h"
18 #include "llvm/Analysis/MemoryBuiltins.h"
19 #include "llvm/Analysis/MemoryLocation.h"
20 #include "llvm/Analysis/ScalarEvolution.h"
21 #include "llvm/Analysis/ScalarEvolutionExpressions.h"
22 #include "llvm/Analysis/TargetLibraryInfo.h"
23 #include "llvm/Analysis/ValueTracking.h"
24 #include "llvm/IR/DataLayout.h"
25 #include "llvm/IR/GlobalAlias.h"
26 #include "llvm/IR/GlobalVariable.h"
27 #include "llvm/IR/IntrinsicInst.h"
28 #include "llvm/IR/LLVMContext.h"
29 #include "llvm/IR/Module.h"
30 #include "llvm/IR/Operator.h"
31 #include "llvm/IR/Statepoint.h"
32 
33 using namespace llvm;
34 
35 static bool isAligned(const Value *Base, const APInt &Offset, Align Alignment,
36                       const DataLayout &DL) {
37   Align BA = Base->getPointerAlignment(DL);
38   const APInt APAlign(Offset.getBitWidth(), Alignment.value());
39   assert(APAlign.isPowerOf2() && "must be a power of 2!");
40   return BA >= Alignment && !(Offset & (APAlign - 1));
41 }
42 
43 /// Test if V is always a pointer to allocated and suitably aligned memory for
44 /// a simple load or store.
45 static bool isDereferenceableAndAlignedPointer(
46     const Value *V, Align Alignment, const APInt &Size, const DataLayout &DL,
47     const Instruction *CtxI, const DominatorTree *DT,
48     const TargetLibraryInfo *TLI, SmallPtrSetImpl<const Value *> &Visited,
49     unsigned MaxDepth) {
50   assert(V->getType()->isPointerTy() && "Base must be pointer");
51 
52   // Recursion limit.
53   if (MaxDepth-- == 0)
54     return false;
55 
56   // Already visited?  Bail out, we've likely hit unreachable code.
57   if (!Visited.insert(V).second)
58     return false;
59 
60   // Note that it is not safe to speculate into a malloc'd region because
61   // malloc may return null.
62 
63   // bitcast instructions are no-ops as far as dereferenceability is concerned.
64   if (const BitCastOperator *BC = dyn_cast<BitCastOperator>(V)) {
65     if (BC->getSrcTy()->isPointerTy())
66       return isDereferenceableAndAlignedPointer(
67           BC->getOperand(0), Alignment, Size, DL, CtxI, DT, TLI,
68           Visited, MaxDepth);
69   }
70 
71   bool CheckForNonNull, CheckForFreed;
72   APInt KnownDerefBytes(Size.getBitWidth(),
73                         V->getPointerDereferenceableBytes(DL, CheckForNonNull,
74                                                           CheckForFreed));
75   if (KnownDerefBytes.getBoolValue() && KnownDerefBytes.uge(Size) &&
76       !CheckForFreed)
77     if (!CheckForNonNull || isKnownNonZero(V, DL, 0, nullptr, CtxI, DT)) {
78       // As we recursed through GEPs to get here, we've incrementally checked
79       // that each step advanced by a multiple of the alignment. If our base is
80       // properly aligned, then the original offset accessed must also be.
81       Type *Ty = V->getType();
82       assert(Ty->isSized() && "must be sized");
83       APInt Offset(DL.getTypeStoreSizeInBits(Ty), 0);
84       return isAligned(V, Offset, Alignment, DL);
85     }
86 
87   if (CtxI) {
88     /// Look through assumes to see if both dereferencability and alignment can
89     /// be provent by an assume
90     RetainedKnowledge AlignRK;
91     RetainedKnowledge DerefRK;
92     if (getKnowledgeForValue(
93             V, {Attribute::Dereferenceable, Attribute::Alignment}, nullptr,
94             [&](RetainedKnowledge RK, Instruction *Assume, auto) {
95               if (!isValidAssumeForContext(Assume, CtxI))
96                 return false;
97               if (RK.AttrKind == Attribute::Alignment)
98                 AlignRK = std::max(AlignRK, RK);
99               if (RK.AttrKind == Attribute::Dereferenceable)
100                 DerefRK = std::max(DerefRK, RK);
101               if (AlignRK && DerefRK && AlignRK.ArgValue >= Alignment.value() &&
102                   DerefRK.ArgValue >= Size.getZExtValue())
103                 return true; // We have found what we needed so we stop looking
104               return false;  // Other assumes may have better information. so
105                              // keep looking
106             }))
107       return true;
108   }
109   /// TODO refactor this function to be able to search independently for
110   /// Dereferencability and Alignment requirements.
111 
112   // For GEPs, determine if the indexing lands within the allocated object.
113   if (const GEPOperator *GEP = dyn_cast<GEPOperator>(V)) {
114     const Value *Base = GEP->getPointerOperand();
115 
116     APInt Offset(DL.getIndexTypeSizeInBits(GEP->getType()), 0);
117     if (!GEP->accumulateConstantOffset(DL, Offset) || Offset.isNegative() ||
118         !Offset.urem(APInt(Offset.getBitWidth(), Alignment.value()))
119              .isMinValue())
120       return false;
121 
122     // If the base pointer is dereferenceable for Offset+Size bytes, then the
123     // GEP (== Base + Offset) is dereferenceable for Size bytes.  If the base
124     // pointer is aligned to Align bytes, and the Offset is divisible by Align
125     // then the GEP (== Base + Offset == k_0 * Align + k_1 * Align) is also
126     // aligned to Align bytes.
127 
128     // Offset and Size may have different bit widths if we have visited an
129     // addrspacecast, so we can't do arithmetic directly on the APInt values.
130     return isDereferenceableAndAlignedPointer(
131         Base, Alignment, Offset + Size.sextOrTrunc(Offset.getBitWidth()), DL,
132         CtxI, DT, TLI, Visited, MaxDepth);
133   }
134 
135   // For gc.relocate, look through relocations
136   if (const GCRelocateInst *RelocateInst = dyn_cast<GCRelocateInst>(V))
137     return isDereferenceableAndAlignedPointer(RelocateInst->getDerivedPtr(),
138                                               Alignment, Size, DL, CtxI, DT,
139                                               TLI, Visited, MaxDepth);
140 
141   if (const AddrSpaceCastInst *ASC = dyn_cast<AddrSpaceCastInst>(V))
142     return isDereferenceableAndAlignedPointer(ASC->getOperand(0), Alignment,
143                                               Size, DL, CtxI, DT, TLI,
144                                               Visited, MaxDepth);
145 
146   if (const auto *Call = dyn_cast<CallBase>(V)) {
147     if (auto *RP = getArgumentAliasingToReturnedPointer(Call, true))
148       return isDereferenceableAndAlignedPointer(RP, Alignment, Size, DL, CtxI,
149                                                 DT, TLI, Visited, MaxDepth);
150 
151     // If we have a call we can't recurse through, check to see if this is an
152     // allocation function for which we can establish an minimum object size.
153     // Such a minimum object size is analogous to a deref_or_null attribute in
154     // that we still need to prove the result non-null at point of use.
155     // NOTE: We can only use the object size as a base fact as we a) need to
156     // prove alignment too, and b) don't want the compile time impact of a
157     // separate recursive walk.
158     ObjectSizeOpts Opts;
159     // TODO: It may be okay to round to align, but that would imply that
160     // accessing slightly out of bounds was legal, and we're currently
161     // inconsistent about that.  For the moment, be conservative.
162     Opts.RoundToAlign = false;
163     Opts.NullIsUnknownSize = true;
164     uint64_t ObjSize;
165     // TODO: Plumb through TLI so that malloc routines and such work.
166     if (getObjectSize(V, ObjSize, DL, nullptr, Opts)) {
167       APInt KnownDerefBytes(Size.getBitWidth(), ObjSize);
168       if (KnownDerefBytes.getBoolValue() && KnownDerefBytes.uge(Size) &&
169           isKnownNonZero(V, DL, 0, nullptr, CtxI, DT) && !V->canBeFreed()) {
170         // As we recursed through GEPs to get here, we've incrementally
171         // checked that each step advanced by a multiple of the alignment. If
172         // our base is properly aligned, then the original offset accessed
173         // must also be.
174         Type *Ty = V->getType();
175         assert(Ty->isSized() && "must be sized");
176         APInt Offset(DL.getTypeStoreSizeInBits(Ty), 0);
177         return isAligned(V, Offset, Alignment, DL);
178       }
179     }
180   }
181 
182   // If we don't know, assume the worst.
183   return false;
184 }
185 
186 bool llvm::isDereferenceableAndAlignedPointer(const Value *V, Align Alignment,
187                                               const APInt &Size,
188                                               const DataLayout &DL,
189                                               const Instruction *CtxI,
190                                               const DominatorTree *DT,
191                                               const TargetLibraryInfo *TLI) {
192   // Note: At the moment, Size can be zero.  This ends up being interpreted as
193   // a query of whether [Base, V] is dereferenceable and V is aligned (since
194   // that's what the implementation happened to do).  It's unclear if this is
195   // the desired semantic, but at least SelectionDAG does exercise this case.
196 
197   SmallPtrSet<const Value *, 32> Visited;
198   return ::isDereferenceableAndAlignedPointer(V, Alignment, Size, DL, CtxI, DT,
199                                               TLI, Visited, 16);
200 }
201 
202 bool llvm::isDereferenceableAndAlignedPointer(const Value *V, Type *Ty,
203                                               MaybeAlign MA,
204                                               const DataLayout &DL,
205                                               const Instruction *CtxI,
206                                               const DominatorTree *DT,
207                                               const TargetLibraryInfo *TLI) {
208   // For unsized types or scalable vectors we don't know exactly how many bytes
209   // are dereferenced, so bail out.
210   if (!Ty->isSized() || isa<ScalableVectorType>(Ty))
211     return false;
212 
213   // When dereferenceability information is provided by a dereferenceable
214   // attribute, we know exactly how many bytes are dereferenceable. If we can
215   // determine the exact offset to the attributed variable, we can use that
216   // information here.
217 
218   // Require ABI alignment for loads without alignment specification
219   const Align Alignment = DL.getValueOrABITypeAlignment(MA, Ty);
220   APInt AccessSize(DL.getPointerTypeSizeInBits(V->getType()),
221                    DL.getTypeStoreSize(Ty));
222   return isDereferenceableAndAlignedPointer(V, Alignment, AccessSize, DL, CtxI,
223                                             DT, TLI);
224 }
225 
226 bool llvm::isDereferenceablePointer(const Value *V, Type *Ty,
227                                     const DataLayout &DL,
228                                     const Instruction *CtxI,
229                                     const DominatorTree *DT,
230                                     const TargetLibraryInfo *TLI) {
231   return isDereferenceableAndAlignedPointer(V, Ty, Align(1), DL, CtxI, DT, TLI);
232 }
233 
234 /// Test if A and B will obviously have the same value.
235 ///
236 /// This includes recognizing that %t0 and %t1 will have the same
237 /// value in code like this:
238 /// \code
239 ///   %t0 = getelementptr \@a, 0, 3
240 ///   store i32 0, i32* %t0
241 ///   %t1 = getelementptr \@a, 0, 3
242 ///   %t2 = load i32* %t1
243 /// \endcode
244 ///
245 static bool AreEquivalentAddressValues(const Value *A, const Value *B) {
246   // Test if the values are trivially equivalent.
247   if (A == B)
248     return true;
249 
250   // Test if the values come from identical arithmetic instructions.
251   // Use isIdenticalToWhenDefined instead of isIdenticalTo because
252   // this function is only used when one address use dominates the
253   // other, which means that they'll always either have the same
254   // value or one of them will have an undefined value.
255   if (isa<BinaryOperator>(A) || isa<CastInst>(A) || isa<PHINode>(A) ||
256       isa<GetElementPtrInst>(A))
257     if (const Instruction *BI = dyn_cast<Instruction>(B))
258       if (cast<Instruction>(A)->isIdenticalToWhenDefined(BI))
259         return true;
260 
261   // Otherwise they may not be equivalent.
262   return false;
263 }
264 
265 bool llvm::isDereferenceableAndAlignedInLoop(LoadInst *LI, Loop *L,
266                                              ScalarEvolution &SE,
267                                              DominatorTree &DT) {
268   auto &DL = LI->getModule()->getDataLayout();
269   Value *Ptr = LI->getPointerOperand();
270 
271   APInt EltSize(DL.getIndexTypeSizeInBits(Ptr->getType()),
272                 DL.getTypeStoreSize(LI->getType()).getFixedSize());
273   const Align Alignment = LI->getAlign();
274 
275   Instruction *HeaderFirstNonPHI = L->getHeader()->getFirstNonPHI();
276 
277   // If given a uniform (i.e. non-varying) address, see if we can prove the
278   // access is safe within the loop w/o needing predication.
279   if (L->isLoopInvariant(Ptr))
280     return isDereferenceableAndAlignedPointer(Ptr, Alignment, EltSize, DL,
281                                               HeaderFirstNonPHI, &DT);
282 
283   // Otherwise, check to see if we have a repeating access pattern where we can
284   // prove that all accesses are well aligned and dereferenceable.
285   auto *AddRec = dyn_cast<SCEVAddRecExpr>(SE.getSCEV(Ptr));
286   if (!AddRec || AddRec->getLoop() != L || !AddRec->isAffine())
287     return false;
288   auto* Step = dyn_cast<SCEVConstant>(AddRec->getStepRecurrence(SE));
289   if (!Step)
290     return false;
291   // TODO: generalize to access patterns which have gaps
292   if (Step->getAPInt() != EltSize)
293     return false;
294 
295   auto TC = SE.getSmallConstantMaxTripCount(L);
296   if (!TC)
297     return false;
298 
299   const APInt AccessSize = TC * EltSize;
300 
301   auto *StartS = dyn_cast<SCEVUnknown>(AddRec->getStart());
302   if (!StartS)
303     return false;
304   assert(SE.isLoopInvariant(StartS, L) && "implied by addrec definition");
305   Value *Base = StartS->getValue();
306 
307   // For the moment, restrict ourselves to the case where the access size is a
308   // multiple of the requested alignment and the base is aligned.
309   // TODO: generalize if a case found which warrants
310   if (EltSize.urem(Alignment.value()) != 0)
311     return false;
312   return isDereferenceableAndAlignedPointer(Base, Alignment, AccessSize, DL,
313                                             HeaderFirstNonPHI, &DT);
314 }
315 
316 /// Check if executing a load of this pointer value cannot trap.
317 ///
318 /// If DT and ScanFrom are specified this method performs context-sensitive
319 /// analysis and returns true if it is safe to load immediately before ScanFrom.
320 ///
321 /// If it is not obviously safe to load from the specified pointer, we do
322 /// a quick local scan of the basic block containing \c ScanFrom, to determine
323 /// if the address is already accessed.
324 ///
325 /// This uses the pointee type to determine how many bytes need to be safe to
326 /// load from the pointer.
327 bool llvm::isSafeToLoadUnconditionally(Value *V, Align Alignment, APInt &Size,
328                                        const DataLayout &DL,
329                                        Instruction *ScanFrom,
330                                        const DominatorTree *DT,
331                                        const TargetLibraryInfo *TLI) {
332   // If DT is not specified we can't make context-sensitive query
333   const Instruction* CtxI = DT ? ScanFrom : nullptr;
334   if (isDereferenceableAndAlignedPointer(V, Alignment, Size, DL, CtxI, DT, TLI))
335     return true;
336 
337   if (!ScanFrom)
338     return false;
339 
340   if (Size.getBitWidth() > 64)
341     return false;
342   const uint64_t LoadSize = Size.getZExtValue();
343 
344   // Otherwise, be a little bit aggressive by scanning the local block where we
345   // want to check to see if the pointer is already being loaded or stored
346   // from/to.  If so, the previous load or store would have already trapped,
347   // so there is no harm doing an extra load (also, CSE will later eliminate
348   // the load entirely).
349   BasicBlock::iterator BBI = ScanFrom->getIterator(),
350                        E = ScanFrom->getParent()->begin();
351 
352   // We can at least always strip pointer casts even though we can't use the
353   // base here.
354   V = V->stripPointerCasts();
355 
356   while (BBI != E) {
357     --BBI;
358 
359     // If we see a free or a call which may write to memory (i.e. which might do
360     // a free) the pointer could be marked invalid.
361     if (isa<CallInst>(BBI) && BBI->mayWriteToMemory() &&
362         !isa<DbgInfoIntrinsic>(BBI))
363       return false;
364 
365     Value *AccessedPtr;
366     Type *AccessedTy;
367     Align AccessedAlign;
368     if (LoadInst *LI = dyn_cast<LoadInst>(BBI)) {
369       // Ignore volatile loads. The execution of a volatile load cannot
370       // be used to prove an address is backed by regular memory; it can,
371       // for example, point to an MMIO register.
372       if (LI->isVolatile())
373         continue;
374       AccessedPtr = LI->getPointerOperand();
375       AccessedTy = LI->getType();
376       AccessedAlign = LI->getAlign();
377     } else if (StoreInst *SI = dyn_cast<StoreInst>(BBI)) {
378       // Ignore volatile stores (see comment for loads).
379       if (SI->isVolatile())
380         continue;
381       AccessedPtr = SI->getPointerOperand();
382       AccessedTy = SI->getValueOperand()->getType();
383       AccessedAlign = SI->getAlign();
384     } else
385       continue;
386 
387     if (AccessedAlign < Alignment)
388       continue;
389 
390     // Handle trivial cases.
391     if (AccessedPtr == V &&
392         LoadSize <= DL.getTypeStoreSize(AccessedTy))
393       return true;
394 
395     if (AreEquivalentAddressValues(AccessedPtr->stripPointerCasts(), V) &&
396         LoadSize <= DL.getTypeStoreSize(AccessedTy))
397       return true;
398   }
399   return false;
400 }
401 
402 bool llvm::isSafeToLoadUnconditionally(Value *V, Type *Ty, Align Alignment,
403                                        const DataLayout &DL,
404                                        Instruction *ScanFrom,
405                                        const DominatorTree *DT,
406                                        const TargetLibraryInfo *TLI) {
407   APInt Size(DL.getIndexTypeSizeInBits(V->getType()), DL.getTypeStoreSize(Ty));
408   return isSafeToLoadUnconditionally(V, Alignment, Size, DL, ScanFrom, DT, TLI);
409 }
410 
411   /// DefMaxInstsToScan - the default number of maximum instructions
412 /// to scan in the block, used by FindAvailableLoadedValue().
413 /// FindAvailableLoadedValue() was introduced in r60148, to improve jump
414 /// threading in part by eliminating partially redundant loads.
415 /// At that point, the value of MaxInstsToScan was already set to '6'
416 /// without documented explanation.
417 cl::opt<unsigned>
418 llvm::DefMaxInstsToScan("available-load-scan-limit", cl::init(6), cl::Hidden,
419   cl::desc("Use this to specify the default maximum number of instructions "
420            "to scan backward from a given instruction, when searching for "
421            "available loaded value"));
422 
423 Value *llvm::FindAvailableLoadedValue(LoadInst *Load,
424                                       BasicBlock *ScanBB,
425                                       BasicBlock::iterator &ScanFrom,
426                                       unsigned MaxInstsToScan,
427                                       AAResults *AA, bool *IsLoad,
428                                       unsigned *NumScanedInst) {
429   // Don't CSE load that is volatile or anything stronger than unordered.
430   if (!Load->isUnordered())
431     return nullptr;
432 
433   MemoryLocation Loc = MemoryLocation::get(Load);
434   return findAvailablePtrLoadStore(Loc, Load->getType(), Load->isAtomic(),
435                                    ScanBB, ScanFrom, MaxInstsToScan, AA, IsLoad,
436                                    NumScanedInst);
437 }
438 
439 // Check if the load and the store have the same base, constant offsets and
440 // non-overlapping access ranges.
441 static bool areNonOverlapSameBaseLoadAndStore(const Value *LoadPtr,
442                                               Type *LoadTy,
443                                               const Value *StorePtr,
444                                               Type *StoreTy,
445                                               const DataLayout &DL) {
446   APInt LoadOffset(DL.getTypeSizeInBits(LoadPtr->getType()), 0);
447   APInt StoreOffset(DL.getTypeSizeInBits(StorePtr->getType()), 0);
448   const Value *LoadBase = LoadPtr->stripAndAccumulateConstantOffsets(
449       DL, LoadOffset, /* AllowNonInbounds */ false);
450   const Value *StoreBase = StorePtr->stripAndAccumulateConstantOffsets(
451       DL, StoreOffset, /* AllowNonInbounds */ false);
452   if (LoadBase != StoreBase)
453     return false;
454   auto LoadAccessSize = LocationSize::precise(DL.getTypeStoreSize(LoadTy));
455   auto StoreAccessSize = LocationSize::precise(DL.getTypeStoreSize(StoreTy));
456   ConstantRange LoadRange(LoadOffset,
457                           LoadOffset + LoadAccessSize.toRaw());
458   ConstantRange StoreRange(StoreOffset,
459                            StoreOffset + StoreAccessSize.toRaw());
460   return LoadRange.intersectWith(StoreRange).isEmptySet();
461 }
462 
463 static Value *getAvailableLoadStore(Instruction *Inst, const Value *Ptr,
464                                     Type *AccessTy, bool AtLeastAtomic,
465                                     const DataLayout &DL, bool *IsLoadCSE) {
466   // If this is a load of Ptr, the loaded value is available.
467   // (This is true even if the load is volatile or atomic, although
468   // those cases are unlikely.)
469   if (LoadInst *LI = dyn_cast<LoadInst>(Inst)) {
470     // We can value forward from an atomic to a non-atomic, but not the
471     // other way around.
472     if (LI->isAtomic() < AtLeastAtomic)
473       return nullptr;
474 
475     Value *LoadPtr = LI->getPointerOperand()->stripPointerCasts();
476     if (!AreEquivalentAddressValues(LoadPtr, Ptr))
477       return nullptr;
478 
479     if (CastInst::isBitOrNoopPointerCastable(LI->getType(), AccessTy, DL)) {
480       if (IsLoadCSE)
481         *IsLoadCSE = true;
482       return LI;
483     }
484   }
485 
486   // If this is a store through Ptr, the value is available!
487   // (This is true even if the store is volatile or atomic, although
488   // those cases are unlikely.)
489   if (StoreInst *SI = dyn_cast<StoreInst>(Inst)) {
490     // We can value forward from an atomic to a non-atomic, but not the
491     // other way around.
492     if (SI->isAtomic() < AtLeastAtomic)
493       return nullptr;
494 
495     Value *StorePtr = SI->getPointerOperand()->stripPointerCasts();
496     if (!AreEquivalentAddressValues(StorePtr, Ptr))
497       return nullptr;
498 
499     Value *Val = SI->getValueOperand();
500     if (CastInst::isBitOrNoopPointerCastable(Val->getType(), AccessTy, DL)) {
501       if (IsLoadCSE)
502         *IsLoadCSE = false;
503       return Val;
504     }
505   }
506 
507   return nullptr;
508 }
509 
510 Value *llvm::findAvailablePtrLoadStore(
511     const MemoryLocation &Loc, Type *AccessTy, bool AtLeastAtomic,
512     BasicBlock *ScanBB, BasicBlock::iterator &ScanFrom, unsigned MaxInstsToScan,
513     AAResults *AA, bool *IsLoadCSE, unsigned *NumScanedInst) {
514   if (MaxInstsToScan == 0)
515     MaxInstsToScan = ~0U;
516 
517   const DataLayout &DL = ScanBB->getModule()->getDataLayout();
518   const Value *StrippedPtr = Loc.Ptr->stripPointerCasts();
519 
520   while (ScanFrom != ScanBB->begin()) {
521     // We must ignore debug info directives when counting (otherwise they
522     // would affect codegen).
523     Instruction *Inst = &*--ScanFrom;
524     if (isa<DbgInfoIntrinsic>(Inst))
525       continue;
526 
527     // Restore ScanFrom to expected value in case next test succeeds
528     ScanFrom++;
529 
530     if (NumScanedInst)
531       ++(*NumScanedInst);
532 
533     // Don't scan huge blocks.
534     if (MaxInstsToScan-- == 0)
535       return nullptr;
536 
537     --ScanFrom;
538 
539     if (Value *Available = getAvailableLoadStore(Inst, StrippedPtr, AccessTy,
540                                                  AtLeastAtomic, DL, IsLoadCSE))
541       return Available;
542 
543     // Try to get the store size for the type.
544     if (StoreInst *SI = dyn_cast<StoreInst>(Inst)) {
545       Value *StorePtr = SI->getPointerOperand()->stripPointerCasts();
546 
547       // If both StrippedPtr and StorePtr reach all the way to an alloca or
548       // global and they are different, ignore the store. This is a trivial form
549       // of alias analysis that is important for reg2mem'd code.
550       if ((isa<AllocaInst>(StrippedPtr) || isa<GlobalVariable>(StrippedPtr)) &&
551           (isa<AllocaInst>(StorePtr) || isa<GlobalVariable>(StorePtr)) &&
552           StrippedPtr != StorePtr)
553         continue;
554 
555       if (!AA) {
556         // When AA isn't available, but if the load and the store have the same
557         // base, constant offsets and non-overlapping access ranges, ignore the
558         // store. This is a simple form of alias analysis that is used by the
559         // inliner. FIXME: use BasicAA if possible.
560         if (areNonOverlapSameBaseLoadAndStore(
561                 Loc.Ptr, AccessTy, SI->getPointerOperand(),
562                 SI->getValueOperand()->getType(), DL))
563           continue;
564       } else {
565         // If we have alias analysis and it says the store won't modify the
566         // loaded value, ignore the store.
567         if (!isModSet(AA->getModRefInfo(SI, Loc)))
568           continue;
569       }
570 
571       // Otherwise the store that may or may not alias the pointer, bail out.
572       ++ScanFrom;
573       return nullptr;
574     }
575 
576     // If this is some other instruction that may clobber Ptr, bail out.
577     if (Inst->mayWriteToMemory()) {
578       // If alias analysis claims that it really won't modify the load,
579       // ignore it.
580       if (AA && !isModSet(AA->getModRefInfo(Inst, Loc)))
581         continue;
582 
583       // May modify the pointer, bail out.
584       ++ScanFrom;
585       return nullptr;
586     }
587   }
588 
589   // Got to the start of the block, we didn't find it, but are done for this
590   // block.
591   return nullptr;
592 }
593 
594 Value *llvm::FindAvailableLoadedValue(LoadInst *Load, AAResults &AA,
595                                       bool *IsLoadCSE,
596                                       unsigned MaxInstsToScan) {
597   const DataLayout &DL = Load->getModule()->getDataLayout();
598   Value *StrippedPtr = Load->getPointerOperand()->stripPointerCasts();
599   BasicBlock *ScanBB = Load->getParent();
600   Type *AccessTy = Load->getType();
601   bool AtLeastAtomic = Load->isAtomic();
602 
603   if (!Load->isUnordered())
604     return nullptr;
605 
606   // Try to find an available value first, and delay expensive alias analysis
607   // queries until later.
608   Value *Available = nullptr;;
609   SmallVector<Instruction *> MustNotAliasInsts;
610   for (Instruction &Inst : make_range(++Load->getReverseIterator(),
611                                       ScanBB->rend())) {
612     if (isa<DbgInfoIntrinsic>(&Inst))
613       continue;
614 
615     if (MaxInstsToScan-- == 0)
616       return nullptr;
617 
618     Available = getAvailableLoadStore(&Inst, StrippedPtr, AccessTy,
619                                       AtLeastAtomic, DL, IsLoadCSE);
620     if (Available)
621       break;
622 
623     if (Inst.mayWriteToMemory())
624       MustNotAliasInsts.push_back(&Inst);
625   }
626 
627   // If we found an available value, ensure that the instructions in between
628   // did not modify the memory location.
629   if (Available) {
630     MemoryLocation Loc = MemoryLocation::get(Load);
631     for (Instruction *Inst : MustNotAliasInsts)
632       if (isModSet(AA.getModRefInfo(Inst, Loc)))
633         return nullptr;
634   }
635 
636   return Available;
637 }
638 
639 bool llvm::canReplacePointersIfEqual(Value *A, Value *B, const DataLayout &DL,
640                                      Instruction *CtxI) {
641   Type *Ty = A->getType();
642   assert(Ty == B->getType() && Ty->isPointerTy() &&
643          "values must have matching pointer types");
644 
645   // NOTE: The checks in the function are incomplete and currently miss illegal
646   // cases! The current implementation is a starting point and the
647   // implementation should be made stricter over time.
648   if (auto *C = dyn_cast<Constant>(B)) {
649     // Do not allow replacing a pointer with a constant pointer, unless it is
650     // either null or at least one byte is dereferenceable.
651     APInt OneByte(DL.getPointerTypeSizeInBits(Ty), 1);
652     return C->isNullValue() ||
653            isDereferenceableAndAlignedPointer(B, Align(1), OneByte, DL, CtxI);
654   }
655 
656   return true;
657 }
658