1 //===-- AArch64TargetParser - Parser for AArch64 features -------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file implements a target parser to recognise AArch64 hardware features 10 // such as FPU/CPU/ARCH and extension names. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_SUPPORT_AARCH64TARGETPARSERCOMMON_H 15 #define LLVM_SUPPORT_AARCH64TARGETPARSERCOMMON_H 16 17 #include "llvm/ADT/StringRef.h" 18 #include "llvm/ADT/Triple.h" 19 #include "llvm/Support/ARMTargetParser.h" 20 #include <vector> 21 22 // FIXME:This should be made into class design,to avoid dupplication. 23 namespace llvm { 24 namespace AArch64 { 25 26 // Arch extension modifiers for CPUs. 27 enum ArchExtKind : unsigned { 28 AEK_INVALID = 0, 29 AEK_NONE = 1, 30 AEK_CRC = 1 << 1, 31 AEK_CRYPTO = 1 << 2, 32 AEK_FP = 1 << 3, 33 AEK_SIMD = 1 << 4, 34 AEK_FP16 = 1 << 5, 35 AEK_PROFILE = 1 << 6, 36 AEK_RAS = 1 << 7, 37 AEK_LSE = 1 << 8, 38 AEK_SVE = 1 << 9, 39 AEK_DOTPROD = 1 << 10, 40 AEK_RCPC = 1 << 11, 41 AEK_RDM = 1 << 12, 42 AEK_SM4 = 1 << 13, 43 AEK_SHA3 = 1 << 14, 44 AEK_SHA2 = 1 << 15, 45 AEK_AES = 1 << 16, 46 AEK_FP16FML = 1 << 17, 47 AEK_RAND = 1 << 18, 48 AEK_MTE = 1 << 19, 49 AEK_SSBS = 1 << 20, 50 AEK_SB = 1 << 21, 51 AEK_PREDRES = 1 << 22, 52 AEK_SVE2 = 1 << 23, 53 AEK_SVE2AES = 1 << 24, 54 AEK_SVE2SM4 = 1 << 25, 55 AEK_SVE2SHA3 = 1 << 26, 56 AEK_SVE2BITPERM = 1 << 27, 57 AEK_TME = 1 << 28, 58 AEK_BF16 = 1 << 29, 59 AEK_I8MM = 1 << 30, 60 }; 61 62 enum class ArchKind { 63 #define AARCH64_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT) ID, 64 #include "AArch64TargetParser.def" 65 }; 66 67 const ARM::ArchNames<ArchKind> AArch64ARCHNames[] = { 68 #define AARCH64_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, \ 69 ARCH_BASE_EXT) \ 70 {NAME, \ 71 sizeof(NAME) - 1, \ 72 CPU_ATTR, \ 73 sizeof(CPU_ATTR) - 1, \ 74 SUB_ARCH, \ 75 sizeof(SUB_ARCH) - 1, \ 76 ARM::FPUKind::ARCH_FPU, \ 77 ARCH_BASE_EXT, \ 78 AArch64::ArchKind::ID, \ 79 ARCH_ATTR}, 80 #include "AArch64TargetParser.def" 81 }; 82 83 const ARM::ExtName AArch64ARCHExtNames[] = { 84 #define AARCH64_ARCH_EXT_NAME(NAME, ID, FEATURE, NEGFEATURE) \ 85 {NAME, sizeof(NAME) - 1, ID, FEATURE, NEGFEATURE}, 86 #include "AArch64TargetParser.def" 87 }; 88 89 const ARM::CpuNames<ArchKind> AArch64CPUNames[] = { 90 #define AARCH64_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \ 91 {NAME, sizeof(NAME) - 1, AArch64::ArchKind::ID, IS_DEFAULT, DEFAULT_EXT}, 92 #include "AArch64TargetParser.def" 93 }; 94 95 const ArchKind ArchKinds[] = { 96 #define AARCH64_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT) \ 97 ArchKind::ID, 98 #include "AArch64TargetParser.def" 99 }; 100 101 // FIXME: These should be moved to TargetTuple once it exists 102 bool getExtensionFeatures(unsigned Extensions, 103 std::vector<StringRef> &Features); 104 bool getArchFeatures(ArchKind AK, std::vector<StringRef> &Features); 105 106 StringRef getArchName(ArchKind AK); 107 unsigned getArchAttr(ArchKind AK); 108 StringRef getCPUAttr(ArchKind AK); 109 StringRef getSubArch(ArchKind AK); 110 StringRef getArchExtName(unsigned ArchExtKind); 111 StringRef getArchExtFeature(StringRef ArchExt); 112 113 // Information by Name 114 unsigned getDefaultFPU(StringRef CPU, ArchKind AK); 115 unsigned getDefaultExtensions(StringRef CPU, ArchKind AK); 116 StringRef getDefaultCPU(StringRef Arch); 117 ArchKind getCPUArchKind(StringRef CPU); 118 119 // Parser 120 ArchKind parseArch(StringRef Arch); 121 ArchExtKind parseArchExt(StringRef ArchExt); 122 ArchKind parseCPUArch(StringRef CPU); 123 // Used by target parser tests 124 void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values); 125 126 bool isX18ReservedByDefault(const Triple &TT); 127 128 struct ParsedBranchProtection { 129 StringRef Scope; 130 StringRef Key; 131 bool BranchTargetEnforcement; 132 }; 133 134 bool parseBranchProtection(StringRef Spec, ParsedBranchProtection &PBP, 135 StringRef &Err); 136 137 } // namespace AArch64 138 } // namespace llvm 139 140 #endif 141