1 //===-- AArch64TargetParser - Parser for AArch64 features -------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file implements a target parser to recognise AArch64 hardware features 10 // such as FPU/CPU/ARCH and extension names. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_SUPPORT_AARCH64TARGETPARSER_H 15 #define LLVM_SUPPORT_AARCH64TARGETPARSER_H 16 17 #include "llvm/ADT/StringRef.h" 18 #include "llvm/Support/ARMTargetParser.h" 19 #include <vector> 20 21 // FIXME:This should be made into class design,to avoid dupplication. 22 namespace llvm { 23 24 class Triple; 25 26 namespace AArch64 { 27 28 // Arch extension modifiers for CPUs. 29 enum ArchExtKind : uint64_t { 30 AEK_INVALID = 0, 31 AEK_NONE = 1, 32 AEK_CRC = 1 << 1, 33 AEK_CRYPTO = 1 << 2, 34 AEK_FP = 1 << 3, 35 AEK_SIMD = 1 << 4, 36 AEK_FP16 = 1 << 5, 37 AEK_PROFILE = 1 << 6, 38 AEK_RAS = 1 << 7, 39 AEK_LSE = 1 << 8, 40 AEK_SVE = 1 << 9, 41 AEK_DOTPROD = 1 << 10, 42 AEK_RCPC = 1 << 11, 43 AEK_RDM = 1 << 12, 44 AEK_SM4 = 1 << 13, 45 AEK_SHA3 = 1 << 14, 46 AEK_SHA2 = 1 << 15, 47 AEK_AES = 1 << 16, 48 AEK_FP16FML = 1 << 17, 49 AEK_RAND = 1 << 18, 50 AEK_MTE = 1 << 19, 51 AEK_SSBS = 1 << 20, 52 AEK_SB = 1 << 21, 53 AEK_PREDRES = 1 << 22, 54 AEK_SVE2 = 1 << 23, 55 AEK_SVE2AES = 1 << 24, 56 AEK_SVE2SM4 = 1 << 25, 57 AEK_SVE2SHA3 = 1 << 26, 58 AEK_SVE2BITPERM = 1 << 27, 59 AEK_TME = 1 << 28, 60 AEK_BF16 = 1 << 29, 61 AEK_I8MM = 1 << 30, 62 AEK_F32MM = 1ULL << 31, 63 AEK_F64MM = 1ULL << 32, 64 AEK_LS64 = 1ULL << 33, 65 AEK_BRBE = 1ULL << 34, 66 AEK_PAUTH = 1ULL << 35, 67 AEK_FLAGM = 1ULL << 36, 68 AEK_SME = 1ULL << 37, 69 AEK_SMEF64 = 1ULL << 38, 70 AEK_SMEI64 = 1ULL << 39, 71 AEK_HBC = 1ULL << 40, 72 AEK_MOPS = 1ULL << 41, 73 AEK_PERFMON = 1ULL << 42, 74 }; 75 76 enum class ArchKind { 77 #define AARCH64_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT) ID, 78 #include "AArch64TargetParser.def" 79 }; 80 81 const ARM::ArchNames<ArchKind> AArch64ARCHNames[] = { 82 #define AARCH64_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, \ 83 ARCH_BASE_EXT) \ 84 {NAME, \ 85 sizeof(NAME) - 1, \ 86 CPU_ATTR, \ 87 sizeof(CPU_ATTR) - 1, \ 88 SUB_ARCH, \ 89 sizeof(SUB_ARCH) - 1, \ 90 ARM::FPUKind::ARCH_FPU, \ 91 ARCH_BASE_EXT, \ 92 AArch64::ArchKind::ID, \ 93 ARCH_ATTR}, 94 #include "AArch64TargetParser.def" 95 }; 96 97 const ARM::ExtName AArch64ARCHExtNames[] = { 98 #define AARCH64_ARCH_EXT_NAME(NAME, ID, FEATURE, NEGFEATURE) \ 99 {NAME, sizeof(NAME) - 1, ID, FEATURE, NEGFEATURE}, 100 #include "AArch64TargetParser.def" 101 }; 102 103 const ARM::CpuNames<ArchKind> AArch64CPUNames[] = { 104 #define AARCH64_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \ 105 {NAME, sizeof(NAME) - 1, AArch64::ArchKind::ID, IS_DEFAULT, DEFAULT_EXT}, 106 #include "AArch64TargetParser.def" 107 }; 108 109 const ArchKind ArchKinds[] = { 110 #define AARCH64_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT) \ 111 ArchKind::ID, 112 #include "AArch64TargetParser.def" 113 }; 114 115 // FIXME: These should be moved to TargetTuple once it exists 116 bool getExtensionFeatures(uint64_t Extensions, 117 std::vector<StringRef> &Features); 118 bool getArchFeatures(ArchKind AK, std::vector<StringRef> &Features); 119 120 StringRef getArchName(ArchKind AK); 121 unsigned getArchAttr(ArchKind AK); 122 StringRef getCPUAttr(ArchKind AK); 123 StringRef getSubArch(ArchKind AK); 124 StringRef getArchExtName(unsigned ArchExtKind); 125 StringRef getArchExtFeature(StringRef ArchExt); 126 127 // Information by Name 128 unsigned getDefaultFPU(StringRef CPU, ArchKind AK); 129 uint64_t getDefaultExtensions(StringRef CPU, ArchKind AK); 130 StringRef getDefaultCPU(StringRef Arch); 131 ArchKind getCPUArchKind(StringRef CPU); 132 133 // Parser 134 ArchKind parseArch(StringRef Arch); 135 ArchExtKind parseArchExt(StringRef ArchExt); 136 ArchKind parseCPUArch(StringRef CPU); 137 // Used by target parser tests 138 void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values); 139 140 bool isX18ReservedByDefault(const Triple &TT); 141 142 } // namespace AArch64 143 } // namespace llvm 144 145 #endif 146