1from __future__ import print_function 2from textwrap import dedent 3import lldb 4from lldbsuite.test.lldbtest import * 5from lldbsuite.test.decorators import * 6from lldbsuite.test.gdbclientutils import * 7from lldbsuite.test.lldbgdbclient import GDBRemoteTestBase 8 9 10class MyResponder(MockGDBServerResponder): 11 def qXferRead(self, obj, annex, offset, length): 12 if annex == "target.xml": 13 return dedent("""\ 14 <?xml version="1.0"?> 15 <target version="1.0"> 16 <architecture>aarch64</architecture> 17 <feature name="org.gnu.gdb.aarch64.core"> 18 <reg name="cpsr" regnum="33" bitsize="32"/> 19 <reg name="x0" regnum="0" bitsize="64"/> 20 <reg name="x1" bitsize="64"/> 21 <reg name="x2" bitsize="64"/> 22 <reg name="x3" bitsize="64"/> 23 <reg name="x4" bitsize="64"/> 24 <reg name="x5" bitsize="64"/> 25 <reg name="x6" bitsize="64"/> 26 <reg name="x7" bitsize="64"/> 27 <reg name="x8" bitsize="64"/> 28 <reg name="x9" bitsize="64"/> 29 <reg name="x10" bitsize="64"/> 30 <reg name="x11" bitsize="64"/> 31 <reg name="x12" bitsize="64"/> 32 <reg name="x13" bitsize="64"/> 33 <reg name="x14" bitsize="64"/> 34 <reg name="x15" bitsize="64"/> 35 <reg name="x16" bitsize="64"/> 36 <reg name="x17" bitsize="64"/> 37 <reg name="x18" bitsize="64"/> 38 <reg name="x19" bitsize="64"/> 39 <reg name="x20" bitsize="64"/> 40 <reg name="x21" bitsize="64"/> 41 <reg name="x22" bitsize="64"/> 42 <reg name="x23" bitsize="64"/> 43 <reg name="x24" bitsize="64"/> 44 <reg name="x25" bitsize="64"/> 45 <reg name="x26" bitsize="64"/> 46 <reg name="x27" bitsize="64"/> 47 <reg name="x28" bitsize="64"/> 48 <reg name="x29" bitsize="64"/> 49 <reg name="x30" bitsize="64"/> 50 <reg name="sp" bitsize="64"/> 51 <reg name="pc" bitsize="64"/> 52 <reg name="w0" bitsize="32" value_regnums="0" invalidate_regnums="0" regnum="34"/> 53 <reg name="w1" bitsize="32" value_regnums="1" invalidate_regnums="1"/> 54 <reg name="w2" bitsize="32" value_regnums="2" invalidate_regnums="2"/> 55 <reg name="w3" bitsize="32" value_regnums="3" invalidate_regnums="3"/> 56 <reg name="w4" bitsize="32" value_regnums="4" invalidate_regnums="4"/> 57 <reg name="w5" bitsize="32" value_regnums="5" invalidate_regnums="5"/> 58 <reg name="w6" bitsize="32" value_regnums="6" invalidate_regnums="6"/> 59 <reg name="w7" bitsize="32" value_regnums="7" invalidate_regnums="7"/> 60 <reg name="w8" bitsize="32" value_regnums="8" invalidate_regnums="8"/> 61 <reg name="w9" bitsize="32" value_regnums="9" invalidate_regnums="9"/> 62 <reg name="w10" bitsize="32" value_regnums="10" invalidate_regnums="10"/> 63 <reg name="w11" bitsize="32" value_regnums="11" invalidate_regnums="11"/> 64 <reg name="w12" bitsize="32" value_regnums="12" invalidate_regnums="12"/> 65 <reg name="w13" bitsize="32" value_regnums="13" invalidate_regnums="13"/> 66 <reg name="w14" bitsize="32" value_regnums="14" invalidate_regnums="14"/> 67 <reg name="w15" bitsize="32" value_regnums="15" invalidate_regnums="15"/> 68 <reg name="w16" bitsize="32" value_regnums="16" invalidate_regnums="16"/> 69 <reg name="w17" bitsize="32" value_regnums="17" invalidate_regnums="17"/> 70 <reg name="w18" bitsize="32" value_regnums="18" invalidate_regnums="18"/> 71 <reg name="w19" bitsize="32" value_regnums="19" invalidate_regnums="19"/> 72 <reg name="w20" bitsize="32" value_regnums="20" invalidate_regnums="20"/> 73 <reg name="w21" bitsize="32" value_regnums="21" invalidate_regnums="21"/> 74 <reg name="w22" bitsize="32" value_regnums="22" invalidate_regnums="22"/> 75 <reg name="w23" bitsize="32" value_regnums="23" invalidate_regnums="23"/> 76 <reg name="w24" bitsize="32" value_regnums="24" invalidate_regnums="24"/> 77 <reg name="w25" bitsize="32" value_regnums="25" invalidate_regnums="25"/> 78 <reg name="w26" bitsize="32" value_regnums="26" invalidate_regnums="26"/> 79 <reg name="w27" bitsize="32" value_regnums="27" invalidate_regnums="27"/> 80 <reg name="w28" bitsize="32" value_regnums="28" invalidate_regnums="28"/> 81 </feature> 82 </target> 83 """), False 84 else: 85 return None, 86 87 def readRegister(self, regnum): 88 return "E01" 89 90 def readRegisters(self): 91 return "20000000000000002000000000000000f0c154bfffff00005daa985a8fea0b48f0b954bfffff0000ad13cce570150b48380000000000000070456abfffff0000a700000000000000000000000000000001010101010101010000000000000000f0c154bfffff00000f2700000000000008e355bfffff0000080e55bfffff0000281041000000000010de61bfffff00005c05000000000000f0c154bfffff000090fcffffffff00008efcffffffff00008ffcffffffff00000000000000000000001000000000000090fcffffffff000000d06cbfffff0000f0c154bfffff00000100000000000000d0b954bfffff0000e407400000000000d0b954bfffff0000e40740000000000000100000" 92 93 94class TestAArch64XMLRegOffsets(GDBRemoteTestBase): 95 96 @skipIfXmlSupportMissing 97 @skipIfRemote 98 @skipIfLLVMTargetMissing("AArch64") 99 def test_register_gpacket_offsets(self): 100 """ 101 Test that we correctly associate the register info with the eh_frame 102 register numbers. 103 """ 104 105 target = self.createTarget("basic_eh_frame-aarch64.yaml") 106 self.server.responder = MyResponder() 107 108 if self.TraceOn(): 109 self.runCmd("log enable gdb-remote packets") 110 self.addTearDownHook( 111 lambda: self.runCmd("log disable gdb-remote packets")) 112 113 process = self.connect(target) 114 lldbutil.expect_state_changes(self, self.dbg.GetListener(), process, 115 [lldb.eStateStopped]) 116 117 registerSet = process.GetThreadAtIndex( 118 0).GetFrameAtIndex(0).GetRegisters().GetValueAtIndex(0) 119 120 reg_val_dict = { 121 "x0": 0x0000000000000020, "x1": 0x0000000000000020, 122 "x2": 0x0000ffffbf54c1f0, "x3": 0x480bea8f5a98aa5d, 123 "x4": 0x0000ffffbf54b9f0, "x5": 0x480b1570e5cc13ad, 124 "x6": 0x0000000000000038, "x7": 0x0000ffffbf6a4570, 125 "x8": 0x00000000000000a7, "x9": 0x0000000000000000, 126 "x10": 0x0101010101010101, "x11": 0x0000000000000000, 127 "x12": 0x0000ffffbf54c1f0, "x13": 0x000000000000270f, 128 "x14": 0x0000ffffbf55e308, "x15": 0x0000ffffbf550e08, 129 "x16": 0x0000000000411028, "x17": 0x0000ffffbf61de10, 130 "x18": 0x000000000000055c, "x19": 0x0000ffffbf54c1f0, 131 "x20": 0x0000fffffffffc90, "x21": 0x0000fffffffffc8e, 132 "x22": 0x0000fffffffffc8f, "x23": 0x0000000000000000, 133 "x24": 0x0000000000001000, "x25": 0x0000fffffffffc90, 134 "x26": 0x0000ffffbf6cd000, "x27": 0x0000ffffbf54c1f0, 135 "x28": 0x0000000000000001, "x29": 0x0000ffffbf54b9d0, 136 "x30": 0x00000000004007e4, "sp": 0x0000ffffbf54b9d0, 137 "pc": 0x00000000004007e4, "cpsr": 0x00001000, "w0": 0x00000020, 138 "w1": 0x00000020, "w2": 0xbf54c1f0, "w3": 0x5a98aa5d, 139 "w4": 0xbf54b9f0, "w5": 0xe5cc13ad, "w6": 0x00000038, 140 "w7": 0xbf6a4570, "w8": 0x000000a7, "w9": 0x00000000, 141 "w10": 0x01010101, "w11": 0x00000000, "w12": 0xbf54c1f0, 142 "w13": 0x0000270f, "w14": 0xbf55e308, "w15": 0xbf550e08, 143 "w16": 0x00411028, "w17": 0xbf61de10, "w18": 0x0000055c, 144 "w19": 0xbf54c1f0, "w20": 0xfffffc90, "w21": 0xfffffc8e, 145 "w22": 0xfffffc8f, "w23": 0x00000000, "w24": 0x00001000, 146 "w25": 0xfffffc90, "w26": 0xbf6cd000, "w27": 0xbf54c1f0, 147 "w28": 0x00000001 148 } 149 150 for reg in registerSet: 151 self.assertEqual(reg.GetValueAsUnsigned(), 152 reg_val_dict[reg.GetName()]) 153