1 //===-- GDBRemoteRegisterContext.cpp --------------------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "GDBRemoteRegisterContext.h" 10 11 #include "lldb/Target/ExecutionContext.h" 12 #include "lldb/Target/Target.h" 13 #include "lldb/Utility/DataBufferHeap.h" 14 #include "lldb/Utility/DataExtractor.h" 15 #include "lldb/Utility/RegisterValue.h" 16 #include "lldb/Utility/Scalar.h" 17 #include "lldb/Utility/StreamString.h" 18 #include "ProcessGDBRemote.h" 19 #include "ProcessGDBRemoteLog.h" 20 #include "ThreadGDBRemote.h" 21 #include "Utility/ARM_DWARF_Registers.h" 22 #include "Utility/ARM_ehframe_Registers.h" 23 #include "lldb/Utility/StringExtractorGDBRemote.h" 24 25 #include <memory> 26 27 using namespace lldb; 28 using namespace lldb_private; 29 using namespace lldb_private::process_gdb_remote; 30 31 // GDBRemoteRegisterContext constructor 32 GDBRemoteRegisterContext::GDBRemoteRegisterContext( 33 ThreadGDBRemote &thread, uint32_t concrete_frame_idx, 34 GDBRemoteDynamicRegisterInfoSP reg_info_sp, bool read_all_at_once, 35 bool write_all_at_once) 36 : RegisterContext(thread, concrete_frame_idx), 37 m_reg_info_sp(std::move(reg_info_sp)), m_reg_valid(), m_reg_data(), 38 m_read_all_at_once(read_all_at_once), 39 m_write_all_at_once(write_all_at_once), m_gpacket_cached(false) { 40 // Resize our vector of bools to contain one bool for every register. We will 41 // use these boolean values to know when a register value is valid in 42 // m_reg_data. 43 m_reg_valid.resize(m_reg_info_sp->GetNumRegisters()); 44 45 // Make a heap based buffer that is big enough to store all registers 46 DataBufferSP reg_data_sp( 47 new DataBufferHeap(m_reg_info_sp->GetRegisterDataByteSize(), 0)); 48 m_reg_data.SetData(reg_data_sp); 49 m_reg_data.SetByteOrder(thread.GetProcess()->GetByteOrder()); 50 } 51 52 // Destructor 53 GDBRemoteRegisterContext::~GDBRemoteRegisterContext() = default; 54 55 void GDBRemoteRegisterContext::InvalidateAllRegisters() { 56 SetAllRegisterValid(false); 57 } 58 59 void GDBRemoteRegisterContext::SetAllRegisterValid(bool b) { 60 m_gpacket_cached = b; 61 std::vector<bool>::iterator pos, end = m_reg_valid.end(); 62 for (pos = m_reg_valid.begin(); pos != end; ++pos) 63 *pos = b; 64 } 65 66 size_t GDBRemoteRegisterContext::GetRegisterCount() { 67 return m_reg_info_sp->GetNumRegisters(); 68 } 69 70 const RegisterInfo * 71 GDBRemoteRegisterContext::GetRegisterInfoAtIndex(size_t reg) { 72 return m_reg_info_sp->GetRegisterInfoAtIndex(reg); 73 } 74 75 size_t GDBRemoteRegisterContext::GetRegisterSetCount() { 76 return m_reg_info_sp->GetNumRegisterSets(); 77 } 78 79 const RegisterSet *GDBRemoteRegisterContext::GetRegisterSet(size_t reg_set) { 80 return m_reg_info_sp->GetRegisterSet(reg_set); 81 } 82 83 bool GDBRemoteRegisterContext::ReadRegister(const RegisterInfo *reg_info, 84 RegisterValue &value) { 85 // Read the register 86 if (ReadRegisterBytes(reg_info)) { 87 const uint32_t reg = reg_info->kinds[eRegisterKindLLDB]; 88 if (m_reg_valid[reg] == false) 89 return false; 90 const bool partial_data_ok = false; 91 Status error(value.SetValueFromData( 92 reg_info, m_reg_data, reg_info->byte_offset, partial_data_ok)); 93 return error.Success(); 94 } 95 return false; 96 } 97 98 bool GDBRemoteRegisterContext::PrivateSetRegisterValue( 99 uint32_t reg, llvm::ArrayRef<uint8_t> data) { 100 const RegisterInfo *reg_info = GetRegisterInfoAtIndex(reg); 101 if (reg_info == nullptr) 102 return false; 103 104 // Invalidate if needed 105 InvalidateIfNeeded(false); 106 107 const size_t reg_byte_size = reg_info->byte_size; 108 memcpy(const_cast<uint8_t *>( 109 m_reg_data.PeekData(reg_info->byte_offset, reg_byte_size)), 110 data.data(), std::min(data.size(), reg_byte_size)); 111 bool success = data.size() >= reg_byte_size; 112 if (success) { 113 SetRegisterIsValid(reg, true); 114 } else if (data.size() > 0) { 115 // Only set register is valid to false if we copied some bytes, else leave 116 // it as it was. 117 SetRegisterIsValid(reg, false); 118 } 119 return success; 120 } 121 122 bool GDBRemoteRegisterContext::PrivateSetRegisterValue(uint32_t reg, 123 uint64_t new_reg_val) { 124 const RegisterInfo *reg_info = GetRegisterInfoAtIndex(reg); 125 if (reg_info == nullptr) 126 return false; 127 128 // Early in process startup, we can get a thread that has an invalid byte 129 // order because the process hasn't been completely set up yet (see the ctor 130 // where the byte order is setfrom the process). If that's the case, we 131 // can't set the value here. 132 if (m_reg_data.GetByteOrder() == eByteOrderInvalid) { 133 return false; 134 } 135 136 // Invalidate if needed 137 InvalidateIfNeeded(false); 138 139 DataBufferSP buffer_sp(new DataBufferHeap(&new_reg_val, sizeof(new_reg_val))); 140 DataExtractor data(buffer_sp, endian::InlHostByteOrder(), sizeof(void *)); 141 142 // If our register context and our register info disagree, which should never 143 // happen, don't overwrite past the end of the buffer. 144 if (m_reg_data.GetByteSize() < reg_info->byte_offset + reg_info->byte_size) 145 return false; 146 147 // Grab a pointer to where we are going to put this register 148 uint8_t *dst = const_cast<uint8_t *>( 149 m_reg_data.PeekData(reg_info->byte_offset, reg_info->byte_size)); 150 151 if (dst == nullptr) 152 return false; 153 154 if (data.CopyByteOrderedData(0, // src offset 155 reg_info->byte_size, // src length 156 dst, // dst 157 reg_info->byte_size, // dst length 158 m_reg_data.GetByteOrder())) // dst byte order 159 { 160 SetRegisterIsValid(reg, true); 161 return true; 162 } 163 return false; 164 } 165 166 // Helper function for GDBRemoteRegisterContext::ReadRegisterBytes(). 167 bool GDBRemoteRegisterContext::GetPrimordialRegister( 168 const RegisterInfo *reg_info, GDBRemoteCommunicationClient &gdb_comm) { 169 const uint32_t lldb_reg = reg_info->kinds[eRegisterKindLLDB]; 170 const uint32_t remote_reg = reg_info->kinds[eRegisterKindProcessPlugin]; 171 172 if (DataBufferSP buffer_sp = 173 gdb_comm.ReadRegister(m_thread.GetProtocolID(), remote_reg)) 174 return PrivateSetRegisterValue( 175 lldb_reg, llvm::ArrayRef<uint8_t>(buffer_sp->GetBytes(), 176 buffer_sp->GetByteSize())); 177 return false; 178 } 179 180 bool GDBRemoteRegisterContext::ReadRegisterBytes(const RegisterInfo *reg_info) { 181 ExecutionContext exe_ctx(CalculateThread()); 182 183 Process *process = exe_ctx.GetProcessPtr(); 184 Thread *thread = exe_ctx.GetThreadPtr(); 185 if (process == nullptr || thread == nullptr) 186 return false; 187 188 GDBRemoteCommunicationClient &gdb_comm( 189 ((ProcessGDBRemote *)process)->GetGDBRemote()); 190 191 InvalidateIfNeeded(false); 192 193 const uint32_t reg = reg_info->kinds[eRegisterKindLLDB]; 194 195 if (!GetRegisterIsValid(reg)) { 196 if (m_read_all_at_once && !m_gpacket_cached) { 197 if (DataBufferSP buffer_sp = 198 gdb_comm.ReadAllRegisters(m_thread.GetProtocolID())) { 199 memcpy(const_cast<uint8_t *>(m_reg_data.GetDataStart()), 200 buffer_sp->GetBytes(), 201 std::min(buffer_sp->GetByteSize(), m_reg_data.GetByteSize())); 202 if (buffer_sp->GetByteSize() >= m_reg_data.GetByteSize()) { 203 SetAllRegisterValid(true); 204 return true; 205 } else if (buffer_sp->GetByteSize() > 0) { 206 for (auto x : llvm::enumerate(m_reg_info_sp->registers())) { 207 const struct RegisterInfo ®info = x.value(); 208 m_reg_valid[x.index()] = 209 (reginfo.byte_offset + reginfo.byte_size <= 210 buffer_sp->GetByteSize()); 211 } 212 213 m_gpacket_cached = true; 214 if (GetRegisterIsValid(reg)) 215 return true; 216 } else { 217 Log *log(ProcessGDBRemoteLog::GetLogIfAnyCategoryIsSet(GDBR_LOG_THREAD | 218 GDBR_LOG_PACKETS)); 219 LLDB_LOGF( 220 log, 221 "error: GDBRemoteRegisterContext::ReadRegisterBytes tried " 222 "to read the " 223 "entire register context at once, expected at least %" PRId64 224 " bytes " 225 "but only got %" PRId64 " bytes.", 226 m_reg_data.GetByteSize(), buffer_sp->GetByteSize()); 227 return false; 228 } 229 } 230 } 231 if (reg_info->value_regs) { 232 // Process this composite register request by delegating to the 233 // constituent primordial registers. 234 235 // Index of the primordial register. 236 bool success = true; 237 for (uint32_t idx = 0; success; ++idx) { 238 const uint32_t prim_reg = reg_info->value_regs[idx]; 239 if (prim_reg == LLDB_INVALID_REGNUM) 240 break; 241 // We have a valid primordial register as our constituent. Grab the 242 // corresponding register info. 243 const RegisterInfo *prim_reg_info = 244 GetRegisterInfo(eRegisterKindLLDB, prim_reg); 245 if (prim_reg_info == nullptr) 246 success = false; 247 else { 248 // Read the containing register if it hasn't already been read 249 if (!GetRegisterIsValid(prim_reg)) 250 success = GetPrimordialRegister(prim_reg_info, gdb_comm); 251 } 252 } 253 254 if (success) { 255 // If we reach this point, all primordial register requests have 256 // succeeded. Validate this composite register. 257 SetRegisterIsValid(reg_info, true); 258 } 259 } else { 260 // Get each register individually 261 GetPrimordialRegister(reg_info, gdb_comm); 262 } 263 264 // Make sure we got a valid register value after reading it 265 if (!GetRegisterIsValid(reg)) 266 return false; 267 } 268 269 return true; 270 } 271 272 bool GDBRemoteRegisterContext::WriteRegister(const RegisterInfo *reg_info, 273 const RegisterValue &value) { 274 DataExtractor data; 275 if (value.GetData(data)) 276 return WriteRegisterBytes(reg_info, data, 0); 277 return false; 278 } 279 280 // Helper function for GDBRemoteRegisterContext::WriteRegisterBytes(). 281 bool GDBRemoteRegisterContext::SetPrimordialRegister( 282 const RegisterInfo *reg_info, GDBRemoteCommunicationClient &gdb_comm) { 283 StreamString packet; 284 StringExtractorGDBRemote response; 285 const uint32_t reg = reg_info->kinds[eRegisterKindLLDB]; 286 // Invalidate just this register 287 SetRegisterIsValid(reg, false); 288 289 return gdb_comm.WriteRegister( 290 m_thread.GetProtocolID(), reg_info->kinds[eRegisterKindProcessPlugin], 291 {m_reg_data.PeekData(reg_info->byte_offset, reg_info->byte_size), 292 reg_info->byte_size}); 293 } 294 295 bool GDBRemoteRegisterContext::WriteRegisterBytes(const RegisterInfo *reg_info, 296 DataExtractor &data, 297 uint32_t data_offset) { 298 ExecutionContext exe_ctx(CalculateThread()); 299 300 Process *process = exe_ctx.GetProcessPtr(); 301 Thread *thread = exe_ctx.GetThreadPtr(); 302 if (process == nullptr || thread == nullptr) 303 return false; 304 305 GDBRemoteCommunicationClient &gdb_comm( 306 ((ProcessGDBRemote *)process)->GetGDBRemote()); 307 308 assert(m_reg_data.GetByteSize() >= 309 reg_info->byte_offset + reg_info->byte_size); 310 311 // If our register context and our register info disagree, which should never 312 // happen, don't overwrite past the end of the buffer. 313 if (m_reg_data.GetByteSize() < reg_info->byte_offset + reg_info->byte_size) 314 return false; 315 316 // Grab a pointer to where we are going to put this register 317 uint8_t *dst = const_cast<uint8_t *>( 318 m_reg_data.PeekData(reg_info->byte_offset, reg_info->byte_size)); 319 320 if (dst == nullptr) 321 return false; 322 323 // Code below is specific to AArch64 target in SVE state 324 // If vector granule (vg) register is being written then thread's 325 // register context reconfiguration is triggered on success. 326 bool do_reconfigure_arm64_sve = false; 327 const ArchSpec &arch = process->GetTarget().GetArchitecture(); 328 if (arch.IsValid() && arch.GetTriple().isAArch64()) 329 if (strcmp(reg_info->name, "vg") == 0) 330 do_reconfigure_arm64_sve = true; 331 332 if (data.CopyByteOrderedData(data_offset, // src offset 333 reg_info->byte_size, // src length 334 dst, // dst 335 reg_info->byte_size, // dst length 336 m_reg_data.GetByteOrder())) // dst byte order 337 { 338 GDBRemoteClientBase::Lock lock(gdb_comm); 339 if (lock) { 340 if (m_write_all_at_once) { 341 // Invalidate all register values 342 InvalidateIfNeeded(true); 343 344 // Set all registers in one packet 345 if (gdb_comm.WriteAllRegisters( 346 m_thread.GetProtocolID(), 347 {m_reg_data.GetDataStart(), size_t(m_reg_data.GetByteSize())})) 348 349 { 350 SetAllRegisterValid(false); 351 352 if (do_reconfigure_arm64_sve) 353 AArch64SVEReconfigure(); 354 355 return true; 356 } 357 } else { 358 bool success = true; 359 360 if (reg_info->value_regs) { 361 // This register is part of another register. In this case we read 362 // the actual register data for any "value_regs", and once all that 363 // data is read, we will have enough data in our register context 364 // bytes for the value of this register 365 366 // Invalidate this composite register first. 367 368 for (uint32_t idx = 0; success; ++idx) { 369 const uint32_t reg = reg_info->value_regs[idx]; 370 if (reg == LLDB_INVALID_REGNUM) 371 break; 372 // We have a valid primordial register as our constituent. Grab the 373 // corresponding register info. 374 const RegisterInfo *value_reg_info = 375 GetRegisterInfo(eRegisterKindLLDB, reg); 376 if (value_reg_info == nullptr) 377 success = false; 378 else 379 success = SetPrimordialRegister(value_reg_info, gdb_comm); 380 } 381 } else { 382 // This is an actual register, write it 383 success = SetPrimordialRegister(reg_info, gdb_comm); 384 385 if (success && do_reconfigure_arm64_sve) 386 AArch64SVEReconfigure(); 387 } 388 389 // Check if writing this register will invalidate any other register 390 // values? If so, invalidate them 391 if (reg_info->invalidate_regs) { 392 for (uint32_t idx = 0, reg = reg_info->invalidate_regs[0]; 393 reg != LLDB_INVALID_REGNUM; 394 reg = reg_info->invalidate_regs[++idx]) 395 SetRegisterIsValid(ConvertRegisterKindToRegisterNumber( 396 eRegisterKindLLDB, reg), 397 false); 398 } 399 400 return success; 401 } 402 } else { 403 Log *log(ProcessGDBRemoteLog::GetLogIfAnyCategoryIsSet(GDBR_LOG_THREAD | 404 GDBR_LOG_PACKETS)); 405 if (log) { 406 if (log->GetVerbose()) { 407 StreamString strm; 408 gdb_comm.DumpHistory(strm); 409 LLDB_LOGF(log, 410 "error: failed to get packet sequence mutex, not sending " 411 "write register for \"%s\":\n%s", 412 reg_info->name, strm.GetData()); 413 } else 414 LLDB_LOGF(log, 415 "error: failed to get packet sequence mutex, not sending " 416 "write register for \"%s\"", 417 reg_info->name); 418 } 419 } 420 } 421 return false; 422 } 423 424 bool GDBRemoteRegisterContext::ReadAllRegisterValues( 425 RegisterCheckpoint ®_checkpoint) { 426 ExecutionContext exe_ctx(CalculateThread()); 427 428 Process *process = exe_ctx.GetProcessPtr(); 429 Thread *thread = exe_ctx.GetThreadPtr(); 430 if (process == nullptr || thread == nullptr) 431 return false; 432 433 GDBRemoteCommunicationClient &gdb_comm( 434 ((ProcessGDBRemote *)process)->GetGDBRemote()); 435 436 uint32_t save_id = 0; 437 if (gdb_comm.SaveRegisterState(thread->GetProtocolID(), save_id)) { 438 reg_checkpoint.SetID(save_id); 439 reg_checkpoint.GetData().reset(); 440 return true; 441 } else { 442 reg_checkpoint.SetID(0); // Invalid save ID is zero 443 return ReadAllRegisterValues(reg_checkpoint.GetData()); 444 } 445 } 446 447 bool GDBRemoteRegisterContext::WriteAllRegisterValues( 448 const RegisterCheckpoint ®_checkpoint) { 449 uint32_t save_id = reg_checkpoint.GetID(); 450 if (save_id != 0) { 451 ExecutionContext exe_ctx(CalculateThread()); 452 453 Process *process = exe_ctx.GetProcessPtr(); 454 Thread *thread = exe_ctx.GetThreadPtr(); 455 if (process == nullptr || thread == nullptr) 456 return false; 457 458 GDBRemoteCommunicationClient &gdb_comm( 459 ((ProcessGDBRemote *)process)->GetGDBRemote()); 460 461 return gdb_comm.RestoreRegisterState(m_thread.GetProtocolID(), save_id); 462 } else { 463 return WriteAllRegisterValues(reg_checkpoint.GetData()); 464 } 465 } 466 467 bool GDBRemoteRegisterContext::ReadAllRegisterValues( 468 lldb::DataBufferSP &data_sp) { 469 ExecutionContext exe_ctx(CalculateThread()); 470 471 Process *process = exe_ctx.GetProcessPtr(); 472 Thread *thread = exe_ctx.GetThreadPtr(); 473 if (process == nullptr || thread == nullptr) 474 return false; 475 476 GDBRemoteCommunicationClient &gdb_comm( 477 ((ProcessGDBRemote *)process)->GetGDBRemote()); 478 479 const bool use_g_packet = 480 !gdb_comm.AvoidGPackets((ProcessGDBRemote *)process); 481 482 GDBRemoteClientBase::Lock lock(gdb_comm); 483 if (lock) { 484 if (gdb_comm.SyncThreadState(m_thread.GetProtocolID())) 485 InvalidateAllRegisters(); 486 487 if (use_g_packet && 488 (data_sp = gdb_comm.ReadAllRegisters(m_thread.GetProtocolID()))) 489 return true; 490 491 // We're going to read each register 492 // individually and store them as binary data in a buffer. 493 const RegisterInfo *reg_info; 494 495 for (uint32_t i = 0; (reg_info = GetRegisterInfoAtIndex(i)) != nullptr; 496 i++) { 497 if (reg_info 498 ->value_regs) // skip registers that are slices of real registers 499 continue; 500 ReadRegisterBytes(reg_info); 501 // ReadRegisterBytes saves the contents of the register in to the 502 // m_reg_data buffer 503 } 504 data_sp = std::make_shared<DataBufferHeap>( 505 m_reg_data.GetDataStart(), m_reg_info_sp->GetRegisterDataByteSize()); 506 return true; 507 } else { 508 509 Log *log(ProcessGDBRemoteLog::GetLogIfAnyCategoryIsSet(GDBR_LOG_THREAD | 510 GDBR_LOG_PACKETS)); 511 if (log) { 512 if (log->GetVerbose()) { 513 StreamString strm; 514 gdb_comm.DumpHistory(strm); 515 LLDB_LOGF(log, 516 "error: failed to get packet sequence mutex, not sending " 517 "read all registers:\n%s", 518 strm.GetData()); 519 } else 520 LLDB_LOGF(log, 521 "error: failed to get packet sequence mutex, not sending " 522 "read all registers"); 523 } 524 } 525 526 data_sp.reset(); 527 return false; 528 } 529 530 bool GDBRemoteRegisterContext::WriteAllRegisterValues( 531 const lldb::DataBufferSP &data_sp) { 532 if (!data_sp || data_sp->GetBytes() == nullptr || data_sp->GetByteSize() == 0) 533 return false; 534 535 ExecutionContext exe_ctx(CalculateThread()); 536 537 Process *process = exe_ctx.GetProcessPtr(); 538 Thread *thread = exe_ctx.GetThreadPtr(); 539 if (process == nullptr || thread == nullptr) 540 return false; 541 542 GDBRemoteCommunicationClient &gdb_comm( 543 ((ProcessGDBRemote *)process)->GetGDBRemote()); 544 545 const bool use_g_packet = 546 !gdb_comm.AvoidGPackets((ProcessGDBRemote *)process); 547 548 GDBRemoteClientBase::Lock lock(gdb_comm); 549 if (lock) { 550 // The data_sp contains the G response packet. 551 if (use_g_packet) { 552 if (gdb_comm.WriteAllRegisters( 553 m_thread.GetProtocolID(), 554 {data_sp->GetBytes(), size_t(data_sp->GetByteSize())})) 555 return true; 556 557 uint32_t num_restored = 0; 558 // We need to manually go through all of the registers and restore them 559 // manually 560 DataExtractor restore_data(data_sp, m_reg_data.GetByteOrder(), 561 m_reg_data.GetAddressByteSize()); 562 563 const RegisterInfo *reg_info; 564 565 // The g packet contents may either include the slice registers 566 // (registers defined in terms of other registers, e.g. eax is a subset 567 // of rax) or not. The slice registers should NOT be in the g packet, 568 // but some implementations may incorrectly include them. 569 // 570 // If the slice registers are included in the packet, we must step over 571 // the slice registers when parsing the packet -- relying on the 572 // RegisterInfo byte_offset field would be incorrect. If the slice 573 // registers are not included, then using the byte_offset values into the 574 // data buffer is the best way to find individual register values. 575 576 uint64_t size_including_slice_registers = 0; 577 uint64_t size_not_including_slice_registers = 0; 578 uint64_t size_by_highest_offset = 0; 579 580 for (uint32_t reg_idx = 0; 581 (reg_info = GetRegisterInfoAtIndex(reg_idx)) != nullptr; ++reg_idx) { 582 size_including_slice_registers += reg_info->byte_size; 583 if (reg_info->value_regs == nullptr) 584 size_not_including_slice_registers += reg_info->byte_size; 585 if (reg_info->byte_offset >= size_by_highest_offset) 586 size_by_highest_offset = reg_info->byte_offset + reg_info->byte_size; 587 } 588 589 bool use_byte_offset_into_buffer; 590 if (size_by_highest_offset == restore_data.GetByteSize()) { 591 // The size of the packet agrees with the highest offset: + size in the 592 // register file 593 use_byte_offset_into_buffer = true; 594 } else if (size_not_including_slice_registers == 595 restore_data.GetByteSize()) { 596 // The size of the packet is the same as concatenating all of the 597 // registers sequentially, skipping the slice registers 598 use_byte_offset_into_buffer = true; 599 } else if (size_including_slice_registers == restore_data.GetByteSize()) { 600 // The slice registers are present in the packet (when they shouldn't 601 // be). Don't try to use the RegisterInfo byte_offset into the 602 // restore_data, it will point to the wrong place. 603 use_byte_offset_into_buffer = false; 604 } else { 605 // None of our expected sizes match the actual g packet data we're 606 // looking at. The most conservative approach here is to use the 607 // running total byte offset. 608 use_byte_offset_into_buffer = false; 609 } 610 611 // In case our register definitions don't include the correct offsets, 612 // keep track of the size of each reg & compute offset based on that. 613 uint32_t running_byte_offset = 0; 614 for (uint32_t reg_idx = 0; 615 (reg_info = GetRegisterInfoAtIndex(reg_idx)) != nullptr; 616 ++reg_idx, running_byte_offset += reg_info->byte_size) { 617 // Skip composite aka slice registers (e.g. eax is a slice of rax). 618 if (reg_info->value_regs) 619 continue; 620 621 const uint32_t reg = reg_info->kinds[eRegisterKindLLDB]; 622 623 uint32_t register_offset; 624 if (use_byte_offset_into_buffer) { 625 register_offset = reg_info->byte_offset; 626 } else { 627 register_offset = running_byte_offset; 628 } 629 630 const uint32_t reg_byte_size = reg_info->byte_size; 631 632 const uint8_t *restore_src = 633 restore_data.PeekData(register_offset, reg_byte_size); 634 if (restore_src) { 635 SetRegisterIsValid(reg, false); 636 if (gdb_comm.WriteRegister( 637 m_thread.GetProtocolID(), 638 reg_info->kinds[eRegisterKindProcessPlugin], 639 {restore_src, reg_byte_size})) 640 ++num_restored; 641 } 642 } 643 return num_restored > 0; 644 } else { 645 // For the use_g_packet == false case, we're going to write each register 646 // individually. The data buffer is binary data in this case, instead of 647 // ascii characters. 648 649 bool arm64_debugserver = false; 650 if (m_thread.GetProcess().get()) { 651 const ArchSpec &arch = 652 m_thread.GetProcess()->GetTarget().GetArchitecture(); 653 if (arch.IsValid() && (arch.GetMachine() == llvm::Triple::aarch64 || 654 arch.GetMachine() == llvm::Triple::aarch64_32) && 655 arch.GetTriple().getVendor() == llvm::Triple::Apple && 656 arch.GetTriple().getOS() == llvm::Triple::IOS) { 657 arm64_debugserver = true; 658 } 659 } 660 uint32_t num_restored = 0; 661 const RegisterInfo *reg_info; 662 for (uint32_t i = 0; (reg_info = GetRegisterInfoAtIndex(i)) != nullptr; 663 i++) { 664 if (reg_info->value_regs) // skip registers that are slices of real 665 // registers 666 continue; 667 // Skip the fpsr and fpcr floating point status/control register 668 // writing to work around a bug in an older version of debugserver that 669 // would lead to register context corruption when writing fpsr/fpcr. 670 if (arm64_debugserver && (strcmp(reg_info->name, "fpsr") == 0 || 671 strcmp(reg_info->name, "fpcr") == 0)) { 672 continue; 673 } 674 675 SetRegisterIsValid(reg_info, false); 676 if (gdb_comm.WriteRegister(m_thread.GetProtocolID(), 677 reg_info->kinds[eRegisterKindProcessPlugin], 678 {data_sp->GetBytes() + reg_info->byte_offset, 679 reg_info->byte_size})) 680 ++num_restored; 681 } 682 return num_restored > 0; 683 } 684 } else { 685 Log *log(ProcessGDBRemoteLog::GetLogIfAnyCategoryIsSet(GDBR_LOG_THREAD | 686 GDBR_LOG_PACKETS)); 687 if (log) { 688 if (log->GetVerbose()) { 689 StreamString strm; 690 gdb_comm.DumpHistory(strm); 691 LLDB_LOGF(log, 692 "error: failed to get packet sequence mutex, not sending " 693 "write all registers:\n%s", 694 strm.GetData()); 695 } else 696 LLDB_LOGF(log, 697 "error: failed to get packet sequence mutex, not sending " 698 "write all registers"); 699 } 700 } 701 return false; 702 } 703 704 uint32_t GDBRemoteRegisterContext::ConvertRegisterKindToRegisterNumber( 705 lldb::RegisterKind kind, uint32_t num) { 706 return m_reg_info_sp->ConvertRegisterKindToRegisterNumber(kind, num); 707 } 708 709 bool GDBRemoteRegisterContext::AArch64SVEReconfigure() { 710 if (!m_reg_info_sp) 711 return false; 712 713 const RegisterInfo *reg_info = m_reg_info_sp->GetRegisterInfo("vg"); 714 if (!reg_info) 715 return false; 716 717 uint64_t fail_value = LLDB_INVALID_ADDRESS; 718 uint32_t vg_reg_num = reg_info->kinds[eRegisterKindLLDB]; 719 uint64_t vg_reg_value = ReadRegisterAsUnsigned(vg_reg_num, fail_value); 720 721 if (vg_reg_value != fail_value && vg_reg_value <= 32) { 722 const RegisterInfo *reg_info = m_reg_info_sp->GetRegisterInfo("p0"); 723 if (!reg_info || vg_reg_value == reg_info->byte_size) 724 return false; 725 726 if (m_reg_info_sp->UpdateARM64SVERegistersInfos(vg_reg_value)) { 727 // Make a heap based buffer that is big enough to store all registers 728 m_reg_data.SetData(std::make_shared<DataBufferHeap>( 729 m_reg_info_sp->GetRegisterDataByteSize(), 0)); 730 m_reg_data.SetByteOrder(GetByteOrder()); 731 732 InvalidateAllRegisters(); 733 734 return true; 735 } 736 } 737 738 return false; 739 } 740 741 bool GDBRemoteDynamicRegisterInfo::UpdateARM64SVERegistersInfos(uint64_t vg) { 742 // SVE Z register size is vg x 8 bytes. 743 uint32_t z_reg_byte_size = vg * 8; 744 745 // SVE vector length has changed, accordingly set size of Z, P and FFR 746 // registers. Also invalidate register offsets it will be recalculated 747 // after SVE register size update. 748 for (auto ® : m_regs) { 749 if (reg.value_regs == nullptr) { 750 if (reg.name[0] == 'z' && isdigit(reg.name[1])) 751 reg.byte_size = z_reg_byte_size; 752 else if (reg.name[0] == 'p' && isdigit(reg.name[1])) 753 reg.byte_size = vg; 754 else if (strcmp(reg.name, "ffr") == 0) 755 reg.byte_size = vg; 756 } 757 reg.byte_offset = LLDB_INVALID_INDEX32; 758 } 759 760 // Re-calculate register offsets 761 ConfigureOffsets(); 762 return true; 763 } 764 765 void GDBRemoteDynamicRegisterInfo::HardcodeARMRegisters(bool from_scratch) { 766 // For Advanced SIMD and VFP register mapping. 767 static uint32_t g_d0_regs[] = {26, 27, LLDB_INVALID_REGNUM}; // (s0, s1) 768 static uint32_t g_d1_regs[] = {28, 29, LLDB_INVALID_REGNUM}; // (s2, s3) 769 static uint32_t g_d2_regs[] = {30, 31, LLDB_INVALID_REGNUM}; // (s4, s5) 770 static uint32_t g_d3_regs[] = {32, 33, LLDB_INVALID_REGNUM}; // (s6, s7) 771 static uint32_t g_d4_regs[] = {34, 35, LLDB_INVALID_REGNUM}; // (s8, s9) 772 static uint32_t g_d5_regs[] = {36, 37, LLDB_INVALID_REGNUM}; // (s10, s11) 773 static uint32_t g_d6_regs[] = {38, 39, LLDB_INVALID_REGNUM}; // (s12, s13) 774 static uint32_t g_d7_regs[] = {40, 41, LLDB_INVALID_REGNUM}; // (s14, s15) 775 static uint32_t g_d8_regs[] = {42, 43, LLDB_INVALID_REGNUM}; // (s16, s17) 776 static uint32_t g_d9_regs[] = {44, 45, LLDB_INVALID_REGNUM}; // (s18, s19) 777 static uint32_t g_d10_regs[] = {46, 47, LLDB_INVALID_REGNUM}; // (s20, s21) 778 static uint32_t g_d11_regs[] = {48, 49, LLDB_INVALID_REGNUM}; // (s22, s23) 779 static uint32_t g_d12_regs[] = {50, 51, LLDB_INVALID_REGNUM}; // (s24, s25) 780 static uint32_t g_d13_regs[] = {52, 53, LLDB_INVALID_REGNUM}; // (s26, s27) 781 static uint32_t g_d14_regs[] = {54, 55, LLDB_INVALID_REGNUM}; // (s28, s29) 782 static uint32_t g_d15_regs[] = {56, 57, LLDB_INVALID_REGNUM}; // (s30, s31) 783 static uint32_t g_q0_regs[] = { 784 26, 27, 28, 29, LLDB_INVALID_REGNUM}; // (d0, d1) -> (s0, s1, s2, s3) 785 static uint32_t g_q1_regs[] = { 786 30, 31, 32, 33, LLDB_INVALID_REGNUM}; // (d2, d3) -> (s4, s5, s6, s7) 787 static uint32_t g_q2_regs[] = { 788 34, 35, 36, 37, LLDB_INVALID_REGNUM}; // (d4, d5) -> (s8, s9, s10, s11) 789 static uint32_t g_q3_regs[] = { 790 38, 39, 40, 41, LLDB_INVALID_REGNUM}; // (d6, d7) -> (s12, s13, s14, s15) 791 static uint32_t g_q4_regs[] = { 792 42, 43, 44, 45, LLDB_INVALID_REGNUM}; // (d8, d9) -> (s16, s17, s18, s19) 793 static uint32_t g_q5_regs[] = { 794 46, 47, 48, 49, 795 LLDB_INVALID_REGNUM}; // (d10, d11) -> (s20, s21, s22, s23) 796 static uint32_t g_q6_regs[] = { 797 50, 51, 52, 53, 798 LLDB_INVALID_REGNUM}; // (d12, d13) -> (s24, s25, s26, s27) 799 static uint32_t g_q7_regs[] = { 800 54, 55, 56, 57, 801 LLDB_INVALID_REGNUM}; // (d14, d15) -> (s28, s29, s30, s31) 802 static uint32_t g_q8_regs[] = {59, 60, LLDB_INVALID_REGNUM}; // (d16, d17) 803 static uint32_t g_q9_regs[] = {61, 62, LLDB_INVALID_REGNUM}; // (d18, d19) 804 static uint32_t g_q10_regs[] = {63, 64, LLDB_INVALID_REGNUM}; // (d20, d21) 805 static uint32_t g_q11_regs[] = {65, 66, LLDB_INVALID_REGNUM}; // (d22, d23) 806 static uint32_t g_q12_regs[] = {67, 68, LLDB_INVALID_REGNUM}; // (d24, d25) 807 static uint32_t g_q13_regs[] = {69, 70, LLDB_INVALID_REGNUM}; // (d26, d27) 808 static uint32_t g_q14_regs[] = {71, 72, LLDB_INVALID_REGNUM}; // (d28, d29) 809 static uint32_t g_q15_regs[] = {73, 74, LLDB_INVALID_REGNUM}; // (d30, d31) 810 811 // This is our array of composite registers, with each element coming from 812 // the above register mappings. 813 static uint32_t *g_composites[] = { 814 g_d0_regs, g_d1_regs, g_d2_regs, g_d3_regs, g_d4_regs, g_d5_regs, 815 g_d6_regs, g_d7_regs, g_d8_regs, g_d9_regs, g_d10_regs, g_d11_regs, 816 g_d12_regs, g_d13_regs, g_d14_regs, g_d15_regs, g_q0_regs, g_q1_regs, 817 g_q2_regs, g_q3_regs, g_q4_regs, g_q5_regs, g_q6_regs, g_q7_regs, 818 g_q8_regs, g_q9_regs, g_q10_regs, g_q11_regs, g_q12_regs, g_q13_regs, 819 g_q14_regs, g_q15_regs}; 820 821 // clang-format off 822 static RegisterInfo g_register_infos[] = { 823 // NAME ALT SZ OFF ENCODING FORMAT EH_FRAME DWARF GENERIC PROCESS PLUGIN LLDB VALUE REGS INVALIDATE REGS 824 // ====== ====== === === ============= ========== =================== =================== ====================== ============= ==== ========== =============== 825 { "r0", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r0, dwarf_r0, LLDB_REGNUM_GENERIC_ARG1,0, 0 }, nullptr, nullptr }, 826 { "r1", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r1, dwarf_r1, LLDB_REGNUM_GENERIC_ARG2,1, 1 }, nullptr, nullptr }, 827 { "r2", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r2, dwarf_r2, LLDB_REGNUM_GENERIC_ARG3,2, 2 }, nullptr, nullptr }, 828 { "r3", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r3, dwarf_r3, LLDB_REGNUM_GENERIC_ARG4,3, 3 }, nullptr, nullptr }, 829 { "r4", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r4, dwarf_r4, LLDB_INVALID_REGNUM, 4, 4 }, nullptr, nullptr }, 830 { "r5", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r5, dwarf_r5, LLDB_INVALID_REGNUM, 5, 5 }, nullptr, nullptr }, 831 { "r6", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r6, dwarf_r6, LLDB_INVALID_REGNUM, 6, 6 }, nullptr, nullptr }, 832 { "r7", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r7, dwarf_r7, LLDB_REGNUM_GENERIC_FP, 7, 7 }, nullptr, nullptr }, 833 { "r8", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r8, dwarf_r8, LLDB_INVALID_REGNUM, 8, 8 }, nullptr, nullptr }, 834 { "r9", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r9, dwarf_r9, LLDB_INVALID_REGNUM, 9, 9 }, nullptr, nullptr }, 835 { "r10", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r10, dwarf_r10, LLDB_INVALID_REGNUM, 10, 10 }, nullptr, nullptr }, 836 { "r11", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r11, dwarf_r11, LLDB_INVALID_REGNUM, 11, 11 }, nullptr, nullptr }, 837 { "r12", nullptr, 4, 0, eEncodingUint, eFormatHex, { ehframe_r12, dwarf_r12, LLDB_INVALID_REGNUM, 12, 12 }, nullptr, nullptr }, 838 { "sp", "r13", 4, 0, eEncodingUint, eFormatHex, { ehframe_sp, dwarf_sp, LLDB_REGNUM_GENERIC_SP, 13, 13 }, nullptr, nullptr }, 839 { "lr", "r14", 4, 0, eEncodingUint, eFormatHex, { ehframe_lr, dwarf_lr, LLDB_REGNUM_GENERIC_RA, 14, 14 }, nullptr, nullptr }, 840 { "pc", "r15", 4, 0, eEncodingUint, eFormatHex, { ehframe_pc, dwarf_pc, LLDB_REGNUM_GENERIC_PC, 15, 15 }, nullptr, nullptr }, 841 { "f0", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 16, 16 }, nullptr, nullptr }, 842 { "f1", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 17, 17 }, nullptr, nullptr }, 843 { "f2", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 18, 18 }, nullptr, nullptr }, 844 { "f3", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 19, 19 }, nullptr, nullptr }, 845 { "f4", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 20, 20 }, nullptr, nullptr }, 846 { "f5", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 21, 21 }, nullptr, nullptr }, 847 { "f6", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 22, 22 }, nullptr, nullptr }, 848 { "f7", nullptr, 12, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 23, 23 }, nullptr, nullptr }, 849 { "fps", nullptr, 4, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 24, 24 }, nullptr, nullptr }, 850 { "cpsr","flags", 4, 0, eEncodingUint, eFormatHex, { ehframe_cpsr, dwarf_cpsr, LLDB_INVALID_REGNUM, 25, 25 }, nullptr, nullptr }, 851 { "s0", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s0, LLDB_INVALID_REGNUM, 26, 26 }, nullptr, nullptr }, 852 { "s1", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s1, LLDB_INVALID_REGNUM, 27, 27 }, nullptr, nullptr }, 853 { "s2", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s2, LLDB_INVALID_REGNUM, 28, 28 }, nullptr, nullptr }, 854 { "s3", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s3, LLDB_INVALID_REGNUM, 29, 29 }, nullptr, nullptr }, 855 { "s4", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s4, LLDB_INVALID_REGNUM, 30, 30 }, nullptr, nullptr }, 856 { "s5", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s5, LLDB_INVALID_REGNUM, 31, 31 }, nullptr, nullptr }, 857 { "s6", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s6, LLDB_INVALID_REGNUM, 32, 32 }, nullptr, nullptr }, 858 { "s7", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s7, LLDB_INVALID_REGNUM, 33, 33 }, nullptr, nullptr }, 859 { "s8", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s8, LLDB_INVALID_REGNUM, 34, 34 }, nullptr, nullptr }, 860 { "s9", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s9, LLDB_INVALID_REGNUM, 35, 35 }, nullptr, nullptr }, 861 { "s10", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s10, LLDB_INVALID_REGNUM, 36, 36 }, nullptr, nullptr }, 862 { "s11", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s11, LLDB_INVALID_REGNUM, 37, 37 }, nullptr, nullptr }, 863 { "s12", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s12, LLDB_INVALID_REGNUM, 38, 38 }, nullptr, nullptr }, 864 { "s13", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s13, LLDB_INVALID_REGNUM, 39, 39 }, nullptr, nullptr }, 865 { "s14", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s14, LLDB_INVALID_REGNUM, 40, 40 }, nullptr, nullptr }, 866 { "s15", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s15, LLDB_INVALID_REGNUM, 41, 41 }, nullptr, nullptr }, 867 { "s16", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s16, LLDB_INVALID_REGNUM, 42, 42 }, nullptr, nullptr }, 868 { "s17", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s17, LLDB_INVALID_REGNUM, 43, 43 }, nullptr, nullptr }, 869 { "s18", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s18, LLDB_INVALID_REGNUM, 44, 44 }, nullptr, nullptr }, 870 { "s19", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s19, LLDB_INVALID_REGNUM, 45, 45 }, nullptr, nullptr }, 871 { "s20", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s20, LLDB_INVALID_REGNUM, 46, 46 }, nullptr, nullptr }, 872 { "s21", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s21, LLDB_INVALID_REGNUM, 47, 47 }, nullptr, nullptr }, 873 { "s22", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s22, LLDB_INVALID_REGNUM, 48, 48 }, nullptr, nullptr }, 874 { "s23", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s23, LLDB_INVALID_REGNUM, 49, 49 }, nullptr, nullptr }, 875 { "s24", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s24, LLDB_INVALID_REGNUM, 50, 50 }, nullptr, nullptr }, 876 { "s25", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s25, LLDB_INVALID_REGNUM, 51, 51 }, nullptr, nullptr }, 877 { "s26", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s26, LLDB_INVALID_REGNUM, 52, 52 }, nullptr, nullptr }, 878 { "s27", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s27, LLDB_INVALID_REGNUM, 53, 53 }, nullptr, nullptr }, 879 { "s28", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s28, LLDB_INVALID_REGNUM, 54, 54 }, nullptr, nullptr }, 880 { "s29", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s29, LLDB_INVALID_REGNUM, 55, 55 }, nullptr, nullptr }, 881 { "s30", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s30, LLDB_INVALID_REGNUM, 56, 56 }, nullptr, nullptr }, 882 { "s31", nullptr, 4, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_s31, LLDB_INVALID_REGNUM, 57, 57 }, nullptr, nullptr }, 883 { "fpscr",nullptr, 4, 0, eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, 58, 58 }, nullptr, nullptr }, 884 { "d16", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d16, LLDB_INVALID_REGNUM, 59, 59 }, nullptr, nullptr }, 885 { "d17", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d17, LLDB_INVALID_REGNUM, 60, 60 }, nullptr, nullptr }, 886 { "d18", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d18, LLDB_INVALID_REGNUM, 61, 61 }, nullptr, nullptr }, 887 { "d19", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d19, LLDB_INVALID_REGNUM, 62, 62 }, nullptr, nullptr }, 888 { "d20", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d20, LLDB_INVALID_REGNUM, 63, 63 }, nullptr, nullptr }, 889 { "d21", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d21, LLDB_INVALID_REGNUM, 64, 64 }, nullptr, nullptr }, 890 { "d22", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d22, LLDB_INVALID_REGNUM, 65, 65 }, nullptr, nullptr }, 891 { "d23", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d23, LLDB_INVALID_REGNUM, 66, 66 }, nullptr, nullptr }, 892 { "d24", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d24, LLDB_INVALID_REGNUM, 67, 67 }, nullptr, nullptr }, 893 { "d25", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d25, LLDB_INVALID_REGNUM, 68, 68 }, nullptr, nullptr }, 894 { "d26", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d26, LLDB_INVALID_REGNUM, 69, 69 }, nullptr, nullptr }, 895 { "d27", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d27, LLDB_INVALID_REGNUM, 70, 70 }, nullptr, nullptr }, 896 { "d28", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d28, LLDB_INVALID_REGNUM, 71, 71 }, nullptr, nullptr }, 897 { "d29", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d29, LLDB_INVALID_REGNUM, 72, 72 }, nullptr, nullptr }, 898 { "d30", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d30, LLDB_INVALID_REGNUM, 73, 73 }, nullptr, nullptr }, 899 { "d31", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d31, LLDB_INVALID_REGNUM, 74, 74 }, nullptr, nullptr }, 900 { "d0", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d0, LLDB_INVALID_REGNUM, 75, 75 }, g_d0_regs, nullptr }, 901 { "d1", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d1, LLDB_INVALID_REGNUM, 76, 76 }, g_d1_regs, nullptr }, 902 { "d2", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d2, LLDB_INVALID_REGNUM, 77, 77 }, g_d2_regs, nullptr }, 903 { "d3", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d3, LLDB_INVALID_REGNUM, 78, 78 }, g_d3_regs, nullptr }, 904 { "d4", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d4, LLDB_INVALID_REGNUM, 79, 79 }, g_d4_regs, nullptr }, 905 { "d5", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d5, LLDB_INVALID_REGNUM, 80, 80 }, g_d5_regs, nullptr }, 906 { "d6", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d6, LLDB_INVALID_REGNUM, 81, 81 }, g_d6_regs, nullptr }, 907 { "d7", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d7, LLDB_INVALID_REGNUM, 82, 82 }, g_d7_regs, nullptr }, 908 { "d8", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d8, LLDB_INVALID_REGNUM, 83, 83 }, g_d8_regs, nullptr }, 909 { "d9", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d9, LLDB_INVALID_REGNUM, 84, 84 }, g_d9_regs, nullptr }, 910 { "d10", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d10, LLDB_INVALID_REGNUM, 85, 85 }, g_d10_regs, nullptr }, 911 { "d11", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d11, LLDB_INVALID_REGNUM, 86, 86 }, g_d11_regs, nullptr }, 912 { "d12", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d12, LLDB_INVALID_REGNUM, 87, 87 }, g_d12_regs, nullptr }, 913 { "d13", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d13, LLDB_INVALID_REGNUM, 88, 88 }, g_d13_regs, nullptr }, 914 { "d14", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d14, LLDB_INVALID_REGNUM, 89, 89 }, g_d14_regs, nullptr }, 915 { "d15", nullptr, 8, 0, eEncodingIEEE754, eFormatFloat, { LLDB_INVALID_REGNUM, dwarf_d15, LLDB_INVALID_REGNUM, 90, 90 }, g_d15_regs, nullptr }, 916 { "q0", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q0, LLDB_INVALID_REGNUM, 91, 91 }, g_q0_regs, nullptr }, 917 { "q1", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q1, LLDB_INVALID_REGNUM, 92, 92 }, g_q1_regs, nullptr }, 918 { "q2", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q2, LLDB_INVALID_REGNUM, 93, 93 }, g_q2_regs, nullptr }, 919 { "q3", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q3, LLDB_INVALID_REGNUM, 94, 94 }, g_q3_regs, nullptr }, 920 { "q4", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q4, LLDB_INVALID_REGNUM, 95, 95 }, g_q4_regs, nullptr }, 921 { "q5", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q5, LLDB_INVALID_REGNUM, 96, 96 }, g_q5_regs, nullptr }, 922 { "q6", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q6, LLDB_INVALID_REGNUM, 97, 97 }, g_q6_regs, nullptr }, 923 { "q7", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q7, LLDB_INVALID_REGNUM, 98, 98 }, g_q7_regs, nullptr }, 924 { "q8", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q8, LLDB_INVALID_REGNUM, 99, 99 }, g_q8_regs, nullptr }, 925 { "q9", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q9, LLDB_INVALID_REGNUM, 100, 100 }, g_q9_regs, nullptr }, 926 { "q10", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q10, LLDB_INVALID_REGNUM, 101, 101 }, g_q10_regs, nullptr }, 927 { "q11", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q11, LLDB_INVALID_REGNUM, 102, 102 }, g_q11_regs, nullptr }, 928 { "q12", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q12, LLDB_INVALID_REGNUM, 103, 103 }, g_q12_regs, nullptr }, 929 { "q13", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q13, LLDB_INVALID_REGNUM, 104, 104 }, g_q13_regs, nullptr }, 930 { "q14", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q14, LLDB_INVALID_REGNUM, 105, 105 }, g_q14_regs, nullptr }, 931 { "q15", nullptr, 16, 0, eEncodingVector, eFormatVectorOfUInt8, { LLDB_INVALID_REGNUM, dwarf_q15, LLDB_INVALID_REGNUM, 106, 106 }, g_q15_regs, nullptr } 932 }; 933 // clang-format on 934 935 static const uint32_t num_registers = llvm::array_lengthof(g_register_infos); 936 static ConstString gpr_reg_set("General Purpose Registers"); 937 static ConstString sfp_reg_set("Software Floating Point Registers"); 938 static ConstString vfp_reg_set("Floating Point Registers"); 939 size_t i; 940 if (from_scratch) { 941 // Calculate the offsets of the registers 942 // Note that the layout of the "composite" registers (d0-d15 and q0-q15) 943 // which comes after the "primordial" registers is important. This enables 944 // us to calculate the offset of the composite register by using the offset 945 // of its first primordial register. For example, to calculate the offset 946 // of q0, use s0's offset. 947 if (g_register_infos[2].byte_offset == 0) { 948 uint32_t byte_offset = 0; 949 for (i = 0; i < num_registers; ++i) { 950 // For primordial registers, increment the byte_offset by the byte_size 951 // to arrive at the byte_offset for the next register. Otherwise, we 952 // have a composite register whose offset can be calculated by 953 // consulting the offset of its first primordial register. 954 if (!g_register_infos[i].value_regs) { 955 g_register_infos[i].byte_offset = byte_offset; 956 byte_offset += g_register_infos[i].byte_size; 957 } else { 958 const uint32_t first_primordial_reg = 959 g_register_infos[i].value_regs[0]; 960 g_register_infos[i].byte_offset = 961 g_register_infos[first_primordial_reg].byte_offset; 962 } 963 } 964 } 965 for (i = 0; i < num_registers; ++i) { 966 if (i <= 15 || i == 25) 967 AddRegister(g_register_infos[i], gpr_reg_set); 968 else if (i <= 24) 969 AddRegister(g_register_infos[i], sfp_reg_set); 970 else 971 AddRegister(g_register_infos[i], vfp_reg_set); 972 } 973 } else { 974 // Add composite registers to our primordial registers, then. 975 const size_t num_composites = llvm::array_lengthof(g_composites); 976 const size_t num_dynamic_regs = GetNumRegisters(); 977 const size_t num_common_regs = num_registers - num_composites; 978 RegisterInfo *g_comp_register_infos = g_register_infos + num_common_regs; 979 980 // First we need to validate that all registers that we already have match 981 // the non composite regs. If so, then we can add the registers, else we 982 // need to bail 983 bool match = true; 984 if (num_dynamic_regs == num_common_regs) { 985 for (i = 0; match && i < num_dynamic_regs; ++i) { 986 // Make sure all register names match 987 if (m_regs[i].name && g_register_infos[i].name) { 988 if (strcmp(m_regs[i].name, g_register_infos[i].name)) { 989 match = false; 990 break; 991 } 992 } 993 994 // Make sure all register byte sizes match 995 if (m_regs[i].byte_size != g_register_infos[i].byte_size) { 996 match = false; 997 break; 998 } 999 } 1000 } else { 1001 // Wrong number of registers. 1002 match = false; 1003 } 1004 // If "match" is true, then we can add extra registers. 1005 if (match) { 1006 for (i = 0; i < num_composites; ++i) { 1007 const uint32_t first_primordial_reg = 1008 g_comp_register_infos[i].value_regs[0]; 1009 const char *reg_name = g_register_infos[first_primordial_reg].name; 1010 if (reg_name && reg_name[0]) { 1011 for (uint32_t j = 0; j < num_dynamic_regs; ++j) { 1012 const RegisterInfo *reg_info = GetRegisterInfoAtIndex(j); 1013 // Find a matching primordial register info entry. 1014 if (reg_info && reg_info->name && 1015 ::strcasecmp(reg_info->name, reg_name) == 0) { 1016 // The name matches the existing primordial entry. Find and 1017 // assign the offset, and then add this composite register entry. 1018 g_comp_register_infos[i].byte_offset = reg_info->byte_offset; 1019 AddRegister(g_comp_register_infos[i], vfp_reg_set); 1020 } 1021 } 1022 } 1023 } 1024 } 1025 } 1026 } 1027