Revision (<<< Hide revision tags) (Show revision tags >>>) Date Author Comments
Revision tags: llvmorg-20.1.0, llvmorg-20.1.0-rc3, llvmorg-20.1.0-rc2, llvmorg-20.1.0-rc1, llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4, llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7, llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init, llvmorg-14.0.6, llvmorg-14.0.5, llvmorg-14.0.4, llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1
# fc54427e 01-Apr-2022 Jonas Devlieghere <[email protected]>

[lldb] Refactor DataBuffer so we can map files as read-only

Currently, all data buffers are assumed to be writable. This is a
problem on macOS where it's not allowed to load unsigned binaries in
mem

[lldb] Refactor DataBuffer so we can map files as read-only

Currently, all data buffers are assumed to be writable. This is a
problem on macOS where it's not allowed to load unsigned binaries in
memory as writable. To be more precise, MAP_RESILIENT_CODESIGN and
MAP_RESILIENT_MEDIA need to be set for mapped (unsigned) binaries on our
platform.

Binaries are mapped through FileSystem::CreateDataBuffer which returns a
DataBufferLLVM. The latter is backed by a llvm::WritableMemoryBuffer
because every DataBuffer in LLDB is considered to be writable. In order
to use a read-only llvm::MemoryBuffer I had to split our abstraction
around it.

This patch distinguishes between a DataBuffer (read-only) and
WritableDataBuffer (read-write) and updates LLDB to use the appropriate
one.

rdar://74890607

Differential revision: https://reviews.llvm.org/D122856

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Revision tags: llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3, llvmorg-14.0.0-rc2, llvmorg-14.0.0-rc1, llvmorg-15-init
# b1127753 28-Jan-2022 Pavel Labath <[email protected]>

[lldb] Convert ProcessGDBRemoteLog to the new API


Revision tags: llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2, llvmorg-13.0.1-rc1
# 26c584f4 09-Oct-2021 Michał Górny <[email protected]>

[lldb] [gdb-remote] Remove HardcodeARMRegisters() hack

HardcodeARMRegisters() is a hack that was supposed to be used "until
we can get an updated debugserver down on the devices". Since it was
intr

[lldb] [gdb-remote] Remove HardcodeARMRegisters() hack

HardcodeARMRegisters() is a hack that was supposed to be used "until
we can get an updated debugserver down on the devices". Since it was
introduced back in 2012, there is a good chance that the debugserver
has been updated at least once since then. Removing this code makes
transition to the new DynamicRegisterInfo API easier.

Differential Revision: https://reviews.llvm.org/D111491

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Revision tags: llvmorg-13.0.0, llvmorg-13.0.0-rc4, llvmorg-13.0.0-rc3
# f290efc3 27-Aug-2021 Michał Górny <[email protected]>

[lldb] [ABI/X86] Support combining xmm* and ymm*h regs into ymm*

gdbserver does not expose combined ymm* registers but rather XSAVE-style
split xmm* and ymm*h portions. Extend value_regs to support

[lldb] [ABI/X86] Support combining xmm* and ymm*h regs into ymm*

gdbserver does not expose combined ymm* registers but rather XSAVE-style
split xmm* and ymm*h portions. Extend value_regs to support combining
multiple registers and use it to create user-friendly ymm* registers
that are combined from split xmm* and ymm*h portions.

Differential Revision: https://reviews.llvm.org/D108937

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# ee11612e 19-Oct-2021 Michał Górny <[email protected]>

Revert "[lldb] [ABI/X86] Support combining xmm* and ymm*h regs into ymm*"

This reverts commit 5352ea4a721ef252129994111b83dc350ecc71da. It seems
to have broken the arm buildbot.


# 5352ea4a 27-Aug-2021 Michał Górny <[email protected]>

[lldb] [ABI/X86] Support combining xmm* and ymm*h regs into ymm*

gdbserver does not expose combined ymm* registers but rather XSAVE-style
split xmm* and ymm*h portions. Extend value_regs to support

[lldb] [ABI/X86] Support combining xmm* and ymm*h regs into ymm*

gdbserver does not expose combined ymm* registers but rather XSAVE-style
split xmm* and ymm*h portions. Extend value_regs to support combining
multiple registers and use it to create user-friendly ymm* registers
that are combined from split xmm* and ymm*h portions.

Differential Revision: https://reviews.llvm.org/D108937

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# ecfab0b6 05-Oct-2021 Michał Górny <[email protected]>

[lldb] [DynamicRegisterInfo] Support iterating over registers()

Add DynamicRegisterInfo::registers() method that returns
llvm::iterator_range<> over RegisterInfos. This is a convenient
replacement

[lldb] [DynamicRegisterInfo] Support iterating over registers()

Add DynamicRegisterInfo::registers() method that returns
llvm::iterator_range<> over RegisterInfos. This is a convenient
replacement for GetNumRegisters() + GetRegisterInfoAtIndex().

Differential Revision: https://reviews.llvm.org/D111136

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# 202af507 23-Sep-2021 Pavel Labath <[email protected]>

Recommit: [lldb] Remove "dwarf dynamic register size expressions" from RegisterInfo

The previous version of the patch did not update the definitions in
conditionally compiled code. This patch includ

Recommit: [lldb] Remove "dwarf dynamic register size expressions" from RegisterInfo

The previous version of the patch did not update the definitions in
conditionally compiled code. This patch includes changes to ARC and
windows targets.

Original commit message was:

These were added to support some mips registers on linux, but linux mips
support has now been removed due.

They are still referenced in the freebds mips implementation, but the
completeness of that implementation is also unknown. All other
architectures just set these fields to zero, which is a cause of
significant bloat in our register info definitions.

Arm also has registers with variable sizes, but they were implemented in
a more gdb-compatible fashion and don't use this feature.

Differential Revision: https://reviews.llvm.org/D110914

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# b2c906da 06-Oct-2021 Michael Forster <[email protected]>

Revert "[lldb] Remove "dwarf dynamic register size expressions" from RegisterInfo"

This reverts commit 00e704bf080ffeeb9e334fb3ab71594f9aa50969.

This commit should should have updated
llvm/llvm-pro

Revert "[lldb] Remove "dwarf dynamic register size expressions" from RegisterInfo"

This reverts commit 00e704bf080ffeeb9e334fb3ab71594f9aa50969.

This commit should should have updated
llvm/llvm-project/lldb/source/Plugins/ABI/ARC/ABISysV_arc.cpp like the other
architectures.

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# 00e704bf 23-Sep-2021 Pavel Labath <[email protected]>

[lldb] Remove "dwarf dynamic register size expressions" from RegisterInfo

These were added to support some mips registers on linux, but linux mips
support has now been removed due.

They are still r

[lldb] Remove "dwarf dynamic register size expressions" from RegisterInfo

These were added to support some mips registers on linux, but linux mips
support has now been removed due.

They are still referenced in the freebds mips implementation, but the
completeness of that implementation is also unknown. All other
architectures just set these fields to zero, which is a cause of
significant bloat in our register info definitions.

Arm also has registers with variable sizes, but they were implemented in
a more gdb-compatible fashion and don't use this feature.

Differential Revision: https://reviews.llvm.org/D110914

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# cc3c788a 20-Sep-2021 Michał Górny <[email protected]>

[lldb] [gdb-remote] Use local regnos for value_regs/invalidate_regs

Switch the gdb-remote client logic to use local (LLDB) register numbers
in value_regs/invalidate_regs rather than remote regnos. T

[lldb] [gdb-remote] Use local regnos for value_regs/invalidate_regs

Switch the gdb-remote client logic to use local (LLDB) register numbers
in value_regs/invalidate_regs rather than remote regnos. This involves
translating regnos received from lldb-server.

Differential Revision: https://reviews.llvm.org/D110027

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# 12504f50 23-Sep-2021 Michał Górny <[email protected]>

Revert "[lldb] [gdb-remote] Use local regnos for value_regs/invalidate_regs"

This reverts commit 6fbed33d4a7de2229c40e6318f223092d3a23848.
The prerequisite commit is causing regressions.


# 6fbed33d 20-Sep-2021 Michał Górny <[email protected]>

[lldb] [gdb-remote] Use local regnos for value_regs/invalidate_regs

Switch the gdb-remote client logic to use local (LLDB) register numbers
in value_regs/invalidate_regs rather than remote regnos. T

[lldb] [gdb-remote] Use local regnos for value_regs/invalidate_regs

Switch the gdb-remote client logic to use local (LLDB) register numbers
in value_regs/invalidate_regs rather than remote regnos. This involves
translating regnos received from lldb-server.

Differential Revision: https://reviews.llvm.org/D110027

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# 92904cc6 30-Aug-2021 Michał Górny <[email protected]>

[lldb] [gdb-remote] Remove unused arg from GDBRemoteRegisterContext::ReadRegisterBytes()

Differential Revision: https://reviews.llvm.org/D110020


# 86a58f10 16-Sep-2021 Michał Górny <[email protected]>

[lldb] [DynamicRegisterInfo] Pass name/alt_name via RegisterInfo

Remove the name and alt_name parameters from AddRegister() and instead
pass them via RegisterInfo.name and .alt_name fields. This ma

[lldb] [DynamicRegisterInfo] Pass name/alt_name via RegisterInfo

Remove the name and alt_name parameters from AddRegister() and instead
pass them via RegisterInfo.name and .alt_name fields. This makes
the API simpler and removes some duplication.

Differential Revision: https://reviews.llvm.org/D109872

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# e3d878bd 10-Sep-2021 Michał Górny <[email protected]>

[lldb] Remove redundant register alt_names

Remove redundant register alt_names that correspond to their respective
generic names. D108554 makes it possible to query registers through
their generic

[lldb] Remove redundant register alt_names

Remove redundant register alt_names that correspond to their respective
generic names. D108554 makes it possible to query registers through
their generic names directly, therefore making repeating them via
alt_name unnecessary.

While at it, also remove alt_names that are equal to register names
on PPC.

This patch does not alter register definitions where the generic names
are listed as primary names, and other names are provided as alt_name
(e.g. ARM).

Differential Revision: https://reviews.llvm.org/D109626

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Revision tags: llvmorg-13.0.0-rc2, llvmorg-13.0.0-rc1, llvmorg-14-init
# 379f24ff 09-Jul-2021 Jim Ingham <[email protected]>

Revert "Revert "Reset the wakeup timeout when we re-enter the continue wait.""

This reverts commit 82a38837150099288a1262391ef43e1fd69ffde4.

The original version had a copy-paste error: using the I

Revert "Revert "Reset the wakeup timeout when we re-enter the continue wait.""

This reverts commit 82a38837150099288a1262391ef43e1fd69ffde4.

The original version had a copy-paste error: using the Interrupt timeout
for the ResumeSynchronous wait, which is clearly wrong. This error would
have been evident with real use, but the interrupt is long enough that it
only caused one testsuite failure (in the Swift fork).

Anyway, I found that mistake and fixed it and checked all the other places
where I had to plumb through a timeout, and added a test with a short
interrupt timeout stepping over a function that takes 3x the interrupt timeout
to complete, so that should detect a similar mistake in the future.

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# fd2433e1 02-Jul-2021 Jonas Devlieghere <[email protected]>

[lldb] Replace default bodies of special member functions with = default;

Replace default bodies of special member functions with = default;

$ run-clang-tidy.py -header-filter='lldb' -checks='-*,mo

[lldb] Replace default bodies of special member functions with = default;

Replace default bodies of special member functions with = default;

$ run-clang-tidy.py -header-filter='lldb' -checks='-*,modernize-use-equals-default' -fix ,

https://clang.llvm.org/extra/clang-tidy/checks/modernize-use-equals-default.html

Differential revision: https://reviews.llvm.org/D104041

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Revision tags: llvmorg-12.0.1, llvmorg-12.0.1-rc4, llvmorg-12.0.1-rc3, llvmorg-12.0.1-rc2, llvmorg-12.0.1-rc1
# 82a38837 17-May-2021 Jim Ingham <[email protected]>

Revert "Reset the wakeup timeout when we re-enter the continue wait."

This reverts commit bd5751f3d249ec0798060bd98c07272174c52af0.
This patch series is causing us to every so often miss switching
t

Revert "Reset the wakeup timeout when we re-enter the continue wait."

This reverts commit bd5751f3d249ec0798060bd98c07272174c52af0.
This patch series is causing us to every so often miss switching
the state from eStateRunning to eStateStopped when we get the stop
packet from the debug server.

Reverting till I can figure out how that could be happening.

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# 9558b602 06-May-2021 Jim Ingham <[email protected]>

Add an "interrupt timeout" to Process, and pipe that through the
ProcessGDBRemote plugin layers.

Also fix a bug where if we tried to interrupt, but the ReadPacket
wakeup timer woke us up just after

Add an "interrupt timeout" to Process, and pipe that through the
ProcessGDBRemote plugin layers.

Also fix a bug where if we tried to interrupt, but the ReadPacket
wakeup timer woke us up just after the timeout, we would break out
the switch, but then since we immediately check if the response is
empty & fail if it is, we could end up actually only giving a
small interval to the interrupt.

Differential Revision: https://reviews.llvm.org/D102085

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Revision tags: llvmorg-12.0.0, llvmorg-12.0.0-rc5, llvmorg-12.0.0-rc4, llvmorg-12.0.0-rc3
# 53678317 02-Mar-2021 Muhammad Omair Javaid <[email protected]>

Support GDB remote g packet partial read

GDB remote protocol does not specify length of g packet for register read. It depends on remote to include all or exclude certain registers from g packet. In

Support GDB remote g packet partial read

GDB remote protocol does not specify length of g packet for register read. It depends on remote to include all or exclude certain registers from g packet. In case a register or set of registers is not included as part of g packet then we should fall back to p packet for reading all registers excluded from g packet by remote. This patch adds support for above feature and adds a test-case for the same.

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D97498

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Revision tags: llvmorg-12.0.0-rc2
# 8561ad92 08-Feb-2021 Muhammad Omair Javaid <[email protected]>

Use remote regnums in expedited list, value regs and invalidate regs

Native register descriptions in LLDB specify lldb register numbers in
value_regs and invalidate_regs lists. These register number

Use remote regnums in expedited list, value regs and invalidate regs

Native register descriptions in LLDB specify lldb register numbers in
value_regs and invalidate_regs lists. These register numbers may not
match with Process gdb-remote register numbers which are generated by
native process after counting all registers in its register sets.

It was coincidentally not causing any problems as we never came across
a native target with dynamically changing register sets and register
numbers generated by counter matched with LLDB native register numbers.
This came up while testing target AArch64 SVE which can choose register
sets based on underlying hardware.

This patch fixes this behavior and always tries to use remote register
numbers while reading/writing registers over gdb-remote protocol.

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D77043

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Revision tags: llvmorg-11.1.0, llvmorg-11.1.0-rc3, llvmorg-12.0.0-rc1, llvmorg-13-init, llvmorg-11.1.0-rc2
# e448ad78 19-Jan-2021 Muhammad Omair Javaid <[email protected]>

[LLDB] Add support to resize SVE registers at run-time

This patch builds on previously submitted SVE patches regarding expedited
register set and per thread register infos. (D82853 D82855 and D82857

[LLDB] Add support to resize SVE registers at run-time

This patch builds on previously submitted SVE patches regarding expedited
register set and per thread register infos. (D82853 D82855 and D82857)

We need to resize SVE register based on value received in expedited list.
Also we need to resize SVE registers when we write vg register using
register write vg command. The resize will result in a updated offset
for all of fpr and sve register set. This offset will be configured
in native register context by RegisterInfoInterface and will also be
be updated on client side in GDBRemoteRegisterContext.

A follow up patch will provide a API test to verify this change.

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D82863

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# 4fd77668 15-Jan-2021 Muhammad Omair Javaid <[email protected]>

[LLDB] Add per-thread register infos shared pointer in gdb-remote

In gdb-remote process we have register infos defind as a refernce object of
GDBRemoteDynamicRegisterInfo class. In past register inf

[LLDB] Add per-thread register infos shared pointer in gdb-remote

In gdb-remote process we have register infos defind as a refernce object of
GDBRemoteDynamicRegisterInfo class. In past register infos have remained
constant througout the life time of a process.

This has changed after AArch64 SVE support where register infos will have
per-thread configuration. SVE registers will have per-thread size and can
be updated while running. This patch aims to build up for that support by
changing GDBRemoteDynamicRegisterInfo reference to a shared pointer deinfed
per-thread.

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D82857

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Revision tags: llvmorg-11.1.0-rc1, llvmorg-11.0.1, llvmorg-11.0.1-rc2, llvmorg-11.0.1-rc1, llvmorg-11.0.0, llvmorg-11.0.0-rc6, llvmorg-11.0.0-rc5, llvmorg-11.0.0-rc4, llvmorg-11.0.0-rc3, llvmorg-11.0.0-rc2, llvmorg-11.0.0-rc1, llvmorg-12-init, llvmorg-10.0.1, llvmorg-10.0.1-rc4, llvmorg-10.0.1-rc3, llvmorg-10.0.1-rc2, llvmorg-10.0.1-rc1, llvmorg-10.0.0, llvmorg-10.0.0-rc6, llvmorg-10.0.0-rc5, llvmorg-10.0.0-rc4, llvmorg-10.0.0-rc3, llvmorg-10.0.0-rc2, llvmorg-10.0.0-rc1
# 80814287 24-Jan-2020 Raphael Isemann <[email protected]>

[lldb][NFC] Fix all formatting errors in .cpp file headers

Summary:
A *.cpp file header in LLDB (and in LLDB) should like this:
```
//===-- TestUtilities.cpp ----------------------------------------

[lldb][NFC] Fix all formatting errors in .cpp file headers

Summary:
A *.cpp file header in LLDB (and in LLDB) should like this:
```
//===-- TestUtilities.cpp -------------------------------------------------===//
```
However in LLDB most of our source files have arbitrary changes to this format and
these changes are spreading through LLDB as folks usually just use the existing
source files as templates for their new files (most notably the unnecessary
editor language indicator `-*- C++ -*-` is spreading and in every review
someone is pointing out that this is wrong, resulting in people pointing out that this
is done in the same way in other files).

This patch removes most of these inconsistencies including the editor language indicators,
all the different missing/additional '-' characters, files that center the file name, missing
trailing `===//` (mostly caused by clang-format breaking the line).

Reviewers: aprantl, espindola, jfb, shafik, JDevlieghere

Reviewed By: JDevlieghere

Subscribers: dexonsmith, wuzish, emaste, sdardis, nemanjai, kbarton, MaskRay, atanasyan, arphaman, jfb, abidh, jsji, JDevlieghere, usaxena95, lldb-commits

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D73258

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