1 //===-- RegisterInfoPOSIX_arm64.cpp ----------------------------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===---------------------------------------------------------------------===// 9 10 #include <cassert> 11 #include <stddef.h> 12 #include <vector> 13 14 #include "lldb/lldb-defines.h" 15 #include "llvm/Support/Compiler.h" 16 17 #include "RegisterInfoPOSIX_arm64.h" 18 19 // Based on RegisterContextDarwin_arm64.cpp 20 #define GPR_OFFSET(idx) ((idx)*8) 21 #define GPR_OFFSET_NAME(reg) \ 22 (LLVM_EXTENSION offsetof(RegisterInfoPOSIX_arm64::GPR, reg)) 23 24 #define FPU_OFFSET(idx) ((idx)*16 + sizeof(RegisterInfoPOSIX_arm64::GPR)) 25 #define FPU_OFFSET_NAME(reg) \ 26 (LLVM_EXTENSION offsetof(RegisterInfoPOSIX_arm64::FPU, reg) + \ 27 sizeof(RegisterInfoPOSIX_arm64::GPR)) 28 29 #define EXC_OFFSET_NAME(reg) \ 30 (LLVM_EXTENSION offsetof(RegisterInfoPOSIX_arm64::EXC, reg) + \ 31 sizeof(RegisterInfoPOSIX_arm64::GPR) + \ 32 sizeof(RegisterInfoPOSIX_arm64::FPU)) 33 #define DBG_OFFSET_NAME(reg) \ 34 (LLVM_EXTENSION offsetof(RegisterInfoPOSIX_arm64::DBG, reg) + \ 35 sizeof(RegisterInfoPOSIX_arm64::GPR) + \ 36 sizeof(RegisterInfoPOSIX_arm64::FPU) + \ 37 sizeof(RegisterInfoPOSIX_arm64::EXC)) 38 39 #define DEFINE_DBG(reg, i) \ 40 #reg, NULL, \ 41 sizeof(((RegisterInfoPOSIX_arm64::DBG *) NULL)->reg[i]), \ 42 DBG_OFFSET_NAME(reg[i]), lldb::eEncodingUint, lldb::eFormatHex, \ 43 {LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ 44 LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, \ 45 dbg_##reg##i }, \ 46 NULL, NULL, NULL, 0 47 #define REG_CONTEXT_SIZE \ 48 (sizeof(RegisterInfoPOSIX_arm64::GPR) + \ 49 sizeof(RegisterInfoPOSIX_arm64::FPU) + \ 50 sizeof(RegisterInfoPOSIX_arm64::EXC)) 51 52 //----------------------------------------------------------------------------- 53 // Include RegisterInfos_arm64 to declare our g_register_infos_arm64 structure. 54 //----------------------------------------------------------------------------- 55 #define DECLARE_REGISTER_INFOS_ARM64_STRUCT 56 #include "RegisterInfos_arm64.h" 57 #undef DECLARE_REGISTER_INFOS_ARM64_STRUCT 58 59 static const lldb_private::RegisterInfo * 60 GetRegisterInfoPtr(const lldb_private::ArchSpec &target_arch) { 61 switch (target_arch.GetMachine()) { 62 case llvm::Triple::aarch64: 63 return g_register_infos_arm64_le; 64 default: 65 assert(false && "Unhandled target architecture."); 66 return NULL; 67 } 68 } 69 70 static uint32_t 71 GetRegisterInfoCount(const lldb_private::ArchSpec &target_arch) { 72 switch (target_arch.GetMachine()) { 73 case llvm::Triple::aarch64: 74 return static_cast<uint32_t>(sizeof(g_register_infos_arm64_le) / 75 sizeof(g_register_infos_arm64_le[0])); 76 default: 77 assert(false && "Unhandled target architecture."); 78 return 0; 79 } 80 } 81 82 RegisterInfoPOSIX_arm64::RegisterInfoPOSIX_arm64( 83 const lldb_private::ArchSpec &target_arch) 84 : lldb_private::RegisterInfoInterface(target_arch), 85 m_register_info_p(GetRegisterInfoPtr(target_arch)), 86 m_register_info_count(GetRegisterInfoCount(target_arch)) {} 87 88 size_t RegisterInfoPOSIX_arm64::GetGPRSize() const { 89 return sizeof(struct RegisterInfoPOSIX_arm64::GPR); 90 } 91 92 const lldb_private::RegisterInfo * 93 RegisterInfoPOSIX_arm64::GetRegisterInfo() const { 94 return m_register_info_p; 95 } 96 97 uint32_t RegisterInfoPOSIX_arm64::GetRegisterCount() const { 98 return m_register_info_count; 99 } 100