Use llvm::is_contained (NFC)

[lldb] Silence warnings about unused static variables in RegisterInfos_arm64.h

Move them to the only source file that included RegisterInfos_arm64.h
that actually used these variables.

This silence

[lldb] Silence warnings about unused static variables in RegisterInfos_arm64.h

Move them to the only source file that included RegisterInfos_arm64.h
that actually used these variables.

This silences warnings like these:

In file included from lldb/source/Plugins/Instruction/ARM64/EmulateInstructionARM64.cpp:42:
lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h:790:35: warning: ‘g_register_infos_mte’ defined but not used [-Wunused-variable]
790 | static lldb_private::RegisterInfo g_register_infos_mte[] = {
| ^~~~~~~~~~~~~~~~~~~~
lldb/source/Plugins/Process/Utility/RegisterInfos_arm64.h:787:35: warning: ‘g_register_infos_pauth’ defined but not used [-Wunused-variable]
787 | static lldb_private::RegisterInfo g_register_infos_pauth[] = {
| ^~~~~~~~~~~~~~~~~~~~~~

Differential Revision: https://reviews.llvm.org/D123206

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[lldb] Use nullptr instead of 0 or NULL (NFC)

This is a re-submission of 24d240558811604354a8d6080405f6bad8d15b5c
without the hunks in HostNativeThreadBase.{h,cpp}, which break builds
on Windows.

I

[lldb] Use nullptr instead of 0 or NULL (NFC)

This is a re-submission of 24d240558811604354a8d6080405f6bad8d15b5c
without the hunks in HostNativeThreadBase.{h,cpp}, which break builds
on Windows.

Identified with modernize-use-nullptr.

show more ...

Revert "[lldb] Use nullptr instead of 0 or NULL (NFC)"

This reverts commit 913457acf07be7f22d71ac41ad1076517d7f45c6.

It again broke builds on Windows:

lldb/source/Host/common/HostNativeThreadBas

Revert "[lldb] Use nullptr instead of 0 or NULL (NFC)"

This reverts commit 913457acf07be7f22d71ac41ad1076517d7f45c6.

It again broke builds on Windows:

lldb/source/Host/common/HostNativeThreadBase.cpp(37,14): error:
assigning to 'lldb::thread_result_t' (aka 'unsigned int') from
incompatible type 'std::nullptr_t'

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[lldb] Use nullptr instead of 0 or NULL (NFC)

This is a re-submission of 24d240558811604354a8d6080405f6bad8d15b5c
without the hunk in HostNativeThreadBase.h, which breaks builds on
Windows.

Identif

[lldb] Use nullptr instead of 0 or NULL (NFC)

This is a re-submission of 24d240558811604354a8d6080405f6bad8d15b5c
without the hunk in HostNativeThreadBase.h, which breaks builds on
Windows.

Identified with modernize-use-nullptr.

show more ...

Revert "[lldb] Use nullptr instead of 0 or NULL (NFC)"

This reverts commit 24d240558811604354a8d6080405f6bad8d15b5c.
Breaks building on Windows:

../../lldb/include\lldb/Host/HostNativeThreadBas

Revert "[lldb] Use nullptr instead of 0 or NULL (NFC)"

This reverts commit 24d240558811604354a8d6080405f6bad8d15b5c.
Breaks building on Windows:

../../lldb/include\lldb/Host/HostNativeThreadBase.h(49,36): error:
cannot initialize a member subobject of type 'lldb::thread_result_t'
(aka 'unsigned int') with an rvalue of type 'std::nullptr_t'
lldb::thread_result_t m_result = nullptr;
^~~~~~~
1 error generated.

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[lldb] Use nullptr instead of 0 or NULL (NFC)

Identified with modernize-use-nullptr.

Recommit: [lldb] Remove "dwarf dynamic register size expressions" from RegisterInfo

The previous version of the patch did not update the definitions in
conditionally compiled code. This patch includ

Recommit: [lldb] Remove "dwarf dynamic register size expressions" from RegisterInfo

The previous version of the patch did not update the definitions in
conditionally compiled code. This patch includes changes to ARC and
windows targets.

Original commit message was:

These were added to support some mips registers on linux, but linux mips
support has now been removed due.

They are still referenced in the freebds mips implementation, but the
completeness of that implementation is also unknown. All other
architectures just set these fields to zero, which is a cause of
significant bloat in our register info definitions.

Arm also has registers with variable sizes, but they were implemented in
a more gdb-compatible fashion and don't use this feature.

Differential Revision: https://reviews.llvm.org/D110914

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Revert "[lldb] Remove "dwarf dynamic register size expressions" from RegisterInfo"

This reverts commit 00e704bf080ffeeb9e334fb3ab71594f9aa50969.

This commit should should have updated
llvm/llvm-pro

Revert "[lldb] Remove "dwarf dynamic register size expressions" from RegisterInfo"

This reverts commit 00e704bf080ffeeb9e334fb3ab71594f9aa50969.

This commit should should have updated
llvm/llvm-project/lldb/source/Plugins/ABI/ARC/ABISysV_arc.cpp like the other
architectures.

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[lldb] Remove "dwarf dynamic register size expressions" from RegisterInfo

These were added to support some mips registers on linux, but linux mips
support has now been removed due.

They are still r

[lldb] Remove "dwarf dynamic register size expressions" from RegisterInfo

These were added to support some mips registers on linux, but linux mips
support has now been removed due.

They are still referenced in the freebds mips implementation, but the
completeness of that implementation is also unknown. All other
architectures just set these fields to zero, which is a cause of
significant bloat in our register info definitions.

Arm also has registers with variable sizes, but they were implemented in
a more gdb-compatible fashion and don't use this feature.

Differential Revision: https://reviews.llvm.org/D110914

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[lldb][NFC] Use C++ versions of the deprecated C standard library headers

The C headers are deprecated so as requested in D102845, this is replacing them
all with their (not deprecated) C++ equivale

[lldb][NFC] Use C++ versions of the deprecated C standard library headers

The C headers are deprecated so as requested in D102845, this is replacing them
all with their (not deprecated) C++ equivalent.

Reviewed By: shafik

Differential Revision: https://reviews.llvm.org/D103084

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Revert "Revert "[LLDB] Arm64/Linux Add MTE and Pointer Authentication registers""

This reverts commit 71b648f7158c7a0b4918eaa3e94d307e4bbfce97.

There was a typo in the last commit which was causing

Revert "Revert "[LLDB] Arm64/Linux Add MTE and Pointer Authentication registers""

This reverts commit 71b648f7158c7a0b4918eaa3e94d307e4bbfce97.

There was a typo in the last commit which was causing LLDB AArch64 Linux
buildbot testsuite failures. Now fixed in current version.

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Revert "[LLDB] Arm64/Linux Add MTE and Pointer Authentication registers"

This reverts commit 1164b4e2957290e814c3dd781a68e504dd39148e.

Reason: LLDB AArch64 Linux buildbot failure

[LLDB] Arm64/Linux Add MTE and Pointer Authentication registers

This patch adds two new dynamic register sets for AArch64 MTE and
Pointer Authentication features. These register sets are dynamic and

[LLDB] Arm64/Linux Add MTE and Pointer Authentication registers

This patch adds two new dynamic register sets for AArch64 MTE and
Pointer Authentication features. These register sets are dynamic and
will only be available if underlying hardware support either of these
features. LLDB will pull in Aux vector information and create register
infos based on that information.

A follow up patch will add a test case to test these feature registers.

Reviewed By: labath, DavidSpickett

Differential Revision: https://reviews.llvm.org/D96460

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[LLDB] Add support for Arm64/Linux dynamic register sets

This is patch adds support for adding dynamic register sets for
AArch64 dynamic features in LLDB. AArch64 has optional features like
SVE, Poi

[LLDB] Add support for Arm64/Linux dynamic register sets

This is patch adds support for adding dynamic register sets for
AArch64 dynamic features in LLDB. AArch64 has optional features like
SVE, Pointer Authentication and MTE which means LLDB needs to decide
at run time which registers it needs to pull in for the current
executable based on underlying support for a certain feature.

This patch makes necessary adjustments to make way for dynamic
register infos and dynamic register sets.

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D96458

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Send SVE vg register in custom expedited registerset

This patch ovverides GetExpeditedRegisterSet for
NativeRegisterContextLinux_arm64 to send vector granule register in
expedited register set if SV

Send SVE vg register in custom expedited registerset

This patch ovverides GetExpeditedRegisterSet for
NativeRegisterContextLinux_arm64 to send vector granule register in
expedited register set if SVE mode is selected.

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D82855

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[LLDB] Fix SVE reginfo for sequential offset in g packet

This moves in the direction of our effort to synchronize register descriptions
between LLDB and GDB xml description. We want to able to send

[LLDB] Fix SVE reginfo for sequential offset in g packet

This moves in the direction of our effort to synchronize register descriptions
between LLDB and GDB xml description. We want to able to send registers in a
way that their offset fields can be re-constructed based on register sizes
in the increasing order of register number.

In context to Arm64 SVE, FPCR and FPSR are same registers in FPU regset and
SVE regset. Previously FPSR/FPCR offset was set at the end of SVE data
because Linux ptrace data placed FPCR and FPSR at the end of SVE register set.

Considering interoperability with other stubs like QEMU and that g packets
should generate register data in increasing order of register numbers. We
have to move FPCR/FPSR offset up to its original location according to
register numbering scheme of ARM64 registers with SVE registers included.

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D90741

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[LLDB] Add ptrace register access for AArch64 SVE registers

This patch adds NativeRegisterContext_arm64 ptrace routines to access
AArch64 SVE register set. This patch also adds a test-case to test
A

[LLDB] Add ptrace register access for AArch64 SVE registers

This patch adds NativeRegisterContext_arm64 ptrace routines to access
AArch64 SVE register set. This patch also adds a test-case to test
AArch64 SVE register access and dynamic size configuration capability.

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D79699

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Revert "Revert "AArch64 SVE register infos and core file support""

This reverts commit d9920e0199b48734ef305e69ecd5235fff72be25.

Revert "AArch64 SVE register infos and core file support"

This reverts commit 7e017de0ad62dfd3f373354fc47b0e39c0fef657.

AArch64 SVE register infos and core file support

Summary:
This patch adds support for AArch64 SVE register infos description and
core file register access.

AArch64 SVE is a an optional extension of

AArch64 SVE register infos and core file support

Summary:
This patch adds support for AArch64 SVE register infos description and
core file register access.

AArch64 SVE is a an optional extension of Arm v8.3-a architecture. It
has introduced 32 new vector registers Z, 16 predicate P registers and FFR
predicate register. These registers have fixed names but can dynamically
be configured to different size based on underlying OS configuration.

This patch adds register info struct that describes SVE register infos and
also provides RegisterContextPOSIXCore_arm64 routines to access SVE registers.

This patch also introduces a mechanism to configure SVE register sizes and
offsets at startup before exchanging register information across gdb-remote.

TestLinuxCore.py has been updated to include testing of SVE core files.

Reviewers: labath, clayborg, jankratochvil, jasonmolenda, rengolin

Reviewed By: labath

Subscribers: tschuett, kristof.beyls, danielkiss, lldb-commits

Differential Revision: https://reviews.llvm.org/D77047

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Combine multiple defs of arm64 register sets

Summary:
This patch aims to combine similar arm64 register set definitions defined in NativeRegisterContextLinux_arm64 and RegisterContextPOSIX_arm64.
I

Combine multiple defs of arm64 register sets

Summary:
This patch aims to combine similar arm64 register set definitions defined in NativeRegisterContextLinux_arm64 and RegisterContextPOSIX_arm64.
I have implemented a register set interface out of RegisterInfoInterface class and moved arm64 register sets into RegisterInfosPOSIX_arm64 which is similar to Utility/RegisterContextLinux_* implemented by various other targets. This will help in managing register sets of new ARM64 architecture features in one place.

Built and tested on x86_64-linux-gnu, aarch64-linux-gnu and arm-linux-gnueabihf targets.

Reviewers: labath

Reviewed By: labath

Subscribers: mhorne, emaste, kristof.beyls, atanasyan, danielkiss, lldb-commits

Differential Revision: https://reviews.llvm.org/D80105

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[lldb][NFC] Fix all formatting errors in .cpp file headers

Summary:
A *.cpp file header in LLDB (and in LLDB) should like this:
```
//===-- TestUtilities.cpp ----------------------------------------

[lldb][NFC] Fix all formatting errors in .cpp file headers

Summary:
A *.cpp file header in LLDB (and in LLDB) should like this:
```
//===-- TestUtilities.cpp -------------------------------------------------===//
```
However in LLDB most of our source files have arbitrary changes to this format and
these changes are spreading through LLDB as folks usually just use the existing
source files as templates for their new files (most notably the unnecessary
editor language indicator `-*- C++ -*-` is spreading and in every review
someone is pointing out that this is wrong, resulting in people pointing out that this
is done in the same way in other files).

This patch removes most of these inconsistencies including the editor language indicators,
all the different missing/additional '-' characters, files that center the file name, missing
trailing `===//` (mostly caused by clang-format breaking the line).

Reviewers: aprantl, espindola, jfb, shafik, JDevlieghere

Reviewed By: JDevlieghere

Subscribers: dexonsmith, wuzish, emaste, sdardis, nemanjai, kbarton, MaskRay, atanasyan, arphaman, jfb, abidh, jsji, JDevlieghere, usaxena95, lldb-commits

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D73258

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Add arm64_32 support to lldb, an ILP32 codegen
that runs on arm64 ISA targets, specifically
Apple watches.


Differential Revision: https://reviews.llvm.org/D68858

llvm-svn: 375032

[lldb] NFC modernize codebase with modernize-use-nullptr

Summary:
NFC = [[ https://llvm.org/docs/Lexicon.html#nfc | Non functional change ]]

This commit is the result of modernizing the LLDB codeba

[lldb] NFC modernize codebase with modernize-use-nullptr

Summary:
NFC = [[ https://llvm.org/docs/Lexicon.html#nfc | Non functional change ]]

This commit is the result of modernizing the LLDB codebase by using
`nullptr` instread of `0` or `NULL`. See
https://clang.llvm.org/extra/clang-tidy/checks/modernize-use-nullptr.html
for more information.

This is the command I ran and I to fix and format the code base:

```
run-clang-tidy.py \
-header-filter='.*' \
-checks='-*,modernize-use-nullptr' \
-fix ~/dev/llvm-project/lldb/.* \
-format \
-style LLVM \
-p ~/llvm-builds/debug-ninja-gcc
```

NOTE: There were also changes to `llvm/utils/unittest` but I did not
include them because I felt that maybe this library shall be updated in
isolation somehow.

NOTE: I know this is a rather large commit but it is a nobrainer in most
parts.

Reviewers: martong, espindola, shafik, #lldb, JDevlieghere

Reviewed By: JDevlieghere

Subscribers: arsenm, jvesely, nhaehnle, hiraditya, JDevlieghere, teemperor, rnkovacs, emaste, kubamracek, nemanjai, ki.stfu, javed.absar, arichardson, kbarton, jrtc27, MaskRay, atanasyan, dexonsmith, arphaman, jfb, jsji, jdoerfert, lldb-commits, llvm-commits

Tags: #lldb, #llvm

Differential Revision: https://reviews.llvm.org/D61847

llvm-svn: 361484

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