1 //===-- RegisterContextPOSIX_x86.cpp ----------------------------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 10 #include <cstring> 11 #include <errno.h> 12 #include <stdint.h> 13 14 #include "lldb/Core/DataBufferHeap.h" 15 #include "lldb/Core/DataExtractor.h" 16 #include "lldb/Core/RegisterValue.h" 17 #include "lldb/Core/Scalar.h" 18 #include "lldb/Target/Target.h" 19 #include "lldb/Target/Thread.h" 20 #include "lldb/Host/Endian.h" 21 #include "llvm/Support/Compiler.h" 22 23 #include "RegisterContext_x86.h" 24 #include "RegisterContextPOSIX_x86.h" 25 #include "Plugins/Process/elf-core/ProcessElfCore.h" 26 27 using namespace lldb_private; 28 using namespace lldb; 29 30 const uint32_t 31 g_gpr_regnums_i386[] = 32 { 33 gpr_eax_i386, 34 gpr_ebx_i386, 35 gpr_ecx_i386, 36 gpr_edx_i386, 37 gpr_edi_i386, 38 gpr_esi_i386, 39 gpr_ebp_i386, 40 gpr_esp_i386, 41 gpr_eip_i386, 42 gpr_eflags_i386, 43 gpr_cs_i386, 44 gpr_fs_i386, 45 gpr_gs_i386, 46 gpr_ss_i386, 47 gpr_ds_i386, 48 gpr_es_i386, 49 gpr_ax_i386, 50 gpr_bx_i386, 51 gpr_cx_i386, 52 gpr_dx_i386, 53 gpr_di_i386, 54 gpr_si_i386, 55 gpr_bp_i386, 56 gpr_sp_i386, 57 gpr_ah_i386, 58 gpr_bh_i386, 59 gpr_ch_i386, 60 gpr_dh_i386, 61 gpr_al_i386, 62 gpr_bl_i386, 63 gpr_cl_i386, 64 gpr_dl_i386 65 }; 66 static_assert((sizeof(g_gpr_regnums_i386) / sizeof(g_gpr_regnums_i386[0])) == k_num_gpr_registers_i386, 67 "g_gpr_regnums_i386 has wrong number of register infos"); 68 69 const uint32_t 70 g_fpu_regnums_i386[] = 71 { 72 fpu_fctrl_i386, 73 fpu_fstat_i386, 74 fpu_ftag_i386, 75 fpu_fop_i386, 76 fpu_fiseg_i386, 77 fpu_fioff_i386, 78 fpu_foseg_i386, 79 fpu_fooff_i386, 80 fpu_mxcsr_i386, 81 fpu_mxcsrmask_i386, 82 fpu_st0_i386, 83 fpu_st1_i386, 84 fpu_st2_i386, 85 fpu_st3_i386, 86 fpu_st4_i386, 87 fpu_st5_i386, 88 fpu_st6_i386, 89 fpu_st7_i386, 90 fpu_mm0_i386, 91 fpu_mm1_i386, 92 fpu_mm2_i386, 93 fpu_mm3_i386, 94 fpu_mm4_i386, 95 fpu_mm5_i386, 96 fpu_mm6_i386, 97 fpu_mm7_i386, 98 fpu_xmm0_i386, 99 fpu_xmm1_i386, 100 fpu_xmm2_i386, 101 fpu_xmm3_i386, 102 fpu_xmm4_i386, 103 fpu_xmm5_i386, 104 fpu_xmm6_i386, 105 fpu_xmm7_i386 106 }; 107 static_assert((sizeof(g_fpu_regnums_i386) / sizeof(g_fpu_regnums_i386[0])) == k_num_fpr_registers_i386, 108 "g_fpu_regnums_i386 has wrong number of register infos"); 109 110 const uint32_t 111 g_avx_regnums_i386[] = 112 { 113 fpu_ymm0_i386, 114 fpu_ymm1_i386, 115 fpu_ymm2_i386, 116 fpu_ymm3_i386, 117 fpu_ymm4_i386, 118 fpu_ymm5_i386, 119 fpu_ymm6_i386, 120 fpu_ymm7_i386 121 }; 122 static_assert((sizeof(g_avx_regnums_i386) / sizeof(g_avx_regnums_i386[0])) == k_num_avx_registers_i386, 123 " g_avx_regnums_i386 has wrong number of register infos"); 124 125 static const 126 uint32_t g_gpr_regnums_x86_64[] = 127 { 128 gpr_rax_x86_64, 129 gpr_rbx_x86_64, 130 gpr_rcx_x86_64, 131 gpr_rdx_x86_64, 132 gpr_rdi_x86_64, 133 gpr_rsi_x86_64, 134 gpr_rbp_x86_64, 135 gpr_rsp_x86_64, 136 gpr_r8_x86_64, 137 gpr_r9_x86_64, 138 gpr_r10_x86_64, 139 gpr_r11_x86_64, 140 gpr_r12_x86_64, 141 gpr_r13_x86_64, 142 gpr_r14_x86_64, 143 gpr_r15_x86_64, 144 gpr_rip_x86_64, 145 gpr_rflags_x86_64, 146 gpr_cs_x86_64, 147 gpr_fs_x86_64, 148 gpr_gs_x86_64, 149 gpr_ss_x86_64, 150 gpr_ds_x86_64, 151 gpr_es_x86_64, 152 gpr_eax_x86_64, 153 gpr_ebx_x86_64, 154 gpr_ecx_x86_64, 155 gpr_edx_x86_64, 156 gpr_edi_x86_64, 157 gpr_esi_x86_64, 158 gpr_ebp_x86_64, 159 gpr_esp_x86_64, 160 gpr_r8d_x86_64, // Low 32 bits or r8 161 gpr_r9d_x86_64, // Low 32 bits or r9 162 gpr_r10d_x86_64, // Low 32 bits or r10 163 gpr_r11d_x86_64, // Low 32 bits or r11 164 gpr_r12d_x86_64, // Low 32 bits or r12 165 gpr_r13d_x86_64, // Low 32 bits or r13 166 gpr_r14d_x86_64, // Low 32 bits or r14 167 gpr_r15d_x86_64, // Low 32 bits or r15 168 gpr_ax_x86_64, 169 gpr_bx_x86_64, 170 gpr_cx_x86_64, 171 gpr_dx_x86_64, 172 gpr_di_x86_64, 173 gpr_si_x86_64, 174 gpr_bp_x86_64, 175 gpr_sp_x86_64, 176 gpr_r8w_x86_64, // Low 16 bits or r8 177 gpr_r9w_x86_64, // Low 16 bits or r9 178 gpr_r10w_x86_64, // Low 16 bits or r10 179 gpr_r11w_x86_64, // Low 16 bits or r11 180 gpr_r12w_x86_64, // Low 16 bits or r12 181 gpr_r13w_x86_64, // Low 16 bits or r13 182 gpr_r14w_x86_64, // Low 16 bits or r14 183 gpr_r15w_x86_64, // Low 16 bits or r15 184 gpr_ah_x86_64, 185 gpr_bh_x86_64, 186 gpr_ch_x86_64, 187 gpr_dh_x86_64, 188 gpr_al_x86_64, 189 gpr_bl_x86_64, 190 gpr_cl_x86_64, 191 gpr_dl_x86_64, 192 gpr_dil_x86_64, 193 gpr_sil_x86_64, 194 gpr_bpl_x86_64, 195 gpr_spl_x86_64, 196 gpr_r8l_x86_64, // Low 8 bits or r8 197 gpr_r9l_x86_64, // Low 8 bits or r9 198 gpr_r10l_x86_64, // Low 8 bits or r10 199 gpr_r11l_x86_64, // Low 8 bits or r11 200 gpr_r12l_x86_64, // Low 8 bits or r12 201 gpr_r13l_x86_64, // Low 8 bits or r13 202 gpr_r14l_x86_64, // Low 8 bits or r14 203 gpr_r15l_x86_64, // Low 8 bits or r15 204 }; 205 static_assert((sizeof(g_gpr_regnums_x86_64) / sizeof(g_gpr_regnums_x86_64[0])) == k_num_gpr_registers_x86_64, 206 "g_gpr_regnums_x86_64 has wrong number of register infos"); 207 208 static const uint32_t 209 g_fpu_regnums_x86_64[] = 210 { 211 fpu_fctrl_x86_64, 212 fpu_fstat_x86_64, 213 fpu_ftag_x86_64, 214 fpu_fop_x86_64, 215 fpu_fiseg_x86_64, 216 fpu_fioff_x86_64, 217 fpu_foseg_x86_64, 218 fpu_fooff_x86_64, 219 fpu_mxcsr_x86_64, 220 fpu_mxcsrmask_x86_64, 221 fpu_st0_x86_64, 222 fpu_st1_x86_64, 223 fpu_st2_x86_64, 224 fpu_st3_x86_64, 225 fpu_st4_x86_64, 226 fpu_st5_x86_64, 227 fpu_st6_x86_64, 228 fpu_st7_x86_64, 229 fpu_mm0_x86_64, 230 fpu_mm1_x86_64, 231 fpu_mm2_x86_64, 232 fpu_mm3_x86_64, 233 fpu_mm4_x86_64, 234 fpu_mm5_x86_64, 235 fpu_mm6_x86_64, 236 fpu_mm7_x86_64, 237 fpu_xmm0_x86_64, 238 fpu_xmm1_x86_64, 239 fpu_xmm2_x86_64, 240 fpu_xmm3_x86_64, 241 fpu_xmm4_x86_64, 242 fpu_xmm5_x86_64, 243 fpu_xmm6_x86_64, 244 fpu_xmm7_x86_64, 245 fpu_xmm8_x86_64, 246 fpu_xmm9_x86_64, 247 fpu_xmm10_x86_64, 248 fpu_xmm11_x86_64, 249 fpu_xmm12_x86_64, 250 fpu_xmm13_x86_64, 251 fpu_xmm14_x86_64, 252 fpu_xmm15_x86_64 253 }; 254 static_assert((sizeof(g_fpu_regnums_x86_64) / sizeof(g_fpu_regnums_x86_64[0])) == k_num_fpr_registers_x86_64, 255 "g_fpu_regnums_x86_64 has wrong number of register infos"); 256 257 static const uint32_t 258 g_avx_regnums_x86_64[] = 259 { 260 fpu_ymm0_x86_64, 261 fpu_ymm1_x86_64, 262 fpu_ymm2_x86_64, 263 fpu_ymm3_x86_64, 264 fpu_ymm4_x86_64, 265 fpu_ymm5_x86_64, 266 fpu_ymm6_x86_64, 267 fpu_ymm7_x86_64, 268 fpu_ymm8_x86_64, 269 fpu_ymm9_x86_64, 270 fpu_ymm10_x86_64, 271 fpu_ymm11_x86_64, 272 fpu_ymm12_x86_64, 273 fpu_ymm13_x86_64, 274 fpu_ymm14_x86_64, 275 fpu_ymm15_x86_64 276 }; 277 static_assert((sizeof(g_avx_regnums_x86_64) / sizeof(g_avx_regnums_x86_64[0])) == k_num_avx_registers_x86_64, 278 "g_avx_regnums_x86_64 has wrong number of register infos"); 279 280 uint32_t RegisterContextPOSIX_x86::g_contained_eax[] = { gpr_eax_i386, LLDB_INVALID_REGNUM }; 281 uint32_t RegisterContextPOSIX_x86::g_contained_ebx[] = { gpr_ebx_i386, LLDB_INVALID_REGNUM }; 282 uint32_t RegisterContextPOSIX_x86::g_contained_ecx[] = { gpr_ecx_i386, LLDB_INVALID_REGNUM }; 283 uint32_t RegisterContextPOSIX_x86::g_contained_edx[] = { gpr_edx_i386, LLDB_INVALID_REGNUM }; 284 uint32_t RegisterContextPOSIX_x86::g_contained_edi[] = { gpr_edi_i386, LLDB_INVALID_REGNUM }; 285 uint32_t RegisterContextPOSIX_x86::g_contained_esi[] = { gpr_esi_i386, LLDB_INVALID_REGNUM }; 286 uint32_t RegisterContextPOSIX_x86::g_contained_ebp[] = { gpr_ebp_i386, LLDB_INVALID_REGNUM }; 287 uint32_t RegisterContextPOSIX_x86::g_contained_esp[] = { gpr_esp_i386, LLDB_INVALID_REGNUM }; 288 289 uint32_t RegisterContextPOSIX_x86::g_invalidate_eax[] = { gpr_eax_i386, gpr_ax_i386, gpr_ah_i386, gpr_al_i386, LLDB_INVALID_REGNUM }; 290 uint32_t RegisterContextPOSIX_x86::g_invalidate_ebx[] = { gpr_ebx_i386, gpr_bx_i386, gpr_bh_i386, gpr_bl_i386, LLDB_INVALID_REGNUM }; 291 uint32_t RegisterContextPOSIX_x86::g_invalidate_ecx[] = { gpr_ecx_i386, gpr_cx_i386, gpr_ch_i386, gpr_cl_i386, LLDB_INVALID_REGNUM }; 292 uint32_t RegisterContextPOSIX_x86::g_invalidate_edx[] = { gpr_edx_i386, gpr_dx_i386, gpr_dh_i386, gpr_dl_i386, LLDB_INVALID_REGNUM }; 293 uint32_t RegisterContextPOSIX_x86::g_invalidate_edi[] = { gpr_edi_i386, gpr_di_i386, LLDB_INVALID_REGNUM }; 294 uint32_t RegisterContextPOSIX_x86::g_invalidate_esi[] = { gpr_esi_i386, gpr_si_i386, LLDB_INVALID_REGNUM }; 295 uint32_t RegisterContextPOSIX_x86::g_invalidate_ebp[] = { gpr_ebp_i386, gpr_bp_i386, LLDB_INVALID_REGNUM }; 296 uint32_t RegisterContextPOSIX_x86::g_invalidate_esp[] = { gpr_esp_i386, gpr_sp_i386, LLDB_INVALID_REGNUM }; 297 298 uint32_t RegisterContextPOSIX_x86::g_contained_rax[] = { gpr_rax_x86_64, LLDB_INVALID_REGNUM }; 299 uint32_t RegisterContextPOSIX_x86::g_contained_rbx[] = { gpr_rbx_x86_64, LLDB_INVALID_REGNUM }; 300 uint32_t RegisterContextPOSIX_x86::g_contained_rcx[] = { gpr_rcx_x86_64, LLDB_INVALID_REGNUM }; 301 uint32_t RegisterContextPOSIX_x86::g_contained_rdx[] = { gpr_rdx_x86_64, LLDB_INVALID_REGNUM }; 302 uint32_t RegisterContextPOSIX_x86::g_contained_rdi[] = { gpr_rdi_x86_64, LLDB_INVALID_REGNUM }; 303 uint32_t RegisterContextPOSIX_x86::g_contained_rsi[] = { gpr_rsi_x86_64, LLDB_INVALID_REGNUM }; 304 uint32_t RegisterContextPOSIX_x86::g_contained_rbp[] = { gpr_rbp_x86_64, LLDB_INVALID_REGNUM }; 305 uint32_t RegisterContextPOSIX_x86::g_contained_rsp[] = { gpr_rsp_x86_64, LLDB_INVALID_REGNUM }; 306 uint32_t RegisterContextPOSIX_x86::g_contained_r8[] = { gpr_r8_x86_64, LLDB_INVALID_REGNUM }; 307 uint32_t RegisterContextPOSIX_x86::g_contained_r9[] = { gpr_r9_x86_64, LLDB_INVALID_REGNUM }; 308 uint32_t RegisterContextPOSIX_x86::g_contained_r10[] = { gpr_r10_x86_64, LLDB_INVALID_REGNUM }; 309 uint32_t RegisterContextPOSIX_x86::g_contained_r11[] = { gpr_r11_x86_64, LLDB_INVALID_REGNUM }; 310 uint32_t RegisterContextPOSIX_x86::g_contained_r12[] = { gpr_r12_x86_64, LLDB_INVALID_REGNUM }; 311 uint32_t RegisterContextPOSIX_x86::g_contained_r13[] = { gpr_r13_x86_64, LLDB_INVALID_REGNUM }; 312 uint32_t RegisterContextPOSIX_x86::g_contained_r14[] = { gpr_r14_x86_64, LLDB_INVALID_REGNUM }; 313 uint32_t RegisterContextPOSIX_x86::g_contained_r15[] = { gpr_r15_x86_64, LLDB_INVALID_REGNUM }; 314 315 uint32_t RegisterContextPOSIX_x86::g_invalidate_rax[] = { gpr_rax_x86_64, gpr_eax_x86_64, gpr_ax_x86_64, gpr_ah_x86_64, gpr_al_x86_64, LLDB_INVALID_REGNUM }; 316 uint32_t RegisterContextPOSIX_x86::g_invalidate_rbx[] = { gpr_rbx_x86_64, gpr_ebx_x86_64, gpr_bx_x86_64, gpr_bh_x86_64, gpr_bl_x86_64, LLDB_INVALID_REGNUM }; 317 uint32_t RegisterContextPOSIX_x86::g_invalidate_rcx[] = { gpr_rcx_x86_64, gpr_ecx_x86_64, gpr_cx_x86_64, gpr_ch_x86_64, gpr_cl_x86_64, LLDB_INVALID_REGNUM }; 318 uint32_t RegisterContextPOSIX_x86::g_invalidate_rdx[] = { gpr_rdx_x86_64, gpr_edx_x86_64, gpr_dx_x86_64, gpr_dh_x86_64, gpr_dl_x86_64, LLDB_INVALID_REGNUM }; 319 uint32_t RegisterContextPOSIX_x86::g_invalidate_rdi[] = { gpr_rdi_x86_64, gpr_edi_x86_64, gpr_di_x86_64, gpr_dil_x86_64, LLDB_INVALID_REGNUM }; 320 uint32_t RegisterContextPOSIX_x86::g_invalidate_rsi[] = { gpr_rsi_x86_64, gpr_esi_x86_64, gpr_si_x86_64, gpr_sil_x86_64, LLDB_INVALID_REGNUM }; 321 uint32_t RegisterContextPOSIX_x86::g_invalidate_rbp[] = { gpr_rbp_x86_64, gpr_ebp_x86_64, gpr_bp_x86_64, gpr_bpl_x86_64, LLDB_INVALID_REGNUM }; 322 uint32_t RegisterContextPOSIX_x86::g_invalidate_rsp[] = { gpr_rsp_x86_64, gpr_esp_x86_64, gpr_sp_x86_64, gpr_spl_x86_64, LLDB_INVALID_REGNUM }; 323 uint32_t RegisterContextPOSIX_x86::g_invalidate_r8[] = { gpr_r8_x86_64, gpr_r8d_x86_64, gpr_r8w_x86_64, gpr_r8l_x86_64, LLDB_INVALID_REGNUM }; 324 uint32_t RegisterContextPOSIX_x86::g_invalidate_r9[] = { gpr_r9_x86_64, gpr_r9d_x86_64, gpr_r9w_x86_64, gpr_r9l_x86_64, LLDB_INVALID_REGNUM }; 325 uint32_t RegisterContextPOSIX_x86::g_invalidate_r10[] = { gpr_r10_x86_64, gpr_r10d_x86_64, gpr_r10w_x86_64, gpr_r10l_x86_64, LLDB_INVALID_REGNUM }; 326 uint32_t RegisterContextPOSIX_x86::g_invalidate_r11[] = { gpr_r11_x86_64, gpr_r11d_x86_64, gpr_r11w_x86_64, gpr_r11l_x86_64, LLDB_INVALID_REGNUM }; 327 uint32_t RegisterContextPOSIX_x86::g_invalidate_r12[] = { gpr_r12_x86_64, gpr_r12d_x86_64, gpr_r12w_x86_64, gpr_r12l_x86_64, LLDB_INVALID_REGNUM }; 328 uint32_t RegisterContextPOSIX_x86::g_invalidate_r13[] = { gpr_r13_x86_64, gpr_r13d_x86_64, gpr_r13w_x86_64, gpr_r13l_x86_64, LLDB_INVALID_REGNUM }; 329 uint32_t RegisterContextPOSIX_x86::g_invalidate_r14[] = { gpr_r14_x86_64, gpr_r14d_x86_64, gpr_r14w_x86_64, gpr_r14l_x86_64, LLDB_INVALID_REGNUM }; 330 uint32_t RegisterContextPOSIX_x86::g_invalidate_r15[] = { gpr_r15_x86_64, gpr_r15d_x86_64, gpr_r15w_x86_64, gpr_r15l_x86_64, LLDB_INVALID_REGNUM }; 331 332 // Number of register sets provided by this context. 333 enum 334 { 335 k_num_extended_register_sets = 1, 336 k_num_register_sets = 3 337 }; 338 339 static const RegisterSet 340 g_reg_sets_i386[k_num_register_sets] = 341 { 342 { "General Purpose Registers", "gpr", k_num_gpr_registers_i386, g_gpr_regnums_i386 }, 343 { "Floating Point Registers", "fpu", k_num_fpr_registers_i386, g_fpu_regnums_i386 }, 344 { "Advanced Vector Extensions", "avx", k_num_avx_registers_i386, g_avx_regnums_i386 } 345 }; 346 347 static const RegisterSet 348 g_reg_sets_x86_64[k_num_register_sets] = 349 { 350 { "General Purpose Registers", "gpr", k_num_gpr_registers_x86_64, g_gpr_regnums_x86_64 }, 351 { "Floating Point Registers", "fpu", k_num_fpr_registers_x86_64, g_fpu_regnums_x86_64 }, 352 { "Advanced Vector Extensions", "avx", k_num_avx_registers_x86_64, g_avx_regnums_x86_64 } 353 }; 354 355 bool RegisterContextPOSIX_x86::IsGPR(unsigned reg) 356 { 357 return reg <= m_reg_info.last_gpr; // GPR's come first. 358 } 359 360 bool RegisterContextPOSIX_x86::IsFPR(unsigned reg) 361 { 362 return (m_reg_info.first_fpr <= reg && reg <= m_reg_info.last_fpr); 363 } 364 365 bool RegisterContextPOSIX_x86::IsAVX(unsigned reg) 366 { 367 return (m_reg_info.first_ymm <= reg && reg <= m_reg_info.last_ymm); 368 } 369 370 bool RegisterContextPOSIX_x86::IsFPR(unsigned reg, FPRType fpr_type) 371 { 372 bool generic_fpr = IsFPR(reg); 373 374 if (fpr_type == eXSAVE) 375 return generic_fpr || IsAVX(reg); 376 return generic_fpr; 377 } 378 379 RegisterContextPOSIX_x86::RegisterContextPOSIX_x86(Thread &thread, 380 uint32_t concrete_frame_idx, 381 RegisterInfoInterface *register_info) 382 : RegisterContext(thread, concrete_frame_idx) 383 { 384 m_register_info_ap.reset(register_info); 385 386 switch (register_info->m_target_arch.GetCore()) 387 { 388 case ArchSpec::eCore_x86_32_i386: 389 case ArchSpec::eCore_x86_32_i486: 390 case ArchSpec::eCore_x86_32_i486sx: 391 m_reg_info.num_registers = k_num_registers_i386; 392 m_reg_info.num_gpr_registers = k_num_gpr_registers_i386; 393 m_reg_info.num_fpr_registers = k_num_fpr_registers_i386; 394 m_reg_info.num_avx_registers = k_num_avx_registers_i386; 395 m_reg_info.last_gpr = k_last_gpr_i386; 396 m_reg_info.first_fpr = k_first_fpr_i386; 397 m_reg_info.last_fpr = k_last_fpr_i386; 398 m_reg_info.first_st = fpu_st0_i386; 399 m_reg_info.last_st = fpu_st7_i386; 400 m_reg_info.first_mm = fpu_mm0_i386; 401 m_reg_info.last_mm = fpu_mm7_i386; 402 m_reg_info.first_xmm = fpu_xmm0_i386; 403 m_reg_info.last_xmm = fpu_xmm7_i386; 404 m_reg_info.first_ymm = fpu_ymm0_i386; 405 m_reg_info.last_ymm = fpu_ymm7_i386; 406 m_reg_info.first_dr = dr0_i386; 407 m_reg_info.gpr_flags = gpr_eflags_i386; 408 break; 409 case ArchSpec::eCore_x86_64_x86_64: 410 m_reg_info.num_registers = k_num_registers_x86_64; 411 m_reg_info.num_gpr_registers = k_num_gpr_registers_x86_64; 412 m_reg_info.num_fpr_registers = k_num_fpr_registers_x86_64; 413 m_reg_info.num_avx_registers = k_num_avx_registers_x86_64; 414 m_reg_info.last_gpr = k_last_gpr_x86_64; 415 m_reg_info.first_fpr = k_first_fpr_x86_64; 416 m_reg_info.last_fpr = k_last_fpr_x86_64; 417 m_reg_info.first_st = fpu_st0_x86_64; 418 m_reg_info.last_st = fpu_st7_x86_64; 419 m_reg_info.first_mm = fpu_mm0_x86_64; 420 m_reg_info.last_mm = fpu_mm7_x86_64; 421 m_reg_info.first_xmm = fpu_xmm0_x86_64; 422 m_reg_info.last_xmm = fpu_xmm15_x86_64; 423 m_reg_info.first_ymm = fpu_ymm0_x86_64; 424 m_reg_info.last_ymm = fpu_ymm15_x86_64; 425 m_reg_info.first_dr = dr0_x86_64; 426 m_reg_info.gpr_flags = gpr_rflags_x86_64; 427 break; 428 default: 429 assert(false && "Unhandled target architecture."); 430 break; 431 } 432 433 // Initialize m_iovec to point to the buffer and buffer size 434 // using the conventions of Berkeley style UIO structures, as required 435 // by PTRACE extensions. 436 m_iovec.iov_base = &m_fpr.xstate.xsave; 437 m_iovec.iov_len = sizeof(m_fpr.xstate.xsave); 438 439 ::memset(&m_fpr, 0, sizeof(FPR)); 440 441 // elf-core yet to support ReadFPR() 442 ProcessSP base = CalculateProcess(); 443 if (base.get()->GetPluginName() == ProcessElfCore::GetPluginNameStatic()) 444 return; 445 446 m_fpr_type = eNotValid; 447 } 448 449 RegisterContextPOSIX_x86::~RegisterContextPOSIX_x86() 450 { 451 } 452 453 RegisterContextPOSIX_x86::FPRType RegisterContextPOSIX_x86::GetFPRType() 454 { 455 if (m_fpr_type == eNotValid) 456 { 457 // TODO: Use assembly to call cpuid on the inferior and query ebx or ecx 458 m_fpr_type = eXSAVE; // extended floating-point registers, if available 459 if (false == ReadFPR()) 460 m_fpr_type = eFXSAVE; // assume generic floating-point registers 461 } 462 return m_fpr_type; 463 } 464 465 void 466 RegisterContextPOSIX_x86::Invalidate() 467 { 468 } 469 470 void 471 RegisterContextPOSIX_x86::InvalidateAllRegisters() 472 { 473 } 474 475 unsigned 476 RegisterContextPOSIX_x86::GetRegisterOffset(unsigned reg) 477 { 478 assert(reg < m_reg_info.num_registers && "Invalid register number."); 479 return GetRegisterInfo()[reg].byte_offset; 480 } 481 482 unsigned 483 RegisterContextPOSIX_x86::GetRegisterSize(unsigned reg) 484 { 485 assert(reg < m_reg_info.num_registers && "Invalid register number."); 486 return GetRegisterInfo()[reg].byte_size; 487 } 488 489 size_t 490 RegisterContextPOSIX_x86::GetRegisterCount() 491 { 492 size_t num_registers = m_reg_info.num_gpr_registers + m_reg_info.num_fpr_registers; 493 if (GetFPRType() == eXSAVE) 494 return num_registers + m_reg_info.num_avx_registers; 495 return num_registers; 496 } 497 498 size_t 499 RegisterContextPOSIX_x86::GetGPRSize() 500 { 501 return m_register_info_ap->GetGPRSize (); 502 } 503 504 const RegisterInfo * 505 RegisterContextPOSIX_x86::GetRegisterInfo() 506 { 507 // Commonly, this method is overridden and g_register_infos is copied and specialized. 508 // So, use GetRegisterInfo() rather than g_register_infos in this scope. 509 return m_register_info_ap->GetRegisterInfo (); 510 } 511 512 const RegisterInfo * 513 RegisterContextPOSIX_x86::GetRegisterInfoAtIndex(size_t reg) 514 { 515 if (reg < m_reg_info.num_registers) 516 return &GetRegisterInfo()[reg]; 517 else 518 return NULL; 519 } 520 521 size_t 522 RegisterContextPOSIX_x86::GetRegisterSetCount() 523 { 524 size_t sets = 0; 525 for (size_t set = 0; set < k_num_register_sets; ++set) 526 { 527 if (IsRegisterSetAvailable(set)) 528 ++sets; 529 } 530 531 return sets; 532 } 533 534 const RegisterSet * 535 RegisterContextPOSIX_x86::GetRegisterSet(size_t set) 536 { 537 if (IsRegisterSetAvailable(set)) 538 { 539 switch (m_register_info_ap->m_target_arch.GetCore()) 540 { 541 case ArchSpec::eCore_x86_32_i386: 542 case ArchSpec::eCore_x86_32_i486: 543 case ArchSpec::eCore_x86_32_i486sx: 544 return &g_reg_sets_i386[set]; 545 case ArchSpec::eCore_x86_64_x86_64: 546 return &g_reg_sets_x86_64[set]; 547 default: 548 assert(false && "Unhandled target architecture."); 549 return NULL; 550 } 551 } 552 return NULL; 553 } 554 555 const char * 556 RegisterContextPOSIX_x86::GetRegisterName(unsigned reg) 557 { 558 assert(reg < m_reg_info.num_registers && "Invalid register offset."); 559 return GetRegisterInfo()[reg].name; 560 } 561 562 lldb::ByteOrder 563 RegisterContextPOSIX_x86::GetByteOrder() 564 { 565 // Get the target process whose privileged thread was used for the register read. 566 lldb::ByteOrder byte_order = eByteOrderInvalid; 567 Process *process = CalculateProcess().get(); 568 569 if (process) 570 byte_order = process->GetByteOrder(); 571 return byte_order; 572 } 573 574 // Parse ymm registers and into xmm.bytes and ymmh.bytes. 575 bool RegisterContextPOSIX_x86::CopyYMMtoXSTATE(uint32_t reg, lldb::ByteOrder byte_order) 576 { 577 if (!IsAVX(reg)) 578 return false; 579 580 if (byte_order == eByteOrderLittle) 581 { 582 ::memcpy(m_fpr.xstate.fxsave.xmm[reg - m_reg_info.first_ymm].bytes, 583 m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes, 584 sizeof(XMMReg)); 585 ::memcpy(m_fpr.xstate.xsave.ymmh[reg - m_reg_info.first_ymm].bytes, 586 m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes + sizeof(XMMReg), 587 sizeof(YMMHReg)); 588 return true; 589 } 590 591 if (byte_order == eByteOrderBig) 592 { 593 ::memcpy(m_fpr.xstate.fxsave.xmm[reg - m_reg_info.first_ymm].bytes, 594 m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes + sizeof(XMMReg), 595 sizeof(XMMReg)); 596 ::memcpy(m_fpr.xstate.xsave.ymmh[reg - m_reg_info.first_ymm].bytes, 597 m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes, 598 sizeof(YMMHReg)); 599 return true; 600 } 601 return false; // unsupported or invalid byte order 602 } 603 604 // Concatenate xmm.bytes with ymmh.bytes 605 bool RegisterContextPOSIX_x86::CopyXSTATEtoYMM(uint32_t reg, lldb::ByteOrder byte_order) 606 { 607 if (!IsAVX(reg)) 608 return false; 609 610 if (byte_order == eByteOrderLittle) 611 { 612 ::memcpy(m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes, 613 m_fpr.xstate.fxsave.xmm[reg - m_reg_info.first_ymm].bytes, 614 sizeof(XMMReg)); 615 ::memcpy(m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes + sizeof(XMMReg), 616 m_fpr.xstate.xsave.ymmh[reg - m_reg_info.first_ymm].bytes, 617 sizeof(YMMHReg)); 618 return true; 619 } 620 621 if (byte_order == eByteOrderBig) 622 { 623 ::memcpy(m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes + sizeof(XMMReg), 624 m_fpr.xstate.fxsave.xmm[reg - m_reg_info.first_ymm].bytes, 625 sizeof(XMMReg)); 626 ::memcpy(m_ymm_set.ymm[reg - m_reg_info.first_ymm].bytes, 627 m_fpr.xstate.xsave.ymmh[reg - m_reg_info.first_ymm].bytes, 628 sizeof(YMMHReg)); 629 return true; 630 } 631 return false; // unsupported or invalid byte order 632 } 633 634 bool 635 RegisterContextPOSIX_x86::IsRegisterSetAvailable(size_t set_index) 636 { 637 // Note: Extended register sets are assumed to be at the end of g_reg_sets... 638 size_t num_sets = k_num_register_sets - k_num_extended_register_sets; 639 640 if (GetFPRType() == eXSAVE) // ...and to start with AVX registers. 641 ++num_sets; 642 return (set_index < num_sets); 643 } 644 645 646 // Used when parsing DWARF and EH frame information and any other 647 // object file sections that contain register numbers in them. 648 uint32_t 649 RegisterContextPOSIX_x86::ConvertRegisterKindToRegisterNumber(uint32_t kind, 650 uint32_t num) 651 { 652 const uint32_t num_regs = GetRegisterCount(); 653 654 assert (kind < kNumRegisterKinds); 655 for (uint32_t reg_idx = 0; reg_idx < num_regs; ++reg_idx) 656 { 657 const RegisterInfo *reg_info = GetRegisterInfoAtIndex (reg_idx); 658 659 if (reg_info->kinds[kind] == num) 660 return reg_idx; 661 } 662 663 return LLDB_INVALID_REGNUM; 664 } 665 666