1 //===- ARM64.cpp ----------------------------------------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "Arch/ARM64Common.h" 10 #include "InputFiles.h" 11 #include "Symbols.h" 12 #include "SyntheticSections.h" 13 #include "Target.h" 14 15 #include "lld/Common/ErrorHandler.h" 16 #include "mach-o/compact_unwind_encoding.h" 17 #include "llvm/ADT/SmallVector.h" 18 #include "llvm/ADT/StringRef.h" 19 #include "llvm/BinaryFormat/MachO.h" 20 #include "llvm/Support/Endian.h" 21 #include "llvm/Support/MathExtras.h" 22 23 using namespace llvm; 24 using namespace llvm::MachO; 25 using namespace llvm::support::endian; 26 using namespace lld; 27 using namespace lld::macho; 28 29 namespace { 30 31 struct ARM64 : ARM64Common { 32 ARM64(); 33 void writeStub(uint8_t *buf, const Symbol &) const override; 34 void writeStubHelperHeader(uint8_t *buf) const override; 35 void writeStubHelperEntry(uint8_t *buf, const Symbol &, 36 uint64_t entryAddr) const override; 37 const RelocAttrs &getRelocAttrs(uint8_t type) const override; 38 void populateThunk(InputSection *thunk, Symbol *funcSym) override; 39 }; 40 41 } // namespace 42 43 // Random notes on reloc types: 44 // ADDEND always pairs with BRANCH26, PAGE21, or PAGEOFF12 45 // POINTER_TO_GOT: ld64 supports a 4-byte pc-relative form as well as an 8-byte 46 // absolute version of this relocation. The semantics of the absolute relocation 47 // are weird -- it results in the value of the GOT slot being written, instead 48 // of the address. Let's not support it unless we find a real-world use case. 49 50 const RelocAttrs &ARM64::getRelocAttrs(uint8_t type) const { 51 static const std::array<RelocAttrs, 11> relocAttrsArray{{ 52 #define B(x) RelocAttrBits::x 53 {"UNSIGNED", 54 B(UNSIGNED) | B(ABSOLUTE) | B(EXTERN) | B(LOCAL) | B(BYTE4) | B(BYTE8)}, 55 {"SUBTRACTOR", B(SUBTRAHEND) | B(EXTERN) | B(BYTE4) | B(BYTE8)}, 56 {"BRANCH26", B(PCREL) | B(EXTERN) | B(BRANCH) | B(BYTE4)}, 57 {"PAGE21", B(PCREL) | B(EXTERN) | B(BYTE4)}, 58 {"PAGEOFF12", B(ABSOLUTE) | B(EXTERN) | B(BYTE4)}, 59 {"GOT_LOAD_PAGE21", B(PCREL) | B(EXTERN) | B(GOT) | B(BYTE4)}, 60 {"GOT_LOAD_PAGEOFF12", 61 B(ABSOLUTE) | B(EXTERN) | B(GOT) | B(LOAD) | B(BYTE4)}, 62 {"POINTER_TO_GOT", B(PCREL) | B(EXTERN) | B(GOT) | B(POINTER) | B(BYTE4)}, 63 {"TLVP_LOAD_PAGE21", B(PCREL) | B(EXTERN) | B(TLV) | B(BYTE4)}, 64 {"TLVP_LOAD_PAGEOFF12", 65 B(ABSOLUTE) | B(EXTERN) | B(TLV) | B(LOAD) | B(BYTE4)}, 66 {"ADDEND", B(ADDEND)}, 67 #undef B 68 }}; 69 assert(type < relocAttrsArray.size() && "invalid relocation type"); 70 if (type >= relocAttrsArray.size()) 71 return invalidRelocAttrs; 72 return relocAttrsArray[type]; 73 } 74 75 static constexpr uint32_t stubCode[] = { 76 0x90000010, // 00: adrp x16, __la_symbol_ptr@page 77 0xf9400210, // 04: ldr x16, [x16, __la_symbol_ptr@pageoff] 78 0xd61f0200, // 08: br x16 79 }; 80 81 void ARM64::writeStub(uint8_t *buf8, const Symbol &sym) const { 82 ::writeStub<LP64>(buf8, stubCode, sym); 83 } 84 85 static constexpr uint32_t stubHelperHeaderCode[] = { 86 0x90000011, // 00: adrp x17, _dyld_private@page 87 0x91000231, // 04: add x17, x17, _dyld_private@pageoff 88 0xa9bf47f0, // 08: stp x16/x17, [sp, #-16]! 89 0x90000010, // 0c: adrp x16, dyld_stub_binder@page 90 0xf9400210, // 10: ldr x16, [x16, dyld_stub_binder@pageoff] 91 0xd61f0200, // 14: br x16 92 }; 93 94 void ARM64::writeStubHelperHeader(uint8_t *buf8) const { 95 ::writeStubHelperHeader<LP64>(buf8, stubHelperHeaderCode); 96 } 97 98 static constexpr uint32_t stubHelperEntryCode[] = { 99 0x18000050, // 00: ldr w16, l0 100 0x14000000, // 04: b stubHelperHeader 101 0x00000000, // 08: l0: .long 0 102 }; 103 104 void ARM64::writeStubHelperEntry(uint8_t *buf8, const Symbol &sym, 105 uint64_t entryVA) const { 106 ::writeStubHelperEntry(buf8, stubHelperEntryCode, sym, entryVA); 107 } 108 109 // A thunk is the relaxed variation of stubCode. We don't need the 110 // extra indirection through a lazy pointer because the target address 111 // is known at link time. 112 static constexpr uint32_t thunkCode[] = { 113 0x90000010, // 00: adrp x16, <thunk.ptr>@page 114 0x91000210, // 04: add x16, [x16,<thunk.ptr>@pageoff] 115 0xd61f0200, // 08: br x16 116 }; 117 118 void ARM64::populateThunk(InputSection *thunk, Symbol *funcSym) { 119 thunk->align = 4; 120 thunk->data = {reinterpret_cast<const uint8_t *>(thunkCode), 121 sizeof(thunkCode)}; 122 thunk->relocs.push_back({/*type=*/ARM64_RELOC_PAGEOFF12, 123 /*pcrel=*/false, /*length=*/2, 124 /*offset=*/4, /*addend=*/0, 125 /*referent=*/funcSym}); 126 thunk->relocs.push_back({/*type=*/ARM64_RELOC_PAGE21, 127 /*pcrel=*/true, /*length=*/2, 128 /*offset=*/0, /*addend=*/0, 129 /*referent=*/funcSym}); 130 } 131 132 ARM64::ARM64() : ARM64Common(LP64()) { 133 cpuType = CPU_TYPE_ARM64; 134 cpuSubtype = CPU_SUBTYPE_ARM64_ALL; 135 136 stubSize = sizeof(stubCode); 137 thunkSize = sizeof(thunkCode); 138 139 // Branch immediate is two's complement 26 bits, which is implicitly 140 // multiplied by 4 (since all functions are 4-aligned: The branch range 141 // is -4*(2**(26-1))..4*(2**(26-1) - 1). 142 backwardBranchRange = 128 * 1024 * 1024; 143 forwardBranchRange = backwardBranchRange - 4; 144 145 modeDwarfEncoding = UNWIND_ARM64_MODE_DWARF; 146 subtractorRelocType = ARM64_RELOC_SUBTRACTOR; 147 unsignedRelocType = ARM64_RELOC_UNSIGNED; 148 149 stubHelperHeaderSize = sizeof(stubHelperHeaderCode); 150 stubHelperEntrySize = sizeof(stubHelperEntryCode); 151 } 152 153 TargetInfo *macho::createARM64TargetInfo() { 154 static ARM64 t; 155 return &t; 156 } 157