1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
3 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
4 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
5 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
6 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
7 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3
8
9 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
10 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
11 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
12 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
13 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
14 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
15
16 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
17 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
18 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9
19 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11
20 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
21 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11
22
23 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
24 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
25 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
26 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
27 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
28 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
29 // expected-no-diagnostics
30 #ifndef HEADER
31 #define HEADER
32 template <class T>
33 struct S {
34 T f;
SS35 S(T a) : f(a) {}
SS36 S() : f() {}
operator TS37 operator T() { return T(); }
~SS38 ~S() {}
39 };
40
41 volatile int g __attribute__((aligned(128))) = 1212;
42
43 struct SS {
44 int a;
45 int b : 4;
46 int &c;
SSSS47 SS(int &d) : a(0), b(0), c(d) {
48 #pragma omp target
49 #pragma omp teams private(a, b, c)
50 #ifdef LAMBDA
51 [&]() {
52 ++this->a, --b, (this)->c /= 1;
53 }();
54 #else
55 ++this->a, --b, c /= 1;
56 #endif
57 }
58 };
59
60 template<typename T>
61 struct SST {
62 T a;
SSTSST63 SST() : a(T()) {
64 #pragma omp target
65 #pragma omp teams private(a)
66 #ifdef LAMBDA
67 [&]() {
68 [&]() {
69 ++this->a;
70 }();
71 }();
72 #else
73 ++(this)->a;
74 #endif
75 }
76 };
77
78 template <typename T>
tmain()79 T tmain() {
80 S<T> test;
81 SST<T> sst;
82 T t_var __attribute__((aligned(128))) = T();
83 T vec[] __attribute__((aligned(128))) = {1, 2};
84 S<T> s_arr[] __attribute__((aligned(128))) = {1, 2};
85 S<T> var __attribute__((aligned(128))) (3);
86 #pragma omp target
87 #pragma omp teams private(t_var, vec, s_arr, var)
88 {
89 vec[0] = t_var;
90 s_arr[0] = var;
91 }
92 return T();
93 }
94
main()95 int main() {
96 static int sivar;
97 SS ss(sivar);
98 #ifdef LAMBDA
99
100
101 // lambda and target region in main
102
103 // target region in struct constructor
104
105 // offloading function in struct constructor
106
107 // outlined teams region in struct constructor
108 // call void [[INNER_LAMBDA_CONSTR:@.+]]([[CAP_0_TY]]*
109
110 // inner lambda in struct constructor
111 // define{{.*}} void [[INNER_LAMBDA_CONSTR]]([[CAP_0_TY]]*
112
113
114 // ret
115
116 [&]() {
117 #pragma omp target
118 #pragma omp teams private(g, sivar)
119 {
120
121 g = 1;
122 sivar = 2;
123 [&]() {
124 g = 2;
125 sivar = 4;
126 }();
127 }
128 }();
129 return 0;
130 #else
131 S<float> test;
132 int t_var = 0;
133 int vec[] = {1, 2};
134 S<float> s_arr[] = {1, 2};
135 S<float> var(3);
136 #pragma omp target
137 #pragma omp teams private(t_var, vec, s_arr, var, sivar)
138 {
139 vec[0] = t_var;
140 s_arr[0] = var;
141 sivar = 3;
142 }
143 return tmain<int>();
144 #endif
145 }
146
147
148 // target region in main function
149
150
151 // template tmain
152
153 // target in SS constructor
154
155
156 // target in tmain template
157
158
159 // SST constructor
160
161 // target in SST constructor
162
163
164 #endif
165
166 // CHECK1-LABEL: define {{[^@]+}}@main
167 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
168 // CHECK1-NEXT: entry:
169 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
170 // CHECK1-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
171 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1
172 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4
173 // CHECK1-NEXT: call void @_ZN2SSC1ERi(%struct.SS* noundef nonnull align 8 dereferenceable(16) [[SS]], i32* noundef nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar)
174 // CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 1 dereferenceable(1) [[REF_TMP]])
175 // CHECK1-NEXT: ret i32 0
176 //
177 //
178 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC1ERi
179 // CHECK1-SAME: (%struct.SS* noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
180 // CHECK1-NEXT: entry:
181 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
182 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8
183 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
184 // CHECK1-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8
185 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
186 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
187 // CHECK1-NEXT: call void @_ZN2SSC2ERi(%struct.SS* noundef nonnull align 8 dereferenceable(16) [[THIS1]], i32* noundef nonnull align 4 dereferenceable(4) [[TMP0]])
188 // CHECK1-NEXT: ret void
189 //
190 //
191 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC2ERi
192 // CHECK1-SAME: (%struct.SS* noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
193 // CHECK1-NEXT: entry:
194 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
195 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8
196 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
197 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
198 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
199 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
200 // CHECK1-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8
201 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
202 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
203 // CHECK1-NEXT: store i32 0, i32* [[A]], align 8
204 // CHECK1-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
205 // CHECK1-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4
206 // CHECK1-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
207 // CHECK1-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
208 // CHECK1-NEXT: store i8 [[BF_SET]], i8* [[B]], align 4
209 // CHECK1-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
210 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
211 // CHECK1-NEXT: store i32* [[TMP0]], i32** [[C]], align 8
212 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
213 // CHECK1-NEXT: [[TMP2:%.*]] = bitcast i8** [[TMP1]] to %struct.SS**
214 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP2]], align 8
215 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
216 // CHECK1-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to %struct.SS**
217 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP4]], align 8
218 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
219 // CHECK1-NEXT: store i8* null, i8** [[TMP5]], align 8
220 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
221 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
222 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
223 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
224 // CHECK1-NEXT: store i32 1, i32* [[TMP8]], align 4
225 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
226 // CHECK1-NEXT: store i32 1, i32* [[TMP9]], align 4
227 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
228 // CHECK1-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 8
229 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
230 // CHECK1-NEXT: store i8** [[TMP7]], i8*** [[TMP11]], align 8
231 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
232 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP12]], align 8
233 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
234 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP13]], align 8
235 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
236 // CHECK1-NEXT: store i8** null, i8*** [[TMP14]], align 8
237 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
238 // CHECK1-NEXT: store i8** null, i8*** [[TMP15]], align 8
239 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
240 // CHECK1-NEXT: store i64 0, i64* [[TMP16]], align 8
241 // CHECK1-NEXT: [[TMP17:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
242 // CHECK1-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
243 // CHECK1-NEXT: br i1 [[TMP18]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
244 // CHECK1: omp_offload.failed:
245 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48(%struct.SS* [[THIS1]]) #[[ATTR4:[0-9]+]]
246 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
247 // CHECK1: omp_offload.cont:
248 // CHECK1-NEXT: ret void
249 //
250 //
251 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48
252 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR3:[0-9]+]] {
253 // CHECK1-NEXT: entry:
254 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
255 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
256 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
257 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
258 // CHECK1-NEXT: ret void
259 //
260 //
261 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
262 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR3]] {
263 // CHECK1-NEXT: entry:
264 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
265 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
266 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
267 // CHECK1-NEXT: [[A:%.*]] = alloca i32, align 4
268 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32*, align 8
269 // CHECK1-NEXT: [[B:%.*]] = alloca i32, align 4
270 // CHECK1-NEXT: [[C:%.*]] = alloca i32, align 4
271 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8
272 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
273 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
274 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
275 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
276 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
277 // CHECK1-NEXT: store i32* [[A]], i32** [[TMP]], align 8
278 // CHECK1-NEXT: store i32* [[C]], i32** [[_TMP1]], align 8
279 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
280 // CHECK1-NEXT: store %struct.SS* [[TMP0]], %struct.SS** [[TMP1]], align 8
281 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
282 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP]], align 8
283 // CHECK1-NEXT: store i32* [[TMP3]], i32** [[TMP2]], align 8
284 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
285 // CHECK1-NEXT: store i32* [[B]], i32** [[TMP4]], align 8
286 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
287 // CHECK1-NEXT: [[TMP6:%.*]] = load i32*, i32** [[_TMP1]], align 8
288 // CHECK1-NEXT: store i32* [[TMP6]], i32** [[TMP5]], align 8
289 // CHECK1-NEXT: call void @_ZZN2SSC1ERiENKUlvE_clEv(%class.anon.0* noundef nonnull align 8 dereferenceable(32) [[REF_TMP]])
290 // CHECK1-NEXT: ret void
291 //
292 //
293 // CHECK1-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE_clEv
294 // CHECK1-SAME: (%class.anon.0* noundef nonnull align 8 dereferenceable(32) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] align 2 {
295 // CHECK1-NEXT: entry:
296 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %class.anon.0*, align 8
297 // CHECK1-NEXT: store %class.anon.0* [[THIS]], %class.anon.0** [[THIS_ADDR]], align 8
298 // CHECK1-NEXT: [[THIS1:%.*]] = load %class.anon.0*, %class.anon.0** [[THIS_ADDR]], align 8
299 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON_0:%.*]], %class.anon.0* [[THIS1]], i32 0, i32 0
300 // CHECK1-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[TMP0]], align 8
301 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 1
302 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP2]], align 8
303 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
304 // CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1
305 // CHECK1-NEXT: store i32 [[INC]], i32* [[TMP3]], align 4
306 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 2
307 // CHECK1-NEXT: [[TMP6:%.*]] = load i32*, i32** [[TMP5]], align 8
308 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
309 // CHECK1-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP7]], -1
310 // CHECK1-NEXT: store i32 [[DEC]], i32* [[TMP6]], align 4
311 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 3
312 // CHECK1-NEXT: [[TMP9:%.*]] = load i32*, i32** [[TMP8]], align 8
313 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
314 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 1
315 // CHECK1-NEXT: store i32 [[DIV]], i32* [[TMP9]], align 4
316 // CHECK1-NEXT: ret void
317 //
318 //
319 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l117
320 // CHECK1-SAME: () #[[ATTR3]] {
321 // CHECK1-NEXT: entry:
322 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*))
323 // CHECK1-NEXT: ret void
324 //
325 //
326 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
327 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
328 // CHECK1-NEXT: entry:
329 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
330 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
331 // CHECK1-NEXT: [[G:%.*]] = alloca i32, align 128
332 // CHECK1-NEXT: [[SIVAR:%.*]] = alloca i32, align 4
333 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_1:%.*]], align 8
334 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
335 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
336 // CHECK1-NEXT: store i32 1, i32* [[G]], align 128
337 // CHECK1-NEXT: store i32 2, i32* [[SIVAR]], align 4
338 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 0
339 // CHECK1-NEXT: store i32* [[G]], i32** [[TMP0]], align 8
340 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 1
341 // CHECK1-NEXT: store i32* [[SIVAR]], i32** [[TMP1]], align 8
342 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.1* noundef nonnull align 8 dereferenceable(16) [[REF_TMP]])
343 // CHECK1-NEXT: ret void
344 //
345 //
346 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
347 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] {
348 // CHECK1-NEXT: entry:
349 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
350 // CHECK1-NEXT: ret void
351 //
352 //
353 // CHECK3-LABEL: define {{[^@]+}}@main
354 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
355 // CHECK3-NEXT: entry:
356 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
357 // CHECK3-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
358 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1
359 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4
360 // CHECK3-NEXT: call void @_ZN2SSC1ERi(%struct.SS* noundef nonnull align 4 dereferenceable(12) [[SS]], i32* noundef nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar)
361 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 1 dereferenceable(1) [[REF_TMP]])
362 // CHECK3-NEXT: ret i32 0
363 //
364 //
365 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC1ERi
366 // CHECK3-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(12) [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
367 // CHECK3-NEXT: entry:
368 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
369 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 4
370 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
371 // CHECK3-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 4
372 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
373 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 4
374 // CHECK3-NEXT: call void @_ZN2SSC2ERi(%struct.SS* noundef nonnull align 4 dereferenceable(12) [[THIS1]], i32* noundef nonnull align 4 dereferenceable(4) [[TMP0]])
375 // CHECK3-NEXT: ret void
376 //
377 //
378 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC2ERi
379 // CHECK3-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(12) [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
380 // CHECK3-NEXT: entry:
381 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
382 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 4
383 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
384 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
385 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
386 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
387 // CHECK3-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 4
388 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
389 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
390 // CHECK3-NEXT: store i32 0, i32* [[A]], align 4
391 // CHECK3-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
392 // CHECK3-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4
393 // CHECK3-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
394 // CHECK3-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
395 // CHECK3-NEXT: store i8 [[BF_SET]], i8* [[B]], align 4
396 // CHECK3-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
397 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 4
398 // CHECK3-NEXT: store i32* [[TMP0]], i32** [[C]], align 4
399 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
400 // CHECK3-NEXT: [[TMP2:%.*]] = bitcast i8** [[TMP1]] to %struct.SS**
401 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP2]], align 4
402 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
403 // CHECK3-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to %struct.SS**
404 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP4]], align 4
405 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
406 // CHECK3-NEXT: store i8* null, i8** [[TMP5]], align 4
407 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
408 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
409 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
410 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
411 // CHECK3-NEXT: store i32 1, i32* [[TMP8]], align 4
412 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
413 // CHECK3-NEXT: store i32 1, i32* [[TMP9]], align 4
414 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
415 // CHECK3-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 4
416 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
417 // CHECK3-NEXT: store i8** [[TMP7]], i8*** [[TMP11]], align 4
418 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
419 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP12]], align 4
420 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
421 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP13]], align 4
422 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
423 // CHECK3-NEXT: store i8** null, i8*** [[TMP14]], align 4
424 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
425 // CHECK3-NEXT: store i8** null, i8*** [[TMP15]], align 4
426 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
427 // CHECK3-NEXT: store i64 0, i64* [[TMP16]], align 8
428 // CHECK3-NEXT: [[TMP17:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
429 // CHECK3-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
430 // CHECK3-NEXT: br i1 [[TMP18]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
431 // CHECK3: omp_offload.failed:
432 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48(%struct.SS* [[THIS1]]) #[[ATTR4:[0-9]+]]
433 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
434 // CHECK3: omp_offload.cont:
435 // CHECK3-NEXT: ret void
436 //
437 //
438 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48
439 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR3:[0-9]+]] {
440 // CHECK3-NEXT: entry:
441 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
442 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
443 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
444 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
445 // CHECK3-NEXT: ret void
446 //
447 //
448 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
449 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR3]] {
450 // CHECK3-NEXT: entry:
451 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
452 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
453 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
454 // CHECK3-NEXT: [[A:%.*]] = alloca i32, align 4
455 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32*, align 4
456 // CHECK3-NEXT: [[B:%.*]] = alloca i32, align 4
457 // CHECK3-NEXT: [[C:%.*]] = alloca i32, align 4
458 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32*, align 4
459 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4
460 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
461 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
462 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
463 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
464 // CHECK3-NEXT: store i32* [[A]], i32** [[TMP]], align 4
465 // CHECK3-NEXT: store i32* [[C]], i32** [[_TMP1]], align 4
466 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
467 // CHECK3-NEXT: store %struct.SS* [[TMP0]], %struct.SS** [[TMP1]], align 4
468 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 1
469 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP]], align 4
470 // CHECK3-NEXT: store i32* [[TMP3]], i32** [[TMP2]], align 4
471 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 2
472 // CHECK3-NEXT: store i32* [[B]], i32** [[TMP4]], align 4
473 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 3
474 // CHECK3-NEXT: [[TMP6:%.*]] = load i32*, i32** [[_TMP1]], align 4
475 // CHECK3-NEXT: store i32* [[TMP6]], i32** [[TMP5]], align 4
476 // CHECK3-NEXT: call void @_ZZN2SSC1ERiENKUlvE_clEv(%class.anon.0* noundef nonnull align 4 dereferenceable(16) [[REF_TMP]])
477 // CHECK3-NEXT: ret void
478 //
479 //
480 // CHECK3-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE_clEv
481 // CHECK3-SAME: (%class.anon.0* noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) #[[ATTR2:[0-9]+]] align 2 {
482 // CHECK3-NEXT: entry:
483 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %class.anon.0*, align 4
484 // CHECK3-NEXT: store %class.anon.0* [[THIS]], %class.anon.0** [[THIS_ADDR]], align 4
485 // CHECK3-NEXT: [[THIS1:%.*]] = load %class.anon.0*, %class.anon.0** [[THIS_ADDR]], align 4
486 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON_0:%.*]], %class.anon.0* [[THIS1]], i32 0, i32 0
487 // CHECK3-NEXT: [[TMP1:%.*]] = load %struct.SS*, %struct.SS** [[TMP0]], align 4
488 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 1
489 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[TMP2]], align 4
490 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
491 // CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1
492 // CHECK3-NEXT: store i32 [[INC]], i32* [[TMP3]], align 4
493 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 2
494 // CHECK3-NEXT: [[TMP6:%.*]] = load i32*, i32** [[TMP5]], align 4
495 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
496 // CHECK3-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP7]], -1
497 // CHECK3-NEXT: store i32 [[DEC]], i32* [[TMP6]], align 4
498 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[THIS1]], i32 0, i32 3
499 // CHECK3-NEXT: [[TMP9:%.*]] = load i32*, i32** [[TMP8]], align 4
500 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
501 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 1
502 // CHECK3-NEXT: store i32 [[DIV]], i32* [[TMP9]], align 4
503 // CHECK3-NEXT: ret void
504 //
505 //
506 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l117
507 // CHECK3-SAME: () #[[ATTR3]] {
508 // CHECK3-NEXT: entry:
509 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*))
510 // CHECK3-NEXT: ret void
511 //
512 //
513 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
514 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
515 // CHECK3-NEXT: entry:
516 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
517 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
518 // CHECK3-NEXT: [[G:%.*]] = alloca i32, align 128
519 // CHECK3-NEXT: [[SIVAR:%.*]] = alloca i32, align 4
520 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_1:%.*]], align 4
521 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
522 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
523 // CHECK3-NEXT: store i32 1, i32* [[G]], align 128
524 // CHECK3-NEXT: store i32 2, i32* [[SIVAR]], align 4
525 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 0
526 // CHECK3-NEXT: store i32* [[G]], i32** [[TMP0]], align 4
527 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON_1]], %class.anon.1* [[REF_TMP]], i32 0, i32 1
528 // CHECK3-NEXT: store i32* [[SIVAR]], i32** [[TMP1]], align 4
529 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.1* noundef nonnull align 4 dereferenceable(8) [[REF_TMP]])
530 // CHECK3-NEXT: ret void
531 //
532 //
533 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
534 // CHECK3-SAME: () #[[ATTR5:[0-9]+]] {
535 // CHECK3-NEXT: entry:
536 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1)
537 // CHECK3-NEXT: ret void
538 //
539 //
540 // CHECK9-LABEL: define {{[^@]+}}@main
541 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
542 // CHECK9-NEXT: entry:
543 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
544 // CHECK9-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
545 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
546 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
547 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
548 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
549 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S]], align 4
550 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4
551 // CHECK9-NEXT: call void @_ZN2SSC1ERi(%struct.SS* noundef nonnull align 8 dereferenceable(16) [[SS]], i32* noundef nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar)
552 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]])
553 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 4
554 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
555 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i64 8, i1 false)
556 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0
557 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
558 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i64 1
559 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
560 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]], float noundef 3.000000e+00)
561 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
562 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
563 // CHECK9-NEXT: store i32 1, i32* [[TMP1]], align 4
564 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
565 // CHECK9-NEXT: store i32 0, i32* [[TMP2]], align 4
566 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
567 // CHECK9-NEXT: store i8** null, i8*** [[TMP3]], align 8
568 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
569 // CHECK9-NEXT: store i8** null, i8*** [[TMP4]], align 8
570 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
571 // CHECK9-NEXT: store i64* null, i64** [[TMP5]], align 8
572 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
573 // CHECK9-NEXT: store i64* null, i64** [[TMP6]], align 8
574 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
575 // CHECK9-NEXT: store i8** null, i8*** [[TMP7]], align 8
576 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
577 // CHECK9-NEXT: store i8** null, i8*** [[TMP8]], align 8
578 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
579 // CHECK9-NEXT: store i64 0, i64* [[TMP9]], align 8
580 // CHECK9-NEXT: [[TMP10:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l136.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
581 // CHECK9-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0
582 // CHECK9-NEXT: br i1 [[TMP11]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
583 // CHECK9: omp_offload.failed:
584 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l136() #[[ATTR4:[0-9]+]]
585 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
586 // CHECK9: omp_offload.cont:
587 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
588 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
589 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
590 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
591 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
592 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
593 // CHECK9: arraydestroy.body:
594 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP12]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
595 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
596 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
597 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
598 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
599 // CHECK9: arraydestroy.done1:
600 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
601 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[RETVAL]], align 4
602 // CHECK9-NEXT: ret i32 [[TMP13]]
603 //
604 //
605 // CHECK9-LABEL: define {{[^@]+}}@_ZN2SSC1ERi
606 // CHECK9-SAME: (%struct.SS* noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
607 // CHECK9-NEXT: entry:
608 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
609 // CHECK9-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8
610 // CHECK9-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
611 // CHECK9-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8
612 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
613 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
614 // CHECK9-NEXT: call void @_ZN2SSC2ERi(%struct.SS* noundef nonnull align 8 dereferenceable(16) [[THIS1]], i32* noundef nonnull align 4 dereferenceable(4) [[TMP0]])
615 // CHECK9-NEXT: ret void
616 //
617 //
618 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
619 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
620 // CHECK9-NEXT: entry:
621 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
622 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
623 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
624 // CHECK9-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
625 // CHECK9-NEXT: ret void
626 //
627 //
628 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
629 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
630 // CHECK9-NEXT: entry:
631 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
632 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
633 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
634 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4
635 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
636 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
637 // CHECK9-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
638 // CHECK9-NEXT: ret void
639 //
640 //
641 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l136
642 // CHECK9-SAME: () #[[ATTR3:[0-9]+]] {
643 // CHECK9-NEXT: entry:
644 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
645 // CHECK9-NEXT: ret void
646 //
647 //
648 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
649 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
650 // CHECK9-NEXT: entry:
651 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
652 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
653 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
654 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
655 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
656 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4
657 // CHECK9-NEXT: [[SIVAR:%.*]] = alloca i32, align 4
658 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
659 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
660 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
661 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i64 2
662 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
663 // CHECK9: arrayctor.loop:
664 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
665 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
666 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1
667 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
668 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
669 // CHECK9: arrayctor.cont:
670 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]])
671 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[T_VAR]], align 4
672 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 0
673 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[ARRAYIDX]], align 4
674 // CHECK9-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i64 0, i64 0
675 // CHECK9-NEXT: [[TMP1:%.*]] = bitcast %struct.S* [[ARRAYIDX1]] to i8*
676 // CHECK9-NEXT: [[TMP2:%.*]] = bitcast %struct.S* [[VAR]] to i8*
677 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP1]], i8* align 4 [[TMP2]], i64 4, i1 false)
678 // CHECK9-NEXT: store i32 3, i32* [[SIVAR]], align 4
679 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
680 // CHECK9-NEXT: [[ARRAY_BEGIN2:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
681 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN2]], i64 2
682 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
683 // CHECK9: arraydestroy.body:
684 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP3]], [[ARRAYCTOR_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
685 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
686 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
687 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN2]]
688 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]]
689 // CHECK9: arraydestroy.done3:
690 // CHECK9-NEXT: ret void
691 //
692 //
693 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
694 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
695 // CHECK9-NEXT: entry:
696 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
697 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
698 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
699 // CHECK9-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
700 // CHECK9-NEXT: ret void
701 //
702 //
703 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
704 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] comdat {
705 // CHECK9-NEXT: entry:
706 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
707 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
708 // CHECK9-NEXT: [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4
709 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 128
710 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128
711 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 128
712 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0]], align 128
713 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]])
714 // CHECK9-NEXT: call void @_ZN3SSTIiEC1Ev(%struct.SST* noundef nonnull align 4 dereferenceable(4) [[SST]])
715 // CHECK9-NEXT: store i32 0, i32* [[T_VAR]], align 128
716 // CHECK9-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
717 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP0]], i8* align 128 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
718 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0
719 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1)
720 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i64 1
721 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)
722 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]], i32 noundef signext 3)
723 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
724 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
725 // CHECK9-NEXT: store i32 1, i32* [[TMP1]], align 4
726 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
727 // CHECK9-NEXT: store i32 0, i32* [[TMP2]], align 4
728 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
729 // CHECK9-NEXT: store i8** null, i8*** [[TMP3]], align 8
730 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
731 // CHECK9-NEXT: store i8** null, i8*** [[TMP4]], align 8
732 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
733 // CHECK9-NEXT: store i64* null, i64** [[TMP5]], align 8
734 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
735 // CHECK9-NEXT: store i64* null, i64** [[TMP6]], align 8
736 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
737 // CHECK9-NEXT: store i8** null, i8*** [[TMP7]], align 8
738 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
739 // CHECK9-NEXT: store i8** null, i8*** [[TMP8]], align 8
740 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
741 // CHECK9-NEXT: store i64 0, i64* [[TMP9]], align 8
742 // CHECK9-NEXT: [[TMP10:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l86.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
743 // CHECK9-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0
744 // CHECK9-NEXT: br i1 [[TMP11]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
745 // CHECK9: omp_offload.failed:
746 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l86() #[[ATTR4]]
747 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
748 // CHECK9: omp_offload.cont:
749 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4
750 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
751 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
752 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
753 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
754 // CHECK9: arraydestroy.body:
755 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP12]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
756 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
757 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
758 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
759 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
760 // CHECK9: arraydestroy.done1:
761 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
762 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[RETVAL]], align 4
763 // CHECK9-NEXT: ret i32 [[TMP13]]
764 //
765 //
766 // CHECK9-LABEL: define {{[^@]+}}@_ZN2SSC2ERi
767 // CHECK9-SAME: (%struct.SS* noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
768 // CHECK9-NEXT: entry:
769 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
770 // CHECK9-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 8
771 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
772 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
773 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
774 // CHECK9-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
775 // CHECK9-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 8
776 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
777 // CHECK9-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
778 // CHECK9-NEXT: store i32 0, i32* [[A]], align 8
779 // CHECK9-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
780 // CHECK9-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4
781 // CHECK9-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
782 // CHECK9-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
783 // CHECK9-NEXT: store i8 [[BF_SET]], i8* [[B]], align 4
784 // CHECK9-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
785 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 8
786 // CHECK9-NEXT: store i32* [[TMP0]], i32** [[C]], align 8
787 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
788 // CHECK9-NEXT: [[TMP2:%.*]] = bitcast i8** [[TMP1]] to %struct.SS**
789 // CHECK9-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP2]], align 8
790 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
791 // CHECK9-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to %struct.SS**
792 // CHECK9-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP4]], align 8
793 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
794 // CHECK9-NEXT: store i8* null, i8** [[TMP5]], align 8
795 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
796 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
797 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
798 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
799 // CHECK9-NEXT: store i32 1, i32* [[TMP8]], align 4
800 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
801 // CHECK9-NEXT: store i32 1, i32* [[TMP9]], align 4
802 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
803 // CHECK9-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 8
804 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
805 // CHECK9-NEXT: store i8** [[TMP7]], i8*** [[TMP11]], align 8
806 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
807 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP12]], align 8
808 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
809 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP13]], align 8
810 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
811 // CHECK9-NEXT: store i8** null, i8*** [[TMP14]], align 8
812 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
813 // CHECK9-NEXT: store i8** null, i8*** [[TMP15]], align 8
814 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
815 // CHECK9-NEXT: store i64 0, i64* [[TMP16]], align 8
816 // CHECK9-NEXT: [[TMP17:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
817 // CHECK9-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
818 // CHECK9-NEXT: br i1 [[TMP18]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
819 // CHECK9: omp_offload.failed:
820 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48(%struct.SS* [[THIS1]]) #[[ATTR4]]
821 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
822 // CHECK9: omp_offload.cont:
823 // CHECK9-NEXT: ret void
824 //
825 //
826 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48
827 // CHECK9-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR3]] {
828 // CHECK9-NEXT: entry:
829 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
830 // CHECK9-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
831 // CHECK9-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
832 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
833 // CHECK9-NEXT: ret void
834 //
835 //
836 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1
837 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR3]] {
838 // CHECK9-NEXT: entry:
839 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
840 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
841 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
842 // CHECK9-NEXT: [[A:%.*]] = alloca i32, align 4
843 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32*, align 8
844 // CHECK9-NEXT: [[B:%.*]] = alloca i32, align 4
845 // CHECK9-NEXT: [[C:%.*]] = alloca i32, align 4
846 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32*, align 8
847 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
848 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
849 // CHECK9-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
850 // CHECK9-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
851 // CHECK9-NEXT: store i32* [[A]], i32** [[TMP]], align 8
852 // CHECK9-NEXT: store i32* [[C]], i32** [[_TMP1]], align 8
853 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[TMP]], align 8
854 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
855 // CHECK9-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1
856 // CHECK9-NEXT: store i32 [[INC]], i32* [[TMP1]], align 4
857 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[B]], align 4
858 // CHECK9-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP3]], -1
859 // CHECK9-NEXT: store i32 [[DEC]], i32* [[B]], align 4
860 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[_TMP1]], align 8
861 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
862 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP5]], 1
863 // CHECK9-NEXT: store i32 [[DIV]], i32* [[TMP4]], align 4
864 // CHECK9-NEXT: ret void
865 //
866 //
867 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
868 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
869 // CHECK9-NEXT: entry:
870 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
871 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
872 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
873 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
874 // CHECK9-NEXT: store float 0.000000e+00, float* [[F]], align 4
875 // CHECK9-NEXT: ret void
876 //
877 //
878 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
879 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
880 // CHECK9-NEXT: entry:
881 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
882 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
883 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
884 // CHECK9-NEXT: store float [[A]], float* [[A_ADDR]], align 4
885 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
886 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
887 // CHECK9-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
888 // CHECK9-NEXT: store float [[TMP0]], float* [[F]], align 4
889 // CHECK9-NEXT: ret void
890 //
891 //
892 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
893 // CHECK9-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
894 // CHECK9-NEXT: entry:
895 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 8
896 // CHECK9-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 8
897 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 8
898 // CHECK9-NEXT: ret void
899 //
900 //
901 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
902 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
903 // CHECK9-NEXT: entry:
904 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
905 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
906 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
907 // CHECK9-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
908 // CHECK9-NEXT: ret void
909 //
910 //
911 // CHECK9-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev
912 // CHECK9-SAME: (%struct.SST* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
913 // CHECK9-NEXT: entry:
914 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8
915 // CHECK9-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8
916 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8
917 // CHECK9-NEXT: call void @_ZN3SSTIiEC2Ev(%struct.SST* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
918 // CHECK9-NEXT: ret void
919 //
920 //
921 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
922 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
923 // CHECK9-NEXT: entry:
924 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
925 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
926 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
927 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
928 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
929 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
930 // CHECK9-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]])
931 // CHECK9-NEXT: ret void
932 //
933 //
934 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l86
935 // CHECK9-SAME: () #[[ATTR3]] {
936 // CHECK9-NEXT: entry:
937 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
938 // CHECK9-NEXT: ret void
939 //
940 //
941 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2
942 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
943 // CHECK9-NEXT: entry:
944 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
945 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
946 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 128
947 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128
948 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 128
949 // CHECK9-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 128
950 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
951 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
952 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
953 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i64 2
954 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
955 // CHECK9: arrayctor.loop:
956 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
957 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
958 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1
959 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
960 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
961 // CHECK9: arrayctor.cont:
962 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]])
963 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[T_VAR]], align 128
964 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i64 0, i64 0
965 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[ARRAYIDX]], align 128
966 // CHECK9-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i64 0, i64 0
967 // CHECK9-NEXT: [[TMP1:%.*]] = bitcast %struct.S.0* [[ARRAYIDX1]] to i8*
968 // CHECK9-NEXT: [[TMP2:%.*]] = bitcast %struct.S.0* [[VAR]] to i8*
969 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 128 [[TMP1]], i8* align 128 [[TMP2]], i64 4, i1 false)
970 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
971 // CHECK9-NEXT: [[ARRAY_BEGIN2:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
972 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN2]], i64 2
973 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
974 // CHECK9: arraydestroy.body:
975 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[ARRAYCTOR_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
976 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
977 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
978 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN2]]
979 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]]
980 // CHECK9: arraydestroy.done3:
981 // CHECK9-NEXT: ret void
982 //
983 //
984 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
985 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
986 // CHECK9-NEXT: entry:
987 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
988 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
989 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
990 // CHECK9-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
991 // CHECK9-NEXT: ret void
992 //
993 //
994 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
995 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
996 // CHECK9-NEXT: entry:
997 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
998 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
999 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1000 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
1001 // CHECK9-NEXT: store i32 0, i32* [[F]], align 4
1002 // CHECK9-NEXT: ret void
1003 //
1004 //
1005 // CHECK9-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev
1006 // CHECK9-SAME: (%struct.SST* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1007 // CHECK9-NEXT: entry:
1008 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8
1009 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
1010 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
1011 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
1012 // CHECK9-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8
1013 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8
1014 // CHECK9-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[THIS1]], i32 0, i32 0
1015 // CHECK9-NEXT: store i32 0, i32* [[A]], align 4
1016 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1017 // CHECK9-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SST**
1018 // CHECK9-NEXT: store %struct.SST* [[THIS1]], %struct.SST** [[TMP1]], align 8
1019 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1020 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to %struct.SST**
1021 // CHECK9-NEXT: store %struct.SST* [[THIS1]], %struct.SST** [[TMP3]], align 8
1022 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1023 // CHECK9-NEXT: store i8* null, i8** [[TMP4]], align 8
1024 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1025 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1026 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1027 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
1028 // CHECK9-NEXT: store i32 1, i32* [[TMP7]], align 4
1029 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
1030 // CHECK9-NEXT: store i32 1, i32* [[TMP8]], align 4
1031 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1032 // CHECK9-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 8
1033 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1034 // CHECK9-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 8
1035 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1036 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64** [[TMP11]], align 8
1037 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1038 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP12]], align 8
1039 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1040 // CHECK9-NEXT: store i8** null, i8*** [[TMP13]], align 8
1041 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1042 // CHECK9-NEXT: store i8** null, i8*** [[TMP14]], align 8
1043 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1044 // CHECK9-NEXT: store i64 0, i64* [[TMP15]], align 8
1045 // CHECK9-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN3SSTIiEC1Ev_l64.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1046 // CHECK9-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
1047 // CHECK9-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1048 // CHECK9: omp_offload.failed:
1049 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN3SSTIiEC1Ev_l64(%struct.SST* [[THIS1]]) #[[ATTR4]]
1050 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
1051 // CHECK9: omp_offload.cont:
1052 // CHECK9-NEXT: ret void
1053 //
1054 //
1055 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN3SSTIiEC1Ev_l64
1056 // CHECK9-SAME: (%struct.SST* noundef [[THIS:%.*]]) #[[ATTR3]] {
1057 // CHECK9-NEXT: entry:
1058 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8
1059 // CHECK9-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8
1060 // CHECK9-NEXT: [[TMP0:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8
1061 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SST*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.SST* [[TMP0]])
1062 // CHECK9-NEXT: ret void
1063 //
1064 //
1065 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3
1066 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SST* noundef [[THIS:%.*]]) #[[ATTR3]] {
1067 // CHECK9-NEXT: entry:
1068 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1069 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1070 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 8
1071 // CHECK9-NEXT: [[A:%.*]] = alloca i32, align 4
1072 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32*, align 8
1073 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1074 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1075 // CHECK9-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 8
1076 // CHECK9-NEXT: [[TMP0:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 8
1077 // CHECK9-NEXT: store i32* [[A]], i32** [[TMP]], align 8
1078 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[TMP]], align 8
1079 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1080 // CHECK9-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1
1081 // CHECK9-NEXT: store i32 [[INC]], i32* [[TMP1]], align 4
1082 // CHECK9-NEXT: ret void
1083 //
1084 //
1085 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
1086 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1087 // CHECK9-NEXT: entry:
1088 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1089 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
1090 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1091 // CHECK9-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
1092 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1093 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
1094 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
1095 // CHECK9-NEXT: store i32 [[TMP0]], i32* [[F]], align 4
1096 // CHECK9-NEXT: ret void
1097 //
1098 //
1099 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
1100 // CHECK9-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1101 // CHECK9-NEXT: entry:
1102 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 8
1103 // CHECK9-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 8
1104 // CHECK9-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 8
1105 // CHECK9-NEXT: ret void
1106 //
1107 //
1108 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1109 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] {
1110 // CHECK9-NEXT: entry:
1111 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1)
1112 // CHECK9-NEXT: ret void
1113 //
1114 //
1115 // CHECK11-LABEL: define {{[^@]+}}@main
1116 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] {
1117 // CHECK11-NEXT: entry:
1118 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1119 // CHECK11-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
1120 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1121 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1122 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1123 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
1124 // CHECK11-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S]], align 4
1125 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4
1126 // CHECK11-NEXT: call void @_ZN2SSC1ERi(%struct.SS* noundef nonnull align 4 dereferenceable(12) [[SS]], i32* noundef nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar)
1127 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]])
1128 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 4
1129 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1130 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const.main.vec to i8*), i32 8, i1 false)
1131 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
1132 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
1133 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYINIT_BEGIN]], i32 1
1134 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
1135 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]], float noundef 3.000000e+00)
1136 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1137 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
1138 // CHECK11-NEXT: store i32 1, i32* [[TMP1]], align 4
1139 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
1140 // CHECK11-NEXT: store i32 0, i32* [[TMP2]], align 4
1141 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1142 // CHECK11-NEXT: store i8** null, i8*** [[TMP3]], align 4
1143 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1144 // CHECK11-NEXT: store i8** null, i8*** [[TMP4]], align 4
1145 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1146 // CHECK11-NEXT: store i64* null, i64** [[TMP5]], align 4
1147 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1148 // CHECK11-NEXT: store i64* null, i64** [[TMP6]], align 4
1149 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1150 // CHECK11-NEXT: store i8** null, i8*** [[TMP7]], align 4
1151 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1152 // CHECK11-NEXT: store i8** null, i8*** [[TMP8]], align 4
1153 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1154 // CHECK11-NEXT: store i64 0, i64* [[TMP9]], align 8
1155 // CHECK11-NEXT: [[TMP10:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l136.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1156 // CHECK11-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0
1157 // CHECK11-NEXT: br i1 [[TMP11]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1158 // CHECK11: omp_offload.failed:
1159 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l136() #[[ATTR4:[0-9]+]]
1160 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
1161 // CHECK11: omp_offload.cont:
1162 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
1163 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
1164 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
1165 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
1166 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
1167 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1168 // CHECK11: arraydestroy.body:
1169 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP12]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1170 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
1171 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1172 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1173 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
1174 // CHECK11: arraydestroy.done1:
1175 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
1176 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[RETVAL]], align 4
1177 // CHECK11-NEXT: ret i32 [[TMP13]]
1178 //
1179 //
1180 // CHECK11-LABEL: define {{[^@]+}}@_ZN2SSC1ERi
1181 // CHECK11-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(12) [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
1182 // CHECK11-NEXT: entry:
1183 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1184 // CHECK11-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 4
1185 // CHECK11-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1186 // CHECK11-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 4
1187 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1188 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 4
1189 // CHECK11-NEXT: call void @_ZN2SSC2ERi(%struct.SS* noundef nonnull align 4 dereferenceable(12) [[THIS1]], i32* noundef nonnull align 4 dereferenceable(4) [[TMP0]])
1190 // CHECK11-NEXT: ret void
1191 //
1192 //
1193 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
1194 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1195 // CHECK11-NEXT: entry:
1196 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
1197 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
1198 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
1199 // CHECK11-NEXT: call void @_ZN1SIfEC2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
1200 // CHECK11-NEXT: ret void
1201 //
1202 //
1203 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
1204 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1205 // CHECK11-NEXT: entry:
1206 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
1207 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
1208 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
1209 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4
1210 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
1211 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
1212 // CHECK11-NEXT: call void @_ZN1SIfEC2Ef(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
1213 // CHECK11-NEXT: ret void
1214 //
1215 //
1216 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l136
1217 // CHECK11-SAME: () #[[ATTR3:[0-9]+]] {
1218 // CHECK11-NEXT: entry:
1219 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
1220 // CHECK11-NEXT: ret void
1221 //
1222 //
1223 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined.
1224 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
1225 // CHECK11-NEXT: entry:
1226 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1227 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1228 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1229 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1230 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
1231 // CHECK11-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1232 // CHECK11-NEXT: [[SIVAR:%.*]] = alloca i32, align 4
1233 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1234 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1235 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
1236 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN]], i32 2
1237 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
1238 // CHECK11: arrayctor.loop:
1239 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1240 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1241 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i32 1
1242 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1243 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1244 // CHECK11: arrayctor.cont:
1245 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]])
1246 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[T_VAR]], align 4
1247 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 0
1248 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[ARRAYIDX]], align 4
1249 // CHECK11-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
1250 // CHECK11-NEXT: [[TMP1:%.*]] = bitcast %struct.S* [[ARRAYIDX1]] to i8*
1251 // CHECK11-NEXT: [[TMP2:%.*]] = bitcast %struct.S* [[VAR]] to i8*
1252 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP1]], i8* align 4 [[TMP2]], i32 4, i1 false)
1253 // CHECK11-NEXT: store i32 3, i32* [[SIVAR]], align 4
1254 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
1255 // CHECK11-NEXT: [[ARRAY_BEGIN2:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[S_ARR]], i32 0, i32 0
1256 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN2]], i32 2
1257 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1258 // CHECK11: arraydestroy.body:
1259 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP3]], [[ARRAYCTOR_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1260 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
1261 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1262 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN2]]
1263 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]]
1264 // CHECK11: arraydestroy.done3:
1265 // CHECK11-NEXT: ret void
1266 //
1267 //
1268 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
1269 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1270 // CHECK11-NEXT: entry:
1271 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
1272 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
1273 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
1274 // CHECK11-NEXT: call void @_ZN1SIfED2Ev(%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1275 // CHECK11-NEXT: ret void
1276 //
1277 //
1278 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
1279 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat {
1280 // CHECK11-NEXT: entry:
1281 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1282 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1283 // CHECK11-NEXT: [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4
1284 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 128
1285 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128
1286 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 128
1287 // CHECK11-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0]], align 128
1288 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]])
1289 // CHECK11-NEXT: call void @_ZN3SSTIiEC1Ev(%struct.SST* noundef nonnull align 4 dereferenceable(4) [[SST]])
1290 // CHECK11-NEXT: store i32 0, i32* [[T_VAR]], align 128
1291 // CHECK11-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1292 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 128 [[TMP0]], i8* align 128 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
1293 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
1294 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1)
1295 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYINIT_BEGIN]], i32 1
1296 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)
1297 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]], i32 noundef 3)
1298 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1299 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
1300 // CHECK11-NEXT: store i32 1, i32* [[TMP1]], align 4
1301 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
1302 // CHECK11-NEXT: store i32 0, i32* [[TMP2]], align 4
1303 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1304 // CHECK11-NEXT: store i8** null, i8*** [[TMP3]], align 4
1305 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1306 // CHECK11-NEXT: store i8** null, i8*** [[TMP4]], align 4
1307 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1308 // CHECK11-NEXT: store i64* null, i64** [[TMP5]], align 4
1309 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1310 // CHECK11-NEXT: store i64* null, i64** [[TMP6]], align 4
1311 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1312 // CHECK11-NEXT: store i8** null, i8*** [[TMP7]], align 4
1313 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1314 // CHECK11-NEXT: store i8** null, i8*** [[TMP8]], align 4
1315 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1316 // CHECK11-NEXT: store i64 0, i64* [[TMP9]], align 8
1317 // CHECK11-NEXT: [[TMP10:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l86.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1318 // CHECK11-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0
1319 // CHECK11-NEXT: br i1 [[TMP11]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1320 // CHECK11: omp_offload.failed:
1321 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l86() #[[ATTR4]]
1322 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
1323 // CHECK11: omp_offload.cont:
1324 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4
1325 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
1326 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
1327 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
1328 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1329 // CHECK11: arraydestroy.body:
1330 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP12]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1331 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
1332 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1333 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1334 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
1335 // CHECK11: arraydestroy.done1:
1336 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
1337 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[RETVAL]], align 4
1338 // CHECK11-NEXT: ret i32 [[TMP13]]
1339 //
1340 //
1341 // CHECK11-LABEL: define {{[^@]+}}@_ZN2SSC2ERi
1342 // CHECK11-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(12) [[THIS:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1343 // CHECK11-NEXT: entry:
1344 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1345 // CHECK11-NEXT: [[D_ADDR:%.*]] = alloca i32*, align 4
1346 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
1347 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
1348 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
1349 // CHECK11-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1350 // CHECK11-NEXT: store i32* [[D]], i32** [[D_ADDR]], align 4
1351 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1352 // CHECK11-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
1353 // CHECK11-NEXT: store i32 0, i32* [[A]], align 4
1354 // CHECK11-NEXT: [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 1
1355 // CHECK11-NEXT: [[BF_LOAD:%.*]] = load i8, i8* [[B]], align 4
1356 // CHECK11-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
1357 // CHECK11-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
1358 // CHECK11-NEXT: store i8 [[BF_SET]], i8* [[B]], align 4
1359 // CHECK11-NEXT: [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 2
1360 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[D_ADDR]], align 4
1361 // CHECK11-NEXT: store i32* [[TMP0]], i32** [[C]], align 4
1362 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1363 // CHECK11-NEXT: [[TMP2:%.*]] = bitcast i8** [[TMP1]] to %struct.SS**
1364 // CHECK11-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP2]], align 4
1365 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1366 // CHECK11-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to %struct.SS**
1367 // CHECK11-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP4]], align 4
1368 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1369 // CHECK11-NEXT: store i8* null, i8** [[TMP5]], align 4
1370 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1371 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1372 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1373 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
1374 // CHECK11-NEXT: store i32 1, i32* [[TMP8]], align 4
1375 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
1376 // CHECK11-NEXT: store i32 1, i32* [[TMP9]], align 4
1377 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1378 // CHECK11-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 4
1379 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1380 // CHECK11-NEXT: store i8** [[TMP7]], i8*** [[TMP11]], align 4
1381 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1382 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP12]], align 4
1383 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1384 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP13]], align 4
1385 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1386 // CHECK11-NEXT: store i8** null, i8*** [[TMP14]], align 4
1387 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1388 // CHECK11-NEXT: store i8** null, i8*** [[TMP15]], align 4
1389 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1390 // CHECK11-NEXT: store i64 0, i64* [[TMP16]], align 8
1391 // CHECK11-NEXT: [[TMP17:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1392 // CHECK11-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
1393 // CHECK11-NEXT: br i1 [[TMP18]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1394 // CHECK11: omp_offload.failed:
1395 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48(%struct.SS* [[THIS1]]) #[[ATTR4]]
1396 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
1397 // CHECK11: omp_offload.cont:
1398 // CHECK11-NEXT: ret void
1399 //
1400 //
1401 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSC1ERi_l48
1402 // CHECK11-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR3]] {
1403 // CHECK11-NEXT: entry:
1404 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1405 // CHECK11-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1406 // CHECK11-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1407 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1408 // CHECK11-NEXT: ret void
1409 //
1410 //
1411 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1
1412 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR3]] {
1413 // CHECK11-NEXT: entry:
1414 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1415 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1416 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1417 // CHECK11-NEXT: [[A:%.*]] = alloca i32, align 4
1418 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32*, align 4
1419 // CHECK11-NEXT: [[B:%.*]] = alloca i32, align 4
1420 // CHECK11-NEXT: [[C:%.*]] = alloca i32, align 4
1421 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32*, align 4
1422 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1423 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1424 // CHECK11-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1425 // CHECK11-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1426 // CHECK11-NEXT: store i32* [[A]], i32** [[TMP]], align 4
1427 // CHECK11-NEXT: store i32* [[C]], i32** [[_TMP1]], align 4
1428 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[TMP]], align 4
1429 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1430 // CHECK11-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1
1431 // CHECK11-NEXT: store i32 [[INC]], i32* [[TMP1]], align 4
1432 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[B]], align 4
1433 // CHECK11-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP3]], -1
1434 // CHECK11-NEXT: store i32 [[DEC]], i32* [[B]], align 4
1435 // CHECK11-NEXT: [[TMP4:%.*]] = load i32*, i32** [[_TMP1]], align 4
1436 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
1437 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP5]], 1
1438 // CHECK11-NEXT: store i32 [[DIV]], i32* [[TMP4]], align 4
1439 // CHECK11-NEXT: ret void
1440 //
1441 //
1442 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
1443 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1444 // CHECK11-NEXT: entry:
1445 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
1446 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
1447 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
1448 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1449 // CHECK11-NEXT: store float 0.000000e+00, float* [[F]], align 4
1450 // CHECK11-NEXT: ret void
1451 //
1452 //
1453 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
1454 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1455 // CHECK11-NEXT: entry:
1456 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
1457 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
1458 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
1459 // CHECK11-NEXT: store float [[A]], float* [[A_ADDR]], align 4
1460 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
1461 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[THIS1]], i32 0, i32 0
1462 // CHECK11-NEXT: [[TMP0:%.*]] = load float, float* [[A_ADDR]], align 4
1463 // CHECK11-NEXT: store float [[TMP0]], float* [[F]], align 4
1464 // CHECK11-NEXT: ret void
1465 //
1466 //
1467 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
1468 // CHECK11-SAME: (%struct.S* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1469 // CHECK11-NEXT: entry:
1470 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S*, align 4
1471 // CHECK11-NEXT: store %struct.S* [[THIS]], %struct.S** [[THIS_ADDR]], align 4
1472 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S*, %struct.S** [[THIS_ADDR]], align 4
1473 // CHECK11-NEXT: ret void
1474 //
1475 //
1476 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
1477 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1478 // CHECK11-NEXT: entry:
1479 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
1480 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
1481 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
1482 // CHECK11-NEXT: call void @_ZN1SIiEC2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
1483 // CHECK11-NEXT: ret void
1484 //
1485 //
1486 // CHECK11-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev
1487 // CHECK11-SAME: (%struct.SST* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1488 // CHECK11-NEXT: entry:
1489 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 4
1490 // CHECK11-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 4
1491 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 4
1492 // CHECK11-NEXT: call void @_ZN3SSTIiEC2Ev(%struct.SST* noundef nonnull align 4 dereferenceable(4) [[THIS1]])
1493 // CHECK11-NEXT: ret void
1494 //
1495 //
1496 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
1497 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1498 // CHECK11-NEXT: entry:
1499 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
1500 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
1501 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
1502 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
1503 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
1504 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
1505 // CHECK11-NEXT: call void @_ZN1SIiEC2Ei(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])
1506 // CHECK11-NEXT: ret void
1507 //
1508 //
1509 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l86
1510 // CHECK11-SAME: () #[[ATTR3]] {
1511 // CHECK11-NEXT: entry:
1512 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
1513 // CHECK11-NEXT: ret void
1514 //
1515 //
1516 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2
1517 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
1518 // CHECK11-NEXT: entry:
1519 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1520 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1521 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 128
1522 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 128
1523 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 128
1524 // CHECK11-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 128
1525 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1526 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1527 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
1528 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN]], i32 2
1529 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
1530 // CHECK11: arrayctor.loop:
1531 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1532 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1533 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i32 1
1534 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1535 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1536 // CHECK11: arrayctor.cont:
1537 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]])
1538 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[T_VAR]], align 128
1539 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[VEC]], i32 0, i32 0
1540 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[ARRAYIDX]], align 128
1541 // CHECK11-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
1542 // CHECK11-NEXT: [[TMP1:%.*]] = bitcast %struct.S.0* [[ARRAYIDX1]] to i8*
1543 // CHECK11-NEXT: [[TMP2:%.*]] = bitcast %struct.S.0* [[VAR]] to i8*
1544 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 128 [[TMP1]], i8* align 128 [[TMP2]], i32 4, i1 false)
1545 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
1546 // CHECK11-NEXT: [[ARRAY_BEGIN2:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[S_ARR]], i32 0, i32 0
1547 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN2]], i32 2
1548 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1549 // CHECK11: arraydestroy.body:
1550 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP3]], [[ARRAYCTOR_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1551 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
1552 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1553 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN2]]
1554 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE3:%.*]], label [[ARRAYDESTROY_BODY]]
1555 // CHECK11: arraydestroy.done3:
1556 // CHECK11-NEXT: ret void
1557 //
1558 //
1559 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
1560 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1561 // CHECK11-NEXT: entry:
1562 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
1563 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
1564 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
1565 // CHECK11-NEXT: call void @_ZN1SIiED2Ev(%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1566 // CHECK11-NEXT: ret void
1567 //
1568 //
1569 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
1570 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1571 // CHECK11-NEXT: entry:
1572 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
1573 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
1574 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
1575 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
1576 // CHECK11-NEXT: store i32 0, i32* [[F]], align 4
1577 // CHECK11-NEXT: ret void
1578 //
1579 //
1580 // CHECK11-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev
1581 // CHECK11-SAME: (%struct.SST* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1582 // CHECK11-NEXT: entry:
1583 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 4
1584 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
1585 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
1586 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
1587 // CHECK11-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 4
1588 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 4
1589 // CHECK11-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], %struct.SST* [[THIS1]], i32 0, i32 0
1590 // CHECK11-NEXT: store i32 0, i32* [[A]], align 4
1591 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1592 // CHECK11-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SST**
1593 // CHECK11-NEXT: store %struct.SST* [[THIS1]], %struct.SST** [[TMP1]], align 4
1594 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1595 // CHECK11-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to %struct.SST**
1596 // CHECK11-NEXT: store %struct.SST* [[THIS1]], %struct.SST** [[TMP3]], align 4
1597 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1598 // CHECK11-NEXT: store i8* null, i8** [[TMP4]], align 4
1599 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1600 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1601 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1602 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
1603 // CHECK11-NEXT: store i32 1, i32* [[TMP7]], align 4
1604 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
1605 // CHECK11-NEXT: store i32 1, i32* [[TMP8]], align 4
1606 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1607 // CHECK11-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 4
1608 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1609 // CHECK11-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 4
1610 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1611 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64** [[TMP11]], align 4
1612 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1613 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP12]], align 4
1614 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1615 // CHECK11-NEXT: store i8** null, i8*** [[TMP13]], align 4
1616 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1617 // CHECK11-NEXT: store i8** null, i8*** [[TMP14]], align 4
1618 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1619 // CHECK11-NEXT: store i64 0, i64* [[TMP15]], align 8
1620 // CHECK11-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB1]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN3SSTIiEC1Ev_l64.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1621 // CHECK11-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
1622 // CHECK11-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1623 // CHECK11: omp_offload.failed:
1624 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN3SSTIiEC1Ev_l64(%struct.SST* [[THIS1]]) #[[ATTR4]]
1625 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
1626 // CHECK11: omp_offload.cont:
1627 // CHECK11-NEXT: ret void
1628 //
1629 //
1630 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN3SSTIiEC1Ev_l64
1631 // CHECK11-SAME: (%struct.SST* noundef [[THIS:%.*]]) #[[ATTR3]] {
1632 // CHECK11-NEXT: entry:
1633 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 4
1634 // CHECK11-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 4
1635 // CHECK11-NEXT: [[TMP0:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 4
1636 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB1]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SST*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), %struct.SST* [[TMP0]])
1637 // CHECK11-NEXT: ret void
1638 //
1639 //
1640 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3
1641 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SST* noundef [[THIS:%.*]]) #[[ATTR3]] {
1642 // CHECK11-NEXT: entry:
1643 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1644 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1645 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SST*, align 4
1646 // CHECK11-NEXT: [[A:%.*]] = alloca i32, align 4
1647 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32*, align 4
1648 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1649 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1650 // CHECK11-NEXT: store %struct.SST* [[THIS]], %struct.SST** [[THIS_ADDR]], align 4
1651 // CHECK11-NEXT: [[TMP0:%.*]] = load %struct.SST*, %struct.SST** [[THIS_ADDR]], align 4
1652 // CHECK11-NEXT: store i32* [[A]], i32** [[TMP]], align 4
1653 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[TMP]], align 4
1654 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1655 // CHECK11-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1
1656 // CHECK11-NEXT: store i32 [[INC]], i32* [[TMP1]], align 4
1657 // CHECK11-NEXT: ret void
1658 //
1659 //
1660 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
1661 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1662 // CHECK11-NEXT: entry:
1663 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
1664 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
1665 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
1666 // CHECK11-NEXT: store i32 [[A]], i32* [[A_ADDR]], align 4
1667 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
1668 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[THIS1]], i32 0, i32 0
1669 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[A_ADDR]], align 4
1670 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[F]], align 4
1671 // CHECK11-NEXT: ret void
1672 //
1673 //
1674 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
1675 // CHECK11-SAME: (%struct.S.0* noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1676 // CHECK11-NEXT: entry:
1677 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.S.0*, align 4
1678 // CHECK11-NEXT: store %struct.S.0* [[THIS]], %struct.S.0** [[THIS_ADDR]], align 4
1679 // CHECK11-NEXT: [[THIS1:%.*]] = load %struct.S.0*, %struct.S.0** [[THIS_ADDR]], align 4
1680 // CHECK11-NEXT: ret void
1681 //
1682 //
1683 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1684 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] {
1685 // CHECK11-NEXT: entry:
1686 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1)
1687 // CHECK11-NEXT: ret void
1688 //
1689