1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
3 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
4 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
5 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
6 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
7 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3
8
9 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5
10 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
11 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5
12 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7
13 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
14 // RUN: %clang_cc1 -no-opaque-pointers -DCHECK -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK7
15
16 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
17 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
18 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9
19
20 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11
21 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
22 // RUN: %clang_cc1 -no-opaque-pointers -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11
23
24 // expected-no-diagnostics
25 #ifndef HEADER
26 #define HEADER
27
28 template <typename T>
tmain()29 T tmain() {
30 T t_var = T();
31 T vec[] = {1, 2};
32 #pragma omp target
33 #pragma omp teams distribute parallel for simd reduction(+: t_var)
34 for (int i = 0; i < 2; ++i) {
35 t_var += (T) i;
36 }
37 return T();
38 }
39
main()40 int main() {
41 static int sivar;
42 #ifdef LAMBDA
43
44 [&]() {
45 #pragma omp target
46 #pragma omp teams distribute parallel for simd reduction(+: sivar)
47 for (int i = 0; i < 2; ++i) {
48
49 // Skip global and bound tid vars
50
51
52
53 // Skip global and bound tid vars, and prev lb and ub vars
54 // skip loop vars
55
56
57 sivar += i;
58
59 [&]() {
60
61 sivar += 4;
62
63 }();
64 }
65 }();
66 return 0;
67
68
69 #else
70 #pragma omp target
71 #pragma omp teams distribute parallel for simd reduction(+: sivar)
72 for (int i = 0; i < 2; ++i) {
73 sivar += i;
74 }
75 return tmain<int>();
76 #endif
77 }
78
79
80
81
82 // Skip global and bound tid vars
83
84
85 // Skip global and bound tid vars, and prev lb and ub
86 // skip loop vars
87
88
89
90
91 // Skip global and bound tid vars
92
93
94 // Skip global and bound tid vars, and prev lb and ub vars
95 // skip loop vars
96
97
98
99 #endif
100 // CHECK1-LABEL: define {{[^@]+}}@main
101 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
102 // CHECK1-NEXT: entry:
103 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
104 // CHECK1-NEXT: [[SIVAR_CASTED:%.*]] = alloca i64, align 8
105 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
106 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
107 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
108 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
109 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4
110 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4
111 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[SIVAR_CASTED]] to i32*
112 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4
113 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[SIVAR_CASTED]], align 8
114 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
115 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i64*
116 // CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP3]], align 8
117 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
118 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64*
119 // CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8
120 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
121 // CHECK1-NEXT: store i8* null, i8** [[TMP6]], align 8
122 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
123 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
124 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
125 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
126 // CHECK1-NEXT: store i32 1, i32* [[TMP9]], align 4
127 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
128 // CHECK1-NEXT: store i32 1, i32* [[TMP10]], align 4
129 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
130 // CHECK1-NEXT: store i8** [[TMP7]], i8*** [[TMP11]], align 8
131 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
132 // CHECK1-NEXT: store i8** [[TMP8]], i8*** [[TMP12]], align 8
133 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
134 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP13]], align 8
135 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
136 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP14]], align 8
137 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
138 // CHECK1-NEXT: store i8** null, i8*** [[TMP15]], align 8
139 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
140 // CHECK1-NEXT: store i8** null, i8*** [[TMP16]], align 8
141 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
142 // CHECK1-NEXT: store i64 2, i64* [[TMP17]], align 8
143 // CHECK1-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l70.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
144 // CHECK1-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
145 // CHECK1-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
146 // CHECK1: omp_offload.failed:
147 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l70(i64 [[TMP1]]) #[[ATTR2:[0-9]+]]
148 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
149 // CHECK1: omp_offload.cont:
150 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
151 // CHECK1-NEXT: ret i32 [[CALL]]
152 //
153 //
154 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l70
155 // CHECK1-SAME: (i64 noundef [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] {
156 // CHECK1-NEXT: entry:
157 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 8
158 // CHECK1-NEXT: store i64 [[SIVAR]], i64* [[SIVAR_ADDR]], align 8
159 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[SIVAR_ADDR]] to i32*
160 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]])
161 // CHECK1-NEXT: ret void
162 //
163 //
164 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
165 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {
166 // CHECK1-NEXT: entry:
167 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
168 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
169 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
170 // CHECK1-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4
171 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
172 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
173 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
174 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
175 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
176 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
177 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
178 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
179 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
180 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
181 // CHECK1-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
182 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
183 // CHECK1-NEXT: store i32 0, i32* [[SIVAR1]], align 4
184 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
185 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
186 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
187 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
188 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
189 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
190 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
191 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
192 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
193 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
194 // CHECK1: cond.true:
195 // CHECK1-NEXT: br label [[COND_END:%.*]]
196 // CHECK1: cond.false:
197 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
198 // CHECK1-NEXT: br label [[COND_END]]
199 // CHECK1: cond.end:
200 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
201 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
202 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
203 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
204 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
205 // CHECK1: omp.inner.for.cond:
206 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
207 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !5
208 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
209 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
210 // CHECK1: omp.inner.for.body:
211 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !5
212 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
213 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !5
214 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
215 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], i32* [[SIVAR1]]), !llvm.access.group !5
216 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
217 // CHECK1: omp.inner.for.inc:
218 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
219 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !5
220 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
221 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
222 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
223 // CHECK1: omp.inner.for.end:
224 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
225 // CHECK1: omp.loop.exit:
226 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
227 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
228 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
229 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
230 // CHECK1: .omp.final.then:
231 // CHECK1-NEXT: store i32 2, i32* [[I]], align 4
232 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
233 // CHECK1: .omp.final.done:
234 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
235 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i32* [[SIVAR1]] to i8*
236 // CHECK1-NEXT: store i8* [[TMP17]], i8** [[TMP16]], align 8
237 // CHECK1-NEXT: [[TMP18:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
238 // CHECK1-NEXT: [[TMP19:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP18]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var)
239 // CHECK1-NEXT: switch i32 [[TMP19]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
240 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
241 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
242 // CHECK1-NEXT: ]
243 // CHECK1: .omp.reduction.case1:
244 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP0]], align 4
245 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[SIVAR1]], align 4
246 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
247 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[TMP0]], align 4
248 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
249 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
250 // CHECK1: .omp.reduction.case2:
251 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[SIVAR1]], align 4
252 // CHECK1-NEXT: [[TMP23:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP22]] monotonic, align 4
253 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
254 // CHECK1: .omp.reduction.default:
255 // CHECK1-NEXT: ret void
256 //
257 //
258 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
259 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {
260 // CHECK1-NEXT: entry:
261 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
262 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
263 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
264 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
265 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
266 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
267 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
268 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
269 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
270 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
271 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
272 // CHECK1-NEXT: [[SIVAR2:%.*]] = alloca i32, align 4
273 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
274 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
275 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
276 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
277 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
278 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
279 // CHECK1-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
280 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
281 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
282 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
283 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
284 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
285 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
286 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
287 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
288 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
289 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
290 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
291 // CHECK1-NEXT: store i32 0, i32* [[SIVAR2]], align 4
292 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
293 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
294 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
295 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
296 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
297 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
298 // CHECK1: cond.true:
299 // CHECK1-NEXT: br label [[COND_END:%.*]]
300 // CHECK1: cond.false:
301 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
302 // CHECK1-NEXT: br label [[COND_END]]
303 // CHECK1: cond.end:
304 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
305 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
306 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
307 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
308 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
309 // CHECK1: omp.inner.for.cond:
310 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
311 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9
312 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
313 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
314 // CHECK1: omp.inner.for.body:
315 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
316 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
317 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
318 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9
319 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !9
320 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[SIVAR2]], align 4, !llvm.access.group !9
321 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], [[TMP11]]
322 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[SIVAR2]], align 4, !llvm.access.group !9
323 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
324 // CHECK1: omp.body.continue:
325 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
326 // CHECK1: omp.inner.for.inc:
327 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
328 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], 1
329 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
330 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
331 // CHECK1: omp.inner.for.end:
332 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
333 // CHECK1: omp.loop.exit:
334 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
335 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
336 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
337 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
338 // CHECK1: .omp.final.then:
339 // CHECK1-NEXT: store i32 2, i32* [[I]], align 4
340 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
341 // CHECK1: .omp.final.done:
342 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
343 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i32* [[SIVAR2]] to i8*
344 // CHECK1-NEXT: store i8* [[TMP17]], i8** [[TMP16]], align 8
345 // CHECK1-NEXT: [[TMP18:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
346 // CHECK1-NEXT: [[TMP19:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 1, i64 8, i8* [[TMP18]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var)
347 // CHECK1-NEXT: switch i32 [[TMP19]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
348 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
349 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
350 // CHECK1-NEXT: ]
351 // CHECK1: .omp.reduction.case1:
352 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP0]], align 4
353 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[SIVAR2]], align 4
354 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
355 // CHECK1-NEXT: store i32 [[ADD6]], i32* [[TMP0]], align 4
356 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
357 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
358 // CHECK1: .omp.reduction.case2:
359 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[SIVAR2]], align 4
360 // CHECK1-NEXT: [[TMP23:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP22]] monotonic, align 4
361 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
362 // CHECK1: .omp.reduction.default:
363 // CHECK1-NEXT: ret void
364 //
365 //
366 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func
367 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] {
368 // CHECK1-NEXT: entry:
369 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
370 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
371 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
372 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
373 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
374 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
375 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
376 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
377 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
378 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
379 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
380 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
381 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
382 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
383 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
384 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
385 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
386 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
387 // CHECK1-NEXT: ret void
388 //
389 //
390 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2
391 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] {
392 // CHECK1-NEXT: entry:
393 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
394 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
395 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
396 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
397 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
398 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
399 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
400 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
401 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
402 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
403 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
404 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
405 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
406 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
407 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
408 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
409 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
410 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
411 // CHECK1-NEXT: ret void
412 //
413 //
414 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
415 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] comdat {
416 // CHECK1-NEXT: entry:
417 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
418 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
419 // CHECK1-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
420 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
421 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
422 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
423 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
424 // CHECK1-NEXT: store i32 0, i32* [[T_VAR]], align 4
425 // CHECK1-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
426 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
427 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[T_VAR]], align 4
428 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32*
429 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[CONV]], align 4
430 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8
431 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
432 // CHECK1-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i64*
433 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP4]], align 8
434 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
435 // CHECK1-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64*
436 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP6]], align 8
437 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
438 // CHECK1-NEXT: store i8* null, i8** [[TMP7]], align 8
439 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
440 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
441 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
442 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
443 // CHECK1-NEXT: store i32 1, i32* [[TMP10]], align 4
444 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
445 // CHECK1-NEXT: store i32 1, i32* [[TMP11]], align 4
446 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
447 // CHECK1-NEXT: store i8** [[TMP8]], i8*** [[TMP12]], align 8
448 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
449 // CHECK1-NEXT: store i8** [[TMP9]], i8*** [[TMP13]], align 8
450 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
451 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.7, i32 0, i32 0), i64** [[TMP14]], align 8
452 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
453 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.8, i32 0, i32 0), i64** [[TMP15]], align 8
454 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
455 // CHECK1-NEXT: store i8** null, i8*** [[TMP16]], align 8
456 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
457 // CHECK1-NEXT: store i8** null, i8*** [[TMP17]], align 8
458 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
459 // CHECK1-NEXT: store i64 2, i64* [[TMP18]], align 8
460 // CHECK1-NEXT: [[TMP19:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB4]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
461 // CHECK1-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
462 // CHECK1-NEXT: br i1 [[TMP20]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
463 // CHECK1: omp_offload.failed:
464 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i64 [[TMP2]]) #[[ATTR2]]
465 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
466 // CHECK1: omp_offload.cont:
467 // CHECK1-NEXT: ret i32 0
468 //
469 //
470 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32
471 // CHECK1-SAME: (i64 noundef [[T_VAR:%.*]]) #[[ATTR1]] {
472 // CHECK1-NEXT: entry:
473 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
474 // CHECK1-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8
475 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32*
476 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32* [[CONV]])
477 // CHECK1-NEXT: ret void
478 //
479 //
480 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3
481 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {
482 // CHECK1-NEXT: entry:
483 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
484 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
485 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
486 // CHECK1-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4
487 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
488 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
489 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
490 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
491 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
492 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
493 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
494 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
495 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
496 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
497 // CHECK1-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
498 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
499 // CHECK1-NEXT: store i32 0, i32* [[T_VAR1]], align 4
500 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
501 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
502 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
503 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
504 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
505 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
506 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
507 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
508 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
509 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
510 // CHECK1: cond.true:
511 // CHECK1-NEXT: br label [[COND_END:%.*]]
512 // CHECK1: cond.false:
513 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
514 // CHECK1-NEXT: br label [[COND_END]]
515 // CHECK1: cond.end:
516 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
517 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
518 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
519 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
520 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
521 // CHECK1: omp.inner.for.cond:
522 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
523 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !14
524 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
525 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
526 // CHECK1: omp.inner.for.body:
527 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !14
528 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
529 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !14
530 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
531 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], i32* [[T_VAR1]]), !llvm.access.group !14
532 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
533 // CHECK1: omp.inner.for.inc:
534 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
535 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !14
536 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
537 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
538 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
539 // CHECK1: omp.inner.for.end:
540 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
541 // CHECK1: omp.loop.exit:
542 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
543 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
544 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
545 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
546 // CHECK1: .omp.final.then:
547 // CHECK1-NEXT: store i32 2, i32* [[I]], align 4
548 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
549 // CHECK1: .omp.final.done:
550 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
551 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i32* [[T_VAR1]] to i8*
552 // CHECK1-NEXT: store i8* [[TMP17]], i8** [[TMP16]], align 8
553 // CHECK1-NEXT: [[TMP18:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
554 // CHECK1-NEXT: [[TMP19:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP18]], void (i8*, i8*)* @.omp.reduction.reduction_func.6, [8 x i32]* @.gomp_critical_user_.reduction.var)
555 // CHECK1-NEXT: switch i32 [[TMP19]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
556 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
557 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
558 // CHECK1-NEXT: ]
559 // CHECK1: .omp.reduction.case1:
560 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP0]], align 4
561 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[T_VAR1]], align 4
562 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
563 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[TMP0]], align 4
564 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
565 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
566 // CHECK1: .omp.reduction.case2:
567 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[T_VAR1]], align 4
568 // CHECK1-NEXT: [[TMP23:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP22]] monotonic, align 4
569 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
570 // CHECK1: .omp.reduction.default:
571 // CHECK1-NEXT: ret void
572 //
573 //
574 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4
575 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {
576 // CHECK1-NEXT: entry:
577 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
578 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
579 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
580 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
581 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8
582 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
583 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
584 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
585 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
586 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
587 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
588 // CHECK1-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4
589 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
590 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
591 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
592 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
593 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
594 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
595 // CHECK1-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8
596 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8
597 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
598 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
599 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
600 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
601 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
602 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
603 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
604 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
605 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
606 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
607 // CHECK1-NEXT: store i32 0, i32* [[T_VAR2]], align 4
608 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
609 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
610 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
611 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
612 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
613 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
614 // CHECK1: cond.true:
615 // CHECK1-NEXT: br label [[COND_END:%.*]]
616 // CHECK1: cond.false:
617 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
618 // CHECK1-NEXT: br label [[COND_END]]
619 // CHECK1: cond.end:
620 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
621 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
622 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
623 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
624 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
625 // CHECK1: omp.inner.for.cond:
626 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
627 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !17
628 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
629 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
630 // CHECK1: omp.inner.for.body:
631 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
632 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
633 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
634 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !17
635 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !17
636 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[T_VAR2]], align 4, !llvm.access.group !17
637 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], [[TMP11]]
638 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[T_VAR2]], align 4, !llvm.access.group !17
639 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
640 // CHECK1: omp.body.continue:
641 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
642 // CHECK1: omp.inner.for.inc:
643 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
644 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], 1
645 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
646 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
647 // CHECK1: omp.inner.for.end:
648 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
649 // CHECK1: omp.loop.exit:
650 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
651 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
652 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
653 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
654 // CHECK1: .omp.final.then:
655 // CHECK1-NEXT: store i32 2, i32* [[I]], align 4
656 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
657 // CHECK1: .omp.final.done:
658 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
659 // CHECK1-NEXT: [[TMP17:%.*]] = bitcast i32* [[T_VAR2]] to i8*
660 // CHECK1-NEXT: store i8* [[TMP17]], i8** [[TMP16]], align 8
661 // CHECK1-NEXT: [[TMP18:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
662 // CHECK1-NEXT: [[TMP19:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 1, i64 8, i8* [[TMP18]], void (i8*, i8*)* @.omp.reduction.reduction_func.5, [8 x i32]* @.gomp_critical_user_.reduction.var)
663 // CHECK1-NEXT: switch i32 [[TMP19]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
664 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
665 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
666 // CHECK1-NEXT: ]
667 // CHECK1: .omp.reduction.case1:
668 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP0]], align 4
669 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[T_VAR2]], align 4
670 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
671 // CHECK1-NEXT: store i32 [[ADD6]], i32* [[TMP0]], align 4
672 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
673 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
674 // CHECK1: .omp.reduction.case2:
675 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[T_VAR2]], align 4
676 // CHECK1-NEXT: [[TMP23:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP22]] monotonic, align 4
677 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
678 // CHECK1: .omp.reduction.default:
679 // CHECK1-NEXT: ret void
680 //
681 //
682 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.5
683 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] {
684 // CHECK1-NEXT: entry:
685 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
686 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
687 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
688 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
689 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
690 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
691 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
692 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
693 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
694 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
695 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
696 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
697 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
698 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
699 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
700 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
701 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
702 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
703 // CHECK1-NEXT: ret void
704 //
705 //
706 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.6
707 // CHECK1-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] {
708 // CHECK1-NEXT: entry:
709 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
710 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
711 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
712 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
713 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
714 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
715 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
716 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
717 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
718 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
719 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
720 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
721 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
722 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
723 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
724 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
725 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
726 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
727 // CHECK1-NEXT: ret void
728 //
729 //
730 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
731 // CHECK1-SAME: () #[[ATTR7:[0-9]+]] {
732 // CHECK1-NEXT: entry:
733 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
734 // CHECK1-NEXT: ret void
735 //
736 //
737 // CHECK3-LABEL: define {{[^@]+}}@main
738 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
739 // CHECK3-NEXT: entry:
740 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
741 // CHECK3-NEXT: [[SIVAR_CASTED:%.*]] = alloca i32, align 4
742 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
743 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
744 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
745 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
746 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4
747 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4
748 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[SIVAR_CASTED]], align 4
749 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[SIVAR_CASTED]], align 4
750 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
751 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32*
752 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP3]], align 4
753 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
754 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32*
755 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP5]], align 4
756 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
757 // CHECK3-NEXT: store i8* null, i8** [[TMP6]], align 4
758 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
759 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
760 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
761 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
762 // CHECK3-NEXT: store i32 1, i32* [[TMP9]], align 4
763 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
764 // CHECK3-NEXT: store i32 1, i32* [[TMP10]], align 4
765 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
766 // CHECK3-NEXT: store i8** [[TMP7]], i8*** [[TMP11]], align 4
767 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
768 // CHECK3-NEXT: store i8** [[TMP8]], i8*** [[TMP12]], align 4
769 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
770 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP13]], align 4
771 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
772 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP14]], align 4
773 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
774 // CHECK3-NEXT: store i8** null, i8*** [[TMP15]], align 4
775 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
776 // CHECK3-NEXT: store i8** null, i8*** [[TMP16]], align 4
777 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
778 // CHECK3-NEXT: store i64 2, i64* [[TMP17]], align 8
779 // CHECK3-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l70.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
780 // CHECK3-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
781 // CHECK3-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
782 // CHECK3: omp_offload.failed:
783 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l70(i32 [[TMP1]]) #[[ATTR2:[0-9]+]]
784 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
785 // CHECK3: omp_offload.cont:
786 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
787 // CHECK3-NEXT: ret i32 [[CALL]]
788 //
789 //
790 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l70
791 // CHECK3-SAME: (i32 noundef [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] {
792 // CHECK3-NEXT: entry:
793 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32, align 4
794 // CHECK3-NEXT: store i32 [[SIVAR]], i32* [[SIVAR_ADDR]], align 4
795 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[SIVAR_ADDR]])
796 // CHECK3-NEXT: ret void
797 //
798 //
799 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
800 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {
801 // CHECK3-NEXT: entry:
802 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
803 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
804 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 4
805 // CHECK3-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4
806 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
807 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
808 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
809 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
810 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
811 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
812 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
813 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4
814 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
815 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
816 // CHECK3-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 4
817 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 4
818 // CHECK3-NEXT: store i32 0, i32* [[SIVAR1]], align 4
819 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
820 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
821 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
822 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
823 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
824 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
825 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
826 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
827 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
828 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
829 // CHECK3: cond.true:
830 // CHECK3-NEXT: br label [[COND_END:%.*]]
831 // CHECK3: cond.false:
832 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
833 // CHECK3-NEXT: br label [[COND_END]]
834 // CHECK3: cond.end:
835 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
836 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
837 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
838 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
839 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
840 // CHECK3: omp.inner.for.cond:
841 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
842 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !6
843 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
844 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
845 // CHECK3: omp.inner.for.body:
846 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !6
847 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !6
848 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], i32* [[SIVAR1]]), !llvm.access.group !6
849 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
850 // CHECK3: omp.inner.for.inc:
851 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
852 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !6
853 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
854 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
855 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
856 // CHECK3: omp.inner.for.end:
857 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
858 // CHECK3: omp.loop.exit:
859 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
860 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
861 // CHECK3-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
862 // CHECK3-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
863 // CHECK3: .omp.final.then:
864 // CHECK3-NEXT: store i32 2, i32* [[I]], align 4
865 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
866 // CHECK3: .omp.final.done:
867 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0
868 // CHECK3-NEXT: [[TMP15:%.*]] = bitcast i32* [[SIVAR1]] to i8*
869 // CHECK3-NEXT: store i8* [[TMP15]], i8** [[TMP14]], align 4
870 // CHECK3-NEXT: [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
871 // CHECK3-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP2]], i32 1, i32 4, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var)
872 // CHECK3-NEXT: switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
873 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
874 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
875 // CHECK3-NEXT: ]
876 // CHECK3: .omp.reduction.case1:
877 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP0]], align 4
878 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[SIVAR1]], align 4
879 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
880 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[TMP0]], align 4
881 // CHECK3-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
882 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
883 // CHECK3: .omp.reduction.case2:
884 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[SIVAR1]], align 4
885 // CHECK3-NEXT: [[TMP21:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP20]] monotonic, align 4
886 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
887 // CHECK3: .omp.reduction.default:
888 // CHECK3-NEXT: ret void
889 //
890 //
891 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
892 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] {
893 // CHECK3-NEXT: entry:
894 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
895 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
896 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
897 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
898 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 4
899 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
900 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
901 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
902 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
903 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
904 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
905 // CHECK3-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4
906 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
907 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4
908 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
909 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
910 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
911 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
912 // CHECK3-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 4
913 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 4
914 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
915 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
916 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
917 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
918 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
919 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
920 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
921 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
922 // CHECK3-NEXT: store i32 0, i32* [[SIVAR1]], align 4
923 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
924 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
925 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
926 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
927 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
928 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
929 // CHECK3: cond.true:
930 // CHECK3-NEXT: br label [[COND_END:%.*]]
931 // CHECK3: cond.false:
932 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
933 // CHECK3-NEXT: br label [[COND_END]]
934 // CHECK3: cond.end:
935 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
936 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
937 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
938 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
939 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
940 // CHECK3: omp.inner.for.cond:
941 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
942 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10
943 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
944 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
945 // CHECK3: omp.inner.for.body:
946 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
947 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
948 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
949 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !10
950 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !10
951 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[SIVAR1]], align 4, !llvm.access.group !10
952 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], [[TMP11]]
953 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[SIVAR1]], align 4, !llvm.access.group !10
954 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
955 // CHECK3: omp.body.continue:
956 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
957 // CHECK3: omp.inner.for.inc:
958 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
959 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], 1
960 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
961 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
962 // CHECK3: omp.inner.for.end:
963 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
964 // CHECK3: omp.loop.exit:
965 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
966 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
967 // CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
968 // CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
969 // CHECK3: .omp.final.then:
970 // CHECK3-NEXT: store i32 2, i32* [[I]], align 4
971 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
972 // CHECK3: .omp.final.done:
973 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0
974 // CHECK3-NEXT: [[TMP17:%.*]] = bitcast i32* [[SIVAR1]] to i8*
975 // CHECK3-NEXT: store i8* [[TMP17]], i8** [[TMP16]], align 4
976 // CHECK3-NEXT: [[TMP18:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
977 // CHECK3-NEXT: [[TMP19:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 1, i32 4, i8* [[TMP18]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var)
978 // CHECK3-NEXT: switch i32 [[TMP19]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
979 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
980 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
981 // CHECK3-NEXT: ]
982 // CHECK3: .omp.reduction.case1:
983 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP0]], align 4
984 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[SIVAR1]], align 4
985 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
986 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4
987 // CHECK3-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
988 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
989 // CHECK3: .omp.reduction.case2:
990 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[SIVAR1]], align 4
991 // CHECK3-NEXT: [[TMP23:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP22]] monotonic, align 4
992 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
993 // CHECK3: .omp.reduction.default:
994 // CHECK3-NEXT: ret void
995 //
996 //
997 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func
998 // CHECK3-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] {
999 // CHECK3-NEXT: entry:
1000 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4
1001 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4
1002 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4
1003 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4
1004 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4
1005 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
1006 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4
1007 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
1008 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0
1009 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4
1010 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
1011 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0
1012 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4
1013 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
1014 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
1015 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
1016 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1017 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
1018 // CHECK3-NEXT: ret void
1019 //
1020 //
1021 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2
1022 // CHECK3-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] {
1023 // CHECK3-NEXT: entry:
1024 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4
1025 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4
1026 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4
1027 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4
1028 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4
1029 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
1030 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4
1031 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
1032 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0
1033 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4
1034 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
1035 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0
1036 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4
1037 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
1038 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
1039 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
1040 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1041 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
1042 // CHECK3-NEXT: ret void
1043 //
1044 //
1045 // CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
1046 // CHECK3-SAME: () #[[ATTR5:[0-9]+]] comdat {
1047 // CHECK3-NEXT: entry:
1048 // CHECK3-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1049 // CHECK3-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1050 // CHECK3-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
1051 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
1052 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
1053 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
1054 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1055 // CHECK3-NEXT: store i32 0, i32* [[T_VAR]], align 4
1056 // CHECK3-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1057 // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
1058 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[T_VAR]], align 4
1059 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[T_VAR_CASTED]], align 4
1060 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4
1061 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1062 // CHECK3-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32*
1063 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[TMP4]], align 4
1064 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1065 // CHECK3-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32*
1066 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[TMP6]], align 4
1067 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1068 // CHECK3-NEXT: store i8* null, i8** [[TMP7]], align 4
1069 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1070 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1071 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1072 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
1073 // CHECK3-NEXT: store i32 1, i32* [[TMP10]], align 4
1074 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
1075 // CHECK3-NEXT: store i32 1, i32* [[TMP11]], align 4
1076 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1077 // CHECK3-NEXT: store i8** [[TMP8]], i8*** [[TMP12]], align 4
1078 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1079 // CHECK3-NEXT: store i8** [[TMP9]], i8*** [[TMP13]], align 4
1080 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1081 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.7, i32 0, i32 0), i64** [[TMP14]], align 4
1082 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1083 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.8, i32 0, i32 0), i64** [[TMP15]], align 4
1084 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1085 // CHECK3-NEXT: store i8** null, i8*** [[TMP16]], align 4
1086 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1087 // CHECK3-NEXT: store i8** null, i8*** [[TMP17]], align 4
1088 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1089 // CHECK3-NEXT: store i64 2, i64* [[TMP18]], align 8
1090 // CHECK3-NEXT: [[TMP19:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB4]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1091 // CHECK3-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
1092 // CHECK3-NEXT: br i1 [[TMP20]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1093 // CHECK3: omp_offload.failed:
1094 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i32 [[TMP2]]) #[[ATTR2]]
1095 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
1096 // CHECK3: omp_offload.cont:
1097 // CHECK3-NEXT: ret i32 0
1098 //
1099 //
1100 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32
1101 // CHECK3-SAME: (i32 noundef [[T_VAR:%.*]]) #[[ATTR1]] {
1102 // CHECK3-NEXT: entry:
1103 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
1104 // CHECK3-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4
1105 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]])
1106 // CHECK3-NEXT: ret void
1107 //
1108 //
1109 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3
1110 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {
1111 // CHECK3-NEXT: entry:
1112 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1113 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1114 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
1115 // CHECK3-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4
1116 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1117 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1118 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1119 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1120 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1121 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1122 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1123 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4
1124 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1125 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1126 // CHECK3-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
1127 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
1128 // CHECK3-NEXT: store i32 0, i32* [[T_VAR1]], align 4
1129 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1130 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
1131 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1132 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1133 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1134 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1135 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1136 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1137 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
1138 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1139 // CHECK3: cond.true:
1140 // CHECK3-NEXT: br label [[COND_END:%.*]]
1141 // CHECK3: cond.false:
1142 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1143 // CHECK3-NEXT: br label [[COND_END]]
1144 // CHECK3: cond.end:
1145 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1146 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1147 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1148 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1149 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1150 // CHECK3: omp.inner.for.cond:
1151 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
1152 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !15
1153 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1154 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1155 // CHECK3: omp.inner.for.body:
1156 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !15
1157 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !15
1158 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], i32* [[T_VAR1]]), !llvm.access.group !15
1159 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1160 // CHECK3: omp.inner.for.inc:
1161 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
1162 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !15
1163 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
1164 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
1165 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
1166 // CHECK3: omp.inner.for.end:
1167 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1168 // CHECK3: omp.loop.exit:
1169 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1170 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1171 // CHECK3-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
1172 // CHECK3-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1173 // CHECK3: .omp.final.then:
1174 // CHECK3-NEXT: store i32 2, i32* [[I]], align 4
1175 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
1176 // CHECK3: .omp.final.done:
1177 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0
1178 // CHECK3-NEXT: [[TMP15:%.*]] = bitcast i32* [[T_VAR1]] to i8*
1179 // CHECK3-NEXT: store i8* [[TMP15]], i8** [[TMP14]], align 4
1180 // CHECK3-NEXT: [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
1181 // CHECK3-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 4, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func.6, [8 x i32]* @.gomp_critical_user_.reduction.var)
1182 // CHECK3-NEXT: switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
1183 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
1184 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
1185 // CHECK3-NEXT: ]
1186 // CHECK3: .omp.reduction.case1:
1187 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP0]], align 4
1188 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[T_VAR1]], align 4
1189 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
1190 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[TMP0]], align 4
1191 // CHECK3-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1192 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1193 // CHECK3: .omp.reduction.case2:
1194 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[T_VAR1]], align 4
1195 // CHECK3-NEXT: [[TMP21:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP20]] monotonic, align 4
1196 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1197 // CHECK3: .omp.reduction.default:
1198 // CHECK3-NEXT: ret void
1199 //
1200 //
1201 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..4
1202 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] {
1203 // CHECK3-NEXT: entry:
1204 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1205 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1206 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1207 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1208 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4
1209 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1210 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1211 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1212 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1213 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1214 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1215 // CHECK3-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4
1216 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1217 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4
1218 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1219 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1220 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1221 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1222 // CHECK3-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4
1223 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4
1224 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1225 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
1226 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1227 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1228 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
1229 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
1230 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1231 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1232 // CHECK3-NEXT: store i32 0, i32* [[T_VAR1]], align 4
1233 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1234 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1235 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1236 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1237 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
1238 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1239 // CHECK3: cond.true:
1240 // CHECK3-NEXT: br label [[COND_END:%.*]]
1241 // CHECK3: cond.false:
1242 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1243 // CHECK3-NEXT: br label [[COND_END]]
1244 // CHECK3: cond.end:
1245 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
1246 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1247 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1248 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
1249 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1250 // CHECK3: omp.inner.for.cond:
1251 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
1252 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18
1253 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1254 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1255 // CHECK3: omp.inner.for.body:
1256 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
1257 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1258 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1259 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !18
1260 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !18
1261 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[T_VAR1]], align 4, !llvm.access.group !18
1262 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], [[TMP11]]
1263 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[T_VAR1]], align 4, !llvm.access.group !18
1264 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1265 // CHECK3: omp.body.continue:
1266 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1267 // CHECK3: omp.inner.for.inc:
1268 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
1269 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], 1
1270 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
1271 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
1272 // CHECK3: omp.inner.for.end:
1273 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1274 // CHECK3: omp.loop.exit:
1275 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1276 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1277 // CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
1278 // CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1279 // CHECK3: .omp.final.then:
1280 // CHECK3-NEXT: store i32 2, i32* [[I]], align 4
1281 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
1282 // CHECK3: .omp.final.done:
1283 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0
1284 // CHECK3-NEXT: [[TMP17:%.*]] = bitcast i32* [[T_VAR1]] to i8*
1285 // CHECK3-NEXT: store i8* [[TMP17]], i8** [[TMP16]], align 4
1286 // CHECK3-NEXT: [[TMP18:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
1287 // CHECK3-NEXT: [[TMP19:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 1, i32 4, i8* [[TMP18]], void (i8*, i8*)* @.omp.reduction.reduction_func.5, [8 x i32]* @.gomp_critical_user_.reduction.var)
1288 // CHECK3-NEXT: switch i32 [[TMP19]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
1289 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
1290 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
1291 // CHECK3-NEXT: ]
1292 // CHECK3: .omp.reduction.case1:
1293 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP0]], align 4
1294 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[T_VAR1]], align 4
1295 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
1296 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4
1297 // CHECK3-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1298 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1299 // CHECK3: .omp.reduction.case2:
1300 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[T_VAR1]], align 4
1301 // CHECK3-NEXT: [[TMP23:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP22]] monotonic, align 4
1302 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1303 // CHECK3: .omp.reduction.default:
1304 // CHECK3-NEXT: ret void
1305 //
1306 //
1307 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.5
1308 // CHECK3-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] {
1309 // CHECK3-NEXT: entry:
1310 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4
1311 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4
1312 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4
1313 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4
1314 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4
1315 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
1316 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4
1317 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
1318 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0
1319 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4
1320 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
1321 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0
1322 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4
1323 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
1324 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
1325 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
1326 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1327 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
1328 // CHECK3-NEXT: ret void
1329 //
1330 //
1331 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.6
1332 // CHECK3-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR3]] {
1333 // CHECK3-NEXT: entry:
1334 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4
1335 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4
1336 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4
1337 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4
1338 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4
1339 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
1340 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4
1341 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
1342 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0
1343 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4
1344 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
1345 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0
1346 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4
1347 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
1348 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
1349 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
1350 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1351 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
1352 // CHECK3-NEXT: ret void
1353 //
1354 //
1355 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1356 // CHECK3-SAME: () #[[ATTR7:[0-9]+]] {
1357 // CHECK3-NEXT: entry:
1358 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1)
1359 // CHECK3-NEXT: ret void
1360 //
1361 //
1362 // CHECK5-LABEL: define {{[^@]+}}@main
1363 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] {
1364 // CHECK5-NEXT: entry:
1365 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1366 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
1367 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1368 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1369 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1370 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
1371 // CHECK5-NEXT: [[SIVAR:%.*]] = alloca i32, align 4
1372 // CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4
1373 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1374 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
1375 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1376 // CHECK5-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
1377 // CHECK5-NEXT: store i32 0, i32* [[SIVAR]], align 4
1378 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1379 // CHECK5: omp.inner.for.cond:
1380 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
1381 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
1382 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
1383 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1384 // CHECK5: omp.inner.for.body:
1385 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
1386 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
1387 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1388 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2
1389 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2
1390 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[SIVAR]], align 4, !llvm.access.group !2
1391 // CHECK5-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], [[TMP4]]
1392 // CHECK5-NEXT: store i32 [[ADD1]], i32* [[SIVAR]], align 4, !llvm.access.group !2
1393 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1394 // CHECK5: omp.body.continue:
1395 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1396 // CHECK5: omp.inner.for.inc:
1397 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
1398 // CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP6]], 1
1399 // CHECK5-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
1400 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
1401 // CHECK5: omp.inner.for.end:
1402 // CHECK5-NEXT: store i32 2, i32* [[I]], align 4
1403 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4
1404 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[SIVAR]], align 4
1405 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP7]], [[TMP8]]
1406 // CHECK5-NEXT: store i32 [[ADD3]], i32* @_ZZ4mainE5sivar, align 4
1407 // CHECK5-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
1408 // CHECK5-NEXT: ret i32 [[CALL]]
1409 //
1410 //
1411 // CHECK5-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
1412 // CHECK5-SAME: () #[[ATTR1:[0-9]+]] comdat {
1413 // CHECK5-NEXT: entry:
1414 // CHECK5-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1415 // CHECK5-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1416 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
1417 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1418 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1419 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1420 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
1421 // CHECK5-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4
1422 // CHECK5-NEXT: store i32 0, i32* [[T_VAR]], align 4
1423 // CHECK5-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1424 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false)
1425 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1426 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
1427 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1428 // CHECK5-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_IV]], align 4
1429 // CHECK5-NEXT: store i32 0, i32* [[T_VAR1]], align 4
1430 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1431 // CHECK5: omp.inner.for.cond:
1432 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
1433 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6
1434 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]]
1435 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1436 // CHECK5: omp.inner.for.body:
1437 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
1438 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1
1439 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1440 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6
1441 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6
1442 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[T_VAR1]], align 4, !llvm.access.group !6
1443 // CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP6]], [[TMP5]]
1444 // CHECK5-NEXT: store i32 [[ADD2]], i32* [[T_VAR1]], align 4, !llvm.access.group !6
1445 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1446 // CHECK5: omp.body.continue:
1447 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1448 // CHECK5: omp.inner.for.inc:
1449 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
1450 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP7]], 1
1451 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
1452 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
1453 // CHECK5: omp.inner.for.end:
1454 // CHECK5-NEXT: store i32 2, i32* [[I]], align 4
1455 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[T_VAR]], align 4
1456 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[T_VAR1]], align 4
1457 // CHECK5-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]
1458 // CHECK5-NEXT: store i32 [[ADD4]], i32* [[T_VAR]], align 4
1459 // CHECK5-NEXT: ret i32 0
1460 //
1461 //
1462 // CHECK7-LABEL: define {{[^@]+}}@main
1463 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] {
1464 // CHECK7-NEXT: entry:
1465 // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1466 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
1467 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1468 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1469 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1470 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
1471 // CHECK7-NEXT: [[SIVAR:%.*]] = alloca i32, align 4
1472 // CHECK7-NEXT: store i32 0, i32* [[RETVAL]], align 4
1473 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1474 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
1475 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1476 // CHECK7-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
1477 // CHECK7-NEXT: store i32 0, i32* [[SIVAR]], align 4
1478 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1479 // CHECK7: omp.inner.for.cond:
1480 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
1481 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
1482 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
1483 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1484 // CHECK7: omp.inner.for.body:
1485 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
1486 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
1487 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1488 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3
1489 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3
1490 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[SIVAR]], align 4, !llvm.access.group !3
1491 // CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP5]], [[TMP4]]
1492 // CHECK7-NEXT: store i32 [[ADD1]], i32* [[SIVAR]], align 4, !llvm.access.group !3
1493 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1494 // CHECK7: omp.body.continue:
1495 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1496 // CHECK7: omp.inner.for.inc:
1497 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
1498 // CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP6]], 1
1499 // CHECK7-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
1500 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
1501 // CHECK7: omp.inner.for.end:
1502 // CHECK7-NEXT: store i32 2, i32* [[I]], align 4
1503 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4
1504 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[SIVAR]], align 4
1505 // CHECK7-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP7]], [[TMP8]]
1506 // CHECK7-NEXT: store i32 [[ADD3]], i32* @_ZZ4mainE5sivar, align 4
1507 // CHECK7-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
1508 // CHECK7-NEXT: ret i32 [[CALL]]
1509 //
1510 //
1511 // CHECK7-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
1512 // CHECK7-SAME: () #[[ATTR1:[0-9]+]] comdat {
1513 // CHECK7-NEXT: entry:
1514 // CHECK7-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1515 // CHECK7-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1516 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
1517 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1518 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1519 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1520 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
1521 // CHECK7-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4
1522 // CHECK7-NEXT: store i32 0, i32* [[T_VAR]], align 4
1523 // CHECK7-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8*
1524 // CHECK7-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false)
1525 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1526 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
1527 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1528 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_IV]], align 4
1529 // CHECK7-NEXT: store i32 0, i32* [[T_VAR1]], align 4
1530 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1531 // CHECK7: omp.inner.for.cond:
1532 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
1533 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7
1534 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP2]], [[TMP3]]
1535 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1536 // CHECK7: omp.inner.for.body:
1537 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
1538 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP4]], 1
1539 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1540 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !7
1541 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7
1542 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[T_VAR1]], align 4, !llvm.access.group !7
1543 // CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP6]], [[TMP5]]
1544 // CHECK7-NEXT: store i32 [[ADD2]], i32* [[T_VAR1]], align 4, !llvm.access.group !7
1545 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1546 // CHECK7: omp.body.continue:
1547 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1548 // CHECK7: omp.inner.for.inc:
1549 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
1550 // CHECK7-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP7]], 1
1551 // CHECK7-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
1552 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
1553 // CHECK7: omp.inner.for.end:
1554 // CHECK7-NEXT: store i32 2, i32* [[I]], align 4
1555 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[T_VAR]], align 4
1556 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[T_VAR1]], align 4
1557 // CHECK7-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]
1558 // CHECK7-NEXT: store i32 [[ADD4]], i32* [[T_VAR]], align 4
1559 // CHECK7-NEXT: ret i32 0
1560 //
1561 //
1562 // CHECK9-LABEL: define {{[^@]+}}@main
1563 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
1564 // CHECK9-NEXT: entry:
1565 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1566 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1
1567 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4
1568 // CHECK9-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 1 dereferenceable(1) [[REF_TMP]])
1569 // CHECK9-NEXT: ret i32 0
1570 //
1571 //
1572 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l45
1573 // CHECK9-SAME: (i64 noundef [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] {
1574 // CHECK9-NEXT: entry:
1575 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 8
1576 // CHECK9-NEXT: store i64 [[SIVAR]], i64* [[SIVAR_ADDR]], align 8
1577 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[SIVAR_ADDR]] to i32*
1578 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]])
1579 // CHECK9-NEXT: ret void
1580 //
1581 //
1582 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
1583 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] {
1584 // CHECK9-NEXT: entry:
1585 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1586 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1587 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
1588 // CHECK9-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4
1589 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1590 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1591 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1592 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1593 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1594 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1595 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1596 // CHECK9-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
1597 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1598 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1599 // CHECK9-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
1600 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
1601 // CHECK9-NEXT: store i32 0, i32* [[SIVAR1]], align 4
1602 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1603 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4
1604 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1605 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1606 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1607 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1608 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1609 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1610 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
1611 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1612 // CHECK9: cond.true:
1613 // CHECK9-NEXT: br label [[COND_END:%.*]]
1614 // CHECK9: cond.false:
1615 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1616 // CHECK9-NEXT: br label [[COND_END]]
1617 // CHECK9: cond.end:
1618 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1619 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1620 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1621 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1622 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1623 // CHECK9: omp.inner.for.cond:
1624 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
1625 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !4
1626 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1627 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1628 // CHECK9: omp.inner.for.body:
1629 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !4
1630 // CHECK9-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1631 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !4
1632 // CHECK9-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1633 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], i32* [[SIVAR1]]), !llvm.access.group !4
1634 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1635 // CHECK9: omp.inner.for.inc:
1636 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
1637 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !4
1638 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1639 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
1640 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
1641 // CHECK9: omp.inner.for.end:
1642 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1643 // CHECK9: omp.loop.exit:
1644 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1645 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1646 // CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
1647 // CHECK9-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1648 // CHECK9: .omp.final.then:
1649 // CHECK9-NEXT: store i32 2, i32* [[I]], align 4
1650 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
1651 // CHECK9: .omp.final.done:
1652 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
1653 // CHECK9-NEXT: [[TMP17:%.*]] = bitcast i32* [[SIVAR1]] to i8*
1654 // CHECK9-NEXT: store i8* [[TMP17]], i8** [[TMP16]], align 8
1655 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
1656 // CHECK9-NEXT: [[TMP19:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP18]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var)
1657 // CHECK9-NEXT: switch i32 [[TMP19]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
1658 // CHECK9-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
1659 // CHECK9-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
1660 // CHECK9-NEXT: ]
1661 // CHECK9: .omp.reduction.case1:
1662 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[TMP0]], align 4
1663 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[SIVAR1]], align 4
1664 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
1665 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[TMP0]], align 4
1666 // CHECK9-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1667 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1668 // CHECK9: .omp.reduction.case2:
1669 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[SIVAR1]], align 4
1670 // CHECK9-NEXT: [[TMP23:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP22]] monotonic, align 4
1671 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1672 // CHECK9: .omp.reduction.default:
1673 // CHECK9-NEXT: ret void
1674 //
1675 //
1676 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1
1677 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] {
1678 // CHECK9-NEXT: entry:
1679 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1680 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1681 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1682 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1683 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8
1684 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1685 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1686 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1687 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1688 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1689 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1690 // CHECK9-NEXT: [[SIVAR2:%.*]] = alloca i32, align 4
1691 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1692 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
1693 // CHECK9-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8
1694 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1695 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1696 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1697 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1698 // CHECK9-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8
1699 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8
1700 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1701 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4
1702 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1703 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1704 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1705 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
1706 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1707 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1708 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1709 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1710 // CHECK9-NEXT: store i32 0, i32* [[SIVAR2]], align 4
1711 // CHECK9-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1712 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1713 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1714 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1715 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
1716 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1717 // CHECK9: cond.true:
1718 // CHECK9-NEXT: br label [[COND_END:%.*]]
1719 // CHECK9: cond.false:
1720 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1721 // CHECK9-NEXT: br label [[COND_END]]
1722 // CHECK9: cond.end:
1723 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
1724 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1725 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1726 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
1727 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1728 // CHECK9: omp.inner.for.cond:
1729 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
1730 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !8
1731 // CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1732 // CHECK9-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1733 // CHECK9: omp.inner.for.body:
1734 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
1735 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1736 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1737 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !8
1738 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !8
1739 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[SIVAR2]], align 4, !llvm.access.group !8
1740 // CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], [[TMP11]]
1741 // CHECK9-NEXT: store i32 [[ADD4]], i32* [[SIVAR2]], align 4, !llvm.access.group !8
1742 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0
1743 // CHECK9-NEXT: store i32* [[SIVAR2]], i32** [[TMP13]], align 8, !llvm.access.group !8
1744 // CHECK9-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* noundef nonnull align 8 dereferenceable(8) [[REF_TMP]]), !llvm.access.group !8
1745 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1746 // CHECK9: omp.body.continue:
1747 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1748 // CHECK9: omp.inner.for.inc:
1749 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
1750 // CHECK9-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], 1
1751 // CHECK9-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
1752 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
1753 // CHECK9: omp.inner.for.end:
1754 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1755 // CHECK9: omp.loop.exit:
1756 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1757 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1758 // CHECK9-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
1759 // CHECK9-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1760 // CHECK9: .omp.final.then:
1761 // CHECK9-NEXT: store i32 2, i32* [[I]], align 4
1762 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
1763 // CHECK9: .omp.final.done:
1764 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
1765 // CHECK9-NEXT: [[TMP18:%.*]] = bitcast i32* [[SIVAR2]] to i8*
1766 // CHECK9-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 8
1767 // CHECK9-NEXT: [[TMP19:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8*
1768 // CHECK9-NEXT: [[TMP20:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 1, i64 8, i8* [[TMP19]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var)
1769 // CHECK9-NEXT: switch i32 [[TMP20]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
1770 // CHECK9-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
1771 // CHECK9-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
1772 // CHECK9-NEXT: ]
1773 // CHECK9: .omp.reduction.case1:
1774 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP0]], align 4
1775 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[SIVAR2]], align 4
1776 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
1777 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[TMP0]], align 4
1778 // CHECK9-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var)
1779 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1780 // CHECK9: .omp.reduction.case2:
1781 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, i32* [[SIVAR2]], align 4
1782 // CHECK9-NEXT: [[TMP24:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP23]] monotonic, align 4
1783 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]]
1784 // CHECK9: .omp.reduction.default:
1785 // CHECK9-NEXT: ret void
1786 //
1787 //
1788 // CHECK9-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func
1789 // CHECK9-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] {
1790 // CHECK9-NEXT: entry:
1791 // CHECK9-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
1792 // CHECK9-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
1793 // CHECK9-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
1794 // CHECK9-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
1795 // CHECK9-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
1796 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
1797 // CHECK9-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
1798 // CHECK9-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
1799 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
1800 // CHECK9-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
1801 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
1802 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
1803 // CHECK9-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
1804 // CHECK9-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
1805 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
1806 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
1807 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1808 // CHECK9-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
1809 // CHECK9-NEXT: ret void
1810 //
1811 //
1812 // CHECK9-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2
1813 // CHECK9-SAME: (i8* noundef [[TMP0:%.*]], i8* noundef [[TMP1:%.*]]) #[[ATTR4]] {
1814 // CHECK9-NEXT: entry:
1815 // CHECK9-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8
1816 // CHECK9-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8
1817 // CHECK9-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8
1818 // CHECK9-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8
1819 // CHECK9-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8
1820 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]*
1821 // CHECK9-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8
1822 // CHECK9-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]*
1823 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0
1824 // CHECK9-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8
1825 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32*
1826 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0
1827 // CHECK9-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8
1828 // CHECK9-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32*
1829 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
1830 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4
1831 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1832 // CHECK9-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4
1833 // CHECK9-NEXT: ret void
1834 //
1835 //
1836 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1837 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] {
1838 // CHECK9-NEXT: entry:
1839 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1)
1840 // CHECK9-NEXT: ret void
1841 //
1842 //
1843 // CHECK11-LABEL: define {{[^@]+}}@main
1844 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] {
1845 // CHECK11-NEXT: entry:
1846 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1847 // CHECK11-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1
1848 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4
1849 // CHECK11-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* noundef nonnull align 1 dereferenceable(1) [[REF_TMP]])
1850 // CHECK11-NEXT: ret i32 0
1851 //
1852