1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
3 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
4 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
5 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=50 -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
6 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=50 -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
7 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=50 -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3
8
9 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5
10 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
11 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5
12 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=50 -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7
13 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=50 -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
14 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=50 -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK7
15
16 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
17 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s
18 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9
19 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=50 -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11
20 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=50 -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s
21 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=50 -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11
22
23 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13
24 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s
25 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK13
26 // RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=50 -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15
27 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=50 -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s
28 // RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=50 -DOMP5 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15
29 // expected-no-diagnostics
30 #ifndef HEADER
31 #define HEADER
32
33 void fn1();
34 void fn2();
35 void fn3();
36 void fn4();
37 void fn5();
38 void fn6();
39
40 int Arg;
41
gtid_test()42 void gtid_test() {
43 #pragma omp target
44 #pragma omp teams distribute parallel for simd
45 for(int i = 0 ; i < 100; i++) {}
46
47 #pragma omp target
48 #pragma omp teams distribute parallel for simd if (parallel: false)
49 for(int i = 0 ; i < 100; i++) {
50 gtid_test();
51 }
52 }
53
54
55 template <typename T>
tmain(T Arg)56 int tmain(T Arg) {
57 #pragma omp target
58 #pragma omp teams distribute parallel for simd if (true)
59 for(int i = 0 ; i < 100; i++) {
60 fn1();
61 }
62 #pragma omp target
63 #pragma omp teams distribute parallel for simd if (false)
64 for(int i = 0 ; i < 100; i++) {
65 fn2();
66 }
67 #pragma omp target
68 #pragma omp teams distribute parallel for simd if (parallel: Arg)
69 for(int i = 0 ; i < 100; i++) {
70 fn3();
71 }
72 return 0;
73 }
74
main()75 int main() {
76 #pragma omp target
77 #pragma omp teams distribute parallel for simd if (true)
78 for(int i = 0 ; i < 100; i++) {
79
80
81 fn4();
82 }
83
84 #pragma omp target
85 #pragma omp teams distribute parallel for simd if (false)
86 for(int i = 0 ; i < 100; i++) {
87
88
89 fn5();
90 }
91
92 #pragma omp target
93 #pragma omp teams distribute parallel for simd if (Arg)
94 for(int i = 0 ; i < 100; i++) {
95
96
97 fn6();
98 }
99
100 return tmain(Arg);
101 }
102
103
104
105
106
107
108 // call void [[T_OUTLINE_FUN_3:@.+]](
109
110
111
112 #endif
113 // CHECK1-LABEL: define {{[^@]+}}@_Z9gtid_testv
114 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
115 // CHECK1-NEXT: entry:
116 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
117 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
118 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
119 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
120 // CHECK1-NEXT: store i32 1, i32* [[TMP0]], align 4
121 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
122 // CHECK1-NEXT: store i32 0, i32* [[TMP1]], align 4
123 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
124 // CHECK1-NEXT: store i8** null, i8*** [[TMP2]], align 8
125 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
126 // CHECK1-NEXT: store i8** null, i8*** [[TMP3]], align 8
127 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
128 // CHECK1-NEXT: store i64* null, i64** [[TMP4]], align 8
129 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
130 // CHECK1-NEXT: store i64* null, i64** [[TMP5]], align 8
131 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
132 // CHECK1-NEXT: store i8** null, i8*** [[TMP6]], align 8
133 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
134 // CHECK1-NEXT: store i8** null, i8*** [[TMP7]], align 8
135 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
136 // CHECK1-NEXT: store i64 100, i64* [[TMP8]], align 8
137 // CHECK1-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
138 // CHECK1-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
139 // CHECK1-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
140 // CHECK1: omp_offload.failed:
141 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43() #[[ATTR2:[0-9]+]]
142 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
143 // CHECK1: omp_offload.cont:
144 // CHECK1-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
145 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
146 // CHECK1-NEXT: store i32 1, i32* [[TMP11]], align 4
147 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
148 // CHECK1-NEXT: store i32 0, i32* [[TMP12]], align 4
149 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
150 // CHECK1-NEXT: store i8** null, i8*** [[TMP13]], align 8
151 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
152 // CHECK1-NEXT: store i8** null, i8*** [[TMP14]], align 8
153 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
154 // CHECK1-NEXT: store i64* null, i64** [[TMP15]], align 8
155 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
156 // CHECK1-NEXT: store i64* null, i64** [[TMP16]], align 8
157 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
158 // CHECK1-NEXT: store i8** null, i8*** [[TMP17]], align 8
159 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
160 // CHECK1-NEXT: store i8** null, i8*** [[TMP18]], align 8
161 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
162 // CHECK1-NEXT: store i64 100, i64* [[TMP19]], align 8
163 // CHECK1-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
164 // CHECK1-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
165 // CHECK1-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
166 // CHECK1: omp_offload.failed3:
167 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47() #[[ATTR2]]
168 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT4]]
169 // CHECK1: omp_offload.cont4:
170 // CHECK1-NEXT: ret void
171 //
172 //
173 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43
174 // CHECK1-SAME: () #[[ATTR1:[0-9]+]] {
175 // CHECK1-NEXT: entry:
176 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
177 // CHECK1-NEXT: ret void
178 //
179 //
180 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
181 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
182 // CHECK1-NEXT: entry:
183 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
184 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
185 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
186 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
187 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
188 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
189 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
190 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
191 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
192 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
193 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
194 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
195 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
196 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
197 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
198 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
199 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
200 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
201 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
202 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
203 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
204 // CHECK1: cond.true:
205 // CHECK1-NEXT: br label [[COND_END:%.*]]
206 // CHECK1: cond.false:
207 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
208 // CHECK1-NEXT: br label [[COND_END]]
209 // CHECK1: cond.end:
210 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
211 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
212 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
213 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
214 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
215 // CHECK1: omp.inner.for.cond:
216 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]]
217 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]
218 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
219 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
220 // CHECK1: omp.inner.for.body:
221 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP11]]
222 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
223 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]
224 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
225 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP11]]
226 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
227 // CHECK1: omp.inner.for.inc:
228 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
229 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP11]]
230 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
231 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
232 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
233 // CHECK1: omp.inner.for.end:
234 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
235 // CHECK1: omp.loop.exit:
236 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
237 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
238 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
239 // CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
240 // CHECK1: .omp.final.then:
241 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
242 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
243 // CHECK1: .omp.final.done:
244 // CHECK1-NEXT: ret void
245 //
246 //
247 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
248 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
249 // CHECK1-NEXT: entry:
250 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
251 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
252 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
253 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
254 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
255 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
256 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
257 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
258 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
259 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
260 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
261 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
262 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
263 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
264 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
265 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
266 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
267 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
268 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
269 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
270 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
271 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
272 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
273 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
274 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
275 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
276 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
277 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
278 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
279 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
280 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
281 // CHECK1: cond.true:
282 // CHECK1-NEXT: br label [[COND_END:%.*]]
283 // CHECK1: cond.false:
284 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
285 // CHECK1-NEXT: br label [[COND_END]]
286 // CHECK1: cond.end:
287 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
288 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
289 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
290 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
291 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
292 // CHECK1: omp.inner.for.cond:
293 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
294 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]]
295 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
296 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
297 // CHECK1: omp.inner.for.body:
298 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
299 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
300 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
301 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP15]]
302 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
303 // CHECK1: omp.body.continue:
304 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
305 // CHECK1: omp.inner.for.inc:
306 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
307 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
308 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
309 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
310 // CHECK1: omp.inner.for.end:
311 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
312 // CHECK1: omp.loop.exit:
313 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
314 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
315 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
316 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
317 // CHECK1: .omp.final.then:
318 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
319 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
320 // CHECK1: .omp.final.done:
321 // CHECK1-NEXT: ret void
322 //
323 //
324 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47
325 // CHECK1-SAME: () #[[ATTR1]] {
326 // CHECK1-NEXT: entry:
327 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
328 // CHECK1-NEXT: ret void
329 //
330 //
331 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2
332 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
333 // CHECK1-NEXT: entry:
334 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
335 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
336 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
337 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
338 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
339 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
340 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
341 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
342 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
343 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
344 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
345 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
346 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
347 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
348 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
349 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
350 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
351 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
352 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
353 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
354 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
355 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
356 // CHECK1: cond.true:
357 // CHECK1-NEXT: br label [[COND_END:%.*]]
358 // CHECK1: cond.false:
359 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
360 // CHECK1-NEXT: br label [[COND_END]]
361 // CHECK1: cond.end:
362 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
363 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
364 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
365 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
366 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
367 // CHECK1: omp.inner.for.cond:
368 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20:![0-9]+]]
369 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]
370 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
371 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
372 // CHECK1: omp.inner.for.body:
373 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP20]]
374 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
375 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]
376 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
377 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP20]]
378 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP20]]
379 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP20]]
380 // CHECK1-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP20]]
381 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP20]]
382 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
383 // CHECK1: omp.inner.for.inc:
384 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]
385 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP20]]
386 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
387 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]
388 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]
389 // CHECK1: omp.inner.for.end:
390 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
391 // CHECK1: omp.loop.exit:
392 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
393 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
394 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
395 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
396 // CHECK1: .omp.final.then:
397 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
398 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
399 // CHECK1: .omp.final.done:
400 // CHECK1-NEXT: ret void
401 //
402 //
403 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3
404 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
405 // CHECK1-NEXT: entry:
406 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
407 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
408 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
409 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
410 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
411 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
412 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
413 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
414 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
415 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
416 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
417 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
418 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
419 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
420 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
421 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
422 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
423 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
424 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
425 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
426 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
427 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
428 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
429 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
430 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
431 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
432 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
433 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
434 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
435 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
436 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
437 // CHECK1: cond.true:
438 // CHECK1-NEXT: br label [[COND_END:%.*]]
439 // CHECK1: cond.false:
440 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
441 // CHECK1-NEXT: br label [[COND_END]]
442 // CHECK1: cond.end:
443 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
444 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
445 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
446 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
447 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
448 // CHECK1: omp.inner.for.cond:
449 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23:![0-9]+]]
450 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP23]]
451 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
452 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
453 // CHECK1: omp.inner.for.body:
454 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
455 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
456 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
457 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP23]]
458 // CHECK1-NEXT: call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP23]]
459 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
460 // CHECK1: omp.body.continue:
461 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
462 // CHECK1: omp.inner.for.inc:
463 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
464 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
465 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
466 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
467 // CHECK1: omp.inner.for.end:
468 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
469 // CHECK1: omp.loop.exit:
470 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
471 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
472 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
473 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
474 // CHECK1: .omp.final.then:
475 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
476 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
477 // CHECK1: .omp.final.done:
478 // CHECK1-NEXT: ret void
479 //
480 //
481 // CHECK1-LABEL: define {{[^@]+}}@main
482 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] {
483 // CHECK1-NEXT: entry:
484 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
485 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
486 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
487 // CHECK1-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
488 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
489 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
490 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
491 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
492 // CHECK1-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
493 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4
494 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
495 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
496 // CHECK1-NEXT: store i32 1, i32* [[TMP0]], align 4
497 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
498 // CHECK1-NEXT: store i32 0, i32* [[TMP1]], align 4
499 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
500 // CHECK1-NEXT: store i8** null, i8*** [[TMP2]], align 8
501 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
502 // CHECK1-NEXT: store i8** null, i8*** [[TMP3]], align 8
503 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
504 // CHECK1-NEXT: store i64* null, i64** [[TMP4]], align 8
505 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
506 // CHECK1-NEXT: store i64* null, i64** [[TMP5]], align 8
507 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
508 // CHECK1-NEXT: store i8** null, i8*** [[TMP6]], align 8
509 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
510 // CHECK1-NEXT: store i8** null, i8*** [[TMP7]], align 8
511 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
512 // CHECK1-NEXT: store i64 100, i64* [[TMP8]], align 8
513 // CHECK1-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
514 // CHECK1-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
515 // CHECK1-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
516 // CHECK1: omp_offload.failed:
517 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76() #[[ATTR2]]
518 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
519 // CHECK1: omp_offload.cont:
520 // CHECK1-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
521 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
522 // CHECK1-NEXT: store i32 1, i32* [[TMP11]], align 4
523 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
524 // CHECK1-NEXT: store i32 0, i32* [[TMP12]], align 4
525 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
526 // CHECK1-NEXT: store i8** null, i8*** [[TMP13]], align 8
527 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
528 // CHECK1-NEXT: store i8** null, i8*** [[TMP14]], align 8
529 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
530 // CHECK1-NEXT: store i64* null, i64** [[TMP15]], align 8
531 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
532 // CHECK1-NEXT: store i64* null, i64** [[TMP16]], align 8
533 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
534 // CHECK1-NEXT: store i8** null, i8*** [[TMP17]], align 8
535 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
536 // CHECK1-NEXT: store i8** null, i8*** [[TMP18]], align 8
537 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
538 // CHECK1-NEXT: store i64 100, i64* [[TMP19]], align 8
539 // CHECK1-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l84.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
540 // CHECK1-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
541 // CHECK1-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
542 // CHECK1: omp_offload.failed3:
543 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l84() #[[ATTR2]]
544 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT4]]
545 // CHECK1: omp_offload.cont4:
546 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* @Arg, align 4
547 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
548 // CHECK1-NEXT: store i32 [[TMP22]], i32* [[CONV]], align 4
549 // CHECK1-NEXT: [[TMP23:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
550 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
551 // CHECK1-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64*
552 // CHECK1-NEXT: store i64 [[TMP23]], i64* [[TMP25]], align 8
553 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
554 // CHECK1-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64*
555 // CHECK1-NEXT: store i64 [[TMP23]], i64* [[TMP27]], align 8
556 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
557 // CHECK1-NEXT: store i8* null, i8** [[TMP28]], align 8
558 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
559 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
560 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* @Arg, align 4
561 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP31]], 0
562 // CHECK1-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
563 // CHECK1-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
564 // CHECK1-NEXT: [[TMP32:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
565 // CHECK1-NEXT: [[TOBOOL5:%.*]] = trunc i8 [[TMP32]] to i1
566 // CHECK1-NEXT: [[TMP33:%.*]] = select i1 [[TOBOOL5]], i32 0, i32 1
567 // CHECK1-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
568 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 0
569 // CHECK1-NEXT: store i32 1, i32* [[TMP34]], align 4
570 // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 1
571 // CHECK1-NEXT: store i32 1, i32* [[TMP35]], align 4
572 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 2
573 // CHECK1-NEXT: store i8** [[TMP29]], i8*** [[TMP36]], align 8
574 // CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 3
575 // CHECK1-NEXT: store i8** [[TMP30]], i8*** [[TMP37]], align 8
576 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 4
577 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP38]], align 8
578 // CHECK1-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 5
579 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP39]], align 8
580 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 6
581 // CHECK1-NEXT: store i8** null, i8*** [[TMP40]], align 8
582 // CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 7
583 // CHECK1-NEXT: store i8** null, i8*** [[TMP41]], align 8
584 // CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 8
585 // CHECK1-NEXT: store i64 100, i64* [[TMP42]], align 8
586 // CHECK1-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 [[TMP33]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]])
587 // CHECK1-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
588 // CHECK1-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]
589 // CHECK1: omp_offload.failed8:
590 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92(i64 [[TMP23]]) #[[ATTR2]]
591 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT9]]
592 // CHECK1: omp_offload.cont9:
593 // CHECK1-NEXT: [[TMP45:%.*]] = load i32, i32* @Arg, align 4
594 // CHECK1-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP45]])
595 // CHECK1-NEXT: ret i32 [[CALL]]
596 //
597 //
598 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76
599 // CHECK1-SAME: () #[[ATTR1]] {
600 // CHECK1-NEXT: entry:
601 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
602 // CHECK1-NEXT: ret void
603 //
604 //
605 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4
606 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
607 // CHECK1-NEXT: entry:
608 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
609 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
610 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
611 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
612 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
613 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
614 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
615 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
616 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
617 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
618 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
619 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
620 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
621 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
622 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
623 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
624 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
625 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
626 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
627 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
628 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
629 // CHECK1: cond.true:
630 // CHECK1-NEXT: br label [[COND_END:%.*]]
631 // CHECK1: cond.false:
632 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
633 // CHECK1-NEXT: br label [[COND_END]]
634 // CHECK1: cond.end:
635 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
636 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
637 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
638 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
639 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
640 // CHECK1: omp.inner.for.cond:
641 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26:![0-9]+]]
642 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]]
643 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
644 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
645 // CHECK1: omp.inner.for.body:
646 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP26]]
647 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
648 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]]
649 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
650 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP26]]
651 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
652 // CHECK1: omp.inner.for.inc:
653 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]
654 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP26]]
655 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
656 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]
657 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]
658 // CHECK1: omp.inner.for.end:
659 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
660 // CHECK1: omp.loop.exit:
661 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
662 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
663 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
664 // CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
665 // CHECK1: .omp.final.then:
666 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
667 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
668 // CHECK1: .omp.final.done:
669 // CHECK1-NEXT: ret void
670 //
671 //
672 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..5
673 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
674 // CHECK1-NEXT: entry:
675 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
676 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
677 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
678 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
679 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
680 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
681 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
682 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
683 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
684 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
685 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
686 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
687 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
688 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
689 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
690 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
691 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
692 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
693 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
694 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
695 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
696 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
697 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
698 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
699 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
700 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
701 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
702 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
703 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
704 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
705 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
706 // CHECK1: cond.true:
707 // CHECK1-NEXT: br label [[COND_END:%.*]]
708 // CHECK1: cond.false:
709 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
710 // CHECK1-NEXT: br label [[COND_END]]
711 // CHECK1: cond.end:
712 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
713 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
714 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
715 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
716 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
717 // CHECK1: omp.inner.for.cond:
718 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29:![0-9]+]]
719 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP29]]
720 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
721 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
722 // CHECK1: omp.inner.for.body:
723 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
724 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
725 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
726 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP29]]
727 // CHECK1-NEXT: call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP29]]
728 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
729 // CHECK1: omp.body.continue:
730 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
731 // CHECK1: omp.inner.for.inc:
732 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
733 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
734 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
735 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]
736 // CHECK1: omp.inner.for.end:
737 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
738 // CHECK1: omp.loop.exit:
739 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
740 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
741 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
742 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
743 // CHECK1: .omp.final.then:
744 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
745 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
746 // CHECK1: .omp.final.done:
747 // CHECK1-NEXT: ret void
748 //
749 //
750 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l84
751 // CHECK1-SAME: () #[[ATTR1]] {
752 // CHECK1-NEXT: entry:
753 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
754 // CHECK1-NEXT: ret void
755 //
756 //
757 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6
758 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
759 // CHECK1-NEXT: entry:
760 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
761 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
762 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
763 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
764 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
765 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
766 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
767 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
768 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
769 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
770 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
771 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
772 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
773 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
774 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
775 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
776 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
777 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
778 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
779 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
780 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
781 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
782 // CHECK1: cond.true:
783 // CHECK1-NEXT: br label [[COND_END:%.*]]
784 // CHECK1: cond.false:
785 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
786 // CHECK1-NEXT: br label [[COND_END]]
787 // CHECK1: cond.end:
788 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
789 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
790 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
791 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
792 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
793 // CHECK1: omp.inner.for.cond:
794 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32:![0-9]+]]
795 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP32]]
796 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
797 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
798 // CHECK1: omp.inner.for.body:
799 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP32]]
800 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
801 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP32]]
802 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
803 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP32]]
804 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP32]]
805 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP32]]
806 // CHECK1-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP32]]
807 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP32]]
808 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
809 // CHECK1: omp.inner.for.inc:
810 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32]]
811 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP32]]
812 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
813 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32]]
814 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]]
815 // CHECK1: omp.inner.for.end:
816 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
817 // CHECK1: omp.loop.exit:
818 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
819 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
820 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
821 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
822 // CHECK1: .omp.final.then:
823 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
824 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
825 // CHECK1: .omp.final.done:
826 // CHECK1-NEXT: ret void
827 //
828 //
829 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7
830 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
831 // CHECK1-NEXT: entry:
832 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
833 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
834 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
835 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
836 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
837 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
838 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
839 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
840 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
841 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
842 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
843 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
844 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
845 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
846 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
847 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
848 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
849 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
850 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
851 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
852 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
853 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
854 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
855 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
856 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
857 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
858 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
859 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
860 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
861 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
862 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
863 // CHECK1: cond.true:
864 // CHECK1-NEXT: br label [[COND_END:%.*]]
865 // CHECK1: cond.false:
866 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
867 // CHECK1-NEXT: br label [[COND_END]]
868 // CHECK1: cond.end:
869 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
870 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
871 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
872 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
873 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
874 // CHECK1: omp.inner.for.cond:
875 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35:![0-9]+]]
876 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP35]]
877 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
878 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
879 // CHECK1: omp.inner.for.body:
880 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]
881 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
882 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
883 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP35]]
884 // CHECK1-NEXT: call void @_Z3fn5v(), !llvm.access.group [[ACC_GRP35]]
885 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
886 // CHECK1: omp.body.continue:
887 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
888 // CHECK1: omp.inner.for.inc:
889 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]
890 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
891 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]
892 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]
893 // CHECK1: omp.inner.for.end:
894 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
895 // CHECK1: omp.loop.exit:
896 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
897 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
898 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
899 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
900 // CHECK1: .omp.final.then:
901 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
902 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
903 // CHECK1: .omp.final.done:
904 // CHECK1-NEXT: ret void
905 //
906 //
907 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92
908 // CHECK1-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] {
909 // CHECK1-NEXT: entry:
910 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
911 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
912 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
913 // CHECK1-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
914 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
915 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 4
916 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
917 // CHECK1-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
918 // CHECK1-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
919 // CHECK1-NEXT: [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
920 // CHECK1-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1
921 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
922 // CHECK1-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8
923 // CHECK1-NEXT: store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
924 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
925 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i64 [[TMP2]])
926 // CHECK1-NEXT: ret void
927 //
928 //
929 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..8
930 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
931 // CHECK1-NEXT: entry:
932 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
933 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
934 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
935 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
936 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
937 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
938 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
939 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
940 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
941 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
942 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
943 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
944 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
945 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
946 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
947 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
948 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
949 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
950 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
951 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
952 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
953 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
954 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
955 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
956 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
957 // CHECK1: cond.true:
958 // CHECK1-NEXT: br label [[COND_END:%.*]]
959 // CHECK1: cond.false:
960 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
961 // CHECK1-NEXT: br label [[COND_END]]
962 // CHECK1: cond.end:
963 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
964 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
965 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
966 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
967 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
968 // CHECK1: omp.inner.for.cond:
969 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38:![0-9]+]]
970 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP38]]
971 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
972 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
973 // CHECK1: omp.inner.for.body:
974 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP38]]
975 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
976 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP38]]
977 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
978 // CHECK1-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 1, !llvm.access.group [[ACC_GRP38]]
979 // CHECK1-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
980 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
981 // CHECK1: omp_if.then:
982 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP38]]
983 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]]
984 // CHECK1: omp_if.else:
985 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP38]]
986 // CHECK1-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP38]]
987 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP38]]
988 // CHECK1-NEXT: call void @.omp_outlined..9(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP38]]
989 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP38]]
990 // CHECK1-NEXT: br label [[OMP_IF_END]]
991 // CHECK1: omp_if.end:
992 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
993 // CHECK1: omp.inner.for.inc:
994 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]]
995 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP38]]
996 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
997 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]]
998 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]]
999 // CHECK1: omp.inner.for.end:
1000 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1001 // CHECK1: omp.loop.exit:
1002 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1003 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1004 // CHECK1-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
1005 // CHECK1-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1006 // CHECK1: .omp.final.then:
1007 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
1008 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1009 // CHECK1: .omp.final.done:
1010 // CHECK1-NEXT: ret void
1011 //
1012 //
1013 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..9
1014 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1015 // CHECK1-NEXT: entry:
1016 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1017 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1018 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1019 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1020 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1021 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1022 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1023 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1024 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1025 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1026 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1027 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1028 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1029 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1030 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1031 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1032 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1033 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1034 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1035 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1036 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1037 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1038 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1039 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1040 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1041 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1042 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1043 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1044 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1045 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1046 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1047 // CHECK1: cond.true:
1048 // CHECK1-NEXT: br label [[COND_END:%.*]]
1049 // CHECK1: cond.false:
1050 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1051 // CHECK1-NEXT: br label [[COND_END]]
1052 // CHECK1: cond.end:
1053 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1054 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1055 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1056 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1057 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1058 // CHECK1: omp.inner.for.cond:
1059 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41:![0-9]+]]
1060 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP41]]
1061 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1062 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1063 // CHECK1: omp.inner.for.body:
1064 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41]]
1065 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1066 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1067 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP41]]
1068 // CHECK1-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP41]]
1069 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1070 // CHECK1: omp.body.continue:
1071 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1072 // CHECK1: omp.inner.for.inc:
1073 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41]]
1074 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1075 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41]]
1076 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP42:![0-9]+]]
1077 // CHECK1: omp.inner.for.end:
1078 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1079 // CHECK1: omp.loop.exit:
1080 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1081 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1082 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1083 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1084 // CHECK1: .omp.final.then:
1085 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
1086 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1087 // CHECK1: .omp.final.done:
1088 // CHECK1-NEXT: ret void
1089 //
1090 //
1091 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
1092 // CHECK1-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {
1093 // CHECK1-NEXT: entry:
1094 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
1095 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1096 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1097 // CHECK1-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
1098 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
1099 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
1100 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
1101 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
1102 // CHECK1-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
1103 // CHECK1-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
1104 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1105 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
1106 // CHECK1-NEXT: store i32 1, i32* [[TMP0]], align 4
1107 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
1108 // CHECK1-NEXT: store i32 0, i32* [[TMP1]], align 4
1109 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1110 // CHECK1-NEXT: store i8** null, i8*** [[TMP2]], align 8
1111 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1112 // CHECK1-NEXT: store i8** null, i8*** [[TMP3]], align 8
1113 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1114 // CHECK1-NEXT: store i64* null, i64** [[TMP4]], align 8
1115 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1116 // CHECK1-NEXT: store i64* null, i64** [[TMP5]], align 8
1117 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1118 // CHECK1-NEXT: store i8** null, i8*** [[TMP6]], align 8
1119 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1120 // CHECK1-NEXT: store i8** null, i8*** [[TMP7]], align 8
1121 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1122 // CHECK1-NEXT: store i64 100, i64* [[TMP8]], align 8
1123 // CHECK1-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l57.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1124 // CHECK1-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
1125 // CHECK1-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1126 // CHECK1: omp_offload.failed:
1127 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l57() #[[ATTR2]]
1128 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
1129 // CHECK1: omp_offload.cont:
1130 // CHECK1-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1131 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
1132 // CHECK1-NEXT: store i32 1, i32* [[TMP11]], align 4
1133 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
1134 // CHECK1-NEXT: store i32 0, i32* [[TMP12]], align 4
1135 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
1136 // CHECK1-NEXT: store i8** null, i8*** [[TMP13]], align 8
1137 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
1138 // CHECK1-NEXT: store i8** null, i8*** [[TMP14]], align 8
1139 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
1140 // CHECK1-NEXT: store i64* null, i64** [[TMP15]], align 8
1141 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
1142 // CHECK1-NEXT: store i64* null, i64** [[TMP16]], align 8
1143 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
1144 // CHECK1-NEXT: store i8** null, i8*** [[TMP17]], align 8
1145 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
1146 // CHECK1-NEXT: store i8** null, i8*** [[TMP18]], align 8
1147 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
1148 // CHECK1-NEXT: store i64 100, i64* [[TMP19]], align 8
1149 // CHECK1-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
1150 // CHECK1-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
1151 // CHECK1-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
1152 // CHECK1: omp_offload.failed3:
1153 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]]
1154 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT4]]
1155 // CHECK1: omp_offload.cont4:
1156 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
1157 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
1158 // CHECK1-NEXT: store i32 [[TMP22]], i32* [[CONV]], align 4
1159 // CHECK1-NEXT: [[TMP23:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
1160 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1161 // CHECK1-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64*
1162 // CHECK1-NEXT: store i64 [[TMP23]], i64* [[TMP25]], align 8
1163 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1164 // CHECK1-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64*
1165 // CHECK1-NEXT: store i64 [[TMP23]], i64* [[TMP27]], align 8
1166 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1167 // CHECK1-NEXT: store i8* null, i8** [[TMP28]], align 8
1168 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1169 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1170 // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
1171 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP31]], 0
1172 // CHECK1-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
1173 // CHECK1-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
1174 // CHECK1-NEXT: [[TMP32:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
1175 // CHECK1-NEXT: [[TOBOOL5:%.*]] = trunc i8 [[TMP32]] to i1
1176 // CHECK1-NEXT: [[TMP33:%.*]] = select i1 [[TOBOOL5]], i32 0, i32 1
1177 // CHECK1-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1178 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 0
1179 // CHECK1-NEXT: store i32 1, i32* [[TMP34]], align 4
1180 // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 1
1181 // CHECK1-NEXT: store i32 1, i32* [[TMP35]], align 4
1182 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 2
1183 // CHECK1-NEXT: store i8** [[TMP29]], i8*** [[TMP36]], align 8
1184 // CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 3
1185 // CHECK1-NEXT: store i8** [[TMP30]], i8*** [[TMP37]], align 8
1186 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 4
1187 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64** [[TMP38]], align 8
1188 // CHECK1-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 5
1189 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i64** [[TMP39]], align 8
1190 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 6
1191 // CHECK1-NEXT: store i8** null, i8*** [[TMP40]], align 8
1192 // CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 7
1193 // CHECK1-NEXT: store i8** null, i8*** [[TMP41]], align 8
1194 // CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 8
1195 // CHECK1-NEXT: store i64 100, i64* [[TMP42]], align 8
1196 // CHECK1-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 [[TMP33]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]])
1197 // CHECK1-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
1198 // CHECK1-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]
1199 // CHECK1: omp_offload.failed8:
1200 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67(i64 [[TMP23]]) #[[ATTR2]]
1201 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT9]]
1202 // CHECK1: omp_offload.cont9:
1203 // CHECK1-NEXT: ret i32 0
1204 //
1205 //
1206 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l57
1207 // CHECK1-SAME: () #[[ATTR1]] {
1208 // CHECK1-NEXT: entry:
1209 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
1210 // CHECK1-NEXT: ret void
1211 //
1212 //
1213 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10
1214 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1215 // CHECK1-NEXT: entry:
1216 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1217 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1218 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1219 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1220 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1221 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1222 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1223 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1224 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1225 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1226 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1227 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1228 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1229 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1230 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1231 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1232 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1233 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1234 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1235 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1236 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1237 // CHECK1: cond.true:
1238 // CHECK1-NEXT: br label [[COND_END:%.*]]
1239 // CHECK1: cond.false:
1240 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1241 // CHECK1-NEXT: br label [[COND_END]]
1242 // CHECK1: cond.end:
1243 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1244 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1245 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1246 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1247 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1248 // CHECK1: omp.inner.for.cond:
1249 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44:![0-9]+]]
1250 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP44]]
1251 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1252 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1253 // CHECK1: omp.inner.for.body:
1254 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP44]]
1255 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1256 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP44]]
1257 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1258 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP44]]
1259 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1260 // CHECK1: omp.inner.for.inc:
1261 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44]]
1262 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP44]]
1263 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
1264 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44]]
1265 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP45:![0-9]+]]
1266 // CHECK1: omp.inner.for.end:
1267 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1268 // CHECK1: omp.loop.exit:
1269 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1270 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1271 // CHECK1-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
1272 // CHECK1-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1273 // CHECK1: .omp.final.then:
1274 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
1275 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1276 // CHECK1: .omp.final.done:
1277 // CHECK1-NEXT: ret void
1278 //
1279 //
1280 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11
1281 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1282 // CHECK1-NEXT: entry:
1283 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1284 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1285 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1286 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1287 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1288 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1289 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1290 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1291 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1292 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1293 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1294 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1295 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1296 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1297 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1298 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1299 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1300 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1301 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1302 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1303 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1304 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1305 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1306 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1307 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1308 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1309 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1310 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1311 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1312 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1313 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1314 // CHECK1: cond.true:
1315 // CHECK1-NEXT: br label [[COND_END:%.*]]
1316 // CHECK1: cond.false:
1317 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1318 // CHECK1-NEXT: br label [[COND_END]]
1319 // CHECK1: cond.end:
1320 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1321 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1322 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1323 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1324 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1325 // CHECK1: omp.inner.for.cond:
1326 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47:![0-9]+]]
1327 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP47]]
1328 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1329 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1330 // CHECK1: omp.inner.for.body:
1331 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]
1332 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1333 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1334 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP47]]
1335 // CHECK1-NEXT: call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP47]]
1336 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1337 // CHECK1: omp.body.continue:
1338 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1339 // CHECK1: omp.inner.for.inc:
1340 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]
1341 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1342 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]
1343 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]]
1344 // CHECK1: omp.inner.for.end:
1345 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1346 // CHECK1: omp.loop.exit:
1347 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1348 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1349 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1350 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1351 // CHECK1: .omp.final.then:
1352 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
1353 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1354 // CHECK1: .omp.final.done:
1355 // CHECK1-NEXT: ret void
1356 //
1357 //
1358 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62
1359 // CHECK1-SAME: () #[[ATTR1]] {
1360 // CHECK1-NEXT: entry:
1361 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..12 to void (i32*, i32*, ...)*))
1362 // CHECK1-NEXT: ret void
1363 //
1364 //
1365 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..12
1366 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1367 // CHECK1-NEXT: entry:
1368 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1369 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1370 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1371 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1372 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1373 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1374 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1375 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1376 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1377 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
1378 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1379 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1380 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1381 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1382 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1383 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1384 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1385 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1386 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1387 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1388 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1389 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1390 // CHECK1: cond.true:
1391 // CHECK1-NEXT: br label [[COND_END:%.*]]
1392 // CHECK1: cond.false:
1393 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1394 // CHECK1-NEXT: br label [[COND_END]]
1395 // CHECK1: cond.end:
1396 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1397 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1398 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1399 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1400 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1401 // CHECK1: omp.inner.for.cond:
1402 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50:![0-9]+]]
1403 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP50]]
1404 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1405 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1406 // CHECK1: omp.inner.for.body:
1407 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP50]]
1408 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1409 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP50]]
1410 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1411 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP50]]
1412 // CHECK1-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP50]]
1413 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP50]]
1414 // CHECK1-NEXT: call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP50]]
1415 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP50]]
1416 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1417 // CHECK1: omp.inner.for.inc:
1418 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]
1419 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP50]]
1420 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1421 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]
1422 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP51:![0-9]+]]
1423 // CHECK1: omp.inner.for.end:
1424 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1425 // CHECK1: omp.loop.exit:
1426 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1427 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1428 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
1429 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1430 // CHECK1: .omp.final.then:
1431 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
1432 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1433 // CHECK1: .omp.final.done:
1434 // CHECK1-NEXT: ret void
1435 //
1436 //
1437 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..13
1438 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1439 // CHECK1-NEXT: entry:
1440 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1441 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1442 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1443 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1444 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1445 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1446 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1447 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1448 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1449 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1450 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1451 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1452 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1453 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1454 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1455 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1456 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1457 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1458 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1459 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1460 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1461 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1462 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1463 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1464 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1465 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1466 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1467 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1468 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1469 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1470 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1471 // CHECK1: cond.true:
1472 // CHECK1-NEXT: br label [[COND_END:%.*]]
1473 // CHECK1: cond.false:
1474 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1475 // CHECK1-NEXT: br label [[COND_END]]
1476 // CHECK1: cond.end:
1477 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1478 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1479 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1480 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1481 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1482 // CHECK1: omp.inner.for.cond:
1483 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53:![0-9]+]]
1484 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP53]]
1485 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1486 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1487 // CHECK1: omp.inner.for.body:
1488 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53]]
1489 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1490 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1491 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP53]]
1492 // CHECK1-NEXT: call void @_Z3fn2v(), !llvm.access.group [[ACC_GRP53]]
1493 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1494 // CHECK1: omp.body.continue:
1495 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1496 // CHECK1: omp.inner.for.inc:
1497 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53]]
1498 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1499 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53]]
1500 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP54:![0-9]+]]
1501 // CHECK1: omp.inner.for.end:
1502 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1503 // CHECK1: omp.loop.exit:
1504 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1505 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1506 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1507 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1508 // CHECK1: .omp.final.then:
1509 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
1510 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1511 // CHECK1: .omp.final.done:
1512 // CHECK1-NEXT: ret void
1513 //
1514 //
1515 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67
1516 // CHECK1-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] {
1517 // CHECK1-NEXT: entry:
1518 // CHECK1-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
1519 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
1520 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
1521 // CHECK1-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
1522 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
1523 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 4
1524 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
1525 // CHECK1-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
1526 // CHECK1-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
1527 // CHECK1-NEXT: [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
1528 // CHECK1-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1
1529 // CHECK1-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
1530 // CHECK1-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8
1531 // CHECK1-NEXT: store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
1532 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
1533 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i64 [[TMP2]])
1534 // CHECK1-NEXT: ret void
1535 //
1536 //
1537 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..14
1538 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
1539 // CHECK1-NEXT: entry:
1540 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1541 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1542 // CHECK1-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
1543 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1544 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1545 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1546 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1547 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1548 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1549 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1550 // CHECK1-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
1551 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1552 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1553 // CHECK1-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
1554 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
1555 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1556 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1557 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1558 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1559 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1560 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1561 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1562 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1563 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1564 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1565 // CHECK1: cond.true:
1566 // CHECK1-NEXT: br label [[COND_END:%.*]]
1567 // CHECK1: cond.false:
1568 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1569 // CHECK1-NEXT: br label [[COND_END]]
1570 // CHECK1: cond.end:
1571 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1572 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1573 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1574 // CHECK1-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1575 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1576 // CHECK1: omp.inner.for.cond:
1577 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP56:![0-9]+]]
1578 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP56]]
1579 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1580 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1581 // CHECK1: omp.inner.for.body:
1582 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP56]]
1583 // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1584 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP56]]
1585 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1586 // CHECK1-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 1, !llvm.access.group [[ACC_GRP56]]
1587 // CHECK1-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
1588 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
1589 // CHECK1: omp_if.then:
1590 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP56]]
1591 // CHECK1-NEXT: br label [[OMP_IF_END:%.*]]
1592 // CHECK1: omp_if.else:
1593 // CHECK1-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP56]]
1594 // CHECK1-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP56]]
1595 // CHECK1-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP56]]
1596 // CHECK1-NEXT: call void @.omp_outlined..15(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP56]]
1597 // CHECK1-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP56]]
1598 // CHECK1-NEXT: br label [[OMP_IF_END]]
1599 // CHECK1: omp_if.end:
1600 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1601 // CHECK1: omp.inner.for.inc:
1602 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP56]]
1603 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP56]]
1604 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
1605 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP56]]
1606 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP57:![0-9]+]]
1607 // CHECK1: omp.inner.for.end:
1608 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1609 // CHECK1: omp.loop.exit:
1610 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1611 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1612 // CHECK1-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
1613 // CHECK1-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1614 // CHECK1: .omp.final.then:
1615 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
1616 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1617 // CHECK1: .omp.final.done:
1618 // CHECK1-NEXT: ret void
1619 //
1620 //
1621 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..15
1622 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1623 // CHECK1-NEXT: entry:
1624 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1625 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1626 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1627 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1628 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1629 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1630 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1631 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1632 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1633 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1634 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1635 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1636 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1637 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1638 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1639 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1640 // CHECK1-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1641 // CHECK1-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1642 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1643 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1644 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1645 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1646 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1647 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1648 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1649 // CHECK1-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1650 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1651 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1652 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1653 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1654 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1655 // CHECK1: cond.true:
1656 // CHECK1-NEXT: br label [[COND_END:%.*]]
1657 // CHECK1: cond.false:
1658 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1659 // CHECK1-NEXT: br label [[COND_END]]
1660 // CHECK1: cond.end:
1661 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1662 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1663 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1664 // CHECK1-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1665 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1666 // CHECK1: omp.inner.for.cond:
1667 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59:![0-9]+]]
1668 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP59]]
1669 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1670 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1671 // CHECK1: omp.inner.for.body:
1672 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59]]
1673 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1674 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1675 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP59]]
1676 // CHECK1-NEXT: call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP59]]
1677 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1678 // CHECK1: omp.body.continue:
1679 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1680 // CHECK1: omp.inner.for.inc:
1681 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59]]
1682 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1683 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59]]
1684 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP60:![0-9]+]]
1685 // CHECK1: omp.inner.for.end:
1686 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1687 // CHECK1: omp.loop.exit:
1688 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1689 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1690 // CHECK1-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1691 // CHECK1-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1692 // CHECK1: .omp.final.then:
1693 // CHECK1-NEXT: store i32 100, i32* [[I]], align 4
1694 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
1695 // CHECK1: .omp.final.done:
1696 // CHECK1-NEXT: ret void
1697 //
1698 //
1699 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1700 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] {
1701 // CHECK1-NEXT: entry:
1702 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
1703 // CHECK1-NEXT: ret void
1704 //
1705 //
1706 // CHECK3-LABEL: define {{[^@]+}}@_Z9gtid_testv
1707 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
1708 // CHECK3-NEXT: entry:
1709 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1710 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1711 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1712 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
1713 // CHECK3-NEXT: store i32 1, i32* [[TMP0]], align 4
1714 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
1715 // CHECK3-NEXT: store i32 0, i32* [[TMP1]], align 4
1716 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1717 // CHECK3-NEXT: store i8** null, i8*** [[TMP2]], align 8
1718 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1719 // CHECK3-NEXT: store i8** null, i8*** [[TMP3]], align 8
1720 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1721 // CHECK3-NEXT: store i64* null, i64** [[TMP4]], align 8
1722 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1723 // CHECK3-NEXT: store i64* null, i64** [[TMP5]], align 8
1724 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1725 // CHECK3-NEXT: store i8** null, i8*** [[TMP6]], align 8
1726 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1727 // CHECK3-NEXT: store i8** null, i8*** [[TMP7]], align 8
1728 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1729 // CHECK3-NEXT: store i64 100, i64* [[TMP8]], align 8
1730 // CHECK3-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1731 // CHECK3-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
1732 // CHECK3-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1733 // CHECK3: omp_offload.failed:
1734 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43() #[[ATTR2:[0-9]+]]
1735 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
1736 // CHECK3: omp_offload.cont:
1737 // CHECK3-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1738 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
1739 // CHECK3-NEXT: store i32 1, i32* [[TMP11]], align 4
1740 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
1741 // CHECK3-NEXT: store i32 0, i32* [[TMP12]], align 4
1742 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
1743 // CHECK3-NEXT: store i8** null, i8*** [[TMP13]], align 8
1744 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
1745 // CHECK3-NEXT: store i8** null, i8*** [[TMP14]], align 8
1746 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
1747 // CHECK3-NEXT: store i64* null, i64** [[TMP15]], align 8
1748 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
1749 // CHECK3-NEXT: store i64* null, i64** [[TMP16]], align 8
1750 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
1751 // CHECK3-NEXT: store i8** null, i8*** [[TMP17]], align 8
1752 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
1753 // CHECK3-NEXT: store i8** null, i8*** [[TMP18]], align 8
1754 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
1755 // CHECK3-NEXT: store i64 100, i64* [[TMP19]], align 8
1756 // CHECK3-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
1757 // CHECK3-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
1758 // CHECK3-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
1759 // CHECK3: omp_offload.failed3:
1760 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47() #[[ATTR2]]
1761 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT4]]
1762 // CHECK3: omp_offload.cont4:
1763 // CHECK3-NEXT: ret void
1764 //
1765 //
1766 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43
1767 // CHECK3-SAME: () #[[ATTR1:[0-9]+]] {
1768 // CHECK3-NEXT: entry:
1769 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
1770 // CHECK3-NEXT: ret void
1771 //
1772 //
1773 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
1774 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1775 // CHECK3-NEXT: entry:
1776 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1777 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1778 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1779 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1780 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1781 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1782 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1783 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1784 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1785 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1786 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1787 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1788 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1789 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1790 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1791 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1792 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1793 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1794 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1795 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1796 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1797 // CHECK3: cond.true:
1798 // CHECK3-NEXT: br label [[COND_END:%.*]]
1799 // CHECK3: cond.false:
1800 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1801 // CHECK3-NEXT: br label [[COND_END]]
1802 // CHECK3: cond.end:
1803 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1804 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1805 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1806 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1807 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1808 // CHECK3: omp.inner.for.cond:
1809 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]]
1810 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]
1811 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1812 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1813 // CHECK3: omp.inner.for.body:
1814 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP11]]
1815 // CHECK3-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1816 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]
1817 // CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1818 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP11]]
1819 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1820 // CHECK3: omp.inner.for.inc:
1821 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
1822 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP11]]
1823 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
1824 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
1825 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
1826 // CHECK3: omp.inner.for.end:
1827 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1828 // CHECK3: omp.loop.exit:
1829 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1830 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1831 // CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
1832 // CHECK3-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1833 // CHECK3: .omp.final.then:
1834 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
1835 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
1836 // CHECK3: .omp.final.done:
1837 // CHECK3-NEXT: ret void
1838 //
1839 //
1840 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
1841 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1842 // CHECK3-NEXT: entry:
1843 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1844 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1845 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1846 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1847 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1848 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1849 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1850 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1851 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1852 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1853 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1854 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1855 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1856 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1857 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1858 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1859 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
1860 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1861 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1862 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1863 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1864 // CHECK3-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1865 // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1866 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1867 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1868 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1869 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
1870 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1871 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1872 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1873 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1874 // CHECK3: cond.true:
1875 // CHECK3-NEXT: br label [[COND_END:%.*]]
1876 // CHECK3: cond.false:
1877 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1878 // CHECK3-NEXT: br label [[COND_END]]
1879 // CHECK3: cond.end:
1880 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1881 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1882 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1883 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
1884 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1885 // CHECK3: omp.inner.for.cond:
1886 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
1887 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]]
1888 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1889 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1890 // CHECK3: omp.inner.for.body:
1891 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
1892 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1893 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1894 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP15]]
1895 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1896 // CHECK3: omp.body.continue:
1897 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1898 // CHECK3: omp.inner.for.inc:
1899 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
1900 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1901 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
1902 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
1903 // CHECK3: omp.inner.for.end:
1904 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1905 // CHECK3: omp.loop.exit:
1906 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
1907 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1908 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1909 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1910 // CHECK3: .omp.final.then:
1911 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
1912 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
1913 // CHECK3: .omp.final.done:
1914 // CHECK3-NEXT: ret void
1915 //
1916 //
1917 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47
1918 // CHECK3-SAME: () #[[ATTR1]] {
1919 // CHECK3-NEXT: entry:
1920 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
1921 // CHECK3-NEXT: ret void
1922 //
1923 //
1924 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2
1925 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1926 // CHECK3-NEXT: entry:
1927 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1928 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1929 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1930 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1931 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1932 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1933 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1934 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1935 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1936 // CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
1937 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1938 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1939 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1940 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
1941 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1942 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1943 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1944 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
1945 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1946 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1947 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1948 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1949 // CHECK3: cond.true:
1950 // CHECK3-NEXT: br label [[COND_END:%.*]]
1951 // CHECK3: cond.false:
1952 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1953 // CHECK3-NEXT: br label [[COND_END]]
1954 // CHECK3: cond.end:
1955 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1956 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1957 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1958 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
1959 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1960 // CHECK3: omp.inner.for.cond:
1961 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20:![0-9]+]]
1962 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]
1963 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1964 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1965 // CHECK3: omp.inner.for.body:
1966 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP20]]
1967 // CHECK3-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1968 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]
1969 // CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1970 // CHECK3-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP20]]
1971 // CHECK3-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP20]]
1972 // CHECK3-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP20]]
1973 // CHECK3-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP20]]
1974 // CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP20]]
1975 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1976 // CHECK3: omp.inner.for.inc:
1977 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]
1978 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP20]]
1979 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1980 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]
1981 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]
1982 // CHECK3: omp.inner.for.end:
1983 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1984 // CHECK3: omp.loop.exit:
1985 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
1986 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1987 // CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
1988 // CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1989 // CHECK3: .omp.final.then:
1990 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
1991 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
1992 // CHECK3: .omp.final.done:
1993 // CHECK3-NEXT: ret void
1994 //
1995 //
1996 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3
1997 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1998 // CHECK3-NEXT: entry:
1999 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2000 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2001 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2002 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2003 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2004 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2005 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2006 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2007 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2008 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2009 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2010 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2011 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2012 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2013 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2014 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2015 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
2016 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2017 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2018 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2019 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2020 // CHECK3-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2021 // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2022 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2023 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2024 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2025 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2026 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2027 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2028 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2029 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2030 // CHECK3: cond.true:
2031 // CHECK3-NEXT: br label [[COND_END:%.*]]
2032 // CHECK3: cond.false:
2033 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2034 // CHECK3-NEXT: br label [[COND_END]]
2035 // CHECK3: cond.end:
2036 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2037 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2038 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2039 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2040 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2041 // CHECK3: omp.inner.for.cond:
2042 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23:![0-9]+]]
2043 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP23]]
2044 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2045 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2046 // CHECK3: omp.inner.for.body:
2047 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
2048 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2049 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2050 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP23]]
2051 // CHECK3-NEXT: call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP23]]
2052 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2053 // CHECK3: omp.body.continue:
2054 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2055 // CHECK3: omp.inner.for.inc:
2056 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
2057 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2058 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
2059 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
2060 // CHECK3: omp.inner.for.end:
2061 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2062 // CHECK3: omp.loop.exit:
2063 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2064 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2065 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
2066 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2067 // CHECK3: .omp.final.then:
2068 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
2069 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
2070 // CHECK3: .omp.final.done:
2071 // CHECK3-NEXT: ret void
2072 //
2073 //
2074 // CHECK3-LABEL: define {{[^@]+}}@main
2075 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] {
2076 // CHECK3-NEXT: entry:
2077 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2078 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2079 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2080 // CHECK3-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
2081 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
2082 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
2083 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
2084 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
2085 // CHECK3-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
2086 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4
2087 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
2088 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
2089 // CHECK3-NEXT: store i32 1, i32* [[TMP0]], align 4
2090 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
2091 // CHECK3-NEXT: store i32 0, i32* [[TMP1]], align 4
2092 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
2093 // CHECK3-NEXT: store i8** null, i8*** [[TMP2]], align 8
2094 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
2095 // CHECK3-NEXT: store i8** null, i8*** [[TMP3]], align 8
2096 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
2097 // CHECK3-NEXT: store i64* null, i64** [[TMP4]], align 8
2098 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
2099 // CHECK3-NEXT: store i64* null, i64** [[TMP5]], align 8
2100 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
2101 // CHECK3-NEXT: store i8** null, i8*** [[TMP6]], align 8
2102 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
2103 // CHECK3-NEXT: store i8** null, i8*** [[TMP7]], align 8
2104 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
2105 // CHECK3-NEXT: store i64 100, i64* [[TMP8]], align 8
2106 // CHECK3-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
2107 // CHECK3-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
2108 // CHECK3-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2109 // CHECK3: omp_offload.failed:
2110 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76() #[[ATTR2]]
2111 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
2112 // CHECK3: omp_offload.cont:
2113 // CHECK3-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2114 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
2115 // CHECK3-NEXT: store i32 1, i32* [[TMP11]], align 4
2116 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
2117 // CHECK3-NEXT: store i32 0, i32* [[TMP12]], align 4
2118 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
2119 // CHECK3-NEXT: store i8** null, i8*** [[TMP13]], align 8
2120 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
2121 // CHECK3-NEXT: store i8** null, i8*** [[TMP14]], align 8
2122 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
2123 // CHECK3-NEXT: store i64* null, i64** [[TMP15]], align 8
2124 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
2125 // CHECK3-NEXT: store i64* null, i64** [[TMP16]], align 8
2126 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
2127 // CHECK3-NEXT: store i8** null, i8*** [[TMP17]], align 8
2128 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
2129 // CHECK3-NEXT: store i8** null, i8*** [[TMP18]], align 8
2130 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
2131 // CHECK3-NEXT: store i64 100, i64* [[TMP19]], align 8
2132 // CHECK3-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l84.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
2133 // CHECK3-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
2134 // CHECK3-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
2135 // CHECK3: omp_offload.failed3:
2136 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l84() #[[ATTR2]]
2137 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT4]]
2138 // CHECK3: omp_offload.cont4:
2139 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* @Arg, align 4
2140 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
2141 // CHECK3-NEXT: store i32 [[TMP22]], i32* [[CONV]], align 4
2142 // CHECK3-NEXT: [[TMP23:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
2143 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2144 // CHECK3-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64*
2145 // CHECK3-NEXT: store i64 [[TMP23]], i64* [[TMP25]], align 8
2146 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2147 // CHECK3-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64*
2148 // CHECK3-NEXT: store i64 [[TMP23]], i64* [[TMP27]], align 8
2149 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
2150 // CHECK3-NEXT: store i8* null, i8** [[TMP28]], align 8
2151 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2152 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2153 // CHECK3-NEXT: [[TMP31:%.*]] = load i32, i32* @Arg, align 4
2154 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP31]], 0
2155 // CHECK3-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
2156 // CHECK3-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
2157 // CHECK3-NEXT: [[TMP32:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
2158 // CHECK3-NEXT: [[TOBOOL5:%.*]] = trunc i8 [[TMP32]] to i1
2159 // CHECK3-NEXT: [[TMP33:%.*]] = select i1 [[TOBOOL5]], i32 0, i32 1
2160 // CHECK3-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2161 // CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 0
2162 // CHECK3-NEXT: store i32 1, i32* [[TMP34]], align 4
2163 // CHECK3-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 1
2164 // CHECK3-NEXT: store i32 1, i32* [[TMP35]], align 4
2165 // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 2
2166 // CHECK3-NEXT: store i8** [[TMP29]], i8*** [[TMP36]], align 8
2167 // CHECK3-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 3
2168 // CHECK3-NEXT: store i8** [[TMP30]], i8*** [[TMP37]], align 8
2169 // CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 4
2170 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP38]], align 8
2171 // CHECK3-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 5
2172 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP39]], align 8
2173 // CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 6
2174 // CHECK3-NEXT: store i8** null, i8*** [[TMP40]], align 8
2175 // CHECK3-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 7
2176 // CHECK3-NEXT: store i8** null, i8*** [[TMP41]], align 8
2177 // CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 8
2178 // CHECK3-NEXT: store i64 100, i64* [[TMP42]], align 8
2179 // CHECK3-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 [[TMP33]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]])
2180 // CHECK3-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
2181 // CHECK3-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]
2182 // CHECK3: omp_offload.failed8:
2183 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92(i64 [[TMP23]]) #[[ATTR2]]
2184 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT9]]
2185 // CHECK3: omp_offload.cont9:
2186 // CHECK3-NEXT: [[TMP45:%.*]] = load i32, i32* @Arg, align 4
2187 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP45]])
2188 // CHECK3-NEXT: ret i32 [[CALL]]
2189 //
2190 //
2191 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76
2192 // CHECK3-SAME: () #[[ATTR1]] {
2193 // CHECK3-NEXT: entry:
2194 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
2195 // CHECK3-NEXT: ret void
2196 //
2197 //
2198 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..4
2199 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
2200 // CHECK3-NEXT: entry:
2201 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2202 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2203 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2204 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2205 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2206 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2207 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2208 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2209 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2210 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2211 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2212 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2213 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2214 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2215 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2216 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2217 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2218 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2219 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2220 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2221 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2222 // CHECK3: cond.true:
2223 // CHECK3-NEXT: br label [[COND_END:%.*]]
2224 // CHECK3: cond.false:
2225 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2226 // CHECK3-NEXT: br label [[COND_END]]
2227 // CHECK3: cond.end:
2228 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2229 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2230 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2231 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2232 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2233 // CHECK3: omp.inner.for.cond:
2234 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26:![0-9]+]]
2235 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]]
2236 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2237 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2238 // CHECK3: omp.inner.for.body:
2239 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP26]]
2240 // CHECK3-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2241 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]]
2242 // CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2243 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP26]]
2244 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2245 // CHECK3: omp.inner.for.inc:
2246 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]
2247 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP26]]
2248 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
2249 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]
2250 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]
2251 // CHECK3: omp.inner.for.end:
2252 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2253 // CHECK3: omp.loop.exit:
2254 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2255 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2256 // CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
2257 // CHECK3-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2258 // CHECK3: .omp.final.then:
2259 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
2260 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
2261 // CHECK3: .omp.final.done:
2262 // CHECK3-NEXT: ret void
2263 //
2264 //
2265 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..5
2266 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
2267 // CHECK3-NEXT: entry:
2268 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2269 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2270 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2271 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2272 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2273 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2274 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2275 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2276 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2277 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2278 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2279 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2280 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2281 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2282 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2283 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2284 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
2285 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2286 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2287 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2288 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2289 // CHECK3-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2290 // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2291 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2292 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2293 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2294 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2295 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2296 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2297 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2298 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2299 // CHECK3: cond.true:
2300 // CHECK3-NEXT: br label [[COND_END:%.*]]
2301 // CHECK3: cond.false:
2302 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2303 // CHECK3-NEXT: br label [[COND_END]]
2304 // CHECK3: cond.end:
2305 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2306 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2307 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2308 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2309 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2310 // CHECK3: omp.inner.for.cond:
2311 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29:![0-9]+]]
2312 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP29]]
2313 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2314 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2315 // CHECK3: omp.inner.for.body:
2316 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
2317 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2318 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2319 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP29]]
2320 // CHECK3-NEXT: call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP29]]
2321 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2322 // CHECK3: omp.body.continue:
2323 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2324 // CHECK3: omp.inner.for.inc:
2325 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
2326 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2327 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
2328 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]
2329 // CHECK3: omp.inner.for.end:
2330 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2331 // CHECK3: omp.loop.exit:
2332 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2333 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2334 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
2335 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2336 // CHECK3: .omp.final.then:
2337 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
2338 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
2339 // CHECK3: .omp.final.done:
2340 // CHECK3-NEXT: ret void
2341 //
2342 //
2343 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l84
2344 // CHECK3-SAME: () #[[ATTR1]] {
2345 // CHECK3-NEXT: entry:
2346 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
2347 // CHECK3-NEXT: ret void
2348 //
2349 //
2350 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..6
2351 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
2352 // CHECK3-NEXT: entry:
2353 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2354 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2355 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2356 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2357 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2358 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2359 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2360 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2361 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2362 // CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
2363 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2364 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2365 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2366 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2367 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2368 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2369 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2370 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2371 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2372 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2373 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2374 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2375 // CHECK3: cond.true:
2376 // CHECK3-NEXT: br label [[COND_END:%.*]]
2377 // CHECK3: cond.false:
2378 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2379 // CHECK3-NEXT: br label [[COND_END]]
2380 // CHECK3: cond.end:
2381 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2382 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2383 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2384 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2385 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2386 // CHECK3: omp.inner.for.cond:
2387 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2388 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2389 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2390 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2391 // CHECK3: omp.inner.for.body:
2392 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2393 // CHECK3-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2394 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2395 // CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2396 // CHECK3-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
2397 // CHECK3-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2398 // CHECK3-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
2399 // CHECK3-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
2400 // CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
2401 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2402 // CHECK3: omp.inner.for.inc:
2403 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2404 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2405 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2406 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2407 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]]
2408 // CHECK3: omp.inner.for.end:
2409 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2410 // CHECK3: omp.loop.exit:
2411 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2412 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2413 // CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
2414 // CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2415 // CHECK3: .omp.final.then:
2416 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
2417 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
2418 // CHECK3: .omp.final.done:
2419 // CHECK3-NEXT: ret void
2420 //
2421 //
2422 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..7
2423 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
2424 // CHECK3-NEXT: entry:
2425 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2426 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2427 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2428 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2429 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2430 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2431 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2432 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2433 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2434 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2435 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2436 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2437 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2438 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2439 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2440 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2441 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
2442 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2443 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2444 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2445 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2446 // CHECK3-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2447 // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2448 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2449 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2450 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2451 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
2452 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2453 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2454 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2455 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2456 // CHECK3: cond.true:
2457 // CHECK3-NEXT: br label [[COND_END:%.*]]
2458 // CHECK3: cond.false:
2459 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2460 // CHECK3-NEXT: br label [[COND_END]]
2461 // CHECK3: cond.end:
2462 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2463 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2464 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2465 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
2466 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2467 // CHECK3: omp.inner.for.cond:
2468 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2469 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2470 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2471 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2472 // CHECK3: omp.inner.for.body:
2473 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2474 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2475 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2476 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2477 // CHECK3-NEXT: call void @_Z3fn5v()
2478 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2479 // CHECK3: omp.body.continue:
2480 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2481 // CHECK3: omp.inner.for.inc:
2482 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2483 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2484 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
2485 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]
2486 // CHECK3: omp.inner.for.end:
2487 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2488 // CHECK3: omp.loop.exit:
2489 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
2490 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2491 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
2492 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2493 // CHECK3: .omp.final.then:
2494 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
2495 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
2496 // CHECK3: .omp.final.done:
2497 // CHECK3-NEXT: ret void
2498 //
2499 //
2500 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92
2501 // CHECK3-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] {
2502 // CHECK3-NEXT: entry:
2503 // CHECK3-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
2504 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
2505 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
2506 // CHECK3-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
2507 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
2508 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 4
2509 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
2510 // CHECK3-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
2511 // CHECK3-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
2512 // CHECK3-NEXT: [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
2513 // CHECK3-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1
2514 // CHECK3-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
2515 // CHECK3-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8
2516 // CHECK3-NEXT: store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
2517 // CHECK3-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
2518 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i64 [[TMP2]])
2519 // CHECK3-NEXT: ret void
2520 //
2521 //
2522 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..8
2523 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
2524 // CHECK3-NEXT: entry:
2525 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2526 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2527 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2528 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2529 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2530 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2531 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2532 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2533 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2534 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2535 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
2536 // CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
2537 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED11:%.*]] = alloca i64, align 8
2538 // CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR17:%.*]] = alloca i32, align 4
2539 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2540 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2541 // CHECK3-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2542 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
2543 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2544 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
2545 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2546 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2547 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2548 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
2549 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2550 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2551 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2552 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2553 // CHECK3: cond.true:
2554 // CHECK3-NEXT: br label [[COND_END:%.*]]
2555 // CHECK3: cond.false:
2556 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2557 // CHECK3-NEXT: br label [[COND_END]]
2558 // CHECK3: cond.end:
2559 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2560 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2561 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2562 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
2563 // CHECK3-NEXT: [[TMP5:%.*]] = load i8, i8* [[CONV]], align 1
2564 // CHECK3-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP5]] to i1
2565 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE6:%.*]]
2566 // CHECK3: omp_if.then:
2567 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2568 // CHECK3: omp.inner.for.cond:
2569 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35:![0-9]+]]
2570 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP35]]
2571 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2572 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2573 // CHECK3: omp.inner.for.body:
2574 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP35]]
2575 // CHECK3-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
2576 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP35]]
2577 // CHECK3-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
2578 // CHECK3-NEXT: [[TMP12:%.*]] = load i8, i8* [[CONV]], align 1, !llvm.access.group [[ACC_GRP35]]
2579 // CHECK3-NEXT: [[TOBOOL2:%.*]] = trunc i8 [[TMP12]] to i1
2580 // CHECK3-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
2581 // CHECK3-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL2]] to i8
2582 // CHECK3-NEXT: store i8 [[FROMBOOL]], i8* [[CONV3]], align 1, !llvm.access.group [[ACC_GRP35]]
2583 // CHECK3-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group [[ACC_GRP35]]
2584 // CHECK3-NEXT: [[TMP14:%.*]] = load i8, i8* [[CONV]], align 1, !llvm.access.group [[ACC_GRP35]]
2585 // CHECK3-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1
2586 // CHECK3-NEXT: br i1 [[TOBOOL4]], label [[OMP_IF_THEN5:%.*]], label [[OMP_IF_ELSE:%.*]]
2587 // CHECK3: omp_if.then5:
2588 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], i64 [[TMP13]]), !llvm.access.group [[ACC_GRP35]]
2589 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]]
2590 // CHECK3: omp_if.else:
2591 // CHECK3-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP35]]
2592 // CHECK3-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP35]]
2593 // CHECK3-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP35]]
2594 // CHECK3-NEXT: call void @.omp_outlined..9(i32* [[TMP15]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]], i64 [[TMP13]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP35]]
2595 // CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP35]]
2596 // CHECK3-NEXT: br label [[OMP_IF_END]]
2597 // CHECK3: omp_if.end:
2598 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2599 // CHECK3: omp.inner.for.inc:
2600 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]
2601 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP35]]
2602 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
2603 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]
2604 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]
2605 // CHECK3: omp.inner.for.end:
2606 // CHECK3-NEXT: br label [[OMP_IF_END22:%.*]]
2607 // CHECK3: omp_if.else6:
2608 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
2609 // CHECK3: omp.inner.for.cond7:
2610 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2611 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2612 // CHECK3-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
2613 // CHECK3-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END21:%.*]]
2614 // CHECK3: omp.inner.for.body9:
2615 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2616 // CHECK3-NEXT: [[TMP21:%.*]] = zext i32 [[TMP20]] to i64
2617 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2618 // CHECK3-NEXT: [[TMP23:%.*]] = zext i32 [[TMP22]] to i64
2619 // CHECK3-NEXT: [[TMP24:%.*]] = load i8, i8* [[CONV]], align 1
2620 // CHECK3-NEXT: [[TOBOOL10:%.*]] = trunc i8 [[TMP24]] to i1
2621 // CHECK3-NEXT: [[CONV12:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED11]] to i8*
2622 // CHECK3-NEXT: [[FROMBOOL13:%.*]] = zext i1 [[TOBOOL10]] to i8
2623 // CHECK3-NEXT: store i8 [[FROMBOOL13]], i8* [[CONV12]], align 1
2624 // CHECK3-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED11]], align 8
2625 // CHECK3-NEXT: [[TMP26:%.*]] = load i8, i8* [[CONV]], align 1
2626 // CHECK3-NEXT: [[TOBOOL14:%.*]] = trunc i8 [[TMP26]] to i1
2627 // CHECK3-NEXT: br i1 [[TOBOOL14]], label [[OMP_IF_THEN15:%.*]], label [[OMP_IF_ELSE16:%.*]]
2628 // CHECK3: omp_if.then15:
2629 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i64 [[TMP21]], i64 [[TMP23]], i64 [[TMP25]])
2630 // CHECK3-NEXT: br label [[OMP_IF_END18:%.*]]
2631 // CHECK3: omp_if.else16:
2632 // CHECK3-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
2633 // CHECK3-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2634 // CHECK3-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR17]], align 4
2635 // CHECK3-NEXT: call void @.omp_outlined..10(i32* [[TMP27]], i32* [[DOTBOUND_ZERO_ADDR17]], i64 [[TMP21]], i64 [[TMP23]], i64 [[TMP25]]) #[[ATTR2]]
2636 // CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
2637 // CHECK3-NEXT: br label [[OMP_IF_END18]]
2638 // CHECK3: omp_if.end18:
2639 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC19:%.*]]
2640 // CHECK3: omp.inner.for.inc19:
2641 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2642 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2643 // CHECK3-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
2644 // CHECK3-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_IV]], align 4
2645 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP38:![0-9]+]]
2646 // CHECK3: omp.inner.for.end21:
2647 // CHECK3-NEXT: br label [[OMP_IF_END22]]
2648 // CHECK3: omp_if.end22:
2649 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2650 // CHECK3: omp.loop.exit:
2651 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
2652 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2653 // CHECK3-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0
2654 // CHECK3-NEXT: br i1 [[TMP31]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2655 // CHECK3: .omp.final.then:
2656 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
2657 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
2658 // CHECK3: .omp.final.done:
2659 // CHECK3-NEXT: ret void
2660 //
2661 //
2662 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..9
2663 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
2664 // CHECK3-NEXT: entry:
2665 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2666 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2667 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2668 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2669 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2670 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2671 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2672 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2673 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2674 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2675 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2676 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2677 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2678 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2679 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2680 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2681 // CHECK3-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2682 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
2683 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2684 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
2685 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2686 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP0]] to i32
2687 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2688 // CHECK3-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
2689 // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
2690 // CHECK3-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
2691 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2692 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2693 // CHECK3-NEXT: [[TMP2:%.*]] = load i8, i8* [[CONV]], align 1
2694 // CHECK3-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
2695 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
2696 // CHECK3: omp_if.then:
2697 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2698 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2699 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2700 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2701 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 99
2702 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2703 // CHECK3: cond.true:
2704 // CHECK3-NEXT: br label [[COND_END:%.*]]
2705 // CHECK3: cond.false:
2706 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2707 // CHECK3-NEXT: br label [[COND_END]]
2708 // CHECK3: cond.end:
2709 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
2710 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2711 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2712 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
2713 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2714 // CHECK3: omp.inner.for.cond:
2715 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39:![0-9]+]]
2716 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP39]]
2717 // CHECK3-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2718 // CHECK3-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2719 // CHECK3: omp.inner.for.body:
2720 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
2721 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2722 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2723 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP39]]
2724 // CHECK3-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP39]]
2725 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2726 // CHECK3: omp.body.continue:
2727 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2728 // CHECK3: omp.inner.for.inc:
2729 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
2730 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
2731 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
2732 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]]
2733 // CHECK3: omp.inner.for.end:
2734 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]]
2735 // CHECK3: omp_if.else:
2736 // CHECK3-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2737 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
2738 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2739 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2740 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99
2741 // CHECK3-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
2742 // CHECK3: cond.true6:
2743 // CHECK3-NEXT: br label [[COND_END8:%.*]]
2744 // CHECK3: cond.false7:
2745 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2746 // CHECK3-NEXT: br label [[COND_END8]]
2747 // CHECK3: cond.end8:
2748 // CHECK3-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP15]], [[COND_FALSE7]] ]
2749 // CHECK3-NEXT: store i32 [[COND9]], i32* [[DOTOMP_UB]], align 4
2750 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2751 // CHECK3-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
2752 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND10:%.*]]
2753 // CHECK3: omp.inner.for.cond10:
2754 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2755 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2756 // CHECK3-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
2757 // CHECK3-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY12:%.*]], label [[OMP_INNER_FOR_END18:%.*]]
2758 // CHECK3: omp.inner.for.body12:
2759 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2760 // CHECK3-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP19]], 1
2761 // CHECK3-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]
2762 // CHECK3-NEXT: store i32 [[ADD14]], i32* [[I]], align 4
2763 // CHECK3-NEXT: call void @_Z3fn6v()
2764 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
2765 // CHECK3: omp.body.continue15:
2766 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
2767 // CHECK3: omp.inner.for.inc16:
2768 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2769 // CHECK3-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1
2770 // CHECK3-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
2771 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP42:![0-9]+]]
2772 // CHECK3: omp.inner.for.end18:
2773 // CHECK3-NEXT: br label [[OMP_IF_END]]
2774 // CHECK3: omp_if.end:
2775 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2776 // CHECK3: omp.loop.exit:
2777 // CHECK3-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2778 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
2779 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
2780 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2781 // CHECK3-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
2782 // CHECK3-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2783 // CHECK3: .omp.final.then:
2784 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
2785 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
2786 // CHECK3: .omp.final.done:
2787 // CHECK3-NEXT: ret void
2788 //
2789 //
2790 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..10
2791 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
2792 // CHECK3-NEXT: entry:
2793 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2794 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2795 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2796 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2797 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2798 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2799 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2800 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2801 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2802 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2803 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2804 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2805 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2806 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2807 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2808 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2809 // CHECK3-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
2810 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
2811 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2812 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
2813 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2814 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP0]] to i32
2815 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2816 // CHECK3-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
2817 // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
2818 // CHECK3-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
2819 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2820 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2821 // CHECK3-NEXT: [[TMP2:%.*]] = load i8, i8* [[CONV]], align 1
2822 // CHECK3-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
2823 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
2824 // CHECK3: omp_if.then:
2825 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2826 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2827 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2828 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2829 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 99
2830 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2831 // CHECK3: cond.true:
2832 // CHECK3-NEXT: br label [[COND_END:%.*]]
2833 // CHECK3: cond.false:
2834 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2835 // CHECK3-NEXT: br label [[COND_END]]
2836 // CHECK3: cond.end:
2837 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
2838 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2839 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2840 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
2841 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2842 // CHECK3: omp.inner.for.cond:
2843 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43:![0-9]+]]
2844 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP43]]
2845 // CHECK3-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2846 // CHECK3-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2847 // CHECK3: omp.inner.for.body:
2848 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43]]
2849 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2850 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2851 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP43]]
2852 // CHECK3-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP43]]
2853 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2854 // CHECK3: omp.body.continue:
2855 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2856 // CHECK3: omp.inner.for.inc:
2857 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43]]
2858 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
2859 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43]]
2860 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP44:![0-9]+]]
2861 // CHECK3: omp.inner.for.end:
2862 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]]
2863 // CHECK3: omp_if.else:
2864 // CHECK3-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2865 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
2866 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2867 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2868 // CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99
2869 // CHECK3-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
2870 // CHECK3: cond.true6:
2871 // CHECK3-NEXT: br label [[COND_END8:%.*]]
2872 // CHECK3: cond.false7:
2873 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2874 // CHECK3-NEXT: br label [[COND_END8]]
2875 // CHECK3: cond.end8:
2876 // CHECK3-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP15]], [[COND_FALSE7]] ]
2877 // CHECK3-NEXT: store i32 [[COND9]], i32* [[DOTOMP_UB]], align 4
2878 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2879 // CHECK3-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
2880 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND10:%.*]]
2881 // CHECK3: omp.inner.for.cond10:
2882 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2883 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2884 // CHECK3-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
2885 // CHECK3-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY12:%.*]], label [[OMP_INNER_FOR_END18:%.*]]
2886 // CHECK3: omp.inner.for.body12:
2887 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2888 // CHECK3-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP19]], 1
2889 // CHECK3-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]
2890 // CHECK3-NEXT: store i32 [[ADD14]], i32* [[I]], align 4
2891 // CHECK3-NEXT: call void @_Z3fn6v()
2892 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
2893 // CHECK3: omp.body.continue15:
2894 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
2895 // CHECK3: omp.inner.for.inc16:
2896 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2897 // CHECK3-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1
2898 // CHECK3-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
2899 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP46:![0-9]+]]
2900 // CHECK3: omp.inner.for.end18:
2901 // CHECK3-NEXT: br label [[OMP_IF_END]]
2902 // CHECK3: omp_if.end:
2903 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2904 // CHECK3: omp.loop.exit:
2905 // CHECK3-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2906 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
2907 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
2908 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2909 // CHECK3-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
2910 // CHECK3-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2911 // CHECK3: .omp.final.then:
2912 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
2913 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
2914 // CHECK3: .omp.final.done:
2915 // CHECK3-NEXT: ret void
2916 //
2917 //
2918 // CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
2919 // CHECK3-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {
2920 // CHECK3-NEXT: entry:
2921 // CHECK3-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
2922 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2923 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2924 // CHECK3-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
2925 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
2926 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
2927 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
2928 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
2929 // CHECK3-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
2930 // CHECK3-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
2931 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
2932 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
2933 // CHECK3-NEXT: store i32 1, i32* [[TMP0]], align 4
2934 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
2935 // CHECK3-NEXT: store i32 0, i32* [[TMP1]], align 4
2936 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
2937 // CHECK3-NEXT: store i8** null, i8*** [[TMP2]], align 8
2938 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
2939 // CHECK3-NEXT: store i8** null, i8*** [[TMP3]], align 8
2940 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
2941 // CHECK3-NEXT: store i64* null, i64** [[TMP4]], align 8
2942 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
2943 // CHECK3-NEXT: store i64* null, i64** [[TMP5]], align 8
2944 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
2945 // CHECK3-NEXT: store i8** null, i8*** [[TMP6]], align 8
2946 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
2947 // CHECK3-NEXT: store i8** null, i8*** [[TMP7]], align 8
2948 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
2949 // CHECK3-NEXT: store i64 100, i64* [[TMP8]], align 8
2950 // CHECK3-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l57.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
2951 // CHECK3-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
2952 // CHECK3-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2953 // CHECK3: omp_offload.failed:
2954 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l57() #[[ATTR2]]
2955 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
2956 // CHECK3: omp_offload.cont:
2957 // CHECK3-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2958 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
2959 // CHECK3-NEXT: store i32 1, i32* [[TMP11]], align 4
2960 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
2961 // CHECK3-NEXT: store i32 0, i32* [[TMP12]], align 4
2962 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
2963 // CHECK3-NEXT: store i8** null, i8*** [[TMP13]], align 8
2964 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
2965 // CHECK3-NEXT: store i8** null, i8*** [[TMP14]], align 8
2966 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
2967 // CHECK3-NEXT: store i64* null, i64** [[TMP15]], align 8
2968 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
2969 // CHECK3-NEXT: store i64* null, i64** [[TMP16]], align 8
2970 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
2971 // CHECK3-NEXT: store i8** null, i8*** [[TMP17]], align 8
2972 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
2973 // CHECK3-NEXT: store i8** null, i8*** [[TMP18]], align 8
2974 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
2975 // CHECK3-NEXT: store i64 100, i64* [[TMP19]], align 8
2976 // CHECK3-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
2977 // CHECK3-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
2978 // CHECK3-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
2979 // CHECK3: omp_offload.failed3:
2980 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]]
2981 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT4]]
2982 // CHECK3: omp_offload.cont4:
2983 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
2984 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
2985 // CHECK3-NEXT: store i32 [[TMP22]], i32* [[CONV]], align 4
2986 // CHECK3-NEXT: [[TMP23:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
2987 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2988 // CHECK3-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64*
2989 // CHECK3-NEXT: store i64 [[TMP23]], i64* [[TMP25]], align 8
2990 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2991 // CHECK3-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64*
2992 // CHECK3-NEXT: store i64 [[TMP23]], i64* [[TMP27]], align 8
2993 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
2994 // CHECK3-NEXT: store i8* null, i8** [[TMP28]], align 8
2995 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2996 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2997 // CHECK3-NEXT: [[TMP31:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
2998 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP31]], 0
2999 // CHECK3-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
3000 // CHECK3-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
3001 // CHECK3-NEXT: [[TMP32:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
3002 // CHECK3-NEXT: [[TOBOOL5:%.*]] = trunc i8 [[TMP32]] to i1
3003 // CHECK3-NEXT: [[TMP33:%.*]] = select i1 [[TOBOOL5]], i32 0, i32 1
3004 // CHECK3-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
3005 // CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 0
3006 // CHECK3-NEXT: store i32 1, i32* [[TMP34]], align 4
3007 // CHECK3-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 1
3008 // CHECK3-NEXT: store i32 1, i32* [[TMP35]], align 4
3009 // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 2
3010 // CHECK3-NEXT: store i8** [[TMP29]], i8*** [[TMP36]], align 8
3011 // CHECK3-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 3
3012 // CHECK3-NEXT: store i8** [[TMP30]], i8*** [[TMP37]], align 8
3013 // CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 4
3014 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.17, i32 0, i32 0), i64** [[TMP38]], align 8
3015 // CHECK3-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 5
3016 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.18, i32 0, i32 0), i64** [[TMP39]], align 8
3017 // CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 6
3018 // CHECK3-NEXT: store i8** null, i8*** [[TMP40]], align 8
3019 // CHECK3-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 7
3020 // CHECK3-NEXT: store i8** null, i8*** [[TMP41]], align 8
3021 // CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 8
3022 // CHECK3-NEXT: store i64 100, i64* [[TMP42]], align 8
3023 // CHECK3-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 [[TMP33]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]])
3024 // CHECK3-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
3025 // CHECK3-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]
3026 // CHECK3: omp_offload.failed8:
3027 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67(i64 [[TMP23]]) #[[ATTR2]]
3028 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT9]]
3029 // CHECK3: omp_offload.cont9:
3030 // CHECK3-NEXT: ret i32 0
3031 //
3032 //
3033 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l57
3034 // CHECK3-SAME: () #[[ATTR1]] {
3035 // CHECK3-NEXT: entry:
3036 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..11 to void (i32*, i32*, ...)*))
3037 // CHECK3-NEXT: ret void
3038 //
3039 //
3040 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..11
3041 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
3042 // CHECK3-NEXT: entry:
3043 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3044 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3045 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3046 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3047 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3048 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3049 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3050 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3051 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
3052 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3053 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3054 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3055 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3056 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3057 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3058 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3059 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3060 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3061 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3062 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3063 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3064 // CHECK3: cond.true:
3065 // CHECK3-NEXT: br label [[COND_END:%.*]]
3066 // CHECK3: cond.false:
3067 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3068 // CHECK3-NEXT: br label [[COND_END]]
3069 // CHECK3: cond.end:
3070 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3071 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3072 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3073 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3074 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3075 // CHECK3: omp.inner.for.cond:
3076 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47:![0-9]+]]
3077 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP47]]
3078 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3079 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3080 // CHECK3: omp.inner.for.body:
3081 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP47]]
3082 // CHECK3-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3083 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP47]]
3084 // CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3085 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP47]]
3086 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3087 // CHECK3: omp.inner.for.inc:
3088 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]
3089 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP47]]
3090 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
3091 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]
3092 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]]
3093 // CHECK3: omp.inner.for.end:
3094 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3095 // CHECK3: omp.loop.exit:
3096 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3097 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3098 // CHECK3-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
3099 // CHECK3-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3100 // CHECK3: .omp.final.then:
3101 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
3102 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
3103 // CHECK3: .omp.final.done:
3104 // CHECK3-NEXT: ret void
3105 //
3106 //
3107 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..12
3108 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
3109 // CHECK3-NEXT: entry:
3110 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3111 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3112 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3113 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3114 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3115 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3116 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3117 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3118 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3119 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3120 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
3121 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3122 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3123 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3124 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3125 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3126 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3127 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3128 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3129 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3130 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3131 // CHECK3-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3132 // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3133 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3134 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3135 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3136 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3137 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3138 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3139 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3140 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3141 // CHECK3: cond.true:
3142 // CHECK3-NEXT: br label [[COND_END:%.*]]
3143 // CHECK3: cond.false:
3144 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3145 // CHECK3-NEXT: br label [[COND_END]]
3146 // CHECK3: cond.end:
3147 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3148 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3149 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3150 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3151 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3152 // CHECK3: omp.inner.for.cond:
3153 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50:![0-9]+]]
3154 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP50]]
3155 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3156 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3157 // CHECK3: omp.inner.for.body:
3158 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]
3159 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3160 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3161 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP50]]
3162 // CHECK3-NEXT: call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP50]]
3163 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3164 // CHECK3: omp.body.continue:
3165 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3166 // CHECK3: omp.inner.for.inc:
3167 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]
3168 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3169 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]
3170 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP51:![0-9]+]]
3171 // CHECK3: omp.inner.for.end:
3172 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3173 // CHECK3: omp.loop.exit:
3174 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3175 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3176 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
3177 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3178 // CHECK3: .omp.final.then:
3179 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
3180 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
3181 // CHECK3: .omp.final.done:
3182 // CHECK3-NEXT: ret void
3183 //
3184 //
3185 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62
3186 // CHECK3-SAME: () #[[ATTR1]] {
3187 // CHECK3-NEXT: entry:
3188 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..13 to void (i32*, i32*, ...)*))
3189 // CHECK3-NEXT: ret void
3190 //
3191 //
3192 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..13
3193 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
3194 // CHECK3-NEXT: entry:
3195 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3196 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3197 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3198 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3199 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3200 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3201 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3202 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3203 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
3204 // CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
3205 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3206 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3207 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3208 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3209 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3210 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3211 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3212 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3213 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3214 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3215 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3216 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3217 // CHECK3: cond.true:
3218 // CHECK3-NEXT: br label [[COND_END:%.*]]
3219 // CHECK3: cond.false:
3220 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3221 // CHECK3-NEXT: br label [[COND_END]]
3222 // CHECK3: cond.end:
3223 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3224 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3225 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3226 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3227 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3228 // CHECK3: omp.inner.for.cond:
3229 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3230 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3231 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3232 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3233 // CHECK3: omp.inner.for.body:
3234 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3235 // CHECK3-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3236 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3237 // CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3238 // CHECK3-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
3239 // CHECK3-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3240 // CHECK3-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
3241 // CHECK3-NEXT: call void @.omp_outlined..14(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
3242 // CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
3243 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3244 // CHECK3: omp.inner.for.inc:
3245 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3246 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3247 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
3248 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3249 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP53:![0-9]+]]
3250 // CHECK3: omp.inner.for.end:
3251 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3252 // CHECK3: omp.loop.exit:
3253 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3254 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3255 // CHECK3-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
3256 // CHECK3-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3257 // CHECK3: .omp.final.then:
3258 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
3259 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
3260 // CHECK3: .omp.final.done:
3261 // CHECK3-NEXT: ret void
3262 //
3263 //
3264 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..14
3265 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
3266 // CHECK3-NEXT: entry:
3267 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3268 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3269 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3270 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3271 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3272 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3273 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3274 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3275 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3276 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3277 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
3278 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3279 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3280 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3281 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3282 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3283 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3284 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3285 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3286 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3287 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3288 // CHECK3-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3289 // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3290 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3291 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3292 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3293 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3294 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3295 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3296 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3297 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3298 // CHECK3: cond.true:
3299 // CHECK3-NEXT: br label [[COND_END:%.*]]
3300 // CHECK3: cond.false:
3301 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3302 // CHECK3-NEXT: br label [[COND_END]]
3303 // CHECK3: cond.end:
3304 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3305 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3306 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3307 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3308 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3309 // CHECK3: omp.inner.for.cond:
3310 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3311 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3312 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3313 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3314 // CHECK3: omp.inner.for.body:
3315 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3316 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3317 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3318 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3319 // CHECK3-NEXT: call void @_Z3fn2v()
3320 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3321 // CHECK3: omp.body.continue:
3322 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3323 // CHECK3: omp.inner.for.inc:
3324 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3325 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3326 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
3327 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP54:![0-9]+]]
3328 // CHECK3: omp.inner.for.end:
3329 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3330 // CHECK3: omp.loop.exit:
3331 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3332 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3333 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
3334 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3335 // CHECK3: .omp.final.then:
3336 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
3337 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
3338 // CHECK3: .omp.final.done:
3339 // CHECK3-NEXT: ret void
3340 //
3341 //
3342 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67
3343 // CHECK3-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] {
3344 // CHECK3-NEXT: entry:
3345 // CHECK3-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
3346 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
3347 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
3348 // CHECK3-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
3349 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
3350 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 4
3351 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
3352 // CHECK3-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
3353 // CHECK3-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
3354 // CHECK3-NEXT: [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
3355 // CHECK3-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1
3356 // CHECK3-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
3357 // CHECK3-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8
3358 // CHECK3-NEXT: store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
3359 // CHECK3-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
3360 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP2]])
3361 // CHECK3-NEXT: ret void
3362 //
3363 //
3364 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..15
3365 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
3366 // CHECK3-NEXT: entry:
3367 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3368 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3369 // CHECK3-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
3370 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3371 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3372 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3373 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3374 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3375 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3376 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
3377 // CHECK3-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
3378 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3379 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3380 // CHECK3-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
3381 // CHECK3-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
3382 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3383 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
3384 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3385 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3386 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3387 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
3388 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3389 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3390 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3391 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3392 // CHECK3: cond.true:
3393 // CHECK3-NEXT: br label [[COND_END:%.*]]
3394 // CHECK3: cond.false:
3395 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3396 // CHECK3-NEXT: br label [[COND_END]]
3397 // CHECK3: cond.end:
3398 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3399 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3400 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3401 // CHECK3-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
3402 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3403 // CHECK3: omp.inner.for.cond:
3404 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP55:![0-9]+]]
3405 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP55]]
3406 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3407 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3408 // CHECK3: omp.inner.for.body:
3409 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP55]]
3410 // CHECK3-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3411 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP55]]
3412 // CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3413 // CHECK3-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 1, !llvm.access.group [[ACC_GRP55]]
3414 // CHECK3-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
3415 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
3416 // CHECK3: omp_if.then:
3417 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..16 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP55]]
3418 // CHECK3-NEXT: br label [[OMP_IF_END:%.*]]
3419 // CHECK3: omp_if.else:
3420 // CHECK3-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP55]]
3421 // CHECK3-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP55]]
3422 // CHECK3-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP55]]
3423 // CHECK3-NEXT: call void @.omp_outlined..16(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP55]]
3424 // CHECK3-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP55]]
3425 // CHECK3-NEXT: br label [[OMP_IF_END]]
3426 // CHECK3: omp_if.end:
3427 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3428 // CHECK3: omp.inner.for.inc:
3429 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP55]]
3430 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP55]]
3431 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
3432 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP55]]
3433 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP56:![0-9]+]]
3434 // CHECK3: omp.inner.for.end:
3435 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3436 // CHECK3: omp.loop.exit:
3437 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
3438 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3439 // CHECK3-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
3440 // CHECK3-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3441 // CHECK3: .omp.final.then:
3442 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
3443 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
3444 // CHECK3: .omp.final.done:
3445 // CHECK3-NEXT: ret void
3446 //
3447 //
3448 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..16
3449 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
3450 // CHECK3-NEXT: entry:
3451 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3452 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3453 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3454 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3455 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3456 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
3457 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3458 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3459 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3460 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3461 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
3462 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3463 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3464 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3465 // CHECK3-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3466 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3467 // CHECK3-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3468 // CHECK3-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3469 // CHECK3-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3470 // CHECK3-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3471 // CHECK3-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3472 // CHECK3-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3473 // CHECK3-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3474 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3475 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3476 // CHECK3-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3477 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
3478 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3479 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3480 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3481 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3482 // CHECK3: cond.true:
3483 // CHECK3-NEXT: br label [[COND_END:%.*]]
3484 // CHECK3: cond.false:
3485 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3486 // CHECK3-NEXT: br label [[COND_END]]
3487 // CHECK3: cond.end:
3488 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3489 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3490 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3491 // CHECK3-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
3492 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3493 // CHECK3: omp.inner.for.cond:
3494 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58:![0-9]+]]
3495 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP58]]
3496 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3497 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3498 // CHECK3: omp.inner.for.body:
3499 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58]]
3500 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3501 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3502 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP58]]
3503 // CHECK3-NEXT: call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP58]]
3504 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3505 // CHECK3: omp.body.continue:
3506 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3507 // CHECK3: omp.inner.for.inc:
3508 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58]]
3509 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3510 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58]]
3511 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP59:![0-9]+]]
3512 // CHECK3: omp.inner.for.end:
3513 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3514 // CHECK3: omp.loop.exit:
3515 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
3516 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
3517 // CHECK3-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
3518 // CHECK3-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3519 // CHECK3: .omp.final.then:
3520 // CHECK3-NEXT: store i32 100, i32* [[I]], align 4
3521 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
3522 // CHECK3: .omp.final.done:
3523 // CHECK3-NEXT: ret void
3524 //
3525 //
3526 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3527 // CHECK3-SAME: () #[[ATTR5:[0-9]+]] {
3528 // CHECK3-NEXT: entry:
3529 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1)
3530 // CHECK3-NEXT: ret void
3531 //
3532 //
3533 // CHECK5-LABEL: define {{[^@]+}}@_Z9gtid_testv
3534 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] {
3535 // CHECK5-NEXT: entry:
3536 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
3537 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3538 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3539 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3540 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
3541 // CHECK5-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
3542 // CHECK5-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
3543 // CHECK5-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
3544 // CHECK5-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
3545 // CHECK5-NEXT: [[I6:%.*]] = alloca i32, align 4
3546 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3547 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3548 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3549 // CHECK5-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
3550 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3551 // CHECK5: omp.inner.for.cond:
3552 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]
3553 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]]
3554 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
3555 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3556 // CHECK5: omp.inner.for.body:
3557 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
3558 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
3559 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3560 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
3561 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3562 // CHECK5: omp.body.continue:
3563 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3564 // CHECK5: omp.inner.for.inc:
3565 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
3566 // CHECK5-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
3567 // CHECK5-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
3568 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
3569 // CHECK5: omp.inner.for.end:
3570 // CHECK5-NEXT: store i32 100, i32* [[I]], align 4
3571 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
3572 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
3573 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
3574 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
3575 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
3576 // CHECK5: omp.inner.for.cond7:
3577 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]
3578 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP6]]
3579 // CHECK5-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3580 // CHECK5-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
3581 // CHECK5: omp.inner.for.body9:
3582 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
3583 // CHECK5-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
3584 // CHECK5-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
3585 // CHECK5-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group [[ACC_GRP6]]
3586 // CHECK5-NEXT: call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP6]]
3587 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
3588 // CHECK5: omp.body.continue12:
3589 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
3590 // CHECK5: omp.inner.for.inc13:
3591 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
3592 // CHECK5-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
3593 // CHECK5-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
3594 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]]
3595 // CHECK5: omp.inner.for.end15:
3596 // CHECK5-NEXT: store i32 100, i32* [[I6]], align 4
3597 // CHECK5-NEXT: ret void
3598 //
3599 //
3600 // CHECK5-LABEL: define {{[^@]+}}@main
3601 // CHECK5-SAME: () #[[ATTR1:[0-9]+]] {
3602 // CHECK5-NEXT: entry:
3603 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
3604 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
3605 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3606 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3607 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3608 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
3609 // CHECK5-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
3610 // CHECK5-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
3611 // CHECK5-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
3612 // CHECK5-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
3613 // CHECK5-NEXT: [[I6:%.*]] = alloca i32, align 4
3614 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
3615 // CHECK5-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
3616 // CHECK5-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4
3617 // CHECK5-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4
3618 // CHECK5-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4
3619 // CHECK5-NEXT: [[I20:%.*]] = alloca i32, align 4
3620 // CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4
3621 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3622 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3623 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3624 // CHECK5-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
3625 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3626 // CHECK5: omp.inner.for.cond:
3627 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]
3628 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
3629 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
3630 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3631 // CHECK5: omp.inner.for.body:
3632 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
3633 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
3634 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3635 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP9]]
3636 // CHECK5-NEXT: call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP9]]
3637 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3638 // CHECK5: omp.body.continue:
3639 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3640 // CHECK5: omp.inner.for.inc:
3641 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
3642 // CHECK5-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
3643 // CHECK5-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
3644 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
3645 // CHECK5: omp.inner.for.end:
3646 // CHECK5-NEXT: store i32 100, i32* [[I]], align 4
3647 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
3648 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
3649 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
3650 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
3651 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
3652 // CHECK5: omp.inner.for.cond7:
3653 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]]
3654 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP12]]
3655 // CHECK5-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3656 // CHECK5-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
3657 // CHECK5: omp.inner.for.body9:
3658 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]
3659 // CHECK5-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
3660 // CHECK5-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
3661 // CHECK5-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group [[ACC_GRP12]]
3662 // CHECK5-NEXT: call void @_Z3fn5v(), !llvm.access.group [[ACC_GRP12]]
3663 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
3664 // CHECK5: omp.body.continue12:
3665 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
3666 // CHECK5: omp.inner.for.inc13:
3667 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]
3668 // CHECK5-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
3669 // CHECK5-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]
3670 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP13:![0-9]+]]
3671 // CHECK5: omp.inner.for.end15:
3672 // CHECK5-NEXT: store i32 100, i32* [[I6]], align 4
3673 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* @Arg, align 4
3674 // CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
3675 // CHECK5-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
3676 // CHECK5-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
3677 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
3678 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
3679 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB17]], align 4
3680 // CHECK5-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
3681 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
3682 // CHECK5: omp.inner.for.cond21:
3683 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
3684 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP15]]
3685 // CHECK5-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
3686 // CHECK5-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
3687 // CHECK5: omp.inner.for.body23:
3688 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]
3689 // CHECK5-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
3690 // CHECK5-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
3691 // CHECK5-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group [[ACC_GRP15]]
3692 // CHECK5-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP15]]
3693 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
3694 // CHECK5: omp.body.continue26:
3695 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
3696 // CHECK5: omp.inner.for.inc27:
3697 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]
3698 // CHECK5-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
3699 // CHECK5-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]
3700 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP16:![0-9]+]]
3701 // CHECK5: omp.inner.for.end29:
3702 // CHECK5-NEXT: store i32 100, i32* [[I20]], align 4
3703 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* @Arg, align 4
3704 // CHECK5-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP16]])
3705 // CHECK5-NEXT: ret i32 [[CALL]]
3706 //
3707 //
3708 // CHECK5-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
3709 // CHECK5-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {
3710 // CHECK5-NEXT: entry:
3711 // CHECK5-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
3712 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
3713 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3714 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3715 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3716 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
3717 // CHECK5-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
3718 // CHECK5-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
3719 // CHECK5-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
3720 // CHECK5-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
3721 // CHECK5-NEXT: [[I6:%.*]] = alloca i32, align 4
3722 // CHECK5-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
3723 // CHECK5-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
3724 // CHECK5-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4
3725 // CHECK5-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4
3726 // CHECK5-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4
3727 // CHECK5-NEXT: [[I20:%.*]] = alloca i32, align 4
3728 // CHECK5-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
3729 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3730 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3731 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3732 // CHECK5-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
3733 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3734 // CHECK5: omp.inner.for.cond:
3735 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]
3736 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]]
3737 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
3738 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3739 // CHECK5: omp.inner.for.body:
3740 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
3741 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
3742 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3743 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP18]]
3744 // CHECK5-NEXT: call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP18]]
3745 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3746 // CHECK5: omp.body.continue:
3747 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3748 // CHECK5: omp.inner.for.inc:
3749 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
3750 // CHECK5-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
3751 // CHECK5-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
3752 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
3753 // CHECK5: omp.inner.for.end:
3754 // CHECK5-NEXT: store i32 100, i32* [[I]], align 4
3755 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
3756 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
3757 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
3758 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
3759 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
3760 // CHECK5: omp.inner.for.cond7:
3761 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]]
3762 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP21]]
3763 // CHECK5-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3764 // CHECK5-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
3765 // CHECK5: omp.inner.for.body9:
3766 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]]
3767 // CHECK5-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
3768 // CHECK5-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
3769 // CHECK5-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group [[ACC_GRP21]]
3770 // CHECK5-NEXT: call void @_Z3fn2v(), !llvm.access.group [[ACC_GRP21]]
3771 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
3772 // CHECK5: omp.body.continue12:
3773 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
3774 // CHECK5: omp.inner.for.inc13:
3775 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]]
3776 // CHECK5-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
3777 // CHECK5-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]]
3778 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP22:![0-9]+]]
3779 // CHECK5: omp.inner.for.end15:
3780 // CHECK5-NEXT: store i32 100, i32* [[I6]], align 4
3781 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
3782 // CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
3783 // CHECK5-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
3784 // CHECK5-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
3785 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
3786 // CHECK5-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
3787 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB17]], align 4
3788 // CHECK5-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
3789 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
3790 // CHECK5: omp.inner.for.cond21:
3791 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]]
3792 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP24]]
3793 // CHECK5-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
3794 // CHECK5-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
3795 // CHECK5: omp.inner.for.body23:
3796 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]]
3797 // CHECK5-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
3798 // CHECK5-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
3799 // CHECK5-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group [[ACC_GRP24]]
3800 // CHECK5-NEXT: call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP24]]
3801 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
3802 // CHECK5: omp.body.continue26:
3803 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
3804 // CHECK5: omp.inner.for.inc27:
3805 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]]
3806 // CHECK5-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
3807 // CHECK5-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]]
3808 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP25:![0-9]+]]
3809 // CHECK5: omp.inner.for.end29:
3810 // CHECK5-NEXT: store i32 100, i32* [[I20]], align 4
3811 // CHECK5-NEXT: ret i32 0
3812 //
3813 //
3814 // CHECK7-LABEL: define {{[^@]+}}@_Z9gtid_testv
3815 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] {
3816 // CHECK7-NEXT: entry:
3817 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
3818 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3819 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3820 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3821 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
3822 // CHECK7-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
3823 // CHECK7-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
3824 // CHECK7-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
3825 // CHECK7-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
3826 // CHECK7-NEXT: [[I6:%.*]] = alloca i32, align 4
3827 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3828 // CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3829 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3830 // CHECK7-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
3831 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3832 // CHECK7: omp.inner.for.cond:
3833 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]
3834 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]]
3835 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
3836 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3837 // CHECK7: omp.inner.for.body:
3838 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
3839 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
3840 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3841 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
3842 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3843 // CHECK7: omp.body.continue:
3844 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3845 // CHECK7: omp.inner.for.inc:
3846 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
3847 // CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
3848 // CHECK7-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
3849 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
3850 // CHECK7: omp.inner.for.end:
3851 // CHECK7-NEXT: store i32 100, i32* [[I]], align 4
3852 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
3853 // CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
3854 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
3855 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
3856 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
3857 // CHECK7: omp.inner.for.cond7:
3858 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]
3859 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP6]]
3860 // CHECK7-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3861 // CHECK7-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
3862 // CHECK7: omp.inner.for.body9:
3863 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
3864 // CHECK7-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
3865 // CHECK7-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
3866 // CHECK7-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group [[ACC_GRP6]]
3867 // CHECK7-NEXT: call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP6]]
3868 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
3869 // CHECK7: omp.body.continue12:
3870 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
3871 // CHECK7: omp.inner.for.inc13:
3872 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
3873 // CHECK7-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
3874 // CHECK7-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
3875 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]]
3876 // CHECK7: omp.inner.for.end15:
3877 // CHECK7-NEXT: store i32 100, i32* [[I6]], align 4
3878 // CHECK7-NEXT: ret void
3879 //
3880 //
3881 // CHECK7-LABEL: define {{[^@]+}}@main
3882 // CHECK7-SAME: () #[[ATTR1:[0-9]+]] {
3883 // CHECK7-NEXT: entry:
3884 // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
3885 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
3886 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3887 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3888 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3889 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
3890 // CHECK7-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
3891 // CHECK7-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
3892 // CHECK7-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
3893 // CHECK7-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
3894 // CHECK7-NEXT: [[I6:%.*]] = alloca i32, align 4
3895 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
3896 // CHECK7-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
3897 // CHECK7-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4
3898 // CHECK7-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4
3899 // CHECK7-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4
3900 // CHECK7-NEXT: [[I20:%.*]] = alloca i32, align 4
3901 // CHECK7-NEXT: store i32 0, i32* [[RETVAL]], align 4
3902 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3903 // CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
3904 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3905 // CHECK7-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
3906 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3907 // CHECK7: omp.inner.for.cond:
3908 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]
3909 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
3910 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
3911 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3912 // CHECK7: omp.inner.for.body:
3913 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
3914 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
3915 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3916 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP9]]
3917 // CHECK7-NEXT: call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP9]]
3918 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3919 // CHECK7: omp.body.continue:
3920 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3921 // CHECK7: omp.inner.for.inc:
3922 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
3923 // CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
3924 // CHECK7-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
3925 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
3926 // CHECK7: omp.inner.for.end:
3927 // CHECK7-NEXT: store i32 100, i32* [[I]], align 4
3928 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
3929 // CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
3930 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
3931 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
3932 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
3933 // CHECK7: omp.inner.for.cond7:
3934 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
3935 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4
3936 // CHECK7-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3937 // CHECK7-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
3938 // CHECK7: omp.inner.for.body9:
3939 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
3940 // CHECK7-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
3941 // CHECK7-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
3942 // CHECK7-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
3943 // CHECK7-NEXT: call void @_Z3fn5v()
3944 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
3945 // CHECK7: omp.body.continue12:
3946 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
3947 // CHECK7: omp.inner.for.inc13:
3948 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
3949 // CHECK7-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
3950 // CHECK7-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
3951 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP12:![0-9]+]]
3952 // CHECK7: omp.inner.for.end15:
3953 // CHECK7-NEXT: store i32 100, i32* [[I6]], align 4
3954 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* @Arg, align 4
3955 // CHECK7-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
3956 // CHECK7-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
3957 // CHECK7-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
3958 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
3959 // CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
3960 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB17]], align 4
3961 // CHECK7-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
3962 // CHECK7-NEXT: [[TMP12:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
3963 // CHECK7-NEXT: [[TOBOOL21:%.*]] = trunc i8 [[TMP12]] to i1
3964 // CHECK7-NEXT: br i1 [[TOBOOL21]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
3965 // CHECK7: omp_if.then:
3966 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND22:%.*]]
3967 // CHECK7: omp.inner.for.cond22:
3968 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP14:![0-9]+]]
3969 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP14]]
3970 // CHECK7-NEXT: [[CMP23:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
3971 // CHECK7-NEXT: br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.*]], label [[OMP_INNER_FOR_END30:%.*]]
3972 // CHECK7: omp.inner.for.body24:
3973 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP14]]
3974 // CHECK7-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP15]], 1
3975 // CHECK7-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]]
3976 // CHECK7-NEXT: store i32 [[ADD26]], i32* [[I20]], align 4, !llvm.access.group [[ACC_GRP14]]
3977 // CHECK7-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP14]]
3978 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE27:%.*]]
3979 // CHECK7: omp.body.continue27:
3980 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC28:%.*]]
3981 // CHECK7: omp.inner.for.inc28:
3982 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP14]]
3983 // CHECK7-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP16]], 1
3984 // CHECK7-NEXT: store i32 [[ADD29]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP14]]
3985 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP15:![0-9]+]]
3986 // CHECK7: omp.inner.for.end30:
3987 // CHECK7-NEXT: br label [[OMP_IF_END:%.*]]
3988 // CHECK7: omp_if.else:
3989 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND31:%.*]]
3990 // CHECK7: omp.inner.for.cond31:
3991 // CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4
3992 // CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4
3993 // CHECK7-NEXT: [[CMP32:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
3994 // CHECK7-NEXT: br i1 [[CMP32]], label [[OMP_INNER_FOR_BODY33:%.*]], label [[OMP_INNER_FOR_END39:%.*]]
3995 // CHECK7: omp.inner.for.body33:
3996 // CHECK7-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4
3997 // CHECK7-NEXT: [[MUL34:%.*]] = mul nsw i32 [[TMP19]], 1
3998 // CHECK7-NEXT: [[ADD35:%.*]] = add nsw i32 0, [[MUL34]]
3999 // CHECK7-NEXT: store i32 [[ADD35]], i32* [[I20]], align 4
4000 // CHECK7-NEXT: call void @_Z3fn6v()
4001 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE36:%.*]]
4002 // CHECK7: omp.body.continue36:
4003 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC37:%.*]]
4004 // CHECK7: omp.inner.for.inc37:
4005 // CHECK7-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4
4006 // CHECK7-NEXT: [[ADD38:%.*]] = add nsw i32 [[TMP20]], 1
4007 // CHECK7-NEXT: store i32 [[ADD38]], i32* [[DOTOMP_IV19]], align 4
4008 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND31]], !llvm.loop [[LOOP17:![0-9]+]]
4009 // CHECK7: omp.inner.for.end39:
4010 // CHECK7-NEXT: br label [[OMP_IF_END]]
4011 // CHECK7: omp_if.end:
4012 // CHECK7-NEXT: store i32 100, i32* [[I20]], align 4
4013 // CHECK7-NEXT: [[TMP21:%.*]] = load i32, i32* @Arg, align 4
4014 // CHECK7-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP21]])
4015 // CHECK7-NEXT: ret i32 [[CALL]]
4016 //
4017 //
4018 // CHECK7-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
4019 // CHECK7-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {
4020 // CHECK7-NEXT: entry:
4021 // CHECK7-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
4022 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
4023 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4024 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4025 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4026 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
4027 // CHECK7-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
4028 // CHECK7-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
4029 // CHECK7-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
4030 // CHECK7-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
4031 // CHECK7-NEXT: [[I6:%.*]] = alloca i32, align 4
4032 // CHECK7-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
4033 // CHECK7-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
4034 // CHECK7-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4
4035 // CHECK7-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4
4036 // CHECK7-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4
4037 // CHECK7-NEXT: [[I20:%.*]] = alloca i32, align 4
4038 // CHECK7-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
4039 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4040 // CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
4041 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4042 // CHECK7-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
4043 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4044 // CHECK7: omp.inner.for.cond:
4045 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]
4046 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]]
4047 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
4048 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4049 // CHECK7: omp.inner.for.body:
4050 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
4051 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
4052 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4053 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP18]]
4054 // CHECK7-NEXT: call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP18]]
4055 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4056 // CHECK7: omp.body.continue:
4057 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4058 // CHECK7: omp.inner.for.inc:
4059 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
4060 // CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
4061 // CHECK7-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
4062 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
4063 // CHECK7: omp.inner.for.end:
4064 // CHECK7-NEXT: store i32 100, i32* [[I]], align 4
4065 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
4066 // CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
4067 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
4068 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
4069 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
4070 // CHECK7: omp.inner.for.cond7:
4071 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
4072 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4
4073 // CHECK7-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4074 // CHECK7-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
4075 // CHECK7: omp.inner.for.body9:
4076 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
4077 // CHECK7-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
4078 // CHECK7-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
4079 // CHECK7-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
4080 // CHECK7-NEXT: call void @_Z3fn2v()
4081 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
4082 // CHECK7: omp.body.continue12:
4083 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
4084 // CHECK7: omp.inner.for.inc13:
4085 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
4086 // CHECK7-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
4087 // CHECK7-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
4088 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP21:![0-9]+]]
4089 // CHECK7: omp.inner.for.end15:
4090 // CHECK7-NEXT: store i32 100, i32* [[I6]], align 4
4091 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
4092 // CHECK7-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
4093 // CHECK7-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
4094 // CHECK7-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
4095 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
4096 // CHECK7-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
4097 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB17]], align 4
4098 // CHECK7-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
4099 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
4100 // CHECK7: omp.inner.for.cond21:
4101 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP22:![0-9]+]]
4102 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP22]]
4103 // CHECK7-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
4104 // CHECK7-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
4105 // CHECK7: omp.inner.for.body23:
4106 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP22]]
4107 // CHECK7-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
4108 // CHECK7-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
4109 // CHECK7-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group [[ACC_GRP22]]
4110 // CHECK7-NEXT: call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP22]]
4111 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
4112 // CHECK7: omp.body.continue26:
4113 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
4114 // CHECK7: omp.inner.for.inc27:
4115 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP22]]
4116 // CHECK7-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
4117 // CHECK7-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP22]]
4118 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP23:![0-9]+]]
4119 // CHECK7: omp.inner.for.end29:
4120 // CHECK7-NEXT: store i32 100, i32* [[I20]], align 4
4121 // CHECK7-NEXT: ret i32 0
4122 //
4123 //
4124 // CHECK9-LABEL: define {{[^@]+}}@_Z9gtid_testv
4125 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
4126 // CHECK9-NEXT: entry:
4127 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
4128 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
4129 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
4130 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
4131 // CHECK9-NEXT: store i32 1, i32* [[TMP0]], align 4
4132 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
4133 // CHECK9-NEXT: store i32 0, i32* [[TMP1]], align 4
4134 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
4135 // CHECK9-NEXT: store i8** null, i8*** [[TMP2]], align 8
4136 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
4137 // CHECK9-NEXT: store i8** null, i8*** [[TMP3]], align 8
4138 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
4139 // CHECK9-NEXT: store i64* null, i64** [[TMP4]], align 8
4140 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
4141 // CHECK9-NEXT: store i64* null, i64** [[TMP5]], align 8
4142 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
4143 // CHECK9-NEXT: store i8** null, i8*** [[TMP6]], align 8
4144 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
4145 // CHECK9-NEXT: store i8** null, i8*** [[TMP7]], align 8
4146 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
4147 // CHECK9-NEXT: store i64 100, i64* [[TMP8]], align 8
4148 // CHECK9-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
4149 // CHECK9-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
4150 // CHECK9-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4151 // CHECK9: omp_offload.failed:
4152 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43() #[[ATTR2:[0-9]+]]
4153 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
4154 // CHECK9: omp_offload.cont:
4155 // CHECK9-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
4156 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
4157 // CHECK9-NEXT: store i32 1, i32* [[TMP11]], align 4
4158 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
4159 // CHECK9-NEXT: store i32 0, i32* [[TMP12]], align 4
4160 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
4161 // CHECK9-NEXT: store i8** null, i8*** [[TMP13]], align 8
4162 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
4163 // CHECK9-NEXT: store i8** null, i8*** [[TMP14]], align 8
4164 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
4165 // CHECK9-NEXT: store i64* null, i64** [[TMP15]], align 8
4166 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
4167 // CHECK9-NEXT: store i64* null, i64** [[TMP16]], align 8
4168 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
4169 // CHECK9-NEXT: store i8** null, i8*** [[TMP17]], align 8
4170 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
4171 // CHECK9-NEXT: store i8** null, i8*** [[TMP18]], align 8
4172 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
4173 // CHECK9-NEXT: store i64 100, i64* [[TMP19]], align 8
4174 // CHECK9-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
4175 // CHECK9-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
4176 // CHECK9-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
4177 // CHECK9: omp_offload.failed3:
4178 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47() #[[ATTR2]]
4179 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT4]]
4180 // CHECK9: omp_offload.cont4:
4181 // CHECK9-NEXT: ret void
4182 //
4183 //
4184 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43
4185 // CHECK9-SAME: () #[[ATTR1:[0-9]+]] {
4186 // CHECK9-NEXT: entry:
4187 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
4188 // CHECK9-NEXT: ret void
4189 //
4190 //
4191 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
4192 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4193 // CHECK9-NEXT: entry:
4194 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4195 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4196 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4197 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
4198 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4199 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4200 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4201 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4202 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
4203 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4204 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4205 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4206 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4207 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4208 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4209 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4210 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4211 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4212 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4213 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4214 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4215 // CHECK9: cond.true:
4216 // CHECK9-NEXT: br label [[COND_END:%.*]]
4217 // CHECK9: cond.false:
4218 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4219 // CHECK9-NEXT: br label [[COND_END]]
4220 // CHECK9: cond.end:
4221 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4222 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4223 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4224 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4225 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4226 // CHECK9: omp.inner.for.cond:
4227 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]]
4228 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]
4229 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4230 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4231 // CHECK9: omp.inner.for.body:
4232 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP11]]
4233 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4234 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]
4235 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4236 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP11]]
4237 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4238 // CHECK9: omp.inner.for.inc:
4239 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
4240 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP11]]
4241 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
4242 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
4243 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
4244 // CHECK9: omp.inner.for.end:
4245 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4246 // CHECK9: omp.loop.exit:
4247 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4248 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4249 // CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
4250 // CHECK9-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4251 // CHECK9: .omp.final.then:
4252 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
4253 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
4254 // CHECK9: .omp.final.done:
4255 // CHECK9-NEXT: ret void
4256 //
4257 //
4258 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1
4259 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
4260 // CHECK9-NEXT: entry:
4261 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4262 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4263 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4264 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4265 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4266 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
4267 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4268 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4269 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4270 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4271 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
4272 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4273 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4274 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4275 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4276 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4277 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
4278 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4279 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4280 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4281 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4282 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4283 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4284 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4285 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4286 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4287 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4288 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4289 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4290 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4291 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4292 // CHECK9: cond.true:
4293 // CHECK9-NEXT: br label [[COND_END:%.*]]
4294 // CHECK9: cond.false:
4295 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4296 // CHECK9-NEXT: br label [[COND_END]]
4297 // CHECK9: cond.end:
4298 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4299 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4300 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4301 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4302 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4303 // CHECK9: omp.inner.for.cond:
4304 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
4305 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]]
4306 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4307 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4308 // CHECK9: omp.inner.for.body:
4309 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
4310 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4311 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4312 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP15]]
4313 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4314 // CHECK9: omp.body.continue:
4315 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4316 // CHECK9: omp.inner.for.inc:
4317 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
4318 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4319 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
4320 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
4321 // CHECK9: omp.inner.for.end:
4322 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4323 // CHECK9: omp.loop.exit:
4324 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4325 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4326 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
4327 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4328 // CHECK9: .omp.final.then:
4329 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
4330 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
4331 // CHECK9: .omp.final.done:
4332 // CHECK9-NEXT: ret void
4333 //
4334 //
4335 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47
4336 // CHECK9-SAME: () #[[ATTR1]] {
4337 // CHECK9-NEXT: entry:
4338 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
4339 // CHECK9-NEXT: ret void
4340 //
4341 //
4342 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2
4343 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4344 // CHECK9-NEXT: entry:
4345 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4346 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4347 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4348 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
4349 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4350 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4351 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4352 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4353 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
4354 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
4355 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4356 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4357 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4358 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4359 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4360 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4361 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4362 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4363 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4364 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4365 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4366 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4367 // CHECK9: cond.true:
4368 // CHECK9-NEXT: br label [[COND_END:%.*]]
4369 // CHECK9: cond.false:
4370 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4371 // CHECK9-NEXT: br label [[COND_END]]
4372 // CHECK9: cond.end:
4373 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4374 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4375 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4376 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4377 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4378 // CHECK9: omp.inner.for.cond:
4379 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20:![0-9]+]]
4380 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]
4381 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4382 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4383 // CHECK9: omp.inner.for.body:
4384 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP20]]
4385 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4386 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]
4387 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4388 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP20]]
4389 // CHECK9-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP20]]
4390 // CHECK9-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP20]]
4391 // CHECK9-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP20]]
4392 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP20]]
4393 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4394 // CHECK9: omp.inner.for.inc:
4395 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]
4396 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP20]]
4397 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
4398 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]
4399 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]
4400 // CHECK9: omp.inner.for.end:
4401 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4402 // CHECK9: omp.loop.exit:
4403 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4404 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4405 // CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
4406 // CHECK9-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4407 // CHECK9: .omp.final.then:
4408 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
4409 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
4410 // CHECK9: .omp.final.done:
4411 // CHECK9-NEXT: ret void
4412 //
4413 //
4414 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3
4415 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
4416 // CHECK9-NEXT: entry:
4417 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4418 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4419 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4420 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4421 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4422 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
4423 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4424 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4425 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4426 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4427 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
4428 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4429 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4430 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4431 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4432 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4433 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
4434 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4435 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4436 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4437 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4438 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4439 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4440 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4441 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4442 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4443 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4444 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4445 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4446 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4447 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4448 // CHECK9: cond.true:
4449 // CHECK9-NEXT: br label [[COND_END:%.*]]
4450 // CHECK9: cond.false:
4451 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4452 // CHECK9-NEXT: br label [[COND_END]]
4453 // CHECK9: cond.end:
4454 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4455 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4456 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4457 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4458 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4459 // CHECK9: omp.inner.for.cond:
4460 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23:![0-9]+]]
4461 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP23]]
4462 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4463 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4464 // CHECK9: omp.inner.for.body:
4465 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
4466 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4467 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4468 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP23]]
4469 // CHECK9-NEXT: call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP23]]
4470 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4471 // CHECK9: omp.body.continue:
4472 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4473 // CHECK9: omp.inner.for.inc:
4474 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
4475 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4476 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
4477 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
4478 // CHECK9: omp.inner.for.end:
4479 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4480 // CHECK9: omp.loop.exit:
4481 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4482 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4483 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
4484 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4485 // CHECK9: .omp.final.then:
4486 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
4487 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
4488 // CHECK9: .omp.final.done:
4489 // CHECK9-NEXT: ret void
4490 //
4491 //
4492 // CHECK9-LABEL: define {{[^@]+}}@main
4493 // CHECK9-SAME: () #[[ATTR3:[0-9]+]] {
4494 // CHECK9-NEXT: entry:
4495 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
4496 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
4497 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
4498 // CHECK9-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
4499 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
4500 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
4501 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
4502 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
4503 // CHECK9-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
4504 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4
4505 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
4506 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
4507 // CHECK9-NEXT: store i32 1, i32* [[TMP0]], align 4
4508 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
4509 // CHECK9-NEXT: store i32 0, i32* [[TMP1]], align 4
4510 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
4511 // CHECK9-NEXT: store i8** null, i8*** [[TMP2]], align 8
4512 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
4513 // CHECK9-NEXT: store i8** null, i8*** [[TMP3]], align 8
4514 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
4515 // CHECK9-NEXT: store i64* null, i64** [[TMP4]], align 8
4516 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
4517 // CHECK9-NEXT: store i64* null, i64** [[TMP5]], align 8
4518 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
4519 // CHECK9-NEXT: store i8** null, i8*** [[TMP6]], align 8
4520 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
4521 // CHECK9-NEXT: store i8** null, i8*** [[TMP7]], align 8
4522 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
4523 // CHECK9-NEXT: store i64 100, i64* [[TMP8]], align 8
4524 // CHECK9-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
4525 // CHECK9-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
4526 // CHECK9-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4527 // CHECK9: omp_offload.failed:
4528 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76() #[[ATTR2]]
4529 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
4530 // CHECK9: omp_offload.cont:
4531 // CHECK9-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
4532 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
4533 // CHECK9-NEXT: store i32 1, i32* [[TMP11]], align 4
4534 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
4535 // CHECK9-NEXT: store i32 0, i32* [[TMP12]], align 4
4536 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
4537 // CHECK9-NEXT: store i8** null, i8*** [[TMP13]], align 8
4538 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
4539 // CHECK9-NEXT: store i8** null, i8*** [[TMP14]], align 8
4540 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
4541 // CHECK9-NEXT: store i64* null, i64** [[TMP15]], align 8
4542 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
4543 // CHECK9-NEXT: store i64* null, i64** [[TMP16]], align 8
4544 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
4545 // CHECK9-NEXT: store i8** null, i8*** [[TMP17]], align 8
4546 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
4547 // CHECK9-NEXT: store i8** null, i8*** [[TMP18]], align 8
4548 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
4549 // CHECK9-NEXT: store i64 100, i64* [[TMP19]], align 8
4550 // CHECK9-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l84.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
4551 // CHECK9-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
4552 // CHECK9-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
4553 // CHECK9: omp_offload.failed3:
4554 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l84() #[[ATTR2]]
4555 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT4]]
4556 // CHECK9: omp_offload.cont4:
4557 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* @Arg, align 4
4558 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
4559 // CHECK9-NEXT: store i32 [[TMP22]], i32* [[CONV]], align 4
4560 // CHECK9-NEXT: [[TMP23:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
4561 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4562 // CHECK9-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64*
4563 // CHECK9-NEXT: store i64 [[TMP23]], i64* [[TMP25]], align 8
4564 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4565 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64*
4566 // CHECK9-NEXT: store i64 [[TMP23]], i64* [[TMP27]], align 8
4567 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
4568 // CHECK9-NEXT: store i8* null, i8** [[TMP28]], align 8
4569 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4570 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4571 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* @Arg, align 4
4572 // CHECK9-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP31]], 0
4573 // CHECK9-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
4574 // CHECK9-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
4575 // CHECK9-NEXT: [[TMP32:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
4576 // CHECK9-NEXT: [[TOBOOL5:%.*]] = trunc i8 [[TMP32]] to i1
4577 // CHECK9-NEXT: [[TMP33:%.*]] = select i1 [[TOBOOL5]], i32 0, i32 1
4578 // CHECK9-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
4579 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 0
4580 // CHECK9-NEXT: store i32 1, i32* [[TMP34]], align 4
4581 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 1
4582 // CHECK9-NEXT: store i32 1, i32* [[TMP35]], align 4
4583 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 2
4584 // CHECK9-NEXT: store i8** [[TMP29]], i8*** [[TMP36]], align 8
4585 // CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 3
4586 // CHECK9-NEXT: store i8** [[TMP30]], i8*** [[TMP37]], align 8
4587 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 4
4588 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP38]], align 8
4589 // CHECK9-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 5
4590 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP39]], align 8
4591 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 6
4592 // CHECK9-NEXT: store i8** null, i8*** [[TMP40]], align 8
4593 // CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 7
4594 // CHECK9-NEXT: store i8** null, i8*** [[TMP41]], align 8
4595 // CHECK9-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 8
4596 // CHECK9-NEXT: store i64 100, i64* [[TMP42]], align 8
4597 // CHECK9-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 [[TMP33]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]])
4598 // CHECK9-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
4599 // CHECK9-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]
4600 // CHECK9: omp_offload.failed8:
4601 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92(i64 [[TMP23]]) #[[ATTR2]]
4602 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT9]]
4603 // CHECK9: omp_offload.cont9:
4604 // CHECK9-NEXT: [[TMP45:%.*]] = load i32, i32* @Arg, align 4
4605 // CHECK9-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP45]])
4606 // CHECK9-NEXT: ret i32 [[CALL]]
4607 //
4608 //
4609 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76
4610 // CHECK9-SAME: () #[[ATTR1]] {
4611 // CHECK9-NEXT: entry:
4612 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
4613 // CHECK9-NEXT: ret void
4614 //
4615 //
4616 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..4
4617 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4618 // CHECK9-NEXT: entry:
4619 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4620 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4621 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4622 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
4623 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4624 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4625 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4626 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4627 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
4628 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4629 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4630 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4631 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4632 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4633 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4634 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4635 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4636 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4637 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4638 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4639 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4640 // CHECK9: cond.true:
4641 // CHECK9-NEXT: br label [[COND_END:%.*]]
4642 // CHECK9: cond.false:
4643 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4644 // CHECK9-NEXT: br label [[COND_END]]
4645 // CHECK9: cond.end:
4646 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4647 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4648 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4649 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4650 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4651 // CHECK9: omp.inner.for.cond:
4652 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26:![0-9]+]]
4653 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]]
4654 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4655 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4656 // CHECK9: omp.inner.for.body:
4657 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP26]]
4658 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4659 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]]
4660 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4661 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP26]]
4662 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4663 // CHECK9: omp.inner.for.inc:
4664 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]
4665 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP26]]
4666 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
4667 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]
4668 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]
4669 // CHECK9: omp.inner.for.end:
4670 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4671 // CHECK9: omp.loop.exit:
4672 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4673 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4674 // CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
4675 // CHECK9-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4676 // CHECK9: .omp.final.then:
4677 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
4678 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
4679 // CHECK9: .omp.final.done:
4680 // CHECK9-NEXT: ret void
4681 //
4682 //
4683 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..5
4684 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
4685 // CHECK9-NEXT: entry:
4686 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4687 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4688 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4689 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4690 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4691 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
4692 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4693 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4694 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4695 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4696 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
4697 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4698 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4699 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4700 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4701 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4702 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
4703 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4704 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4705 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4706 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4707 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4708 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4709 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4710 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4711 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4712 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4713 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4714 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4715 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4716 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4717 // CHECK9: cond.true:
4718 // CHECK9-NEXT: br label [[COND_END:%.*]]
4719 // CHECK9: cond.false:
4720 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4721 // CHECK9-NEXT: br label [[COND_END]]
4722 // CHECK9: cond.end:
4723 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4724 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4725 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4726 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4727 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4728 // CHECK9: omp.inner.for.cond:
4729 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29:![0-9]+]]
4730 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP29]]
4731 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4732 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4733 // CHECK9: omp.inner.for.body:
4734 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
4735 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4736 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4737 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP29]]
4738 // CHECK9-NEXT: call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP29]]
4739 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4740 // CHECK9: omp.body.continue:
4741 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4742 // CHECK9: omp.inner.for.inc:
4743 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
4744 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4745 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
4746 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]
4747 // CHECK9: omp.inner.for.end:
4748 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4749 // CHECK9: omp.loop.exit:
4750 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4751 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4752 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
4753 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4754 // CHECK9: .omp.final.then:
4755 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
4756 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
4757 // CHECK9: .omp.final.done:
4758 // CHECK9-NEXT: ret void
4759 //
4760 //
4761 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l84
4762 // CHECK9-SAME: () #[[ATTR1]] {
4763 // CHECK9-NEXT: entry:
4764 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
4765 // CHECK9-NEXT: ret void
4766 //
4767 //
4768 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..6
4769 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4770 // CHECK9-NEXT: entry:
4771 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4772 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4773 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4774 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
4775 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4776 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4777 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4778 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4779 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
4780 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
4781 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4782 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4783 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4784 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4785 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4786 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4787 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4788 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4789 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4790 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4791 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4792 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4793 // CHECK9: cond.true:
4794 // CHECK9-NEXT: br label [[COND_END:%.*]]
4795 // CHECK9: cond.false:
4796 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4797 // CHECK9-NEXT: br label [[COND_END]]
4798 // CHECK9: cond.end:
4799 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4800 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4801 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4802 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4803 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4804 // CHECK9: omp.inner.for.cond:
4805 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32:![0-9]+]]
4806 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP32]]
4807 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4808 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4809 // CHECK9: omp.inner.for.body:
4810 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP32]]
4811 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4812 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP32]]
4813 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4814 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP32]]
4815 // CHECK9-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP32]]
4816 // CHECK9-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP32]]
4817 // CHECK9-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP32]]
4818 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP32]]
4819 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4820 // CHECK9: omp.inner.for.inc:
4821 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32]]
4822 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP32]]
4823 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
4824 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32]]
4825 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]]
4826 // CHECK9: omp.inner.for.end:
4827 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4828 // CHECK9: omp.loop.exit:
4829 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
4830 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4831 // CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
4832 // CHECK9-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4833 // CHECK9: .omp.final.then:
4834 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
4835 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
4836 // CHECK9: .omp.final.done:
4837 // CHECK9-NEXT: ret void
4838 //
4839 //
4840 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..7
4841 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
4842 // CHECK9-NEXT: entry:
4843 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4844 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4845 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4846 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4847 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4848 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
4849 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4850 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4851 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4852 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4853 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
4854 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4855 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4856 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4857 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4858 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4859 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
4860 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4861 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4862 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4863 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4864 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4865 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4866 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4867 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4868 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4869 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
4870 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4871 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4872 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4873 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4874 // CHECK9: cond.true:
4875 // CHECK9-NEXT: br label [[COND_END:%.*]]
4876 // CHECK9: cond.false:
4877 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4878 // CHECK9-NEXT: br label [[COND_END]]
4879 // CHECK9: cond.end:
4880 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4881 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4882 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4883 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
4884 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4885 // CHECK9: omp.inner.for.cond:
4886 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35:![0-9]+]]
4887 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP35]]
4888 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4889 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4890 // CHECK9: omp.inner.for.body:
4891 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]
4892 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4893 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4894 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP35]]
4895 // CHECK9-NEXT: call void @_Z3fn5v(), !llvm.access.group [[ACC_GRP35]]
4896 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4897 // CHECK9: omp.body.continue:
4898 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4899 // CHECK9: omp.inner.for.inc:
4900 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]
4901 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4902 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]
4903 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]
4904 // CHECK9: omp.inner.for.end:
4905 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4906 // CHECK9: omp.loop.exit:
4907 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
4908 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
4909 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
4910 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4911 // CHECK9: .omp.final.then:
4912 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
4913 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
4914 // CHECK9: .omp.final.done:
4915 // CHECK9-NEXT: ret void
4916 //
4917 //
4918 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92
4919 // CHECK9-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] {
4920 // CHECK9-NEXT: entry:
4921 // CHECK9-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
4922 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
4923 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
4924 // CHECK9-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
4925 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
4926 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 4
4927 // CHECK9-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
4928 // CHECK9-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
4929 // CHECK9-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
4930 // CHECK9-NEXT: [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
4931 // CHECK9-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1
4932 // CHECK9-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
4933 // CHECK9-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8
4934 // CHECK9-NEXT: store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
4935 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
4936 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i64 [[TMP2]])
4937 // CHECK9-NEXT: ret void
4938 //
4939 //
4940 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..8
4941 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
4942 // CHECK9-NEXT: entry:
4943 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4944 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4945 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
4946 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4947 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
4948 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4949 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4950 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4951 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4952 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
4953 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
4954 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4955 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4956 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
4957 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
4958 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4959 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
4960 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4961 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4962 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4963 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
4964 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4965 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4966 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4967 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4968 // CHECK9: cond.true:
4969 // CHECK9-NEXT: br label [[COND_END:%.*]]
4970 // CHECK9: cond.false:
4971 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4972 // CHECK9-NEXT: br label [[COND_END]]
4973 // CHECK9: cond.end:
4974 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4975 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4976 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4977 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
4978 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4979 // CHECK9: omp.inner.for.cond:
4980 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38:![0-9]+]]
4981 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP38]]
4982 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4983 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4984 // CHECK9: omp.inner.for.body:
4985 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP38]]
4986 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4987 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP38]]
4988 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4989 // CHECK9-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 1, !llvm.access.group [[ACC_GRP38]]
4990 // CHECK9-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
4991 // CHECK9-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
4992 // CHECK9: omp_if.then:
4993 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP38]]
4994 // CHECK9-NEXT: br label [[OMP_IF_END:%.*]]
4995 // CHECK9: omp_if.else:
4996 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP38]]
4997 // CHECK9-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP38]]
4998 // CHECK9-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP38]]
4999 // CHECK9-NEXT: call void @.omp_outlined..9(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP38]]
5000 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP38]]
5001 // CHECK9-NEXT: br label [[OMP_IF_END]]
5002 // CHECK9: omp_if.end:
5003 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5004 // CHECK9: omp.inner.for.inc:
5005 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]]
5006 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP38]]
5007 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
5008 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]]
5009 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]]
5010 // CHECK9: omp.inner.for.end:
5011 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5012 // CHECK9: omp.loop.exit:
5013 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
5014 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5015 // CHECK9-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
5016 // CHECK9-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5017 // CHECK9: .omp.final.then:
5018 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
5019 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
5020 // CHECK9: .omp.final.done:
5021 // CHECK9-NEXT: ret void
5022 //
5023 //
5024 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..9
5025 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5026 // CHECK9-NEXT: entry:
5027 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5028 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5029 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5030 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5031 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5032 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
5033 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5034 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5035 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5036 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5037 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
5038 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5039 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5040 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5041 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5042 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5043 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
5044 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5045 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5046 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5047 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5048 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5049 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5050 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5051 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5052 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5053 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5054 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5055 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5056 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5057 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5058 // CHECK9: cond.true:
5059 // CHECK9-NEXT: br label [[COND_END:%.*]]
5060 // CHECK9: cond.false:
5061 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5062 // CHECK9-NEXT: br label [[COND_END]]
5063 // CHECK9: cond.end:
5064 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5065 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5066 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5067 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5068 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5069 // CHECK9: omp.inner.for.cond:
5070 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41:![0-9]+]]
5071 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP41]]
5072 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5073 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5074 // CHECK9: omp.inner.for.body:
5075 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41]]
5076 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5077 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5078 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP41]]
5079 // CHECK9-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP41]]
5080 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5081 // CHECK9: omp.body.continue:
5082 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5083 // CHECK9: omp.inner.for.inc:
5084 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41]]
5085 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5086 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41]]
5087 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP42:![0-9]+]]
5088 // CHECK9: omp.inner.for.end:
5089 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5090 // CHECK9: omp.loop.exit:
5091 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5092 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5093 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
5094 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5095 // CHECK9: .omp.final.then:
5096 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
5097 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
5098 // CHECK9: .omp.final.done:
5099 // CHECK9-NEXT: ret void
5100 //
5101 //
5102 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
5103 // CHECK9-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {
5104 // CHECK9-NEXT: entry:
5105 // CHECK9-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
5106 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
5107 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
5108 // CHECK9-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
5109 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
5110 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
5111 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
5112 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
5113 // CHECK9-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
5114 // CHECK9-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
5115 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
5116 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
5117 // CHECK9-NEXT: store i32 1, i32* [[TMP0]], align 4
5118 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
5119 // CHECK9-NEXT: store i32 0, i32* [[TMP1]], align 4
5120 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
5121 // CHECK9-NEXT: store i8** null, i8*** [[TMP2]], align 8
5122 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
5123 // CHECK9-NEXT: store i8** null, i8*** [[TMP3]], align 8
5124 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
5125 // CHECK9-NEXT: store i64* null, i64** [[TMP4]], align 8
5126 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
5127 // CHECK9-NEXT: store i64* null, i64** [[TMP5]], align 8
5128 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
5129 // CHECK9-NEXT: store i8** null, i8*** [[TMP6]], align 8
5130 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
5131 // CHECK9-NEXT: store i8** null, i8*** [[TMP7]], align 8
5132 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
5133 // CHECK9-NEXT: store i64 100, i64* [[TMP8]], align 8
5134 // CHECK9-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l57.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
5135 // CHECK9-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
5136 // CHECK9-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5137 // CHECK9: omp_offload.failed:
5138 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l57() #[[ATTR2]]
5139 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
5140 // CHECK9: omp_offload.cont:
5141 // CHECK9-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
5142 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
5143 // CHECK9-NEXT: store i32 1, i32* [[TMP11]], align 4
5144 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
5145 // CHECK9-NEXT: store i32 0, i32* [[TMP12]], align 4
5146 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
5147 // CHECK9-NEXT: store i8** null, i8*** [[TMP13]], align 8
5148 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
5149 // CHECK9-NEXT: store i8** null, i8*** [[TMP14]], align 8
5150 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
5151 // CHECK9-NEXT: store i64* null, i64** [[TMP15]], align 8
5152 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
5153 // CHECK9-NEXT: store i64* null, i64** [[TMP16]], align 8
5154 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
5155 // CHECK9-NEXT: store i8** null, i8*** [[TMP17]], align 8
5156 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
5157 // CHECK9-NEXT: store i8** null, i8*** [[TMP18]], align 8
5158 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
5159 // CHECK9-NEXT: store i64 100, i64* [[TMP19]], align 8
5160 // CHECK9-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
5161 // CHECK9-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
5162 // CHECK9-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
5163 // CHECK9: omp_offload.failed3:
5164 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]]
5165 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT4]]
5166 // CHECK9: omp_offload.cont4:
5167 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
5168 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
5169 // CHECK9-NEXT: store i32 [[TMP22]], i32* [[CONV]], align 4
5170 // CHECK9-NEXT: [[TMP23:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
5171 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5172 // CHECK9-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64*
5173 // CHECK9-NEXT: store i64 [[TMP23]], i64* [[TMP25]], align 8
5174 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5175 // CHECK9-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64*
5176 // CHECK9-NEXT: store i64 [[TMP23]], i64* [[TMP27]], align 8
5177 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
5178 // CHECK9-NEXT: store i8* null, i8** [[TMP28]], align 8
5179 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5180 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5181 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
5182 // CHECK9-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP31]], 0
5183 // CHECK9-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
5184 // CHECK9-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
5185 // CHECK9-NEXT: [[TMP32:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
5186 // CHECK9-NEXT: [[TOBOOL5:%.*]] = trunc i8 [[TMP32]] to i1
5187 // CHECK9-NEXT: [[TMP33:%.*]] = select i1 [[TOBOOL5]], i32 0, i32 1
5188 // CHECK9-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
5189 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 0
5190 // CHECK9-NEXT: store i32 1, i32* [[TMP34]], align 4
5191 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 1
5192 // CHECK9-NEXT: store i32 1, i32* [[TMP35]], align 4
5193 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 2
5194 // CHECK9-NEXT: store i8** [[TMP29]], i8*** [[TMP36]], align 8
5195 // CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 3
5196 // CHECK9-NEXT: store i8** [[TMP30]], i8*** [[TMP37]], align 8
5197 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 4
5198 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64** [[TMP38]], align 8
5199 // CHECK9-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 5
5200 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i64** [[TMP39]], align 8
5201 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 6
5202 // CHECK9-NEXT: store i8** null, i8*** [[TMP40]], align 8
5203 // CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 7
5204 // CHECK9-NEXT: store i8** null, i8*** [[TMP41]], align 8
5205 // CHECK9-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 8
5206 // CHECK9-NEXT: store i64 100, i64* [[TMP42]], align 8
5207 // CHECK9-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 [[TMP33]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]])
5208 // CHECK9-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
5209 // CHECK9-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]
5210 // CHECK9: omp_offload.failed8:
5211 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67(i64 [[TMP23]]) #[[ATTR2]]
5212 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT9]]
5213 // CHECK9: omp_offload.cont9:
5214 // CHECK9-NEXT: ret i32 0
5215 //
5216 //
5217 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l57
5218 // CHECK9-SAME: () #[[ATTR1]] {
5219 // CHECK9-NEXT: entry:
5220 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*))
5221 // CHECK9-NEXT: ret void
5222 //
5223 //
5224 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..10
5225 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
5226 // CHECK9-NEXT: entry:
5227 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5228 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5229 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5230 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
5231 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5232 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5233 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5234 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5235 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
5236 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5237 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5238 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5239 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
5240 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5241 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5242 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5243 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5244 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5245 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5246 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5247 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5248 // CHECK9: cond.true:
5249 // CHECK9-NEXT: br label [[COND_END:%.*]]
5250 // CHECK9: cond.false:
5251 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5252 // CHECK9-NEXT: br label [[COND_END]]
5253 // CHECK9: cond.end:
5254 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5255 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5256 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5257 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5258 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5259 // CHECK9: omp.inner.for.cond:
5260 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44:![0-9]+]]
5261 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP44]]
5262 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5263 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5264 // CHECK9: omp.inner.for.body:
5265 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP44]]
5266 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5267 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP44]]
5268 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5269 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP44]]
5270 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5271 // CHECK9: omp.inner.for.inc:
5272 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44]]
5273 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP44]]
5274 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
5275 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44]]
5276 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP45:![0-9]+]]
5277 // CHECK9: omp.inner.for.end:
5278 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5279 // CHECK9: omp.loop.exit:
5280 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
5281 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5282 // CHECK9-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
5283 // CHECK9-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5284 // CHECK9: .omp.final.then:
5285 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
5286 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
5287 // CHECK9: .omp.final.done:
5288 // CHECK9-NEXT: ret void
5289 //
5290 //
5291 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..11
5292 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5293 // CHECK9-NEXT: entry:
5294 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5295 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5296 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5297 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5298 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5299 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
5300 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5301 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5302 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5303 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5304 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
5305 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5306 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5307 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5308 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5309 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5310 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
5311 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5312 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5313 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5314 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5315 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5316 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5317 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5318 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5319 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5320 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5321 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5322 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5323 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5324 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5325 // CHECK9: cond.true:
5326 // CHECK9-NEXT: br label [[COND_END:%.*]]
5327 // CHECK9: cond.false:
5328 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5329 // CHECK9-NEXT: br label [[COND_END]]
5330 // CHECK9: cond.end:
5331 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5332 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5333 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5334 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5335 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5336 // CHECK9: omp.inner.for.cond:
5337 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47:![0-9]+]]
5338 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP47]]
5339 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5340 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5341 // CHECK9: omp.inner.for.body:
5342 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]
5343 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5344 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5345 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP47]]
5346 // CHECK9-NEXT: call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP47]]
5347 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5348 // CHECK9: omp.body.continue:
5349 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5350 // CHECK9: omp.inner.for.inc:
5351 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]
5352 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5353 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]
5354 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]]
5355 // CHECK9: omp.inner.for.end:
5356 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5357 // CHECK9: omp.loop.exit:
5358 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5359 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5360 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
5361 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5362 // CHECK9: .omp.final.then:
5363 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
5364 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
5365 // CHECK9: .omp.final.done:
5366 // CHECK9-NEXT: ret void
5367 //
5368 //
5369 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62
5370 // CHECK9-SAME: () #[[ATTR1]] {
5371 // CHECK9-NEXT: entry:
5372 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..12 to void (i32*, i32*, ...)*))
5373 // CHECK9-NEXT: ret void
5374 //
5375 //
5376 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..12
5377 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
5378 // CHECK9-NEXT: entry:
5379 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5380 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5381 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5382 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
5383 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5384 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5385 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5386 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5387 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
5388 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
5389 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5390 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5391 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5392 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
5393 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5394 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5395 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5396 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5397 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5398 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5399 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5400 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5401 // CHECK9: cond.true:
5402 // CHECK9-NEXT: br label [[COND_END:%.*]]
5403 // CHECK9: cond.false:
5404 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5405 // CHECK9-NEXT: br label [[COND_END]]
5406 // CHECK9: cond.end:
5407 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5408 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5409 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5410 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5411 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5412 // CHECK9: omp.inner.for.cond:
5413 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50:![0-9]+]]
5414 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP50]]
5415 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5416 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5417 // CHECK9: omp.inner.for.body:
5418 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP50]]
5419 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5420 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP50]]
5421 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5422 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP50]]
5423 // CHECK9-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP50]]
5424 // CHECK9-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP50]]
5425 // CHECK9-NEXT: call void @.omp_outlined..13(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP50]]
5426 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP50]]
5427 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5428 // CHECK9: omp.inner.for.inc:
5429 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]
5430 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP50]]
5431 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
5432 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]
5433 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP51:![0-9]+]]
5434 // CHECK9: omp.inner.for.end:
5435 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5436 // CHECK9: omp.loop.exit:
5437 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
5438 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5439 // CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
5440 // CHECK9-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5441 // CHECK9: .omp.final.then:
5442 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
5443 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
5444 // CHECK9: .omp.final.done:
5445 // CHECK9-NEXT: ret void
5446 //
5447 //
5448 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..13
5449 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5450 // CHECK9-NEXT: entry:
5451 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5452 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5453 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5454 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5455 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5456 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
5457 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5458 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5459 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5460 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5461 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
5462 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5463 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5464 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5465 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5466 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5467 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
5468 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5469 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5470 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5471 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5472 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5473 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5474 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5475 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5476 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5477 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5478 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5479 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5480 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5481 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5482 // CHECK9: cond.true:
5483 // CHECK9-NEXT: br label [[COND_END:%.*]]
5484 // CHECK9: cond.false:
5485 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5486 // CHECK9-NEXT: br label [[COND_END]]
5487 // CHECK9: cond.end:
5488 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5489 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5490 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5491 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5492 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5493 // CHECK9: omp.inner.for.cond:
5494 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53:![0-9]+]]
5495 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP53]]
5496 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5497 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5498 // CHECK9: omp.inner.for.body:
5499 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53]]
5500 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5501 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5502 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP53]]
5503 // CHECK9-NEXT: call void @_Z3fn2v(), !llvm.access.group [[ACC_GRP53]]
5504 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5505 // CHECK9: omp.body.continue:
5506 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5507 // CHECK9: omp.inner.for.inc:
5508 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53]]
5509 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5510 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53]]
5511 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP54:![0-9]+]]
5512 // CHECK9: omp.inner.for.end:
5513 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5514 // CHECK9: omp.loop.exit:
5515 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5516 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5517 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
5518 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5519 // CHECK9: .omp.final.then:
5520 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
5521 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
5522 // CHECK9: .omp.final.done:
5523 // CHECK9-NEXT: ret void
5524 //
5525 //
5526 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67
5527 // CHECK9-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] {
5528 // CHECK9-NEXT: entry:
5529 // CHECK9-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
5530 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
5531 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
5532 // CHECK9-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
5533 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
5534 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 4
5535 // CHECK9-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
5536 // CHECK9-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
5537 // CHECK9-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
5538 // CHECK9-NEXT: [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
5539 // CHECK9-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1
5540 // CHECK9-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
5541 // CHECK9-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8
5542 // CHECK9-NEXT: store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
5543 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
5544 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i64 [[TMP2]])
5545 // CHECK9-NEXT: ret void
5546 //
5547 //
5548 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..14
5549 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
5550 // CHECK9-NEXT: entry:
5551 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5552 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5553 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
5554 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5555 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
5556 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5557 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5558 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5559 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5560 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
5561 // CHECK9-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
5562 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5563 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5564 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
5565 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
5566 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5567 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
5568 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5569 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5570 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5571 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5572 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5573 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5574 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5575 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5576 // CHECK9: cond.true:
5577 // CHECK9-NEXT: br label [[COND_END:%.*]]
5578 // CHECK9: cond.false:
5579 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5580 // CHECK9-NEXT: br label [[COND_END]]
5581 // CHECK9: cond.end:
5582 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5583 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5584 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5585 // CHECK9-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5586 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5587 // CHECK9: omp.inner.for.cond:
5588 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP56:![0-9]+]]
5589 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP56]]
5590 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5591 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5592 // CHECK9: omp.inner.for.body:
5593 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP56]]
5594 // CHECK9-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5595 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP56]]
5596 // CHECK9-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5597 // CHECK9-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 1, !llvm.access.group [[ACC_GRP56]]
5598 // CHECK9-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
5599 // CHECK9-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
5600 // CHECK9: omp_if.then:
5601 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP56]]
5602 // CHECK9-NEXT: br label [[OMP_IF_END:%.*]]
5603 // CHECK9: omp_if.else:
5604 // CHECK9-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP56]]
5605 // CHECK9-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP56]]
5606 // CHECK9-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP56]]
5607 // CHECK9-NEXT: call void @.omp_outlined..15(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP56]]
5608 // CHECK9-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP56]]
5609 // CHECK9-NEXT: br label [[OMP_IF_END]]
5610 // CHECK9: omp_if.end:
5611 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5612 // CHECK9: omp.inner.for.inc:
5613 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP56]]
5614 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP56]]
5615 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
5616 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP56]]
5617 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP57:![0-9]+]]
5618 // CHECK9: omp.inner.for.end:
5619 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5620 // CHECK9: omp.loop.exit:
5621 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
5622 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5623 // CHECK9-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
5624 // CHECK9-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5625 // CHECK9: .omp.final.then:
5626 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
5627 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
5628 // CHECK9: .omp.final.done:
5629 // CHECK9-NEXT: ret void
5630 //
5631 //
5632 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..15
5633 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5634 // CHECK9-NEXT: entry:
5635 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5636 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5637 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5638 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5639 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5640 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
5641 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5642 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5643 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5644 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5645 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
5646 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5647 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5648 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5649 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5650 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5651 // CHECK9-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
5652 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5653 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5654 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5655 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5656 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5657 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5658 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5659 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5660 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5661 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5662 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5663 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5664 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5665 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5666 // CHECK9: cond.true:
5667 // CHECK9-NEXT: br label [[COND_END:%.*]]
5668 // CHECK9: cond.false:
5669 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5670 // CHECK9-NEXT: br label [[COND_END]]
5671 // CHECK9: cond.end:
5672 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5673 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5674 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5675 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5676 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5677 // CHECK9: omp.inner.for.cond:
5678 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59:![0-9]+]]
5679 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP59]]
5680 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5681 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5682 // CHECK9: omp.inner.for.body:
5683 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59]]
5684 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5685 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5686 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP59]]
5687 // CHECK9-NEXT: call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP59]]
5688 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5689 // CHECK9: omp.body.continue:
5690 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5691 // CHECK9: omp.inner.for.inc:
5692 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59]]
5693 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5694 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59]]
5695 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP60:![0-9]+]]
5696 // CHECK9: omp.inner.for.end:
5697 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5698 // CHECK9: omp.loop.exit:
5699 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5700 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5701 // CHECK9-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
5702 // CHECK9-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5703 // CHECK9: .omp.final.then:
5704 // CHECK9-NEXT: store i32 100, i32* [[I]], align 4
5705 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
5706 // CHECK9: .omp.final.done:
5707 // CHECK9-NEXT: ret void
5708 //
5709 //
5710 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
5711 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] {
5712 // CHECK9-NEXT: entry:
5713 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1)
5714 // CHECK9-NEXT: ret void
5715 //
5716 //
5717 // CHECK11-LABEL: define {{[^@]+}}@_Z9gtid_testv
5718 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] {
5719 // CHECK11-NEXT: entry:
5720 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
5721 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
5722 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
5723 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
5724 // CHECK11-NEXT: store i32 1, i32* [[TMP0]], align 4
5725 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
5726 // CHECK11-NEXT: store i32 0, i32* [[TMP1]], align 4
5727 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
5728 // CHECK11-NEXT: store i8** null, i8*** [[TMP2]], align 8
5729 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
5730 // CHECK11-NEXT: store i8** null, i8*** [[TMP3]], align 8
5731 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
5732 // CHECK11-NEXT: store i64* null, i64** [[TMP4]], align 8
5733 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
5734 // CHECK11-NEXT: store i64* null, i64** [[TMP5]], align 8
5735 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
5736 // CHECK11-NEXT: store i8** null, i8*** [[TMP6]], align 8
5737 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
5738 // CHECK11-NEXT: store i8** null, i8*** [[TMP7]], align 8
5739 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
5740 // CHECK11-NEXT: store i64 100, i64* [[TMP8]], align 8
5741 // CHECK11-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
5742 // CHECK11-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
5743 // CHECK11-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5744 // CHECK11: omp_offload.failed:
5745 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43() #[[ATTR2:[0-9]+]]
5746 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
5747 // CHECK11: omp_offload.cont:
5748 // CHECK11-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
5749 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
5750 // CHECK11-NEXT: store i32 1, i32* [[TMP11]], align 4
5751 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
5752 // CHECK11-NEXT: store i32 0, i32* [[TMP12]], align 4
5753 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
5754 // CHECK11-NEXT: store i8** null, i8*** [[TMP13]], align 8
5755 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
5756 // CHECK11-NEXT: store i8** null, i8*** [[TMP14]], align 8
5757 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
5758 // CHECK11-NEXT: store i64* null, i64** [[TMP15]], align 8
5759 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
5760 // CHECK11-NEXT: store i64* null, i64** [[TMP16]], align 8
5761 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
5762 // CHECK11-NEXT: store i8** null, i8*** [[TMP17]], align 8
5763 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
5764 // CHECK11-NEXT: store i8** null, i8*** [[TMP18]], align 8
5765 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
5766 // CHECK11-NEXT: store i64 100, i64* [[TMP19]], align 8
5767 // CHECK11-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
5768 // CHECK11-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
5769 // CHECK11-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
5770 // CHECK11: omp_offload.failed3:
5771 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47() #[[ATTR2]]
5772 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT4]]
5773 // CHECK11: omp_offload.cont4:
5774 // CHECK11-NEXT: ret void
5775 //
5776 //
5777 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43
5778 // CHECK11-SAME: () #[[ATTR1:[0-9]+]] {
5779 // CHECK11-NEXT: entry:
5780 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*))
5781 // CHECK11-NEXT: ret void
5782 //
5783 //
5784 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined.
5785 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
5786 // CHECK11-NEXT: entry:
5787 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5788 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5789 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5790 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
5791 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5792 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5793 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5794 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5795 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
5796 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5797 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5798 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5799 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
5800 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5801 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5802 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5803 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5804 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5805 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5806 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5807 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5808 // CHECK11: cond.true:
5809 // CHECK11-NEXT: br label [[COND_END:%.*]]
5810 // CHECK11: cond.false:
5811 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5812 // CHECK11-NEXT: br label [[COND_END]]
5813 // CHECK11: cond.end:
5814 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5815 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5816 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5817 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5818 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5819 // CHECK11: omp.inner.for.cond:
5820 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]]
5821 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]
5822 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5823 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5824 // CHECK11: omp.inner.for.body:
5825 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP11]]
5826 // CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5827 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]
5828 // CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5829 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP11]]
5830 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5831 // CHECK11: omp.inner.for.inc:
5832 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
5833 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP11]]
5834 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
5835 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
5836 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
5837 // CHECK11: omp.inner.for.end:
5838 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5839 // CHECK11: omp.loop.exit:
5840 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
5841 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5842 // CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
5843 // CHECK11-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5844 // CHECK11: .omp.final.then:
5845 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
5846 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
5847 // CHECK11: .omp.final.done:
5848 // CHECK11-NEXT: ret void
5849 //
5850 //
5851 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1
5852 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5853 // CHECK11-NEXT: entry:
5854 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5855 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5856 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5857 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5858 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5859 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
5860 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5861 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5862 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5863 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5864 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
5865 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5866 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5867 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5868 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5869 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5870 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
5871 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5872 // CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5873 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5874 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5875 // CHECK11-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5876 // CHECK11-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5877 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5878 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5879 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5880 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
5881 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5882 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5883 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5884 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5885 // CHECK11: cond.true:
5886 // CHECK11-NEXT: br label [[COND_END:%.*]]
5887 // CHECK11: cond.false:
5888 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5889 // CHECK11-NEXT: br label [[COND_END]]
5890 // CHECK11: cond.end:
5891 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5892 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5893 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5894 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
5895 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5896 // CHECK11: omp.inner.for.cond:
5897 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
5898 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]]
5899 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5900 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5901 // CHECK11: omp.inner.for.body:
5902 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
5903 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5904 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5905 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP15]]
5906 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5907 // CHECK11: omp.body.continue:
5908 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5909 // CHECK11: omp.inner.for.inc:
5910 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
5911 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5912 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
5913 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
5914 // CHECK11: omp.inner.for.end:
5915 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5916 // CHECK11: omp.loop.exit:
5917 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
5918 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5919 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
5920 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5921 // CHECK11: .omp.final.then:
5922 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
5923 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
5924 // CHECK11: .omp.final.done:
5925 // CHECK11-NEXT: ret void
5926 //
5927 //
5928 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l47
5929 // CHECK11-SAME: () #[[ATTR1]] {
5930 // CHECK11-NEXT: entry:
5931 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*))
5932 // CHECK11-NEXT: ret void
5933 //
5934 //
5935 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2
5936 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
5937 // CHECK11-NEXT: entry:
5938 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5939 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5940 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5941 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
5942 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5943 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5944 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5945 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5946 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
5947 // CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
5948 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5949 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5950 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5951 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
5952 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5953 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5954 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5955 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
5956 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5957 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5958 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5959 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5960 // CHECK11: cond.true:
5961 // CHECK11-NEXT: br label [[COND_END:%.*]]
5962 // CHECK11: cond.false:
5963 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5964 // CHECK11-NEXT: br label [[COND_END]]
5965 // CHECK11: cond.end:
5966 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5967 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5968 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5969 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
5970 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5971 // CHECK11: omp.inner.for.cond:
5972 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20:![0-9]+]]
5973 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]
5974 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5975 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5976 // CHECK11: omp.inner.for.body:
5977 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP20]]
5978 // CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5979 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]
5980 // CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5981 // CHECK11-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP20]]
5982 // CHECK11-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP20]]
5983 // CHECK11-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP20]]
5984 // CHECK11-NEXT: call void @.omp_outlined..3(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP20]]
5985 // CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP20]]
5986 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5987 // CHECK11: omp.inner.for.inc:
5988 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]
5989 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP20]]
5990 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
5991 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]
5992 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]
5993 // CHECK11: omp.inner.for.end:
5994 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5995 // CHECK11: omp.loop.exit:
5996 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
5997 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
5998 // CHECK11-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
5999 // CHECK11-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6000 // CHECK11: .omp.final.then:
6001 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
6002 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
6003 // CHECK11: .omp.final.done:
6004 // CHECK11-NEXT: ret void
6005 //
6006 //
6007 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3
6008 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
6009 // CHECK11-NEXT: entry:
6010 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6011 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6012 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6013 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6014 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6015 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
6016 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6017 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6018 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6019 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6020 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
6021 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6022 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6023 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6024 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6025 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6026 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
6027 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6028 // CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6029 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6030 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6031 // CHECK11-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
6032 // CHECK11-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
6033 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6034 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6035 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6036 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
6037 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6038 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6039 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
6040 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6041 // CHECK11: cond.true:
6042 // CHECK11-NEXT: br label [[COND_END:%.*]]
6043 // CHECK11: cond.false:
6044 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6045 // CHECK11-NEXT: br label [[COND_END]]
6046 // CHECK11: cond.end:
6047 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
6048 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6049 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6050 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
6051 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6052 // CHECK11: omp.inner.for.cond:
6053 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23:![0-9]+]]
6054 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP23]]
6055 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6056 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6057 // CHECK11: omp.inner.for.body:
6058 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
6059 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
6060 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6061 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP23]]
6062 // CHECK11-NEXT: call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP23]]
6063 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6064 // CHECK11: omp.body.continue:
6065 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6066 // CHECK11: omp.inner.for.inc:
6067 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
6068 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
6069 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
6070 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
6071 // CHECK11: omp.inner.for.end:
6072 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6073 // CHECK11: omp.loop.exit:
6074 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
6075 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6076 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
6077 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6078 // CHECK11: .omp.final.then:
6079 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
6080 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
6081 // CHECK11: .omp.final.done:
6082 // CHECK11-NEXT: ret void
6083 //
6084 //
6085 // CHECK11-LABEL: define {{[^@]+}}@main
6086 // CHECK11-SAME: () #[[ATTR3:[0-9]+]] {
6087 // CHECK11-NEXT: entry:
6088 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
6089 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
6090 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
6091 // CHECK11-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
6092 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
6093 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
6094 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
6095 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
6096 // CHECK11-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
6097 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4
6098 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
6099 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
6100 // CHECK11-NEXT: store i32 1, i32* [[TMP0]], align 4
6101 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
6102 // CHECK11-NEXT: store i32 0, i32* [[TMP1]], align 4
6103 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
6104 // CHECK11-NEXT: store i8** null, i8*** [[TMP2]], align 8
6105 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
6106 // CHECK11-NEXT: store i8** null, i8*** [[TMP3]], align 8
6107 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
6108 // CHECK11-NEXT: store i64* null, i64** [[TMP4]], align 8
6109 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
6110 // CHECK11-NEXT: store i64* null, i64** [[TMP5]], align 8
6111 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
6112 // CHECK11-NEXT: store i8** null, i8*** [[TMP6]], align 8
6113 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
6114 // CHECK11-NEXT: store i8** null, i8*** [[TMP7]], align 8
6115 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
6116 // CHECK11-NEXT: store i64 100, i64* [[TMP8]], align 8
6117 // CHECK11-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
6118 // CHECK11-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
6119 // CHECK11-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
6120 // CHECK11: omp_offload.failed:
6121 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76() #[[ATTR2]]
6122 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
6123 // CHECK11: omp_offload.cont:
6124 // CHECK11-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
6125 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
6126 // CHECK11-NEXT: store i32 1, i32* [[TMP11]], align 4
6127 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
6128 // CHECK11-NEXT: store i32 0, i32* [[TMP12]], align 4
6129 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
6130 // CHECK11-NEXT: store i8** null, i8*** [[TMP13]], align 8
6131 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
6132 // CHECK11-NEXT: store i8** null, i8*** [[TMP14]], align 8
6133 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
6134 // CHECK11-NEXT: store i64* null, i64** [[TMP15]], align 8
6135 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
6136 // CHECK11-NEXT: store i64* null, i64** [[TMP16]], align 8
6137 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
6138 // CHECK11-NEXT: store i8** null, i8*** [[TMP17]], align 8
6139 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
6140 // CHECK11-NEXT: store i8** null, i8*** [[TMP18]], align 8
6141 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
6142 // CHECK11-NEXT: store i64 100, i64* [[TMP19]], align 8
6143 // CHECK11-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l84.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
6144 // CHECK11-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
6145 // CHECK11-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
6146 // CHECK11: omp_offload.failed3:
6147 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l84() #[[ATTR2]]
6148 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT4]]
6149 // CHECK11: omp_offload.cont4:
6150 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* @Arg, align 4
6151 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
6152 // CHECK11-NEXT: store i32 [[TMP22]], i32* [[CONV]], align 4
6153 // CHECK11-NEXT: [[TMP23:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
6154 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6155 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64*
6156 // CHECK11-NEXT: store i64 [[TMP23]], i64* [[TMP25]], align 8
6157 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6158 // CHECK11-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64*
6159 // CHECK11-NEXT: store i64 [[TMP23]], i64* [[TMP27]], align 8
6160 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
6161 // CHECK11-NEXT: store i8* null, i8** [[TMP28]], align 8
6162 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6163 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6164 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* @Arg, align 4
6165 // CHECK11-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP31]], 0
6166 // CHECK11-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
6167 // CHECK11-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
6168 // CHECK11-NEXT: [[TMP32:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
6169 // CHECK11-NEXT: [[TOBOOL5:%.*]] = trunc i8 [[TMP32]] to i1
6170 // CHECK11-NEXT: [[TMP33:%.*]] = select i1 [[TOBOOL5]], i32 0, i32 1
6171 // CHECK11-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
6172 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 0
6173 // CHECK11-NEXT: store i32 1, i32* [[TMP34]], align 4
6174 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 1
6175 // CHECK11-NEXT: store i32 1, i32* [[TMP35]], align 4
6176 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 2
6177 // CHECK11-NEXT: store i8** [[TMP29]], i8*** [[TMP36]], align 8
6178 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 3
6179 // CHECK11-NEXT: store i8** [[TMP30]], i8*** [[TMP37]], align 8
6180 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 4
6181 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP38]], align 8
6182 // CHECK11-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 5
6183 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP39]], align 8
6184 // CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 6
6185 // CHECK11-NEXT: store i8** null, i8*** [[TMP40]], align 8
6186 // CHECK11-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 7
6187 // CHECK11-NEXT: store i8** null, i8*** [[TMP41]], align 8
6188 // CHECK11-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 8
6189 // CHECK11-NEXT: store i64 100, i64* [[TMP42]], align 8
6190 // CHECK11-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 [[TMP33]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]])
6191 // CHECK11-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
6192 // CHECK11-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]
6193 // CHECK11: omp_offload.failed8:
6194 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92(i64 [[TMP23]]) #[[ATTR2]]
6195 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT9]]
6196 // CHECK11: omp_offload.cont9:
6197 // CHECK11-NEXT: [[TMP45:%.*]] = load i32, i32* @Arg, align 4
6198 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP45]])
6199 // CHECK11-NEXT: ret i32 [[CALL]]
6200 //
6201 //
6202 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l76
6203 // CHECK11-SAME: () #[[ATTR1]] {
6204 // CHECK11-NEXT: entry:
6205 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*))
6206 // CHECK11-NEXT: ret void
6207 //
6208 //
6209 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..4
6210 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
6211 // CHECK11-NEXT: entry:
6212 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6213 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6214 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6215 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
6216 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6217 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6218 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6219 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6220 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
6221 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6222 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6223 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6224 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
6225 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6226 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6227 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6228 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
6229 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6230 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6231 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
6232 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6233 // CHECK11: cond.true:
6234 // CHECK11-NEXT: br label [[COND_END:%.*]]
6235 // CHECK11: cond.false:
6236 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6237 // CHECK11-NEXT: br label [[COND_END]]
6238 // CHECK11: cond.end:
6239 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6240 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6241 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6242 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
6243 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6244 // CHECK11: omp.inner.for.cond:
6245 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26:![0-9]+]]
6246 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]]
6247 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
6248 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6249 // CHECK11: omp.inner.for.body:
6250 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP26]]
6251 // CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
6252 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]]
6253 // CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
6254 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP26]]
6255 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6256 // CHECK11: omp.inner.for.inc:
6257 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]
6258 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP26]]
6259 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
6260 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]
6261 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]
6262 // CHECK11: omp.inner.for.end:
6263 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6264 // CHECK11: omp.loop.exit:
6265 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
6266 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6267 // CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
6268 // CHECK11-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6269 // CHECK11: .omp.final.then:
6270 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
6271 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
6272 // CHECK11: .omp.final.done:
6273 // CHECK11-NEXT: ret void
6274 //
6275 //
6276 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..5
6277 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
6278 // CHECK11-NEXT: entry:
6279 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6280 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6281 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6282 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6283 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6284 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
6285 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6286 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6287 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6288 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6289 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
6290 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6291 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6292 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6293 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6294 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6295 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
6296 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6297 // CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6298 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6299 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6300 // CHECK11-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
6301 // CHECK11-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
6302 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6303 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6304 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6305 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
6306 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6307 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6308 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
6309 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6310 // CHECK11: cond.true:
6311 // CHECK11-NEXT: br label [[COND_END:%.*]]
6312 // CHECK11: cond.false:
6313 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6314 // CHECK11-NEXT: br label [[COND_END]]
6315 // CHECK11: cond.end:
6316 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
6317 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6318 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6319 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
6320 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6321 // CHECK11: omp.inner.for.cond:
6322 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29:![0-9]+]]
6323 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP29]]
6324 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6325 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6326 // CHECK11: omp.inner.for.body:
6327 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
6328 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
6329 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6330 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP29]]
6331 // CHECK11-NEXT: call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP29]]
6332 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6333 // CHECK11: omp.body.continue:
6334 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6335 // CHECK11: omp.inner.for.inc:
6336 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
6337 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
6338 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
6339 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]
6340 // CHECK11: omp.inner.for.end:
6341 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6342 // CHECK11: omp.loop.exit:
6343 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
6344 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6345 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
6346 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6347 // CHECK11: .omp.final.then:
6348 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
6349 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
6350 // CHECK11: .omp.final.done:
6351 // CHECK11-NEXT: ret void
6352 //
6353 //
6354 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l84
6355 // CHECK11-SAME: () #[[ATTR1]] {
6356 // CHECK11-NEXT: entry:
6357 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..6 to void (i32*, i32*, ...)*))
6358 // CHECK11-NEXT: ret void
6359 //
6360 //
6361 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..6
6362 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
6363 // CHECK11-NEXT: entry:
6364 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6365 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6366 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6367 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
6368 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6369 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6370 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6371 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6372 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
6373 // CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
6374 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6375 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6376 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6377 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
6378 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6379 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6380 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6381 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
6382 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6383 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6384 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
6385 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6386 // CHECK11: cond.true:
6387 // CHECK11-NEXT: br label [[COND_END:%.*]]
6388 // CHECK11: cond.false:
6389 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6390 // CHECK11-NEXT: br label [[COND_END]]
6391 // CHECK11: cond.end:
6392 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6393 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6394 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6395 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
6396 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6397 // CHECK11: omp.inner.for.cond:
6398 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6399 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6400 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
6401 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6402 // CHECK11: omp.inner.for.body:
6403 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6404 // CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
6405 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6406 // CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
6407 // CHECK11-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
6408 // CHECK11-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6409 // CHECK11-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
6410 // CHECK11-NEXT: call void @.omp_outlined..7(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
6411 // CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
6412 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6413 // CHECK11: omp.inner.for.inc:
6414 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6415 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6416 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
6417 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6418 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]]
6419 // CHECK11: omp.inner.for.end:
6420 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6421 // CHECK11: omp.loop.exit:
6422 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
6423 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6424 // CHECK11-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
6425 // CHECK11-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6426 // CHECK11: .omp.final.then:
6427 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
6428 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
6429 // CHECK11: .omp.final.done:
6430 // CHECK11-NEXT: ret void
6431 //
6432 //
6433 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..7
6434 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
6435 // CHECK11-NEXT: entry:
6436 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6437 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6438 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6439 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6440 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6441 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
6442 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6443 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6444 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6445 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6446 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
6447 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6448 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6449 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6450 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6451 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6452 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
6453 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6454 // CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6455 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6456 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6457 // CHECK11-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
6458 // CHECK11-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
6459 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6460 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6461 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6462 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
6463 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6464 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6465 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
6466 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6467 // CHECK11: cond.true:
6468 // CHECK11-NEXT: br label [[COND_END:%.*]]
6469 // CHECK11: cond.false:
6470 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6471 // CHECK11-NEXT: br label [[COND_END]]
6472 // CHECK11: cond.end:
6473 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
6474 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6475 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6476 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
6477 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6478 // CHECK11: omp.inner.for.cond:
6479 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6480 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6481 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6482 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6483 // CHECK11: omp.inner.for.body:
6484 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6485 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
6486 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6487 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4
6488 // CHECK11-NEXT: call void @_Z3fn5v()
6489 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6490 // CHECK11: omp.body.continue:
6491 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6492 // CHECK11: omp.inner.for.inc:
6493 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6494 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
6495 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
6496 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]
6497 // CHECK11: omp.inner.for.end:
6498 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6499 // CHECK11: omp.loop.exit:
6500 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
6501 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6502 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
6503 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6504 // CHECK11: .omp.final.then:
6505 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
6506 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
6507 // CHECK11: .omp.final.done:
6508 // CHECK11-NEXT: ret void
6509 //
6510 //
6511 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l92
6512 // CHECK11-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] {
6513 // CHECK11-NEXT: entry:
6514 // CHECK11-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
6515 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
6516 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
6517 // CHECK11-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
6518 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
6519 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 4
6520 // CHECK11-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
6521 // CHECK11-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
6522 // CHECK11-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
6523 // CHECK11-NEXT: [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
6524 // CHECK11-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1
6525 // CHECK11-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
6526 // CHECK11-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8
6527 // CHECK11-NEXT: store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
6528 // CHECK11-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
6529 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i64 [[TMP2]])
6530 // CHECK11-NEXT: ret void
6531 //
6532 //
6533 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..8
6534 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
6535 // CHECK11-NEXT: entry:
6536 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6537 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6538 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6539 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6540 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
6541 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6542 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6543 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6544 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6545 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
6546 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
6547 // CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
6548 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED11:%.*]] = alloca i64, align 8
6549 // CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR17:%.*]] = alloca i32, align 4
6550 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6551 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6552 // CHECK11-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
6553 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
6554 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6555 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
6556 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6557 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6558 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6559 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
6560 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6561 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6562 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
6563 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6564 // CHECK11: cond.true:
6565 // CHECK11-NEXT: br label [[COND_END:%.*]]
6566 // CHECK11: cond.false:
6567 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6568 // CHECK11-NEXT: br label [[COND_END]]
6569 // CHECK11: cond.end:
6570 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6571 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6572 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6573 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
6574 // CHECK11-NEXT: [[TMP5:%.*]] = load i8, i8* [[CONV]], align 1
6575 // CHECK11-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP5]] to i1
6576 // CHECK11-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE6:%.*]]
6577 // CHECK11: omp_if.then:
6578 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6579 // CHECK11: omp.inner.for.cond:
6580 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35:![0-9]+]]
6581 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP35]]
6582 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6583 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6584 // CHECK11: omp.inner.for.body:
6585 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP35]]
6586 // CHECK11-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
6587 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP35]]
6588 // CHECK11-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
6589 // CHECK11-NEXT: [[TMP12:%.*]] = load i8, i8* [[CONV]], align 1, !llvm.access.group [[ACC_GRP35]]
6590 // CHECK11-NEXT: [[TOBOOL2:%.*]] = trunc i8 [[TMP12]] to i1
6591 // CHECK11-NEXT: [[CONV3:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
6592 // CHECK11-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL2]] to i8
6593 // CHECK11-NEXT: store i8 [[FROMBOOL]], i8* [[CONV3]], align 1, !llvm.access.group [[ACC_GRP35]]
6594 // CHECK11-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group [[ACC_GRP35]]
6595 // CHECK11-NEXT: [[TMP14:%.*]] = load i8, i8* [[CONV]], align 1, !llvm.access.group [[ACC_GRP35]]
6596 // CHECK11-NEXT: [[TOBOOL4:%.*]] = trunc i8 [[TMP14]] to i1
6597 // CHECK11-NEXT: br i1 [[TOBOOL4]], label [[OMP_IF_THEN5:%.*]], label [[OMP_IF_ELSE:%.*]]
6598 // CHECK11: omp_if.then5:
6599 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], i64 [[TMP13]]), !llvm.access.group [[ACC_GRP35]]
6600 // CHECK11-NEXT: br label [[OMP_IF_END:%.*]]
6601 // CHECK11: omp_if.else:
6602 // CHECK11-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP35]]
6603 // CHECK11-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP35]]
6604 // CHECK11-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP35]]
6605 // CHECK11-NEXT: call void @.omp_outlined..9(i32* [[TMP15]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]], i64 [[TMP13]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP35]]
6606 // CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP35]]
6607 // CHECK11-NEXT: br label [[OMP_IF_END]]
6608 // CHECK11: omp_if.end:
6609 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6610 // CHECK11: omp.inner.for.inc:
6611 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]
6612 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP35]]
6613 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
6614 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]
6615 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]
6616 // CHECK11: omp.inner.for.end:
6617 // CHECK11-NEXT: br label [[OMP_IF_END22:%.*]]
6618 // CHECK11: omp_if.else6:
6619 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
6620 // CHECK11: omp.inner.for.cond7:
6621 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6622 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6623 // CHECK11-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
6624 // CHECK11-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END21:%.*]]
6625 // CHECK11: omp.inner.for.body9:
6626 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6627 // CHECK11-NEXT: [[TMP21:%.*]] = zext i32 [[TMP20]] to i64
6628 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6629 // CHECK11-NEXT: [[TMP23:%.*]] = zext i32 [[TMP22]] to i64
6630 // CHECK11-NEXT: [[TMP24:%.*]] = load i8, i8* [[CONV]], align 1
6631 // CHECK11-NEXT: [[TOBOOL10:%.*]] = trunc i8 [[TMP24]] to i1
6632 // CHECK11-NEXT: [[CONV12:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED11]] to i8*
6633 // CHECK11-NEXT: [[FROMBOOL13:%.*]] = zext i1 [[TOBOOL10]] to i8
6634 // CHECK11-NEXT: store i8 [[FROMBOOL13]], i8* [[CONV12]], align 1
6635 // CHECK11-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED11]], align 8
6636 // CHECK11-NEXT: [[TMP26:%.*]] = load i8, i8* [[CONV]], align 1
6637 // CHECK11-NEXT: [[TOBOOL14:%.*]] = trunc i8 [[TMP26]] to i1
6638 // CHECK11-NEXT: br i1 [[TOBOOL14]], label [[OMP_IF_THEN15:%.*]], label [[OMP_IF_ELSE16:%.*]]
6639 // CHECK11: omp_if.then15:
6640 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i64)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i64 [[TMP21]], i64 [[TMP23]], i64 [[TMP25]])
6641 // CHECK11-NEXT: br label [[OMP_IF_END18:%.*]]
6642 // CHECK11: omp_if.else16:
6643 // CHECK11-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
6644 // CHECK11-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6645 // CHECK11-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR17]], align 4
6646 // CHECK11-NEXT: call void @.omp_outlined..10(i32* [[TMP27]], i32* [[DOTBOUND_ZERO_ADDR17]], i64 [[TMP21]], i64 [[TMP23]], i64 [[TMP25]]) #[[ATTR2]]
6647 // CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
6648 // CHECK11-NEXT: br label [[OMP_IF_END18]]
6649 // CHECK11: omp_if.end18:
6650 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC19:%.*]]
6651 // CHECK11: omp.inner.for.inc19:
6652 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6653 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6654 // CHECK11-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
6655 // CHECK11-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_IV]], align 4
6656 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP38:![0-9]+]]
6657 // CHECK11: omp.inner.for.end21:
6658 // CHECK11-NEXT: br label [[OMP_IF_END22]]
6659 // CHECK11: omp_if.end22:
6660 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6661 // CHECK11: omp.loop.exit:
6662 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
6663 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6664 // CHECK11-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0
6665 // CHECK11-NEXT: br i1 [[TMP31]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6666 // CHECK11: .omp.final.then:
6667 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
6668 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
6669 // CHECK11: .omp.final.done:
6670 // CHECK11-NEXT: ret void
6671 //
6672 //
6673 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..9
6674 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
6675 // CHECK11-NEXT: entry:
6676 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6677 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6678 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6679 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6680 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6681 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6682 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
6683 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6684 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6685 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6686 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6687 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
6688 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6689 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6690 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6691 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6692 // CHECK11-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
6693 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
6694 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6695 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
6696 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6697 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP0]] to i32
6698 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6699 // CHECK11-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
6700 // CHECK11-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
6701 // CHECK11-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
6702 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6703 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6704 // CHECK11-NEXT: [[TMP2:%.*]] = load i8, i8* [[CONV]], align 1
6705 // CHECK11-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
6706 // CHECK11-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
6707 // CHECK11: omp_if.then:
6708 // CHECK11-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6709 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
6710 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6711 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6712 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 99
6713 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6714 // CHECK11: cond.true:
6715 // CHECK11-NEXT: br label [[COND_END:%.*]]
6716 // CHECK11: cond.false:
6717 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6718 // CHECK11-NEXT: br label [[COND_END]]
6719 // CHECK11: cond.end:
6720 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
6721 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6722 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6723 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
6724 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6725 // CHECK11: omp.inner.for.cond:
6726 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39:![0-9]+]]
6727 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP39]]
6728 // CHECK11-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
6729 // CHECK11-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6730 // CHECK11: omp.inner.for.body:
6731 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
6732 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
6733 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6734 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP39]]
6735 // CHECK11-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP39]]
6736 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6737 // CHECK11: omp.body.continue:
6738 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6739 // CHECK11: omp.inner.for.inc:
6740 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
6741 // CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
6742 // CHECK11-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
6743 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]]
6744 // CHECK11: omp.inner.for.end:
6745 // CHECK11-NEXT: br label [[OMP_IF_END:%.*]]
6746 // CHECK11: omp_if.else:
6747 // CHECK11-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6748 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
6749 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6750 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6751 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99
6752 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
6753 // CHECK11: cond.true6:
6754 // CHECK11-NEXT: br label [[COND_END8:%.*]]
6755 // CHECK11: cond.false7:
6756 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6757 // CHECK11-NEXT: br label [[COND_END8]]
6758 // CHECK11: cond.end8:
6759 // CHECK11-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP15]], [[COND_FALSE7]] ]
6760 // CHECK11-NEXT: store i32 [[COND9]], i32* [[DOTOMP_UB]], align 4
6761 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6762 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
6763 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND10:%.*]]
6764 // CHECK11: omp.inner.for.cond10:
6765 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6766 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6767 // CHECK11-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
6768 // CHECK11-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY12:%.*]], label [[OMP_INNER_FOR_END18:%.*]]
6769 // CHECK11: omp.inner.for.body12:
6770 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6771 // CHECK11-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP19]], 1
6772 // CHECK11-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]
6773 // CHECK11-NEXT: store i32 [[ADD14]], i32* [[I]], align 4
6774 // CHECK11-NEXT: call void @_Z3fn6v()
6775 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
6776 // CHECK11: omp.body.continue15:
6777 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
6778 // CHECK11: omp.inner.for.inc16:
6779 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6780 // CHECK11-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1
6781 // CHECK11-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
6782 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP42:![0-9]+]]
6783 // CHECK11: omp.inner.for.end18:
6784 // CHECK11-NEXT: br label [[OMP_IF_END]]
6785 // CHECK11: omp_if.end:
6786 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6787 // CHECK11: omp.loop.exit:
6788 // CHECK11-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6789 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
6790 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
6791 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6792 // CHECK11-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
6793 // CHECK11-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6794 // CHECK11: .omp.final.then:
6795 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
6796 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
6797 // CHECK11: .omp.final.done:
6798 // CHECK11-NEXT: ret void
6799 //
6800 //
6801 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..10
6802 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
6803 // CHECK11-NEXT: entry:
6804 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6805 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6806 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6807 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6808 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6809 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6810 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
6811 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6812 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6813 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6814 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6815 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
6816 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6817 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6818 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6819 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6820 // CHECK11-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
6821 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
6822 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6823 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
6824 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6825 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP0]] to i32
6826 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6827 // CHECK11-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
6828 // CHECK11-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
6829 // CHECK11-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
6830 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6831 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6832 // CHECK11-NEXT: [[TMP2:%.*]] = load i8, i8* [[CONV]], align 1
6833 // CHECK11-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP2]] to i1
6834 // CHECK11-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
6835 // CHECK11: omp_if.then:
6836 // CHECK11-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6837 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
6838 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6839 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6840 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 99
6841 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6842 // CHECK11: cond.true:
6843 // CHECK11-NEXT: br label [[COND_END:%.*]]
6844 // CHECK11: cond.false:
6845 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6846 // CHECK11-NEXT: br label [[COND_END]]
6847 // CHECK11: cond.end:
6848 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
6849 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6850 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6851 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
6852 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6853 // CHECK11: omp.inner.for.cond:
6854 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43:![0-9]+]]
6855 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP43]]
6856 // CHECK11-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
6857 // CHECK11-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6858 // CHECK11: omp.inner.for.body:
6859 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43]]
6860 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
6861 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6862 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP43]]
6863 // CHECK11-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP43]]
6864 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6865 // CHECK11: omp.body.continue:
6866 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6867 // CHECK11: omp.inner.for.inc:
6868 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43]]
6869 // CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], 1
6870 // CHECK11-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43]]
6871 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP44:![0-9]+]]
6872 // CHECK11: omp.inner.for.end:
6873 // CHECK11-NEXT: br label [[OMP_IF_END:%.*]]
6874 // CHECK11: omp_if.else:
6875 // CHECK11-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6876 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
6877 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP13]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6878 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6879 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP14]], 99
6880 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]]
6881 // CHECK11: cond.true6:
6882 // CHECK11-NEXT: br label [[COND_END8:%.*]]
6883 // CHECK11: cond.false7:
6884 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6885 // CHECK11-NEXT: br label [[COND_END8]]
6886 // CHECK11: cond.end8:
6887 // CHECK11-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP15]], [[COND_FALSE7]] ]
6888 // CHECK11-NEXT: store i32 [[COND9]], i32* [[DOTOMP_UB]], align 4
6889 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6890 // CHECK11-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
6891 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND10:%.*]]
6892 // CHECK11: omp.inner.for.cond10:
6893 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6894 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6895 // CHECK11-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
6896 // CHECK11-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY12:%.*]], label [[OMP_INNER_FOR_END18:%.*]]
6897 // CHECK11: omp.inner.for.body12:
6898 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6899 // CHECK11-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP19]], 1
6900 // CHECK11-NEXT: [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]
6901 // CHECK11-NEXT: store i32 [[ADD14]], i32* [[I]], align 4
6902 // CHECK11-NEXT: call void @_Z3fn6v()
6903 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE15:%.*]]
6904 // CHECK11: omp.body.continue15:
6905 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC16:%.*]]
6906 // CHECK11: omp.inner.for.inc16:
6907 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6908 // CHECK11-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1
6909 // CHECK11-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4
6910 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND10]], !llvm.loop [[LOOP46:![0-9]+]]
6911 // CHECK11: omp.inner.for.end18:
6912 // CHECK11-NEXT: br label [[OMP_IF_END]]
6913 // CHECK11: omp_if.end:
6914 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6915 // CHECK11: omp.loop.exit:
6916 // CHECK11-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6917 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
6918 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
6919 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
6920 // CHECK11-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
6921 // CHECK11-NEXT: br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6922 // CHECK11: .omp.final.then:
6923 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
6924 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
6925 // CHECK11: .omp.final.done:
6926 // CHECK11-NEXT: ret void
6927 //
6928 //
6929 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
6930 // CHECK11-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {
6931 // CHECK11-NEXT: entry:
6932 // CHECK11-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
6933 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
6934 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
6935 // CHECK11-NEXT: [[ARG_CASTED:%.*]] = alloca i64, align 8
6936 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
6937 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
6938 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
6939 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
6940 // CHECK11-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
6941 // CHECK11-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
6942 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
6943 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
6944 // CHECK11-NEXT: store i32 1, i32* [[TMP0]], align 4
6945 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
6946 // CHECK11-NEXT: store i32 0, i32* [[TMP1]], align 4
6947 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
6948 // CHECK11-NEXT: store i8** null, i8*** [[TMP2]], align 8
6949 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
6950 // CHECK11-NEXT: store i8** null, i8*** [[TMP3]], align 8
6951 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
6952 // CHECK11-NEXT: store i64* null, i64** [[TMP4]], align 8
6953 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
6954 // CHECK11-NEXT: store i64* null, i64** [[TMP5]], align 8
6955 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
6956 // CHECK11-NEXT: store i8** null, i8*** [[TMP6]], align 8
6957 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
6958 // CHECK11-NEXT: store i8** null, i8*** [[TMP7]], align 8
6959 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
6960 // CHECK11-NEXT: store i64 100, i64* [[TMP8]], align 8
6961 // CHECK11-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l57.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
6962 // CHECK11-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0
6963 // CHECK11-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
6964 // CHECK11: omp_offload.failed:
6965 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l57() #[[ATTR2]]
6966 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
6967 // CHECK11: omp_offload.cont:
6968 // CHECK11-NEXT: [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
6969 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 0
6970 // CHECK11-NEXT: store i32 1, i32* [[TMP11]], align 4
6971 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 1
6972 // CHECK11-NEXT: store i32 0, i32* [[TMP12]], align 4
6973 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 2
6974 // CHECK11-NEXT: store i8** null, i8*** [[TMP13]], align 8
6975 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 3
6976 // CHECK11-NEXT: store i8** null, i8*** [[TMP14]], align 8
6977 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 4
6978 // CHECK11-NEXT: store i64* null, i64** [[TMP15]], align 8
6979 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 5
6980 // CHECK11-NEXT: store i64* null, i64** [[TMP16]], align 8
6981 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 6
6982 // CHECK11-NEXT: store i8** null, i8*** [[TMP17]], align 8
6983 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 7
6984 // CHECK11-NEXT: store i8** null, i8*** [[TMP18]], align 8
6985 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]], i32 0, i32 8
6986 // CHECK11-NEXT: store i64 100, i64* [[TMP19]], align 8
6987 // CHECK11-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS2]])
6988 // CHECK11-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
6989 // CHECK11-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
6990 // CHECK11: omp_offload.failed3:
6991 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62() #[[ATTR2]]
6992 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT4]]
6993 // CHECK11: omp_offload.cont4:
6994 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
6995 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_CASTED]] to i32*
6996 // CHECK11-NEXT: store i32 [[TMP22]], i32* [[CONV]], align 4
6997 // CHECK11-NEXT: [[TMP23:%.*]] = load i64, i64* [[ARG_CASTED]], align 8
6998 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6999 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i64*
7000 // CHECK11-NEXT: store i64 [[TMP23]], i64* [[TMP25]], align 8
7001 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7002 // CHECK11-NEXT: [[TMP27:%.*]] = bitcast i8** [[TMP26]] to i64*
7003 // CHECK11-NEXT: store i64 [[TMP23]], i64* [[TMP27]], align 8
7004 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
7005 // CHECK11-NEXT: store i8* null, i8** [[TMP28]], align 8
7006 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7007 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7008 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
7009 // CHECK11-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP31]], 0
7010 // CHECK11-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
7011 // CHECK11-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
7012 // CHECK11-NEXT: [[TMP32:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
7013 // CHECK11-NEXT: [[TOBOOL5:%.*]] = trunc i8 [[TMP32]] to i1
7014 // CHECK11-NEXT: [[TMP33:%.*]] = select i1 [[TOBOOL5]], i32 0, i32 1
7015 // CHECK11-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
7016 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 0
7017 // CHECK11-NEXT: store i32 1, i32* [[TMP34]], align 4
7018 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 1
7019 // CHECK11-NEXT: store i32 1, i32* [[TMP35]], align 4
7020 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 2
7021 // CHECK11-NEXT: store i8** [[TMP29]], i8*** [[TMP36]], align 8
7022 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 3
7023 // CHECK11-NEXT: store i8** [[TMP30]], i8*** [[TMP37]], align 8
7024 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 4
7025 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.17, i32 0, i32 0), i64** [[TMP38]], align 8
7026 // CHECK11-NEXT: [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 5
7027 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.18, i32 0, i32 0), i64** [[TMP39]], align 8
7028 // CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 6
7029 // CHECK11-NEXT: store i8** null, i8*** [[TMP40]], align 8
7030 // CHECK11-NEXT: [[TMP41:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 7
7031 // CHECK11-NEXT: store i8** null, i8*** [[TMP41]], align 8
7032 // CHECK11-NEXT: [[TMP42:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 8
7033 // CHECK11-NEXT: store i64 100, i64* [[TMP42]], align 8
7034 // CHECK11-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 [[TMP33]], i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]])
7035 // CHECK11-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
7036 // CHECK11-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]
7037 // CHECK11: omp_offload.failed8:
7038 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67(i64 [[TMP23]]) #[[ATTR2]]
7039 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT9]]
7040 // CHECK11: omp_offload.cont9:
7041 // CHECK11-NEXT: ret i32 0
7042 //
7043 //
7044 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l57
7045 // CHECK11-SAME: () #[[ATTR1]] {
7046 // CHECK11-NEXT: entry:
7047 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..11 to void (i32*, i32*, ...)*))
7048 // CHECK11-NEXT: ret void
7049 //
7050 //
7051 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..11
7052 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
7053 // CHECK11-NEXT: entry:
7054 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7055 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7056 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7057 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
7058 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7059 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7060 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7061 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7062 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
7063 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7064 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7065 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7066 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
7067 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7068 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7069 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7070 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
7071 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7072 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7073 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
7074 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7075 // CHECK11: cond.true:
7076 // CHECK11-NEXT: br label [[COND_END:%.*]]
7077 // CHECK11: cond.false:
7078 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7079 // CHECK11-NEXT: br label [[COND_END]]
7080 // CHECK11: cond.end:
7081 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7082 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7083 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7084 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
7085 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7086 // CHECK11: omp.inner.for.cond:
7087 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47:![0-9]+]]
7088 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP47]]
7089 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7090 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7091 // CHECK11: omp.inner.for.body:
7092 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP47]]
7093 // CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
7094 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP47]]
7095 // CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
7096 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP47]]
7097 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7098 // CHECK11: omp.inner.for.inc:
7099 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]
7100 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP47]]
7101 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
7102 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]
7103 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]]
7104 // CHECK11: omp.inner.for.end:
7105 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7106 // CHECK11: omp.loop.exit:
7107 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
7108 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7109 // CHECK11-NEXT: [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
7110 // CHECK11-NEXT: br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7111 // CHECK11: .omp.final.then:
7112 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
7113 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
7114 // CHECK11: .omp.final.done:
7115 // CHECK11-NEXT: ret void
7116 //
7117 //
7118 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..12
7119 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
7120 // CHECK11-NEXT: entry:
7121 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7122 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7123 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7124 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7125 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7126 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
7127 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7128 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7129 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7130 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7131 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
7132 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7133 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7134 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7135 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7136 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7137 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
7138 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7139 // CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
7140 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7141 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
7142 // CHECK11-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
7143 // CHECK11-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
7144 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7145 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7146 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7147 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
7148 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7149 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7150 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
7151 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7152 // CHECK11: cond.true:
7153 // CHECK11-NEXT: br label [[COND_END:%.*]]
7154 // CHECK11: cond.false:
7155 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7156 // CHECK11-NEXT: br label [[COND_END]]
7157 // CHECK11: cond.end:
7158 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
7159 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7160 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7161 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
7162 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7163 // CHECK11: omp.inner.for.cond:
7164 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50:![0-9]+]]
7165 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP50]]
7166 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
7167 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7168 // CHECK11: omp.inner.for.body:
7169 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]
7170 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
7171 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7172 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP50]]
7173 // CHECK11-NEXT: call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP50]]
7174 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7175 // CHECK11: omp.body.continue:
7176 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7177 // CHECK11: omp.inner.for.inc:
7178 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]
7179 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
7180 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]
7181 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP51:![0-9]+]]
7182 // CHECK11: omp.inner.for.end:
7183 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7184 // CHECK11: omp.loop.exit:
7185 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
7186 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7187 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
7188 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7189 // CHECK11: .omp.final.then:
7190 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
7191 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
7192 // CHECK11: .omp.final.done:
7193 // CHECK11-NEXT: ret void
7194 //
7195 //
7196 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l62
7197 // CHECK11-SAME: () #[[ATTR1]] {
7198 // CHECK11-NEXT: entry:
7199 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 0, void (i32*, i32*, ...)* bitcast (void (i32*, i32*)* @.omp_outlined..13 to void (i32*, i32*, ...)*))
7200 // CHECK11-NEXT: ret void
7201 //
7202 //
7203 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..13
7204 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
7205 // CHECK11-NEXT: entry:
7206 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7207 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7208 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7209 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
7210 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7211 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7212 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7213 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7214 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
7215 // CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
7216 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7217 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7218 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7219 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
7220 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7221 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7222 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7223 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
7224 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7225 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7226 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
7227 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7228 // CHECK11: cond.true:
7229 // CHECK11-NEXT: br label [[COND_END:%.*]]
7230 // CHECK11: cond.false:
7231 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7232 // CHECK11-NEXT: br label [[COND_END]]
7233 // CHECK11: cond.end:
7234 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7235 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7236 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7237 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
7238 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7239 // CHECK11: omp.inner.for.cond:
7240 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7241 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7242 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7243 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7244 // CHECK11: omp.inner.for.body:
7245 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7246 // CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
7247 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7248 // CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
7249 // CHECK11-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
7250 // CHECK11-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7251 // CHECK11-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4
7252 // CHECK11-NEXT: call void @.omp_outlined..14(i32* [[TMP11]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
7253 // CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]])
7254 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7255 // CHECK11: omp.inner.for.inc:
7256 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7257 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7258 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
7259 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
7260 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP53:![0-9]+]]
7261 // CHECK11: omp.inner.for.end:
7262 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7263 // CHECK11: omp.loop.exit:
7264 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
7265 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7266 // CHECK11-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
7267 // CHECK11-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7268 // CHECK11: .omp.final.then:
7269 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
7270 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
7271 // CHECK11: .omp.final.done:
7272 // CHECK11-NEXT: ret void
7273 //
7274 //
7275 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..14
7276 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
7277 // CHECK11-NEXT: entry:
7278 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7279 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7280 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7281 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7282 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7283 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
7284 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7285 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7286 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7287 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7288 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
7289 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7290 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7291 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7292 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7293 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7294 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
7295 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7296 // CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
7297 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7298 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
7299 // CHECK11-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
7300 // CHECK11-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
7301 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7302 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7303 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7304 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
7305 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7306 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7307 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
7308 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7309 // CHECK11: cond.true:
7310 // CHECK11-NEXT: br label [[COND_END:%.*]]
7311 // CHECK11: cond.false:
7312 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7313 // CHECK11-NEXT: br label [[COND_END]]
7314 // CHECK11: cond.end:
7315 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
7316 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7317 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7318 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
7319 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7320 // CHECK11: omp.inner.for.cond:
7321 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7322 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7323 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
7324 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7325 // CHECK11: omp.inner.for.body:
7326 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7327 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
7328 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7329 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4
7330 // CHECK11-NEXT: call void @_Z3fn2v()
7331 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7332 // CHECK11: omp.body.continue:
7333 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7334 // CHECK11: omp.inner.for.inc:
7335 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7336 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
7337 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
7338 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP54:![0-9]+]]
7339 // CHECK11: omp.inner.for.end:
7340 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7341 // CHECK11: omp.loop.exit:
7342 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
7343 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7344 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
7345 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7346 // CHECK11: .omp.final.then:
7347 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
7348 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
7349 // CHECK11: .omp.final.done:
7350 // CHECK11-NEXT: ret void
7351 //
7352 //
7353 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l67
7354 // CHECK11-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] {
7355 // CHECK11-NEXT: entry:
7356 // CHECK11-NEXT: [[ARG_ADDR:%.*]] = alloca i64, align 8
7357 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
7358 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
7359 // CHECK11-NEXT: store i64 [[ARG]], i64* [[ARG_ADDR]], align 8
7360 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[ARG_ADDR]] to i32*
7361 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[CONV]], align 4
7362 // CHECK11-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0
7363 // CHECK11-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
7364 // CHECK11-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
7365 // CHECK11-NEXT: [[TMP1:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
7366 // CHECK11-NEXT: [[TOBOOL1:%.*]] = trunc i8 [[TMP1]] to i1
7367 // CHECK11-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i8*
7368 // CHECK11-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[TOBOOL1]] to i8
7369 // CHECK11-NEXT: store i8 [[FROMBOOL3]], i8* [[CONV2]], align 1
7370 // CHECK11-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
7371 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP2]])
7372 // CHECK11-NEXT: ret void
7373 //
7374 //
7375 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..15
7376 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
7377 // CHECK11-NEXT: entry:
7378 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7379 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7380 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
7381 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7382 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
7383 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7384 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7385 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7386 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7387 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
7388 // CHECK11-NEXT: [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
7389 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7390 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7391 // CHECK11-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
7392 // CHECK11-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i8*
7393 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7394 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_COMB_UB]], align 4
7395 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7396 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7397 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7398 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
7399 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7400 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7401 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
7402 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7403 // CHECK11: cond.true:
7404 // CHECK11-NEXT: br label [[COND_END:%.*]]
7405 // CHECK11: cond.false:
7406 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7407 // CHECK11-NEXT: br label [[COND_END]]
7408 // CHECK11: cond.end:
7409 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7410 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7411 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7412 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[DOTOMP_IV]], align 4
7413 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7414 // CHECK11: omp.inner.for.cond:
7415 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP55:![0-9]+]]
7416 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP55]]
7417 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7418 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7419 // CHECK11: omp.inner.for.body:
7420 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP55]]
7421 // CHECK11-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
7422 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP55]]
7423 // CHECK11-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
7424 // CHECK11-NEXT: [[TMP11:%.*]] = load i8, i8* [[CONV]], align 1, !llvm.access.group [[ACC_GRP55]]
7425 // CHECK11-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP11]] to i1
7426 // CHECK11-NEXT: br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
7427 // CHECK11: omp_if.then:
7428 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64)* @.omp_outlined..16 to void (i32*, i32*, ...)*), i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP55]]
7429 // CHECK11-NEXT: br label [[OMP_IF_END:%.*]]
7430 // CHECK11: omp_if.else:
7431 // CHECK11-NEXT: call void @__kmpc_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP55]]
7432 // CHECK11-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP55]]
7433 // CHECK11-NEXT: store i32 0, i32* [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP55]]
7434 // CHECK11-NEXT: call void @.omp_outlined..16(i32* [[TMP12]], i32* [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP55]]
7435 // CHECK11-NEXT: call void @__kmpc_end_serialized_parallel(%struct.ident_t* @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP55]]
7436 // CHECK11-NEXT: br label [[OMP_IF_END]]
7437 // CHECK11: omp_if.end:
7438 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7439 // CHECK11: omp.inner.for.inc:
7440 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP55]]
7441 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP55]]
7442 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
7443 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP55]]
7444 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP56:![0-9]+]]
7445 // CHECK11: omp.inner.for.end:
7446 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7447 // CHECK11: omp.loop.exit:
7448 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP1]])
7449 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7450 // CHECK11-NEXT: [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
7451 // CHECK11-NEXT: br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7452 // CHECK11: .omp.final.then:
7453 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
7454 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
7455 // CHECK11: .omp.final.done:
7456 // CHECK11-NEXT: ret void
7457 //
7458 //
7459 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..16
7460 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
7461 // CHECK11-NEXT: entry:
7462 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
7463 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
7464 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7465 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7466 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7467 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
7468 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7469 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7470 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7471 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7472 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
7473 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
7474 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
7475 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7476 // CHECK11-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7477 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7478 // CHECK11-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
7479 // CHECK11-NEXT: [[TMP0:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
7480 // CHECK11-NEXT: [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
7481 // CHECK11-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
7482 // CHECK11-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
7483 // CHECK11-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
7484 // CHECK11-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
7485 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7486 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7487 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
7488 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP2]], align 4
7489 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP3]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7490 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7491 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
7492 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7493 // CHECK11: cond.true:
7494 // CHECK11-NEXT: br label [[COND_END:%.*]]
7495 // CHECK11: cond.false:
7496 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7497 // CHECK11-NEXT: br label [[COND_END]]
7498 // CHECK11: cond.end:
7499 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
7500 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7501 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7502 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_IV]], align 4
7503 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7504 // CHECK11: omp.inner.for.cond:
7505 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58:![0-9]+]]
7506 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP58]]
7507 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
7508 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7509 // CHECK11: omp.inner.for.body:
7510 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58]]
7511 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
7512 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7513 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP58]]
7514 // CHECK11-NEXT: call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP58]]
7515 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7516 // CHECK11: omp.body.continue:
7517 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7518 // CHECK11: omp.inner.for.inc:
7519 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58]]
7520 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
7521 // CHECK11-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58]]
7522 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP59:![0-9]+]]
7523 // CHECK11: omp.inner.for.end:
7524 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7525 // CHECK11: omp.loop.exit:
7526 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP3]])
7527 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
7528 // CHECK11-NEXT: [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
7529 // CHECK11-NEXT: br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7530 // CHECK11: .omp.final.then:
7531 // CHECK11-NEXT: store i32 100, i32* [[I]], align 4
7532 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
7533 // CHECK11: .omp.final.done:
7534 // CHECK11-NEXT: ret void
7535 //
7536 //
7537 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
7538 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] {
7539 // CHECK11-NEXT: entry:
7540 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1)
7541 // CHECK11-NEXT: ret void
7542 //
7543 //
7544 // CHECK13-LABEL: define {{[^@]+}}@_Z9gtid_testv
7545 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] {
7546 // CHECK13-NEXT: entry:
7547 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
7548 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7549 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7550 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7551 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
7552 // CHECK13-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
7553 // CHECK13-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
7554 // CHECK13-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
7555 // CHECK13-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
7556 // CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 4
7557 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7558 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
7559 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7560 // CHECK13-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
7561 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7562 // CHECK13: omp.inner.for.cond:
7563 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]
7564 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]]
7565 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
7566 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7567 // CHECK13: omp.inner.for.body:
7568 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
7569 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
7570 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7571 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
7572 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7573 // CHECK13: omp.body.continue:
7574 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7575 // CHECK13: omp.inner.for.inc:
7576 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
7577 // CHECK13-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
7578 // CHECK13-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
7579 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
7580 // CHECK13: omp.inner.for.end:
7581 // CHECK13-NEXT: store i32 100, i32* [[I]], align 4
7582 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
7583 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
7584 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
7585 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
7586 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
7587 // CHECK13: omp.inner.for.cond7:
7588 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]
7589 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP6]]
7590 // CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7591 // CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
7592 // CHECK13: omp.inner.for.body9:
7593 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
7594 // CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
7595 // CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
7596 // CHECK13-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group [[ACC_GRP6]]
7597 // CHECK13-NEXT: call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP6]]
7598 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
7599 // CHECK13: omp.body.continue12:
7600 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
7601 // CHECK13: omp.inner.for.inc13:
7602 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
7603 // CHECK13-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
7604 // CHECK13-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
7605 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]]
7606 // CHECK13: omp.inner.for.end15:
7607 // CHECK13-NEXT: store i32 100, i32* [[I6]], align 4
7608 // CHECK13-NEXT: ret void
7609 //
7610 //
7611 // CHECK13-LABEL: define {{[^@]+}}@main
7612 // CHECK13-SAME: () #[[ATTR1:[0-9]+]] {
7613 // CHECK13-NEXT: entry:
7614 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
7615 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
7616 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7617 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7618 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7619 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
7620 // CHECK13-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
7621 // CHECK13-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
7622 // CHECK13-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
7623 // CHECK13-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
7624 // CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 4
7625 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
7626 // CHECK13-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
7627 // CHECK13-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4
7628 // CHECK13-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4
7629 // CHECK13-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4
7630 // CHECK13-NEXT: [[I20:%.*]] = alloca i32, align 4
7631 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4
7632 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7633 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
7634 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7635 // CHECK13-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
7636 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7637 // CHECK13: omp.inner.for.cond:
7638 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]
7639 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
7640 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
7641 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7642 // CHECK13: omp.inner.for.body:
7643 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
7644 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
7645 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7646 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP9]]
7647 // CHECK13-NEXT: call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP9]]
7648 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7649 // CHECK13: omp.body.continue:
7650 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7651 // CHECK13: omp.inner.for.inc:
7652 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
7653 // CHECK13-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
7654 // CHECK13-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
7655 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
7656 // CHECK13: omp.inner.for.end:
7657 // CHECK13-NEXT: store i32 100, i32* [[I]], align 4
7658 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
7659 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
7660 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
7661 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
7662 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
7663 // CHECK13: omp.inner.for.cond7:
7664 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]]
7665 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP12]]
7666 // CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7667 // CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
7668 // CHECK13: omp.inner.for.body9:
7669 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]
7670 // CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
7671 // CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
7672 // CHECK13-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group [[ACC_GRP12]]
7673 // CHECK13-NEXT: call void @_Z3fn5v(), !llvm.access.group [[ACC_GRP12]]
7674 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
7675 // CHECK13: omp.body.continue12:
7676 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
7677 // CHECK13: omp.inner.for.inc13:
7678 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]
7679 // CHECK13-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
7680 // CHECK13-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]
7681 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP13:![0-9]+]]
7682 // CHECK13: omp.inner.for.end15:
7683 // CHECK13-NEXT: store i32 100, i32* [[I6]], align 4
7684 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* @Arg, align 4
7685 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
7686 // CHECK13-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
7687 // CHECK13-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
7688 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
7689 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
7690 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB17]], align 4
7691 // CHECK13-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
7692 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
7693 // CHECK13: omp.inner.for.cond21:
7694 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
7695 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP15]]
7696 // CHECK13-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
7697 // CHECK13-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
7698 // CHECK13: omp.inner.for.body23:
7699 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]
7700 // CHECK13-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
7701 // CHECK13-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
7702 // CHECK13-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group [[ACC_GRP15]]
7703 // CHECK13-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP15]]
7704 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
7705 // CHECK13: omp.body.continue26:
7706 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
7707 // CHECK13: omp.inner.for.inc27:
7708 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]
7709 // CHECK13-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
7710 // CHECK13-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]
7711 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP16:![0-9]+]]
7712 // CHECK13: omp.inner.for.end29:
7713 // CHECK13-NEXT: store i32 100, i32* [[I20]], align 4
7714 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* @Arg, align 4
7715 // CHECK13-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP16]])
7716 // CHECK13-NEXT: ret i32 [[CALL]]
7717 //
7718 //
7719 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
7720 // CHECK13-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {
7721 // CHECK13-NEXT: entry:
7722 // CHECK13-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
7723 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
7724 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7725 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7726 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7727 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
7728 // CHECK13-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
7729 // CHECK13-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
7730 // CHECK13-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
7731 // CHECK13-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
7732 // CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 4
7733 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
7734 // CHECK13-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
7735 // CHECK13-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4
7736 // CHECK13-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4
7737 // CHECK13-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4
7738 // CHECK13-NEXT: [[I20:%.*]] = alloca i32, align 4
7739 // CHECK13-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
7740 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7741 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
7742 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7743 // CHECK13-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
7744 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7745 // CHECK13: omp.inner.for.cond:
7746 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]
7747 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]]
7748 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
7749 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7750 // CHECK13: omp.inner.for.body:
7751 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
7752 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
7753 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7754 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP18]]
7755 // CHECK13-NEXT: call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP18]]
7756 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7757 // CHECK13: omp.body.continue:
7758 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7759 // CHECK13: omp.inner.for.inc:
7760 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
7761 // CHECK13-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
7762 // CHECK13-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
7763 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
7764 // CHECK13: omp.inner.for.end:
7765 // CHECK13-NEXT: store i32 100, i32* [[I]], align 4
7766 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
7767 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
7768 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
7769 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
7770 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
7771 // CHECK13: omp.inner.for.cond7:
7772 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]]
7773 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP21]]
7774 // CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7775 // CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
7776 // CHECK13: omp.inner.for.body9:
7777 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]]
7778 // CHECK13-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
7779 // CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
7780 // CHECK13-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group [[ACC_GRP21]]
7781 // CHECK13-NEXT: call void @_Z3fn2v(), !llvm.access.group [[ACC_GRP21]]
7782 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
7783 // CHECK13: omp.body.continue12:
7784 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
7785 // CHECK13: omp.inner.for.inc13:
7786 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]]
7787 // CHECK13-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
7788 // CHECK13-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]]
7789 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP22:![0-9]+]]
7790 // CHECK13: omp.inner.for.end15:
7791 // CHECK13-NEXT: store i32 100, i32* [[I6]], align 4
7792 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
7793 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
7794 // CHECK13-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
7795 // CHECK13-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
7796 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
7797 // CHECK13-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
7798 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB17]], align 4
7799 // CHECK13-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
7800 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
7801 // CHECK13: omp.inner.for.cond21:
7802 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]]
7803 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP24]]
7804 // CHECK13-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
7805 // CHECK13-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
7806 // CHECK13: omp.inner.for.body23:
7807 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]]
7808 // CHECK13-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
7809 // CHECK13-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
7810 // CHECK13-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group [[ACC_GRP24]]
7811 // CHECK13-NEXT: call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP24]]
7812 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
7813 // CHECK13: omp.body.continue26:
7814 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
7815 // CHECK13: omp.inner.for.inc27:
7816 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]]
7817 // CHECK13-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
7818 // CHECK13-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]]
7819 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP25:![0-9]+]]
7820 // CHECK13: omp.inner.for.end29:
7821 // CHECK13-NEXT: store i32 100, i32* [[I20]], align 4
7822 // CHECK13-NEXT: ret i32 0
7823 //
7824 //
7825 // CHECK15-LABEL: define {{[^@]+}}@_Z9gtid_testv
7826 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] {
7827 // CHECK15-NEXT: entry:
7828 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
7829 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7830 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7831 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7832 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
7833 // CHECK15-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
7834 // CHECK15-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
7835 // CHECK15-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
7836 // CHECK15-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
7837 // CHECK15-NEXT: [[I6:%.*]] = alloca i32, align 4
7838 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7839 // CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
7840 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7841 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
7842 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7843 // CHECK15: omp.inner.for.cond:
7844 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]
7845 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]]
7846 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
7847 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7848 // CHECK15: omp.inner.for.body:
7849 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
7850 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
7851 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7852 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
7853 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7854 // CHECK15: omp.body.continue:
7855 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7856 // CHECK15: omp.inner.for.inc:
7857 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
7858 // CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
7859 // CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
7860 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
7861 // CHECK15: omp.inner.for.end:
7862 // CHECK15-NEXT: store i32 100, i32* [[I]], align 4
7863 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
7864 // CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
7865 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
7866 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
7867 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
7868 // CHECK15: omp.inner.for.cond7:
7869 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]
7870 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP6]]
7871 // CHECK15-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7872 // CHECK15-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
7873 // CHECK15: omp.inner.for.body9:
7874 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
7875 // CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
7876 // CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
7877 // CHECK15-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4, !llvm.access.group [[ACC_GRP6]]
7878 // CHECK15-NEXT: call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP6]]
7879 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
7880 // CHECK15: omp.body.continue12:
7881 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
7882 // CHECK15: omp.inner.for.inc13:
7883 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
7884 // CHECK15-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
7885 // CHECK15-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
7886 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]]
7887 // CHECK15: omp.inner.for.end15:
7888 // CHECK15-NEXT: store i32 100, i32* [[I6]], align 4
7889 // CHECK15-NEXT: ret void
7890 //
7891 //
7892 // CHECK15-LABEL: define {{[^@]+}}@main
7893 // CHECK15-SAME: () #[[ATTR1:[0-9]+]] {
7894 // CHECK15-NEXT: entry:
7895 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
7896 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
7897 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7898 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7899 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7900 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
7901 // CHECK15-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
7902 // CHECK15-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
7903 // CHECK15-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
7904 // CHECK15-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
7905 // CHECK15-NEXT: [[I6:%.*]] = alloca i32, align 4
7906 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
7907 // CHECK15-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
7908 // CHECK15-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4
7909 // CHECK15-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4
7910 // CHECK15-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4
7911 // CHECK15-NEXT: [[I20:%.*]] = alloca i32, align 4
7912 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4
7913 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7914 // CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
7915 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7916 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
7917 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7918 // CHECK15: omp.inner.for.cond:
7919 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]
7920 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
7921 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
7922 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7923 // CHECK15: omp.inner.for.body:
7924 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
7925 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
7926 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7927 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP9]]
7928 // CHECK15-NEXT: call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP9]]
7929 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7930 // CHECK15: omp.body.continue:
7931 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7932 // CHECK15: omp.inner.for.inc:
7933 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
7934 // CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
7935 // CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
7936 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
7937 // CHECK15: omp.inner.for.end:
7938 // CHECK15-NEXT: store i32 100, i32* [[I]], align 4
7939 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
7940 // CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
7941 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
7942 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
7943 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
7944 // CHECK15: omp.inner.for.cond7:
7945 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
7946 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4
7947 // CHECK15-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7948 // CHECK15-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
7949 // CHECK15: omp.inner.for.body9:
7950 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
7951 // CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
7952 // CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
7953 // CHECK15-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
7954 // CHECK15-NEXT: call void @_Z3fn5v()
7955 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
7956 // CHECK15: omp.body.continue12:
7957 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
7958 // CHECK15: omp.inner.for.inc13:
7959 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
7960 // CHECK15-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
7961 // CHECK15-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
7962 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP12:![0-9]+]]
7963 // CHECK15: omp.inner.for.end15:
7964 // CHECK15-NEXT: store i32 100, i32* [[I6]], align 4
7965 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* @Arg, align 4
7966 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
7967 // CHECK15-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
7968 // CHECK15-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
7969 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
7970 // CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
7971 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB17]], align 4
7972 // CHECK15-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
7973 // CHECK15-NEXT: [[TMP12:%.*]] = load i8, i8* [[DOTCAPTURE_EXPR_]], align 1
7974 // CHECK15-NEXT: [[TOBOOL21:%.*]] = trunc i8 [[TMP12]] to i1
7975 // CHECK15-NEXT: br i1 [[TOBOOL21]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
7976 // CHECK15: omp_if.then:
7977 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND22:%.*]]
7978 // CHECK15: omp.inner.for.cond22:
7979 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP14:![0-9]+]]
7980 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP14]]
7981 // CHECK15-NEXT: [[CMP23:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
7982 // CHECK15-NEXT: br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.*]], label [[OMP_INNER_FOR_END30:%.*]]
7983 // CHECK15: omp.inner.for.body24:
7984 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP14]]
7985 // CHECK15-NEXT: [[MUL25:%.*]] = mul nsw i32 [[TMP15]], 1
7986 // CHECK15-NEXT: [[ADD26:%.*]] = add nsw i32 0, [[MUL25]]
7987 // CHECK15-NEXT: store i32 [[ADD26]], i32* [[I20]], align 4, !llvm.access.group [[ACC_GRP14]]
7988 // CHECK15-NEXT: call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP14]]
7989 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE27:%.*]]
7990 // CHECK15: omp.body.continue27:
7991 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC28:%.*]]
7992 // CHECK15: omp.inner.for.inc28:
7993 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP14]]
7994 // CHECK15-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP16]], 1
7995 // CHECK15-NEXT: store i32 [[ADD29]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP14]]
7996 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP15:![0-9]+]]
7997 // CHECK15: omp.inner.for.end30:
7998 // CHECK15-NEXT: br label [[OMP_IF_END:%.*]]
7999 // CHECK15: omp_if.else:
8000 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND31:%.*]]
8001 // CHECK15: omp.inner.for.cond31:
8002 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4
8003 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4
8004 // CHECK15-NEXT: [[CMP32:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
8005 // CHECK15-NEXT: br i1 [[CMP32]], label [[OMP_INNER_FOR_BODY33:%.*]], label [[OMP_INNER_FOR_END39:%.*]]
8006 // CHECK15: omp.inner.for.body33:
8007 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4
8008 // CHECK15-NEXT: [[MUL34:%.*]] = mul nsw i32 [[TMP19]], 1
8009 // CHECK15-NEXT: [[ADD35:%.*]] = add nsw i32 0, [[MUL34]]
8010 // CHECK15-NEXT: store i32 [[ADD35]], i32* [[I20]], align 4
8011 // CHECK15-NEXT: call void @_Z3fn6v()
8012 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE36:%.*]]
8013 // CHECK15: omp.body.continue36:
8014 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC37:%.*]]
8015 // CHECK15: omp.inner.for.inc37:
8016 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4
8017 // CHECK15-NEXT: [[ADD38:%.*]] = add nsw i32 [[TMP20]], 1
8018 // CHECK15-NEXT: store i32 [[ADD38]], i32* [[DOTOMP_IV19]], align 4
8019 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND31]], !llvm.loop [[LOOP17:![0-9]+]]
8020 // CHECK15: omp.inner.for.end39:
8021 // CHECK15-NEXT: br label [[OMP_IF_END]]
8022 // CHECK15: omp_if.end:
8023 // CHECK15-NEXT: store i32 100, i32* [[I20]], align 4
8024 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* @Arg, align 4
8025 // CHECK15-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP21]])
8026 // CHECK15-NEXT: ret i32 [[CALL]]
8027 //
8028 //
8029 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
8030 // CHECK15-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {
8031 // CHECK15-NEXT: entry:
8032 // CHECK15-NEXT: [[ARG_ADDR:%.*]] = alloca i32, align 4
8033 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
8034 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8035 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8036 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8037 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
8038 // CHECK15-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
8039 // CHECK15-NEXT: [[DOTOMP_LB3:%.*]] = alloca i32, align 4
8040 // CHECK15-NEXT: [[DOTOMP_UB4:%.*]] = alloca i32, align 4
8041 // CHECK15-NEXT: [[DOTOMP_IV5:%.*]] = alloca i32, align 4
8042 // CHECK15-NEXT: [[I6:%.*]] = alloca i32, align 4
8043 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
8044 // CHECK15-NEXT: [[_TMP16:%.*]] = alloca i32, align 4
8045 // CHECK15-NEXT: [[DOTOMP_LB17:%.*]] = alloca i32, align 4
8046 // CHECK15-NEXT: [[DOTOMP_UB18:%.*]] = alloca i32, align 4
8047 // CHECK15-NEXT: [[DOTOMP_IV19:%.*]] = alloca i32, align 4
8048 // CHECK15-NEXT: [[I20:%.*]] = alloca i32, align 4
8049 // CHECK15-NEXT: store i32 [[ARG]], i32* [[ARG_ADDR]], align 4
8050 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8051 // CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB]], align 4
8052 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8053 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
8054 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8055 // CHECK15: omp.inner.for.cond:
8056 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]
8057 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]]
8058 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
8059 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8060 // CHECK15: omp.inner.for.body:
8061 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
8062 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
8063 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8064 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group [[ACC_GRP18]]
8065 // CHECK15-NEXT: call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP18]]
8066 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8067 // CHECK15: omp.body.continue:
8068 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8069 // CHECK15: omp.inner.for.inc:
8070 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
8071 // CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
8072 // CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
8073 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
8074 // CHECK15: omp.inner.for.end:
8075 // CHECK15-NEXT: store i32 100, i32* [[I]], align 4
8076 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB3]], align 4
8077 // CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB4]], align 4
8078 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_LB3]], align 4
8079 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV5]], align 4
8080 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7:%.*]]
8081 // CHECK15: omp.inner.for.cond7:
8082 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
8083 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_UB4]], align 4
8084 // CHECK15-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
8085 // CHECK15-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
8086 // CHECK15: omp.inner.for.body9:
8087 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
8088 // CHECK15-NEXT: [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
8089 // CHECK15-NEXT: [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
8090 // CHECK15-NEXT: store i32 [[ADD11]], i32* [[I6]], align 4
8091 // CHECK15-NEXT: call void @_Z3fn2v()
8092 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE12:%.*]]
8093 // CHECK15: omp.body.continue12:
8094 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC13:%.*]]
8095 // CHECK15: omp.inner.for.inc13:
8096 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV5]], align 4
8097 // CHECK15-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
8098 // CHECK15-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV5]], align 4
8099 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP21:![0-9]+]]
8100 // CHECK15: omp.inner.for.end15:
8101 // CHECK15-NEXT: store i32 100, i32* [[I6]], align 4
8102 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARG_ADDR]], align 4
8103 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
8104 // CHECK15-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TOBOOL]] to i8
8105 // CHECK15-NEXT: store i8 [[FROMBOOL]], i8* [[DOTCAPTURE_EXPR_]], align 1
8106 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB17]], align 4
8107 // CHECK15-NEXT: store i32 99, i32* [[DOTOMP_UB18]], align 4
8108 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_LB17]], align 4
8109 // CHECK15-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV19]], align 4
8110 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND21:%.*]]
8111 // CHECK15: omp.inner.for.cond21:
8112 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP22:![0-9]+]]
8113 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP22]]
8114 // CHECK15-NEXT: [[CMP22:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
8115 // CHECK15-NEXT: br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
8116 // CHECK15: omp.inner.for.body23:
8117 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP22]]
8118 // CHECK15-NEXT: [[MUL24:%.*]] = mul nsw i32 [[TMP14]], 1
8119 // CHECK15-NEXT: [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
8120 // CHECK15-NEXT: store i32 [[ADD25]], i32* [[I20]], align 4, !llvm.access.group [[ACC_GRP22]]
8121 // CHECK15-NEXT: call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP22]]
8122 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE26:%.*]]
8123 // CHECK15: omp.body.continue26:
8124 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC27:%.*]]
8125 // CHECK15: omp.inner.for.inc27:
8126 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP22]]
8127 // CHECK15-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP15]], 1
8128 // CHECK15-NEXT: store i32 [[ADD28]], i32* [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP22]]
8129 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP23:![0-9]+]]
8130 // CHECK15: omp.inner.for.end29:
8131 // CHECK15-NEXT: store i32 100, i32* [[I20]], align 4
8132 // CHECK15-NEXT: ret i32 0
8133 //
8134