1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // expected-no-diagnostics
3 #ifndef HEADER
4 #define HEADER
5
6 // Test host codegen.
7 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
8 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
9 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
10 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
11 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
12 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3
13
14 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5
15 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
16 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5
17 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7
18 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
19 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK7
20 #ifdef CK1
21
22 template <typename T, int X, long long Y>
23 struct SS{
24 T a[X][Y];
25
fooSS26 int foo(void) {
27
28 #pragma omp target
29 #pragma omp teams distribute parallel for simd collapse(2)
30 for(int i = 0; i < X; i++) {
31 for(int j = 0; j < Y; j++) {
32 a[i][j] = (T)0;
33 }
34 }
35
36 // discard loop variables not needed here
37
38
39 return a[0][0];
40 }
41 };
42
teams_template_struct(void)43 int teams_template_struct(void) {
44 SS<int, 123, 456> V;
45 return V.foo();
46
47 }
48
49 // CK4: !{!"llvm.loop.vectorize.enable", i1 true}
50
51 #endif // CK1
52
53 // Test host codegen.
54 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
55 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
56 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9
57 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11
58 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
59 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11
60
61 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13
62 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
63 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK13
64 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15
65 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
66 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15
67 #ifdef CK2
68
69 template <typename T, int n, int m>
tmain(T argc)70 int tmain(T argc) {
71 T a[n][m];
72 #pragma omp target
73 #pragma omp teams distribute parallel for simd collapse(2)
74 for(int i = 0; i < n; i++) {
75 for(int j = 0; j < m; j++) {
76 a[i][j] = (T)0;
77 }
78 }
79 return 0;
80 }
81
main(int argc,char ** argv)82 int main (int argc, char **argv) {
83 int n = 100;
84 int m = 2;
85 int a[n][m];
86 #pragma omp target
87 #pragma omp teams distribute parallel for simd collapse(2)
88 for(int i = 0; i < n; i++) {
89 for(int j = 0; j < m; j++) {
90 a[i][j] = 0;
91 }
92 }
93 return tmain<int, 10, 2>(argc);
94 }
95
96
97
98
99
100
101
102
103 // discard loop variables not needed here
104
105
106 // CK4: !{!"llvm.loop.vectorize.enable", i1 true}
107
108 #endif // CK2
109 #endif // #ifndef HEADER
110 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv
111 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
112 // CHECK1-NEXT: entry:
113 // CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
114 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[V]])
115 // CHECK1-NEXT: ret i32 [[CALL]]
116 //
117 //
118 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
119 // CHECK1-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
120 // CHECK1-NEXT: entry:
121 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
122 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
123 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
124 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
125 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
126 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
127 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
128 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
129 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
130 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
131 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
132 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8
133 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
134 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x [456 x i32]]**
135 // CHECK1-NEXT: store [123 x [456 x i32]]* [[A]], [123 x [456 x i32]]** [[TMP3]], align 8
136 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
137 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8
138 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
139 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
140 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
141 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
142 // CHECK1-NEXT: store i32 1, i32* [[TMP7]], align 4
143 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
144 // CHECK1-NEXT: store i32 1, i32* [[TMP8]], align 4
145 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
146 // CHECK1-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 8
147 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
148 // CHECK1-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 8
149 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
150 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP11]], align 8
151 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
152 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP12]], align 8
153 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
154 // CHECK1-NEXT: store i8** null, i8*** [[TMP13]], align 8
155 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
156 // CHECK1-NEXT: store i8** null, i8*** [[TMP14]], align 8
157 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
158 // CHECK1-NEXT: store i64 56088, i64* [[TMP15]], align 8
159 // CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
160 // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
161 // CHECK1-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
162 // CHECK1: omp_offload.failed:
163 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
164 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
165 // CHECK1: omp_offload.cont:
166 // CHECK1-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
167 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A3]], i64 0, i64 0
168 // CHECK1-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i64 0, i64 0
169 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4
170 // CHECK1-NEXT: ret i32 [[TMP18]]
171 //
172 //
173 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28
174 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
175 // CHECK1-NEXT: entry:
176 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
177 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
178 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
179 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
180 // CHECK1-NEXT: ret void
181 //
182 //
183 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
184 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
185 // CHECK1-NEXT: entry:
186 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
187 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
188 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
189 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
190 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
191 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
192 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
193 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
194 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
195 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
196 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
197 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4
198 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
199 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
200 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
201 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
202 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
203 // CHECK1-NEXT: store i32 56087, i32* [[DOTOMP_COMB_UB]], align 4
204 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
205 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
206 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
207 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
208 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
209 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
210 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087
211 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
212 // CHECK1: cond.true:
213 // CHECK1-NEXT: br label [[COND_END:%.*]]
214 // CHECK1: cond.false:
215 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
216 // CHECK1-NEXT: br label [[COND_END]]
217 // CHECK1: cond.end:
218 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
219 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
220 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
221 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
222 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
223 // CHECK1: omp.inner.for.cond:
224 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
225 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !4
226 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
227 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
228 // CHECK1: omp.inner.for.body:
229 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !4
230 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
231 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !4
232 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
233 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]), !llvm.access.group !4
234 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
235 // CHECK1: omp.inner.for.inc:
236 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
237 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !4
238 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
239 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !4
240 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
241 // CHECK1: omp.inner.for.end:
242 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
243 // CHECK1: omp.loop.exit:
244 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
245 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
246 // CHECK1-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
247 // CHECK1-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
248 // CHECK1: .omp.final.then:
249 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4
250 // CHECK1-NEXT: store i32 456, i32* [[J]], align 4
251 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
252 // CHECK1: .omp.final.done:
253 // CHECK1-NEXT: ret void
254 //
255 //
256 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
257 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
258 // CHECK1-NEXT: entry:
259 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
260 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
261 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
262 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
263 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
264 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
265 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
266 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
267 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
268 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
269 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
270 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
271 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
272 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4
273 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
274 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
275 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
276 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
277 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
278 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
279 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
280 // CHECK1-NEXT: store i32 56087, i32* [[DOTOMP_UB]], align 4
281 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
282 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
283 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
284 // CHECK1-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
285 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
286 // CHECK1-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
287 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
288 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
289 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
290 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
291 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
292 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
293 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 56087
294 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
295 // CHECK1: cond.true:
296 // CHECK1-NEXT: br label [[COND_END:%.*]]
297 // CHECK1: cond.false:
298 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
299 // CHECK1-NEXT: br label [[COND_END]]
300 // CHECK1: cond.end:
301 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
302 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
303 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
304 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
305 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
306 // CHECK1: omp.inner.for.cond:
307 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
308 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !8
309 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
310 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
311 // CHECK1: omp.inner.for.body:
312 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
313 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 456
314 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
315 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
316 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !8
317 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
318 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
319 // CHECK1-NEXT: [[DIV4:%.*]] = sdiv i32 [[TMP12]], 456
320 // CHECK1-NEXT: [[MUL5:%.*]] = mul nsw i32 [[DIV4]], 456
321 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL5]]
322 // CHECK1-NEXT: [[MUL6:%.*]] = mul nsw i32 [[SUB]], 1
323 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 0, [[MUL6]]
324 // CHECK1-NEXT: store i32 [[ADD7]], i32* [[J]], align 4, !llvm.access.group !8
325 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
326 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !8
327 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
328 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i64 0, i64 [[IDXPROM]]
329 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4, !llvm.access.group !8
330 // CHECK1-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP14]] to i64
331 // CHECK1-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM8]]
332 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX9]], align 4, !llvm.access.group !8
333 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
334 // CHECK1: omp.body.continue:
335 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
336 // CHECK1: omp.inner.for.inc:
337 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
338 // CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP15]], 1
339 // CHECK1-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !8
340 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
341 // CHECK1: omp.inner.for.end:
342 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
343 // CHECK1: omp.loop.exit:
344 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
345 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
346 // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
347 // CHECK1-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
348 // CHECK1: .omp.final.then:
349 // CHECK1-NEXT: store i32 123, i32* [[I]], align 4
350 // CHECK1-NEXT: store i32 456, i32* [[J]], align 4
351 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
352 // CHECK1: .omp.final.done:
353 // CHECK1-NEXT: ret void
354 //
355 //
356 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
357 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] {
358 // CHECK1-NEXT: entry:
359 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
360 // CHECK1-NEXT: ret void
361 //
362 //
363 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv
364 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
365 // CHECK3-NEXT: entry:
366 // CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
367 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[V]])
368 // CHECK3-NEXT: ret i32 [[CALL]]
369 //
370 //
371 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
372 // CHECK3-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
373 // CHECK3-NEXT: entry:
374 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
375 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
376 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
377 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
378 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
379 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
380 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
381 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
382 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
383 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
384 // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
385 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4
386 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
387 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x [456 x i32]]**
388 // CHECK3-NEXT: store [123 x [456 x i32]]* [[A]], [123 x [456 x i32]]** [[TMP3]], align 4
389 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
390 // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 4
391 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
392 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
393 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
394 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
395 // CHECK3-NEXT: store i32 1, i32* [[TMP7]], align 4
396 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
397 // CHECK3-NEXT: store i32 1, i32* [[TMP8]], align 4
398 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
399 // CHECK3-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 4
400 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
401 // CHECK3-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 4
402 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
403 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP11]], align 4
404 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
405 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP12]], align 4
406 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
407 // CHECK3-NEXT: store i8** null, i8*** [[TMP13]], align 4
408 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
409 // CHECK3-NEXT: store i8** null, i8*** [[TMP14]], align 4
410 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
411 // CHECK3-NEXT: store i64 56088, i64* [[TMP15]], align 8
412 // CHECK3-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
413 // CHECK3-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
414 // CHECK3-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
415 // CHECK3: omp_offload.failed:
416 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
417 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
418 // CHECK3: omp_offload.cont:
419 // CHECK3-NEXT: [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
420 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A3]], i32 0, i32 0
421 // CHECK3-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i32 0, i32 0
422 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[ARRAYIDX4]], align 4
423 // CHECK3-NEXT: ret i32 [[TMP18]]
424 //
425 //
426 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28
427 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
428 // CHECK3-NEXT: entry:
429 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
430 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
431 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
432 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
433 // CHECK3-NEXT: ret void
434 //
435 //
436 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
437 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
438 // CHECK3-NEXT: entry:
439 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
440 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
441 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
442 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
443 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
444 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
445 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
446 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
447 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
448 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
449 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
450 // CHECK3-NEXT: [[J:%.*]] = alloca i32, align 4
451 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
452 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
453 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
454 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
455 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
456 // CHECK3-NEXT: store i32 56087, i32* [[DOTOMP_COMB_UB]], align 4
457 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
458 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
459 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
460 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
461 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
462 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
463 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087
464 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
465 // CHECK3: cond.true:
466 // CHECK3-NEXT: br label [[COND_END:%.*]]
467 // CHECK3: cond.false:
468 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
469 // CHECK3-NEXT: br label [[COND_END]]
470 // CHECK3: cond.end:
471 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
472 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
473 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
474 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
475 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
476 // CHECK3: omp.inner.for.cond:
477 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
478 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !5
479 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
480 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
481 // CHECK3: omp.inner.for.body:
482 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !5
483 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !5
484 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]), !llvm.access.group !5
485 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
486 // CHECK3: omp.inner.for.inc:
487 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
488 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !5
489 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
490 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !5
491 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
492 // CHECK3: omp.inner.for.end:
493 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
494 // CHECK3: omp.loop.exit:
495 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
496 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
497 // CHECK3-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
498 // CHECK3-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
499 // CHECK3: .omp.final.then:
500 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4
501 // CHECK3-NEXT: store i32 456, i32* [[J]], align 4
502 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
503 // CHECK3: .omp.final.done:
504 // CHECK3-NEXT: ret void
505 //
506 //
507 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
508 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
509 // CHECK3-NEXT: entry:
510 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
511 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
512 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
513 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
514 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
515 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
516 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
517 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
518 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
519 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
520 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
521 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
522 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
523 // CHECK3-NEXT: [[J:%.*]] = alloca i32, align 4
524 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
525 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
526 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
527 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
528 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
529 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
530 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
531 // CHECK3-NEXT: store i32 56087, i32* [[DOTOMP_UB]], align 4
532 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
533 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
534 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
535 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
536 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
537 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
538 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
539 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
540 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
541 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
542 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 56087
543 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
544 // CHECK3: cond.true:
545 // CHECK3-NEXT: br label [[COND_END:%.*]]
546 // CHECK3: cond.false:
547 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
548 // CHECK3-NEXT: br label [[COND_END]]
549 // CHECK3: cond.end:
550 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
551 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
552 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
553 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
554 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
555 // CHECK3: omp.inner.for.cond:
556 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
557 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9
558 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
559 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
560 // CHECK3: omp.inner.for.body:
561 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
562 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 456
563 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
564 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
565 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9
566 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
567 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
568 // CHECK3-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP12]], 456
569 // CHECK3-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456
570 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL4]]
571 // CHECK3-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1
572 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]
573 // CHECK3-NEXT: store i32 [[ADD6]], i32* [[J]], align 4, !llvm.access.group !9
574 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
575 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !9
576 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i32 0, i32 [[TMP13]]
577 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4, !llvm.access.group !9
578 // CHECK3-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP14]]
579 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX7]], align 4, !llvm.access.group !9
580 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
581 // CHECK3: omp.body.continue:
582 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
583 // CHECK3: omp.inner.for.inc:
584 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
585 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1
586 // CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
587 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
588 // CHECK3: omp.inner.for.end:
589 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
590 // CHECK3: omp.loop.exit:
591 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
592 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
593 // CHECK3-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
594 // CHECK3-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
595 // CHECK3: .omp.final.then:
596 // CHECK3-NEXT: store i32 123, i32* [[I]], align 4
597 // CHECK3-NEXT: store i32 456, i32* [[J]], align 4
598 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
599 // CHECK3: .omp.final.done:
600 // CHECK3-NEXT: ret void
601 //
602 //
603 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
604 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] {
605 // CHECK3-NEXT: entry:
606 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1)
607 // CHECK3-NEXT: ret void
608 //
609 //
610 // CHECK5-LABEL: define {{[^@]+}}@_Z21teams_template_structv
611 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] {
612 // CHECK5-NEXT: entry:
613 // CHECK5-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
614 // CHECK5-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[V]])
615 // CHECK5-NEXT: ret i32 [[CALL]]
616 //
617 //
618 // CHECK5-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
619 // CHECK5-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
620 // CHECK5-NEXT: entry:
621 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
622 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
623 // CHECK5-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
624 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
625 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
626 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
627 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
628 // CHECK5-NEXT: [[J:%.*]] = alloca i32, align 4
629 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
630 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
631 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
632 // CHECK5-NEXT: store i32 56087, i32* [[DOTOMP_UB]], align 4
633 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
634 // CHECK5-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
635 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
636 // CHECK5: omp.inner.for.cond:
637 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
638 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !2
639 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
640 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
641 // CHECK5: omp.inner.for.body:
642 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
643 // CHECK5-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP3]], 456
644 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
645 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
646 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !2
647 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
648 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
649 // CHECK5-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP5]], 456
650 // CHECK5-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456
651 // CHECK5-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], [[MUL4]]
652 // CHECK5-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1
653 // CHECK5-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]
654 // CHECK5-NEXT: store i32 [[ADD6]], i32* [[J]], align 4, !llvm.access.group !2
655 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
656 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !2
657 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64
658 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i64 0, i64 [[IDXPROM]]
659 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[J]], align 4, !llvm.access.group !2
660 // CHECK5-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP7]] to i64
661 // CHECK5-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM7]]
662 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX8]], align 4, !llvm.access.group !2
663 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
664 // CHECK5: omp.body.continue:
665 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
666 // CHECK5: omp.inner.for.inc:
667 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
668 // CHECK5-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP8]], 1
669 // CHECK5-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !2
670 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
671 // CHECK5: omp.inner.for.end:
672 // CHECK5-NEXT: store i32 123, i32* [[I]], align 4
673 // CHECK5-NEXT: store i32 456, i32* [[J]], align 4
674 // CHECK5-NEXT: [[A10:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
675 // CHECK5-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A10]], i64 0, i64 0
676 // CHECK5-NEXT: [[ARRAYIDX12:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX11]], i64 0, i64 0
677 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX12]], align 4
678 // CHECK5-NEXT: ret i32 [[TMP9]]
679 //
680 //
681 // CHECK7-LABEL: define {{[^@]+}}@_Z21teams_template_structv
682 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] {
683 // CHECK7-NEXT: entry:
684 // CHECK7-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
685 // CHECK7-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[V]])
686 // CHECK7-NEXT: ret i32 [[CALL]]
687 //
688 //
689 // CHECK7-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
690 // CHECK7-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
691 // CHECK7-NEXT: entry:
692 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
693 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
694 // CHECK7-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
695 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
696 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
697 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
698 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
699 // CHECK7-NEXT: [[J:%.*]] = alloca i32, align 4
700 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
701 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
702 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
703 // CHECK7-NEXT: store i32 56087, i32* [[DOTOMP_UB]], align 4
704 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
705 // CHECK7-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
706 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
707 // CHECK7: omp.inner.for.cond:
708 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
709 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !3
710 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
711 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
712 // CHECK7: omp.inner.for.body:
713 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
714 // CHECK7-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP3]], 456
715 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
716 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
717 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !3
718 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
719 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
720 // CHECK7-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP5]], 456
721 // CHECK7-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456
722 // CHECK7-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], [[MUL4]]
723 // CHECK7-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1
724 // CHECK7-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]
725 // CHECK7-NEXT: store i32 [[ADD6]], i32* [[J]], align 4, !llvm.access.group !3
726 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
727 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !3
728 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A]], i32 0, i32 [[TMP6]]
729 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[J]], align 4, !llvm.access.group !3
730 // CHECK7-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP7]]
731 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX7]], align 4, !llvm.access.group !3
732 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
733 // CHECK7: omp.body.continue:
734 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
735 // CHECK7: omp.inner.for.inc:
736 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
737 // CHECK7-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP8]], 1
738 // CHECK7-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !3
739 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
740 // CHECK7: omp.inner.for.end:
741 // CHECK7-NEXT: store i32 123, i32* [[I]], align 4
742 // CHECK7-NEXT: store i32 456, i32* [[J]], align 4
743 // CHECK7-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
744 // CHECK7-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [123 x [456 x i32]], [123 x [456 x i32]]* [[A9]], i32 0, i32 0
745 // CHECK7-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [456 x i32], [456 x i32]* [[ARRAYIDX10]], i32 0, i32 0
746 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[ARRAYIDX11]], align 4
747 // CHECK7-NEXT: ret i32 [[TMP9]]
748 //
749 //
750 // CHECK9-LABEL: define {{[^@]+}}@main
751 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
752 // CHECK9-NEXT: entry:
753 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
754 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
755 // CHECK9-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
756 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4
757 // CHECK9-NEXT: [[M:%.*]] = alloca i32, align 4
758 // CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
759 // CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
760 // CHECK9-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8
761 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
762 // CHECK9-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8
763 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 8
764 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 8
765 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 8
766 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 8
767 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
768 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
769 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
770 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
771 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i64, align 8
772 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4
773 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
774 // CHECK9-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
775 // CHECK9-NEXT: store i32 100, i32* [[N]], align 4
776 // CHECK9-NEXT: store i32 2, i32* [[M]], align 4
777 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
778 // CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
779 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[M]], align 4
780 // CHECK9-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64
781 // CHECK9-NEXT: [[TMP4:%.*]] = call i8* @llvm.stacksave()
782 // CHECK9-NEXT: store i8* [[TMP4]], i8** [[SAVED_STACK]], align 8
783 // CHECK9-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]]
784 // CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP5]], align 4
785 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
786 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[__VLA_EXPR1]], align 8
787 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[N]], align 4
788 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
789 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[CONV]], align 4
790 // CHECK9-NEXT: [[TMP7:%.*]] = load i64, i64* [[N_CASTED]], align 8
791 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[M]], align 4
792 // CHECK9-NEXT: [[CONV1:%.*]] = bitcast i64* [[M_CASTED]] to i32*
793 // CHECK9-NEXT: store i32 [[TMP8]], i32* [[CONV1]], align 4
794 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, i64* [[M_CASTED]], align 8
795 // CHECK9-NEXT: [[TMP10:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]]
796 // CHECK9-NEXT: [[TMP11:%.*]] = mul nuw i64 [[TMP10]], 4
797 // CHECK9-NEXT: [[TMP12:%.*]] = bitcast [5 x i64]* [[DOTOFFLOAD_SIZES]] to i8*
798 // CHECK9-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP12]], i8* align 8 bitcast ([5 x i64]* @.offload_sizes to i8*), i64 40, i1 false)
799 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
800 // CHECK9-NEXT: [[TMP14:%.*]] = bitcast i8** [[TMP13]] to i64*
801 // CHECK9-NEXT: store i64 [[TMP7]], i64* [[TMP14]], align 8
802 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
803 // CHECK9-NEXT: [[TMP16:%.*]] = bitcast i8** [[TMP15]] to i64*
804 // CHECK9-NEXT: store i64 [[TMP7]], i64* [[TMP16]], align 8
805 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
806 // CHECK9-NEXT: store i8* null, i8** [[TMP17]], align 8
807 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
808 // CHECK9-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i64*
809 // CHECK9-NEXT: store i64 [[TMP9]], i64* [[TMP19]], align 8
810 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
811 // CHECK9-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64*
812 // CHECK9-NEXT: store i64 [[TMP9]], i64* [[TMP21]], align 8
813 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
814 // CHECK9-NEXT: store i8* null, i8** [[TMP22]], align 8
815 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
816 // CHECK9-NEXT: [[TMP24:%.*]] = bitcast i8** [[TMP23]] to i64*
817 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP24]], align 8
818 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
819 // CHECK9-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to i64*
820 // CHECK9-NEXT: store i64 [[TMP1]], i64* [[TMP26]], align 8
821 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
822 // CHECK9-NEXT: store i8* null, i8** [[TMP27]], align 8
823 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
824 // CHECK9-NEXT: [[TMP29:%.*]] = bitcast i8** [[TMP28]] to i64*
825 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP29]], align 8
826 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
827 // CHECK9-NEXT: [[TMP31:%.*]] = bitcast i8** [[TMP30]] to i64*
828 // CHECK9-NEXT: store i64 [[TMP3]], i64* [[TMP31]], align 8
829 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
830 // CHECK9-NEXT: store i8* null, i8** [[TMP32]], align 8
831 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
832 // CHECK9-NEXT: [[TMP34:%.*]] = bitcast i8** [[TMP33]] to i32**
833 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP34]], align 8
834 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
835 // CHECK9-NEXT: [[TMP36:%.*]] = bitcast i8** [[TMP35]] to i32**
836 // CHECK9-NEXT: store i32* [[VLA]], i32** [[TMP36]], align 8
837 // CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4
838 // CHECK9-NEXT: store i64 [[TMP11]], i64* [[TMP37]], align 8
839 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
840 // CHECK9-NEXT: store i8* null, i8** [[TMP38]], align 8
841 // CHECK9-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
842 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
843 // CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
844 // CHECK9-NEXT: [[TMP42:%.*]] = load i32, i32* [[N]], align 4
845 // CHECK9-NEXT: store i32 [[TMP42]], i32* [[DOTCAPTURE_EXPR_]], align 4
846 // CHECK9-NEXT: [[TMP43:%.*]] = load i32, i32* [[M]], align 4
847 // CHECK9-NEXT: store i32 [[TMP43]], i32* [[DOTCAPTURE_EXPR_3]], align 4
848 // CHECK9-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
849 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP44]], 0
850 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
851 // CHECK9-NEXT: [[CONV5:%.*]] = sext i32 [[DIV]] to i64
852 // CHECK9-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4
853 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP45]], 0
854 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
855 // CHECK9-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64
856 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV5]], [[CONV8]]
857 // CHECK9-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1
858 // CHECK9-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_4]], align 8
859 // CHECK9-NEXT: [[TMP46:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_4]], align 8
860 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP46]], 1
861 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
862 // CHECK9-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
863 // CHECK9-NEXT: store i32 1, i32* [[TMP47]], align 4
864 // CHECK9-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
865 // CHECK9-NEXT: store i32 5, i32* [[TMP48]], align 4
866 // CHECK9-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
867 // CHECK9-NEXT: store i8** [[TMP39]], i8*** [[TMP49]], align 8
868 // CHECK9-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
869 // CHECK9-NEXT: store i8** [[TMP40]], i8*** [[TMP50]], align 8
870 // CHECK9-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
871 // CHECK9-NEXT: store i64* [[TMP41]], i64** [[TMP51]], align 8
872 // CHECK9-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
873 // CHECK9-NEXT: store i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP52]], align 8
874 // CHECK9-NEXT: [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
875 // CHECK9-NEXT: store i8** null, i8*** [[TMP53]], align 8
876 // CHECK9-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
877 // CHECK9-NEXT: store i8** null, i8*** [[TMP54]], align 8
878 // CHECK9-NEXT: [[TMP55:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
879 // CHECK9-NEXT: store i64 [[ADD]], i64* [[TMP55]], align 8
880 // CHECK9-NEXT: [[TMP56:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l86.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
881 // CHECK9-NEXT: [[TMP57:%.*]] = icmp ne i32 [[TMP56]], 0
882 // CHECK9-NEXT: br i1 [[TMP57]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
883 // CHECK9: omp_offload.failed:
884 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l86(i64 [[TMP7]], i64 [[TMP9]], i64 [[TMP1]], i64 [[TMP3]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
885 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
886 // CHECK9: omp_offload.cont:
887 // CHECK9-NEXT: [[TMP58:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
888 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef signext [[TMP58]])
889 // CHECK9-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
890 // CHECK9-NEXT: [[TMP59:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
891 // CHECK9-NEXT: call void @llvm.stackrestore(i8* [[TMP59]])
892 // CHECK9-NEXT: [[TMP60:%.*]] = load i32, i32* [[RETVAL]], align 4
893 // CHECK9-NEXT: ret i32 [[TMP60]]
894 //
895 //
896 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l86
897 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
898 // CHECK9-NEXT: entry:
899 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
900 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
901 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
902 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
903 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
904 // CHECK9-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
905 // CHECK9-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8
906 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
907 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
908 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
909 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
910 // CHECK9-NEXT: [[CONV3:%.*]] = bitcast i64* [[M_ADDR]] to i32*
911 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
912 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
913 // CHECK9-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
914 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i64, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i32* [[CONV3]], i64 [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])
915 // CHECK9-NEXT: ret void
916 //
917 //
918 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined.
919 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
920 // CHECK9-NEXT: entry:
921 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
922 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
923 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
924 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i32*, align 8
925 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
926 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
927 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
928 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
929 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
930 // CHECK9-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
931 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
932 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
933 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8
934 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
935 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4
936 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8
937 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8
938 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
939 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
940 // CHECK9-NEXT: [[I11:%.*]] = alloca i32, align 4
941 // CHECK9-NEXT: [[J12:%.*]] = alloca i32, align 4
942 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
943 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
944 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
945 // CHECK9-NEXT: store i32* [[M]], i32** [[M_ADDR]], align 8
946 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
947 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
948 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
949 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
950 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[M_ADDR]], align 8
951 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
952 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
953 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A_ADDR]], align 8
954 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4
955 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4
956 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4
957 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_4]], align 4
958 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
959 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0
960 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
961 // CHECK9-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
962 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
963 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0
964 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
965 // CHECK9-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64
966 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]]
967 // CHECK9-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1
968 // CHECK9-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8
969 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4
970 // CHECK9-NEXT: store i32 0, i32* [[J]], align 4
971 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
972 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]]
973 // CHECK9-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
974 // CHECK9: land.lhs.true:
975 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
976 // CHECK9-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]]
977 // CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
978 // CHECK9: omp.precond.then:
979 // CHECK9-NEXT: store i64 0, i64* [[DOTOMP_COMB_LB]], align 8
980 // CHECK9-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
981 // CHECK9-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_COMB_UB]], align 8
982 // CHECK9-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
983 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
984 // CHECK9-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
985 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
986 // CHECK9-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 92, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_COMB_LB]], i64* [[DOTOMP_COMB_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
987 // CHECK9-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
988 // CHECK9-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
989 // CHECK9-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]]
990 // CHECK9-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
991 // CHECK9: cond.true:
992 // CHECK9-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
993 // CHECK9-NEXT: br label [[COND_END:%.*]]
994 // CHECK9: cond.false:
995 // CHECK9-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
996 // CHECK9-NEXT: br label [[COND_END]]
997 // CHECK9: cond.end:
998 // CHECK9-NEXT: [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]
999 // CHECK9-NEXT: store i64 [[COND]], i64* [[DOTOMP_COMB_UB]], align 8
1000 // CHECK9-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
1001 // CHECK9-NEXT: store i64 [[TMP18]], i64* [[DOTOMP_IV]], align 8
1002 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1003 // CHECK9: omp.inner.for.cond:
1004 // CHECK9-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !5
1005 // CHECK9-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8, !llvm.access.group !5
1006 // CHECK9-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]]
1007 // CHECK9-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1008 // CHECK9: omp.inner.for.body:
1009 // CHECK9-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8, !llvm.access.group !5
1010 // CHECK9-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8, !llvm.access.group !5
1011 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i32*, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP21]], i64 [[TMP22]], i32* [[TMP0]], i32* [[TMP1]], i64 [[TMP2]], i64 [[TMP3]], i32* [[TMP4]]), !llvm.access.group !5
1012 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1013 // CHECK9: omp.inner.for.inc:
1014 // CHECK9-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !5
1015 // CHECK9-NEXT: [[TMP24:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8, !llvm.access.group !5
1016 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP23]], [[TMP24]]
1017 // CHECK9-NEXT: store i64 [[ADD]], i64* [[DOTOMP_IV]], align 8, !llvm.access.group !5
1018 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
1019 // CHECK9: omp.inner.for.end:
1020 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1021 // CHECK9: omp.loop.exit:
1022 // CHECK9-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1023 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, i32* [[TMP25]], align 4
1024 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP26]])
1025 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1026 // CHECK9-NEXT: [[TMP28:%.*]] = icmp ne i32 [[TMP27]], 0
1027 // CHECK9-NEXT: br i1 [[TMP28]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1028 // CHECK9: .omp.final.then:
1029 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1030 // CHECK9-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP29]], 0
1031 // CHECK9-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
1032 // CHECK9-NEXT: [[MUL17:%.*]] = mul nsw i32 [[DIV16]], 1
1033 // CHECK9-NEXT: [[ADD18:%.*]] = add nsw i32 0, [[MUL17]]
1034 // CHECK9-NEXT: store i32 [[ADD18]], i32* [[I11]], align 4
1035 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
1036 // CHECK9-NEXT: [[SUB19:%.*]] = sub nsw i32 [[TMP30]], 0
1037 // CHECK9-NEXT: [[DIV20:%.*]] = sdiv i32 [[SUB19]], 1
1038 // CHECK9-NEXT: [[MUL21:%.*]] = mul nsw i32 [[DIV20]], 1
1039 // CHECK9-NEXT: [[ADD22:%.*]] = add nsw i32 0, [[MUL21]]
1040 // CHECK9-NEXT: store i32 [[ADD22]], i32* [[J12]], align 4
1041 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
1042 // CHECK9: .omp.final.done:
1043 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
1044 // CHECK9: omp.precond.end:
1045 // CHECK9-NEXT: ret void
1046 //
1047 //
1048 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1
1049 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
1050 // CHECK9-NEXT: entry:
1051 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1052 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1053 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1054 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1055 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
1056 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i32*, align 8
1057 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
1058 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
1059 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
1060 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
1061 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1062 // CHECK9-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
1063 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1064 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
1065 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8
1066 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1067 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4
1068 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
1069 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
1070 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
1071 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1072 // CHECK9-NEXT: [[I11:%.*]] = alloca i32, align 4
1073 // CHECK9-NEXT: [[J12:%.*]] = alloca i32, align 4
1074 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1075 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1076 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1077 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1078 // CHECK9-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
1079 // CHECK9-NEXT: store i32* [[M]], i32** [[M_ADDR]], align 8
1080 // CHECK9-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
1081 // CHECK9-NEXT: store i64 [[VLA1]], i64* [[VLA_ADDR2]], align 8
1082 // CHECK9-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
1083 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
1084 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[M_ADDR]], align 8
1085 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
1086 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, i64* [[VLA_ADDR2]], align 8
1087 // CHECK9-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A_ADDR]], align 8
1088 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4
1089 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4
1090 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4
1091 // CHECK9-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_4]], align 4
1092 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1093 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0
1094 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1095 // CHECK9-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
1096 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
1097 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0
1098 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
1099 // CHECK9-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64
1100 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]]
1101 // CHECK9-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1
1102 // CHECK9-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8
1103 // CHECK9-NEXT: store i32 0, i32* [[I]], align 4
1104 // CHECK9-NEXT: store i32 0, i32* [[J]], align 4
1105 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1106 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]]
1107 // CHECK9-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
1108 // CHECK9: land.lhs.true:
1109 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
1110 // CHECK9-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]]
1111 // CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
1112 // CHECK9: omp.precond.then:
1113 // CHECK9-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8
1114 // CHECK9-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
1115 // CHECK9-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_UB]], align 8
1116 // CHECK9-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1117 // CHECK9-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1118 // CHECK9-NEXT: store i64 [[TMP12]], i64* [[DOTOMP_LB]], align 8
1119 // CHECK9-NEXT: store i64 [[TMP13]], i64* [[DOTOMP_UB]], align 8
1120 // CHECK9-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
1121 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1122 // CHECK9-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1123 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
1124 // CHECK9-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
1125 // CHECK9-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
1126 // CHECK9-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
1127 // CHECK9-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP16]], [[TMP17]]
1128 // CHECK9-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1129 // CHECK9: cond.true:
1130 // CHECK9-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
1131 // CHECK9-NEXT: br label [[COND_END:%.*]]
1132 // CHECK9: cond.false:
1133 // CHECK9-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
1134 // CHECK9-NEXT: br label [[COND_END]]
1135 // CHECK9: cond.end:
1136 // CHECK9-NEXT: [[COND:%.*]] = phi i64 [ [[TMP18]], [[COND_TRUE]] ], [ [[TMP19]], [[COND_FALSE]] ]
1137 // CHECK9-NEXT: store i64 [[COND]], i64* [[DOTOMP_UB]], align 8
1138 // CHECK9-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8
1139 // CHECK9-NEXT: store i64 [[TMP20]], i64* [[DOTOMP_IV]], align 8
1140 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1141 // CHECK9: omp.inner.for.cond:
1142 // CHECK9-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !9
1143 // CHECK9-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8, !llvm.access.group !9
1144 // CHECK9-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP21]], [[TMP22]]
1145 // CHECK9-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1146 // CHECK9: omp.inner.for.body:
1147 // CHECK9-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !9
1148 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4, !llvm.access.group !9
1149 // CHECK9-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP24]], 0
1150 // CHECK9-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
1151 // CHECK9-NEXT: [[MUL17:%.*]] = mul nsw i32 1, [[DIV16]]
1152 // CHECK9-NEXT: [[CONV18:%.*]] = sext i32 [[MUL17]] to i64
1153 // CHECK9-NEXT: [[DIV19:%.*]] = sdiv i64 [[TMP23]], [[CONV18]]
1154 // CHECK9-NEXT: [[MUL20:%.*]] = mul nsw i64 [[DIV19]], 1
1155 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL20]]
1156 // CHECK9-NEXT: [[CONV21:%.*]] = trunc i64 [[ADD]] to i32
1157 // CHECK9-NEXT: store i32 [[CONV21]], i32* [[I11]], align 4, !llvm.access.group !9
1158 // CHECK9-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !9
1159 // CHECK9-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !9
1160 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4, !llvm.access.group !9
1161 // CHECK9-NEXT: [[SUB22:%.*]] = sub nsw i32 [[TMP27]], 0
1162 // CHECK9-NEXT: [[DIV23:%.*]] = sdiv i32 [[SUB22]], 1
1163 // CHECK9-NEXT: [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]]
1164 // CHECK9-NEXT: [[CONV25:%.*]] = sext i32 [[MUL24]] to i64
1165 // CHECK9-NEXT: [[DIV26:%.*]] = sdiv i64 [[TMP26]], [[CONV25]]
1166 // CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4, !llvm.access.group !9
1167 // CHECK9-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP28]], 0
1168 // CHECK9-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1
1169 // CHECK9-NEXT: [[MUL29:%.*]] = mul nsw i32 1, [[DIV28]]
1170 // CHECK9-NEXT: [[CONV30:%.*]] = sext i32 [[MUL29]] to i64
1171 // CHECK9-NEXT: [[MUL31:%.*]] = mul nsw i64 [[DIV26]], [[CONV30]]
1172 // CHECK9-NEXT: [[SUB32:%.*]] = sub nsw i64 [[TMP25]], [[MUL31]]
1173 // CHECK9-NEXT: [[MUL33:%.*]] = mul nsw i64 [[SUB32]], 1
1174 // CHECK9-NEXT: [[ADD34:%.*]] = add nsw i64 0, [[MUL33]]
1175 // CHECK9-NEXT: [[CONV35:%.*]] = trunc i64 [[ADD34]] to i32
1176 // CHECK9-NEXT: store i32 [[CONV35]], i32* [[J12]], align 4, !llvm.access.group !9
1177 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, i32* [[I11]], align 4, !llvm.access.group !9
1178 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP29]] to i64
1179 // CHECK9-NEXT: [[TMP30:%.*]] = mul nsw i64 [[IDXPROM]], [[TMP3]]
1180 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP4]], i64 [[TMP30]]
1181 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[J12]], align 4, !llvm.access.group !9
1182 // CHECK9-NEXT: [[IDXPROM36:%.*]] = sext i32 [[TMP31]] to i64
1183 // CHECK9-NEXT: [[ARRAYIDX37:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i64 [[IDXPROM36]]
1184 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX37]], align 4, !llvm.access.group !9
1185 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1186 // CHECK9: omp.body.continue:
1187 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1188 // CHECK9: omp.inner.for.inc:
1189 // CHECK9-NEXT: [[TMP32:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !9
1190 // CHECK9-NEXT: [[ADD38:%.*]] = add nsw i64 [[TMP32]], 1
1191 // CHECK9-NEXT: store i64 [[ADD38]], i64* [[DOTOMP_IV]], align 8, !llvm.access.group !9
1192 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
1193 // CHECK9: omp.inner.for.end:
1194 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1195 // CHECK9: omp.loop.exit:
1196 // CHECK9-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1197 // CHECK9-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4
1198 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]])
1199 // CHECK9-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1200 // CHECK9-NEXT: [[TMP36:%.*]] = icmp ne i32 [[TMP35]], 0
1201 // CHECK9-NEXT: br i1 [[TMP36]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1202 // CHECK9: .omp.final.then:
1203 // CHECK9-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1204 // CHECK9-NEXT: [[SUB39:%.*]] = sub nsw i32 [[TMP37]], 0
1205 // CHECK9-NEXT: [[DIV40:%.*]] = sdiv i32 [[SUB39]], 1
1206 // CHECK9-NEXT: [[MUL41:%.*]] = mul nsw i32 [[DIV40]], 1
1207 // CHECK9-NEXT: [[ADD42:%.*]] = add nsw i32 0, [[MUL41]]
1208 // CHECK9-NEXT: store i32 [[ADD42]], i32* [[I11]], align 4
1209 // CHECK9-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
1210 // CHECK9-NEXT: [[SUB43:%.*]] = sub nsw i32 [[TMP38]], 0
1211 // CHECK9-NEXT: [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1
1212 // CHECK9-NEXT: [[MUL45:%.*]] = mul nsw i32 [[DIV44]], 1
1213 // CHECK9-NEXT: [[ADD46:%.*]] = add nsw i32 0, [[MUL45]]
1214 // CHECK9-NEXT: store i32 [[ADD46]], i32* [[J12]], align 4
1215 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
1216 // CHECK9: .omp.final.done:
1217 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
1218 // CHECK9: omp.precond.end:
1219 // CHECK9-NEXT: ret void
1220 //
1221 //
1222 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_
1223 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {
1224 // CHECK9-NEXT: entry:
1225 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
1226 // CHECK9-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4
1227 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
1228 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
1229 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
1230 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1231 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1232 // CHECK9-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
1233 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1234 // CHECK9-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x [2 x i32]]**
1235 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP1]], align 8
1236 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1237 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x [2 x i32]]**
1238 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP3]], align 8
1239 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1240 // CHECK9-NEXT: store i8* null, i8** [[TMP4]], align 8
1241 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1242 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1243 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1244 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
1245 // CHECK9-NEXT: store i32 1, i32* [[TMP7]], align 4
1246 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
1247 // CHECK9-NEXT: store i32 1, i32* [[TMP8]], align 4
1248 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1249 // CHECK9-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 8
1250 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1251 // CHECK9-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 8
1252 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1253 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64** [[TMP11]], align 8
1254 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1255 // CHECK9-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP12]], align 8
1256 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1257 // CHECK9-NEXT: store i8** null, i8*** [[TMP13]], align 8
1258 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1259 // CHECK9-NEXT: store i8** null, i8*** [[TMP14]], align 8
1260 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1261 // CHECK9-NEXT: store i64 20, i64* [[TMP15]], align 8
1262 // CHECK9-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l72.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1263 // CHECK9-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
1264 // CHECK9-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1265 // CHECK9: omp_offload.failed:
1266 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l72([10 x [2 x i32]]* [[A]]) #[[ATTR3]]
1267 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
1268 // CHECK9: omp_offload.cont:
1269 // CHECK9-NEXT: ret i32 0
1270 //
1271 //
1272 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l72
1273 // CHECK9-SAME: ([10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
1274 // CHECK9-NEXT: entry:
1275 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8
1276 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8
1277 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8
1278 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x [2 x i32]]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [10 x [2 x i32]]* [[TMP0]])
1279 // CHECK9-NEXT: ret void
1280 //
1281 //
1282 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..2
1283 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
1284 // CHECK9-NEXT: entry:
1285 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1286 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1287 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8
1288 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1289 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1290 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1291 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1292 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1293 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1294 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1295 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1296 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4
1297 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1298 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1299 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8
1300 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8
1301 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1302 // CHECK9-NEXT: store i32 19, i32* [[DOTOMP_COMB_UB]], align 4
1303 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1304 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1305 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1306 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1307 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1308 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1309 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19
1310 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1311 // CHECK9: cond.true:
1312 // CHECK9-NEXT: br label [[COND_END:%.*]]
1313 // CHECK9: cond.false:
1314 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1315 // CHECK9-NEXT: br label [[COND_END]]
1316 // CHECK9: cond.end:
1317 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1318 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1319 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1320 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1321 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1322 // CHECK9: omp.inner.for.cond:
1323 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
1324 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !14
1325 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1326 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1327 // CHECK9: omp.inner.for.body:
1328 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !14
1329 // CHECK9-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1330 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !14
1331 // CHECK9-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1332 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x [2 x i32]]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x [2 x i32]]* [[TMP0]]), !llvm.access.group !14
1333 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1334 // CHECK9: omp.inner.for.inc:
1335 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
1336 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !14
1337 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1338 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
1339 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
1340 // CHECK9: omp.inner.for.end:
1341 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1342 // CHECK9: omp.loop.exit:
1343 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1344 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1345 // CHECK9-NEXT: [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
1346 // CHECK9-NEXT: br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1347 // CHECK9: .omp.final.then:
1348 // CHECK9-NEXT: store i32 10, i32* [[I]], align 4
1349 // CHECK9-NEXT: store i32 2, i32* [[J]], align 4
1350 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
1351 // CHECK9: .omp.final.done:
1352 // CHECK9-NEXT: ret void
1353 //
1354 //
1355 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..3
1356 // CHECK9-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
1357 // CHECK9-NEXT: entry:
1358 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1359 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1360 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1361 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1362 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 8
1363 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1364 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1365 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1366 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1367 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1368 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1369 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1370 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1371 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4
1372 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1373 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1374 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1375 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1376 // CHECK9-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 8
1377 // CHECK9-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 8
1378 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1379 // CHECK9-NEXT: store i32 19, i32* [[DOTOMP_UB]], align 4
1380 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1381 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1382 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1383 // CHECK9-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
1384 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1385 // CHECK9-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
1386 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1387 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1388 // CHECK9-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1389 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1390 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1391 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1392 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 19
1393 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1394 // CHECK9: cond.true:
1395 // CHECK9-NEXT: br label [[COND_END:%.*]]
1396 // CHECK9: cond.false:
1397 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1398 // CHECK9-NEXT: br label [[COND_END]]
1399 // CHECK9: cond.end:
1400 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
1401 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1402 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1403 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
1404 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1405 // CHECK9: omp.inner.for.cond:
1406 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
1407 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !17
1408 // CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1409 // CHECK9-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1410 // CHECK9: omp.inner.for.body:
1411 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
1412 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 2
1413 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
1414 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1415 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !17
1416 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
1417 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
1418 // CHECK9-NEXT: [[DIV4:%.*]] = sdiv i32 [[TMP12]], 2
1419 // CHECK9-NEXT: [[MUL5:%.*]] = mul nsw i32 [[DIV4]], 2
1420 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL5]]
1421 // CHECK9-NEXT: [[MUL6:%.*]] = mul nsw i32 [[SUB]], 1
1422 // CHECK9-NEXT: [[ADD7:%.*]] = add nsw i32 0, [[MUL6]]
1423 // CHECK9-NEXT: store i32 [[ADD7]], i32* [[J]], align 4, !llvm.access.group !17
1424 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !17
1425 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
1426 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[TMP0]], i64 0, i64 [[IDXPROM]]
1427 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4, !llvm.access.group !17
1428 // CHECK9-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP14]] to i64
1429 // CHECK9-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM8]]
1430 // CHECK9-NEXT: store i32 0, i32* [[ARRAYIDX9]], align 4, !llvm.access.group !17
1431 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1432 // CHECK9: omp.body.continue:
1433 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1434 // CHECK9: omp.inner.for.inc:
1435 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
1436 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP15]], 1
1437 // CHECK9-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
1438 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
1439 // CHECK9: omp.inner.for.end:
1440 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1441 // CHECK9: omp.loop.exit:
1442 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1443 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1444 // CHECK9-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
1445 // CHECK9-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1446 // CHECK9: .omp.final.then:
1447 // CHECK9-NEXT: store i32 10, i32* [[I]], align 4
1448 // CHECK9-NEXT: store i32 2, i32* [[J]], align 4
1449 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
1450 // CHECK9: .omp.final.done:
1451 // CHECK9-NEXT: ret void
1452 //
1453 //
1454 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1455 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] {
1456 // CHECK9-NEXT: entry:
1457 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1)
1458 // CHECK9-NEXT: ret void
1459 //
1460 //
1461 // CHECK11-LABEL: define {{[^@]+}}@main
1462 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
1463 // CHECK11-NEXT: entry:
1464 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1465 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
1466 // CHECK11-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
1467 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4
1468 // CHECK11-NEXT: [[M:%.*]] = alloca i32, align 4
1469 // CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
1470 // CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
1471 // CHECK11-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4
1472 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
1473 // CHECK11-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4
1474 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x i8*], align 4
1475 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x i8*], align 4
1476 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x i8*], align 4
1477 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 4
1478 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
1479 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1480 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1481 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
1482 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
1483 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4
1484 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
1485 // CHECK11-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
1486 // CHECK11-NEXT: store i32 100, i32* [[N]], align 4
1487 // CHECK11-NEXT: store i32 2, i32* [[M]], align 4
1488 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
1489 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[M]], align 4
1490 // CHECK11-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
1491 // CHECK11-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4
1492 // CHECK11-NEXT: [[TMP3:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]]
1493 // CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP3]], align 4
1494 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
1495 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR1]], align 4
1496 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[N]], align 4
1497 // CHECK11-NEXT: store i32 [[TMP4]], i32* [[N_CASTED]], align 4
1498 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[N_CASTED]], align 4
1499 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[M]], align 4
1500 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[M_CASTED]], align 4
1501 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[M_CASTED]], align 4
1502 // CHECK11-NEXT: [[TMP8:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]]
1503 // CHECK11-NEXT: [[TMP9:%.*]] = mul nuw i32 [[TMP8]], 4
1504 // CHECK11-NEXT: [[TMP10:%.*]] = sext i32 [[TMP9]] to i64
1505 // CHECK11-NEXT: [[TMP11:%.*]] = bitcast [5 x i64]* [[DOTOFFLOAD_SIZES]] to i8*
1506 // CHECK11-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP11]], i8* align 4 bitcast ([5 x i64]* @.offload_sizes to i8*), i32 40, i1 false)
1507 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1508 // CHECK11-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
1509 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[TMP13]], align 4
1510 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1511 // CHECK11-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
1512 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[TMP15]], align 4
1513 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1514 // CHECK11-NEXT: store i8* null, i8** [[TMP16]], align 4
1515 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1516 // CHECK11-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32*
1517 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[TMP18]], align 4
1518 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1519 // CHECK11-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32*
1520 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[TMP20]], align 4
1521 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
1522 // CHECK11-NEXT: store i8* null, i8** [[TMP21]], align 4
1523 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1524 // CHECK11-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32*
1525 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP23]], align 4
1526 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1527 // CHECK11-NEXT: [[TMP25:%.*]] = bitcast i8** [[TMP24]] to i32*
1528 // CHECK11-NEXT: store i32 [[TMP0]], i32* [[TMP25]], align 4
1529 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
1530 // CHECK11-NEXT: store i8* null, i8** [[TMP26]], align 4
1531 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1532 // CHECK11-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to i32*
1533 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[TMP28]], align 4
1534 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1535 // CHECK11-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to i32*
1536 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[TMP30]], align 4
1537 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
1538 // CHECK11-NEXT: store i8* null, i8** [[TMP31]], align 4
1539 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
1540 // CHECK11-NEXT: [[TMP33:%.*]] = bitcast i8** [[TMP32]] to i32**
1541 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP33]], align 4
1542 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 4
1543 // CHECK11-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to i32**
1544 // CHECK11-NEXT: store i32* [[VLA]], i32** [[TMP35]], align 4
1545 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 4
1546 // CHECK11-NEXT: store i64 [[TMP10]], i64* [[TMP36]], align 4
1547 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
1548 // CHECK11-NEXT: store i8* null, i8** [[TMP37]], align 4
1549 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1550 // CHECK11-NEXT: [[TMP39:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1551 // CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds [5 x i64], [5 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
1552 // CHECK11-NEXT: [[TMP41:%.*]] = load i32, i32* [[N]], align 4
1553 // CHECK11-NEXT: store i32 [[TMP41]], i32* [[DOTCAPTURE_EXPR_]], align 4
1554 // CHECK11-NEXT: [[TMP42:%.*]] = load i32, i32* [[M]], align 4
1555 // CHECK11-NEXT: store i32 [[TMP42]], i32* [[DOTCAPTURE_EXPR_2]], align 4
1556 // CHECK11-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1557 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP43]], 0
1558 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1559 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
1560 // CHECK11-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
1561 // CHECK11-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP44]], 0
1562 // CHECK11-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
1563 // CHECK11-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
1564 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
1565 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
1566 // CHECK11-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8
1567 // CHECK11-NEXT: [[TMP45:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
1568 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP45]], 1
1569 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1570 // CHECK11-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
1571 // CHECK11-NEXT: store i32 1, i32* [[TMP46]], align 4
1572 // CHECK11-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
1573 // CHECK11-NEXT: store i32 5, i32* [[TMP47]], align 4
1574 // CHECK11-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1575 // CHECK11-NEXT: store i8** [[TMP38]], i8*** [[TMP48]], align 4
1576 // CHECK11-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1577 // CHECK11-NEXT: store i8** [[TMP39]], i8*** [[TMP49]], align 4
1578 // CHECK11-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1579 // CHECK11-NEXT: store i64* [[TMP40]], i64** [[TMP50]], align 4
1580 // CHECK11-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1581 // CHECK11-NEXT: store i64* getelementptr inbounds ([5 x i64], [5 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP51]], align 4
1582 // CHECK11-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1583 // CHECK11-NEXT: store i8** null, i8*** [[TMP52]], align 4
1584 // CHECK11-NEXT: [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1585 // CHECK11-NEXT: store i8** null, i8*** [[TMP53]], align 4
1586 // CHECK11-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1587 // CHECK11-NEXT: store i64 [[ADD]], i64* [[TMP54]], align 8
1588 // CHECK11-NEXT: [[TMP55:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l86.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1589 // CHECK11-NEXT: [[TMP56:%.*]] = icmp ne i32 [[TMP55]], 0
1590 // CHECK11-NEXT: br i1 [[TMP56]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1591 // CHECK11: omp_offload.failed:
1592 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l86(i32 [[TMP5]], i32 [[TMP7]], i32 [[TMP0]], i32 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
1593 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
1594 // CHECK11: omp_offload.cont:
1595 // CHECK11-NEXT: [[TMP57:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
1596 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef [[TMP57]])
1597 // CHECK11-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
1598 // CHECK11-NEXT: [[TMP58:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
1599 // CHECK11-NEXT: call void @llvm.stackrestore(i8* [[TMP58]])
1600 // CHECK11-NEXT: [[TMP59:%.*]] = load i32, i32* [[RETVAL]], align 4
1601 // CHECK11-NEXT: ret i32 [[TMP59]]
1602 //
1603 //
1604 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l86
1605 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
1606 // CHECK11-NEXT: entry:
1607 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1608 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
1609 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
1610 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
1611 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
1612 // CHECK11-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
1613 // CHECK11-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4
1614 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
1615 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
1616 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
1617 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
1618 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
1619 // CHECK11-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
1620 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32*, i32, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32* [[M_ADDR]], i32 [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])
1621 // CHECK11-NEXT: ret void
1622 //
1623 //
1624 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined.
1625 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
1626 // CHECK11-NEXT: entry:
1627 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1628 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1629 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
1630 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32*, align 4
1631 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
1632 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
1633 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
1634 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
1635 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
1636 // CHECK11-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
1637 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1638 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
1639 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8
1640 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
1641 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4
1642 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i64, align 8
1643 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i64, align 8
1644 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
1645 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1646 // CHECK11-NEXT: [[I11:%.*]] = alloca i32, align 4
1647 // CHECK11-NEXT: [[J12:%.*]] = alloca i32, align 4
1648 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1649 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1650 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
1651 // CHECK11-NEXT: store i32* [[M]], i32** [[M_ADDR]], align 4
1652 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
1653 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
1654 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
1655 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
1656 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[M_ADDR]], align 4
1657 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
1658 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
1659 // CHECK11-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A_ADDR]], align 4
1660 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4
1661 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4
1662 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4
1663 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_4]], align 4
1664 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1665 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0
1666 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1667 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
1668 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
1669 // CHECK11-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0
1670 // CHECK11-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
1671 // CHECK11-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64
1672 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]]
1673 // CHECK11-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1
1674 // CHECK11-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8
1675 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4
1676 // CHECK11-NEXT: store i32 0, i32* [[J]], align 4
1677 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1678 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]]
1679 // CHECK11-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
1680 // CHECK11: land.lhs.true:
1681 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
1682 // CHECK11-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]]
1683 // CHECK11-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
1684 // CHECK11: omp.precond.then:
1685 // CHECK11-NEXT: store i64 0, i64* [[DOTOMP_COMB_LB]], align 8
1686 // CHECK11-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
1687 // CHECK11-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_COMB_UB]], align 8
1688 // CHECK11-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
1689 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1690 // CHECK11-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1691 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
1692 // CHECK11-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 92, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_COMB_LB]], i64* [[DOTOMP_COMB_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
1693 // CHECK11-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
1694 // CHECK11-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
1695 // CHECK11-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]]
1696 // CHECK11-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1697 // CHECK11: cond.true:
1698 // CHECK11-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
1699 // CHECK11-NEXT: br label [[COND_END:%.*]]
1700 // CHECK11: cond.false:
1701 // CHECK11-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8
1702 // CHECK11-NEXT: br label [[COND_END]]
1703 // CHECK11: cond.end:
1704 // CHECK11-NEXT: [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]
1705 // CHECK11-NEXT: store i64 [[COND]], i64* [[DOTOMP_COMB_UB]], align 8
1706 // CHECK11-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8
1707 // CHECK11-NEXT: store i64 [[TMP18]], i64* [[DOTOMP_IV]], align 8
1708 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1709 // CHECK11: omp.inner.for.cond:
1710 // CHECK11-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !6
1711 // CHECK11-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8, !llvm.access.group !6
1712 // CHECK11-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]]
1713 // CHECK11-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1714 // CHECK11: omp.inner.for.body:
1715 // CHECK11-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_COMB_LB]], align 8, !llvm.access.group !6
1716 // CHECK11-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP21]] to i32
1717 // CHECK11-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_COMB_UB]], align 8, !llvm.access.group !6
1718 // CHECK11-NEXT: [[TMP24:%.*]] = trunc i64 [[TMP23]] to i32
1719 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 7, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32*, i32, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP22]], i32 [[TMP24]], i32* [[TMP0]], i32* [[TMP1]], i32 [[TMP2]], i32 [[TMP3]], i32* [[TMP4]]), !llvm.access.group !6
1720 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1721 // CHECK11: omp.inner.for.inc:
1722 // CHECK11-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !6
1723 // CHECK11-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_STRIDE]], align 8, !llvm.access.group !6
1724 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP25]], [[TMP26]]
1725 // CHECK11-NEXT: store i64 [[ADD]], i64* [[DOTOMP_IV]], align 8, !llvm.access.group !6
1726 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
1727 // CHECK11: omp.inner.for.end:
1728 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1729 // CHECK11: omp.loop.exit:
1730 // CHECK11-NEXT: [[TMP27:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1731 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[TMP27]], align 4
1732 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP28]])
1733 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1734 // CHECK11-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
1735 // CHECK11-NEXT: br i1 [[TMP30]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1736 // CHECK11: .omp.final.then:
1737 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1738 // CHECK11-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP31]], 0
1739 // CHECK11-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
1740 // CHECK11-NEXT: [[MUL17:%.*]] = mul nsw i32 [[DIV16]], 1
1741 // CHECK11-NEXT: [[ADD18:%.*]] = add nsw i32 0, [[MUL17]]
1742 // CHECK11-NEXT: store i32 [[ADD18]], i32* [[I11]], align 4
1743 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
1744 // CHECK11-NEXT: [[SUB19:%.*]] = sub nsw i32 [[TMP32]], 0
1745 // CHECK11-NEXT: [[DIV20:%.*]] = sdiv i32 [[SUB19]], 1
1746 // CHECK11-NEXT: [[MUL21:%.*]] = mul nsw i32 [[DIV20]], 1
1747 // CHECK11-NEXT: [[ADD22:%.*]] = add nsw i32 0, [[MUL21]]
1748 // CHECK11-NEXT: store i32 [[ADD22]], i32* [[J12]], align 4
1749 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
1750 // CHECK11: .omp.final.done:
1751 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
1752 // CHECK11: omp.precond.end:
1753 // CHECK11-NEXT: ret void
1754 //
1755 //
1756 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..1
1757 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
1758 // CHECK11-NEXT: entry:
1759 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1760 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1761 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1762 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1763 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
1764 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32*, align 4
1765 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
1766 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
1767 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
1768 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
1769 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
1770 // CHECK11-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
1771 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1772 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
1773 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8
1774 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
1775 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4
1776 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
1777 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
1778 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
1779 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1780 // CHECK11-NEXT: [[I13:%.*]] = alloca i32, align 4
1781 // CHECK11-NEXT: [[J14:%.*]] = alloca i32, align 4
1782 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1783 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1784 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1785 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1786 // CHECK11-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
1787 // CHECK11-NEXT: store i32* [[M]], i32** [[M_ADDR]], align 4
1788 // CHECK11-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
1789 // CHECK11-NEXT: store i32 [[VLA1]], i32* [[VLA_ADDR2]], align 4
1790 // CHECK11-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
1791 // CHECK11-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
1792 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[M_ADDR]], align 4
1793 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
1794 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[VLA_ADDR2]], align 4
1795 // CHECK11-NEXT: [[TMP4:%.*]] = load i32*, i32** [[A_ADDR]], align 4
1796 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP0]], align 4
1797 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_]], align 4
1798 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP1]], align 4
1799 // CHECK11-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_4]], align 4
1800 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1801 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0
1802 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1803 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
1804 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
1805 // CHECK11-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0
1806 // CHECK11-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
1807 // CHECK11-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64
1808 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]]
1809 // CHECK11-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1
1810 // CHECK11-NEXT: store i64 [[SUB9]], i64* [[DOTCAPTURE_EXPR_5]], align 8
1811 // CHECK11-NEXT: store i32 0, i32* [[I]], align 4
1812 // CHECK11-NEXT: store i32 0, i32* [[J]], align 4
1813 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1814 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]]
1815 // CHECK11-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
1816 // CHECK11: land.lhs.true:
1817 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
1818 // CHECK11-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]]
1819 // CHECK11-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
1820 // CHECK11: omp.precond.then:
1821 // CHECK11-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8
1822 // CHECK11-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
1823 // CHECK11-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_UB]], align 8
1824 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1825 // CHECK11-NEXT: [[CONV11:%.*]] = zext i32 [[TMP12]] to i64
1826 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1827 // CHECK11-NEXT: [[CONV12:%.*]] = zext i32 [[TMP13]] to i64
1828 // CHECK11-NEXT: store i64 [[CONV11]], i64* [[DOTOMP_LB]], align 8
1829 // CHECK11-NEXT: store i64 [[CONV12]], i64* [[DOTOMP_UB]], align 8
1830 // CHECK11-NEXT: store i64 1, i64* [[DOTOMP_STRIDE]], align 8
1831 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1832 // CHECK11-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1833 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
1834 // CHECK11-NEXT: call void @__kmpc_for_static_init_8(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP15]], i32 34, i32* [[DOTOMP_IS_LAST]], i64* [[DOTOMP_LB]], i64* [[DOTOMP_UB]], i64* [[DOTOMP_STRIDE]], i64 1, i64 1)
1835 // CHECK11-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
1836 // CHECK11-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
1837 // CHECK11-NEXT: [[CMP15:%.*]] = icmp sgt i64 [[TMP16]], [[TMP17]]
1838 // CHECK11-NEXT: br i1 [[CMP15]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1839 // CHECK11: cond.true:
1840 // CHECK11-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_5]], align 8
1841 // CHECK11-NEXT: br label [[COND_END:%.*]]
1842 // CHECK11: cond.false:
1843 // CHECK11-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8
1844 // CHECK11-NEXT: br label [[COND_END]]
1845 // CHECK11: cond.end:
1846 // CHECK11-NEXT: [[COND:%.*]] = phi i64 [ [[TMP18]], [[COND_TRUE]] ], [ [[TMP19]], [[COND_FALSE]] ]
1847 // CHECK11-NEXT: store i64 [[COND]], i64* [[DOTOMP_UB]], align 8
1848 // CHECK11-NEXT: [[TMP20:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8
1849 // CHECK11-NEXT: store i64 [[TMP20]], i64* [[DOTOMP_IV]], align 8
1850 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1851 // CHECK11: omp.inner.for.cond:
1852 // CHECK11-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !10
1853 // CHECK11-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8, !llvm.access.group !10
1854 // CHECK11-NEXT: [[CMP16:%.*]] = icmp sle i64 [[TMP21]], [[TMP22]]
1855 // CHECK11-NEXT: br i1 [[CMP16]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1856 // CHECK11: omp.inner.for.body:
1857 // CHECK11-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !10
1858 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4, !llvm.access.group !10
1859 // CHECK11-NEXT: [[SUB17:%.*]] = sub nsw i32 [[TMP24]], 0
1860 // CHECK11-NEXT: [[DIV18:%.*]] = sdiv i32 [[SUB17]], 1
1861 // CHECK11-NEXT: [[MUL19:%.*]] = mul nsw i32 1, [[DIV18]]
1862 // CHECK11-NEXT: [[CONV20:%.*]] = sext i32 [[MUL19]] to i64
1863 // CHECK11-NEXT: [[DIV21:%.*]] = sdiv i64 [[TMP23]], [[CONV20]]
1864 // CHECK11-NEXT: [[MUL22:%.*]] = mul nsw i64 [[DIV21]], 1
1865 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL22]]
1866 // CHECK11-NEXT: [[CONV23:%.*]] = trunc i64 [[ADD]] to i32
1867 // CHECK11-NEXT: store i32 [[CONV23]], i32* [[I13]], align 4, !llvm.access.group !10
1868 // CHECK11-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !10
1869 // CHECK11-NEXT: [[TMP26:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !10
1870 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4, !llvm.access.group !10
1871 // CHECK11-NEXT: [[SUB24:%.*]] = sub nsw i32 [[TMP27]], 0
1872 // CHECK11-NEXT: [[DIV25:%.*]] = sdiv i32 [[SUB24]], 1
1873 // CHECK11-NEXT: [[MUL26:%.*]] = mul nsw i32 1, [[DIV25]]
1874 // CHECK11-NEXT: [[CONV27:%.*]] = sext i32 [[MUL26]] to i64
1875 // CHECK11-NEXT: [[DIV28:%.*]] = sdiv i64 [[TMP26]], [[CONV27]]
1876 // CHECK11-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4, !llvm.access.group !10
1877 // CHECK11-NEXT: [[SUB29:%.*]] = sub nsw i32 [[TMP28]], 0
1878 // CHECK11-NEXT: [[DIV30:%.*]] = sdiv i32 [[SUB29]], 1
1879 // CHECK11-NEXT: [[MUL31:%.*]] = mul nsw i32 1, [[DIV30]]
1880 // CHECK11-NEXT: [[CONV32:%.*]] = sext i32 [[MUL31]] to i64
1881 // CHECK11-NEXT: [[MUL33:%.*]] = mul nsw i64 [[DIV28]], [[CONV32]]
1882 // CHECK11-NEXT: [[SUB34:%.*]] = sub nsw i64 [[TMP25]], [[MUL33]]
1883 // CHECK11-NEXT: [[MUL35:%.*]] = mul nsw i64 [[SUB34]], 1
1884 // CHECK11-NEXT: [[ADD36:%.*]] = add nsw i64 0, [[MUL35]]
1885 // CHECK11-NEXT: [[CONV37:%.*]] = trunc i64 [[ADD36]] to i32
1886 // CHECK11-NEXT: store i32 [[CONV37]], i32* [[J14]], align 4, !llvm.access.group !10
1887 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, i32* [[I13]], align 4, !llvm.access.group !10
1888 // CHECK11-NEXT: [[TMP30:%.*]] = mul nsw i32 [[TMP29]], [[TMP3]]
1889 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP4]], i32 [[TMP30]]
1890 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, i32* [[J14]], align 4, !llvm.access.group !10
1891 // CHECK11-NEXT: [[ARRAYIDX38:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i32 [[TMP31]]
1892 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX38]], align 4, !llvm.access.group !10
1893 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1894 // CHECK11: omp.body.continue:
1895 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1896 // CHECK11: omp.inner.for.inc:
1897 // CHECK11-NEXT: [[TMP32:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !10
1898 // CHECK11-NEXT: [[ADD39:%.*]] = add nsw i64 [[TMP32]], 1
1899 // CHECK11-NEXT: store i64 [[ADD39]], i64* [[DOTOMP_IV]], align 8, !llvm.access.group !10
1900 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
1901 // CHECK11: omp.inner.for.end:
1902 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1903 // CHECK11: omp.loop.exit:
1904 // CHECK11-NEXT: [[TMP33:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1905 // CHECK11-NEXT: [[TMP34:%.*]] = load i32, i32* [[TMP33]], align 4
1906 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP34]])
1907 // CHECK11-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
1908 // CHECK11-NEXT: [[TMP36:%.*]] = icmp ne i32 [[TMP35]], 0
1909 // CHECK11-NEXT: br i1 [[TMP36]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1910 // CHECK11: .omp.final.then:
1911 // CHECK11-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
1912 // CHECK11-NEXT: [[SUB40:%.*]] = sub nsw i32 [[TMP37]], 0
1913 // CHECK11-NEXT: [[DIV41:%.*]] = sdiv i32 [[SUB40]], 1
1914 // CHECK11-NEXT: [[MUL42:%.*]] = mul nsw i32 [[DIV41]], 1
1915 // CHECK11-NEXT: [[ADD43:%.*]] = add nsw i32 0, [[MUL42]]
1916 // CHECK11-NEXT: store i32 [[ADD43]], i32* [[I13]], align 4
1917 // CHECK11-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_4]], align 4
1918 // CHECK11-NEXT: [[SUB44:%.*]] = sub nsw i32 [[TMP38]], 0
1919 // CHECK11-NEXT: [[DIV45:%.*]] = sdiv i32 [[SUB44]], 1
1920 // CHECK11-NEXT: [[MUL46:%.*]] = mul nsw i32 [[DIV45]], 1
1921 // CHECK11-NEXT: [[ADD47:%.*]] = add nsw i32 0, [[MUL46]]
1922 // CHECK11-NEXT: store i32 [[ADD47]], i32* [[J14]], align 4
1923 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
1924 // CHECK11: .omp.final.done:
1925 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
1926 // CHECK11: omp.precond.end:
1927 // CHECK11-NEXT: ret void
1928 //
1929 //
1930 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_
1931 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {
1932 // CHECK11-NEXT: entry:
1933 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
1934 // CHECK11-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4
1935 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
1936 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
1937 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
1938 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
1939 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1940 // CHECK11-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
1941 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1942 // CHECK11-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x [2 x i32]]**
1943 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP1]], align 4
1944 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1945 // CHECK11-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x [2 x i32]]**
1946 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[TMP3]], align 4
1947 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1948 // CHECK11-NEXT: store i8* null, i8** [[TMP4]], align 4
1949 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1950 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1951 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1952 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
1953 // CHECK11-NEXT: store i32 1, i32* [[TMP7]], align 4
1954 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
1955 // CHECK11-NEXT: store i32 1, i32* [[TMP8]], align 4
1956 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1957 // CHECK11-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 4
1958 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1959 // CHECK11-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 4
1960 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1961 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64** [[TMP11]], align 4
1962 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1963 // CHECK11-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP12]], align 4
1964 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1965 // CHECK11-NEXT: store i8** null, i8*** [[TMP13]], align 4
1966 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1967 // CHECK11-NEXT: store i8** null, i8*** [[TMP14]], align 4
1968 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1969 // CHECK11-NEXT: store i64 20, i64* [[TMP15]], align 8
1970 // CHECK11-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l72.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1971 // CHECK11-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
1972 // CHECK11-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1973 // CHECK11: omp_offload.failed:
1974 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l72([10 x [2 x i32]]* [[A]]) #[[ATTR3]]
1975 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
1976 // CHECK11: omp_offload.cont:
1977 // CHECK11-NEXT: ret i32 0
1978 //
1979 //
1980 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l72
1981 // CHECK11-SAME: ([10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
1982 // CHECK11-NEXT: entry:
1983 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4
1984 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4
1985 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4
1986 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x [2 x i32]]*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), [10 x [2 x i32]]* [[TMP0]])
1987 // CHECK11-NEXT: ret void
1988 //
1989 //
1990 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..2
1991 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
1992 // CHECK11-NEXT: entry:
1993 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1994 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1995 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4
1996 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1997 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
1998 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1999 // CHECK11-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2000 // CHECK11-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2001 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2002 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2003 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
2004 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4
2005 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2006 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2007 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4
2008 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4
2009 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2010 // CHECK11-NEXT: store i32 19, i32* [[DOTOMP_COMB_UB]], align 4
2011 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2012 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2013 // CHECK11-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2014 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2015 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2016 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2017 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19
2018 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2019 // CHECK11: cond.true:
2020 // CHECK11-NEXT: br label [[COND_END:%.*]]
2021 // CHECK11: cond.false:
2022 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2023 // CHECK11-NEXT: br label [[COND_END]]
2024 // CHECK11: cond.end:
2025 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2026 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2027 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2028 // CHECK11-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2029 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2030 // CHECK11: omp.inner.for.cond:
2031 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
2032 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !15
2033 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2034 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2035 // CHECK11: omp.inner.for.body:
2036 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group !15
2037 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group !15
2038 // CHECK11-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x [2 x i32]]*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x [2 x i32]]* [[TMP0]]), !llvm.access.group !15
2039 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2040 // CHECK11: omp.inner.for.inc:
2041 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
2042 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group !15
2043 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
2044 // CHECK11-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
2045 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
2046 // CHECK11: omp.inner.for.end:
2047 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2048 // CHECK11: omp.loop.exit:
2049 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2050 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2051 // CHECK11-NEXT: [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
2052 // CHECK11-NEXT: br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2053 // CHECK11: .omp.final.then:
2054 // CHECK11-NEXT: store i32 10, i32* [[I]], align 4
2055 // CHECK11-NEXT: store i32 2, i32* [[J]], align 4
2056 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
2057 // CHECK11: .omp.final.done:
2058 // CHECK11-NEXT: ret void
2059 //
2060 //
2061 // CHECK11-LABEL: define {{[^@]+}}@.omp_outlined..3
2062 // CHECK11-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x [2 x i32]]* noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
2063 // CHECK11-NEXT: entry:
2064 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2065 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2066 // CHECK11-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2067 // CHECK11-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2068 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca [10 x [2 x i32]]*, align 4
2069 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2070 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2071 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2072 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2073 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2074 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2075 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2076 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
2077 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4
2078 // CHECK11-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2079 // CHECK11-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2080 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2081 // CHECK11-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2082 // CHECK11-NEXT: store [10 x [2 x i32]]* [[A]], [10 x [2 x i32]]** [[A_ADDR]], align 4
2083 // CHECK11-NEXT: [[TMP0:%.*]] = load [10 x [2 x i32]]*, [10 x [2 x i32]]** [[A_ADDR]], align 4
2084 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2085 // CHECK11-NEXT: store i32 19, i32* [[DOTOMP_UB]], align 4
2086 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2087 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2088 // CHECK11-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
2089 // CHECK11-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
2090 // CHECK11-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2091 // CHECK11-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2092 // CHECK11-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2093 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2094 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2095 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2096 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 19
2097 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2098 // CHECK11: cond.true:
2099 // CHECK11-NEXT: br label [[COND_END:%.*]]
2100 // CHECK11: cond.false:
2101 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2102 // CHECK11-NEXT: br label [[COND_END]]
2103 // CHECK11: cond.end:
2104 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
2105 // CHECK11-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2106 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2107 // CHECK11-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
2108 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2109 // CHECK11: omp.inner.for.cond:
2110 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
2111 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18
2112 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2113 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2114 // CHECK11: omp.inner.for.body:
2115 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
2116 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 2
2117 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
2118 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2119 // CHECK11-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !18
2120 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
2121 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
2122 // CHECK11-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP12]], 2
2123 // CHECK11-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 2
2124 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP11]], [[MUL4]]
2125 // CHECK11-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1
2126 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]
2127 // CHECK11-NEXT: store i32 [[ADD6]], i32* [[J]], align 4, !llvm.access.group !18
2128 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !18
2129 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[TMP0]], i32 0, i32 [[TMP13]]
2130 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[J]], align 4, !llvm.access.group !18
2131 // CHECK11-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP14]]
2132 // CHECK11-NEXT: store i32 0, i32* [[ARRAYIDX7]], align 4, !llvm.access.group !18
2133 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2134 // CHECK11: omp.body.continue:
2135 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2136 // CHECK11: omp.inner.for.inc:
2137 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
2138 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1
2139 // CHECK11-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
2140 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
2141 // CHECK11: omp.inner.for.end:
2142 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2143 // CHECK11: omp.loop.exit:
2144 // CHECK11-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
2145 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4
2146 // CHECK11-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
2147 // CHECK11-NEXT: br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2148 // CHECK11: .omp.final.then:
2149 // CHECK11-NEXT: store i32 10, i32* [[I]], align 4
2150 // CHECK11-NEXT: store i32 2, i32* [[J]], align 4
2151 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
2152 // CHECK11: .omp.final.done:
2153 // CHECK11-NEXT: ret void
2154 //
2155 //
2156 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2157 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] {
2158 // CHECK11-NEXT: entry:
2159 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1)
2160 // CHECK11-NEXT: ret void
2161 //
2162 //
2163 // CHECK13-LABEL: define {{[^@]+}}@main
2164 // CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
2165 // CHECK13-NEXT: entry:
2166 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2167 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
2168 // CHECK13-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
2169 // CHECK13-NEXT: [[N:%.*]] = alloca i32, align 4
2170 // CHECK13-NEXT: [[M:%.*]] = alloca i32, align 4
2171 // CHECK13-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
2172 // CHECK13-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
2173 // CHECK13-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8
2174 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
2175 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2176 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2177 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
2178 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
2179 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
2180 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
2181 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
2182 // CHECK13-NEXT: [[J:%.*]] = alloca i32, align 4
2183 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
2184 // CHECK13-NEXT: [[I9:%.*]] = alloca i32, align 4
2185 // CHECK13-NEXT: [[J10:%.*]] = alloca i32, align 4
2186 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4
2187 // CHECK13-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
2188 // CHECK13-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
2189 // CHECK13-NEXT: store i32 100, i32* [[N]], align 4
2190 // CHECK13-NEXT: store i32 2, i32* [[M]], align 4
2191 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
2192 // CHECK13-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
2193 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[M]], align 4
2194 // CHECK13-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64
2195 // CHECK13-NEXT: [[TMP4:%.*]] = call i8* @llvm.stacksave()
2196 // CHECK13-NEXT: store i8* [[TMP4]], i8** [[SAVED_STACK]], align 8
2197 // CHECK13-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]]
2198 // CHECK13-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP5]], align 4
2199 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
2200 // CHECK13-NEXT: store i64 [[TMP3]], i64* [[__VLA_EXPR1]], align 8
2201 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[N]], align 4
2202 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_]], align 4
2203 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[M]], align 4
2204 // CHECK13-NEXT: store i32 [[TMP7]], i32* [[DOTCAPTURE_EXPR_2]], align 4
2205 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2206 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP8]], 0
2207 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2208 // CHECK13-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
2209 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2210 // CHECK13-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP9]], 0
2211 // CHECK13-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
2212 // CHECK13-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
2213 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
2214 // CHECK13-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
2215 // CHECK13-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8
2216 // CHECK13-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8
2217 // CHECK13-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
2218 // CHECK13-NEXT: store i64 [[TMP10]], i64* [[DOTOMP_UB]], align 8
2219 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
2220 // CHECK13-NEXT: store i32 0, i32* [[J]], align 4
2221 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2222 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP11]]
2223 // CHECK13-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[SIMD_IF_END:%.*]]
2224 // CHECK13: land.lhs.true:
2225 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2226 // CHECK13-NEXT: [[CMP8:%.*]] = icmp slt i32 0, [[TMP12]]
2227 // CHECK13-NEXT: br i1 [[CMP8]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END]]
2228 // CHECK13: simd.if.then:
2229 // CHECK13-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8
2230 // CHECK13-NEXT: store i64 [[TMP13]], i64* [[DOTOMP_IV]], align 8
2231 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2232 // CHECK13: omp.inner.for.cond:
2233 // CHECK13-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !2
2234 // CHECK13-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8, !llvm.access.group !2
2235 // CHECK13-NEXT: [[CMP11:%.*]] = icmp sle i64 [[TMP14]], [[TMP15]]
2236 // CHECK13-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2237 // CHECK13: omp.inner.for.body:
2238 // CHECK13-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !2
2239 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !2
2240 // CHECK13-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP17]], 0
2241 // CHECK13-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
2242 // CHECK13-NEXT: [[MUL14:%.*]] = mul nsw i32 1, [[DIV13]]
2243 // CHECK13-NEXT: [[CONV15:%.*]] = sext i32 [[MUL14]] to i64
2244 // CHECK13-NEXT: [[DIV16:%.*]] = sdiv i64 [[TMP16]], [[CONV15]]
2245 // CHECK13-NEXT: [[MUL17:%.*]] = mul nsw i64 [[DIV16]], 1
2246 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL17]]
2247 // CHECK13-NEXT: [[CONV18:%.*]] = trunc i64 [[ADD]] to i32
2248 // CHECK13-NEXT: store i32 [[CONV18]], i32* [[I9]], align 4, !llvm.access.group !2
2249 // CHECK13-NEXT: [[TMP18:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !2
2250 // CHECK13-NEXT: [[TMP19:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !2
2251 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !2
2252 // CHECK13-NEXT: [[SUB19:%.*]] = sub nsw i32 [[TMP20]], 0
2253 // CHECK13-NEXT: [[DIV20:%.*]] = sdiv i32 [[SUB19]], 1
2254 // CHECK13-NEXT: [[MUL21:%.*]] = mul nsw i32 1, [[DIV20]]
2255 // CHECK13-NEXT: [[CONV22:%.*]] = sext i32 [[MUL21]] to i64
2256 // CHECK13-NEXT: [[DIV23:%.*]] = sdiv i64 [[TMP19]], [[CONV22]]
2257 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !2
2258 // CHECK13-NEXT: [[SUB24:%.*]] = sub nsw i32 [[TMP21]], 0
2259 // CHECK13-NEXT: [[DIV25:%.*]] = sdiv i32 [[SUB24]], 1
2260 // CHECK13-NEXT: [[MUL26:%.*]] = mul nsw i32 1, [[DIV25]]
2261 // CHECK13-NEXT: [[CONV27:%.*]] = sext i32 [[MUL26]] to i64
2262 // CHECK13-NEXT: [[MUL28:%.*]] = mul nsw i64 [[DIV23]], [[CONV27]]
2263 // CHECK13-NEXT: [[SUB29:%.*]] = sub nsw i64 [[TMP18]], [[MUL28]]
2264 // CHECK13-NEXT: [[MUL30:%.*]] = mul nsw i64 [[SUB29]], 1
2265 // CHECK13-NEXT: [[ADD31:%.*]] = add nsw i64 0, [[MUL30]]
2266 // CHECK13-NEXT: [[CONV32:%.*]] = trunc i64 [[ADD31]] to i32
2267 // CHECK13-NEXT: store i32 [[CONV32]], i32* [[J10]], align 4, !llvm.access.group !2
2268 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[I9]], align 4, !llvm.access.group !2
2269 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP22]] to i64
2270 // CHECK13-NEXT: [[TMP23:%.*]] = mul nsw i64 [[IDXPROM]], [[TMP3]]
2271 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[TMP23]]
2272 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[J10]], align 4, !llvm.access.group !2
2273 // CHECK13-NEXT: [[IDXPROM33:%.*]] = sext i32 [[TMP24]] to i64
2274 // CHECK13-NEXT: [[ARRAYIDX34:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i64 [[IDXPROM33]]
2275 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX34]], align 4, !llvm.access.group !2
2276 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2277 // CHECK13: omp.body.continue:
2278 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2279 // CHECK13: omp.inner.for.inc:
2280 // CHECK13-NEXT: [[TMP25:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !2
2281 // CHECK13-NEXT: [[ADD35:%.*]] = add nsw i64 [[TMP25]], 1
2282 // CHECK13-NEXT: store i64 [[ADD35]], i64* [[DOTOMP_IV]], align 8, !llvm.access.group !2
2283 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
2284 // CHECK13: omp.inner.for.end:
2285 // CHECK13-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2286 // CHECK13-NEXT: [[SUB36:%.*]] = sub nsw i32 [[TMP26]], 0
2287 // CHECK13-NEXT: [[DIV37:%.*]] = sdiv i32 [[SUB36]], 1
2288 // CHECK13-NEXT: [[MUL38:%.*]] = mul nsw i32 [[DIV37]], 1
2289 // CHECK13-NEXT: [[ADD39:%.*]] = add nsw i32 0, [[MUL38]]
2290 // CHECK13-NEXT: store i32 [[ADD39]], i32* [[I9]], align 4
2291 // CHECK13-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2292 // CHECK13-NEXT: [[SUB40:%.*]] = sub nsw i32 [[TMP27]], 0
2293 // CHECK13-NEXT: [[DIV41:%.*]] = sdiv i32 [[SUB40]], 1
2294 // CHECK13-NEXT: [[MUL42:%.*]] = mul nsw i32 [[DIV41]], 1
2295 // CHECK13-NEXT: [[ADD43:%.*]] = add nsw i32 0, [[MUL42]]
2296 // CHECK13-NEXT: store i32 [[ADD43]], i32* [[J10]], align 4
2297 // CHECK13-NEXT: br label [[SIMD_IF_END]]
2298 // CHECK13: simd.if.end:
2299 // CHECK13-NEXT: [[TMP28:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
2300 // CHECK13-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef signext [[TMP28]])
2301 // CHECK13-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
2302 // CHECK13-NEXT: [[TMP29:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
2303 // CHECK13-NEXT: call void @llvm.stackrestore(i8* [[TMP29]])
2304 // CHECK13-NEXT: [[TMP30:%.*]] = load i32, i32* [[RETVAL]], align 4
2305 // CHECK13-NEXT: ret i32 [[TMP30]]
2306 //
2307 //
2308 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_
2309 // CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {
2310 // CHECK13-NEXT: entry:
2311 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
2312 // CHECK13-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4
2313 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
2314 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2315 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2316 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2317 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2318 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
2319 // CHECK13-NEXT: [[J:%.*]] = alloca i32, align 4
2320 // CHECK13-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
2321 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2322 // CHECK13-NEXT: store i32 19, i32* [[DOTOMP_UB]], align 4
2323 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2324 // CHECK13-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
2325 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2326 // CHECK13: omp.inner.for.cond:
2327 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
2328 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !6
2329 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
2330 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2331 // CHECK13: omp.inner.for.body:
2332 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
2333 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP3]], 2
2334 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
2335 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2336 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !6
2337 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
2338 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
2339 // CHECK13-NEXT: [[DIV2:%.*]] = sdiv i32 [[TMP5]], 2
2340 // CHECK13-NEXT: [[MUL3:%.*]] = mul nsw i32 [[DIV2]], 2
2341 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], [[MUL3]]
2342 // CHECK13-NEXT: [[MUL4:%.*]] = mul nsw i32 [[SUB]], 1
2343 // CHECK13-NEXT: [[ADD5:%.*]] = add nsw i32 0, [[MUL4]]
2344 // CHECK13-NEXT: store i32 [[ADD5]], i32* [[J]], align 4, !llvm.access.group !6
2345 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !6
2346 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP6]] to i64
2347 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[A]], i64 0, i64 [[IDXPROM]]
2348 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[J]], align 4, !llvm.access.group !6
2349 // CHECK13-NEXT: [[IDXPROM6:%.*]] = sext i32 [[TMP7]] to i64
2350 // CHECK13-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM6]]
2351 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX7]], align 4, !llvm.access.group !6
2352 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2353 // CHECK13: omp.body.continue:
2354 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2355 // CHECK13: omp.inner.for.inc:
2356 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
2357 // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP8]], 1
2358 // CHECK13-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !6
2359 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
2360 // CHECK13: omp.inner.for.end:
2361 // CHECK13-NEXT: store i32 10, i32* [[I]], align 4
2362 // CHECK13-NEXT: store i32 2, i32* [[J]], align 4
2363 // CHECK13-NEXT: ret i32 0
2364 //
2365 //
2366 // CHECK15-LABEL: define {{[^@]+}}@main
2367 // CHECK15-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
2368 // CHECK15-NEXT: entry:
2369 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2370 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
2371 // CHECK15-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
2372 // CHECK15-NEXT: [[N:%.*]] = alloca i32, align 4
2373 // CHECK15-NEXT: [[M:%.*]] = alloca i32, align 4
2374 // CHECK15-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
2375 // CHECK15-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
2376 // CHECK15-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4
2377 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
2378 // CHECK15-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2379 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2380 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
2381 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
2382 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
2383 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
2384 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
2385 // CHECK15-NEXT: [[J:%.*]] = alloca i32, align 4
2386 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
2387 // CHECK15-NEXT: [[I9:%.*]] = alloca i32, align 4
2388 // CHECK15-NEXT: [[J10:%.*]] = alloca i32, align 4
2389 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4
2390 // CHECK15-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
2391 // CHECK15-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
2392 // CHECK15-NEXT: store i32 100, i32* [[N]], align 4
2393 // CHECK15-NEXT: store i32 2, i32* [[M]], align 4
2394 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
2395 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[M]], align 4
2396 // CHECK15-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
2397 // CHECK15-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 4
2398 // CHECK15-NEXT: [[TMP3:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]]
2399 // CHECK15-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP3]], align 4
2400 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
2401 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[__VLA_EXPR1]], align 4
2402 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[N]], align 4
2403 // CHECK15-NEXT: store i32 [[TMP4]], i32* [[DOTCAPTURE_EXPR_]], align 4
2404 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[M]], align 4
2405 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTCAPTURE_EXPR_2]], align 4
2406 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2407 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], 0
2408 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2409 // CHECK15-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
2410 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2411 // CHECK15-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP7]], 0
2412 // CHECK15-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
2413 // CHECK15-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
2414 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
2415 // CHECK15-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
2416 // CHECK15-NEXT: store i64 [[SUB7]], i64* [[DOTCAPTURE_EXPR_3]], align 8
2417 // CHECK15-NEXT: store i64 0, i64* [[DOTOMP_LB]], align 8
2418 // CHECK15-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR_3]], align 8
2419 // CHECK15-NEXT: store i64 [[TMP8]], i64* [[DOTOMP_UB]], align 8
2420 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
2421 // CHECK15-NEXT: store i32 0, i32* [[J]], align 4
2422 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2423 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP9]]
2424 // CHECK15-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[SIMD_IF_END:%.*]]
2425 // CHECK15: land.lhs.true:
2426 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2427 // CHECK15-NEXT: [[CMP8:%.*]] = icmp slt i32 0, [[TMP10]]
2428 // CHECK15-NEXT: br i1 [[CMP8]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END]]
2429 // CHECK15: simd.if.then:
2430 // CHECK15-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTOMP_LB]], align 8
2431 // CHECK15-NEXT: store i64 [[TMP11]], i64* [[DOTOMP_IV]], align 8
2432 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2433 // CHECK15: omp.inner.for.cond:
2434 // CHECK15-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !3
2435 // CHECK15-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTOMP_UB]], align 8, !llvm.access.group !3
2436 // CHECK15-NEXT: [[CMP11:%.*]] = icmp sle i64 [[TMP12]], [[TMP13]]
2437 // CHECK15-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2438 // CHECK15: omp.inner.for.body:
2439 // CHECK15-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !3
2440 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !3
2441 // CHECK15-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP15]], 0
2442 // CHECK15-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
2443 // CHECK15-NEXT: [[MUL14:%.*]] = mul nsw i32 1, [[DIV13]]
2444 // CHECK15-NEXT: [[CONV15:%.*]] = sext i32 [[MUL14]] to i64
2445 // CHECK15-NEXT: [[DIV16:%.*]] = sdiv i64 [[TMP14]], [[CONV15]]
2446 // CHECK15-NEXT: [[MUL17:%.*]] = mul nsw i64 [[DIV16]], 1
2447 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL17]]
2448 // CHECK15-NEXT: [[CONV18:%.*]] = trunc i64 [[ADD]] to i32
2449 // CHECK15-NEXT: store i32 [[CONV18]], i32* [[I9]], align 4, !llvm.access.group !3
2450 // CHECK15-NEXT: [[TMP16:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !3
2451 // CHECK15-NEXT: [[TMP17:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !3
2452 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !3
2453 // CHECK15-NEXT: [[SUB19:%.*]] = sub nsw i32 [[TMP18]], 0
2454 // CHECK15-NEXT: [[DIV20:%.*]] = sdiv i32 [[SUB19]], 1
2455 // CHECK15-NEXT: [[MUL21:%.*]] = mul nsw i32 1, [[DIV20]]
2456 // CHECK15-NEXT: [[CONV22:%.*]] = sext i32 [[MUL21]] to i64
2457 // CHECK15-NEXT: [[DIV23:%.*]] = sdiv i64 [[TMP17]], [[CONV22]]
2458 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group !3
2459 // CHECK15-NEXT: [[SUB24:%.*]] = sub nsw i32 [[TMP19]], 0
2460 // CHECK15-NEXT: [[DIV25:%.*]] = sdiv i32 [[SUB24]], 1
2461 // CHECK15-NEXT: [[MUL26:%.*]] = mul nsw i32 1, [[DIV25]]
2462 // CHECK15-NEXT: [[CONV27:%.*]] = sext i32 [[MUL26]] to i64
2463 // CHECK15-NEXT: [[MUL28:%.*]] = mul nsw i64 [[DIV23]], [[CONV27]]
2464 // CHECK15-NEXT: [[SUB29:%.*]] = sub nsw i64 [[TMP16]], [[MUL28]]
2465 // CHECK15-NEXT: [[MUL30:%.*]] = mul nsw i64 [[SUB29]], 1
2466 // CHECK15-NEXT: [[ADD31:%.*]] = add nsw i64 0, [[MUL30]]
2467 // CHECK15-NEXT: [[CONV32:%.*]] = trunc i64 [[ADD31]] to i32
2468 // CHECK15-NEXT: store i32 [[CONV32]], i32* [[J10]], align 4, !llvm.access.group !3
2469 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[I9]], align 4, !llvm.access.group !3
2470 // CHECK15-NEXT: [[TMP21:%.*]] = mul nsw i32 [[TMP20]], [[TMP1]]
2471 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP21]]
2472 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[J10]], align 4, !llvm.access.group !3
2473 // CHECK15-NEXT: [[ARRAYIDX33:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i32 [[TMP22]]
2474 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX33]], align 4, !llvm.access.group !3
2475 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2476 // CHECK15: omp.body.continue:
2477 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2478 // CHECK15: omp.inner.for.inc:
2479 // CHECK15-NEXT: [[TMP23:%.*]] = load i64, i64* [[DOTOMP_IV]], align 8, !llvm.access.group !3
2480 // CHECK15-NEXT: [[ADD34:%.*]] = add nsw i64 [[TMP23]], 1
2481 // CHECK15-NEXT: store i64 [[ADD34]], i64* [[DOTOMP_IV]], align 8, !llvm.access.group !3
2482 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
2483 // CHECK15: omp.inner.for.end:
2484 // CHECK15-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
2485 // CHECK15-NEXT: [[SUB35:%.*]] = sub nsw i32 [[TMP24]], 0
2486 // CHECK15-NEXT: [[DIV36:%.*]] = sdiv i32 [[SUB35]], 1
2487 // CHECK15-NEXT: [[MUL37:%.*]] = mul nsw i32 [[DIV36]], 1
2488 // CHECK15-NEXT: [[ADD38:%.*]] = add nsw i32 0, [[MUL37]]
2489 // CHECK15-NEXT: store i32 [[ADD38]], i32* [[I9]], align 4
2490 // CHECK15-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
2491 // CHECK15-NEXT: [[SUB39:%.*]] = sub nsw i32 [[TMP25]], 0
2492 // CHECK15-NEXT: [[DIV40:%.*]] = sdiv i32 [[SUB39]], 1
2493 // CHECK15-NEXT: [[MUL41:%.*]] = mul nsw i32 [[DIV40]], 1
2494 // CHECK15-NEXT: [[ADD42:%.*]] = add nsw i32 0, [[MUL41]]
2495 // CHECK15-NEXT: store i32 [[ADD42]], i32* [[J10]], align 4
2496 // CHECK15-NEXT: br label [[SIMD_IF_END]]
2497 // CHECK15: simd.if.end:
2498 // CHECK15-NEXT: [[TMP26:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
2499 // CHECK15-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef [[TMP26]])
2500 // CHECK15-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
2501 // CHECK15-NEXT: [[TMP27:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
2502 // CHECK15-NEXT: call void @llvm.stackrestore(i8* [[TMP27]])
2503 // CHECK15-NEXT: [[TMP28:%.*]] = load i32, i32* [[RETVAL]], align 4
2504 // CHECK15-NEXT: ret i32 [[TMP28]]
2505 //
2506 //
2507 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_
2508 // CHECK15-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {
2509 // CHECK15-NEXT: entry:
2510 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
2511 // CHECK15-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4
2512 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
2513 // CHECK15-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
2514 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2515 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2516 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2517 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
2518 // CHECK15-NEXT: [[J:%.*]] = alloca i32, align 4
2519 // CHECK15-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
2520 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2521 // CHECK15-NEXT: store i32 19, i32* [[DOTOMP_UB]], align 4
2522 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2523 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[DOTOMP_IV]], align 4
2524 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2525 // CHECK15: omp.inner.for.cond:
2526 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
2527 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !7
2528 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
2529 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2530 // CHECK15: omp.inner.for.body:
2531 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
2532 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP3]], 2
2533 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
2534 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2535 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !7
2536 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
2537 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
2538 // CHECK15-NEXT: [[DIV2:%.*]] = sdiv i32 [[TMP5]], 2
2539 // CHECK15-NEXT: [[MUL3:%.*]] = mul nsw i32 [[DIV2]], 2
2540 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], [[MUL3]]
2541 // CHECK15-NEXT: [[MUL4:%.*]] = mul nsw i32 [[SUB]], 1
2542 // CHECK15-NEXT: [[ADD5:%.*]] = add nsw i32 0, [[MUL4]]
2543 // CHECK15-NEXT: store i32 [[ADD5]], i32* [[J]], align 4, !llvm.access.group !7
2544 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !7
2545 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], [10 x [2 x i32]]* [[A]], i32 0, i32 [[TMP6]]
2546 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[J]], align 4, !llvm.access.group !7
2547 // CHECK15-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP7]]
2548 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX6]], align 4, !llvm.access.group !7
2549 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2550 // CHECK15: omp.body.continue:
2551 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2552 // CHECK15: omp.inner.for.inc:
2553 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
2554 // CHECK15-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP8]], 1
2555 // CHECK15-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !7
2556 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
2557 // CHECK15: omp.inner.for.end:
2558 // CHECK15-NEXT: store i32 10, i32* [[I]], align 4
2559 // CHECK15-NEXT: store i32 2, i32* [[J]], align 4
2560 // CHECK15-NEXT: ret i32 0
2561 //
2562