1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // expected-no-diagnostics 3 #ifndef HEADER 4 #define HEADER 5 6 // Test host codegen. 7 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 8 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 9 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2 10 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 11 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 12 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4 13 14 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5 15 // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 16 // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK6 17 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7 18 // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 19 // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK8 20 21 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 22 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 23 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 24 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 25 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 26 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 27 #ifdef CK1 28 29 template <typename T, int X, long long Y> 30 struct SS{ 31 T a[X]; 32 float b; 33 int foo(void) { 34 35 #pragma omp target 36 #pragma omp teams distribute parallel for 37 for(int i = 0; i < X; i++) { 38 a[i] = (T)0; 39 } 40 #pragma omp target 41 #pragma omp teams distribute parallel for schedule(static) 42 for(int i = 0; i < X; i++) { 43 a[i] = (T)0; 44 } 45 #pragma omp target 46 #pragma omp teams distribute parallel for schedule(static, X/2) 47 for(int i = 0; i < X; i++) { 48 a[i] = (T)0; 49 } 50 51 #pragma omp target 52 #pragma omp teams distribute parallel for schedule(dynamic) 53 for(int i = 0; i < X; i++) { 54 a[i] = (T)0; 55 } 56 57 #pragma omp target 58 #pragma omp teams distribute parallel for schedule(dynamic, X/2) 59 for(int i = 0; i < X; i++) { 60 a[i] = (T)0; 61 } 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 return a[0]; 79 } 80 }; 81 82 int teams_template_struct(void) { 83 SS<int, 123, 456> V; 84 return V.foo(); 85 86 } 87 #endif // CK1 88 89 // Test host codegen. 90 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13 91 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 92 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK14 93 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15 94 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 95 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK16 96 97 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK17 98 // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 99 // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK18 100 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK19 101 // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 102 // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK20 103 104 // RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 105 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 106 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 107 // RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 108 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 109 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 110 #ifdef CK2 111 112 template <typename T, int n> 113 int tmain(T argc) { 114 T a[n]; 115 int m = 10; 116 #pragma omp target 117 #pragma omp teams distribute parallel for 118 for(int i = 0; i < n; i++) { 119 a[i] = (T)0; 120 } 121 #pragma omp target 122 #pragma omp teams distribute parallel for schedule(static) 123 for(int i = 0; i < n; i++) { 124 a[i] = (T)0; 125 } 126 #pragma omp target 127 #pragma omp teams distribute parallel for schedule(static, m) 128 for(int i = 0; i < n; i++) { 129 a[i] = (T)0; 130 } 131 #pragma omp target 132 #pragma omp teams distribute parallel for schedule(dynamic) 133 for(int i = 0; i < n; i++) { 134 a[i] = (T)0; 135 } 136 #pragma omp target 137 #pragma omp teams distribute parallel for schedule(dynamic, m) 138 for(int i = 0; i < n; i++) { 139 a[i] = (T)0; 140 } 141 return 0; 142 } 143 144 int main (int argc, char **argv) { 145 int n = 100; 146 int a[n]; 147 int m = 10; 148 #pragma omp target 149 #pragma omp teams distribute parallel for 150 for(int i = 0; i < n; i++) { 151 a[i] = 0; 152 } 153 #pragma omp target 154 #pragma omp teams distribute parallel for dist_schedule(static) 155 for(int i = 0; i < n; i++) { 156 a[i] = 0; 157 } 158 #pragma omp target 159 #pragma omp teams distribute parallel for dist_schedule(static, m) 160 for(int i = 0; i < n; i++) { 161 a[i] = 0; 162 } 163 #pragma omp target 164 #pragma omp teams distribute parallel for schedule(dynamic) 165 for(int i = 0; i < n; i++) { 166 a[i] = 0; 167 } 168 #pragma omp target 169 #pragma omp teams distribute parallel for schedule(dynamic, m) 170 for(int i = 0; i < n; i++) { 171 a[i] = 0; 172 } 173 return tmain<int, 10>(argc); 174 } 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 #endif // CK2 210 #endif // #ifndef HEADER 211 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv 212 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 213 // CHECK1-NEXT: entry: 214 // CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 215 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 216 // CHECK1-NEXT: ret i32 [[CALL]] 217 // 218 // 219 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 220 // CHECK1-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 221 // CHECK1-NEXT: entry: 222 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 223 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 224 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 225 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 226 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 227 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8 228 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8 229 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8 230 // CHECK1-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 231 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8 232 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8 233 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8 234 // CHECK1-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 235 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 8 236 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 8 237 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 8 238 // CHECK1-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 239 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 8 240 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 8 241 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 8 242 // CHECK1-NEXT: [[_TMP27:%.*]] = alloca i32, align 4 243 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 244 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 245 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 246 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 247 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 248 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 249 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 250 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 251 // CHECK1-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8 252 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 253 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8 254 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 255 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 256 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123) 257 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 258 // CHECK1-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 259 // CHECK1-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 260 // CHECK1: omp_offload.failed: 261 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 262 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 263 // CHECK1: omp_offload.cont: 264 // CHECK1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 265 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 266 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** 267 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8 268 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 269 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** 270 // CHECK1-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8 271 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0 272 // CHECK1-NEXT: store i8* null, i8** [[TMP13]], align 8 273 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 274 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 275 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 276 // CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 277 // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 278 // CHECK1-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 279 // CHECK1: omp_offload.failed7: 280 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]] 281 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT8]] 282 // CHECK1: omp_offload.cont8: 283 // CHECK1-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 284 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 285 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 286 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8 287 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 288 // CHECK1-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 289 // CHECK1-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8 290 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0 291 // CHECK1-NEXT: store i8* null, i8** [[TMP22]], align 8 292 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 293 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 294 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 295 // CHECK1-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 296 // CHECK1-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 297 // CHECK1-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 298 // CHECK1: omp_offload.failed14: 299 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(%struct.SS* [[THIS1]]) #[[ATTR2]] 300 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT15]] 301 // CHECK1: omp_offload.cont15: 302 // CHECK1-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 303 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 304 // CHECK1-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS** 305 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 8 306 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 307 // CHECK1-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]** 308 // CHECK1-NEXT: store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 8 309 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i64 0, i64 0 310 // CHECK1-NEXT: store i8* null, i8** [[TMP31]], align 8 311 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 312 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 313 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 314 // CHECK1-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 315 // CHECK1-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 316 // CHECK1-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]] 317 // CHECK1: omp_offload.failed21: 318 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(%struct.SS* [[THIS1]]) #[[ATTR2]] 319 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT22]] 320 // CHECK1: omp_offload.cont22: 321 // CHECK1-NEXT: [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 322 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 323 // CHECK1-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS** 324 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 8 325 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 326 // CHECK1-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]** 327 // CHECK1-NEXT: store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 8 328 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 0 329 // CHECK1-NEXT: store i8* null, i8** [[TMP40]], align 8 330 // CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 331 // CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 332 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 333 // CHECK1-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 334 // CHECK1-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 335 // CHECK1-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]] 336 // CHECK1: omp_offload.failed28: 337 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(%struct.SS* [[THIS1]]) #[[ATTR2]] 338 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT29]] 339 // CHECK1: omp_offload.cont29: 340 // CHECK1-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 341 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 0 342 // CHECK1-NEXT: [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 343 // CHECK1-NEXT: ret i32 [[TMP45]] 344 // 345 // 346 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35 347 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 348 // CHECK1-NEXT: entry: 349 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 350 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 351 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 352 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 353 // CHECK1-NEXT: ret void 354 // 355 // 356 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 357 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 358 // CHECK1-NEXT: entry: 359 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 360 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 361 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 362 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 363 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 364 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 365 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 366 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 367 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 368 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 369 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 370 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 371 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 372 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 373 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 374 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 375 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 376 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 377 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 378 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 379 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 380 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 381 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 382 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 383 // CHECK1: cond.true: 384 // CHECK1-NEXT: br label [[COND_END:%.*]] 385 // CHECK1: cond.false: 386 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 387 // CHECK1-NEXT: br label [[COND_END]] 388 // CHECK1: cond.end: 389 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 390 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 391 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 392 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 393 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 394 // CHECK1: omp.inner.for.cond: 395 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 396 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 397 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 398 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 399 // CHECK1: omp.inner.for.body: 400 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 401 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 402 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 403 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 404 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 405 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 406 // CHECK1: omp.inner.for.inc: 407 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 408 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 409 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 410 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 411 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 412 // CHECK1: omp.inner.for.end: 413 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 414 // CHECK1: omp.loop.exit: 415 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 416 // CHECK1-NEXT: ret void 417 // 418 // 419 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 420 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 421 // CHECK1-NEXT: entry: 422 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 423 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 424 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 425 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 426 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 427 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 428 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 429 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 430 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 431 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 432 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 433 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 434 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 435 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 436 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 437 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 438 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 439 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 440 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 441 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 442 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 443 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 444 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 445 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 446 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 447 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 448 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 449 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 450 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 451 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 452 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 453 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 454 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 455 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 456 // CHECK1: cond.true: 457 // CHECK1-NEXT: br label [[COND_END:%.*]] 458 // CHECK1: cond.false: 459 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 460 // CHECK1-NEXT: br label [[COND_END]] 461 // CHECK1: cond.end: 462 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 463 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 464 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 465 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 466 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 467 // CHECK1: omp.inner.for.cond: 468 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 469 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 470 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 471 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 472 // CHECK1: omp.inner.for.body: 473 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 474 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 475 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 476 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 477 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 478 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 479 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 480 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 481 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 482 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 483 // CHECK1: omp.body.continue: 484 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 485 // CHECK1: omp.inner.for.inc: 486 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 487 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 488 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 489 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 490 // CHECK1: omp.inner.for.end: 491 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 492 // CHECK1: omp.loop.exit: 493 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 494 // CHECK1-NEXT: ret void 495 // 496 // 497 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40 498 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 499 // CHECK1-NEXT: entry: 500 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 501 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 502 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 503 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 504 // CHECK1-NEXT: ret void 505 // 506 // 507 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2 508 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 509 // CHECK1-NEXT: entry: 510 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 511 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 512 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 513 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 514 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 515 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 516 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 517 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 518 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 519 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 520 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 521 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 522 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 523 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 524 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 525 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 526 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 527 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 528 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 529 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 530 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 531 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 532 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 533 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 534 // CHECK1: cond.true: 535 // CHECK1-NEXT: br label [[COND_END:%.*]] 536 // CHECK1: cond.false: 537 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 538 // CHECK1-NEXT: br label [[COND_END]] 539 // CHECK1: cond.end: 540 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 541 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 542 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 543 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 544 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 545 // CHECK1: omp.inner.for.cond: 546 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 547 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 548 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 549 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 550 // CHECK1: omp.inner.for.body: 551 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 552 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 553 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 554 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 555 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 556 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 557 // CHECK1: omp.inner.for.inc: 558 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 559 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 560 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 561 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 562 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 563 // CHECK1: omp.inner.for.end: 564 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 565 // CHECK1: omp.loop.exit: 566 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 567 // CHECK1-NEXT: ret void 568 // 569 // 570 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 571 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 572 // CHECK1-NEXT: entry: 573 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 574 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 575 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 576 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 577 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 578 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 579 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 580 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 581 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 582 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 583 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 584 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 585 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 586 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 587 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 588 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 589 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 590 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 591 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 592 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 593 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 594 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 595 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 596 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 597 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 598 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 599 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 600 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 601 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 602 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 603 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 604 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 605 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 606 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 607 // CHECK1: cond.true: 608 // CHECK1-NEXT: br label [[COND_END:%.*]] 609 // CHECK1: cond.false: 610 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 611 // CHECK1-NEXT: br label [[COND_END]] 612 // CHECK1: cond.end: 613 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 614 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 615 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 616 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 617 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 618 // CHECK1: omp.inner.for.cond: 619 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 620 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 621 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 622 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 623 // CHECK1: omp.inner.for.body: 624 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 625 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 626 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 627 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 628 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 629 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 630 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 631 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 632 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 633 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 634 // CHECK1: omp.body.continue: 635 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 636 // CHECK1: omp.inner.for.inc: 637 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 638 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 639 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 640 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 641 // CHECK1: omp.inner.for.end: 642 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 643 // CHECK1: omp.loop.exit: 644 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 645 // CHECK1-NEXT: ret void 646 // 647 // 648 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45 649 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 650 // CHECK1-NEXT: entry: 651 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 652 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 653 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 654 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 655 // CHECK1-NEXT: ret void 656 // 657 // 658 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6 659 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 660 // CHECK1-NEXT: entry: 661 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 662 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 663 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 664 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 665 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 666 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 667 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 668 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 669 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 670 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 671 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 672 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 673 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 674 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 675 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 676 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 677 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 678 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 679 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 680 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 681 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 682 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 683 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 684 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 685 // CHECK1: cond.true: 686 // CHECK1-NEXT: br label [[COND_END:%.*]] 687 // CHECK1: cond.false: 688 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 689 // CHECK1-NEXT: br label [[COND_END]] 690 // CHECK1: cond.end: 691 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 692 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 693 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 694 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 695 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 696 // CHECK1: omp.inner.for.cond: 697 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 698 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 699 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 700 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 701 // CHECK1: omp.inner.for.body: 702 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 703 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 704 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 705 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 706 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 707 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 708 // CHECK1: omp.inner.for.inc: 709 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 710 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 711 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 712 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 713 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 714 // CHECK1: omp.inner.for.end: 715 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 716 // CHECK1: omp.loop.exit: 717 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 718 // CHECK1-NEXT: ret void 719 // 720 // 721 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7 722 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 723 // CHECK1-NEXT: entry: 724 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 725 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 726 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 727 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 728 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 729 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 730 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 731 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 732 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 733 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 734 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 735 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 736 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 737 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 738 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 739 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 740 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 741 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 742 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 743 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 744 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 745 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 746 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 747 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 748 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 749 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 750 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 751 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 752 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 753 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 754 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 755 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 756 // CHECK1: omp.dispatch.cond: 757 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 758 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 759 // CHECK1-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32 760 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]] 761 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 762 // CHECK1: cond.true: 763 // CHECK1-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 764 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 765 // CHECK1-NEXT: br label [[COND_END:%.*]] 766 // CHECK1: cond.false: 767 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 768 // CHECK1-NEXT: br label [[COND_END]] 769 // CHECK1: cond.end: 770 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 771 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 772 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 773 // CHECK1-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 774 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 775 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 776 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 777 // CHECK1-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 778 // CHECK1: omp.dispatch.body: 779 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 780 // CHECK1: omp.inner.for.cond: 781 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 782 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 783 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 784 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 785 // CHECK1: omp.inner.for.body: 786 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 787 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 788 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 789 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 790 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 791 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 792 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64 793 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 794 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 795 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 796 // CHECK1: omp.body.continue: 797 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 798 // CHECK1: omp.inner.for.inc: 799 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 800 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1 801 // CHECK1-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 802 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 803 // CHECK1: omp.inner.for.end: 804 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 805 // CHECK1: omp.dispatch.inc: 806 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 807 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 808 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 809 // CHECK1-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4 810 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 811 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 812 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 813 // CHECK1-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4 814 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] 815 // CHECK1: omp.dispatch.end: 816 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 817 // CHECK1-NEXT: ret void 818 // 819 // 820 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51 821 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 822 // CHECK1-NEXT: entry: 823 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 824 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 825 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 826 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 827 // CHECK1-NEXT: ret void 828 // 829 // 830 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10 831 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 832 // CHECK1-NEXT: entry: 833 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 834 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 835 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 836 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 837 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 838 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 839 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 840 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 841 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 842 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 843 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 844 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 845 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 846 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 847 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 848 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 849 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 850 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 851 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 852 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 853 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 854 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 855 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 856 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 857 // CHECK1: cond.true: 858 // CHECK1-NEXT: br label [[COND_END:%.*]] 859 // CHECK1: cond.false: 860 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 861 // CHECK1-NEXT: br label [[COND_END]] 862 // CHECK1: cond.end: 863 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 864 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 865 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 866 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 867 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 868 // CHECK1: omp.inner.for.cond: 869 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 870 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 871 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 872 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 873 // CHECK1: omp.inner.for.body: 874 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 875 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 876 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 877 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 878 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 879 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 880 // CHECK1: omp.inner.for.inc: 881 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 882 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 883 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 884 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 885 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 886 // CHECK1: omp.inner.for.end: 887 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 888 // CHECK1: omp.loop.exit: 889 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 890 // CHECK1-NEXT: ret void 891 // 892 // 893 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11 894 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 895 // CHECK1-NEXT: entry: 896 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 897 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 898 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 899 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 900 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 901 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 902 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 903 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 904 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 905 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 906 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 907 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 908 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 909 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 910 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 911 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 912 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 913 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 914 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 915 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 916 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 917 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 918 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 919 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 920 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 921 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 922 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 923 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 924 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 925 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 926 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 927 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 928 // CHECK1-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 929 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 930 // CHECK1: omp.dispatch.cond: 931 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 932 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 933 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 934 // CHECK1: omp.dispatch.body: 935 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 936 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 937 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 938 // CHECK1: omp.inner.for.cond: 939 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 940 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10 941 // CHECK1-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 942 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 943 // CHECK1: omp.inner.for.body: 944 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 945 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 946 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 947 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !10 948 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 949 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !10 950 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 951 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 952 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !10 953 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 954 // CHECK1: omp.body.continue: 955 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 956 // CHECK1: omp.inner.for.inc: 957 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 958 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 959 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 960 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]] 961 // CHECK1: omp.inner.for.end: 962 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 963 // CHECK1: omp.dispatch.inc: 964 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] 965 // CHECK1: omp.dispatch.end: 966 // CHECK1-NEXT: ret void 967 // 968 // 969 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57 970 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 971 // CHECK1-NEXT: entry: 972 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 973 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 974 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 975 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 976 // CHECK1-NEXT: ret void 977 // 978 // 979 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..14 980 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 981 // CHECK1-NEXT: entry: 982 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 983 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 984 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 985 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 986 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 987 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 988 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 989 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 990 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 991 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 992 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 993 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 994 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 995 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 996 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 997 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 998 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 999 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1000 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1001 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1002 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1003 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1004 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1005 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1006 // CHECK1: cond.true: 1007 // CHECK1-NEXT: br label [[COND_END:%.*]] 1008 // CHECK1: cond.false: 1009 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1010 // CHECK1-NEXT: br label [[COND_END]] 1011 // CHECK1: cond.end: 1012 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1013 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1014 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1015 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1016 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1017 // CHECK1: omp.inner.for.cond: 1018 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1019 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1020 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1021 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1022 // CHECK1: omp.inner.for.body: 1023 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1024 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 1025 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1026 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 1027 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 1028 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1029 // CHECK1: omp.inner.for.inc: 1030 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1031 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1032 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1033 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1034 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1035 // CHECK1: omp.inner.for.end: 1036 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1037 // CHECK1: omp.loop.exit: 1038 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1039 // CHECK1-NEXT: ret void 1040 // 1041 // 1042 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..15 1043 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1044 // CHECK1-NEXT: entry: 1045 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1046 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1047 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1048 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1049 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1050 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1051 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1052 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1053 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1054 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1055 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1056 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1057 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1058 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1059 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1060 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1061 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1062 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1063 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1064 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 1065 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1066 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 1067 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1068 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 1069 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1070 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1071 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1072 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1073 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1074 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1075 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1076 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 1077 // CHECK1-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61) 1078 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 1079 // CHECK1: omp.dispatch.cond: 1080 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 1081 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 1082 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 1083 // CHECK1: omp.dispatch.body: 1084 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1085 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 1086 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1087 // CHECK1: omp.inner.for.cond: 1088 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 1089 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13 1090 // CHECK1-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 1091 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1092 // CHECK1: omp.inner.for.body: 1093 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 1094 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 1095 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1096 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13 1097 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 1098 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13 1099 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 1100 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 1101 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13 1102 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1103 // CHECK1: omp.body.continue: 1104 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1105 // CHECK1: omp.inner.for.inc: 1106 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 1107 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 1108 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 1109 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 1110 // CHECK1: omp.inner.for.end: 1111 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 1112 // CHECK1: omp.dispatch.inc: 1113 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] 1114 // CHECK1: omp.dispatch.end: 1115 // CHECK1-NEXT: ret void 1116 // 1117 // 1118 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1119 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] { 1120 // CHECK1-NEXT: entry: 1121 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 1122 // CHECK1-NEXT: ret void 1123 // 1124 // 1125 // CHECK2-LABEL: define {{[^@]+}}@_Z21teams_template_structv 1126 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] { 1127 // CHECK2-NEXT: entry: 1128 // CHECK2-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 1129 // CHECK2-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 1130 // CHECK2-NEXT: ret i32 [[CALL]] 1131 // 1132 // 1133 // CHECK2-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 1134 // CHECK2-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 1135 // CHECK2-NEXT: entry: 1136 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1137 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 1138 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 1139 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 1140 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1141 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8 1142 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8 1143 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8 1144 // CHECK2-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 1145 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8 1146 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8 1147 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8 1148 // CHECK2-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 1149 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 8 1150 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 8 1151 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 8 1152 // CHECK2-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 1153 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 8 1154 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 8 1155 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 8 1156 // CHECK2-NEXT: [[_TMP27:%.*]] = alloca i32, align 4 1157 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1158 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1159 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 1160 // CHECK2-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1161 // CHECK2-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 1162 // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 1163 // CHECK2-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1164 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 1165 // CHECK2-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8 1166 // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1167 // CHECK2-NEXT: store i8* null, i8** [[TMP4]], align 8 1168 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1169 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1170 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123) 1171 // CHECK2-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1172 // CHECK2-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 1173 // CHECK2-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1174 // CHECK2: omp_offload.failed: 1175 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 1176 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]] 1177 // CHECK2: omp_offload.cont: 1178 // CHECK2-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1179 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 1180 // CHECK2-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** 1181 // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8 1182 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 1183 // CHECK2-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** 1184 // CHECK2-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8 1185 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0 1186 // CHECK2-NEXT: store i8* null, i8** [[TMP13]], align 8 1187 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 1188 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 1189 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 1190 // CHECK2-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1191 // CHECK2-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 1192 // CHECK2-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 1193 // CHECK2: omp_offload.failed7: 1194 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]] 1195 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT8]] 1196 // CHECK2: omp_offload.cont8: 1197 // CHECK2-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1198 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 1199 // CHECK2-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 1200 // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8 1201 // CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 1202 // CHECK2-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 1203 // CHECK2-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8 1204 // CHECK2-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0 1205 // CHECK2-NEXT: store i8* null, i8** [[TMP22]], align 8 1206 // CHECK2-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 1207 // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 1208 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 1209 // CHECK2-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1210 // CHECK2-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 1211 // CHECK2-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 1212 // CHECK2: omp_offload.failed14: 1213 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(%struct.SS* [[THIS1]]) #[[ATTR2]] 1214 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT15]] 1215 // CHECK2: omp_offload.cont15: 1216 // CHECK2-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1217 // CHECK2-NEXT: [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 1218 // CHECK2-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS** 1219 // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 8 1220 // CHECK2-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 1221 // CHECK2-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]** 1222 // CHECK2-NEXT: store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 8 1223 // CHECK2-NEXT: [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i64 0, i64 0 1224 // CHECK2-NEXT: store i8* null, i8** [[TMP31]], align 8 1225 // CHECK2-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 1226 // CHECK2-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 1227 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 1228 // CHECK2-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1229 // CHECK2-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 1230 // CHECK2-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]] 1231 // CHECK2: omp_offload.failed21: 1232 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(%struct.SS* [[THIS1]]) #[[ATTR2]] 1233 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT22]] 1234 // CHECK2: omp_offload.cont22: 1235 // CHECK2-NEXT: [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1236 // CHECK2-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 1237 // CHECK2-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS** 1238 // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 8 1239 // CHECK2-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 1240 // CHECK2-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]** 1241 // CHECK2-NEXT: store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 8 1242 // CHECK2-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 0 1243 // CHECK2-NEXT: store i8* null, i8** [[TMP40]], align 8 1244 // CHECK2-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 1245 // CHECK2-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 1246 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 1247 // CHECK2-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1248 // CHECK2-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 1249 // CHECK2-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]] 1250 // CHECK2: omp_offload.failed28: 1251 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(%struct.SS* [[THIS1]]) #[[ATTR2]] 1252 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT29]] 1253 // CHECK2: omp_offload.cont29: 1254 // CHECK2-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1255 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 0 1256 // CHECK2-NEXT: [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 1257 // CHECK2-NEXT: ret i32 [[TMP45]] 1258 // 1259 // 1260 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35 1261 // CHECK2-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 1262 // CHECK2-NEXT: entry: 1263 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1264 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1265 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1266 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 1267 // CHECK2-NEXT: ret void 1268 // 1269 // 1270 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 1271 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1272 // CHECK2-NEXT: entry: 1273 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1274 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1275 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1276 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1277 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1278 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1279 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1280 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1281 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1282 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1283 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1284 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1285 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1286 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1287 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1288 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 1289 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1290 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1291 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1292 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1293 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1294 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1295 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1296 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1297 // CHECK2: cond.true: 1298 // CHECK2-NEXT: br label [[COND_END:%.*]] 1299 // CHECK2: cond.false: 1300 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1301 // CHECK2-NEXT: br label [[COND_END]] 1302 // CHECK2: cond.end: 1303 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1304 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1305 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1306 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1307 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1308 // CHECK2: omp.inner.for.cond: 1309 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1310 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1311 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1312 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1313 // CHECK2: omp.inner.for.body: 1314 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1315 // CHECK2-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 1316 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1317 // CHECK2-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 1318 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 1319 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1320 // CHECK2: omp.inner.for.inc: 1321 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1322 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1323 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1324 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1325 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1326 // CHECK2: omp.inner.for.end: 1327 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1328 // CHECK2: omp.loop.exit: 1329 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1330 // CHECK2-NEXT: ret void 1331 // 1332 // 1333 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1 1334 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1335 // CHECK2-NEXT: entry: 1336 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1337 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1338 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1339 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1340 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1341 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1342 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1343 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1344 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1345 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1346 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1347 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1348 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1349 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1350 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1351 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1352 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1353 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1354 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1355 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 1356 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1357 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 1358 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1359 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 1360 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1361 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1362 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1363 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1364 // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1365 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1366 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1367 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1368 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 1369 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1370 // CHECK2: cond.true: 1371 // CHECK2-NEXT: br label [[COND_END:%.*]] 1372 // CHECK2: cond.false: 1373 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1374 // CHECK2-NEXT: br label [[COND_END]] 1375 // CHECK2: cond.end: 1376 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 1377 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1378 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1379 // CHECK2-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 1380 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1381 // CHECK2: omp.inner.for.cond: 1382 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1383 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1384 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1385 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1386 // CHECK2: omp.inner.for.body: 1387 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1388 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 1389 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1390 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1391 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 1392 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 1393 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 1394 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 1395 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1396 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1397 // CHECK2: omp.body.continue: 1398 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1399 // CHECK2: omp.inner.for.inc: 1400 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1401 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 1402 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1403 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1404 // CHECK2: omp.inner.for.end: 1405 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1406 // CHECK2: omp.loop.exit: 1407 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 1408 // CHECK2-NEXT: ret void 1409 // 1410 // 1411 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40 1412 // CHECK2-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1413 // CHECK2-NEXT: entry: 1414 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1415 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1416 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1417 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 1418 // CHECK2-NEXT: ret void 1419 // 1420 // 1421 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..2 1422 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1423 // CHECK2-NEXT: entry: 1424 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1425 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1426 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1427 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1428 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1429 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1430 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1431 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1432 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1433 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1434 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1435 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1436 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1437 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1438 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1439 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 1440 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1441 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1442 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1443 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1444 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1445 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1446 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1447 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1448 // CHECK2: cond.true: 1449 // CHECK2-NEXT: br label [[COND_END:%.*]] 1450 // CHECK2: cond.false: 1451 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1452 // CHECK2-NEXT: br label [[COND_END]] 1453 // CHECK2: cond.end: 1454 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1455 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1456 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1457 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1458 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1459 // CHECK2: omp.inner.for.cond: 1460 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1461 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1462 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1463 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1464 // CHECK2: omp.inner.for.body: 1465 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1466 // CHECK2-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 1467 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1468 // CHECK2-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 1469 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 1470 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1471 // CHECK2: omp.inner.for.inc: 1472 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1473 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1474 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1475 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1476 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1477 // CHECK2: omp.inner.for.end: 1478 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1479 // CHECK2: omp.loop.exit: 1480 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1481 // CHECK2-NEXT: ret void 1482 // 1483 // 1484 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..3 1485 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1486 // CHECK2-NEXT: entry: 1487 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1488 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1489 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1490 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1491 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1492 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1493 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1494 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1495 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1496 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1497 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1498 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1499 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1500 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1501 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1502 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1503 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1504 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1505 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1506 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 1507 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1508 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 1509 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1510 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 1511 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1512 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1513 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1514 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1515 // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1516 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1517 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1518 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1519 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 1520 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1521 // CHECK2: cond.true: 1522 // CHECK2-NEXT: br label [[COND_END:%.*]] 1523 // CHECK2: cond.false: 1524 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1525 // CHECK2-NEXT: br label [[COND_END]] 1526 // CHECK2: cond.end: 1527 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 1528 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1529 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1530 // CHECK2-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 1531 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1532 // CHECK2: omp.inner.for.cond: 1533 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1534 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1535 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1536 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1537 // CHECK2: omp.inner.for.body: 1538 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1539 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 1540 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1541 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1542 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 1543 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 1544 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 1545 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 1546 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1547 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1548 // CHECK2: omp.body.continue: 1549 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1550 // CHECK2: omp.inner.for.inc: 1551 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1552 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 1553 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1554 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1555 // CHECK2: omp.inner.for.end: 1556 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1557 // CHECK2: omp.loop.exit: 1558 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 1559 // CHECK2-NEXT: ret void 1560 // 1561 // 1562 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45 1563 // CHECK2-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1564 // CHECK2-NEXT: entry: 1565 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1566 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1567 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1568 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 1569 // CHECK2-NEXT: ret void 1570 // 1571 // 1572 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..6 1573 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1574 // CHECK2-NEXT: entry: 1575 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1576 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1577 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1578 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1579 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1580 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1581 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1582 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1583 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1584 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1585 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1586 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1587 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1588 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1589 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1590 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 1591 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1592 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1593 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1594 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1595 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1596 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1597 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1598 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1599 // CHECK2: cond.true: 1600 // CHECK2-NEXT: br label [[COND_END:%.*]] 1601 // CHECK2: cond.false: 1602 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1603 // CHECK2-NEXT: br label [[COND_END]] 1604 // CHECK2: cond.end: 1605 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1606 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1607 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1608 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1609 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1610 // CHECK2: omp.inner.for.cond: 1611 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1612 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1613 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1614 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1615 // CHECK2: omp.inner.for.body: 1616 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1617 // CHECK2-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 1618 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1619 // CHECK2-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 1620 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 1621 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1622 // CHECK2: omp.inner.for.inc: 1623 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1624 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1625 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1626 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1627 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1628 // CHECK2: omp.inner.for.end: 1629 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1630 // CHECK2: omp.loop.exit: 1631 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1632 // CHECK2-NEXT: ret void 1633 // 1634 // 1635 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..7 1636 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1637 // CHECK2-NEXT: entry: 1638 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1639 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1640 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1641 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1642 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1643 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1644 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1645 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1646 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1647 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1648 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1649 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1650 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1651 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1652 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1653 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1654 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1655 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1656 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1657 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 1658 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1659 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 1660 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1661 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 1662 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1663 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1664 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1665 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1666 // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1667 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1668 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 1669 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 1670 // CHECK2: omp.dispatch.cond: 1671 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1672 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1673 // CHECK2-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32 1674 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]] 1675 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1676 // CHECK2: cond.true: 1677 // CHECK2-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1678 // CHECK2-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 1679 // CHECK2-NEXT: br label [[COND_END:%.*]] 1680 // CHECK2: cond.false: 1681 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1682 // CHECK2-NEXT: br label [[COND_END]] 1683 // CHECK2: cond.end: 1684 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 1685 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1686 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1687 // CHECK2-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 1688 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1689 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1690 // CHECK2-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 1691 // CHECK2-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 1692 // CHECK2: omp.dispatch.body: 1693 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1694 // CHECK2: omp.inner.for.cond: 1695 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1696 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1697 // CHECK2-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 1698 // CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1699 // CHECK2: omp.inner.for.body: 1700 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1701 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 1702 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1703 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1704 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 1705 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 1706 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64 1707 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 1708 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1709 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1710 // CHECK2: omp.body.continue: 1711 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1712 // CHECK2: omp.inner.for.inc: 1713 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1714 // CHECK2-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1 1715 // CHECK2-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 1716 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1717 // CHECK2: omp.inner.for.end: 1718 // CHECK2-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 1719 // CHECK2: omp.dispatch.inc: 1720 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1721 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1722 // CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 1723 // CHECK2-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4 1724 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1725 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1726 // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 1727 // CHECK2-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4 1728 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND]] 1729 // CHECK2: omp.dispatch.end: 1730 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 1731 // CHECK2-NEXT: ret void 1732 // 1733 // 1734 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51 1735 // CHECK2-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1736 // CHECK2-NEXT: entry: 1737 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1738 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1739 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1740 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 1741 // CHECK2-NEXT: ret void 1742 // 1743 // 1744 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..10 1745 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1746 // CHECK2-NEXT: entry: 1747 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1748 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1749 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1750 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1751 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1752 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1753 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1754 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1755 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1756 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1757 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1758 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1759 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1760 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1761 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1762 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 1763 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1764 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1765 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1766 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1767 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1768 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1769 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1770 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1771 // CHECK2: cond.true: 1772 // CHECK2-NEXT: br label [[COND_END:%.*]] 1773 // CHECK2: cond.false: 1774 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1775 // CHECK2-NEXT: br label [[COND_END]] 1776 // CHECK2: cond.end: 1777 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1778 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1779 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1780 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1781 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1782 // CHECK2: omp.inner.for.cond: 1783 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1784 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1785 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1786 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1787 // CHECK2: omp.inner.for.body: 1788 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1789 // CHECK2-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 1790 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1791 // CHECK2-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 1792 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 1793 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1794 // CHECK2: omp.inner.for.inc: 1795 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1796 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1797 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1798 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1799 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1800 // CHECK2: omp.inner.for.end: 1801 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1802 // CHECK2: omp.loop.exit: 1803 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1804 // CHECK2-NEXT: ret void 1805 // 1806 // 1807 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..11 1808 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1809 // CHECK2-NEXT: entry: 1810 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1811 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1812 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1813 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1814 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1815 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1816 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1817 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1818 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1819 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1820 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1821 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1822 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1823 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1824 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1825 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1826 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1827 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1828 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1829 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 1830 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1831 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 1832 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1833 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 1834 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1835 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1836 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1837 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1838 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1839 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1840 // CHECK2-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1841 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 1842 // CHECK2-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 1843 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 1844 // CHECK2: omp.dispatch.cond: 1845 // CHECK2-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 1846 // CHECK2-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 1847 // CHECK2-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 1848 // CHECK2: omp.dispatch.body: 1849 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1850 // CHECK2-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 1851 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1852 // CHECK2: omp.inner.for.cond: 1853 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 1854 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10 1855 // CHECK2-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 1856 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1857 // CHECK2: omp.inner.for.body: 1858 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 1859 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 1860 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1861 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !10 1862 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 1863 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !10 1864 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 1865 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 1866 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !10 1867 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1868 // CHECK2: omp.body.continue: 1869 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1870 // CHECK2: omp.inner.for.inc: 1871 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 1872 // CHECK2-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 1873 // CHECK2-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 1874 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]] 1875 // CHECK2: omp.inner.for.end: 1876 // CHECK2-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 1877 // CHECK2: omp.dispatch.inc: 1878 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND]] 1879 // CHECK2: omp.dispatch.end: 1880 // CHECK2-NEXT: ret void 1881 // 1882 // 1883 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57 1884 // CHECK2-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1885 // CHECK2-NEXT: entry: 1886 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1887 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1888 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1889 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 1890 // CHECK2-NEXT: ret void 1891 // 1892 // 1893 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..14 1894 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1895 // CHECK2-NEXT: entry: 1896 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1897 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1898 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1899 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1900 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1901 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1902 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1903 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1904 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1905 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1906 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1907 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1908 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1909 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1910 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1911 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 1912 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1913 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1914 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1915 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1916 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1917 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1918 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1919 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1920 // CHECK2: cond.true: 1921 // CHECK2-NEXT: br label [[COND_END:%.*]] 1922 // CHECK2: cond.false: 1923 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1924 // CHECK2-NEXT: br label [[COND_END]] 1925 // CHECK2: cond.end: 1926 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1927 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1928 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1929 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1930 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1931 // CHECK2: omp.inner.for.cond: 1932 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1933 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1934 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1935 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1936 // CHECK2: omp.inner.for.body: 1937 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1938 // CHECK2-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 1939 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1940 // CHECK2-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 1941 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 1942 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1943 // CHECK2: omp.inner.for.inc: 1944 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1945 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1946 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1947 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1948 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1949 // CHECK2: omp.inner.for.end: 1950 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1951 // CHECK2: omp.loop.exit: 1952 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1953 // CHECK2-NEXT: ret void 1954 // 1955 // 1956 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..15 1957 // CHECK2-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1958 // CHECK2-NEXT: entry: 1959 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1960 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1961 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1962 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1963 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1964 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1965 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1966 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1967 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1968 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1969 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1970 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1971 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1972 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1973 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1974 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1975 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1976 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1977 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1978 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 1979 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1980 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 1981 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1982 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 1983 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1984 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1985 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1986 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1987 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1988 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1989 // CHECK2-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1990 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 1991 // CHECK2-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61) 1992 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 1993 // CHECK2: omp.dispatch.cond: 1994 // CHECK2-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 1995 // CHECK2-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 1996 // CHECK2-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 1997 // CHECK2: omp.dispatch.body: 1998 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1999 // CHECK2-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 2000 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2001 // CHECK2: omp.inner.for.cond: 2002 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 2003 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13 2004 // CHECK2-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 2005 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2006 // CHECK2: omp.inner.for.body: 2007 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 2008 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 2009 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2010 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13 2011 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 2012 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13 2013 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 2014 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 2015 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13 2016 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2017 // CHECK2: omp.body.continue: 2018 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2019 // CHECK2: omp.inner.for.inc: 2020 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 2021 // CHECK2-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 2022 // CHECK2-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 2023 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 2024 // CHECK2: omp.inner.for.end: 2025 // CHECK2-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2026 // CHECK2: omp.dispatch.inc: 2027 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND]] 2028 // CHECK2: omp.dispatch.end: 2029 // CHECK2-NEXT: ret void 2030 // 2031 // 2032 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2033 // CHECK2-SAME: () #[[ATTR3:[0-9]+]] { 2034 // CHECK2-NEXT: entry: 2035 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1) 2036 // CHECK2-NEXT: ret void 2037 // 2038 // 2039 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv 2040 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 2041 // CHECK3-NEXT: entry: 2042 // CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 2043 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 2044 // CHECK3-NEXT: ret i32 [[CALL]] 2045 // 2046 // 2047 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 2048 // CHECK3-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 2049 // CHECK3-NEXT: entry: 2050 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2051 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 2052 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 2053 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 2054 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2055 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4 2056 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4 2057 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4 2058 // CHECK3-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 2059 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4 2060 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4 2061 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4 2062 // CHECK3-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 2063 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 4 2064 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 4 2065 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 4 2066 // CHECK3-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 2067 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 4 2068 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 4 2069 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 4 2070 // CHECK3-NEXT: [[_TMP27:%.*]] = alloca i32, align 4 2071 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2072 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2073 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 2074 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2075 // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 2076 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4 2077 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2078 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 2079 // CHECK3-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4 2080 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2081 // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 4 2082 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2083 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2084 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123) 2085 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2086 // CHECK3-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 2087 // CHECK3-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2088 // CHECK3: omp_offload.failed: 2089 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 2090 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 2091 // CHECK3: omp_offload.cont: 2092 // CHECK3-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 2093 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 2094 // CHECK3-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** 2095 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4 2096 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 2097 // CHECK3-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** 2098 // CHECK3-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4 2099 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0 2100 // CHECK3-NEXT: store i8* null, i8** [[TMP13]], align 4 2101 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 2102 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 2103 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 2104 // CHECK3-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2105 // CHECK3-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 2106 // CHECK3-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 2107 // CHECK3: omp_offload.failed7: 2108 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]] 2109 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT8]] 2110 // CHECK3: omp_offload.cont8: 2111 // CHECK3-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 2112 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 2113 // CHECK3-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 2114 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4 2115 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 2116 // CHECK3-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 2117 // CHECK3-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4 2118 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0 2119 // CHECK3-NEXT: store i8* null, i8** [[TMP22]], align 4 2120 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 2121 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 2122 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 2123 // CHECK3-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2124 // CHECK3-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 2125 // CHECK3-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 2126 // CHECK3: omp_offload.failed14: 2127 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(%struct.SS* [[THIS1]]) #[[ATTR2]] 2128 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT15]] 2129 // CHECK3: omp_offload.cont15: 2130 // CHECK3-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 2131 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 2132 // CHECK3-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS** 2133 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 4 2134 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 2135 // CHECK3-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]** 2136 // CHECK3-NEXT: store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 4 2137 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 0 2138 // CHECK3-NEXT: store i8* null, i8** [[TMP31]], align 4 2139 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 2140 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 2141 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 2142 // CHECK3-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2143 // CHECK3-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 2144 // CHECK3-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]] 2145 // CHECK3: omp_offload.failed21: 2146 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(%struct.SS* [[THIS1]]) #[[ATTR2]] 2147 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT22]] 2148 // CHECK3: omp_offload.cont22: 2149 // CHECK3-NEXT: [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 2150 // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 2151 // CHECK3-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS** 2152 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 4 2153 // CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 2154 // CHECK3-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]** 2155 // CHECK3-NEXT: store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 4 2156 // CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 0 2157 // CHECK3-NEXT: store i8* null, i8** [[TMP40]], align 4 2158 // CHECK3-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 2159 // CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 2160 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 2161 // CHECK3-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2162 // CHECK3-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 2163 // CHECK3-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]] 2164 // CHECK3: omp_offload.failed28: 2165 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(%struct.SS* [[THIS1]]) #[[ATTR2]] 2166 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT29]] 2167 // CHECK3: omp_offload.cont29: 2168 // CHECK3-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 2169 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i32 0, i32 0 2170 // CHECK3-NEXT: [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 2171 // CHECK3-NEXT: ret i32 [[TMP45]] 2172 // 2173 // 2174 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35 2175 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 2176 // CHECK3-NEXT: entry: 2177 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2178 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2179 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2180 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 2181 // CHECK3-NEXT: ret void 2182 // 2183 // 2184 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 2185 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 2186 // CHECK3-NEXT: entry: 2187 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2188 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2189 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2190 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2191 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2192 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2193 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2194 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2195 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2196 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2197 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2198 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2199 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2200 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2201 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2202 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 2203 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2204 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2205 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2206 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2207 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2208 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2209 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 2210 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2211 // CHECK3: cond.true: 2212 // CHECK3-NEXT: br label [[COND_END:%.*]] 2213 // CHECK3: cond.false: 2214 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2215 // CHECK3-NEXT: br label [[COND_END]] 2216 // CHECK3: cond.end: 2217 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2218 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2219 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2220 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2221 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2222 // CHECK3: omp.inner.for.cond: 2223 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2224 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2225 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2226 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2227 // CHECK3: omp.inner.for.body: 2228 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2229 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2230 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 2231 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2232 // CHECK3: omp.inner.for.inc: 2233 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2234 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2235 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 2236 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2237 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 2238 // CHECK3: omp.inner.for.end: 2239 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2240 // CHECK3: omp.loop.exit: 2241 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2242 // CHECK3-NEXT: ret void 2243 // 2244 // 2245 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 2246 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 2247 // CHECK3-NEXT: entry: 2248 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2249 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2250 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2251 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2252 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2253 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2254 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2255 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2256 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2257 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2258 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2259 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2260 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2261 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2262 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2263 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2264 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2265 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2266 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2267 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 2268 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2269 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2270 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 2271 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 2272 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2273 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2274 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2275 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 2276 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2277 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2278 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 2279 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2280 // CHECK3: cond.true: 2281 // CHECK3-NEXT: br label [[COND_END:%.*]] 2282 // CHECK3: cond.false: 2283 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2284 // CHECK3-NEXT: br label [[COND_END]] 2285 // CHECK3: cond.end: 2286 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 2287 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2288 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2289 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 2290 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2291 // CHECK3: omp.inner.for.cond: 2292 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2293 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2294 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 2295 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2296 // CHECK3: omp.inner.for.body: 2297 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2298 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 2299 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2300 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2301 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 2302 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 2303 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]] 2304 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2305 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2306 // CHECK3: omp.body.continue: 2307 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2308 // CHECK3: omp.inner.for.inc: 2309 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2310 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 2311 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 2312 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 2313 // CHECK3: omp.inner.for.end: 2314 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2315 // CHECK3: omp.loop.exit: 2316 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 2317 // CHECK3-NEXT: ret void 2318 // 2319 // 2320 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40 2321 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 2322 // CHECK3-NEXT: entry: 2323 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2324 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2325 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2326 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 2327 // CHECK3-NEXT: ret void 2328 // 2329 // 2330 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2 2331 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 2332 // CHECK3-NEXT: entry: 2333 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2334 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2335 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2336 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2337 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2338 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2339 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2340 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2341 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2342 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2343 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2344 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2345 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2346 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2347 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2348 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 2349 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2350 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2351 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2352 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2353 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2354 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2355 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 2356 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2357 // CHECK3: cond.true: 2358 // CHECK3-NEXT: br label [[COND_END:%.*]] 2359 // CHECK3: cond.false: 2360 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2361 // CHECK3-NEXT: br label [[COND_END]] 2362 // CHECK3: cond.end: 2363 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2364 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2365 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2366 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2367 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2368 // CHECK3: omp.inner.for.cond: 2369 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2370 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2371 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2372 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2373 // CHECK3: omp.inner.for.body: 2374 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2375 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2376 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 2377 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2378 // CHECK3: omp.inner.for.inc: 2379 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2380 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2381 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 2382 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2383 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 2384 // CHECK3: omp.inner.for.end: 2385 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2386 // CHECK3: omp.loop.exit: 2387 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2388 // CHECK3-NEXT: ret void 2389 // 2390 // 2391 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3 2392 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 2393 // CHECK3-NEXT: entry: 2394 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2395 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2396 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2397 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2398 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2399 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2400 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2401 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2402 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2403 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2404 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2405 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2406 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2407 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2408 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2409 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2410 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2411 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2412 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2413 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 2414 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2415 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2416 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 2417 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 2418 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2419 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2420 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2421 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 2422 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2423 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2424 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 2425 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2426 // CHECK3: cond.true: 2427 // CHECK3-NEXT: br label [[COND_END:%.*]] 2428 // CHECK3: cond.false: 2429 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2430 // CHECK3-NEXT: br label [[COND_END]] 2431 // CHECK3: cond.end: 2432 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 2433 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2434 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2435 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 2436 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2437 // CHECK3: omp.inner.for.cond: 2438 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2439 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2440 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 2441 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2442 // CHECK3: omp.inner.for.body: 2443 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2444 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 2445 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2446 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2447 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 2448 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 2449 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]] 2450 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2451 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2452 // CHECK3: omp.body.continue: 2453 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2454 // CHECK3: omp.inner.for.inc: 2455 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2456 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 2457 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 2458 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 2459 // CHECK3: omp.inner.for.end: 2460 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2461 // CHECK3: omp.loop.exit: 2462 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 2463 // CHECK3-NEXT: ret void 2464 // 2465 // 2466 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45 2467 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 2468 // CHECK3-NEXT: entry: 2469 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2470 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2471 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2472 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 2473 // CHECK3-NEXT: ret void 2474 // 2475 // 2476 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..6 2477 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 2478 // CHECK3-NEXT: entry: 2479 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2480 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2481 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2482 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2483 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2484 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2485 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2486 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2487 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2488 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2489 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2490 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2491 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2492 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2493 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2494 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 2495 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2496 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2497 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2498 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2499 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2500 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2501 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 2502 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2503 // CHECK3: cond.true: 2504 // CHECK3-NEXT: br label [[COND_END:%.*]] 2505 // CHECK3: cond.false: 2506 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2507 // CHECK3-NEXT: br label [[COND_END]] 2508 // CHECK3: cond.end: 2509 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2510 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2511 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2512 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2513 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2514 // CHECK3: omp.inner.for.cond: 2515 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2516 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2517 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2518 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2519 // CHECK3: omp.inner.for.body: 2520 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2521 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2522 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 2523 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2524 // CHECK3: omp.inner.for.inc: 2525 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2526 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2527 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 2528 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2529 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 2530 // CHECK3: omp.inner.for.end: 2531 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2532 // CHECK3: omp.loop.exit: 2533 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2534 // CHECK3-NEXT: ret void 2535 // 2536 // 2537 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..7 2538 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 2539 // CHECK3-NEXT: entry: 2540 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2541 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2542 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2543 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2544 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2545 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2546 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2547 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2548 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2549 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2550 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2551 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2552 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2553 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2554 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2555 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2556 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2557 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2558 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2559 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 2560 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2561 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2562 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 2563 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 2564 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2565 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2566 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2567 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 2568 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 2569 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2570 // CHECK3: omp.dispatch.cond: 2571 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2572 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2573 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]] 2574 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2575 // CHECK3: cond.true: 2576 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2577 // CHECK3-NEXT: br label [[COND_END:%.*]] 2578 // CHECK3: cond.false: 2579 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2580 // CHECK3-NEXT: br label [[COND_END]] 2581 // CHECK3: cond.end: 2582 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 2583 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2584 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2585 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 2586 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2587 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2588 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 2589 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2590 // CHECK3: omp.dispatch.body: 2591 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2592 // CHECK3: omp.inner.for.cond: 2593 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2594 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2595 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 2596 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2597 // CHECK3: omp.inner.for.body: 2598 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2599 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 2600 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2601 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2602 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 2603 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 2604 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP15]] 2605 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2606 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2607 // CHECK3: omp.body.continue: 2608 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2609 // CHECK3: omp.inner.for.inc: 2610 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2611 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1 2612 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 2613 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 2614 // CHECK3: omp.inner.for.end: 2615 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2616 // CHECK3: omp.dispatch.inc: 2617 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2618 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2619 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 2620 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 2621 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2622 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2623 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 2624 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 2625 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] 2626 // CHECK3: omp.dispatch.end: 2627 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 2628 // CHECK3-NEXT: ret void 2629 // 2630 // 2631 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51 2632 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 2633 // CHECK3-NEXT: entry: 2634 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2635 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2636 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2637 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 2638 // CHECK3-NEXT: ret void 2639 // 2640 // 2641 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..10 2642 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 2643 // CHECK3-NEXT: entry: 2644 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2645 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2646 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2647 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2648 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2649 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2650 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2651 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2652 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2653 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2654 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2655 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2656 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2657 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2658 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2659 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 2660 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2661 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2662 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2663 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2664 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2665 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2666 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 2667 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2668 // CHECK3: cond.true: 2669 // CHECK3-NEXT: br label [[COND_END:%.*]] 2670 // CHECK3: cond.false: 2671 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2672 // CHECK3-NEXT: br label [[COND_END]] 2673 // CHECK3: cond.end: 2674 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2675 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2676 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2677 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2678 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2679 // CHECK3: omp.inner.for.cond: 2680 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2681 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2682 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2683 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2684 // CHECK3: omp.inner.for.body: 2685 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2686 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2687 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 2688 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2689 // CHECK3: omp.inner.for.inc: 2690 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2691 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2692 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 2693 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2694 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 2695 // CHECK3: omp.inner.for.end: 2696 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2697 // CHECK3: omp.loop.exit: 2698 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2699 // CHECK3-NEXT: ret void 2700 // 2701 // 2702 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..11 2703 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 2704 // CHECK3-NEXT: entry: 2705 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2706 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2707 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2708 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2709 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2710 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2711 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2712 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2713 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2714 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2715 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2716 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2717 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2718 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2719 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2720 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2721 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2722 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2723 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2724 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 2725 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2726 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2727 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 2728 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 2729 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2730 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2731 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2732 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2733 // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2734 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 2735 // CHECK3-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 2736 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2737 // CHECK3: omp.dispatch.cond: 2738 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 2739 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 2740 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2741 // CHECK3: omp.dispatch.body: 2742 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2743 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 2744 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2745 // CHECK3: omp.inner.for.cond: 2746 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 2747 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11 2748 // CHECK3-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 2749 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2750 // CHECK3: omp.inner.for.body: 2751 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 2752 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 2753 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2754 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !11 2755 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 2756 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11 2757 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]] 2758 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !11 2759 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2760 // CHECK3: omp.body.continue: 2761 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2762 // CHECK3: omp.inner.for.inc: 2763 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 2764 // CHECK3-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 2765 // CHECK3-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 2766 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]] 2767 // CHECK3: omp.inner.for.end: 2768 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2769 // CHECK3: omp.dispatch.inc: 2770 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] 2771 // CHECK3: omp.dispatch.end: 2772 // CHECK3-NEXT: ret void 2773 // 2774 // 2775 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57 2776 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 2777 // CHECK3-NEXT: entry: 2778 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2779 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2780 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2781 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 2782 // CHECK3-NEXT: ret void 2783 // 2784 // 2785 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..14 2786 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 2787 // CHECK3-NEXT: entry: 2788 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2789 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2790 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2791 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2792 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2793 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2794 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2795 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2796 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2797 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2798 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2799 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2800 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2801 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2802 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2803 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 2804 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2805 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2806 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2807 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2808 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2809 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2810 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 2811 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2812 // CHECK3: cond.true: 2813 // CHECK3-NEXT: br label [[COND_END:%.*]] 2814 // CHECK3: cond.false: 2815 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2816 // CHECK3-NEXT: br label [[COND_END]] 2817 // CHECK3: cond.end: 2818 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2819 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2820 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2821 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2822 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2823 // CHECK3: omp.inner.for.cond: 2824 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2825 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2826 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2827 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2828 // CHECK3: omp.inner.for.body: 2829 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2830 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2831 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 2832 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2833 // CHECK3: omp.inner.for.inc: 2834 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2835 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2836 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 2837 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2838 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 2839 // CHECK3: omp.inner.for.end: 2840 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2841 // CHECK3: omp.loop.exit: 2842 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2843 // CHECK3-NEXT: ret void 2844 // 2845 // 2846 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..15 2847 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 2848 // CHECK3-NEXT: entry: 2849 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2850 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2851 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2852 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2853 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2854 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2855 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2856 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2857 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2858 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2859 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2860 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2861 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2862 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2863 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2864 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2865 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2866 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2867 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2868 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 2869 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2870 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2871 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 2872 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 2873 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2874 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2875 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2876 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2877 // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2878 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 2879 // CHECK3-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61) 2880 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2881 // CHECK3: omp.dispatch.cond: 2882 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 2883 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 2884 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2885 // CHECK3: omp.dispatch.body: 2886 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2887 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 2888 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2889 // CHECK3: omp.inner.for.cond: 2890 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 2891 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14 2892 // CHECK3-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 2893 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2894 // CHECK3: omp.inner.for.body: 2895 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 2896 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 2897 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2898 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14 2899 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 2900 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !14 2901 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]] 2902 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !14 2903 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2904 // CHECK3: omp.body.continue: 2905 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2906 // CHECK3: omp.inner.for.inc: 2907 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 2908 // CHECK3-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 2909 // CHECK3-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 2910 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] 2911 // CHECK3: omp.inner.for.end: 2912 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2913 // CHECK3: omp.dispatch.inc: 2914 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] 2915 // CHECK3: omp.dispatch.end: 2916 // CHECK3-NEXT: ret void 2917 // 2918 // 2919 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2920 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] { 2921 // CHECK3-NEXT: entry: 2922 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 2923 // CHECK3-NEXT: ret void 2924 // 2925 // 2926 // CHECK4-LABEL: define {{[^@]+}}@_Z21teams_template_structv 2927 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] { 2928 // CHECK4-NEXT: entry: 2929 // CHECK4-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 2930 // CHECK4-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 2931 // CHECK4-NEXT: ret i32 [[CALL]] 2932 // 2933 // 2934 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 2935 // CHECK4-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 2936 // CHECK4-NEXT: entry: 2937 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2938 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 2939 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 2940 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 2941 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 2942 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4 2943 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4 2944 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4 2945 // CHECK4-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 2946 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4 2947 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4 2948 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4 2949 // CHECK4-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 2950 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 4 2951 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 4 2952 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 4 2953 // CHECK4-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 2954 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 4 2955 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 4 2956 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 4 2957 // CHECK4-NEXT: [[_TMP27:%.*]] = alloca i32, align 4 2958 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2959 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2960 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 2961 // CHECK4-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2962 // CHECK4-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 2963 // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4 2964 // CHECK4-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2965 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 2966 // CHECK4-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4 2967 // CHECK4-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2968 // CHECK4-NEXT: store i8* null, i8** [[TMP4]], align 4 2969 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2970 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2971 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123) 2972 // CHECK4-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2973 // CHECK4-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 2974 // CHECK4-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2975 // CHECK4: omp_offload.failed: 2976 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 2977 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]] 2978 // CHECK4: omp_offload.cont: 2979 // CHECK4-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 2980 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 2981 // CHECK4-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** 2982 // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4 2983 // CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 2984 // CHECK4-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** 2985 // CHECK4-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4 2986 // CHECK4-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0 2987 // CHECK4-NEXT: store i8* null, i8** [[TMP13]], align 4 2988 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 2989 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 2990 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 2991 // CHECK4-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2992 // CHECK4-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 2993 // CHECK4-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 2994 // CHECK4: omp_offload.failed7: 2995 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]] 2996 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT8]] 2997 // CHECK4: omp_offload.cont8: 2998 // CHECK4-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 2999 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 3000 // CHECK4-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 3001 // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4 3002 // CHECK4-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 3003 // CHECK4-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 3004 // CHECK4-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4 3005 // CHECK4-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0 3006 // CHECK4-NEXT: store i8* null, i8** [[TMP22]], align 4 3007 // CHECK4-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 3008 // CHECK4-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 3009 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 3010 // CHECK4-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3011 // CHECK4-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 3012 // CHECK4-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 3013 // CHECK4: omp_offload.failed14: 3014 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(%struct.SS* [[THIS1]]) #[[ATTR2]] 3015 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT15]] 3016 // CHECK4: omp_offload.cont15: 3017 // CHECK4-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 3018 // CHECK4-NEXT: [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 3019 // CHECK4-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS** 3020 // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 4 3021 // CHECK4-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 3022 // CHECK4-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]** 3023 // CHECK4-NEXT: store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 4 3024 // CHECK4-NEXT: [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 0 3025 // CHECK4-NEXT: store i8* null, i8** [[TMP31]], align 4 3026 // CHECK4-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 3027 // CHECK4-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 3028 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 3029 // CHECK4-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3030 // CHECK4-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 3031 // CHECK4-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]] 3032 // CHECK4: omp_offload.failed21: 3033 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(%struct.SS* [[THIS1]]) #[[ATTR2]] 3034 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT22]] 3035 // CHECK4: omp_offload.cont22: 3036 // CHECK4-NEXT: [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 3037 // CHECK4-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 3038 // CHECK4-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS** 3039 // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 4 3040 // CHECK4-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 3041 // CHECK4-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]** 3042 // CHECK4-NEXT: store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 4 3043 // CHECK4-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 0 3044 // CHECK4-NEXT: store i8* null, i8** [[TMP40]], align 4 3045 // CHECK4-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 3046 // CHECK4-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 3047 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 3048 // CHECK4-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3049 // CHECK4-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 3050 // CHECK4-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]] 3051 // CHECK4: omp_offload.failed28: 3052 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(%struct.SS* [[THIS1]]) #[[ATTR2]] 3053 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT29]] 3054 // CHECK4: omp_offload.cont29: 3055 // CHECK4-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 3056 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i32 0, i32 0 3057 // CHECK4-NEXT: [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 3058 // CHECK4-NEXT: ret i32 [[TMP45]] 3059 // 3060 // 3061 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35 3062 // CHECK4-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 3063 // CHECK4-NEXT: entry: 3064 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3065 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3066 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3067 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 3068 // CHECK4-NEXT: ret void 3069 // 3070 // 3071 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 3072 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 3073 // CHECK4-NEXT: entry: 3074 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3075 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3076 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3077 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3078 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 3079 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3080 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3081 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3082 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3083 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 3084 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3085 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3086 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3087 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3088 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3089 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 3090 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3091 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3092 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3093 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3094 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3095 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3096 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 3097 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3098 // CHECK4: cond.true: 3099 // CHECK4-NEXT: br label [[COND_END:%.*]] 3100 // CHECK4: cond.false: 3101 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3102 // CHECK4-NEXT: br label [[COND_END]] 3103 // CHECK4: cond.end: 3104 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3105 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3106 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3107 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3108 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3109 // CHECK4: omp.inner.for.cond: 3110 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3111 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3112 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3113 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3114 // CHECK4: omp.inner.for.body: 3115 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3116 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3117 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 3118 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3119 // CHECK4: omp.inner.for.inc: 3120 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3121 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3122 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 3123 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3124 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 3125 // CHECK4: omp.inner.for.end: 3126 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3127 // CHECK4: omp.loop.exit: 3128 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3129 // CHECK4-NEXT: ret void 3130 // 3131 // 3132 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1 3133 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 3134 // CHECK4-NEXT: entry: 3135 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3136 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3137 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3138 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3139 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3140 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3141 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 3142 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3143 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3144 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3145 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3146 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 3147 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3148 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3149 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3150 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3151 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3152 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3153 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3154 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 3155 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3156 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3157 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 3158 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 3159 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3160 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3161 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3162 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 3163 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3164 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3165 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 3166 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3167 // CHECK4: cond.true: 3168 // CHECK4-NEXT: br label [[COND_END:%.*]] 3169 // CHECK4: cond.false: 3170 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3171 // CHECK4-NEXT: br label [[COND_END]] 3172 // CHECK4: cond.end: 3173 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 3174 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3175 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3176 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 3177 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3178 // CHECK4: omp.inner.for.cond: 3179 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3180 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3181 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 3182 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3183 // CHECK4: omp.inner.for.body: 3184 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3185 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 3186 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3187 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3188 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 3189 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 3190 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]] 3191 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3192 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3193 // CHECK4: omp.body.continue: 3194 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3195 // CHECK4: omp.inner.for.inc: 3196 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3197 // CHECK4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 3198 // CHECK4-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 3199 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 3200 // CHECK4: omp.inner.for.end: 3201 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3202 // CHECK4: omp.loop.exit: 3203 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 3204 // CHECK4-NEXT: ret void 3205 // 3206 // 3207 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40 3208 // CHECK4-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 3209 // CHECK4-NEXT: entry: 3210 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3211 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3212 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3213 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 3214 // CHECK4-NEXT: ret void 3215 // 3216 // 3217 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..2 3218 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 3219 // CHECK4-NEXT: entry: 3220 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3221 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3222 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3223 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3224 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 3225 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3226 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3227 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3228 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3229 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 3230 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3231 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3232 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3233 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3234 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3235 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 3236 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3237 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3238 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3239 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3240 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3241 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3242 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 3243 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3244 // CHECK4: cond.true: 3245 // CHECK4-NEXT: br label [[COND_END:%.*]] 3246 // CHECK4: cond.false: 3247 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3248 // CHECK4-NEXT: br label [[COND_END]] 3249 // CHECK4: cond.end: 3250 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3251 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3252 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3253 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3254 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3255 // CHECK4: omp.inner.for.cond: 3256 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3257 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3258 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3259 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3260 // CHECK4: omp.inner.for.body: 3261 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3262 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3263 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 3264 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3265 // CHECK4: omp.inner.for.inc: 3266 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3267 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3268 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 3269 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3270 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 3271 // CHECK4: omp.inner.for.end: 3272 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3273 // CHECK4: omp.loop.exit: 3274 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3275 // CHECK4-NEXT: ret void 3276 // 3277 // 3278 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..3 3279 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 3280 // CHECK4-NEXT: entry: 3281 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3282 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3283 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3284 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3285 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3286 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3287 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 3288 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3289 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3290 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3291 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3292 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 3293 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3294 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3295 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3296 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3297 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3298 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3299 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3300 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 3301 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3302 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3303 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 3304 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 3305 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3306 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3307 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3308 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 3309 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3310 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3311 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 3312 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3313 // CHECK4: cond.true: 3314 // CHECK4-NEXT: br label [[COND_END:%.*]] 3315 // CHECK4: cond.false: 3316 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3317 // CHECK4-NEXT: br label [[COND_END]] 3318 // CHECK4: cond.end: 3319 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 3320 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3321 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3322 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 3323 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3324 // CHECK4: omp.inner.for.cond: 3325 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3326 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3327 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 3328 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3329 // CHECK4: omp.inner.for.body: 3330 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3331 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 3332 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3333 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3334 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 3335 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 3336 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]] 3337 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3338 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3339 // CHECK4: omp.body.continue: 3340 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3341 // CHECK4: omp.inner.for.inc: 3342 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3343 // CHECK4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 3344 // CHECK4-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 3345 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 3346 // CHECK4: omp.inner.for.end: 3347 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3348 // CHECK4: omp.loop.exit: 3349 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 3350 // CHECK4-NEXT: ret void 3351 // 3352 // 3353 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45 3354 // CHECK4-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 3355 // CHECK4-NEXT: entry: 3356 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3357 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3358 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3359 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 3360 // CHECK4-NEXT: ret void 3361 // 3362 // 3363 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..6 3364 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 3365 // CHECK4-NEXT: entry: 3366 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3367 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3368 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3369 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3370 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 3371 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3372 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3373 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3374 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3375 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 3376 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3377 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3378 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3379 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3380 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3381 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 3382 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3383 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3384 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3385 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3386 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3387 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3388 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 3389 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3390 // CHECK4: cond.true: 3391 // CHECK4-NEXT: br label [[COND_END:%.*]] 3392 // CHECK4: cond.false: 3393 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3394 // CHECK4-NEXT: br label [[COND_END]] 3395 // CHECK4: cond.end: 3396 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3397 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3398 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3399 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3400 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3401 // CHECK4: omp.inner.for.cond: 3402 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3403 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3404 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3405 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3406 // CHECK4: omp.inner.for.body: 3407 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3408 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3409 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 3410 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3411 // CHECK4: omp.inner.for.inc: 3412 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3413 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3414 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 3415 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3416 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 3417 // CHECK4: omp.inner.for.end: 3418 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3419 // CHECK4: omp.loop.exit: 3420 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3421 // CHECK4-NEXT: ret void 3422 // 3423 // 3424 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..7 3425 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 3426 // CHECK4-NEXT: entry: 3427 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3428 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3429 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3430 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3431 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3432 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3433 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 3434 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3435 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3436 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3437 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3438 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 3439 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3440 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3441 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3442 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3443 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3444 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3445 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3446 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 3447 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3448 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3449 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 3450 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 3451 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3452 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3453 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3454 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 3455 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 3456 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 3457 // CHECK4: omp.dispatch.cond: 3458 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3459 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3460 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]] 3461 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3462 // CHECK4: cond.true: 3463 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3464 // CHECK4-NEXT: br label [[COND_END:%.*]] 3465 // CHECK4: cond.false: 3466 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3467 // CHECK4-NEXT: br label [[COND_END]] 3468 // CHECK4: cond.end: 3469 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 3470 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3471 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3472 // CHECK4-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 3473 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3474 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3475 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 3476 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 3477 // CHECK4: omp.dispatch.body: 3478 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3479 // CHECK4: omp.inner.for.cond: 3480 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3481 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3482 // CHECK4-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 3483 // CHECK4-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3484 // CHECK4: omp.inner.for.body: 3485 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3486 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 3487 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3488 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3489 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 3490 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 3491 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP15]] 3492 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3493 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3494 // CHECK4: omp.body.continue: 3495 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3496 // CHECK4: omp.inner.for.inc: 3497 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3498 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1 3499 // CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 3500 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 3501 // CHECK4: omp.inner.for.end: 3502 // CHECK4-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 3503 // CHECK4: omp.dispatch.inc: 3504 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3505 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3506 // CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 3507 // CHECK4-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 3508 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3509 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3510 // CHECK4-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 3511 // CHECK4-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 3512 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND]] 3513 // CHECK4: omp.dispatch.end: 3514 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 3515 // CHECK4-NEXT: ret void 3516 // 3517 // 3518 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51 3519 // CHECK4-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 3520 // CHECK4-NEXT: entry: 3521 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3522 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3523 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3524 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 3525 // CHECK4-NEXT: ret void 3526 // 3527 // 3528 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..10 3529 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 3530 // CHECK4-NEXT: entry: 3531 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3532 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3533 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3534 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3535 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 3536 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3537 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3538 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3539 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3540 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 3541 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3542 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3543 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3544 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3545 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3546 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 3547 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3548 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3549 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3550 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3551 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3552 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3553 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 3554 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3555 // CHECK4: cond.true: 3556 // CHECK4-NEXT: br label [[COND_END:%.*]] 3557 // CHECK4: cond.false: 3558 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3559 // CHECK4-NEXT: br label [[COND_END]] 3560 // CHECK4: cond.end: 3561 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3562 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3563 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3564 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3565 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3566 // CHECK4: omp.inner.for.cond: 3567 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3568 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3569 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3570 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3571 // CHECK4: omp.inner.for.body: 3572 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3573 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3574 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 3575 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3576 // CHECK4: omp.inner.for.inc: 3577 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3578 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3579 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 3580 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3581 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 3582 // CHECK4: omp.inner.for.end: 3583 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3584 // CHECK4: omp.loop.exit: 3585 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3586 // CHECK4-NEXT: ret void 3587 // 3588 // 3589 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..11 3590 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 3591 // CHECK4-NEXT: entry: 3592 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3593 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3594 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3595 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3596 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3597 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3598 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 3599 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3600 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3601 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3602 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3603 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 3604 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3605 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3606 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3607 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3608 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3609 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3610 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3611 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 3612 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3613 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3614 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 3615 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 3616 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3617 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3618 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3619 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3620 // CHECK4-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3621 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 3622 // CHECK4-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 3623 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 3624 // CHECK4: omp.dispatch.cond: 3625 // CHECK4-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 3626 // CHECK4-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 3627 // CHECK4-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 3628 // CHECK4: omp.dispatch.body: 3629 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3630 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 3631 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3632 // CHECK4: omp.inner.for.cond: 3633 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 3634 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11 3635 // CHECK4-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 3636 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3637 // CHECK4: omp.inner.for.body: 3638 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 3639 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 3640 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3641 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !11 3642 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 3643 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11 3644 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]] 3645 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !11 3646 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3647 // CHECK4: omp.body.continue: 3648 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3649 // CHECK4: omp.inner.for.inc: 3650 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 3651 // CHECK4-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 3652 // CHECK4-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 3653 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]] 3654 // CHECK4: omp.inner.for.end: 3655 // CHECK4-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 3656 // CHECK4: omp.dispatch.inc: 3657 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND]] 3658 // CHECK4: omp.dispatch.end: 3659 // CHECK4-NEXT: ret void 3660 // 3661 // 3662 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57 3663 // CHECK4-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 3664 // CHECK4-NEXT: entry: 3665 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3666 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3667 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3668 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 3669 // CHECK4-NEXT: ret void 3670 // 3671 // 3672 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..14 3673 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 3674 // CHECK4-NEXT: entry: 3675 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3676 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3677 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3678 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3679 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 3680 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3681 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3682 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3683 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3684 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 3685 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3686 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3687 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3688 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3689 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3690 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 3691 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3692 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3693 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3694 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3695 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3696 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3697 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 3698 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3699 // CHECK4: cond.true: 3700 // CHECK4-NEXT: br label [[COND_END:%.*]] 3701 // CHECK4: cond.false: 3702 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3703 // CHECK4-NEXT: br label [[COND_END]] 3704 // CHECK4: cond.end: 3705 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3706 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3707 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3708 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3709 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3710 // CHECK4: omp.inner.for.cond: 3711 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3712 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3713 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3714 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3715 // CHECK4: omp.inner.for.body: 3716 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3717 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3718 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 3719 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3720 // CHECK4: omp.inner.for.inc: 3721 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3722 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3723 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 3724 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3725 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 3726 // CHECK4: omp.inner.for.end: 3727 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3728 // CHECK4: omp.loop.exit: 3729 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3730 // CHECK4-NEXT: ret void 3731 // 3732 // 3733 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..15 3734 // CHECK4-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 3735 // CHECK4-NEXT: entry: 3736 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3737 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3738 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3739 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3740 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3741 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3742 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 3743 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3744 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3745 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3746 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3747 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 3748 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3749 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3750 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3751 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3752 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3753 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3754 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3755 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 3756 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3757 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3758 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 3759 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 3760 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3761 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3762 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3763 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3764 // CHECK4-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3765 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 3766 // CHECK4-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61) 3767 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 3768 // CHECK4: omp.dispatch.cond: 3769 // CHECK4-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 3770 // CHECK4-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 3771 // CHECK4-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 3772 // CHECK4: omp.dispatch.body: 3773 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3774 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 3775 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3776 // CHECK4: omp.inner.for.cond: 3777 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 3778 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14 3779 // CHECK4-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 3780 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3781 // CHECK4: omp.inner.for.body: 3782 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 3783 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 3784 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3785 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14 3786 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 3787 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !14 3788 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]] 3789 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !14 3790 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3791 // CHECK4: omp.body.continue: 3792 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3793 // CHECK4: omp.inner.for.inc: 3794 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 3795 // CHECK4-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 3796 // CHECK4-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 3797 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] 3798 // CHECK4: omp.inner.for.end: 3799 // CHECK4-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 3800 // CHECK4: omp.dispatch.inc: 3801 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND]] 3802 // CHECK4: omp.dispatch.end: 3803 // CHECK4-NEXT: ret void 3804 // 3805 // 3806 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3807 // CHECK4-SAME: () #[[ATTR3:[0-9]+]] { 3808 // CHECK4-NEXT: entry: 3809 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1) 3810 // CHECK4-NEXT: ret void 3811 // 3812 // 3813 // CHECK5-LABEL: define {{[^@]+}}@_Z21teams_template_structv 3814 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { 3815 // CHECK5-NEXT: entry: 3816 // CHECK5-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 3817 // CHECK5-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 3818 // CHECK5-NEXT: ret i32 [[CALL]] 3819 // 3820 // 3821 // CHECK5-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 3822 // CHECK5-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 3823 // CHECK5-NEXT: entry: 3824 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 3825 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 3826 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 3827 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 3828 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3829 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8 3830 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8 3831 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8 3832 // CHECK5-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 3833 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8 3834 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8 3835 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8 3836 // CHECK5-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 3837 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 8 3838 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 8 3839 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 8 3840 // CHECK5-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 3841 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 8 3842 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 8 3843 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 8 3844 // CHECK5-NEXT: [[_TMP27:%.*]] = alloca i32, align 4 3845 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 3846 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 3847 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 3848 // CHECK5-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3849 // CHECK5-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 3850 // CHECK5-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 3851 // CHECK5-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3852 // CHECK5-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 3853 // CHECK5-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8 3854 // CHECK5-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 3855 // CHECK5-NEXT: store i8* null, i8** [[TMP4]], align 8 3856 // CHECK5-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3857 // CHECK5-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3858 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123) 3859 // CHECK5-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3860 // CHECK5-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 3861 // CHECK5-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3862 // CHECK5: omp_offload.failed: 3863 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 3864 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT]] 3865 // CHECK5: omp_offload.cont: 3866 // CHECK5-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 3867 // CHECK5-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 3868 // CHECK5-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** 3869 // CHECK5-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8 3870 // CHECK5-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 3871 // CHECK5-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** 3872 // CHECK5-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8 3873 // CHECK5-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0 3874 // CHECK5-NEXT: store i8* null, i8** [[TMP13]], align 8 3875 // CHECK5-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 3876 // CHECK5-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 3877 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 3878 // CHECK5-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3879 // CHECK5-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 3880 // CHECK5-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 3881 // CHECK5: omp_offload.failed7: 3882 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]] 3883 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT8]] 3884 // CHECK5: omp_offload.cont8: 3885 // CHECK5-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 3886 // CHECK5-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 3887 // CHECK5-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 3888 // CHECK5-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8 3889 // CHECK5-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 3890 // CHECK5-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 3891 // CHECK5-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8 3892 // CHECK5-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0 3893 // CHECK5-NEXT: store i8* null, i8** [[TMP22]], align 8 3894 // CHECK5-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 3895 // CHECK5-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 3896 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 3897 // CHECK5-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3898 // CHECK5-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 3899 // CHECK5-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 3900 // CHECK5: omp_offload.failed14: 3901 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(%struct.SS* [[THIS1]]) #[[ATTR2]] 3902 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT15]] 3903 // CHECK5: omp_offload.cont15: 3904 // CHECK5-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 3905 // CHECK5-NEXT: [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 3906 // CHECK5-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS** 3907 // CHECK5-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 8 3908 // CHECK5-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 3909 // CHECK5-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]** 3910 // CHECK5-NEXT: store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 8 3911 // CHECK5-NEXT: [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i64 0, i64 0 3912 // CHECK5-NEXT: store i8* null, i8** [[TMP31]], align 8 3913 // CHECK5-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 3914 // CHECK5-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 3915 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 3916 // CHECK5-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3917 // CHECK5-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 3918 // CHECK5-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]] 3919 // CHECK5: omp_offload.failed21: 3920 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(%struct.SS* [[THIS1]]) #[[ATTR2]] 3921 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT22]] 3922 // CHECK5: omp_offload.cont22: 3923 // CHECK5-NEXT: [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 3924 // CHECK5-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 3925 // CHECK5-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS** 3926 // CHECK5-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 8 3927 // CHECK5-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 3928 // CHECK5-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]** 3929 // CHECK5-NEXT: store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 8 3930 // CHECK5-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 0 3931 // CHECK5-NEXT: store i8* null, i8** [[TMP40]], align 8 3932 // CHECK5-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 3933 // CHECK5-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 3934 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 3935 // CHECK5-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3936 // CHECK5-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 3937 // CHECK5-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]] 3938 // CHECK5: omp_offload.failed28: 3939 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(%struct.SS* [[THIS1]]) #[[ATTR2]] 3940 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT29]] 3941 // CHECK5: omp_offload.cont29: 3942 // CHECK5-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 3943 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 0 3944 // CHECK5-NEXT: [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 3945 // CHECK5-NEXT: ret i32 [[TMP45]] 3946 // 3947 // 3948 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35 3949 // CHECK5-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 3950 // CHECK5-NEXT: entry: 3951 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 3952 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 3953 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 3954 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 3955 // CHECK5-NEXT: ret void 3956 // 3957 // 3958 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined. 3959 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 3960 // CHECK5-NEXT: entry: 3961 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3962 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3963 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 3964 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3965 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3966 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3967 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3968 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3969 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3970 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3971 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3972 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3973 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 3974 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 3975 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3976 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 3977 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3978 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3979 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3980 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3981 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3982 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3983 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 3984 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3985 // CHECK5: cond.true: 3986 // CHECK5-NEXT: br label [[COND_END:%.*]] 3987 // CHECK5: cond.false: 3988 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3989 // CHECK5-NEXT: br label [[COND_END]] 3990 // CHECK5: cond.end: 3991 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3992 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3993 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3994 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3995 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3996 // CHECK5: omp.inner.for.cond: 3997 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3998 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3999 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4000 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4001 // CHECK5: omp.inner.for.body: 4002 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4003 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 4004 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4005 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 4006 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 4007 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4008 // CHECK5: omp.inner.for.inc: 4009 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4010 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4011 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 4012 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4013 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 4014 // CHECK5: omp.inner.for.end: 4015 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4016 // CHECK5: omp.loop.exit: 4017 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 4018 // CHECK5-NEXT: ret void 4019 // 4020 // 4021 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..1 4022 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 4023 // CHECK5-NEXT: entry: 4024 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4025 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4026 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4027 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4028 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4029 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4030 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 4031 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4032 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4033 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4034 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4035 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 4036 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4037 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4038 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4039 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4040 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4041 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4042 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4043 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 4044 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4045 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 4046 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4047 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 4048 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 4049 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 4050 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4051 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4052 // CHECK5-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4053 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 4054 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4055 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4056 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 4057 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4058 // CHECK5: cond.true: 4059 // CHECK5-NEXT: br label [[COND_END:%.*]] 4060 // CHECK5: cond.false: 4061 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4062 // CHECK5-NEXT: br label [[COND_END]] 4063 // CHECK5: cond.end: 4064 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 4065 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4066 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4067 // CHECK5-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 4068 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4069 // CHECK5: omp.inner.for.cond: 4070 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4071 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4072 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 4073 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4074 // CHECK5: omp.inner.for.body: 4075 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4076 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 4077 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4078 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4079 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 4080 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 4081 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 4082 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 4083 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4084 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4085 // CHECK5: omp.body.continue: 4086 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4087 // CHECK5: omp.inner.for.inc: 4088 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4089 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 4090 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 4091 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 4092 // CHECK5: omp.inner.for.end: 4093 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4094 // CHECK5: omp.loop.exit: 4095 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 4096 // CHECK5-NEXT: ret void 4097 // 4098 // 4099 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40 4100 // CHECK5-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 4101 // CHECK5-NEXT: entry: 4102 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4103 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4104 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4105 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 4106 // CHECK5-NEXT: ret void 4107 // 4108 // 4109 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..2 4110 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 4111 // CHECK5-NEXT: entry: 4112 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4113 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4114 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4115 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4116 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 4117 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4118 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4119 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4120 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4121 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 4122 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4123 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4124 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4125 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4126 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4127 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 4128 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4129 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4130 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4131 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 4132 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4133 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4134 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 4135 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4136 // CHECK5: cond.true: 4137 // CHECK5-NEXT: br label [[COND_END:%.*]] 4138 // CHECK5: cond.false: 4139 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4140 // CHECK5-NEXT: br label [[COND_END]] 4141 // CHECK5: cond.end: 4142 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4143 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4144 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4145 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 4146 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4147 // CHECK5: omp.inner.for.cond: 4148 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4149 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4150 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4151 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4152 // CHECK5: omp.inner.for.body: 4153 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4154 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 4155 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4156 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 4157 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 4158 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4159 // CHECK5: omp.inner.for.inc: 4160 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4161 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4162 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 4163 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4164 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 4165 // CHECK5: omp.inner.for.end: 4166 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4167 // CHECK5: omp.loop.exit: 4168 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 4169 // CHECK5-NEXT: ret void 4170 // 4171 // 4172 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..3 4173 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 4174 // CHECK5-NEXT: entry: 4175 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4176 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4177 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4178 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4179 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4180 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4181 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 4182 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4183 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4184 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4185 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4186 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 4187 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4188 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4189 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4190 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4191 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4192 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4193 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4194 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 4195 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4196 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 4197 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4198 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 4199 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 4200 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 4201 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4202 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4203 // CHECK5-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4204 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 4205 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4206 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4207 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 4208 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4209 // CHECK5: cond.true: 4210 // CHECK5-NEXT: br label [[COND_END:%.*]] 4211 // CHECK5: cond.false: 4212 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4213 // CHECK5-NEXT: br label [[COND_END]] 4214 // CHECK5: cond.end: 4215 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 4216 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4217 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4218 // CHECK5-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 4219 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4220 // CHECK5: omp.inner.for.cond: 4221 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4222 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4223 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 4224 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4225 // CHECK5: omp.inner.for.body: 4226 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4227 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 4228 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4229 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4230 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 4231 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 4232 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 4233 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 4234 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4235 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4236 // CHECK5: omp.body.continue: 4237 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4238 // CHECK5: omp.inner.for.inc: 4239 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4240 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 4241 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 4242 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 4243 // CHECK5: omp.inner.for.end: 4244 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4245 // CHECK5: omp.loop.exit: 4246 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 4247 // CHECK5-NEXT: ret void 4248 // 4249 // 4250 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45 4251 // CHECK5-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 4252 // CHECK5-NEXT: entry: 4253 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4254 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4255 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4256 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 4257 // CHECK5-NEXT: ret void 4258 // 4259 // 4260 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..6 4261 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 4262 // CHECK5-NEXT: entry: 4263 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4264 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4265 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4266 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4267 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 4268 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4269 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4270 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4271 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4272 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 4273 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4274 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4275 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4276 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4277 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4278 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 4279 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4280 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4281 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4282 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 4283 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4284 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4285 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 4286 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4287 // CHECK5: cond.true: 4288 // CHECK5-NEXT: br label [[COND_END:%.*]] 4289 // CHECK5: cond.false: 4290 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4291 // CHECK5-NEXT: br label [[COND_END]] 4292 // CHECK5: cond.end: 4293 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4294 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4295 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4296 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 4297 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4298 // CHECK5: omp.inner.for.cond: 4299 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4300 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4301 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4302 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4303 // CHECK5: omp.inner.for.body: 4304 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4305 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 4306 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4307 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 4308 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 4309 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4310 // CHECK5: omp.inner.for.inc: 4311 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4312 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4313 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 4314 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4315 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 4316 // CHECK5: omp.inner.for.end: 4317 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4318 // CHECK5: omp.loop.exit: 4319 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 4320 // CHECK5-NEXT: ret void 4321 // 4322 // 4323 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..7 4324 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 4325 // CHECK5-NEXT: entry: 4326 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4327 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4328 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4329 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4330 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4331 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4332 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 4333 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4334 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4335 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4336 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4337 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 4338 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4339 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4340 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4341 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4342 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4343 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4344 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4345 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 4346 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4347 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 4348 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4349 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 4350 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 4351 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 4352 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4353 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4354 // CHECK5-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4355 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 4356 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 4357 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 4358 // CHECK5: omp.dispatch.cond: 4359 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4360 // CHECK5-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4361 // CHECK5-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32 4362 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]] 4363 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4364 // CHECK5: cond.true: 4365 // CHECK5-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4366 // CHECK5-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 4367 // CHECK5-NEXT: br label [[COND_END:%.*]] 4368 // CHECK5: cond.false: 4369 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4370 // CHECK5-NEXT: br label [[COND_END]] 4371 // CHECK5: cond.end: 4372 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 4373 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4374 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4375 // CHECK5-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 4376 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4377 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4378 // CHECK5-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 4379 // CHECK5-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 4380 // CHECK5: omp.dispatch.body: 4381 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4382 // CHECK5: omp.inner.for.cond: 4383 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4384 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4385 // CHECK5-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 4386 // CHECK5-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4387 // CHECK5: omp.inner.for.body: 4388 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4389 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 4390 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4391 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4392 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 4393 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 4394 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64 4395 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 4396 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4397 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4398 // CHECK5: omp.body.continue: 4399 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4400 // CHECK5: omp.inner.for.inc: 4401 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4402 // CHECK5-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1 4403 // CHECK5-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 4404 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 4405 // CHECK5: omp.inner.for.end: 4406 // CHECK5-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 4407 // CHECK5: omp.dispatch.inc: 4408 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4409 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4410 // CHECK5-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 4411 // CHECK5-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4 4412 // CHECK5-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4413 // CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4414 // CHECK5-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 4415 // CHECK5-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4 4416 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND]] 4417 // CHECK5: omp.dispatch.end: 4418 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 4419 // CHECK5-NEXT: ret void 4420 // 4421 // 4422 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51 4423 // CHECK5-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 4424 // CHECK5-NEXT: entry: 4425 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4426 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4427 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4428 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 4429 // CHECK5-NEXT: ret void 4430 // 4431 // 4432 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..10 4433 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 4434 // CHECK5-NEXT: entry: 4435 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4436 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4437 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4438 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4439 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 4440 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4441 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4442 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4443 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4444 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 4445 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4446 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4447 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4448 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4449 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4450 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 4451 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4452 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4453 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4454 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 4455 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4456 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4457 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 4458 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4459 // CHECK5: cond.true: 4460 // CHECK5-NEXT: br label [[COND_END:%.*]] 4461 // CHECK5: cond.false: 4462 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4463 // CHECK5-NEXT: br label [[COND_END]] 4464 // CHECK5: cond.end: 4465 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4466 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4467 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4468 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 4469 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4470 // CHECK5: omp.inner.for.cond: 4471 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4472 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4473 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4474 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4475 // CHECK5: omp.inner.for.body: 4476 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4477 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 4478 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4479 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 4480 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 4481 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4482 // CHECK5: omp.inner.for.inc: 4483 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4484 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4485 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 4486 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4487 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 4488 // CHECK5: omp.inner.for.end: 4489 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4490 // CHECK5: omp.loop.exit: 4491 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 4492 // CHECK5-NEXT: ret void 4493 // 4494 // 4495 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..11 4496 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 4497 // CHECK5-NEXT: entry: 4498 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4499 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4500 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4501 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4502 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4503 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4504 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 4505 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4506 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4507 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4508 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4509 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 4510 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4511 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4512 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4513 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4514 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4515 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4516 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4517 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 4518 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4519 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 4520 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4521 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 4522 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 4523 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 4524 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4525 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4526 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4527 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4528 // CHECK5-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4529 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 4530 // CHECK5-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 4531 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 4532 // CHECK5: omp.dispatch.cond: 4533 // CHECK5-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 4534 // CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 4535 // CHECK5-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 4536 // CHECK5: omp.dispatch.body: 4537 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4538 // CHECK5-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 4539 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4540 // CHECK5: omp.inner.for.cond: 4541 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 4542 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10 4543 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 4544 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4545 // CHECK5: omp.inner.for.body: 4546 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 4547 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 4548 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4549 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !10 4550 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 4551 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !10 4552 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 4553 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 4554 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !10 4555 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4556 // CHECK5: omp.body.continue: 4557 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4558 // CHECK5: omp.inner.for.inc: 4559 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 4560 // CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 4561 // CHECK5-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 4562 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]] 4563 // CHECK5: omp.inner.for.end: 4564 // CHECK5-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 4565 // CHECK5: omp.dispatch.inc: 4566 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND]] 4567 // CHECK5: omp.dispatch.end: 4568 // CHECK5-NEXT: ret void 4569 // 4570 // 4571 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57 4572 // CHECK5-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 4573 // CHECK5-NEXT: entry: 4574 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4575 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4576 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4577 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 4578 // CHECK5-NEXT: ret void 4579 // 4580 // 4581 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..14 4582 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 4583 // CHECK5-NEXT: entry: 4584 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4585 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4586 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4587 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4588 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 4589 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4590 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4591 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4592 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4593 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 4594 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4595 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4596 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4597 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4598 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4599 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 4600 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4601 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4602 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4603 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 4604 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4605 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4606 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 4607 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4608 // CHECK5: cond.true: 4609 // CHECK5-NEXT: br label [[COND_END:%.*]] 4610 // CHECK5: cond.false: 4611 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4612 // CHECK5-NEXT: br label [[COND_END]] 4613 // CHECK5: cond.end: 4614 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4615 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4616 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4617 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 4618 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4619 // CHECK5: omp.inner.for.cond: 4620 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4621 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4622 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4623 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4624 // CHECK5: omp.inner.for.body: 4625 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4626 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 4627 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4628 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 4629 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 4630 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4631 // CHECK5: omp.inner.for.inc: 4632 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4633 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4634 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 4635 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4636 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 4637 // CHECK5: omp.inner.for.end: 4638 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4639 // CHECK5: omp.loop.exit: 4640 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 4641 // CHECK5-NEXT: ret void 4642 // 4643 // 4644 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..15 4645 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 4646 // CHECK5-NEXT: entry: 4647 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4648 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4649 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4650 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4651 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4652 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4653 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 4654 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4655 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4656 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4657 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4658 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 4659 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4660 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4661 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4662 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4663 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4664 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4665 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4666 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 4667 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4668 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 4669 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4670 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 4671 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 4672 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 4673 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4674 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4675 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4676 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4677 // CHECK5-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4678 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 4679 // CHECK5-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61) 4680 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 4681 // CHECK5: omp.dispatch.cond: 4682 // CHECK5-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 4683 // CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 4684 // CHECK5-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 4685 // CHECK5: omp.dispatch.body: 4686 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4687 // CHECK5-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 4688 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4689 // CHECK5: omp.inner.for.cond: 4690 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 4691 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13 4692 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 4693 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4694 // CHECK5: omp.inner.for.body: 4695 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 4696 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 4697 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4698 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13 4699 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 4700 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13 4701 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 4702 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 4703 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13 4704 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4705 // CHECK5: omp.body.continue: 4706 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4707 // CHECK5: omp.inner.for.inc: 4708 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 4709 // CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 4710 // CHECK5-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 4711 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 4712 // CHECK5: omp.inner.for.end: 4713 // CHECK5-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 4714 // CHECK5: omp.dispatch.inc: 4715 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND]] 4716 // CHECK5: omp.dispatch.end: 4717 // CHECK5-NEXT: ret void 4718 // 4719 // 4720 // CHECK5-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 4721 // CHECK5-SAME: () #[[ATTR3:[0-9]+]] { 4722 // CHECK5-NEXT: entry: 4723 // CHECK5-NEXT: call void @__tgt_register_requires(i64 1) 4724 // CHECK5-NEXT: ret void 4725 // 4726 // 4727 // CHECK6-LABEL: define {{[^@]+}}@_Z21teams_template_structv 4728 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] { 4729 // CHECK6-NEXT: entry: 4730 // CHECK6-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 4731 // CHECK6-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 4732 // CHECK6-NEXT: ret i32 [[CALL]] 4733 // 4734 // 4735 // CHECK6-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 4736 // CHECK6-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 4737 // CHECK6-NEXT: entry: 4738 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4739 // CHECK6-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 4740 // CHECK6-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 4741 // CHECK6-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 4742 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 4743 // CHECK6-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8 4744 // CHECK6-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8 4745 // CHECK6-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8 4746 // CHECK6-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 4747 // CHECK6-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8 4748 // CHECK6-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8 4749 // CHECK6-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8 4750 // CHECK6-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 4751 // CHECK6-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 8 4752 // CHECK6-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 8 4753 // CHECK6-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 8 4754 // CHECK6-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 4755 // CHECK6-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 8 4756 // CHECK6-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 8 4757 // CHECK6-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 8 4758 // CHECK6-NEXT: [[_TMP27:%.*]] = alloca i32, align 4 4759 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4760 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4761 // CHECK6-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 4762 // CHECK6-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4763 // CHECK6-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 4764 // CHECK6-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 4765 // CHECK6-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4766 // CHECK6-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 4767 // CHECK6-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8 4768 // CHECK6-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 4769 // CHECK6-NEXT: store i8* null, i8** [[TMP4]], align 8 4770 // CHECK6-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4771 // CHECK6-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4772 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123) 4773 // CHECK6-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4774 // CHECK6-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 4775 // CHECK6-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4776 // CHECK6: omp_offload.failed: 4777 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 4778 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT]] 4779 // CHECK6: omp_offload.cont: 4780 // CHECK6-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 4781 // CHECK6-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 4782 // CHECK6-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** 4783 // CHECK6-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8 4784 // CHECK6-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 4785 // CHECK6-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** 4786 // CHECK6-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8 4787 // CHECK6-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0 4788 // CHECK6-NEXT: store i8* null, i8** [[TMP13]], align 8 4789 // CHECK6-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 4790 // CHECK6-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 4791 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 4792 // CHECK6-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4793 // CHECK6-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 4794 // CHECK6-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 4795 // CHECK6: omp_offload.failed7: 4796 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]] 4797 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT8]] 4798 // CHECK6: omp_offload.cont8: 4799 // CHECK6-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 4800 // CHECK6-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 4801 // CHECK6-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 4802 // CHECK6-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8 4803 // CHECK6-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 4804 // CHECK6-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 4805 // CHECK6-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8 4806 // CHECK6-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0 4807 // CHECK6-NEXT: store i8* null, i8** [[TMP22]], align 8 4808 // CHECK6-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 4809 // CHECK6-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 4810 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 4811 // CHECK6-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4812 // CHECK6-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 4813 // CHECK6-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 4814 // CHECK6: omp_offload.failed14: 4815 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(%struct.SS* [[THIS1]]) #[[ATTR2]] 4816 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT15]] 4817 // CHECK6: omp_offload.cont15: 4818 // CHECK6-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 4819 // CHECK6-NEXT: [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 4820 // CHECK6-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS** 4821 // CHECK6-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 8 4822 // CHECK6-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 4823 // CHECK6-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]** 4824 // CHECK6-NEXT: store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 8 4825 // CHECK6-NEXT: [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i64 0, i64 0 4826 // CHECK6-NEXT: store i8* null, i8** [[TMP31]], align 8 4827 // CHECK6-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 4828 // CHECK6-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 4829 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 4830 // CHECK6-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4831 // CHECK6-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 4832 // CHECK6-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]] 4833 // CHECK6: omp_offload.failed21: 4834 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(%struct.SS* [[THIS1]]) #[[ATTR2]] 4835 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT22]] 4836 // CHECK6: omp_offload.cont22: 4837 // CHECK6-NEXT: [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 4838 // CHECK6-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 4839 // CHECK6-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS** 4840 // CHECK6-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 8 4841 // CHECK6-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 4842 // CHECK6-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]** 4843 // CHECK6-NEXT: store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 8 4844 // CHECK6-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 0 4845 // CHECK6-NEXT: store i8* null, i8** [[TMP40]], align 8 4846 // CHECK6-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 4847 // CHECK6-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 4848 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 4849 // CHECK6-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4850 // CHECK6-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 4851 // CHECK6-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]] 4852 // CHECK6: omp_offload.failed28: 4853 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(%struct.SS* [[THIS1]]) #[[ATTR2]] 4854 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT29]] 4855 // CHECK6: omp_offload.cont29: 4856 // CHECK6-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 4857 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 0 4858 // CHECK6-NEXT: [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 4859 // CHECK6-NEXT: ret i32 [[TMP45]] 4860 // 4861 // 4862 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35 4863 // CHECK6-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 4864 // CHECK6-NEXT: entry: 4865 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4866 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4867 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4868 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 4869 // CHECK6-NEXT: ret void 4870 // 4871 // 4872 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined. 4873 // CHECK6-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 4874 // CHECK6-NEXT: entry: 4875 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4876 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4877 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4878 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4879 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 4880 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4881 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4882 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4883 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4884 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 4885 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4886 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4887 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4888 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4889 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4890 // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 4891 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4892 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4893 // CHECK6-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4894 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 4895 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4896 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4897 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 4898 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4899 // CHECK6: cond.true: 4900 // CHECK6-NEXT: br label [[COND_END:%.*]] 4901 // CHECK6: cond.false: 4902 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4903 // CHECK6-NEXT: br label [[COND_END]] 4904 // CHECK6: cond.end: 4905 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4906 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4907 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4908 // CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 4909 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4910 // CHECK6: omp.inner.for.cond: 4911 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4912 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4913 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4914 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4915 // CHECK6: omp.inner.for.body: 4916 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4917 // CHECK6-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 4918 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4919 // CHECK6-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 4920 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 4921 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4922 // CHECK6: omp.inner.for.inc: 4923 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4924 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4925 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 4926 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4927 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 4928 // CHECK6: omp.inner.for.end: 4929 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4930 // CHECK6: omp.loop.exit: 4931 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 4932 // CHECK6-NEXT: ret void 4933 // 4934 // 4935 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..1 4936 // CHECK6-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 4937 // CHECK6-NEXT: entry: 4938 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4939 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4940 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4941 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4942 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4943 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4944 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 4945 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4946 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4947 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4948 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4949 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 4950 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4951 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4952 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4953 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4954 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4955 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4956 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4957 // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 4958 // CHECK6-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4959 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 4960 // CHECK6-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4961 // CHECK6-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 4962 // CHECK6-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 4963 // CHECK6-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 4964 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4965 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4966 // CHECK6-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4967 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 4968 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4969 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4970 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 4971 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4972 // CHECK6: cond.true: 4973 // CHECK6-NEXT: br label [[COND_END:%.*]] 4974 // CHECK6: cond.false: 4975 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4976 // CHECK6-NEXT: br label [[COND_END]] 4977 // CHECK6: cond.end: 4978 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 4979 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4980 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4981 // CHECK6-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 4982 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4983 // CHECK6: omp.inner.for.cond: 4984 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4985 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4986 // CHECK6-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 4987 // CHECK6-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4988 // CHECK6: omp.inner.for.body: 4989 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4990 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 4991 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4992 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4993 // CHECK6-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 4994 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 4995 // CHECK6-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 4996 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 4997 // CHECK6-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4998 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4999 // CHECK6: omp.body.continue: 5000 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5001 // CHECK6: omp.inner.for.inc: 5002 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5003 // CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 5004 // CHECK6-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 5005 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 5006 // CHECK6: omp.inner.for.end: 5007 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5008 // CHECK6: omp.loop.exit: 5009 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 5010 // CHECK6-NEXT: ret void 5011 // 5012 // 5013 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40 5014 // CHECK6-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 5015 // CHECK6-NEXT: entry: 5016 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 5017 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 5018 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 5019 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 5020 // CHECK6-NEXT: ret void 5021 // 5022 // 5023 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..2 5024 // CHECK6-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 5025 // CHECK6-NEXT: entry: 5026 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5027 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5028 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 5029 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5030 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 5031 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5032 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5033 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5034 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5035 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 5036 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5037 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5038 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 5039 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 5040 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 5041 // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 5042 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5043 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5044 // CHECK6-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5045 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 5046 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5047 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5048 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 5049 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5050 // CHECK6: cond.true: 5051 // CHECK6-NEXT: br label [[COND_END:%.*]] 5052 // CHECK6: cond.false: 5053 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5054 // CHECK6-NEXT: br label [[COND_END]] 5055 // CHECK6: cond.end: 5056 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 5057 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5058 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5059 // CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 5060 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5061 // CHECK6: omp.inner.for.cond: 5062 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5063 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5064 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5065 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5066 // CHECK6: omp.inner.for.body: 5067 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5068 // CHECK6-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 5069 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5070 // CHECK6-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 5071 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 5072 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5073 // CHECK6: omp.inner.for.inc: 5074 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5075 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5076 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 5077 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 5078 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 5079 // CHECK6: omp.inner.for.end: 5080 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5081 // CHECK6: omp.loop.exit: 5082 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 5083 // CHECK6-NEXT: ret void 5084 // 5085 // 5086 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..3 5087 // CHECK6-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 5088 // CHECK6-NEXT: entry: 5089 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5090 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5091 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5092 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5093 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 5094 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5095 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 5096 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5097 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5098 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5099 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5100 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 5101 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5102 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5103 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5104 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5105 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 5106 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 5107 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5108 // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 5109 // CHECK6-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5110 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 5111 // CHECK6-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5112 // CHECK6-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 5113 // CHECK6-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 5114 // CHECK6-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 5115 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5116 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5117 // CHECK6-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5118 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 5119 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5120 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5121 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 5122 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5123 // CHECK6: cond.true: 5124 // CHECK6-NEXT: br label [[COND_END:%.*]] 5125 // CHECK6: cond.false: 5126 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5127 // CHECK6-NEXT: br label [[COND_END]] 5128 // CHECK6: cond.end: 5129 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 5130 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5131 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5132 // CHECK6-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 5133 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5134 // CHECK6: omp.inner.for.cond: 5135 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5136 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5137 // CHECK6-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 5138 // CHECK6-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5139 // CHECK6: omp.inner.for.body: 5140 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5141 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 5142 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5143 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4 5144 // CHECK6-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 5145 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 5146 // CHECK6-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 5147 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 5148 // CHECK6-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 5149 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5150 // CHECK6: omp.body.continue: 5151 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5152 // CHECK6: omp.inner.for.inc: 5153 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5154 // CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 5155 // CHECK6-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 5156 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 5157 // CHECK6: omp.inner.for.end: 5158 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5159 // CHECK6: omp.loop.exit: 5160 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 5161 // CHECK6-NEXT: ret void 5162 // 5163 // 5164 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45 5165 // CHECK6-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 5166 // CHECK6-NEXT: entry: 5167 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 5168 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 5169 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 5170 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 5171 // CHECK6-NEXT: ret void 5172 // 5173 // 5174 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..6 5175 // CHECK6-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 5176 // CHECK6-NEXT: entry: 5177 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5178 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5179 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 5180 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5181 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 5182 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5183 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5184 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5185 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5186 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 5187 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5188 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5189 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 5190 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 5191 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 5192 // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 5193 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5194 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5195 // CHECK6-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5196 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 5197 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5198 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5199 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 5200 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5201 // CHECK6: cond.true: 5202 // CHECK6-NEXT: br label [[COND_END:%.*]] 5203 // CHECK6: cond.false: 5204 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5205 // CHECK6-NEXT: br label [[COND_END]] 5206 // CHECK6: cond.end: 5207 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 5208 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5209 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5210 // CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 5211 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5212 // CHECK6: omp.inner.for.cond: 5213 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5214 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5215 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5216 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5217 // CHECK6: omp.inner.for.body: 5218 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5219 // CHECK6-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 5220 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5221 // CHECK6-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 5222 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 5223 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5224 // CHECK6: omp.inner.for.inc: 5225 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5226 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5227 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 5228 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 5229 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 5230 // CHECK6: omp.inner.for.end: 5231 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5232 // CHECK6: omp.loop.exit: 5233 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 5234 // CHECK6-NEXT: ret void 5235 // 5236 // 5237 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..7 5238 // CHECK6-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 5239 // CHECK6-NEXT: entry: 5240 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5241 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5242 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5243 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5244 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 5245 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5246 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 5247 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5248 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5249 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5250 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5251 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 5252 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5253 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5254 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5255 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5256 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 5257 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 5258 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5259 // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 5260 // CHECK6-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5261 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 5262 // CHECK6-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5263 // CHECK6-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 5264 // CHECK6-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 5265 // CHECK6-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 5266 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5267 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5268 // CHECK6-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5269 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 5270 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 5271 // CHECK6-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 5272 // CHECK6: omp.dispatch.cond: 5273 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5274 // CHECK6-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5275 // CHECK6-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32 5276 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]] 5277 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5278 // CHECK6: cond.true: 5279 // CHECK6-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5280 // CHECK6-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 5281 // CHECK6-NEXT: br label [[COND_END:%.*]] 5282 // CHECK6: cond.false: 5283 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5284 // CHECK6-NEXT: br label [[COND_END]] 5285 // CHECK6: cond.end: 5286 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 5287 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5288 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5289 // CHECK6-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 5290 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5291 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5292 // CHECK6-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 5293 // CHECK6-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 5294 // CHECK6: omp.dispatch.body: 5295 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5296 // CHECK6: omp.inner.for.cond: 5297 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5298 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5299 // CHECK6-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 5300 // CHECK6-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5301 // CHECK6: omp.inner.for.body: 5302 // CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5303 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 5304 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5305 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4 5306 // CHECK6-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 5307 // CHECK6-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 5308 // CHECK6-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64 5309 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 5310 // CHECK6-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 5311 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5312 // CHECK6: omp.body.continue: 5313 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5314 // CHECK6: omp.inner.for.inc: 5315 // CHECK6-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5316 // CHECK6-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1 5317 // CHECK6-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 5318 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 5319 // CHECK6: omp.inner.for.end: 5320 // CHECK6-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 5321 // CHECK6: omp.dispatch.inc: 5322 // CHECK6-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5323 // CHECK6-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5324 // CHECK6-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 5325 // CHECK6-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4 5326 // CHECK6-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5327 // CHECK6-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5328 // CHECK6-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 5329 // CHECK6-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4 5330 // CHECK6-NEXT: br label [[OMP_DISPATCH_COND]] 5331 // CHECK6: omp.dispatch.end: 5332 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 5333 // CHECK6-NEXT: ret void 5334 // 5335 // 5336 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51 5337 // CHECK6-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 5338 // CHECK6-NEXT: entry: 5339 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 5340 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 5341 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 5342 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 5343 // CHECK6-NEXT: ret void 5344 // 5345 // 5346 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..10 5347 // CHECK6-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 5348 // CHECK6-NEXT: entry: 5349 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5350 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5351 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 5352 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5353 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 5354 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5355 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5356 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5357 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5358 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 5359 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5360 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5361 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 5362 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 5363 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 5364 // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 5365 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5366 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5367 // CHECK6-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5368 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 5369 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5370 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5371 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 5372 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5373 // CHECK6: cond.true: 5374 // CHECK6-NEXT: br label [[COND_END:%.*]] 5375 // CHECK6: cond.false: 5376 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5377 // CHECK6-NEXT: br label [[COND_END]] 5378 // CHECK6: cond.end: 5379 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 5380 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5381 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5382 // CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 5383 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5384 // CHECK6: omp.inner.for.cond: 5385 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5386 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5387 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5388 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5389 // CHECK6: omp.inner.for.body: 5390 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5391 // CHECK6-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 5392 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5393 // CHECK6-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 5394 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 5395 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5396 // CHECK6: omp.inner.for.inc: 5397 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5398 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5399 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 5400 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 5401 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 5402 // CHECK6: omp.inner.for.end: 5403 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5404 // CHECK6: omp.loop.exit: 5405 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 5406 // CHECK6-NEXT: ret void 5407 // 5408 // 5409 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..11 5410 // CHECK6-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 5411 // CHECK6-NEXT: entry: 5412 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5413 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5414 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5415 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5416 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 5417 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5418 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 5419 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5420 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5421 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5422 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5423 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 5424 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5425 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5426 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5427 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5428 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 5429 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 5430 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5431 // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 5432 // CHECK6-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5433 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 5434 // CHECK6-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5435 // CHECK6-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 5436 // CHECK6-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 5437 // CHECK6-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 5438 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5439 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5440 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5441 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5442 // CHECK6-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5443 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 5444 // CHECK6-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 5445 // CHECK6-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 5446 // CHECK6: omp.dispatch.cond: 5447 // CHECK6-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 5448 // CHECK6-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 5449 // CHECK6-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 5450 // CHECK6: omp.dispatch.body: 5451 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5452 // CHECK6-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 5453 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5454 // CHECK6: omp.inner.for.cond: 5455 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 5456 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10 5457 // CHECK6-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 5458 // CHECK6-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5459 // CHECK6: omp.inner.for.body: 5460 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 5461 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 5462 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5463 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !10 5464 // CHECK6-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 5465 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !10 5466 // CHECK6-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 5467 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 5468 // CHECK6-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !10 5469 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5470 // CHECK6: omp.body.continue: 5471 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5472 // CHECK6: omp.inner.for.inc: 5473 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 5474 // CHECK6-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 5475 // CHECK6-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 5476 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]] 5477 // CHECK6: omp.inner.for.end: 5478 // CHECK6-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 5479 // CHECK6: omp.dispatch.inc: 5480 // CHECK6-NEXT: br label [[OMP_DISPATCH_COND]] 5481 // CHECK6: omp.dispatch.end: 5482 // CHECK6-NEXT: ret void 5483 // 5484 // 5485 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57 5486 // CHECK6-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 5487 // CHECK6-NEXT: entry: 5488 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 5489 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 5490 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 5491 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 5492 // CHECK6-NEXT: ret void 5493 // 5494 // 5495 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..14 5496 // CHECK6-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 5497 // CHECK6-NEXT: entry: 5498 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5499 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5500 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 5501 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5502 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 5503 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5504 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5505 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5506 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5507 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 5508 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5509 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5510 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 5511 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 5512 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 5513 // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 5514 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5515 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5516 // CHECK6-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5517 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 5518 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5519 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5520 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 5521 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5522 // CHECK6: cond.true: 5523 // CHECK6-NEXT: br label [[COND_END:%.*]] 5524 // CHECK6: cond.false: 5525 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5526 // CHECK6-NEXT: br label [[COND_END]] 5527 // CHECK6: cond.end: 5528 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 5529 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5530 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5531 // CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 5532 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5533 // CHECK6: omp.inner.for.cond: 5534 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5535 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5536 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5537 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5538 // CHECK6: omp.inner.for.body: 5539 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5540 // CHECK6-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 5541 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5542 // CHECK6-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 5543 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 5544 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5545 // CHECK6: omp.inner.for.inc: 5546 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5547 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5548 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 5549 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 5550 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 5551 // CHECK6: omp.inner.for.end: 5552 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5553 // CHECK6: omp.loop.exit: 5554 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 5555 // CHECK6-NEXT: ret void 5556 // 5557 // 5558 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..15 5559 // CHECK6-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 5560 // CHECK6-NEXT: entry: 5561 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5562 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5563 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5564 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5565 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 5566 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5567 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 5568 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5569 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5570 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5571 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5572 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 5573 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5574 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5575 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5576 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5577 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 5578 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 5579 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5580 // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 5581 // CHECK6-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5582 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 5583 // CHECK6-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5584 // CHECK6-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 5585 // CHECK6-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 5586 // CHECK6-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 5587 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5588 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5589 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5590 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5591 // CHECK6-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5592 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 5593 // CHECK6-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61) 5594 // CHECK6-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 5595 // CHECK6: omp.dispatch.cond: 5596 // CHECK6-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 5597 // CHECK6-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 5598 // CHECK6-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 5599 // CHECK6: omp.dispatch.body: 5600 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5601 // CHECK6-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 5602 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5603 // CHECK6: omp.inner.for.cond: 5604 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 5605 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13 5606 // CHECK6-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 5607 // CHECK6-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5608 // CHECK6: omp.inner.for.body: 5609 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 5610 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 5611 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5612 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13 5613 // CHECK6-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 5614 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13 5615 // CHECK6-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 5616 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 5617 // CHECK6-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13 5618 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5619 // CHECK6: omp.body.continue: 5620 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5621 // CHECK6: omp.inner.for.inc: 5622 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 5623 // CHECK6-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 5624 // CHECK6-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 5625 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 5626 // CHECK6: omp.inner.for.end: 5627 // CHECK6-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 5628 // CHECK6: omp.dispatch.inc: 5629 // CHECK6-NEXT: br label [[OMP_DISPATCH_COND]] 5630 // CHECK6: omp.dispatch.end: 5631 // CHECK6-NEXT: ret void 5632 // 5633 // 5634 // CHECK6-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 5635 // CHECK6-SAME: () #[[ATTR3:[0-9]+]] { 5636 // CHECK6-NEXT: entry: 5637 // CHECK6-NEXT: call void @__tgt_register_requires(i64 1) 5638 // CHECK6-NEXT: ret void 5639 // 5640 // 5641 // CHECK7-LABEL: define {{[^@]+}}@_Z21teams_template_structv 5642 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { 5643 // CHECK7-NEXT: entry: 5644 // CHECK7-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 5645 // CHECK7-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 5646 // CHECK7-NEXT: ret i32 [[CALL]] 5647 // 5648 // 5649 // CHECK7-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 5650 // CHECK7-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 5651 // CHECK7-NEXT: entry: 5652 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 5653 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 5654 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 5655 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 5656 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 5657 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4 5658 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4 5659 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4 5660 // CHECK7-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 5661 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4 5662 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4 5663 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4 5664 // CHECK7-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 5665 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 4 5666 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 4 5667 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 4 5668 // CHECK7-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 5669 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 4 5670 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 4 5671 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 4 5672 // CHECK7-NEXT: [[_TMP27:%.*]] = alloca i32, align 4 5673 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 5674 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 5675 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 5676 // CHECK7-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 5677 // CHECK7-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 5678 // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4 5679 // CHECK7-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 5680 // CHECK7-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 5681 // CHECK7-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4 5682 // CHECK7-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 5683 // CHECK7-NEXT: store i8* null, i8** [[TMP4]], align 4 5684 // CHECK7-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 5685 // CHECK7-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 5686 // CHECK7-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123) 5687 // CHECK7-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 5688 // CHECK7-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 5689 // CHECK7-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 5690 // CHECK7: omp_offload.failed: 5691 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 5692 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT]] 5693 // CHECK7: omp_offload.cont: 5694 // CHECK7-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 5695 // CHECK7-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 5696 // CHECK7-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** 5697 // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4 5698 // CHECK7-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 5699 // CHECK7-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** 5700 // CHECK7-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4 5701 // CHECK7-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0 5702 // CHECK7-NEXT: store i8* null, i8** [[TMP13]], align 4 5703 // CHECK7-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 5704 // CHECK7-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 5705 // CHECK7-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 5706 // CHECK7-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 5707 // CHECK7-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 5708 // CHECK7-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 5709 // CHECK7: omp_offload.failed7: 5710 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]] 5711 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT8]] 5712 // CHECK7: omp_offload.cont8: 5713 // CHECK7-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 5714 // CHECK7-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 5715 // CHECK7-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 5716 // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4 5717 // CHECK7-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 5718 // CHECK7-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 5719 // CHECK7-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4 5720 // CHECK7-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0 5721 // CHECK7-NEXT: store i8* null, i8** [[TMP22]], align 4 5722 // CHECK7-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 5723 // CHECK7-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 5724 // CHECK7-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 5725 // CHECK7-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 5726 // CHECK7-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 5727 // CHECK7-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 5728 // CHECK7: omp_offload.failed14: 5729 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(%struct.SS* [[THIS1]]) #[[ATTR2]] 5730 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT15]] 5731 // CHECK7: omp_offload.cont15: 5732 // CHECK7-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 5733 // CHECK7-NEXT: [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 5734 // CHECK7-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS** 5735 // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 4 5736 // CHECK7-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 5737 // CHECK7-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]** 5738 // CHECK7-NEXT: store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 4 5739 // CHECK7-NEXT: [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 0 5740 // CHECK7-NEXT: store i8* null, i8** [[TMP31]], align 4 5741 // CHECK7-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 5742 // CHECK7-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 5743 // CHECK7-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 5744 // CHECK7-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 5745 // CHECK7-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 5746 // CHECK7-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]] 5747 // CHECK7: omp_offload.failed21: 5748 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(%struct.SS* [[THIS1]]) #[[ATTR2]] 5749 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT22]] 5750 // CHECK7: omp_offload.cont22: 5751 // CHECK7-NEXT: [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 5752 // CHECK7-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 5753 // CHECK7-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS** 5754 // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 4 5755 // CHECK7-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 5756 // CHECK7-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]** 5757 // CHECK7-NEXT: store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 4 5758 // CHECK7-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 0 5759 // CHECK7-NEXT: store i8* null, i8** [[TMP40]], align 4 5760 // CHECK7-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 5761 // CHECK7-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 5762 // CHECK7-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 5763 // CHECK7-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 5764 // CHECK7-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 5765 // CHECK7-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]] 5766 // CHECK7: omp_offload.failed28: 5767 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(%struct.SS* [[THIS1]]) #[[ATTR2]] 5768 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT29]] 5769 // CHECK7: omp_offload.cont29: 5770 // CHECK7-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 5771 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i32 0, i32 0 5772 // CHECK7-NEXT: [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 5773 // CHECK7-NEXT: ret i32 [[TMP45]] 5774 // 5775 // 5776 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35 5777 // CHECK7-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 5778 // CHECK7-NEXT: entry: 5779 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 5780 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 5781 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 5782 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 5783 // CHECK7-NEXT: ret void 5784 // 5785 // 5786 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined. 5787 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 5788 // CHECK7-NEXT: entry: 5789 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5790 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5791 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 5792 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5793 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 5794 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5795 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5796 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5797 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5798 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 5799 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5800 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5801 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 5802 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 5803 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 5804 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 5805 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5806 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5807 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5808 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 5809 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5810 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5811 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 5812 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5813 // CHECK7: cond.true: 5814 // CHECK7-NEXT: br label [[COND_END:%.*]] 5815 // CHECK7: cond.false: 5816 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5817 // CHECK7-NEXT: br label [[COND_END]] 5818 // CHECK7: cond.end: 5819 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 5820 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5821 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5822 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 5823 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5824 // CHECK7: omp.inner.for.cond: 5825 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5826 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5827 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5828 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5829 // CHECK7: omp.inner.for.body: 5830 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5831 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5832 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 5833 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5834 // CHECK7: omp.inner.for.inc: 5835 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5836 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5837 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 5838 // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 5839 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]] 5840 // CHECK7: omp.inner.for.end: 5841 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5842 // CHECK7: omp.loop.exit: 5843 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 5844 // CHECK7-NEXT: ret void 5845 // 5846 // 5847 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..1 5848 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 5849 // CHECK7-NEXT: entry: 5850 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5851 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5852 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 5853 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 5854 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 5855 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5856 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 5857 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5858 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5859 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5860 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5861 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 5862 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5863 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5864 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 5865 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 5866 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 5867 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 5868 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5869 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 5870 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 5871 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 5872 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 5873 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 5874 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5875 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5876 // CHECK7-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5877 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 5878 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5879 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5880 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 5881 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5882 // CHECK7: cond.true: 5883 // CHECK7-NEXT: br label [[COND_END:%.*]] 5884 // CHECK7: cond.false: 5885 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5886 // CHECK7-NEXT: br label [[COND_END]] 5887 // CHECK7: cond.end: 5888 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 5889 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5890 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5891 // CHECK7-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 5892 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5893 // CHECK7: omp.inner.for.cond: 5894 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5895 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5896 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 5897 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5898 // CHECK7: omp.inner.for.body: 5899 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5900 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 5901 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5902 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4 5903 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 5904 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 5905 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]] 5906 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 5907 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5908 // CHECK7: omp.body.continue: 5909 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5910 // CHECK7: omp.inner.for.inc: 5911 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5912 // CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 5913 // CHECK7-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 5914 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]] 5915 // CHECK7: omp.inner.for.end: 5916 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5917 // CHECK7: omp.loop.exit: 5918 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 5919 // CHECK7-NEXT: ret void 5920 // 5921 // 5922 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40 5923 // CHECK7-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 5924 // CHECK7-NEXT: entry: 5925 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 5926 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 5927 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 5928 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 5929 // CHECK7-NEXT: ret void 5930 // 5931 // 5932 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..2 5933 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 5934 // CHECK7-NEXT: entry: 5935 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5936 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5937 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 5938 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5939 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 5940 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5941 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5942 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5943 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5944 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 5945 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5946 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5947 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 5948 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 5949 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 5950 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 5951 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5952 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5953 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5954 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 5955 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5956 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5957 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 5958 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5959 // CHECK7: cond.true: 5960 // CHECK7-NEXT: br label [[COND_END:%.*]] 5961 // CHECK7: cond.false: 5962 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5963 // CHECK7-NEXT: br label [[COND_END]] 5964 // CHECK7: cond.end: 5965 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 5966 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5967 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5968 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 5969 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5970 // CHECK7: omp.inner.for.cond: 5971 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5972 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5973 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5974 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5975 // CHECK7: omp.inner.for.body: 5976 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5977 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5978 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 5979 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5980 // CHECK7: omp.inner.for.inc: 5981 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5982 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5983 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 5984 // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 5985 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]] 5986 // CHECK7: omp.inner.for.end: 5987 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5988 // CHECK7: omp.loop.exit: 5989 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 5990 // CHECK7-NEXT: ret void 5991 // 5992 // 5993 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..3 5994 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 5995 // CHECK7-NEXT: entry: 5996 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5997 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5998 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 5999 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 6000 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 6001 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6002 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 6003 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6004 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6005 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6006 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6007 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 6008 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6009 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6010 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6011 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6012 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 6013 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 6014 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6015 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 6016 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6017 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6018 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 6019 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 6020 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6021 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6022 // CHECK7-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6023 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 6024 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6025 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6026 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 6027 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6028 // CHECK7: cond.true: 6029 // CHECK7-NEXT: br label [[COND_END:%.*]] 6030 // CHECK7: cond.false: 6031 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6032 // CHECK7-NEXT: br label [[COND_END]] 6033 // CHECK7: cond.end: 6034 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 6035 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 6036 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6037 // CHECK7-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 6038 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6039 // CHECK7: omp.inner.for.cond: 6040 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6041 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6042 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 6043 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6044 // CHECK7: omp.inner.for.body: 6045 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6046 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 6047 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6048 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4 6049 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 6050 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 6051 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]] 6052 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 6053 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6054 // CHECK7: omp.body.continue: 6055 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6056 // CHECK7: omp.inner.for.inc: 6057 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6058 // CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 6059 // CHECK7-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 6060 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]] 6061 // CHECK7: omp.inner.for.end: 6062 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6063 // CHECK7: omp.loop.exit: 6064 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 6065 // CHECK7-NEXT: ret void 6066 // 6067 // 6068 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45 6069 // CHECK7-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 6070 // CHECK7-NEXT: entry: 6071 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 6072 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 6073 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 6074 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 6075 // CHECK7-NEXT: ret void 6076 // 6077 // 6078 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..6 6079 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 6080 // CHECK7-NEXT: entry: 6081 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6082 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6083 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 6084 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6085 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 6086 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6087 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6088 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6089 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6090 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 6091 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6092 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6093 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 6094 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 6095 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6096 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 6097 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6098 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6099 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6100 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 6101 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6102 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6103 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 6104 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6105 // CHECK7: cond.true: 6106 // CHECK7-NEXT: br label [[COND_END:%.*]] 6107 // CHECK7: cond.false: 6108 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6109 // CHECK7-NEXT: br label [[COND_END]] 6110 // CHECK7: cond.end: 6111 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 6112 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 6113 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6114 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 6115 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6116 // CHECK7: omp.inner.for.cond: 6117 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6118 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6119 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 6120 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6121 // CHECK7: omp.inner.for.body: 6122 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6123 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6124 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 6125 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6126 // CHECK7: omp.inner.for.inc: 6127 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6128 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6129 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 6130 // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 6131 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]] 6132 // CHECK7: omp.inner.for.end: 6133 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6134 // CHECK7: omp.loop.exit: 6135 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 6136 // CHECK7-NEXT: ret void 6137 // 6138 // 6139 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..7 6140 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 6141 // CHECK7-NEXT: entry: 6142 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6143 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6144 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 6145 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 6146 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 6147 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6148 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 6149 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6150 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6151 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6152 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6153 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 6154 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6155 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6156 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6157 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6158 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 6159 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 6160 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6161 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 6162 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6163 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6164 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 6165 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 6166 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6167 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6168 // CHECK7-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6169 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 6170 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 6171 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 6172 // CHECK7: omp.dispatch.cond: 6173 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6174 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6175 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]] 6176 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6177 // CHECK7: cond.true: 6178 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6179 // CHECK7-NEXT: br label [[COND_END:%.*]] 6180 // CHECK7: cond.false: 6181 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6182 // CHECK7-NEXT: br label [[COND_END]] 6183 // CHECK7: cond.end: 6184 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 6185 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 6186 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6187 // CHECK7-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 6188 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6189 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6190 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 6191 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 6192 // CHECK7: omp.dispatch.body: 6193 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6194 // CHECK7: omp.inner.for.cond: 6195 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6196 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6197 // CHECK7-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 6198 // CHECK7-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6199 // CHECK7: omp.inner.for.body: 6200 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6201 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 6202 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6203 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4 6204 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 6205 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 6206 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP15]] 6207 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 6208 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6209 // CHECK7: omp.body.continue: 6210 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6211 // CHECK7: omp.inner.for.inc: 6212 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6213 // CHECK7-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1 6214 // CHECK7-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 6215 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]] 6216 // CHECK7: omp.inner.for.end: 6217 // CHECK7-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 6218 // CHECK7: omp.dispatch.inc: 6219 // CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6220 // CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6221 // CHECK7-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 6222 // CHECK7-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 6223 // CHECK7-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6224 // CHECK7-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6225 // CHECK7-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 6226 // CHECK7-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 6227 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND]] 6228 // CHECK7: omp.dispatch.end: 6229 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 6230 // CHECK7-NEXT: ret void 6231 // 6232 // 6233 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51 6234 // CHECK7-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 6235 // CHECK7-NEXT: entry: 6236 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 6237 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 6238 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 6239 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 6240 // CHECK7-NEXT: ret void 6241 // 6242 // 6243 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..10 6244 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 6245 // CHECK7-NEXT: entry: 6246 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6247 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6248 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 6249 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6250 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 6251 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6252 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6253 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6254 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6255 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 6256 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6257 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6258 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 6259 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 6260 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6261 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 6262 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6263 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6264 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6265 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 6266 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6267 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6268 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 6269 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6270 // CHECK7: cond.true: 6271 // CHECK7-NEXT: br label [[COND_END:%.*]] 6272 // CHECK7: cond.false: 6273 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6274 // CHECK7-NEXT: br label [[COND_END]] 6275 // CHECK7: cond.end: 6276 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 6277 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 6278 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6279 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 6280 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6281 // CHECK7: omp.inner.for.cond: 6282 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6283 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6284 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 6285 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6286 // CHECK7: omp.inner.for.body: 6287 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6288 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6289 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 6290 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6291 // CHECK7: omp.inner.for.inc: 6292 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6293 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6294 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 6295 // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 6296 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]] 6297 // CHECK7: omp.inner.for.end: 6298 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6299 // CHECK7: omp.loop.exit: 6300 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 6301 // CHECK7-NEXT: ret void 6302 // 6303 // 6304 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..11 6305 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 6306 // CHECK7-NEXT: entry: 6307 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6308 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6309 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 6310 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 6311 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 6312 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6313 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 6314 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6315 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6316 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6317 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6318 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 6319 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6320 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6321 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6322 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6323 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 6324 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 6325 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6326 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 6327 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6328 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6329 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 6330 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 6331 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6332 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6333 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6334 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6335 // CHECK7-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6336 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 6337 // CHECK7-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 6338 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 6339 // CHECK7: omp.dispatch.cond: 6340 // CHECK7-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 6341 // CHECK7-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 6342 // CHECK7-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 6343 // CHECK7: omp.dispatch.body: 6344 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6345 // CHECK7-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 6346 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6347 // CHECK7: omp.inner.for.cond: 6348 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 6349 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11 6350 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 6351 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6352 // CHECK7: omp.inner.for.body: 6353 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 6354 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 6355 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6356 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !11 6357 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 6358 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11 6359 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]] 6360 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !11 6361 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6362 // CHECK7: omp.body.continue: 6363 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6364 // CHECK7: omp.inner.for.inc: 6365 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 6366 // CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 6367 // CHECK7-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 6368 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]] 6369 // CHECK7: omp.inner.for.end: 6370 // CHECK7-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 6371 // CHECK7: omp.dispatch.inc: 6372 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND]] 6373 // CHECK7: omp.dispatch.end: 6374 // CHECK7-NEXT: ret void 6375 // 6376 // 6377 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57 6378 // CHECK7-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 6379 // CHECK7-NEXT: entry: 6380 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 6381 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 6382 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 6383 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 6384 // CHECK7-NEXT: ret void 6385 // 6386 // 6387 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..14 6388 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 6389 // CHECK7-NEXT: entry: 6390 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6391 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6392 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 6393 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6394 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 6395 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6396 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6397 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6398 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6399 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 6400 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6401 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6402 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 6403 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 6404 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6405 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 6406 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6407 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6408 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6409 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 6410 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6411 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6412 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 6413 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6414 // CHECK7: cond.true: 6415 // CHECK7-NEXT: br label [[COND_END:%.*]] 6416 // CHECK7: cond.false: 6417 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6418 // CHECK7-NEXT: br label [[COND_END]] 6419 // CHECK7: cond.end: 6420 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 6421 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 6422 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6423 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 6424 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6425 // CHECK7: omp.inner.for.cond: 6426 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6427 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6428 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 6429 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6430 // CHECK7: omp.inner.for.body: 6431 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6432 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6433 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 6434 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6435 // CHECK7: omp.inner.for.inc: 6436 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6437 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6438 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 6439 // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 6440 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]] 6441 // CHECK7: omp.inner.for.end: 6442 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6443 // CHECK7: omp.loop.exit: 6444 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 6445 // CHECK7-NEXT: ret void 6446 // 6447 // 6448 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..15 6449 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 6450 // CHECK7-NEXT: entry: 6451 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6452 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6453 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 6454 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 6455 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 6456 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6457 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 6458 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6459 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6460 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6461 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6462 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 6463 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6464 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6465 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6466 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6467 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 6468 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 6469 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6470 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 6471 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6472 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6473 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 6474 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 6475 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6476 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6477 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6478 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6479 // CHECK7-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6480 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 6481 // CHECK7-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61) 6482 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 6483 // CHECK7: omp.dispatch.cond: 6484 // CHECK7-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 6485 // CHECK7-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 6486 // CHECK7-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 6487 // CHECK7: omp.dispatch.body: 6488 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6489 // CHECK7-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 6490 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6491 // CHECK7: omp.inner.for.cond: 6492 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 6493 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14 6494 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 6495 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6496 // CHECK7: omp.inner.for.body: 6497 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 6498 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 6499 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6500 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14 6501 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 6502 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !14 6503 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]] 6504 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !14 6505 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6506 // CHECK7: omp.body.continue: 6507 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6508 // CHECK7: omp.inner.for.inc: 6509 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 6510 // CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 6511 // CHECK7-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 6512 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] 6513 // CHECK7: omp.inner.for.end: 6514 // CHECK7-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 6515 // CHECK7: omp.dispatch.inc: 6516 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND]] 6517 // CHECK7: omp.dispatch.end: 6518 // CHECK7-NEXT: ret void 6519 // 6520 // 6521 // CHECK7-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 6522 // CHECK7-SAME: () #[[ATTR3:[0-9]+]] { 6523 // CHECK7-NEXT: entry: 6524 // CHECK7-NEXT: call void @__tgt_register_requires(i64 1) 6525 // CHECK7-NEXT: ret void 6526 // 6527 // 6528 // CHECK8-LABEL: define {{[^@]+}}@_Z21teams_template_structv 6529 // CHECK8-SAME: () #[[ATTR0:[0-9]+]] { 6530 // CHECK8-NEXT: entry: 6531 // CHECK8-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 6532 // CHECK8-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 6533 // CHECK8-NEXT: ret i32 [[CALL]] 6534 // 6535 // 6536 // CHECK8-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 6537 // CHECK8-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 6538 // CHECK8-NEXT: entry: 6539 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 6540 // CHECK8-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 6541 // CHECK8-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 6542 // CHECK8-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 6543 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 6544 // CHECK8-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4 6545 // CHECK8-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4 6546 // CHECK8-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4 6547 // CHECK8-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 6548 // CHECK8-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4 6549 // CHECK8-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4 6550 // CHECK8-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4 6551 // CHECK8-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 6552 // CHECK8-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 4 6553 // CHECK8-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 4 6554 // CHECK8-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 4 6555 // CHECK8-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 6556 // CHECK8-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 4 6557 // CHECK8-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 4 6558 // CHECK8-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 4 6559 // CHECK8-NEXT: [[_TMP27:%.*]] = alloca i32, align 4 6560 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 6561 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 6562 // CHECK8-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 6563 // CHECK8-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 6564 // CHECK8-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 6565 // CHECK8-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4 6566 // CHECK8-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 6567 // CHECK8-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 6568 // CHECK8-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4 6569 // CHECK8-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 6570 // CHECK8-NEXT: store i8* null, i8** [[TMP4]], align 4 6571 // CHECK8-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 6572 // CHECK8-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 6573 // CHECK8-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123) 6574 // CHECK8-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 6575 // CHECK8-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 6576 // CHECK8-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 6577 // CHECK8: omp_offload.failed: 6578 // CHECK8-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 6579 // CHECK8-NEXT: br label [[OMP_OFFLOAD_CONT]] 6580 // CHECK8: omp_offload.cont: 6581 // CHECK8-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 6582 // CHECK8-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 6583 // CHECK8-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** 6584 // CHECK8-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4 6585 // CHECK8-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 6586 // CHECK8-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** 6587 // CHECK8-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4 6588 // CHECK8-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0 6589 // CHECK8-NEXT: store i8* null, i8** [[TMP13]], align 4 6590 // CHECK8-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 6591 // CHECK8-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 6592 // CHECK8-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 6593 // CHECK8-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 6594 // CHECK8-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 6595 // CHECK8-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 6596 // CHECK8: omp_offload.failed7: 6597 // CHECK8-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]] 6598 // CHECK8-NEXT: br label [[OMP_OFFLOAD_CONT8]] 6599 // CHECK8: omp_offload.cont8: 6600 // CHECK8-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 6601 // CHECK8-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 6602 // CHECK8-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 6603 // CHECK8-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4 6604 // CHECK8-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 6605 // CHECK8-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 6606 // CHECK8-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4 6607 // CHECK8-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0 6608 // CHECK8-NEXT: store i8* null, i8** [[TMP22]], align 4 6609 // CHECK8-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 6610 // CHECK8-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 6611 // CHECK8-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 6612 // CHECK8-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 6613 // CHECK8-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 6614 // CHECK8-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 6615 // CHECK8: omp_offload.failed14: 6616 // CHECK8-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(%struct.SS* [[THIS1]]) #[[ATTR2]] 6617 // CHECK8-NEXT: br label [[OMP_OFFLOAD_CONT15]] 6618 // CHECK8: omp_offload.cont15: 6619 // CHECK8-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 6620 // CHECK8-NEXT: [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 6621 // CHECK8-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS** 6622 // CHECK8-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 4 6623 // CHECK8-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 6624 // CHECK8-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]** 6625 // CHECK8-NEXT: store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 4 6626 // CHECK8-NEXT: [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 0 6627 // CHECK8-NEXT: store i8* null, i8** [[TMP31]], align 4 6628 // CHECK8-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 6629 // CHECK8-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 6630 // CHECK8-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 6631 // CHECK8-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 6632 // CHECK8-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 6633 // CHECK8-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]] 6634 // CHECK8: omp_offload.failed21: 6635 // CHECK8-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(%struct.SS* [[THIS1]]) #[[ATTR2]] 6636 // CHECK8-NEXT: br label [[OMP_OFFLOAD_CONT22]] 6637 // CHECK8: omp_offload.cont22: 6638 // CHECK8-NEXT: [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 6639 // CHECK8-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 6640 // CHECK8-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS** 6641 // CHECK8-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 4 6642 // CHECK8-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 6643 // CHECK8-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]** 6644 // CHECK8-NEXT: store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 4 6645 // CHECK8-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 0 6646 // CHECK8-NEXT: store i8* null, i8** [[TMP40]], align 4 6647 // CHECK8-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 6648 // CHECK8-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 6649 // CHECK8-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 6650 // CHECK8-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 6651 // CHECK8-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 6652 // CHECK8-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]] 6653 // CHECK8: omp_offload.failed28: 6654 // CHECK8-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(%struct.SS* [[THIS1]]) #[[ATTR2]] 6655 // CHECK8-NEXT: br label [[OMP_OFFLOAD_CONT29]] 6656 // CHECK8: omp_offload.cont29: 6657 // CHECK8-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 6658 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i32 0, i32 0 6659 // CHECK8-NEXT: [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 6660 // CHECK8-NEXT: ret i32 [[TMP45]] 6661 // 6662 // 6663 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35 6664 // CHECK8-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 6665 // CHECK8-NEXT: entry: 6666 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 6667 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 6668 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 6669 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 6670 // CHECK8-NEXT: ret void 6671 // 6672 // 6673 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined. 6674 // CHECK8-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 6675 // CHECK8-NEXT: entry: 6676 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6677 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6678 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 6679 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6680 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 6681 // CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6682 // CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6683 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6684 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6685 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 6686 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6687 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6688 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 6689 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 6690 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6691 // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 6692 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6693 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6694 // CHECK8-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6695 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 6696 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6697 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6698 // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 6699 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6700 // CHECK8: cond.true: 6701 // CHECK8-NEXT: br label [[COND_END:%.*]] 6702 // CHECK8: cond.false: 6703 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6704 // CHECK8-NEXT: br label [[COND_END]] 6705 // CHECK8: cond.end: 6706 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 6707 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 6708 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6709 // CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 6710 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6711 // CHECK8: omp.inner.for.cond: 6712 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6713 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6714 // CHECK8-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 6715 // CHECK8-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6716 // CHECK8: omp.inner.for.body: 6717 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6718 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6719 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 6720 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6721 // CHECK8: omp.inner.for.inc: 6722 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6723 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6724 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 6725 // CHECK8-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 6726 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]] 6727 // CHECK8: omp.inner.for.end: 6728 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6729 // CHECK8: omp.loop.exit: 6730 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 6731 // CHECK8-NEXT: ret void 6732 // 6733 // 6734 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..1 6735 // CHECK8-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 6736 // CHECK8-NEXT: entry: 6737 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6738 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6739 // CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 6740 // CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 6741 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 6742 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6743 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 6744 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6745 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6746 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6747 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6748 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 6749 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6750 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6751 // CHECK8-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6752 // CHECK8-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6753 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 6754 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 6755 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6756 // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 6757 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6758 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6759 // CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 6760 // CHECK8-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 6761 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6762 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6763 // CHECK8-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6764 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 6765 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6766 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6767 // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 6768 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6769 // CHECK8: cond.true: 6770 // CHECK8-NEXT: br label [[COND_END:%.*]] 6771 // CHECK8: cond.false: 6772 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6773 // CHECK8-NEXT: br label [[COND_END]] 6774 // CHECK8: cond.end: 6775 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 6776 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 6777 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6778 // CHECK8-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 6779 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6780 // CHECK8: omp.inner.for.cond: 6781 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6782 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6783 // CHECK8-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 6784 // CHECK8-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6785 // CHECK8: omp.inner.for.body: 6786 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6787 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 6788 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6789 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4 6790 // CHECK8-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 6791 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 6792 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]] 6793 // CHECK8-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 6794 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6795 // CHECK8: omp.body.continue: 6796 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6797 // CHECK8: omp.inner.for.inc: 6798 // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6799 // CHECK8-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 6800 // CHECK8-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 6801 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]] 6802 // CHECK8: omp.inner.for.end: 6803 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6804 // CHECK8: omp.loop.exit: 6805 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 6806 // CHECK8-NEXT: ret void 6807 // 6808 // 6809 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40 6810 // CHECK8-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 6811 // CHECK8-NEXT: entry: 6812 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 6813 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 6814 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 6815 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 6816 // CHECK8-NEXT: ret void 6817 // 6818 // 6819 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..2 6820 // CHECK8-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 6821 // CHECK8-NEXT: entry: 6822 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6823 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6824 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 6825 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6826 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 6827 // CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6828 // CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6829 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6830 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6831 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 6832 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6833 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6834 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 6835 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 6836 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6837 // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 6838 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6839 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6840 // CHECK8-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6841 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 6842 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6843 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6844 // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 6845 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6846 // CHECK8: cond.true: 6847 // CHECK8-NEXT: br label [[COND_END:%.*]] 6848 // CHECK8: cond.false: 6849 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6850 // CHECK8-NEXT: br label [[COND_END]] 6851 // CHECK8: cond.end: 6852 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 6853 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 6854 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6855 // CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 6856 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6857 // CHECK8: omp.inner.for.cond: 6858 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6859 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6860 // CHECK8-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 6861 // CHECK8-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6862 // CHECK8: omp.inner.for.body: 6863 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6864 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6865 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 6866 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6867 // CHECK8: omp.inner.for.inc: 6868 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6869 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6870 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 6871 // CHECK8-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 6872 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]] 6873 // CHECK8: omp.inner.for.end: 6874 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6875 // CHECK8: omp.loop.exit: 6876 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 6877 // CHECK8-NEXT: ret void 6878 // 6879 // 6880 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..3 6881 // CHECK8-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 6882 // CHECK8-NEXT: entry: 6883 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6884 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6885 // CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 6886 // CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 6887 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 6888 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6889 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 6890 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6891 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6892 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6893 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6894 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 6895 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6896 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6897 // CHECK8-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6898 // CHECK8-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6899 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 6900 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 6901 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6902 // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 6903 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6904 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6905 // CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 6906 // CHECK8-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 6907 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6908 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6909 // CHECK8-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6910 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 6911 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6912 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6913 // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 6914 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6915 // CHECK8: cond.true: 6916 // CHECK8-NEXT: br label [[COND_END:%.*]] 6917 // CHECK8: cond.false: 6918 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6919 // CHECK8-NEXT: br label [[COND_END]] 6920 // CHECK8: cond.end: 6921 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 6922 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 6923 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6924 // CHECK8-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 6925 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6926 // CHECK8: omp.inner.for.cond: 6927 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6928 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6929 // CHECK8-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 6930 // CHECK8-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6931 // CHECK8: omp.inner.for.body: 6932 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6933 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 6934 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6935 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4 6936 // CHECK8-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 6937 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 6938 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]] 6939 // CHECK8-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 6940 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6941 // CHECK8: omp.body.continue: 6942 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6943 // CHECK8: omp.inner.for.inc: 6944 // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6945 // CHECK8-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 6946 // CHECK8-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 6947 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]] 6948 // CHECK8: omp.inner.for.end: 6949 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6950 // CHECK8: omp.loop.exit: 6951 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 6952 // CHECK8-NEXT: ret void 6953 // 6954 // 6955 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45 6956 // CHECK8-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 6957 // CHECK8-NEXT: entry: 6958 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 6959 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 6960 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 6961 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 6962 // CHECK8-NEXT: ret void 6963 // 6964 // 6965 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..6 6966 // CHECK8-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 6967 // CHECK8-NEXT: entry: 6968 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6969 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6970 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 6971 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6972 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 6973 // CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6974 // CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6975 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6976 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6977 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 6978 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6979 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6980 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 6981 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 6982 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6983 // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 6984 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6985 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6986 // CHECK8-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6987 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 6988 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6989 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6990 // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 6991 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6992 // CHECK8: cond.true: 6993 // CHECK8-NEXT: br label [[COND_END:%.*]] 6994 // CHECK8: cond.false: 6995 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6996 // CHECK8-NEXT: br label [[COND_END]] 6997 // CHECK8: cond.end: 6998 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 6999 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 7000 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7001 // CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 7002 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7003 // CHECK8: omp.inner.for.cond: 7004 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7005 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7006 // CHECK8-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 7007 // CHECK8-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7008 // CHECK8: omp.inner.for.body: 7009 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7010 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7011 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 7012 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7013 // CHECK8: omp.inner.for.inc: 7014 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7015 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7016 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 7017 // CHECK8-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 7018 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]] 7019 // CHECK8: omp.inner.for.end: 7020 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7021 // CHECK8: omp.loop.exit: 7022 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 7023 // CHECK8-NEXT: ret void 7024 // 7025 // 7026 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..7 7027 // CHECK8-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 7028 // CHECK8-NEXT: entry: 7029 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 7030 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 7031 // CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 7032 // CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 7033 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 7034 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7035 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 7036 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7037 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7038 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7039 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7040 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 7041 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 7042 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 7043 // CHECK8-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 7044 // CHECK8-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 7045 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 7046 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 7047 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7048 // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 7049 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 7050 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 7051 // CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 7052 // CHECK8-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 7053 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7054 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7055 // CHECK8-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 7056 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 7057 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 7058 // CHECK8-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 7059 // CHECK8: omp.dispatch.cond: 7060 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7061 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 7062 // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]] 7063 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7064 // CHECK8: cond.true: 7065 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 7066 // CHECK8-NEXT: br label [[COND_END:%.*]] 7067 // CHECK8: cond.false: 7068 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7069 // CHECK8-NEXT: br label [[COND_END]] 7070 // CHECK8: cond.end: 7071 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 7072 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 7073 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7074 // CHECK8-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 7075 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7076 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7077 // CHECK8-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 7078 // CHECK8-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 7079 // CHECK8: omp.dispatch.body: 7080 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7081 // CHECK8: omp.inner.for.cond: 7082 // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7083 // CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7084 // CHECK8-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 7085 // CHECK8-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7086 // CHECK8: omp.inner.for.body: 7087 // CHECK8-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7088 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 7089 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7090 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4 7091 // CHECK8-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 7092 // CHECK8-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 7093 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP15]] 7094 // CHECK8-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 7095 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7096 // CHECK8: omp.body.continue: 7097 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7098 // CHECK8: omp.inner.for.inc: 7099 // CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7100 // CHECK8-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1 7101 // CHECK8-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 7102 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]] 7103 // CHECK8: omp.inner.for.end: 7104 // CHECK8-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 7105 // CHECK8: omp.dispatch.inc: 7106 // CHECK8-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7107 // CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7108 // CHECK8-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 7109 // CHECK8-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 7110 // CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7111 // CHECK8-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7112 // CHECK8-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 7113 // CHECK8-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 7114 // CHECK8-NEXT: br label [[OMP_DISPATCH_COND]] 7115 // CHECK8: omp.dispatch.end: 7116 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 7117 // CHECK8-NEXT: ret void 7118 // 7119 // 7120 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51 7121 // CHECK8-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 7122 // CHECK8-NEXT: entry: 7123 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 7124 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 7125 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 7126 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 7127 // CHECK8-NEXT: ret void 7128 // 7129 // 7130 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..10 7131 // CHECK8-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 7132 // CHECK8-NEXT: entry: 7133 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 7134 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 7135 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 7136 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7137 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 7138 // CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7139 // CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7140 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7141 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7142 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 7143 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 7144 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 7145 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 7146 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 7147 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 7148 // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 7149 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7150 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7151 // CHECK8-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 7152 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 7153 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7154 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7155 // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 7156 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7157 // CHECK8: cond.true: 7158 // CHECK8-NEXT: br label [[COND_END:%.*]] 7159 // CHECK8: cond.false: 7160 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7161 // CHECK8-NEXT: br label [[COND_END]] 7162 // CHECK8: cond.end: 7163 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 7164 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 7165 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7166 // CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 7167 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7168 // CHECK8: omp.inner.for.cond: 7169 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7170 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7171 // CHECK8-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 7172 // CHECK8-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7173 // CHECK8: omp.inner.for.body: 7174 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7175 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7176 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 7177 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7178 // CHECK8: omp.inner.for.inc: 7179 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7180 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7181 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 7182 // CHECK8-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 7183 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]] 7184 // CHECK8: omp.inner.for.end: 7185 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7186 // CHECK8: omp.loop.exit: 7187 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 7188 // CHECK8-NEXT: ret void 7189 // 7190 // 7191 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..11 7192 // CHECK8-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 7193 // CHECK8-NEXT: entry: 7194 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 7195 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 7196 // CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 7197 // CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 7198 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 7199 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7200 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 7201 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7202 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7203 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7204 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7205 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 7206 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 7207 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 7208 // CHECK8-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 7209 // CHECK8-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 7210 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 7211 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 7212 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7213 // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 7214 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 7215 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 7216 // CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 7217 // CHECK8-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 7218 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7219 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7220 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7221 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7222 // CHECK8-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 7223 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 7224 // CHECK8-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 7225 // CHECK8-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 7226 // CHECK8: omp.dispatch.cond: 7227 // CHECK8-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 7228 // CHECK8-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 7229 // CHECK8-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 7230 // CHECK8: omp.dispatch.body: 7231 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7232 // CHECK8-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 7233 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7234 // CHECK8: omp.inner.for.cond: 7235 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 7236 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11 7237 // CHECK8-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 7238 // CHECK8-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7239 // CHECK8: omp.inner.for.body: 7240 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 7241 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 7242 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7243 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !11 7244 // CHECK8-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 7245 // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11 7246 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]] 7247 // CHECK8-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !11 7248 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7249 // CHECK8: omp.body.continue: 7250 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7251 // CHECK8: omp.inner.for.inc: 7252 // CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 7253 // CHECK8-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 7254 // CHECK8-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 7255 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]] 7256 // CHECK8: omp.inner.for.end: 7257 // CHECK8-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 7258 // CHECK8: omp.dispatch.inc: 7259 // CHECK8-NEXT: br label [[OMP_DISPATCH_COND]] 7260 // CHECK8: omp.dispatch.end: 7261 // CHECK8-NEXT: ret void 7262 // 7263 // 7264 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57 7265 // CHECK8-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 7266 // CHECK8-NEXT: entry: 7267 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 7268 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 7269 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 7270 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 7271 // CHECK8-NEXT: ret void 7272 // 7273 // 7274 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..14 7275 // CHECK8-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 7276 // CHECK8-NEXT: entry: 7277 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 7278 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 7279 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 7280 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7281 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 7282 // CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7283 // CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7284 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7285 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7286 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 7287 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 7288 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 7289 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 7290 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 7291 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 7292 // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 7293 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7294 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7295 // CHECK8-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 7296 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 7297 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7298 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7299 // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 7300 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7301 // CHECK8: cond.true: 7302 // CHECK8-NEXT: br label [[COND_END:%.*]] 7303 // CHECK8: cond.false: 7304 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7305 // CHECK8-NEXT: br label [[COND_END]] 7306 // CHECK8: cond.end: 7307 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 7308 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 7309 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7310 // CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 7311 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7312 // CHECK8: omp.inner.for.cond: 7313 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7314 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7315 // CHECK8-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 7316 // CHECK8-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7317 // CHECK8: omp.inner.for.body: 7318 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7319 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7320 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 7321 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7322 // CHECK8: omp.inner.for.inc: 7323 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7324 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7325 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 7326 // CHECK8-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 7327 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]] 7328 // CHECK8: omp.inner.for.end: 7329 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7330 // CHECK8: omp.loop.exit: 7331 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 7332 // CHECK8-NEXT: ret void 7333 // 7334 // 7335 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..15 7336 // CHECK8-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 7337 // CHECK8-NEXT: entry: 7338 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 7339 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 7340 // CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 7341 // CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 7342 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 7343 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7344 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 7345 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7346 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7347 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7348 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7349 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 7350 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 7351 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 7352 // CHECK8-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 7353 // CHECK8-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 7354 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 7355 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 7356 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7357 // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 7358 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 7359 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 7360 // CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 7361 // CHECK8-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 7362 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7363 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7364 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7365 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7366 // CHECK8-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 7367 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 7368 // CHECK8-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61) 7369 // CHECK8-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 7370 // CHECK8: omp.dispatch.cond: 7371 // CHECK8-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 7372 // CHECK8-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 7373 // CHECK8-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 7374 // CHECK8: omp.dispatch.body: 7375 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7376 // CHECK8-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 7377 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7378 // CHECK8: omp.inner.for.cond: 7379 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 7380 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14 7381 // CHECK8-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 7382 // CHECK8-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7383 // CHECK8: omp.inner.for.body: 7384 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 7385 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 7386 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7387 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14 7388 // CHECK8-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 7389 // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !14 7390 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]] 7391 // CHECK8-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !14 7392 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7393 // CHECK8: omp.body.continue: 7394 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7395 // CHECK8: omp.inner.for.inc: 7396 // CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 7397 // CHECK8-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 7398 // CHECK8-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 7399 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] 7400 // CHECK8: omp.inner.for.end: 7401 // CHECK8-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 7402 // CHECK8: omp.dispatch.inc: 7403 // CHECK8-NEXT: br label [[OMP_DISPATCH_COND]] 7404 // CHECK8: omp.dispatch.end: 7405 // CHECK8-NEXT: ret void 7406 // 7407 // 7408 // CHECK8-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 7409 // CHECK8-SAME: () #[[ATTR3:[0-9]+]] { 7410 // CHECK8-NEXT: entry: 7411 // CHECK8-NEXT: call void @__tgt_register_requires(i64 1) 7412 // CHECK8-NEXT: ret void 7413 // 7414 // 7415 // CHECK13-LABEL: define {{[^@]+}}@main 7416 // CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 7417 // CHECK13-NEXT: entry: 7418 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 7419 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 7420 // CHECK13-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 7421 // CHECK13-NEXT: [[N:%.*]] = alloca i32, align 4 7422 // CHECK13-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 7423 // CHECK13-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 7424 // CHECK13-NEXT: [[M:%.*]] = alloca i32, align 4 7425 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 7426 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 7427 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 7428 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 7429 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 7430 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 7431 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 7432 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 7433 // CHECK13-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8 7434 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8 7435 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8 7436 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8 7437 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8 7438 // CHECK13-NEXT: [[_TMP9:%.*]] = alloca i32, align 4 7439 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 7440 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4 7441 // CHECK13-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 7442 // CHECK13-NEXT: [[N_CASTED19:%.*]] = alloca i64, align 8 7443 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [4 x i8*], align 8 7444 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS22:%.*]] = alloca [4 x i8*], align 8 7445 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [4 x i8*], align 8 7446 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES24:%.*]] = alloca [4 x i64], align 8 7447 // CHECK13-NEXT: [[_TMP25:%.*]] = alloca i32, align 4 7448 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4 7449 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4 7450 // CHECK13-NEXT: [[N_CASTED34:%.*]] = alloca i64, align 8 7451 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS36:%.*]] = alloca [3 x i8*], align 8 7452 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS37:%.*]] = alloca [3 x i8*], align 8 7453 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS38:%.*]] = alloca [3 x i8*], align 8 7454 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES39:%.*]] = alloca [3 x i64], align 8 7455 // CHECK13-NEXT: [[_TMP40:%.*]] = alloca i32, align 4 7456 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4 7457 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4 7458 // CHECK13-NEXT: [[M_CASTED49:%.*]] = alloca i64, align 8 7459 // CHECK13-NEXT: [[N_CASTED51:%.*]] = alloca i64, align 8 7460 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS53:%.*]] = alloca [4 x i8*], align 8 7461 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS54:%.*]] = alloca [4 x i8*], align 8 7462 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS55:%.*]] = alloca [4 x i8*], align 8 7463 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES56:%.*]] = alloca [4 x i64], align 8 7464 // CHECK13-NEXT: [[_TMP57:%.*]] = alloca i32, align 4 7465 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4 7466 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_59:%.*]] = alloca i32, align 4 7467 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4 7468 // CHECK13-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 7469 // CHECK13-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 7470 // CHECK13-NEXT: store i32 100, i32* [[N]], align 4 7471 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 7472 // CHECK13-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 7473 // CHECK13-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 7474 // CHECK13-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 7475 // CHECK13-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 7476 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 7477 // CHECK13-NEXT: store i32 10, i32* [[M]], align 4 7478 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 7479 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 7480 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 7481 // CHECK13-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 7482 // CHECK13-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 7483 // CHECK13-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 7484 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP6]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes to i8*), i64 24, i1 false) 7485 // CHECK13-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 7486 // CHECK13-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 7487 // CHECK13-NEXT: store i64 [[TMP4]], i64* [[TMP8]], align 8 7488 // CHECK13-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 7489 // CHECK13-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 7490 // CHECK13-NEXT: store i64 [[TMP4]], i64* [[TMP10]], align 8 7491 // CHECK13-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 7492 // CHECK13-NEXT: store i8* null, i8** [[TMP11]], align 8 7493 // CHECK13-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 7494 // CHECK13-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 7495 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8 7496 // CHECK13-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 7497 // CHECK13-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 7498 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8 7499 // CHECK13-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 7500 // CHECK13-NEXT: store i8* null, i8** [[TMP16]], align 8 7501 // CHECK13-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 7502 // CHECK13-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 7503 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 8 7504 // CHECK13-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 7505 // CHECK13-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 7506 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 8 7507 // CHECK13-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 7508 // CHECK13-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 8 7509 // CHECK13-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 7510 // CHECK13-NEXT: store i8* null, i8** [[TMP22]], align 8 7511 // CHECK13-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 7512 // CHECK13-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 7513 // CHECK13-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 7514 // CHECK13-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 7515 // CHECK13-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 7516 // CHECK13-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7517 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 7518 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 7519 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 7520 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 7521 // CHECK13-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7522 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 7523 // CHECK13-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 7524 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP29]]) 7525 // CHECK13-NEXT: [[TMP30:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, i32 3, i8** [[TMP23]], i8** [[TMP24]], i64* [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 7526 // CHECK13-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 7527 // CHECK13-NEXT: br i1 [[TMP31]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 7528 // CHECK13: omp_offload.failed: 7529 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 7530 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]] 7531 // CHECK13: omp_offload.cont: 7532 // CHECK13-NEXT: [[TMP32:%.*]] = load i32, i32* [[N]], align 4 7533 // CHECK13-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32* 7534 // CHECK13-NEXT: store i32 [[TMP32]], i32* [[CONV4]], align 4 7535 // CHECK13-NEXT: [[TMP33:%.*]] = load i64, i64* [[N_CASTED3]], align 8 7536 // CHECK13-NEXT: [[TMP34:%.*]] = mul nuw i64 [[TMP1]], 4 7537 // CHECK13-NEXT: [[TMP35:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES8]] to i8* 7538 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP35]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.4 to i8*), i64 24, i1 false) 7539 // CHECK13-NEXT: [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 7540 // CHECK13-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64* 7541 // CHECK13-NEXT: store i64 [[TMP33]], i64* [[TMP37]], align 8 7542 // CHECK13-NEXT: [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 7543 // CHECK13-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64* 7544 // CHECK13-NEXT: store i64 [[TMP33]], i64* [[TMP39]], align 8 7545 // CHECK13-NEXT: [[TMP40:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0 7546 // CHECK13-NEXT: store i8* null, i8** [[TMP40]], align 8 7547 // CHECK13-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 7548 // CHECK13-NEXT: [[TMP42:%.*]] = bitcast i8** [[TMP41]] to i64* 7549 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP42]], align 8 7550 // CHECK13-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 7551 // CHECK13-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i64* 7552 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP44]], align 8 7553 // CHECK13-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1 7554 // CHECK13-NEXT: store i8* null, i8** [[TMP45]], align 8 7555 // CHECK13-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2 7556 // CHECK13-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to i32** 7557 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP47]], align 8 7558 // CHECK13-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2 7559 // CHECK13-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32** 7560 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP49]], align 8 7561 // CHECK13-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2 7562 // CHECK13-NEXT: store i64 [[TMP34]], i64* [[TMP50]], align 8 7563 // CHECK13-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2 7564 // CHECK13-NEXT: store i8* null, i8** [[TMP51]], align 8 7565 // CHECK13-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 7566 // CHECK13-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 7567 // CHECK13-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0 7568 // CHECK13-NEXT: [[TMP55:%.*]] = load i32, i32* [[N]], align 4 7569 // CHECK13-NEXT: store i32 [[TMP55]], i32* [[DOTCAPTURE_EXPR_10]], align 4 7570 // CHECK13-NEXT: [[TMP56:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 7571 // CHECK13-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP56]], 0 7572 // CHECK13-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1 7573 // CHECK13-NEXT: [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1 7574 // CHECK13-NEXT: store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4 7575 // CHECK13-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 7576 // CHECK13-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP57]], 1 7577 // CHECK13-NEXT: [[TMP58:%.*]] = zext i32 [[ADD15]] to i64 7578 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP58]]) 7579 // CHECK13-NEXT: [[TMP59:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, i32 3, i8** [[TMP52]], i8** [[TMP53]], i64* [[TMP54]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 7580 // CHECK13-NEXT: [[TMP60:%.*]] = icmp ne i32 [[TMP59]], 0 7581 // CHECK13-NEXT: br i1 [[TMP60]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 7582 // CHECK13: omp_offload.failed16: 7583 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i64 [[TMP33]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 7584 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT17]] 7585 // CHECK13: omp_offload.cont17: 7586 // CHECK13-NEXT: [[TMP61:%.*]] = load i32, i32* [[M]], align 4 7587 // CHECK13-NEXT: [[CONV18:%.*]] = bitcast i64* [[M_CASTED]] to i32* 7588 // CHECK13-NEXT: store i32 [[TMP61]], i32* [[CONV18]], align 4 7589 // CHECK13-NEXT: [[TMP62:%.*]] = load i64, i64* [[M_CASTED]], align 8 7590 // CHECK13-NEXT: [[TMP63:%.*]] = load i32, i32* [[N]], align 4 7591 // CHECK13-NEXT: [[CONV20:%.*]] = bitcast i64* [[N_CASTED19]] to i32* 7592 // CHECK13-NEXT: store i32 [[TMP63]], i32* [[CONV20]], align 4 7593 // CHECK13-NEXT: [[TMP64:%.*]] = load i64, i64* [[N_CASTED19]], align 8 7594 // CHECK13-NEXT: [[TMP65:%.*]] = mul nuw i64 [[TMP1]], 4 7595 // CHECK13-NEXT: [[TMP66:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES24]] to i8* 7596 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP66]], i8* align 8 bitcast ([4 x i64]* @.offload_sizes.8 to i8*), i64 32, i1 false) 7597 // CHECK13-NEXT: [[TMP67:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 7598 // CHECK13-NEXT: [[TMP68:%.*]] = bitcast i8** [[TMP67]] to i64* 7599 // CHECK13-NEXT: store i64 [[TMP62]], i64* [[TMP68]], align 8 7600 // CHECK13-NEXT: [[TMP69:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 7601 // CHECK13-NEXT: [[TMP70:%.*]] = bitcast i8** [[TMP69]] to i64* 7602 // CHECK13-NEXT: store i64 [[TMP62]], i64* [[TMP70]], align 8 7603 // CHECK13-NEXT: [[TMP71:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0 7604 // CHECK13-NEXT: store i8* null, i8** [[TMP71]], align 8 7605 // CHECK13-NEXT: [[TMP72:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1 7606 // CHECK13-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to i64* 7607 // CHECK13-NEXT: store i64 [[TMP64]], i64* [[TMP73]], align 8 7608 // CHECK13-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1 7609 // CHECK13-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i64* 7610 // CHECK13-NEXT: store i64 [[TMP64]], i64* [[TMP75]], align 8 7611 // CHECK13-NEXT: [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1 7612 // CHECK13-NEXT: store i8* null, i8** [[TMP76]], align 8 7613 // CHECK13-NEXT: [[TMP77:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 2 7614 // CHECK13-NEXT: [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i64* 7615 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP78]], align 8 7616 // CHECK13-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 2 7617 // CHECK13-NEXT: [[TMP80:%.*]] = bitcast i8** [[TMP79]] to i64* 7618 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP80]], align 8 7619 // CHECK13-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 2 7620 // CHECK13-NEXT: store i8* null, i8** [[TMP81]], align 8 7621 // CHECK13-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 3 7622 // CHECK13-NEXT: [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i32** 7623 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP83]], align 8 7624 // CHECK13-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 3 7625 // CHECK13-NEXT: [[TMP85:%.*]] = bitcast i8** [[TMP84]] to i32** 7626 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP85]], align 8 7627 // CHECK13-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 3 7628 // CHECK13-NEXT: store i64 [[TMP65]], i64* [[TMP86]], align 8 7629 // CHECK13-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 3 7630 // CHECK13-NEXT: store i8* null, i8** [[TMP87]], align 8 7631 // CHECK13-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 7632 // CHECK13-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 7633 // CHECK13-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0 7634 // CHECK13-NEXT: [[TMP91:%.*]] = load i32, i32* [[N]], align 4 7635 // CHECK13-NEXT: store i32 [[TMP91]], i32* [[DOTCAPTURE_EXPR_26]], align 4 7636 // CHECK13-NEXT: [[TMP92:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 7637 // CHECK13-NEXT: [[SUB28:%.*]] = sub nsw i32 [[TMP92]], 0 7638 // CHECK13-NEXT: [[DIV29:%.*]] = sdiv i32 [[SUB28]], 1 7639 // CHECK13-NEXT: [[SUB30:%.*]] = sub nsw i32 [[DIV29]], 1 7640 // CHECK13-NEXT: store i32 [[SUB30]], i32* [[DOTCAPTURE_EXPR_27]], align 4 7641 // CHECK13-NEXT: [[TMP93:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 7642 // CHECK13-NEXT: [[ADD31:%.*]] = add nsw i32 [[TMP93]], 1 7643 // CHECK13-NEXT: [[TMP94:%.*]] = zext i32 [[ADD31]] to i64 7644 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP94]]) 7645 // CHECK13-NEXT: [[TMP95:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, i32 4, i8** [[TMP88]], i8** [[TMP89]], i64* [[TMP90]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 7646 // CHECK13-NEXT: [[TMP96:%.*]] = icmp ne i32 [[TMP95]], 0 7647 // CHECK13-NEXT: br i1 [[TMP96]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]] 7648 // CHECK13: omp_offload.failed32: 7649 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i64 [[TMP62]], i64 [[TMP64]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 7650 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT33]] 7651 // CHECK13: omp_offload.cont33: 7652 // CHECK13-NEXT: [[TMP97:%.*]] = load i32, i32* [[N]], align 4 7653 // CHECK13-NEXT: [[CONV35:%.*]] = bitcast i64* [[N_CASTED34]] to i32* 7654 // CHECK13-NEXT: store i32 [[TMP97]], i32* [[CONV35]], align 4 7655 // CHECK13-NEXT: [[TMP98:%.*]] = load i64, i64* [[N_CASTED34]], align 8 7656 // CHECK13-NEXT: [[TMP99:%.*]] = mul nuw i64 [[TMP1]], 4 7657 // CHECK13-NEXT: [[TMP100:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES39]] to i8* 7658 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP100]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.12 to i8*), i64 24, i1 false) 7659 // CHECK13-NEXT: [[TMP101:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0 7660 // CHECK13-NEXT: [[TMP102:%.*]] = bitcast i8** [[TMP101]] to i64* 7661 // CHECK13-NEXT: store i64 [[TMP98]], i64* [[TMP102]], align 8 7662 // CHECK13-NEXT: [[TMP103:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0 7663 // CHECK13-NEXT: [[TMP104:%.*]] = bitcast i8** [[TMP103]] to i64* 7664 // CHECK13-NEXT: store i64 [[TMP98]], i64* [[TMP104]], align 8 7665 // CHECK13-NEXT: [[TMP105:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 0 7666 // CHECK13-NEXT: store i8* null, i8** [[TMP105]], align 8 7667 // CHECK13-NEXT: [[TMP106:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 1 7668 // CHECK13-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to i64* 7669 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP107]], align 8 7670 // CHECK13-NEXT: [[TMP108:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 1 7671 // CHECK13-NEXT: [[TMP109:%.*]] = bitcast i8** [[TMP108]] to i64* 7672 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP109]], align 8 7673 // CHECK13-NEXT: [[TMP110:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 1 7674 // CHECK13-NEXT: store i8* null, i8** [[TMP110]], align 8 7675 // CHECK13-NEXT: [[TMP111:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 2 7676 // CHECK13-NEXT: [[TMP112:%.*]] = bitcast i8** [[TMP111]] to i32** 7677 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP112]], align 8 7678 // CHECK13-NEXT: [[TMP113:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 2 7679 // CHECK13-NEXT: [[TMP114:%.*]] = bitcast i8** [[TMP113]] to i32** 7680 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP114]], align 8 7681 // CHECK13-NEXT: [[TMP115:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 2 7682 // CHECK13-NEXT: store i64 [[TMP99]], i64* [[TMP115]], align 8 7683 // CHECK13-NEXT: [[TMP116:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 2 7684 // CHECK13-NEXT: store i8* null, i8** [[TMP116]], align 8 7685 // CHECK13-NEXT: [[TMP117:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0 7686 // CHECK13-NEXT: [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0 7687 // CHECK13-NEXT: [[TMP119:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0 7688 // CHECK13-NEXT: [[TMP120:%.*]] = load i32, i32* [[N]], align 4 7689 // CHECK13-NEXT: store i32 [[TMP120]], i32* [[DOTCAPTURE_EXPR_41]], align 4 7690 // CHECK13-NEXT: [[TMP121:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4 7691 // CHECK13-NEXT: [[SUB43:%.*]] = sub nsw i32 [[TMP121]], 0 7692 // CHECK13-NEXT: [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1 7693 // CHECK13-NEXT: [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 1 7694 // CHECK13-NEXT: store i32 [[SUB45]], i32* [[DOTCAPTURE_EXPR_42]], align 4 7695 // CHECK13-NEXT: [[TMP122:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_42]], align 4 7696 // CHECK13-NEXT: [[ADD46:%.*]] = add nsw i32 [[TMP122]], 1 7697 // CHECK13-NEXT: [[TMP123:%.*]] = zext i32 [[ADD46]] to i64 7698 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP123]]) 7699 // CHECK13-NEXT: [[TMP124:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, i32 3, i8** [[TMP117]], i8** [[TMP118]], i64* [[TMP119]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 7700 // CHECK13-NEXT: [[TMP125:%.*]] = icmp ne i32 [[TMP124]], 0 7701 // CHECK13-NEXT: br i1 [[TMP125]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]] 7702 // CHECK13: omp_offload.failed47: 7703 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i64 [[TMP98]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 7704 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT48]] 7705 // CHECK13: omp_offload.cont48: 7706 // CHECK13-NEXT: [[TMP126:%.*]] = load i32, i32* [[M]], align 4 7707 // CHECK13-NEXT: [[CONV50:%.*]] = bitcast i64* [[M_CASTED49]] to i32* 7708 // CHECK13-NEXT: store i32 [[TMP126]], i32* [[CONV50]], align 4 7709 // CHECK13-NEXT: [[TMP127:%.*]] = load i64, i64* [[M_CASTED49]], align 8 7710 // CHECK13-NEXT: [[TMP128:%.*]] = load i32, i32* [[N]], align 4 7711 // CHECK13-NEXT: [[CONV52:%.*]] = bitcast i64* [[N_CASTED51]] to i32* 7712 // CHECK13-NEXT: store i32 [[TMP128]], i32* [[CONV52]], align 4 7713 // CHECK13-NEXT: [[TMP129:%.*]] = load i64, i64* [[N_CASTED51]], align 8 7714 // CHECK13-NEXT: [[TMP130:%.*]] = mul nuw i64 [[TMP1]], 4 7715 // CHECK13-NEXT: [[TMP131:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES56]] to i8* 7716 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP131]], i8* align 8 bitcast ([4 x i64]* @.offload_sizes.16 to i8*), i64 32, i1 false) 7717 // CHECK13-NEXT: [[TMP132:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0 7718 // CHECK13-NEXT: [[TMP133:%.*]] = bitcast i8** [[TMP132]] to i64* 7719 // CHECK13-NEXT: store i64 [[TMP127]], i64* [[TMP133]], align 8 7720 // CHECK13-NEXT: [[TMP134:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0 7721 // CHECK13-NEXT: [[TMP135:%.*]] = bitcast i8** [[TMP134]] to i64* 7722 // CHECK13-NEXT: store i64 [[TMP127]], i64* [[TMP135]], align 8 7723 // CHECK13-NEXT: [[TMP136:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 0 7724 // CHECK13-NEXT: store i8* null, i8** [[TMP136]], align 8 7725 // CHECK13-NEXT: [[TMP137:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 1 7726 // CHECK13-NEXT: [[TMP138:%.*]] = bitcast i8** [[TMP137]] to i64* 7727 // CHECK13-NEXT: store i64 [[TMP129]], i64* [[TMP138]], align 8 7728 // CHECK13-NEXT: [[TMP139:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 1 7729 // CHECK13-NEXT: [[TMP140:%.*]] = bitcast i8** [[TMP139]] to i64* 7730 // CHECK13-NEXT: store i64 [[TMP129]], i64* [[TMP140]], align 8 7731 // CHECK13-NEXT: [[TMP141:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 1 7732 // CHECK13-NEXT: store i8* null, i8** [[TMP141]], align 8 7733 // CHECK13-NEXT: [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 2 7734 // CHECK13-NEXT: [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i64* 7735 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP143]], align 8 7736 // CHECK13-NEXT: [[TMP144:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 2 7737 // CHECK13-NEXT: [[TMP145:%.*]] = bitcast i8** [[TMP144]] to i64* 7738 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP145]], align 8 7739 // CHECK13-NEXT: [[TMP146:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 2 7740 // CHECK13-NEXT: store i8* null, i8** [[TMP146]], align 8 7741 // CHECK13-NEXT: [[TMP147:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 3 7742 // CHECK13-NEXT: [[TMP148:%.*]] = bitcast i8** [[TMP147]] to i32** 7743 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP148]], align 8 7744 // CHECK13-NEXT: [[TMP149:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 3 7745 // CHECK13-NEXT: [[TMP150:%.*]] = bitcast i8** [[TMP149]] to i32** 7746 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP150]], align 8 7747 // CHECK13-NEXT: [[TMP151:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 3 7748 // CHECK13-NEXT: store i64 [[TMP130]], i64* [[TMP151]], align 8 7749 // CHECK13-NEXT: [[TMP152:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 3 7750 // CHECK13-NEXT: store i8* null, i8** [[TMP152]], align 8 7751 // CHECK13-NEXT: [[TMP153:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0 7752 // CHECK13-NEXT: [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0 7753 // CHECK13-NEXT: [[TMP155:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0 7754 // CHECK13-NEXT: [[TMP156:%.*]] = load i32, i32* [[N]], align 4 7755 // CHECK13-NEXT: store i32 [[TMP156]], i32* [[DOTCAPTURE_EXPR_58]], align 4 7756 // CHECK13-NEXT: [[TMP157:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_58]], align 4 7757 // CHECK13-NEXT: [[SUB60:%.*]] = sub nsw i32 [[TMP157]], 0 7758 // CHECK13-NEXT: [[DIV61:%.*]] = sdiv i32 [[SUB60]], 1 7759 // CHECK13-NEXT: [[SUB62:%.*]] = sub nsw i32 [[DIV61]], 1 7760 // CHECK13-NEXT: store i32 [[SUB62]], i32* [[DOTCAPTURE_EXPR_59]], align 4 7761 // CHECK13-NEXT: [[TMP158:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_59]], align 4 7762 // CHECK13-NEXT: [[ADD63:%.*]] = add nsw i32 [[TMP158]], 1 7763 // CHECK13-NEXT: [[TMP159:%.*]] = zext i32 [[ADD63]] to i64 7764 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP159]]) 7765 // CHECK13-NEXT: [[TMP160:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, i32 4, i8** [[TMP153]], i8** [[TMP154]], i64* [[TMP155]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 7766 // CHECK13-NEXT: [[TMP161:%.*]] = icmp ne i32 [[TMP160]], 0 7767 // CHECK13-NEXT: br i1 [[TMP161]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]] 7768 // CHECK13: omp_offload.failed64: 7769 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i64 [[TMP127]], i64 [[TMP129]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 7770 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT65]] 7771 // CHECK13: omp_offload.cont65: 7772 // CHECK13-NEXT: [[TMP162:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 7773 // CHECK13-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP162]]) 7774 // CHECK13-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 7775 // CHECK13-NEXT: [[TMP163:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 7776 // CHECK13-NEXT: call void @llvm.stackrestore(i8* [[TMP163]]) 7777 // CHECK13-NEXT: [[TMP164:%.*]] = load i32, i32* [[RETVAL]], align 4 7778 // CHECK13-NEXT: ret i32 [[TMP164]] 7779 // 7780 // 7781 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148 7782 // CHECK13-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 7783 // CHECK13-NEXT: entry: 7784 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 7785 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 7786 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 7787 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 7788 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 7789 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 7790 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 7791 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 7792 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 7793 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 7794 // CHECK13-NEXT: ret void 7795 // 7796 // 7797 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined. 7798 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 7799 // CHECK13-NEXT: entry: 7800 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7801 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7802 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 7803 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 7804 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 7805 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7806 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 7807 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 7808 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 7809 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 7810 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7811 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7812 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7813 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7814 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4 7815 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7816 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7817 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 7818 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 7819 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 7820 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 7821 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 7822 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 7823 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 7824 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 7825 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7826 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 7827 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 7828 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 7829 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 7830 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 7831 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7832 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 7833 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 7834 // CHECK13: omp.precond.then: 7835 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 7836 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7837 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 7838 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7839 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7840 // CHECK13-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7841 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 7842 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7843 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7844 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7845 // CHECK13-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 7846 // CHECK13-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7847 // CHECK13: cond.true: 7848 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7849 // CHECK13-NEXT: br label [[COND_END:%.*]] 7850 // CHECK13: cond.false: 7851 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7852 // CHECK13-NEXT: br label [[COND_END]] 7853 // CHECK13: cond.end: 7854 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 7855 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 7856 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7857 // CHECK13-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 7858 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7859 // CHECK13: omp.inner.for.cond: 7860 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7861 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7862 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 7863 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7864 // CHECK13: omp.inner.for.body: 7865 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7866 // CHECK13-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 7867 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7868 // CHECK13-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 7869 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 7870 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7871 // CHECK13: omp.inner.for.inc: 7872 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7873 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7874 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 7875 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 7876 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 7877 // CHECK13: omp.inner.for.end: 7878 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7879 // CHECK13: omp.loop.exit: 7880 // CHECK13-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7881 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 7882 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 7883 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 7884 // CHECK13: omp.precond.end: 7885 // CHECK13-NEXT: ret void 7886 // 7887 // 7888 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..1 7889 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 7890 // CHECK13-NEXT: entry: 7891 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7892 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7893 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 7894 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 7895 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 7896 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 7897 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 7898 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7899 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 7900 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 7901 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 7902 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 7903 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7904 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7905 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7906 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7907 // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4 7908 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7909 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7910 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7911 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7912 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 7913 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 7914 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 7915 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 7916 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 7917 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 7918 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 7919 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 7920 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7921 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 7922 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 7923 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 7924 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 7925 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 7926 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7927 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 7928 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 7929 // CHECK13: omp.precond.then: 7930 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7931 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7932 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 7933 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7934 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 7935 // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7936 // CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 7937 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 7938 // CHECK13-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 7939 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7940 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7941 // CHECK13-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7942 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 7943 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7944 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7945 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7946 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 7947 // CHECK13-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7948 // CHECK13: cond.true: 7949 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7950 // CHECK13-NEXT: br label [[COND_END:%.*]] 7951 // CHECK13: cond.false: 7952 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7953 // CHECK13-NEXT: br label [[COND_END]] 7954 // CHECK13: cond.end: 7955 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 7956 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 7957 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7958 // CHECK13-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 7959 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7960 // CHECK13: omp.inner.for.cond: 7961 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7962 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7963 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 7964 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7965 // CHECK13: omp.inner.for.body: 7966 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7967 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 7968 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7969 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 7970 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4 7971 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 7972 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 7973 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 7974 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7975 // CHECK13: omp.body.continue: 7976 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7977 // CHECK13: omp.inner.for.inc: 7978 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7979 // CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 7980 // CHECK13-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 7981 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 7982 // CHECK13: omp.inner.for.end: 7983 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7984 // CHECK13: omp.loop.exit: 7985 // CHECK13-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7986 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 7987 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 7988 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 7989 // CHECK13: omp.precond.end: 7990 // CHECK13-NEXT: ret void 7991 // 7992 // 7993 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153 7994 // CHECK13-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 7995 // CHECK13-NEXT: entry: 7996 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 7997 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 7998 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 7999 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 8000 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 8001 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 8002 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 8003 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 8004 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 8005 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 8006 // CHECK13-NEXT: ret void 8007 // 8008 // 8009 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..2 8010 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 8011 // CHECK13-NEXT: entry: 8012 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8013 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8014 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 8015 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 8016 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 8017 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8018 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 8019 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 8020 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8021 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 8022 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8023 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8024 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8025 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8026 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4 8027 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8028 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8029 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 8030 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 8031 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 8032 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 8033 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 8034 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 8035 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 8036 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 8037 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8038 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 8039 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8040 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 8041 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 8042 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 8043 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8044 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 8045 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8046 // CHECK13: omp.precond.then: 8047 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 8048 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8049 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 8050 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8051 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8052 // CHECK13-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8053 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 8054 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8055 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8056 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8057 // CHECK13-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 8058 // CHECK13-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8059 // CHECK13: cond.true: 8060 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8061 // CHECK13-NEXT: br label [[COND_END:%.*]] 8062 // CHECK13: cond.false: 8063 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8064 // CHECK13-NEXT: br label [[COND_END]] 8065 // CHECK13: cond.end: 8066 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 8067 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 8068 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8069 // CHECK13-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 8070 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8071 // CHECK13: omp.inner.for.cond: 8072 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8073 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8074 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 8075 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8076 // CHECK13: omp.inner.for.body: 8077 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8078 // CHECK13-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 8079 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8080 // CHECK13-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 8081 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 8082 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8083 // CHECK13: omp.inner.for.inc: 8084 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8085 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8086 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 8087 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 8088 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 8089 // CHECK13: omp.inner.for.end: 8090 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8091 // CHECK13: omp.loop.exit: 8092 // CHECK13-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8093 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 8094 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 8095 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 8096 // CHECK13: omp.precond.end: 8097 // CHECK13-NEXT: ret void 8098 // 8099 // 8100 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..3 8101 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 8102 // CHECK13-NEXT: entry: 8103 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8104 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8105 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 8106 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 8107 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 8108 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 8109 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 8110 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8111 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 8112 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 8113 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8114 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 8115 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8116 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8117 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8118 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8119 // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4 8120 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8121 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8122 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8123 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8124 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 8125 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 8126 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 8127 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 8128 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 8129 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 8130 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 8131 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 8132 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8133 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 8134 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8135 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 8136 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 8137 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 8138 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8139 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 8140 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8141 // CHECK13: omp.precond.then: 8142 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 8143 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8144 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 8145 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8146 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 8147 // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8148 // CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 8149 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 8150 // CHECK13-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 8151 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8152 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8153 // CHECK13-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8154 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 8155 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8156 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8157 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8158 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 8159 // CHECK13-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8160 // CHECK13: cond.true: 8161 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8162 // CHECK13-NEXT: br label [[COND_END:%.*]] 8163 // CHECK13: cond.false: 8164 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8165 // CHECK13-NEXT: br label [[COND_END]] 8166 // CHECK13: cond.end: 8167 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 8168 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 8169 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8170 // CHECK13-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 8171 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8172 // CHECK13: omp.inner.for.cond: 8173 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8174 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8175 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 8176 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8177 // CHECK13: omp.inner.for.body: 8178 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8179 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 8180 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8181 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 8182 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4 8183 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 8184 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 8185 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 8186 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8187 // CHECK13: omp.body.continue: 8188 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8189 // CHECK13: omp.inner.for.inc: 8190 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8191 // CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 8192 // CHECK13-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 8193 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 8194 // CHECK13: omp.inner.for.end: 8195 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8196 // CHECK13: omp.loop.exit: 8197 // CHECK13-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8198 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 8199 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 8200 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 8201 // CHECK13: omp.precond.end: 8202 // CHECK13-NEXT: ret void 8203 // 8204 // 8205 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158 8206 // CHECK13-SAME: (i64 noundef [[M:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 8207 // CHECK13-NEXT: entry: 8208 // CHECK13-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 8209 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 8210 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 8211 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 8212 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 8213 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 8214 // CHECK13-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 8215 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 8216 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 8217 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 8218 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* 8219 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 8220 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 8221 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 8222 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 8223 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 8224 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8225 // CHECK13-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 8226 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4 8227 // CHECK13-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 8228 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]]) 8229 // CHECK13-NEXT: ret void 8230 // 8231 // 8232 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..6 8233 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 8234 // CHECK13-NEXT: entry: 8235 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8236 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8237 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 8238 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 8239 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 8240 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 8241 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8242 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 8243 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8244 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 8245 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 8246 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8247 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8248 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8249 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8250 // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4 8251 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 8252 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8253 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8254 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 8255 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 8256 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 8257 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 8258 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 8259 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 8260 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 8261 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 8262 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 8263 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 8264 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8265 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 8266 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8267 // CHECK13-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 8268 // CHECK13-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 8269 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 8270 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8271 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 8272 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8273 // CHECK13: omp.precond.then: 8274 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 8275 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 8276 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 8277 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8278 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8279 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[CONV]], align 4 8280 // CHECK13-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8281 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 8282 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]]) 8283 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8284 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 8285 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 8286 // CHECK13-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8287 // CHECK13: cond.true: 8288 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 8289 // CHECK13-NEXT: br label [[COND_END:%.*]] 8290 // CHECK13: cond.false: 8291 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8292 // CHECK13-NEXT: br label [[COND_END]] 8293 // CHECK13: cond.end: 8294 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 8295 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 8296 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8297 // CHECK13-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 8298 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8299 // CHECK13: omp.inner.for.cond: 8300 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8301 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 8302 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1 8303 // CHECK13-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]] 8304 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8305 // CHECK13: omp.inner.for.body: 8306 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8307 // CHECK13-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 8308 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8309 // CHECK13-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 8310 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV]], align 4 8311 // CHECK13-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 8312 // CHECK13-NEXT: store i32 [[TMP21]], i32* [[CONV7]], align 4 8313 // CHECK13-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 8314 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP22]]) 8315 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8316 // CHECK13: omp.inner.for.inc: 8317 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8318 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8319 // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 8320 // CHECK13-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 8321 // CHECK13-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8322 // CHECK13-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8323 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 8324 // CHECK13-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4 8325 // CHECK13-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8326 // CHECK13-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8327 // CHECK13-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP27]], [[TMP28]] 8328 // CHECK13-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4 8329 // CHECK13-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8330 // CHECK13-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 8331 // CHECK13-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]] 8332 // CHECK13-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]] 8333 // CHECK13: cond.true12: 8334 // CHECK13-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 8335 // CHECK13-NEXT: br label [[COND_END14:%.*]] 8336 // CHECK13: cond.false13: 8337 // CHECK13-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8338 // CHECK13-NEXT: br label [[COND_END14]] 8339 // CHECK13: cond.end14: 8340 // CHECK13-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE12]] ], [ [[TMP32]], [[COND_FALSE13]] ] 8341 // CHECK13-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4 8342 // CHECK13-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8343 // CHECK13-NEXT: store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4 8344 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 8345 // CHECK13: omp.inner.for.end: 8346 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8347 // CHECK13: omp.loop.exit: 8348 // CHECK13-NEXT: [[TMP34:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8349 // CHECK13-NEXT: [[TMP35:%.*]] = load i32, i32* [[TMP34]], align 4 8350 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP35]]) 8351 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 8352 // CHECK13: omp.precond.end: 8353 // CHECK13-NEXT: ret void 8354 // 8355 // 8356 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..7 8357 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 8358 // CHECK13-NEXT: entry: 8359 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8360 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8361 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 8362 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 8363 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 8364 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 8365 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 8366 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 8367 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8368 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 8369 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8370 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 8371 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 8372 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8373 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8374 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8375 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8376 // CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 4 8377 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8378 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8379 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8380 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8381 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 8382 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 8383 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 8384 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 8385 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 8386 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 8387 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 8388 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 8389 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 8390 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 8391 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8392 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 8393 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8394 // CHECK13-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 8395 // CHECK13-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 8396 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 8397 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8398 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 8399 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8400 // CHECK13: omp.precond.then: 8401 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 8402 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 8403 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 8404 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8405 // CHECK13-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32 8406 // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8407 // CHECK13-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32 8408 // CHECK13-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 8409 // CHECK13-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 8410 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8411 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8412 // CHECK13-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8413 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 8414 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8415 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8416 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 8417 // CHECK13-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 8418 // CHECK13-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8419 // CHECK13: cond.true: 8420 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 8421 // CHECK13-NEXT: br label [[COND_END:%.*]] 8422 // CHECK13: cond.false: 8423 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8424 // CHECK13-NEXT: br label [[COND_END]] 8425 // CHECK13: cond.end: 8426 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 8427 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 8428 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8429 // CHECK13-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 8430 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8431 // CHECK13: omp.inner.for.cond: 8432 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8433 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8434 // CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 8435 // CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8436 // CHECK13: omp.inner.for.body: 8437 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8438 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 8439 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8440 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I6]], align 4 8441 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4 8442 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 8443 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 8444 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 8445 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8446 // CHECK13: omp.body.continue: 8447 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8448 // CHECK13: omp.inner.for.inc: 8449 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8450 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1 8451 // CHECK13-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 8452 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 8453 // CHECK13: omp.inner.for.end: 8454 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8455 // CHECK13: omp.loop.exit: 8456 // CHECK13-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8457 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 8458 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 8459 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 8460 // CHECK13: omp.precond.end: 8461 // CHECK13-NEXT: ret void 8462 // 8463 // 8464 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163 8465 // CHECK13-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 8466 // CHECK13-NEXT: entry: 8467 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 8468 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 8469 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 8470 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 8471 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 8472 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 8473 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 8474 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 8475 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 8476 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 8477 // CHECK13-NEXT: ret void 8478 // 8479 // 8480 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..10 8481 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 8482 // CHECK13-NEXT: entry: 8483 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8484 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8485 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 8486 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 8487 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 8488 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8489 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 8490 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 8491 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8492 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 8493 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8494 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8495 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8496 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8497 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4 8498 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8499 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8500 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 8501 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 8502 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 8503 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 8504 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 8505 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 8506 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 8507 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 8508 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8509 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 8510 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8511 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 8512 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 8513 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 8514 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8515 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 8516 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8517 // CHECK13: omp.precond.then: 8518 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 8519 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8520 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 8521 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8522 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8523 // CHECK13-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8524 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 8525 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8526 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8527 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8528 // CHECK13-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 8529 // CHECK13-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8530 // CHECK13: cond.true: 8531 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8532 // CHECK13-NEXT: br label [[COND_END:%.*]] 8533 // CHECK13: cond.false: 8534 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8535 // CHECK13-NEXT: br label [[COND_END]] 8536 // CHECK13: cond.end: 8537 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 8538 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 8539 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8540 // CHECK13-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 8541 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8542 // CHECK13: omp.inner.for.cond: 8543 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8544 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8545 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 8546 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8547 // CHECK13: omp.inner.for.body: 8548 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8549 // CHECK13-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 8550 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8551 // CHECK13-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 8552 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 8553 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8554 // CHECK13: omp.inner.for.inc: 8555 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8556 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8557 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 8558 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 8559 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 8560 // CHECK13: omp.inner.for.end: 8561 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8562 // CHECK13: omp.loop.exit: 8563 // CHECK13-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8564 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 8565 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 8566 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 8567 // CHECK13: omp.precond.end: 8568 // CHECK13-NEXT: ret void 8569 // 8570 // 8571 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..11 8572 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 8573 // CHECK13-NEXT: entry: 8574 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8575 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8576 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 8577 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 8578 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 8579 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 8580 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 8581 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8582 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 8583 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 8584 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8585 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 8586 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8587 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8588 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8589 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8590 // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4 8591 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8592 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8593 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8594 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8595 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 8596 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 8597 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 8598 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 8599 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 8600 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 8601 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 8602 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 8603 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8604 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 8605 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8606 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 8607 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 8608 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 8609 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8610 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 8611 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8612 // CHECK13: omp.precond.then: 8613 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 8614 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8615 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 8616 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8617 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 8618 // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8619 // CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 8620 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 8621 // CHECK13-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 8622 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8623 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8624 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8625 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8626 // CHECK13-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8627 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 8628 // CHECK13-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1) 8629 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 8630 // CHECK13: omp.dispatch.cond: 8631 // CHECK13-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8632 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 8633 // CHECK13-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 8634 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 8635 // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 8636 // CHECK13: omp.dispatch.body: 8637 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8638 // CHECK13-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 8639 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8640 // CHECK13: omp.inner.for.cond: 8641 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 8642 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15 8643 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 8644 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8645 // CHECK13: omp.inner.for.body: 8646 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 8647 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 8648 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8649 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !15 8650 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !15 8651 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64 8652 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 8653 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15 8654 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8655 // CHECK13: omp.body.continue: 8656 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8657 // CHECK13: omp.inner.for.inc: 8658 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 8659 // CHECK13-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1 8660 // CHECK13-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 8661 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 8662 // CHECK13: omp.inner.for.end: 8663 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 8664 // CHECK13: omp.dispatch.inc: 8665 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]] 8666 // CHECK13: omp.dispatch.end: 8667 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 8668 // CHECK13: omp.precond.end: 8669 // CHECK13-NEXT: ret void 8670 // 8671 // 8672 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168 8673 // CHECK13-SAME: (i64 noundef [[M:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 8674 // CHECK13-NEXT: entry: 8675 // CHECK13-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 8676 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 8677 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 8678 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 8679 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 8680 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 8681 // CHECK13-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 8682 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 8683 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 8684 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 8685 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* 8686 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 8687 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 8688 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 8689 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 8690 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 8691 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8692 // CHECK13-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 8693 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4 8694 // CHECK13-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 8695 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]]) 8696 // CHECK13-NEXT: ret void 8697 // 8698 // 8699 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..14 8700 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 8701 // CHECK13-NEXT: entry: 8702 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8703 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8704 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 8705 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 8706 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 8707 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 8708 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8709 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 8710 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8711 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 8712 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 8713 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8714 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8715 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8716 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8717 // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4 8718 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 8719 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8720 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8721 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 8722 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 8723 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 8724 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 8725 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 8726 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 8727 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 8728 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 8729 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 8730 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 8731 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8732 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 8733 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8734 // CHECK13-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 8735 // CHECK13-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 8736 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 8737 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8738 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 8739 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8740 // CHECK13: omp.precond.then: 8741 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 8742 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 8743 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 8744 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8745 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8746 // CHECK13-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8747 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 8748 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8749 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8750 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 8751 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 8752 // CHECK13-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8753 // CHECK13: cond.true: 8754 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 8755 // CHECK13-NEXT: br label [[COND_END:%.*]] 8756 // CHECK13: cond.false: 8757 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8758 // CHECK13-NEXT: br label [[COND_END]] 8759 // CHECK13: cond.end: 8760 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 8761 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 8762 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8763 // CHECK13-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 8764 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8765 // CHECK13: omp.inner.for.cond: 8766 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8767 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8768 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 8769 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8770 // CHECK13: omp.inner.for.body: 8771 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8772 // CHECK13-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 8773 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8774 // CHECK13-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 8775 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV]], align 4 8776 // CHECK13-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 8777 // CHECK13-NEXT: store i32 [[TMP20]], i32* [[CONV7]], align 4 8778 // CHECK13-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 8779 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP21]]) 8780 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8781 // CHECK13: omp.inner.for.inc: 8782 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8783 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8784 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 8785 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 8786 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 8787 // CHECK13: omp.inner.for.end: 8788 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8789 // CHECK13: omp.loop.exit: 8790 // CHECK13-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8791 // CHECK13-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 8792 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) 8793 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 8794 // CHECK13: omp.precond.end: 8795 // CHECK13-NEXT: ret void 8796 // 8797 // 8798 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..15 8799 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 8800 // CHECK13-NEXT: entry: 8801 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8802 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8803 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 8804 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 8805 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 8806 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 8807 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 8808 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 8809 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8810 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 8811 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8812 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 8813 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 8814 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8815 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8816 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8817 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8818 // CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 4 8819 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8820 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8821 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8822 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8823 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 8824 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 8825 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 8826 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 8827 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 8828 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 8829 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 8830 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 8831 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 8832 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 8833 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8834 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 8835 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8836 // CHECK13-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 8837 // CHECK13-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 8838 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 8839 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8840 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 8841 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8842 // CHECK13: omp.precond.then: 8843 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 8844 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 8845 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 8846 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8847 // CHECK13-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32 8848 // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8849 // CHECK13-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32 8850 // CHECK13-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 8851 // CHECK13-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 8852 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8853 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8854 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 4 8855 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8856 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8857 // CHECK13-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8858 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 8859 // CHECK13-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 1073741859, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]]) 8860 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 8861 // CHECK13: omp.dispatch.cond: 8862 // CHECK13-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8863 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 8864 // CHECK13-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 8865 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 8866 // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 8867 // CHECK13: omp.dispatch.body: 8868 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8869 // CHECK13-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 8870 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8871 // CHECK13: omp.inner.for.cond: 8872 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 8873 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18 8874 // CHECK13-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 8875 // CHECK13-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8876 // CHECK13: omp.inner.for.body: 8877 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 8878 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 8879 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8880 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !18 8881 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !18 8882 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 8883 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 8884 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18 8885 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8886 // CHECK13: omp.body.continue: 8887 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8888 // CHECK13: omp.inner.for.inc: 8889 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 8890 // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], 1 8891 // CHECK13-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 8892 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]] 8893 // CHECK13: omp.inner.for.end: 8894 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 8895 // CHECK13: omp.dispatch.inc: 8896 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]] 8897 // CHECK13: omp.dispatch.end: 8898 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 8899 // CHECK13: omp.precond.end: 8900 // CHECK13-NEXT: ret void 8901 // 8902 // 8903 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 8904 // CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 8905 // CHECK13-NEXT: entry: 8906 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 8907 // CHECK13-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 8908 // CHECK13-NEXT: [[M:%.*]] = alloca i32, align 4 8909 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 8910 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 8911 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 8912 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 8913 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8 8914 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8 8915 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8 8916 // CHECK13-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 8917 // CHECK13-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 8918 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 8 8919 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 8 8920 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 8 8921 // CHECK13-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 8922 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 8 8923 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 8 8924 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 8 8925 // CHECK13-NEXT: [[_TMP16:%.*]] = alloca i32, align 4 8926 // CHECK13-NEXT: [[M_CASTED19:%.*]] = alloca i64, align 8 8927 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [2 x i8*], align 8 8928 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS22:%.*]] = alloca [2 x i8*], align 8 8929 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [2 x i8*], align 8 8930 // CHECK13-NEXT: [[_TMP24:%.*]] = alloca i32, align 4 8931 // CHECK13-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 8932 // CHECK13-NEXT: store i32 10, i32* [[M]], align 4 8933 // CHECK13-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 8934 // CHECK13-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 8935 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8 8936 // CHECK13-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 8937 // CHECK13-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 8938 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8 8939 // CHECK13-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 8940 // CHECK13-NEXT: store i8* null, i8** [[TMP4]], align 8 8941 // CHECK13-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 8942 // CHECK13-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 8943 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 8944 // CHECK13-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.20, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.21, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 8945 // CHECK13-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 8946 // CHECK13-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 8947 // CHECK13: omp_offload.failed: 8948 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]] 8949 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]] 8950 // CHECK13: omp_offload.cont: 8951 // CHECK13-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 8952 // CHECK13-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** 8953 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8 8954 // CHECK13-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 8955 // CHECK13-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** 8956 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8 8957 // CHECK13-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0 8958 // CHECK13-NEXT: store i8* null, i8** [[TMP13]], align 8 8959 // CHECK13-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 8960 // CHECK13-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 8961 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 8962 // CHECK13-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.24, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.25, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 8963 // CHECK13-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 8964 // CHECK13-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 8965 // CHECK13: omp_offload.failed5: 8966 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121([10 x i32]* [[A]]) #[[ATTR3]] 8967 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT6]] 8968 // CHECK13: omp_offload.cont6: 8969 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[M]], align 4 8970 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[M_CASTED]] to i32* 8971 // CHECK13-NEXT: store i32 [[TMP18]], i32* [[CONV]], align 4 8972 // CHECK13-NEXT: [[TMP19:%.*]] = load i64, i64* [[M_CASTED]], align 8 8973 // CHECK13-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 8974 // CHECK13-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64* 8975 // CHECK13-NEXT: store i64 [[TMP19]], i64* [[TMP21]], align 8 8976 // CHECK13-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 8977 // CHECK13-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64* 8978 // CHECK13-NEXT: store i64 [[TMP19]], i64* [[TMP23]], align 8 8979 // CHECK13-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0 8980 // CHECK13-NEXT: store i8* null, i8** [[TMP24]], align 8 8981 // CHECK13-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1 8982 // CHECK13-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]** 8983 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 8 8984 // CHECK13-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1 8985 // CHECK13-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]** 8986 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 8 8987 // CHECK13-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 1 8988 // CHECK13-NEXT: store i8* null, i8** [[TMP29]], align 8 8989 // CHECK13-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 8990 // CHECK13-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 8991 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 8992 // CHECK13-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.28, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.29, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 8993 // CHECK13-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 8994 // CHECK13-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] 8995 // CHECK13: omp_offload.failed11: 8996 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i64 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]] 8997 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT12]] 8998 // CHECK13: omp_offload.cont12: 8999 // CHECK13-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 9000 // CHECK13-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]** 9001 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 8 9002 // CHECK13-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 9003 // CHECK13-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]** 9004 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 8 9005 // CHECK13-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i64 0, i64 0 9006 // CHECK13-NEXT: store i8* null, i8** [[TMP38]], align 8 9007 // CHECK13-NEXT: [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 9008 // CHECK13-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 9009 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 9010 // CHECK13-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.32, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.33, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 9011 // CHECK13-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0 9012 // CHECK13-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]] 9013 // CHECK13: omp_offload.failed17: 9014 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131([10 x i32]* [[A]]) #[[ATTR3]] 9015 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT18]] 9016 // CHECK13: omp_offload.cont18: 9017 // CHECK13-NEXT: [[TMP43:%.*]] = load i32, i32* [[M]], align 4 9018 // CHECK13-NEXT: [[CONV20:%.*]] = bitcast i64* [[M_CASTED19]] to i32* 9019 // CHECK13-NEXT: store i32 [[TMP43]], i32* [[CONV20]], align 4 9020 // CHECK13-NEXT: [[TMP44:%.*]] = load i64, i64* [[M_CASTED19]], align 8 9021 // CHECK13-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 9022 // CHECK13-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64* 9023 // CHECK13-NEXT: store i64 [[TMP44]], i64* [[TMP46]], align 8 9024 // CHECK13-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 9025 // CHECK13-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64* 9026 // CHECK13-NEXT: store i64 [[TMP44]], i64* [[TMP48]], align 8 9027 // CHECK13-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0 9028 // CHECK13-NEXT: store i8* null, i8** [[TMP49]], align 8 9029 // CHECK13-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1 9030 // CHECK13-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]** 9031 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 8 9032 // CHECK13-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1 9033 // CHECK13-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]** 9034 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 8 9035 // CHECK13-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1 9036 // CHECK13-NEXT: store i8* null, i8** [[TMP54]], align 8 9037 // CHECK13-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 9038 // CHECK13-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 9039 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 9040 // CHECK13-NEXT: [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.36, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.37, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 9041 // CHECK13-NEXT: [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0 9042 // CHECK13-NEXT: br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED25:%.*]], label [[OMP_OFFLOAD_CONT26:%.*]] 9043 // CHECK13: omp_offload.failed25: 9044 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i64 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]] 9045 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT26]] 9046 // CHECK13: omp_offload.cont26: 9047 // CHECK13-NEXT: ret i32 0 9048 // 9049 // 9050 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116 9051 // CHECK13-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 9052 // CHECK13-NEXT: entry: 9053 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 9054 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 9055 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 9056 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 9057 // CHECK13-NEXT: ret void 9058 // 9059 // 9060 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..18 9061 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 9062 // CHECK13-NEXT: entry: 9063 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9064 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9065 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 9066 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9067 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 9068 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9069 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9070 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9071 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9072 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 9073 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9074 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9075 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 9076 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 9077 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 9078 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 9079 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9080 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9081 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9082 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 9083 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9084 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9085 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 9086 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9087 // CHECK13: cond.true: 9088 // CHECK13-NEXT: br label [[COND_END:%.*]] 9089 // CHECK13: cond.false: 9090 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9091 // CHECK13-NEXT: br label [[COND_END]] 9092 // CHECK13: cond.end: 9093 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 9094 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 9095 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9096 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 9097 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9098 // CHECK13: omp.inner.for.cond: 9099 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9100 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9101 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 9102 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9103 // CHECK13: omp.inner.for.body: 9104 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9105 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 9106 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9107 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 9108 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..19 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]) 9109 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9110 // CHECK13: omp.inner.for.inc: 9111 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9112 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9113 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 9114 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 9115 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 9116 // CHECK13: omp.inner.for.end: 9117 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9118 // CHECK13: omp.loop.exit: 9119 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 9120 // CHECK13-NEXT: ret void 9121 // 9122 // 9123 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..19 9124 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 9125 // CHECK13-NEXT: entry: 9126 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9127 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9128 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 9129 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 9130 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 9131 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9132 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 9133 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9134 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9135 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9136 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9137 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 9138 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9139 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9140 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9141 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9142 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 9143 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 9144 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 9145 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 9146 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9147 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 9148 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9149 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 9150 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 9151 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 9152 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9153 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9154 // CHECK13-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9155 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 9156 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9157 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9158 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 9159 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9160 // CHECK13: cond.true: 9161 // CHECK13-NEXT: br label [[COND_END:%.*]] 9162 // CHECK13: cond.false: 9163 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9164 // CHECK13-NEXT: br label [[COND_END]] 9165 // CHECK13: cond.end: 9166 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 9167 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 9168 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9169 // CHECK13-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 9170 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9171 // CHECK13: omp.inner.for.cond: 9172 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9173 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9174 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 9175 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9176 // CHECK13: omp.inner.for.body: 9177 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9178 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 9179 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9180 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4 9181 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 9182 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 9183 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 9184 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 9185 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9186 // CHECK13: omp.body.continue: 9187 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9188 // CHECK13: omp.inner.for.inc: 9189 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9190 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 9191 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 9192 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 9193 // CHECK13: omp.inner.for.end: 9194 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9195 // CHECK13: omp.loop.exit: 9196 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 9197 // CHECK13-NEXT: ret void 9198 // 9199 // 9200 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121 9201 // CHECK13-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 9202 // CHECK13-NEXT: entry: 9203 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 9204 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 9205 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 9206 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..22 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 9207 // CHECK13-NEXT: ret void 9208 // 9209 // 9210 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..22 9211 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 9212 // CHECK13-NEXT: entry: 9213 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9214 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9215 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 9216 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9217 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 9218 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9219 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9220 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9221 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9222 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 9223 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9224 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9225 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 9226 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 9227 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 9228 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 9229 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9230 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9231 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9232 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 9233 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9234 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9235 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 9236 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9237 // CHECK13: cond.true: 9238 // CHECK13-NEXT: br label [[COND_END:%.*]] 9239 // CHECK13: cond.false: 9240 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9241 // CHECK13-NEXT: br label [[COND_END]] 9242 // CHECK13: cond.end: 9243 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 9244 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 9245 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9246 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 9247 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9248 // CHECK13: omp.inner.for.cond: 9249 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9250 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9251 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 9252 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9253 // CHECK13: omp.inner.for.body: 9254 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9255 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 9256 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9257 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 9258 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..23 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]) 9259 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9260 // CHECK13: omp.inner.for.inc: 9261 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9262 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9263 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 9264 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 9265 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 9266 // CHECK13: omp.inner.for.end: 9267 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9268 // CHECK13: omp.loop.exit: 9269 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 9270 // CHECK13-NEXT: ret void 9271 // 9272 // 9273 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..23 9274 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 9275 // CHECK13-NEXT: entry: 9276 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9277 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9278 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 9279 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 9280 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 9281 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9282 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 9283 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9284 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9285 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9286 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9287 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 9288 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9289 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9290 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9291 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9292 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 9293 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 9294 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 9295 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 9296 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9297 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 9298 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9299 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 9300 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 9301 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 9302 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9303 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9304 // CHECK13-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9305 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 9306 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9307 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9308 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 9309 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9310 // CHECK13: cond.true: 9311 // CHECK13-NEXT: br label [[COND_END:%.*]] 9312 // CHECK13: cond.false: 9313 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9314 // CHECK13-NEXT: br label [[COND_END]] 9315 // CHECK13: cond.end: 9316 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 9317 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 9318 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9319 // CHECK13-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 9320 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9321 // CHECK13: omp.inner.for.cond: 9322 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9323 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9324 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 9325 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9326 // CHECK13: omp.inner.for.body: 9327 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9328 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 9329 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9330 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4 9331 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 9332 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 9333 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 9334 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 9335 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9336 // CHECK13: omp.body.continue: 9337 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9338 // CHECK13: omp.inner.for.inc: 9339 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9340 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 9341 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 9342 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 9343 // CHECK13: omp.inner.for.end: 9344 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9345 // CHECK13: omp.loop.exit: 9346 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 9347 // CHECK13-NEXT: ret void 9348 // 9349 // 9350 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126 9351 // CHECK13-SAME: (i64 noundef [[M:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 9352 // CHECK13-NEXT: entry: 9353 // CHECK13-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 9354 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 9355 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 9356 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 9357 // CHECK13-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 9358 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 9359 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* 9360 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 9361 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 9362 // CHECK13-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 9363 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9364 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 9365 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 9366 // CHECK13-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 9367 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..26 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]]) 9368 // CHECK13-NEXT: ret void 9369 // 9370 // 9371 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..26 9372 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 9373 // CHECK13-NEXT: entry: 9374 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9375 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9376 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 9377 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 9378 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9379 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 9380 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9381 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9382 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9383 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9384 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 9385 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 9386 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9387 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9388 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 9389 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 9390 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 9391 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 9392 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 9393 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 9394 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9395 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9396 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9397 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 9398 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9399 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9400 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 9401 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9402 // CHECK13: cond.true: 9403 // CHECK13-NEXT: br label [[COND_END:%.*]] 9404 // CHECK13: cond.false: 9405 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9406 // CHECK13-NEXT: br label [[COND_END]] 9407 // CHECK13: cond.end: 9408 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 9409 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 9410 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9411 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 9412 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9413 // CHECK13: omp.inner.for.cond: 9414 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9415 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9416 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 9417 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9418 // CHECK13: omp.inner.for.body: 9419 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9420 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 9421 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9422 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 9423 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 4 9424 // CHECK13-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 9425 // CHECK13-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4 9426 // CHECK13-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 9427 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..27 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]]) 9428 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9429 // CHECK13: omp.inner.for.inc: 9430 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9431 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9432 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 9433 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 9434 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 9435 // CHECK13: omp.inner.for.end: 9436 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9437 // CHECK13: omp.loop.exit: 9438 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 9439 // CHECK13-NEXT: ret void 9440 // 9441 // 9442 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..27 9443 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 9444 // CHECK13-NEXT: entry: 9445 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9446 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9447 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 9448 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 9449 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 9450 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 9451 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9452 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 9453 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9454 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9455 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9456 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9457 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 9458 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9459 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9460 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9461 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9462 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 9463 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 9464 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 9465 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 9466 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 9467 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 9468 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9469 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 9470 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9471 // CHECK13-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 9472 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4 9473 // CHECK13-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 9474 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9475 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9476 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4 9477 // CHECK13-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9478 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 9479 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]]) 9480 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 9481 // CHECK13: omp.dispatch.cond: 9482 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9483 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9484 // CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 9485 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]] 9486 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9487 // CHECK13: cond.true: 9488 // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9489 // CHECK13-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 9490 // CHECK13-NEXT: br label [[COND_END:%.*]] 9491 // CHECK13: cond.false: 9492 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9493 // CHECK13-NEXT: br label [[COND_END]] 9494 // CHECK13: cond.end: 9495 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 9496 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 9497 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9498 // CHECK13-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 9499 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9500 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9501 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 9502 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 9503 // CHECK13: omp.dispatch.body: 9504 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9505 // CHECK13: omp.inner.for.cond: 9506 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9507 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9508 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 9509 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9510 // CHECK13: omp.inner.for.body: 9511 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9512 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 9513 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9514 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4 9515 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4 9516 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 9517 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 9518 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 9519 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9520 // CHECK13: omp.body.continue: 9521 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9522 // CHECK13: omp.inner.for.inc: 9523 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9524 // CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1 9525 // CHECK13-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 9526 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 9527 // CHECK13: omp.inner.for.end: 9528 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 9529 // CHECK13: omp.dispatch.inc: 9530 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9531 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9532 // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 9533 // CHECK13-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 9534 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9535 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9536 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 9537 // CHECK13-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 9538 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]] 9539 // CHECK13: omp.dispatch.end: 9540 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 9541 // CHECK13-NEXT: ret void 9542 // 9543 // 9544 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131 9545 // CHECK13-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 9546 // CHECK13-NEXT: entry: 9547 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 9548 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 9549 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 9550 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..30 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 9551 // CHECK13-NEXT: ret void 9552 // 9553 // 9554 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..30 9555 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 9556 // CHECK13-NEXT: entry: 9557 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9558 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9559 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 9560 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9561 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 9562 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9563 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9564 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9565 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9566 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 9567 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9568 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9569 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 9570 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 9571 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 9572 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 9573 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9574 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9575 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9576 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 9577 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9578 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9579 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 9580 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9581 // CHECK13: cond.true: 9582 // CHECK13-NEXT: br label [[COND_END:%.*]] 9583 // CHECK13: cond.false: 9584 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9585 // CHECK13-NEXT: br label [[COND_END]] 9586 // CHECK13: cond.end: 9587 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 9588 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 9589 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9590 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 9591 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9592 // CHECK13: omp.inner.for.cond: 9593 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9594 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9595 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 9596 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9597 // CHECK13: omp.inner.for.body: 9598 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9599 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 9600 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9601 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 9602 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..31 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]) 9603 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9604 // CHECK13: omp.inner.for.inc: 9605 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9606 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9607 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 9608 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 9609 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 9610 // CHECK13: omp.inner.for.end: 9611 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9612 // CHECK13: omp.loop.exit: 9613 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 9614 // CHECK13-NEXT: ret void 9615 // 9616 // 9617 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..31 9618 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 9619 // CHECK13-NEXT: entry: 9620 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9621 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9622 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 9623 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 9624 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 9625 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9626 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 9627 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9628 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9629 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9630 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9631 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 9632 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9633 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9634 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9635 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9636 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 9637 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 9638 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 9639 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 9640 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9641 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 9642 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9643 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 9644 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 9645 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 9646 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9647 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9648 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9649 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9650 // CHECK13-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9651 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 9652 // CHECK13-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 9653 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 9654 // CHECK13: omp.dispatch.cond: 9655 // CHECK13-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 9656 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 9657 // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 9658 // CHECK13: omp.dispatch.body: 9659 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9660 // CHECK13-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 9661 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9662 // CHECK13: omp.inner.for.cond: 9663 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 9664 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21 9665 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 9666 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9667 // CHECK13: omp.inner.for.body: 9668 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 9669 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 9670 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9671 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21 9672 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21 9673 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 9674 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 9675 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21 9676 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9677 // CHECK13: omp.body.continue: 9678 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9679 // CHECK13: omp.inner.for.inc: 9680 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 9681 // CHECK13-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 9682 // CHECK13-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 9683 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]] 9684 // CHECK13: omp.inner.for.end: 9685 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 9686 // CHECK13: omp.dispatch.inc: 9687 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]] 9688 // CHECK13: omp.dispatch.end: 9689 // CHECK13-NEXT: ret void 9690 // 9691 // 9692 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136 9693 // CHECK13-SAME: (i64 noundef [[M:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 9694 // CHECK13-NEXT: entry: 9695 // CHECK13-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 9696 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 9697 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 9698 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 9699 // CHECK13-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 9700 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 9701 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* 9702 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 9703 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 9704 // CHECK13-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 9705 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9706 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 9707 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 9708 // CHECK13-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 9709 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..34 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]]) 9710 // CHECK13-NEXT: ret void 9711 // 9712 // 9713 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..34 9714 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 9715 // CHECK13-NEXT: entry: 9716 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9717 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9718 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 9719 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 9720 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9721 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 9722 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9723 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9724 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9725 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9726 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 9727 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 9728 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9729 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9730 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 9731 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 9732 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 9733 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 9734 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 9735 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 9736 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9737 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9738 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9739 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 9740 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9741 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9742 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 9743 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9744 // CHECK13: cond.true: 9745 // CHECK13-NEXT: br label [[COND_END:%.*]] 9746 // CHECK13: cond.false: 9747 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9748 // CHECK13-NEXT: br label [[COND_END]] 9749 // CHECK13: cond.end: 9750 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 9751 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 9752 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9753 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 9754 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9755 // CHECK13: omp.inner.for.cond: 9756 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9757 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9758 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 9759 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9760 // CHECK13: omp.inner.for.body: 9761 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9762 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 9763 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9764 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 9765 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 4 9766 // CHECK13-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 9767 // CHECK13-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4 9768 // CHECK13-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 9769 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..35 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]]) 9770 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9771 // CHECK13: omp.inner.for.inc: 9772 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9773 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9774 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 9775 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 9776 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 9777 // CHECK13: omp.inner.for.end: 9778 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9779 // CHECK13: omp.loop.exit: 9780 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 9781 // CHECK13-NEXT: ret void 9782 // 9783 // 9784 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..35 9785 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 9786 // CHECK13-NEXT: entry: 9787 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9788 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9789 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 9790 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 9791 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 9792 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 9793 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9794 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 9795 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9796 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9797 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9798 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9799 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 9800 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9801 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9802 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9803 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9804 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 9805 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 9806 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 9807 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 9808 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 9809 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 9810 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9811 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 9812 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9813 // CHECK13-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 9814 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4 9815 // CHECK13-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 9816 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9817 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9818 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4 9819 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9820 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9821 // CHECK13-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9822 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 9823 // CHECK13-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]]) 9824 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 9825 // CHECK13: omp.dispatch.cond: 9826 // CHECK13-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 9827 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0 9828 // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 9829 // CHECK13: omp.dispatch.body: 9830 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9831 // CHECK13-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 9832 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9833 // CHECK13: omp.inner.for.cond: 9834 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 9835 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !24 9836 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 9837 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9838 // CHECK13: omp.inner.for.body: 9839 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 9840 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 9841 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9842 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !24 9843 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !24 9844 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 9845 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 9846 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !24 9847 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9848 // CHECK13: omp.body.continue: 9849 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9850 // CHECK13: omp.inner.for.inc: 9851 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 9852 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1 9853 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 9854 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]] 9855 // CHECK13: omp.inner.for.end: 9856 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 9857 // CHECK13: omp.dispatch.inc: 9858 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]] 9859 // CHECK13: omp.dispatch.end: 9860 // CHECK13-NEXT: ret void 9861 // 9862 // 9863 // CHECK13-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 9864 // CHECK13-SAME: () #[[ATTR6:[0-9]+]] { 9865 // CHECK13-NEXT: entry: 9866 // CHECK13-NEXT: call void @__tgt_register_requires(i64 1) 9867 // CHECK13-NEXT: ret void 9868 // 9869 // 9870 // CHECK14-LABEL: define {{[^@]+}}@main 9871 // CHECK14-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 9872 // CHECK14-NEXT: entry: 9873 // CHECK14-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 9874 // CHECK14-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 9875 // CHECK14-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 9876 // CHECK14-NEXT: [[N:%.*]] = alloca i32, align 4 9877 // CHECK14-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 9878 // CHECK14-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 9879 // CHECK14-NEXT: [[M:%.*]] = alloca i32, align 4 9880 // CHECK14-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 9881 // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 9882 // CHECK14-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 9883 // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 9884 // CHECK14-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 9885 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 9886 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 9887 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 9888 // CHECK14-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8 9889 // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8 9890 // CHECK14-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8 9891 // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8 9892 // CHECK14-NEXT: [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8 9893 // CHECK14-NEXT: [[_TMP9:%.*]] = alloca i32, align 4 9894 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 9895 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4 9896 // CHECK14-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 9897 // CHECK14-NEXT: [[N_CASTED19:%.*]] = alloca i64, align 8 9898 // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [4 x i8*], align 8 9899 // CHECK14-NEXT: [[DOTOFFLOAD_PTRS22:%.*]] = alloca [4 x i8*], align 8 9900 // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [4 x i8*], align 8 9901 // CHECK14-NEXT: [[DOTOFFLOAD_SIZES24:%.*]] = alloca [4 x i64], align 8 9902 // CHECK14-NEXT: [[_TMP25:%.*]] = alloca i32, align 4 9903 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4 9904 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4 9905 // CHECK14-NEXT: [[N_CASTED34:%.*]] = alloca i64, align 8 9906 // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS36:%.*]] = alloca [3 x i8*], align 8 9907 // CHECK14-NEXT: [[DOTOFFLOAD_PTRS37:%.*]] = alloca [3 x i8*], align 8 9908 // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS38:%.*]] = alloca [3 x i8*], align 8 9909 // CHECK14-NEXT: [[DOTOFFLOAD_SIZES39:%.*]] = alloca [3 x i64], align 8 9910 // CHECK14-NEXT: [[_TMP40:%.*]] = alloca i32, align 4 9911 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4 9912 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4 9913 // CHECK14-NEXT: [[M_CASTED49:%.*]] = alloca i64, align 8 9914 // CHECK14-NEXT: [[N_CASTED51:%.*]] = alloca i64, align 8 9915 // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS53:%.*]] = alloca [4 x i8*], align 8 9916 // CHECK14-NEXT: [[DOTOFFLOAD_PTRS54:%.*]] = alloca [4 x i8*], align 8 9917 // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS55:%.*]] = alloca [4 x i8*], align 8 9918 // CHECK14-NEXT: [[DOTOFFLOAD_SIZES56:%.*]] = alloca [4 x i64], align 8 9919 // CHECK14-NEXT: [[_TMP57:%.*]] = alloca i32, align 4 9920 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4 9921 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_59:%.*]] = alloca i32, align 4 9922 // CHECK14-NEXT: store i32 0, i32* [[RETVAL]], align 4 9923 // CHECK14-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 9924 // CHECK14-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 9925 // CHECK14-NEXT: store i32 100, i32* [[N]], align 4 9926 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 9927 // CHECK14-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 9928 // CHECK14-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 9929 // CHECK14-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 9930 // CHECK14-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 9931 // CHECK14-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 9932 // CHECK14-NEXT: store i32 10, i32* [[M]], align 4 9933 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 9934 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 9935 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 9936 // CHECK14-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 9937 // CHECK14-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 9938 // CHECK14-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 9939 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP6]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes to i8*), i64 24, i1 false) 9940 // CHECK14-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 9941 // CHECK14-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 9942 // CHECK14-NEXT: store i64 [[TMP4]], i64* [[TMP8]], align 8 9943 // CHECK14-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 9944 // CHECK14-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 9945 // CHECK14-NEXT: store i64 [[TMP4]], i64* [[TMP10]], align 8 9946 // CHECK14-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 9947 // CHECK14-NEXT: store i8* null, i8** [[TMP11]], align 8 9948 // CHECK14-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 9949 // CHECK14-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 9950 // CHECK14-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8 9951 // CHECK14-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 9952 // CHECK14-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 9953 // CHECK14-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8 9954 // CHECK14-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 9955 // CHECK14-NEXT: store i8* null, i8** [[TMP16]], align 8 9956 // CHECK14-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 9957 // CHECK14-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 9958 // CHECK14-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 8 9959 // CHECK14-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 9960 // CHECK14-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 9961 // CHECK14-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 8 9962 // CHECK14-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 9963 // CHECK14-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 8 9964 // CHECK14-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 9965 // CHECK14-NEXT: store i8* null, i8** [[TMP22]], align 8 9966 // CHECK14-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 9967 // CHECK14-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 9968 // CHECK14-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 9969 // CHECK14-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 9970 // CHECK14-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 9971 // CHECK14-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9972 // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 9973 // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 9974 // CHECK14-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 9975 // CHECK14-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 9976 // CHECK14-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9977 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 9978 // CHECK14-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 9979 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP29]]) 9980 // CHECK14-NEXT: [[TMP30:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, i32 3, i8** [[TMP23]], i8** [[TMP24]], i64* [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 9981 // CHECK14-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 9982 // CHECK14-NEXT: br i1 [[TMP31]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 9983 // CHECK14: omp_offload.failed: 9984 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 9985 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT]] 9986 // CHECK14: omp_offload.cont: 9987 // CHECK14-NEXT: [[TMP32:%.*]] = load i32, i32* [[N]], align 4 9988 // CHECK14-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32* 9989 // CHECK14-NEXT: store i32 [[TMP32]], i32* [[CONV4]], align 4 9990 // CHECK14-NEXT: [[TMP33:%.*]] = load i64, i64* [[N_CASTED3]], align 8 9991 // CHECK14-NEXT: [[TMP34:%.*]] = mul nuw i64 [[TMP1]], 4 9992 // CHECK14-NEXT: [[TMP35:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES8]] to i8* 9993 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP35]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.4 to i8*), i64 24, i1 false) 9994 // CHECK14-NEXT: [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 9995 // CHECK14-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64* 9996 // CHECK14-NEXT: store i64 [[TMP33]], i64* [[TMP37]], align 8 9997 // CHECK14-NEXT: [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 9998 // CHECK14-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64* 9999 // CHECK14-NEXT: store i64 [[TMP33]], i64* [[TMP39]], align 8 10000 // CHECK14-NEXT: [[TMP40:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0 10001 // CHECK14-NEXT: store i8* null, i8** [[TMP40]], align 8 10002 // CHECK14-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 10003 // CHECK14-NEXT: [[TMP42:%.*]] = bitcast i8** [[TMP41]] to i64* 10004 // CHECK14-NEXT: store i64 [[TMP1]], i64* [[TMP42]], align 8 10005 // CHECK14-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 10006 // CHECK14-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i64* 10007 // CHECK14-NEXT: store i64 [[TMP1]], i64* [[TMP44]], align 8 10008 // CHECK14-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1 10009 // CHECK14-NEXT: store i8* null, i8** [[TMP45]], align 8 10010 // CHECK14-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2 10011 // CHECK14-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to i32** 10012 // CHECK14-NEXT: store i32* [[VLA]], i32** [[TMP47]], align 8 10013 // CHECK14-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2 10014 // CHECK14-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32** 10015 // CHECK14-NEXT: store i32* [[VLA]], i32** [[TMP49]], align 8 10016 // CHECK14-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2 10017 // CHECK14-NEXT: store i64 [[TMP34]], i64* [[TMP50]], align 8 10018 // CHECK14-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2 10019 // CHECK14-NEXT: store i8* null, i8** [[TMP51]], align 8 10020 // CHECK14-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 10021 // CHECK14-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 10022 // CHECK14-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0 10023 // CHECK14-NEXT: [[TMP55:%.*]] = load i32, i32* [[N]], align 4 10024 // CHECK14-NEXT: store i32 [[TMP55]], i32* [[DOTCAPTURE_EXPR_10]], align 4 10025 // CHECK14-NEXT: [[TMP56:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 10026 // CHECK14-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP56]], 0 10027 // CHECK14-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1 10028 // CHECK14-NEXT: [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1 10029 // CHECK14-NEXT: store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4 10030 // CHECK14-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 10031 // CHECK14-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP57]], 1 10032 // CHECK14-NEXT: [[TMP58:%.*]] = zext i32 [[ADD15]] to i64 10033 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP58]]) 10034 // CHECK14-NEXT: [[TMP59:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, i32 3, i8** [[TMP52]], i8** [[TMP53]], i64* [[TMP54]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 10035 // CHECK14-NEXT: [[TMP60:%.*]] = icmp ne i32 [[TMP59]], 0 10036 // CHECK14-NEXT: br i1 [[TMP60]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 10037 // CHECK14: omp_offload.failed16: 10038 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i64 [[TMP33]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 10039 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT17]] 10040 // CHECK14: omp_offload.cont17: 10041 // CHECK14-NEXT: [[TMP61:%.*]] = load i32, i32* [[M]], align 4 10042 // CHECK14-NEXT: [[CONV18:%.*]] = bitcast i64* [[M_CASTED]] to i32* 10043 // CHECK14-NEXT: store i32 [[TMP61]], i32* [[CONV18]], align 4 10044 // CHECK14-NEXT: [[TMP62:%.*]] = load i64, i64* [[M_CASTED]], align 8 10045 // CHECK14-NEXT: [[TMP63:%.*]] = load i32, i32* [[N]], align 4 10046 // CHECK14-NEXT: [[CONV20:%.*]] = bitcast i64* [[N_CASTED19]] to i32* 10047 // CHECK14-NEXT: store i32 [[TMP63]], i32* [[CONV20]], align 4 10048 // CHECK14-NEXT: [[TMP64:%.*]] = load i64, i64* [[N_CASTED19]], align 8 10049 // CHECK14-NEXT: [[TMP65:%.*]] = mul nuw i64 [[TMP1]], 4 10050 // CHECK14-NEXT: [[TMP66:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES24]] to i8* 10051 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP66]], i8* align 8 bitcast ([4 x i64]* @.offload_sizes.8 to i8*), i64 32, i1 false) 10052 // CHECK14-NEXT: [[TMP67:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 10053 // CHECK14-NEXT: [[TMP68:%.*]] = bitcast i8** [[TMP67]] to i64* 10054 // CHECK14-NEXT: store i64 [[TMP62]], i64* [[TMP68]], align 8 10055 // CHECK14-NEXT: [[TMP69:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 10056 // CHECK14-NEXT: [[TMP70:%.*]] = bitcast i8** [[TMP69]] to i64* 10057 // CHECK14-NEXT: store i64 [[TMP62]], i64* [[TMP70]], align 8 10058 // CHECK14-NEXT: [[TMP71:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0 10059 // CHECK14-NEXT: store i8* null, i8** [[TMP71]], align 8 10060 // CHECK14-NEXT: [[TMP72:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1 10061 // CHECK14-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to i64* 10062 // CHECK14-NEXT: store i64 [[TMP64]], i64* [[TMP73]], align 8 10063 // CHECK14-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1 10064 // CHECK14-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i64* 10065 // CHECK14-NEXT: store i64 [[TMP64]], i64* [[TMP75]], align 8 10066 // CHECK14-NEXT: [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1 10067 // CHECK14-NEXT: store i8* null, i8** [[TMP76]], align 8 10068 // CHECK14-NEXT: [[TMP77:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 2 10069 // CHECK14-NEXT: [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i64* 10070 // CHECK14-NEXT: store i64 [[TMP1]], i64* [[TMP78]], align 8 10071 // CHECK14-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 2 10072 // CHECK14-NEXT: [[TMP80:%.*]] = bitcast i8** [[TMP79]] to i64* 10073 // CHECK14-NEXT: store i64 [[TMP1]], i64* [[TMP80]], align 8 10074 // CHECK14-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 2 10075 // CHECK14-NEXT: store i8* null, i8** [[TMP81]], align 8 10076 // CHECK14-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 3 10077 // CHECK14-NEXT: [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i32** 10078 // CHECK14-NEXT: store i32* [[VLA]], i32** [[TMP83]], align 8 10079 // CHECK14-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 3 10080 // CHECK14-NEXT: [[TMP85:%.*]] = bitcast i8** [[TMP84]] to i32** 10081 // CHECK14-NEXT: store i32* [[VLA]], i32** [[TMP85]], align 8 10082 // CHECK14-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 3 10083 // CHECK14-NEXT: store i64 [[TMP65]], i64* [[TMP86]], align 8 10084 // CHECK14-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 3 10085 // CHECK14-NEXT: store i8* null, i8** [[TMP87]], align 8 10086 // CHECK14-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 10087 // CHECK14-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 10088 // CHECK14-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0 10089 // CHECK14-NEXT: [[TMP91:%.*]] = load i32, i32* [[N]], align 4 10090 // CHECK14-NEXT: store i32 [[TMP91]], i32* [[DOTCAPTURE_EXPR_26]], align 4 10091 // CHECK14-NEXT: [[TMP92:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 10092 // CHECK14-NEXT: [[SUB28:%.*]] = sub nsw i32 [[TMP92]], 0 10093 // CHECK14-NEXT: [[DIV29:%.*]] = sdiv i32 [[SUB28]], 1 10094 // CHECK14-NEXT: [[SUB30:%.*]] = sub nsw i32 [[DIV29]], 1 10095 // CHECK14-NEXT: store i32 [[SUB30]], i32* [[DOTCAPTURE_EXPR_27]], align 4 10096 // CHECK14-NEXT: [[TMP93:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 10097 // CHECK14-NEXT: [[ADD31:%.*]] = add nsw i32 [[TMP93]], 1 10098 // CHECK14-NEXT: [[TMP94:%.*]] = zext i32 [[ADD31]] to i64 10099 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP94]]) 10100 // CHECK14-NEXT: [[TMP95:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, i32 4, i8** [[TMP88]], i8** [[TMP89]], i64* [[TMP90]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 10101 // CHECK14-NEXT: [[TMP96:%.*]] = icmp ne i32 [[TMP95]], 0 10102 // CHECK14-NEXT: br i1 [[TMP96]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]] 10103 // CHECK14: omp_offload.failed32: 10104 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i64 [[TMP62]], i64 [[TMP64]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 10105 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT33]] 10106 // CHECK14: omp_offload.cont33: 10107 // CHECK14-NEXT: [[TMP97:%.*]] = load i32, i32* [[N]], align 4 10108 // CHECK14-NEXT: [[CONV35:%.*]] = bitcast i64* [[N_CASTED34]] to i32* 10109 // CHECK14-NEXT: store i32 [[TMP97]], i32* [[CONV35]], align 4 10110 // CHECK14-NEXT: [[TMP98:%.*]] = load i64, i64* [[N_CASTED34]], align 8 10111 // CHECK14-NEXT: [[TMP99:%.*]] = mul nuw i64 [[TMP1]], 4 10112 // CHECK14-NEXT: [[TMP100:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES39]] to i8* 10113 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP100]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.12 to i8*), i64 24, i1 false) 10114 // CHECK14-NEXT: [[TMP101:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0 10115 // CHECK14-NEXT: [[TMP102:%.*]] = bitcast i8** [[TMP101]] to i64* 10116 // CHECK14-NEXT: store i64 [[TMP98]], i64* [[TMP102]], align 8 10117 // CHECK14-NEXT: [[TMP103:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0 10118 // CHECK14-NEXT: [[TMP104:%.*]] = bitcast i8** [[TMP103]] to i64* 10119 // CHECK14-NEXT: store i64 [[TMP98]], i64* [[TMP104]], align 8 10120 // CHECK14-NEXT: [[TMP105:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 0 10121 // CHECK14-NEXT: store i8* null, i8** [[TMP105]], align 8 10122 // CHECK14-NEXT: [[TMP106:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 1 10123 // CHECK14-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to i64* 10124 // CHECK14-NEXT: store i64 [[TMP1]], i64* [[TMP107]], align 8 10125 // CHECK14-NEXT: [[TMP108:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 1 10126 // CHECK14-NEXT: [[TMP109:%.*]] = bitcast i8** [[TMP108]] to i64* 10127 // CHECK14-NEXT: store i64 [[TMP1]], i64* [[TMP109]], align 8 10128 // CHECK14-NEXT: [[TMP110:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 1 10129 // CHECK14-NEXT: store i8* null, i8** [[TMP110]], align 8 10130 // CHECK14-NEXT: [[TMP111:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 2 10131 // CHECK14-NEXT: [[TMP112:%.*]] = bitcast i8** [[TMP111]] to i32** 10132 // CHECK14-NEXT: store i32* [[VLA]], i32** [[TMP112]], align 8 10133 // CHECK14-NEXT: [[TMP113:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 2 10134 // CHECK14-NEXT: [[TMP114:%.*]] = bitcast i8** [[TMP113]] to i32** 10135 // CHECK14-NEXT: store i32* [[VLA]], i32** [[TMP114]], align 8 10136 // CHECK14-NEXT: [[TMP115:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 2 10137 // CHECK14-NEXT: store i64 [[TMP99]], i64* [[TMP115]], align 8 10138 // CHECK14-NEXT: [[TMP116:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 2 10139 // CHECK14-NEXT: store i8* null, i8** [[TMP116]], align 8 10140 // CHECK14-NEXT: [[TMP117:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0 10141 // CHECK14-NEXT: [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0 10142 // CHECK14-NEXT: [[TMP119:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0 10143 // CHECK14-NEXT: [[TMP120:%.*]] = load i32, i32* [[N]], align 4 10144 // CHECK14-NEXT: store i32 [[TMP120]], i32* [[DOTCAPTURE_EXPR_41]], align 4 10145 // CHECK14-NEXT: [[TMP121:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4 10146 // CHECK14-NEXT: [[SUB43:%.*]] = sub nsw i32 [[TMP121]], 0 10147 // CHECK14-NEXT: [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1 10148 // CHECK14-NEXT: [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 1 10149 // CHECK14-NEXT: store i32 [[SUB45]], i32* [[DOTCAPTURE_EXPR_42]], align 4 10150 // CHECK14-NEXT: [[TMP122:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_42]], align 4 10151 // CHECK14-NEXT: [[ADD46:%.*]] = add nsw i32 [[TMP122]], 1 10152 // CHECK14-NEXT: [[TMP123:%.*]] = zext i32 [[ADD46]] to i64 10153 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP123]]) 10154 // CHECK14-NEXT: [[TMP124:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, i32 3, i8** [[TMP117]], i8** [[TMP118]], i64* [[TMP119]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 10155 // CHECK14-NEXT: [[TMP125:%.*]] = icmp ne i32 [[TMP124]], 0 10156 // CHECK14-NEXT: br i1 [[TMP125]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]] 10157 // CHECK14: omp_offload.failed47: 10158 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i64 [[TMP98]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 10159 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT48]] 10160 // CHECK14: omp_offload.cont48: 10161 // CHECK14-NEXT: [[TMP126:%.*]] = load i32, i32* [[M]], align 4 10162 // CHECK14-NEXT: [[CONV50:%.*]] = bitcast i64* [[M_CASTED49]] to i32* 10163 // CHECK14-NEXT: store i32 [[TMP126]], i32* [[CONV50]], align 4 10164 // CHECK14-NEXT: [[TMP127:%.*]] = load i64, i64* [[M_CASTED49]], align 8 10165 // CHECK14-NEXT: [[TMP128:%.*]] = load i32, i32* [[N]], align 4 10166 // CHECK14-NEXT: [[CONV52:%.*]] = bitcast i64* [[N_CASTED51]] to i32* 10167 // CHECK14-NEXT: store i32 [[TMP128]], i32* [[CONV52]], align 4 10168 // CHECK14-NEXT: [[TMP129:%.*]] = load i64, i64* [[N_CASTED51]], align 8 10169 // CHECK14-NEXT: [[TMP130:%.*]] = mul nuw i64 [[TMP1]], 4 10170 // CHECK14-NEXT: [[TMP131:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES56]] to i8* 10171 // CHECK14-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP131]], i8* align 8 bitcast ([4 x i64]* @.offload_sizes.16 to i8*), i64 32, i1 false) 10172 // CHECK14-NEXT: [[TMP132:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0 10173 // CHECK14-NEXT: [[TMP133:%.*]] = bitcast i8** [[TMP132]] to i64* 10174 // CHECK14-NEXT: store i64 [[TMP127]], i64* [[TMP133]], align 8 10175 // CHECK14-NEXT: [[TMP134:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0 10176 // CHECK14-NEXT: [[TMP135:%.*]] = bitcast i8** [[TMP134]] to i64* 10177 // CHECK14-NEXT: store i64 [[TMP127]], i64* [[TMP135]], align 8 10178 // CHECK14-NEXT: [[TMP136:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 0 10179 // CHECK14-NEXT: store i8* null, i8** [[TMP136]], align 8 10180 // CHECK14-NEXT: [[TMP137:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 1 10181 // CHECK14-NEXT: [[TMP138:%.*]] = bitcast i8** [[TMP137]] to i64* 10182 // CHECK14-NEXT: store i64 [[TMP129]], i64* [[TMP138]], align 8 10183 // CHECK14-NEXT: [[TMP139:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 1 10184 // CHECK14-NEXT: [[TMP140:%.*]] = bitcast i8** [[TMP139]] to i64* 10185 // CHECK14-NEXT: store i64 [[TMP129]], i64* [[TMP140]], align 8 10186 // CHECK14-NEXT: [[TMP141:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 1 10187 // CHECK14-NEXT: store i8* null, i8** [[TMP141]], align 8 10188 // CHECK14-NEXT: [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 2 10189 // CHECK14-NEXT: [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i64* 10190 // CHECK14-NEXT: store i64 [[TMP1]], i64* [[TMP143]], align 8 10191 // CHECK14-NEXT: [[TMP144:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 2 10192 // CHECK14-NEXT: [[TMP145:%.*]] = bitcast i8** [[TMP144]] to i64* 10193 // CHECK14-NEXT: store i64 [[TMP1]], i64* [[TMP145]], align 8 10194 // CHECK14-NEXT: [[TMP146:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 2 10195 // CHECK14-NEXT: store i8* null, i8** [[TMP146]], align 8 10196 // CHECK14-NEXT: [[TMP147:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 3 10197 // CHECK14-NEXT: [[TMP148:%.*]] = bitcast i8** [[TMP147]] to i32** 10198 // CHECK14-NEXT: store i32* [[VLA]], i32** [[TMP148]], align 8 10199 // CHECK14-NEXT: [[TMP149:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 3 10200 // CHECK14-NEXT: [[TMP150:%.*]] = bitcast i8** [[TMP149]] to i32** 10201 // CHECK14-NEXT: store i32* [[VLA]], i32** [[TMP150]], align 8 10202 // CHECK14-NEXT: [[TMP151:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 3 10203 // CHECK14-NEXT: store i64 [[TMP130]], i64* [[TMP151]], align 8 10204 // CHECK14-NEXT: [[TMP152:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 3 10205 // CHECK14-NEXT: store i8* null, i8** [[TMP152]], align 8 10206 // CHECK14-NEXT: [[TMP153:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0 10207 // CHECK14-NEXT: [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0 10208 // CHECK14-NEXT: [[TMP155:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0 10209 // CHECK14-NEXT: [[TMP156:%.*]] = load i32, i32* [[N]], align 4 10210 // CHECK14-NEXT: store i32 [[TMP156]], i32* [[DOTCAPTURE_EXPR_58]], align 4 10211 // CHECK14-NEXT: [[TMP157:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_58]], align 4 10212 // CHECK14-NEXT: [[SUB60:%.*]] = sub nsw i32 [[TMP157]], 0 10213 // CHECK14-NEXT: [[DIV61:%.*]] = sdiv i32 [[SUB60]], 1 10214 // CHECK14-NEXT: [[SUB62:%.*]] = sub nsw i32 [[DIV61]], 1 10215 // CHECK14-NEXT: store i32 [[SUB62]], i32* [[DOTCAPTURE_EXPR_59]], align 4 10216 // CHECK14-NEXT: [[TMP158:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_59]], align 4 10217 // CHECK14-NEXT: [[ADD63:%.*]] = add nsw i32 [[TMP158]], 1 10218 // CHECK14-NEXT: [[TMP159:%.*]] = zext i32 [[ADD63]] to i64 10219 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP159]]) 10220 // CHECK14-NEXT: [[TMP160:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, i32 4, i8** [[TMP153]], i8** [[TMP154]], i64* [[TMP155]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 10221 // CHECK14-NEXT: [[TMP161:%.*]] = icmp ne i32 [[TMP160]], 0 10222 // CHECK14-NEXT: br i1 [[TMP161]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]] 10223 // CHECK14: omp_offload.failed64: 10224 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i64 [[TMP127]], i64 [[TMP129]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 10225 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT65]] 10226 // CHECK14: omp_offload.cont65: 10227 // CHECK14-NEXT: [[TMP162:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 10228 // CHECK14-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP162]]) 10229 // CHECK14-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 10230 // CHECK14-NEXT: [[TMP163:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 10231 // CHECK14-NEXT: call void @llvm.stackrestore(i8* [[TMP163]]) 10232 // CHECK14-NEXT: [[TMP164:%.*]] = load i32, i32* [[RETVAL]], align 4 10233 // CHECK14-NEXT: ret i32 [[TMP164]] 10234 // 10235 // 10236 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148 10237 // CHECK14-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 10238 // CHECK14-NEXT: entry: 10239 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 10240 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 10241 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 10242 // CHECK14-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 10243 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 10244 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 10245 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 10246 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 10247 // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 10248 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 10249 // CHECK14-NEXT: ret void 10250 // 10251 // 10252 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined. 10253 // CHECK14-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 10254 // CHECK14-NEXT: entry: 10255 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10256 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10257 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 10258 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 10259 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 10260 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10261 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 10262 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 10263 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10264 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 10265 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 10266 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 10267 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10268 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10269 // CHECK14-NEXT: [[I3:%.*]] = alloca i32, align 4 10270 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10271 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10272 // CHECK14-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 10273 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 10274 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 10275 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 10276 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 10277 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 10278 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 10279 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 10280 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10281 // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 10282 // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10283 // CHECK14-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 10284 // CHECK14-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 10285 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 10286 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10287 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 10288 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 10289 // CHECK14: omp.precond.then: 10290 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 10291 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10292 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 10293 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10294 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10295 // CHECK14-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10296 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 10297 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10298 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10299 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10300 // CHECK14-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 10301 // CHECK14-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10302 // CHECK14: cond.true: 10303 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10304 // CHECK14-NEXT: br label [[COND_END:%.*]] 10305 // CHECK14: cond.false: 10306 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10307 // CHECK14-NEXT: br label [[COND_END]] 10308 // CHECK14: cond.end: 10309 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 10310 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 10311 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10312 // CHECK14-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 10313 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10314 // CHECK14: omp.inner.for.cond: 10315 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10316 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10317 // CHECK14-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 10318 // CHECK14-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10319 // CHECK14: omp.inner.for.body: 10320 // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10321 // CHECK14-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 10322 // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10323 // CHECK14-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 10324 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 10325 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10326 // CHECK14: omp.inner.for.inc: 10327 // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10328 // CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 10329 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 10330 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 10331 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 10332 // CHECK14: omp.inner.for.end: 10333 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10334 // CHECK14: omp.loop.exit: 10335 // CHECK14-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10336 // CHECK14-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 10337 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 10338 // CHECK14-NEXT: br label [[OMP_PRECOND_END]] 10339 // CHECK14: omp.precond.end: 10340 // CHECK14-NEXT: ret void 10341 // 10342 // 10343 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..1 10344 // CHECK14-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 10345 // CHECK14-NEXT: entry: 10346 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10347 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10348 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 10349 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 10350 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 10351 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 10352 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 10353 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10354 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 10355 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 10356 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10357 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 10358 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10359 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10360 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10361 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10362 // CHECK14-NEXT: [[I4:%.*]] = alloca i32, align 4 10363 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10364 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10365 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10366 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10367 // CHECK14-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 10368 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 10369 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 10370 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 10371 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 10372 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 10373 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 10374 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 10375 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10376 // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 10377 // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10378 // CHECK14-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 10379 // CHECK14-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 10380 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 10381 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10382 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 10383 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 10384 // CHECK14: omp.precond.then: 10385 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 10386 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10387 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 10388 // CHECK14-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10389 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 10390 // CHECK14-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10391 // CHECK14-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 10392 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 10393 // CHECK14-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 10394 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10395 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10396 // CHECK14-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10397 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 10398 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10399 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10400 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10401 // CHECK14-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 10402 // CHECK14-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10403 // CHECK14: cond.true: 10404 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10405 // CHECK14-NEXT: br label [[COND_END:%.*]] 10406 // CHECK14: cond.false: 10407 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10408 // CHECK14-NEXT: br label [[COND_END]] 10409 // CHECK14: cond.end: 10410 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 10411 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 10412 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 10413 // CHECK14-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 10414 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10415 // CHECK14: omp.inner.for.cond: 10416 // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10417 // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10418 // CHECK14-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 10419 // CHECK14-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10420 // CHECK14: omp.inner.for.body: 10421 // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10422 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 10423 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10424 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 10425 // CHECK14-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4 10426 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 10427 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 10428 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 10429 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10430 // CHECK14: omp.body.continue: 10431 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10432 // CHECK14: omp.inner.for.inc: 10433 // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10434 // CHECK14-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 10435 // CHECK14-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 10436 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 10437 // CHECK14: omp.inner.for.end: 10438 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10439 // CHECK14: omp.loop.exit: 10440 // CHECK14-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10441 // CHECK14-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 10442 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 10443 // CHECK14-NEXT: br label [[OMP_PRECOND_END]] 10444 // CHECK14: omp.precond.end: 10445 // CHECK14-NEXT: ret void 10446 // 10447 // 10448 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153 10449 // CHECK14-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 10450 // CHECK14-NEXT: entry: 10451 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 10452 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 10453 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 10454 // CHECK14-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 10455 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 10456 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 10457 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 10458 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 10459 // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 10460 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 10461 // CHECK14-NEXT: ret void 10462 // 10463 // 10464 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..2 10465 // CHECK14-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 10466 // CHECK14-NEXT: entry: 10467 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10468 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10469 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 10470 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 10471 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 10472 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10473 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 10474 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 10475 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10476 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 10477 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 10478 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 10479 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10480 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10481 // CHECK14-NEXT: [[I3:%.*]] = alloca i32, align 4 10482 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10483 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10484 // CHECK14-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 10485 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 10486 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 10487 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 10488 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 10489 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 10490 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 10491 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 10492 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10493 // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 10494 // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10495 // CHECK14-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 10496 // CHECK14-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 10497 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 10498 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10499 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 10500 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 10501 // CHECK14: omp.precond.then: 10502 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 10503 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10504 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 10505 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10506 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10507 // CHECK14-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10508 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 10509 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10510 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10511 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10512 // CHECK14-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 10513 // CHECK14-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10514 // CHECK14: cond.true: 10515 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10516 // CHECK14-NEXT: br label [[COND_END:%.*]] 10517 // CHECK14: cond.false: 10518 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10519 // CHECK14-NEXT: br label [[COND_END]] 10520 // CHECK14: cond.end: 10521 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 10522 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 10523 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10524 // CHECK14-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 10525 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10526 // CHECK14: omp.inner.for.cond: 10527 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10528 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10529 // CHECK14-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 10530 // CHECK14-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10531 // CHECK14: omp.inner.for.body: 10532 // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10533 // CHECK14-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 10534 // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10535 // CHECK14-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 10536 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 10537 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10538 // CHECK14: omp.inner.for.inc: 10539 // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10540 // CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 10541 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 10542 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 10543 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 10544 // CHECK14: omp.inner.for.end: 10545 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10546 // CHECK14: omp.loop.exit: 10547 // CHECK14-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10548 // CHECK14-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 10549 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 10550 // CHECK14-NEXT: br label [[OMP_PRECOND_END]] 10551 // CHECK14: omp.precond.end: 10552 // CHECK14-NEXT: ret void 10553 // 10554 // 10555 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..3 10556 // CHECK14-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 10557 // CHECK14-NEXT: entry: 10558 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10559 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10560 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 10561 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 10562 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 10563 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 10564 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 10565 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10566 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 10567 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 10568 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10569 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 10570 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10571 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10572 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10573 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10574 // CHECK14-NEXT: [[I4:%.*]] = alloca i32, align 4 10575 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10576 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10577 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10578 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10579 // CHECK14-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 10580 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 10581 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 10582 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 10583 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 10584 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 10585 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 10586 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 10587 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10588 // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 10589 // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10590 // CHECK14-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 10591 // CHECK14-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 10592 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 10593 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10594 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 10595 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 10596 // CHECK14: omp.precond.then: 10597 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 10598 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10599 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 10600 // CHECK14-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10601 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 10602 // CHECK14-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10603 // CHECK14-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 10604 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 10605 // CHECK14-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 10606 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10607 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10608 // CHECK14-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10609 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 10610 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10611 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10612 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10613 // CHECK14-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 10614 // CHECK14-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10615 // CHECK14: cond.true: 10616 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10617 // CHECK14-NEXT: br label [[COND_END:%.*]] 10618 // CHECK14: cond.false: 10619 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10620 // CHECK14-NEXT: br label [[COND_END]] 10621 // CHECK14: cond.end: 10622 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 10623 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 10624 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 10625 // CHECK14-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 10626 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10627 // CHECK14: omp.inner.for.cond: 10628 // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10629 // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10630 // CHECK14-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 10631 // CHECK14-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10632 // CHECK14: omp.inner.for.body: 10633 // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10634 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 10635 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10636 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 10637 // CHECK14-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4 10638 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 10639 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 10640 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 10641 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10642 // CHECK14: omp.body.continue: 10643 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10644 // CHECK14: omp.inner.for.inc: 10645 // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10646 // CHECK14-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 10647 // CHECK14-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 10648 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 10649 // CHECK14: omp.inner.for.end: 10650 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10651 // CHECK14: omp.loop.exit: 10652 // CHECK14-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10653 // CHECK14-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 10654 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 10655 // CHECK14-NEXT: br label [[OMP_PRECOND_END]] 10656 // CHECK14: omp.precond.end: 10657 // CHECK14-NEXT: ret void 10658 // 10659 // 10660 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158 10661 // CHECK14-SAME: (i64 noundef [[M:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 10662 // CHECK14-NEXT: entry: 10663 // CHECK14-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 10664 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 10665 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 10666 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 10667 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 10668 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 10669 // CHECK14-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 10670 // CHECK14-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 10671 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 10672 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 10673 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* 10674 // CHECK14-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 10675 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 10676 // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 10677 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 10678 // CHECK14-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 10679 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10680 // CHECK14-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 10681 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4 10682 // CHECK14-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 10683 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]]) 10684 // CHECK14-NEXT: ret void 10685 // 10686 // 10687 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..6 10688 // CHECK14-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 10689 // CHECK14-NEXT: entry: 10690 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10691 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10692 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 10693 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 10694 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 10695 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 10696 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10697 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 10698 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10699 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 10700 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 10701 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 10702 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 10703 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10704 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10705 // CHECK14-NEXT: [[I4:%.*]] = alloca i32, align 4 10706 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 10707 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10708 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10709 // CHECK14-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 10710 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 10711 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 10712 // CHECK14-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 10713 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 10714 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 10715 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 10716 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 10717 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 10718 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 10719 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10720 // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 10721 // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10722 // CHECK14-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 10723 // CHECK14-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 10724 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 10725 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10726 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 10727 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 10728 // CHECK14: omp.precond.then: 10729 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 10730 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 10731 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 10732 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10733 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10734 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[CONV]], align 4 10735 // CHECK14-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10736 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 10737 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]]) 10738 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10739 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 10740 // CHECK14-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 10741 // CHECK14-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10742 // CHECK14: cond.true: 10743 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 10744 // CHECK14-NEXT: br label [[COND_END:%.*]] 10745 // CHECK14: cond.false: 10746 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10747 // CHECK14-NEXT: br label [[COND_END]] 10748 // CHECK14: cond.end: 10749 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 10750 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 10751 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10752 // CHECK14-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 10753 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10754 // CHECK14: omp.inner.for.cond: 10755 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10756 // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 10757 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1 10758 // CHECK14-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]] 10759 // CHECK14-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10760 // CHECK14: omp.inner.for.body: 10761 // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10762 // CHECK14-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 10763 // CHECK14-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10764 // CHECK14-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 10765 // CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV]], align 4 10766 // CHECK14-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 10767 // CHECK14-NEXT: store i32 [[TMP21]], i32* [[CONV7]], align 4 10768 // CHECK14-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 10769 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP22]]) 10770 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10771 // CHECK14: omp.inner.for.inc: 10772 // CHECK14-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10773 // CHECK14-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 10774 // CHECK14-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 10775 // CHECK14-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 10776 // CHECK14-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10777 // CHECK14-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 10778 // CHECK14-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 10779 // CHECK14-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4 10780 // CHECK14-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10781 // CHECK14-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 10782 // CHECK14-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP27]], [[TMP28]] 10783 // CHECK14-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4 10784 // CHECK14-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10785 // CHECK14-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 10786 // CHECK14-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]] 10787 // CHECK14-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]] 10788 // CHECK14: cond.true12: 10789 // CHECK14-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 10790 // CHECK14-NEXT: br label [[COND_END14:%.*]] 10791 // CHECK14: cond.false13: 10792 // CHECK14-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10793 // CHECK14-NEXT: br label [[COND_END14]] 10794 // CHECK14: cond.end14: 10795 // CHECK14-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE12]] ], [ [[TMP32]], [[COND_FALSE13]] ] 10796 // CHECK14-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4 10797 // CHECK14-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10798 // CHECK14-NEXT: store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4 10799 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 10800 // CHECK14: omp.inner.for.end: 10801 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10802 // CHECK14: omp.loop.exit: 10803 // CHECK14-NEXT: [[TMP34:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10804 // CHECK14-NEXT: [[TMP35:%.*]] = load i32, i32* [[TMP34]], align 4 10805 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP35]]) 10806 // CHECK14-NEXT: br label [[OMP_PRECOND_END]] 10807 // CHECK14: omp.precond.end: 10808 // CHECK14-NEXT: ret void 10809 // 10810 // 10811 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..7 10812 // CHECK14-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 10813 // CHECK14-NEXT: entry: 10814 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10815 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10816 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 10817 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 10818 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 10819 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 10820 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 10821 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 10822 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10823 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 10824 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10825 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 10826 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 10827 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10828 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10829 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10830 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10831 // CHECK14-NEXT: [[I6:%.*]] = alloca i32, align 4 10832 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10833 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10834 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10835 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10836 // CHECK14-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 10837 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 10838 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 10839 // CHECK14-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 10840 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 10841 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 10842 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 10843 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 10844 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 10845 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 10846 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10847 // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 10848 // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10849 // CHECK14-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 10850 // CHECK14-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 10851 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 10852 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10853 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 10854 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 10855 // CHECK14: omp.precond.then: 10856 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 10857 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 10858 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 10859 // CHECK14-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10860 // CHECK14-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32 10861 // CHECK14-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10862 // CHECK14-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32 10863 // CHECK14-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 10864 // CHECK14-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 10865 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10866 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10867 // CHECK14-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10868 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 10869 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10870 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10871 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 10872 // CHECK14-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 10873 // CHECK14-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10874 // CHECK14: cond.true: 10875 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 10876 // CHECK14-NEXT: br label [[COND_END:%.*]] 10877 // CHECK14: cond.false: 10878 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10879 // CHECK14-NEXT: br label [[COND_END]] 10880 // CHECK14: cond.end: 10881 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 10882 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 10883 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 10884 // CHECK14-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 10885 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10886 // CHECK14: omp.inner.for.cond: 10887 // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10888 // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10889 // CHECK14-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 10890 // CHECK14-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10891 // CHECK14: omp.inner.for.body: 10892 // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10893 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 10894 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10895 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I6]], align 4 10896 // CHECK14-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4 10897 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 10898 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 10899 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 10900 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10901 // CHECK14: omp.body.continue: 10902 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10903 // CHECK14: omp.inner.for.inc: 10904 // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10905 // CHECK14-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1 10906 // CHECK14-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 10907 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 10908 // CHECK14: omp.inner.for.end: 10909 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10910 // CHECK14: omp.loop.exit: 10911 // CHECK14-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10912 // CHECK14-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 10913 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 10914 // CHECK14-NEXT: br label [[OMP_PRECOND_END]] 10915 // CHECK14: omp.precond.end: 10916 // CHECK14-NEXT: ret void 10917 // 10918 // 10919 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163 10920 // CHECK14-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 10921 // CHECK14-NEXT: entry: 10922 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 10923 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 10924 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 10925 // CHECK14-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 10926 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 10927 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 10928 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 10929 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 10930 // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 10931 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 10932 // CHECK14-NEXT: ret void 10933 // 10934 // 10935 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..10 10936 // CHECK14-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 10937 // CHECK14-NEXT: entry: 10938 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10939 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10940 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 10941 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 10942 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 10943 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10944 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 10945 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 10946 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10947 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 10948 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 10949 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 10950 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10951 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10952 // CHECK14-NEXT: [[I3:%.*]] = alloca i32, align 4 10953 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10954 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10955 // CHECK14-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 10956 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 10957 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 10958 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 10959 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 10960 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 10961 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 10962 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 10963 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10964 // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 10965 // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10966 // CHECK14-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 10967 // CHECK14-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 10968 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 10969 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10970 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 10971 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 10972 // CHECK14: omp.precond.then: 10973 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 10974 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10975 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 10976 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10977 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10978 // CHECK14-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10979 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 10980 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10981 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10982 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10983 // CHECK14-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 10984 // CHECK14-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10985 // CHECK14: cond.true: 10986 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10987 // CHECK14-NEXT: br label [[COND_END:%.*]] 10988 // CHECK14: cond.false: 10989 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10990 // CHECK14-NEXT: br label [[COND_END]] 10991 // CHECK14: cond.end: 10992 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 10993 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 10994 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10995 // CHECK14-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 10996 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10997 // CHECK14: omp.inner.for.cond: 10998 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10999 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11000 // CHECK14-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 11001 // CHECK14-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11002 // CHECK14: omp.inner.for.body: 11003 // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11004 // CHECK14-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 11005 // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11006 // CHECK14-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 11007 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 11008 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11009 // CHECK14: omp.inner.for.inc: 11010 // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11011 // CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 11012 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 11013 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 11014 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 11015 // CHECK14: omp.inner.for.end: 11016 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11017 // CHECK14: omp.loop.exit: 11018 // CHECK14-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11019 // CHECK14-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 11020 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 11021 // CHECK14-NEXT: br label [[OMP_PRECOND_END]] 11022 // CHECK14: omp.precond.end: 11023 // CHECK14-NEXT: ret void 11024 // 11025 // 11026 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..11 11027 // CHECK14-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 11028 // CHECK14-NEXT: entry: 11029 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11030 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11031 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 11032 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 11033 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 11034 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 11035 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 11036 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11037 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 11038 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 11039 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11040 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 11041 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 11042 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 11043 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11044 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11045 // CHECK14-NEXT: [[I4:%.*]] = alloca i32, align 4 11046 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11047 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11048 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 11049 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11050 // CHECK14-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 11051 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 11052 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 11053 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 11054 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 11055 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 11056 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 11057 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 11058 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11059 // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 11060 // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11061 // CHECK14-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 11062 // CHECK14-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 11063 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 11064 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11065 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 11066 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11067 // CHECK14: omp.precond.then: 11068 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 11069 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11070 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 11071 // CHECK14-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 11072 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 11073 // CHECK14-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11074 // CHECK14-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 11075 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 11076 // CHECK14-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 11077 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11078 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11079 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 11080 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11081 // CHECK14-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11082 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 11083 // CHECK14-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1) 11084 // CHECK14-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 11085 // CHECK14: omp.dispatch.cond: 11086 // CHECK14-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11087 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 11088 // CHECK14-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 11089 // CHECK14-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 11090 // CHECK14-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 11091 // CHECK14: omp.dispatch.body: 11092 // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 11093 // CHECK14-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 11094 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11095 // CHECK14: omp.inner.for.cond: 11096 // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 11097 // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15 11098 // CHECK14-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 11099 // CHECK14-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11100 // CHECK14: omp.inner.for.body: 11101 // CHECK14-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 11102 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 11103 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 11104 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !15 11105 // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !15 11106 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64 11107 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 11108 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15 11109 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 11110 // CHECK14: omp.body.continue: 11111 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11112 // CHECK14: omp.inner.for.inc: 11113 // CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 11114 // CHECK14-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1 11115 // CHECK14-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 11116 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 11117 // CHECK14: omp.inner.for.end: 11118 // CHECK14-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 11119 // CHECK14: omp.dispatch.inc: 11120 // CHECK14-NEXT: br label [[OMP_DISPATCH_COND]] 11121 // CHECK14: omp.dispatch.end: 11122 // CHECK14-NEXT: br label [[OMP_PRECOND_END]] 11123 // CHECK14: omp.precond.end: 11124 // CHECK14-NEXT: ret void 11125 // 11126 // 11127 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168 11128 // CHECK14-SAME: (i64 noundef [[M:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 11129 // CHECK14-NEXT: entry: 11130 // CHECK14-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 11131 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 11132 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 11133 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 11134 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 11135 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 11136 // CHECK14-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 11137 // CHECK14-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 11138 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 11139 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 11140 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* 11141 // CHECK14-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 11142 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 11143 // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 11144 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 11145 // CHECK14-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 11146 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11147 // CHECK14-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 11148 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4 11149 // CHECK14-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 11150 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]]) 11151 // CHECK14-NEXT: ret void 11152 // 11153 // 11154 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..14 11155 // CHECK14-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 11156 // CHECK14-NEXT: entry: 11157 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11158 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11159 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 11160 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 11161 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 11162 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 11163 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11164 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 11165 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11166 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 11167 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 11168 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 11169 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 11170 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11171 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11172 // CHECK14-NEXT: [[I4:%.*]] = alloca i32, align 4 11173 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 11174 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11175 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11176 // CHECK14-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 11177 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 11178 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 11179 // CHECK14-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 11180 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 11181 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 11182 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 11183 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 11184 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 11185 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 11186 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11187 // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 11188 // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11189 // CHECK14-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 11190 // CHECK14-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 11191 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 11192 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11193 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 11194 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11195 // CHECK14: omp.precond.then: 11196 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 11197 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 11198 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 11199 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11200 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11201 // CHECK14-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11202 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 11203 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 11204 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11205 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 11206 // CHECK14-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 11207 // CHECK14-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11208 // CHECK14: cond.true: 11209 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 11210 // CHECK14-NEXT: br label [[COND_END:%.*]] 11211 // CHECK14: cond.false: 11212 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11213 // CHECK14-NEXT: br label [[COND_END]] 11214 // CHECK14: cond.end: 11215 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 11216 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 11217 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11218 // CHECK14-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 11219 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11220 // CHECK14: omp.inner.for.cond: 11221 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11222 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11223 // CHECK14-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 11224 // CHECK14-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11225 // CHECK14: omp.inner.for.body: 11226 // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11227 // CHECK14-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 11228 // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11229 // CHECK14-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 11230 // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV]], align 4 11231 // CHECK14-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 11232 // CHECK14-NEXT: store i32 [[TMP20]], i32* [[CONV7]], align 4 11233 // CHECK14-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 11234 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP21]]) 11235 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11236 // CHECK14: omp.inner.for.inc: 11237 // CHECK14-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11238 // CHECK14-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 11239 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 11240 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 11241 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 11242 // CHECK14: omp.inner.for.end: 11243 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11244 // CHECK14: omp.loop.exit: 11245 // CHECK14-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11246 // CHECK14-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 11247 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) 11248 // CHECK14-NEXT: br label [[OMP_PRECOND_END]] 11249 // CHECK14: omp.precond.end: 11250 // CHECK14-NEXT: ret void 11251 // 11252 // 11253 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..15 11254 // CHECK14-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 11255 // CHECK14-NEXT: entry: 11256 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11257 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11258 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 11259 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 11260 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 11261 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 11262 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 11263 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 11264 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11265 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 11266 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11267 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 11268 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 11269 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 11270 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 11271 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11272 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11273 // CHECK14-NEXT: [[I6:%.*]] = alloca i32, align 4 11274 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11275 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11276 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 11277 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11278 // CHECK14-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 11279 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 11280 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 11281 // CHECK14-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 11282 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 11283 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 11284 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 11285 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 11286 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 11287 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 11288 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11289 // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 11290 // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11291 // CHECK14-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 11292 // CHECK14-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 11293 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 11294 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11295 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 11296 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11297 // CHECK14: omp.precond.then: 11298 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 11299 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 11300 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 11301 // CHECK14-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 11302 // CHECK14-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32 11303 // CHECK14-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11304 // CHECK14-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32 11305 // CHECK14-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 11306 // CHECK14-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 11307 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11308 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11309 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 4 11310 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 11311 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11312 // CHECK14-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11313 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 11314 // CHECK14-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 1073741859, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]]) 11315 // CHECK14-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 11316 // CHECK14: omp.dispatch.cond: 11317 // CHECK14-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11318 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 11319 // CHECK14-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 11320 // CHECK14-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 11321 // CHECK14-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 11322 // CHECK14: omp.dispatch.body: 11323 // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 11324 // CHECK14-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 11325 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11326 // CHECK14: omp.inner.for.cond: 11327 // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 11328 // CHECK14-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18 11329 // CHECK14-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 11330 // CHECK14-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11331 // CHECK14: omp.inner.for.body: 11332 // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 11333 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 11334 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 11335 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !18 11336 // CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !18 11337 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 11338 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 11339 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18 11340 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 11341 // CHECK14: omp.body.continue: 11342 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11343 // CHECK14: omp.inner.for.inc: 11344 // CHECK14-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 11345 // CHECK14-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], 1 11346 // CHECK14-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 11347 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]] 11348 // CHECK14: omp.inner.for.end: 11349 // CHECK14-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 11350 // CHECK14: omp.dispatch.inc: 11351 // CHECK14-NEXT: br label [[OMP_DISPATCH_COND]] 11352 // CHECK14: omp.dispatch.end: 11353 // CHECK14-NEXT: br label [[OMP_PRECOND_END]] 11354 // CHECK14: omp.precond.end: 11355 // CHECK14-NEXT: ret void 11356 // 11357 // 11358 // CHECK14-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 11359 // CHECK14-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 11360 // CHECK14-NEXT: entry: 11361 // CHECK14-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 11362 // CHECK14-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 11363 // CHECK14-NEXT: [[M:%.*]] = alloca i32, align 4 11364 // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 11365 // CHECK14-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 11366 // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 11367 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 11368 // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8 11369 // CHECK14-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8 11370 // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8 11371 // CHECK14-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 11372 // CHECK14-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 11373 // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 8 11374 // CHECK14-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 8 11375 // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 8 11376 // CHECK14-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 11377 // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 8 11378 // CHECK14-NEXT: [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 8 11379 // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 8 11380 // CHECK14-NEXT: [[_TMP16:%.*]] = alloca i32, align 4 11381 // CHECK14-NEXT: [[M_CASTED19:%.*]] = alloca i64, align 8 11382 // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [2 x i8*], align 8 11383 // CHECK14-NEXT: [[DOTOFFLOAD_PTRS22:%.*]] = alloca [2 x i8*], align 8 11384 // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [2 x i8*], align 8 11385 // CHECK14-NEXT: [[_TMP24:%.*]] = alloca i32, align 4 11386 // CHECK14-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 11387 // CHECK14-NEXT: store i32 10, i32* [[M]], align 4 11388 // CHECK14-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 11389 // CHECK14-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 11390 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8 11391 // CHECK14-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 11392 // CHECK14-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 11393 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8 11394 // CHECK14-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 11395 // CHECK14-NEXT: store i8* null, i8** [[TMP4]], align 8 11396 // CHECK14-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 11397 // CHECK14-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 11398 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 11399 // CHECK14-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.20, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.21, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 11400 // CHECK14-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 11401 // CHECK14-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 11402 // CHECK14: omp_offload.failed: 11403 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]] 11404 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT]] 11405 // CHECK14: omp_offload.cont: 11406 // CHECK14-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 11407 // CHECK14-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** 11408 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8 11409 // CHECK14-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 11410 // CHECK14-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** 11411 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8 11412 // CHECK14-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0 11413 // CHECK14-NEXT: store i8* null, i8** [[TMP13]], align 8 11414 // CHECK14-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 11415 // CHECK14-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 11416 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 11417 // CHECK14-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.24, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.25, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 11418 // CHECK14-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 11419 // CHECK14-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 11420 // CHECK14: omp_offload.failed5: 11421 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121([10 x i32]* [[A]]) #[[ATTR3]] 11422 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT6]] 11423 // CHECK14: omp_offload.cont6: 11424 // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[M]], align 4 11425 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[M_CASTED]] to i32* 11426 // CHECK14-NEXT: store i32 [[TMP18]], i32* [[CONV]], align 4 11427 // CHECK14-NEXT: [[TMP19:%.*]] = load i64, i64* [[M_CASTED]], align 8 11428 // CHECK14-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 11429 // CHECK14-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64* 11430 // CHECK14-NEXT: store i64 [[TMP19]], i64* [[TMP21]], align 8 11431 // CHECK14-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 11432 // CHECK14-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64* 11433 // CHECK14-NEXT: store i64 [[TMP19]], i64* [[TMP23]], align 8 11434 // CHECK14-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0 11435 // CHECK14-NEXT: store i8* null, i8** [[TMP24]], align 8 11436 // CHECK14-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1 11437 // CHECK14-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]** 11438 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 8 11439 // CHECK14-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1 11440 // CHECK14-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]** 11441 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 8 11442 // CHECK14-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 1 11443 // CHECK14-NEXT: store i8* null, i8** [[TMP29]], align 8 11444 // CHECK14-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 11445 // CHECK14-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 11446 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 11447 // CHECK14-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.28, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.29, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 11448 // CHECK14-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 11449 // CHECK14-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] 11450 // CHECK14: omp_offload.failed11: 11451 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i64 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]] 11452 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT12]] 11453 // CHECK14: omp_offload.cont12: 11454 // CHECK14-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 11455 // CHECK14-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]** 11456 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 8 11457 // CHECK14-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 11458 // CHECK14-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]** 11459 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 8 11460 // CHECK14-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i64 0, i64 0 11461 // CHECK14-NEXT: store i8* null, i8** [[TMP38]], align 8 11462 // CHECK14-NEXT: [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 11463 // CHECK14-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 11464 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 11465 // CHECK14-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.32, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.33, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 11466 // CHECK14-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0 11467 // CHECK14-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]] 11468 // CHECK14: omp_offload.failed17: 11469 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131([10 x i32]* [[A]]) #[[ATTR3]] 11470 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT18]] 11471 // CHECK14: omp_offload.cont18: 11472 // CHECK14-NEXT: [[TMP43:%.*]] = load i32, i32* [[M]], align 4 11473 // CHECK14-NEXT: [[CONV20:%.*]] = bitcast i64* [[M_CASTED19]] to i32* 11474 // CHECK14-NEXT: store i32 [[TMP43]], i32* [[CONV20]], align 4 11475 // CHECK14-NEXT: [[TMP44:%.*]] = load i64, i64* [[M_CASTED19]], align 8 11476 // CHECK14-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 11477 // CHECK14-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64* 11478 // CHECK14-NEXT: store i64 [[TMP44]], i64* [[TMP46]], align 8 11479 // CHECK14-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 11480 // CHECK14-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64* 11481 // CHECK14-NEXT: store i64 [[TMP44]], i64* [[TMP48]], align 8 11482 // CHECK14-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0 11483 // CHECK14-NEXT: store i8* null, i8** [[TMP49]], align 8 11484 // CHECK14-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1 11485 // CHECK14-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]** 11486 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 8 11487 // CHECK14-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1 11488 // CHECK14-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]** 11489 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 8 11490 // CHECK14-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1 11491 // CHECK14-NEXT: store i8* null, i8** [[TMP54]], align 8 11492 // CHECK14-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 11493 // CHECK14-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 11494 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 11495 // CHECK14-NEXT: [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.36, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.37, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 11496 // CHECK14-NEXT: [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0 11497 // CHECK14-NEXT: br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED25:%.*]], label [[OMP_OFFLOAD_CONT26:%.*]] 11498 // CHECK14: omp_offload.failed25: 11499 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i64 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]] 11500 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT26]] 11501 // CHECK14: omp_offload.cont26: 11502 // CHECK14-NEXT: ret i32 0 11503 // 11504 // 11505 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116 11506 // CHECK14-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 11507 // CHECK14-NEXT: entry: 11508 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 11509 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 11510 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 11511 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 11512 // CHECK14-NEXT: ret void 11513 // 11514 // 11515 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..18 11516 // CHECK14-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 11517 // CHECK14-NEXT: entry: 11518 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11519 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11520 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 11521 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11522 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 11523 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 11524 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 11525 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11526 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11527 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 11528 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11529 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11530 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 11531 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 11532 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 11533 // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 11534 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11535 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11536 // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11537 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 11538 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 11539 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11540 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 11541 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11542 // CHECK14: cond.true: 11543 // CHECK14-NEXT: br label [[COND_END:%.*]] 11544 // CHECK14: cond.false: 11545 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11546 // CHECK14-NEXT: br label [[COND_END]] 11547 // CHECK14: cond.end: 11548 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 11549 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 11550 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11551 // CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 11552 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11553 // CHECK14: omp.inner.for.cond: 11554 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11555 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11556 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 11557 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11558 // CHECK14: omp.inner.for.body: 11559 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11560 // CHECK14-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 11561 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11562 // CHECK14-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 11563 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..19 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]) 11564 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11565 // CHECK14: omp.inner.for.inc: 11566 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11567 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 11568 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 11569 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 11570 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 11571 // CHECK14: omp.inner.for.end: 11572 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11573 // CHECK14: omp.loop.exit: 11574 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 11575 // CHECK14-NEXT: ret void 11576 // 11577 // 11578 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..19 11579 // CHECK14-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 11580 // CHECK14-NEXT: entry: 11581 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11582 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11583 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 11584 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 11585 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 11586 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11587 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 11588 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 11589 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 11590 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11591 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11592 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 11593 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11594 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11595 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 11596 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11597 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 11598 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 11599 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 11600 // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 11601 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 11602 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 11603 // CHECK14-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11604 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 11605 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 11606 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 11607 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11608 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11609 // CHECK14-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11610 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 11611 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 11612 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11613 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 11614 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11615 // CHECK14: cond.true: 11616 // CHECK14-NEXT: br label [[COND_END:%.*]] 11617 // CHECK14: cond.false: 11618 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11619 // CHECK14-NEXT: br label [[COND_END]] 11620 // CHECK14: cond.end: 11621 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 11622 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 11623 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 11624 // CHECK14-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 11625 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11626 // CHECK14: omp.inner.for.cond: 11627 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11628 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11629 // CHECK14-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 11630 // CHECK14-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11631 // CHECK14: omp.inner.for.body: 11632 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11633 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 11634 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 11635 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4 11636 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 11637 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 11638 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 11639 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 11640 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 11641 // CHECK14: omp.body.continue: 11642 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11643 // CHECK14: omp.inner.for.inc: 11644 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11645 // CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 11646 // CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 11647 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 11648 // CHECK14: omp.inner.for.end: 11649 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11650 // CHECK14: omp.loop.exit: 11651 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 11652 // CHECK14-NEXT: ret void 11653 // 11654 // 11655 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121 11656 // CHECK14-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 11657 // CHECK14-NEXT: entry: 11658 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 11659 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 11660 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 11661 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..22 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 11662 // CHECK14-NEXT: ret void 11663 // 11664 // 11665 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..22 11666 // CHECK14-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 11667 // CHECK14-NEXT: entry: 11668 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11669 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11670 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 11671 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11672 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 11673 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 11674 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 11675 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11676 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11677 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 11678 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11679 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11680 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 11681 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 11682 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 11683 // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 11684 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11685 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11686 // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11687 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 11688 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 11689 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11690 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 11691 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11692 // CHECK14: cond.true: 11693 // CHECK14-NEXT: br label [[COND_END:%.*]] 11694 // CHECK14: cond.false: 11695 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11696 // CHECK14-NEXT: br label [[COND_END]] 11697 // CHECK14: cond.end: 11698 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 11699 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 11700 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11701 // CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 11702 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11703 // CHECK14: omp.inner.for.cond: 11704 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11705 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11706 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 11707 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11708 // CHECK14: omp.inner.for.body: 11709 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11710 // CHECK14-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 11711 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11712 // CHECK14-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 11713 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..23 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]) 11714 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11715 // CHECK14: omp.inner.for.inc: 11716 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11717 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 11718 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 11719 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 11720 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 11721 // CHECK14: omp.inner.for.end: 11722 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11723 // CHECK14: omp.loop.exit: 11724 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 11725 // CHECK14-NEXT: ret void 11726 // 11727 // 11728 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..23 11729 // CHECK14-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 11730 // CHECK14-NEXT: entry: 11731 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11732 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11733 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 11734 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 11735 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 11736 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11737 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 11738 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 11739 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 11740 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11741 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11742 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 11743 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11744 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11745 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 11746 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11747 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 11748 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 11749 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 11750 // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 11751 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 11752 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 11753 // CHECK14-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11754 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 11755 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 11756 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 11757 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11758 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11759 // CHECK14-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11760 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 11761 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 11762 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11763 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 11764 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11765 // CHECK14: cond.true: 11766 // CHECK14-NEXT: br label [[COND_END:%.*]] 11767 // CHECK14: cond.false: 11768 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11769 // CHECK14-NEXT: br label [[COND_END]] 11770 // CHECK14: cond.end: 11771 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 11772 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 11773 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 11774 // CHECK14-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 11775 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11776 // CHECK14: omp.inner.for.cond: 11777 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11778 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11779 // CHECK14-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 11780 // CHECK14-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11781 // CHECK14: omp.inner.for.body: 11782 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11783 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 11784 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 11785 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4 11786 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 11787 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 11788 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 11789 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 11790 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 11791 // CHECK14: omp.body.continue: 11792 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11793 // CHECK14: omp.inner.for.inc: 11794 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11795 // CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 11796 // CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 11797 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 11798 // CHECK14: omp.inner.for.end: 11799 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11800 // CHECK14: omp.loop.exit: 11801 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 11802 // CHECK14-NEXT: ret void 11803 // 11804 // 11805 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126 11806 // CHECK14-SAME: (i64 noundef [[M:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 11807 // CHECK14-NEXT: entry: 11808 // CHECK14-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 11809 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 11810 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 11811 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 11812 // CHECK14-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 11813 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 11814 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* 11815 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 11816 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 11817 // CHECK14-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 11818 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11819 // CHECK14-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 11820 // CHECK14-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 11821 // CHECK14-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 11822 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..26 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]]) 11823 // CHECK14-NEXT: ret void 11824 // 11825 // 11826 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..26 11827 // CHECK14-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 11828 // CHECK14-NEXT: entry: 11829 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11830 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11831 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 11832 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 11833 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11834 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 11835 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 11836 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 11837 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11838 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11839 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 11840 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 11841 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11842 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11843 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 11844 // CHECK14-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 11845 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 11846 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 11847 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 11848 // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 11849 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11850 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11851 // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11852 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 11853 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 11854 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11855 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 11856 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11857 // CHECK14: cond.true: 11858 // CHECK14-NEXT: br label [[COND_END:%.*]] 11859 // CHECK14: cond.false: 11860 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11861 // CHECK14-NEXT: br label [[COND_END]] 11862 // CHECK14: cond.end: 11863 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 11864 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 11865 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11866 // CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 11867 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11868 // CHECK14: omp.inner.for.cond: 11869 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11870 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11871 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 11872 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11873 // CHECK14: omp.inner.for.body: 11874 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11875 // CHECK14-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 11876 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11877 // CHECK14-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 11878 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 4 11879 // CHECK14-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 11880 // CHECK14-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4 11881 // CHECK14-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 11882 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..27 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]]) 11883 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11884 // CHECK14: omp.inner.for.inc: 11885 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11886 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 11887 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 11888 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 11889 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 11890 // CHECK14: omp.inner.for.end: 11891 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11892 // CHECK14: omp.loop.exit: 11893 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 11894 // CHECK14-NEXT: ret void 11895 // 11896 // 11897 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..27 11898 // CHECK14-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 11899 // CHECK14-NEXT: entry: 11900 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11901 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11902 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 11903 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 11904 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 11905 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 11906 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11907 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 11908 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 11909 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 11910 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11911 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11912 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 11913 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11914 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11915 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 11916 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11917 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 11918 // CHECK14-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 11919 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 11920 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 11921 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 11922 // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 11923 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 11924 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 11925 // CHECK14-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11926 // CHECK14-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 11927 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4 11928 // CHECK14-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 11929 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11930 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11931 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4 11932 // CHECK14-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11933 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 11934 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]]) 11935 // CHECK14-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 11936 // CHECK14: omp.dispatch.cond: 11937 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11938 // CHECK14-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11939 // CHECK14-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 11940 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]] 11941 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11942 // CHECK14: cond.true: 11943 // CHECK14-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11944 // CHECK14-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 11945 // CHECK14-NEXT: br label [[COND_END:%.*]] 11946 // CHECK14: cond.false: 11947 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11948 // CHECK14-NEXT: br label [[COND_END]] 11949 // CHECK14: cond.end: 11950 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 11951 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 11952 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 11953 // CHECK14-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 11954 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11955 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11956 // CHECK14-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 11957 // CHECK14-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 11958 // CHECK14: omp.dispatch.body: 11959 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11960 // CHECK14: omp.inner.for.cond: 11961 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11962 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11963 // CHECK14-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 11964 // CHECK14-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11965 // CHECK14: omp.inner.for.body: 11966 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11967 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 11968 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 11969 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4 11970 // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4 11971 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 11972 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 11973 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 11974 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 11975 // CHECK14: omp.body.continue: 11976 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11977 // CHECK14: omp.inner.for.inc: 11978 // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11979 // CHECK14-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1 11980 // CHECK14-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 11981 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 11982 // CHECK14: omp.inner.for.end: 11983 // CHECK14-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 11984 // CHECK14: omp.dispatch.inc: 11985 // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 11986 // CHECK14-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 11987 // CHECK14-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 11988 // CHECK14-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 11989 // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11990 // CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 11991 // CHECK14-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 11992 // CHECK14-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 11993 // CHECK14-NEXT: br label [[OMP_DISPATCH_COND]] 11994 // CHECK14: omp.dispatch.end: 11995 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 11996 // CHECK14-NEXT: ret void 11997 // 11998 // 11999 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131 12000 // CHECK14-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 12001 // CHECK14-NEXT: entry: 12002 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 12003 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 12004 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 12005 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..30 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 12006 // CHECK14-NEXT: ret void 12007 // 12008 // 12009 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..30 12010 // CHECK14-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 12011 // CHECK14-NEXT: entry: 12012 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 12013 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 12014 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 12015 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12016 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 12017 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 12018 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 12019 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12020 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12021 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 12022 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 12023 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 12024 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 12025 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 12026 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 12027 // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 12028 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12029 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 12030 // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 12031 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 12032 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 12033 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12034 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 12035 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12036 // CHECK14: cond.true: 12037 // CHECK14-NEXT: br label [[COND_END:%.*]] 12038 // CHECK14: cond.false: 12039 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12040 // CHECK14-NEXT: br label [[COND_END]] 12041 // CHECK14: cond.end: 12042 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 12043 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 12044 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 12045 // CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 12046 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12047 // CHECK14: omp.inner.for.cond: 12048 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12049 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12050 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 12051 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12052 // CHECK14: omp.inner.for.body: 12053 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 12054 // CHECK14-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 12055 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12056 // CHECK14-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 12057 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..31 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]) 12058 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12059 // CHECK14: omp.inner.for.inc: 12060 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12061 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 12062 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 12063 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 12064 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 12065 // CHECK14: omp.inner.for.end: 12066 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12067 // CHECK14: omp.loop.exit: 12068 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 12069 // CHECK14-NEXT: ret void 12070 // 12071 // 12072 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..31 12073 // CHECK14-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 12074 // CHECK14-NEXT: entry: 12075 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 12076 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 12077 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 12078 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 12079 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 12080 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12081 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 12082 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 12083 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 12084 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12085 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12086 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 12087 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 12088 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 12089 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 12090 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 12091 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 12092 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 12093 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 12094 // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 12095 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 12096 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 12097 // CHECK14-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 12098 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 12099 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 12100 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 12101 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12102 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 12103 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 12104 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12105 // CHECK14-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 12106 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 12107 // CHECK14-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 12108 // CHECK14-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 12109 // CHECK14: omp.dispatch.cond: 12110 // CHECK14-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 12111 // CHECK14-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 12112 // CHECK14-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 12113 // CHECK14: omp.dispatch.body: 12114 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 12115 // CHECK14-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 12116 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12117 // CHECK14: omp.inner.for.cond: 12118 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 12119 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21 12120 // CHECK14-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 12121 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12122 // CHECK14: omp.inner.for.body: 12123 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 12124 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 12125 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 12126 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21 12127 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21 12128 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 12129 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 12130 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21 12131 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 12132 // CHECK14: omp.body.continue: 12133 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12134 // CHECK14: omp.inner.for.inc: 12135 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 12136 // CHECK14-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 12137 // CHECK14-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 12138 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]] 12139 // CHECK14: omp.inner.for.end: 12140 // CHECK14-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 12141 // CHECK14: omp.dispatch.inc: 12142 // CHECK14-NEXT: br label [[OMP_DISPATCH_COND]] 12143 // CHECK14: omp.dispatch.end: 12144 // CHECK14-NEXT: ret void 12145 // 12146 // 12147 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136 12148 // CHECK14-SAME: (i64 noundef [[M:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 12149 // CHECK14-NEXT: entry: 12150 // CHECK14-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 12151 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 12152 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 12153 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 12154 // CHECK14-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 12155 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 12156 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* 12157 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 12158 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 12159 // CHECK14-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 12160 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 12161 // CHECK14-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 12162 // CHECK14-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 12163 // CHECK14-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 12164 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..34 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]]) 12165 // CHECK14-NEXT: ret void 12166 // 12167 // 12168 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..34 12169 // CHECK14-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 12170 // CHECK14-NEXT: entry: 12171 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 12172 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 12173 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 12174 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 12175 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12176 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 12177 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 12178 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 12179 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12180 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12181 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 12182 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 12183 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 12184 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 12185 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 12186 // CHECK14-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 12187 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 12188 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 12189 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 12190 // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 12191 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12192 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 12193 // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 12194 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 12195 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 12196 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12197 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 12198 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12199 // CHECK14: cond.true: 12200 // CHECK14-NEXT: br label [[COND_END:%.*]] 12201 // CHECK14: cond.false: 12202 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12203 // CHECK14-NEXT: br label [[COND_END]] 12204 // CHECK14: cond.end: 12205 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 12206 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 12207 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 12208 // CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 12209 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12210 // CHECK14: omp.inner.for.cond: 12211 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12212 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12213 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 12214 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12215 // CHECK14: omp.inner.for.body: 12216 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 12217 // CHECK14-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 12218 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12219 // CHECK14-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 12220 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 4 12221 // CHECK14-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 12222 // CHECK14-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4 12223 // CHECK14-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 12224 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..35 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]]) 12225 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12226 // CHECK14: omp.inner.for.inc: 12227 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12228 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 12229 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 12230 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 12231 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 12232 // CHECK14: omp.inner.for.end: 12233 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12234 // CHECK14: omp.loop.exit: 12235 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 12236 // CHECK14-NEXT: ret void 12237 // 12238 // 12239 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..35 12240 // CHECK14-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 12241 // CHECK14-NEXT: entry: 12242 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 12243 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 12244 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 12245 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 12246 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 12247 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 12248 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12249 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 12250 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 12251 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 12252 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12253 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12254 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 12255 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 12256 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 12257 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 12258 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 12259 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 12260 // CHECK14-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 12261 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 12262 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 12263 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 12264 // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 12265 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 12266 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 12267 // CHECK14-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 12268 // CHECK14-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 12269 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4 12270 // CHECK14-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 12271 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12272 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 12273 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4 12274 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 12275 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12276 // CHECK14-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 12277 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 12278 // CHECK14-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]]) 12279 // CHECK14-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 12280 // CHECK14: omp.dispatch.cond: 12281 // CHECK14-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 12282 // CHECK14-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0 12283 // CHECK14-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 12284 // CHECK14: omp.dispatch.body: 12285 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 12286 // CHECK14-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 12287 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12288 // CHECK14: omp.inner.for.cond: 12289 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 12290 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !24 12291 // CHECK14-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 12292 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12293 // CHECK14: omp.inner.for.body: 12294 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 12295 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 12296 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 12297 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !24 12298 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !24 12299 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 12300 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 12301 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !24 12302 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 12303 // CHECK14: omp.body.continue: 12304 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12305 // CHECK14: omp.inner.for.inc: 12306 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 12307 // CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1 12308 // CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 12309 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]] 12310 // CHECK14: omp.inner.for.end: 12311 // CHECK14-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 12312 // CHECK14: omp.dispatch.inc: 12313 // CHECK14-NEXT: br label [[OMP_DISPATCH_COND]] 12314 // CHECK14: omp.dispatch.end: 12315 // CHECK14-NEXT: ret void 12316 // 12317 // 12318 // CHECK14-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 12319 // CHECK14-SAME: () #[[ATTR6:[0-9]+]] { 12320 // CHECK14-NEXT: entry: 12321 // CHECK14-NEXT: call void @__tgt_register_requires(i64 1) 12322 // CHECK14-NEXT: ret void 12323 // 12324 // 12325 // CHECK15-LABEL: define {{[^@]+}}@main 12326 // CHECK15-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 12327 // CHECK15-NEXT: entry: 12328 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 12329 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 12330 // CHECK15-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 12331 // CHECK15-NEXT: [[N:%.*]] = alloca i32, align 4 12332 // CHECK15-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 12333 // CHECK15-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 12334 // CHECK15-NEXT: [[M:%.*]] = alloca i32, align 4 12335 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 12336 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 12337 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 12338 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 12339 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4 12340 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 12341 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 12342 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 12343 // CHECK15-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4 12344 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4 12345 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4 12346 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4 12347 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4 12348 // CHECK15-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 12349 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 12350 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 12351 // CHECK15-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4 12352 // CHECK15-NEXT: [[N_CASTED17:%.*]] = alloca i32, align 4 12353 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS18:%.*]] = alloca [4 x i8*], align 4 12354 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS19:%.*]] = alloca [4 x i8*], align 4 12355 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS20:%.*]] = alloca [4 x i8*], align 4 12356 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES21:%.*]] = alloca [4 x i64], align 4 12357 // CHECK15-NEXT: [[_TMP22:%.*]] = alloca i32, align 4 12358 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_23:%.*]] = alloca i32, align 4 12359 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4 12360 // CHECK15-NEXT: [[N_CASTED31:%.*]] = alloca i32, align 4 12361 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS32:%.*]] = alloca [3 x i8*], align 4 12362 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS33:%.*]] = alloca [3 x i8*], align 4 12363 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS34:%.*]] = alloca [3 x i8*], align 4 12364 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES35:%.*]] = alloca [3 x i64], align 4 12365 // CHECK15-NEXT: [[_TMP36:%.*]] = alloca i32, align 4 12366 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_37:%.*]] = alloca i32, align 4 12367 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4 12368 // CHECK15-NEXT: [[M_CASTED45:%.*]] = alloca i32, align 4 12369 // CHECK15-NEXT: [[N_CASTED46:%.*]] = alloca i32, align 4 12370 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS47:%.*]] = alloca [4 x i8*], align 4 12371 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS48:%.*]] = alloca [4 x i8*], align 4 12372 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS49:%.*]] = alloca [4 x i8*], align 4 12373 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES50:%.*]] = alloca [4 x i64], align 4 12374 // CHECK15-NEXT: [[_TMP51:%.*]] = alloca i32, align 4 12375 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_52:%.*]] = alloca i32, align 4 12376 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_53:%.*]] = alloca i32, align 4 12377 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4 12378 // CHECK15-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 12379 // CHECK15-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 12380 // CHECK15-NEXT: store i32 100, i32* [[N]], align 4 12381 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 12382 // CHECK15-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 12383 // CHECK15-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 12384 // CHECK15-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 12385 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 12386 // CHECK15-NEXT: store i32 10, i32* [[M]], align 4 12387 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 12388 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 12389 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 12390 // CHECK15-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4 12391 // CHECK15-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64 12392 // CHECK15-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 12393 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes to i8*), i32 24, i1 false) 12394 // CHECK15-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 12395 // CHECK15-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 12396 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4 12397 // CHECK15-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 12398 // CHECK15-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 12399 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 12400 // CHECK15-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 12401 // CHECK15-NEXT: store i8* null, i8** [[TMP11]], align 4 12402 // CHECK15-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 12403 // CHECK15-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 12404 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4 12405 // CHECK15-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 12406 // CHECK15-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 12407 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4 12408 // CHECK15-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 12409 // CHECK15-NEXT: store i8* null, i8** [[TMP16]], align 4 12410 // CHECK15-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 12411 // CHECK15-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 12412 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 4 12413 // CHECK15-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 12414 // CHECK15-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 12415 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 4 12416 // CHECK15-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 12417 // CHECK15-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 4 12418 // CHECK15-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 12419 // CHECK15-NEXT: store i8* null, i8** [[TMP22]], align 4 12420 // CHECK15-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 12421 // CHECK15-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 12422 // CHECK15-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 12423 // CHECK15-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 12424 // CHECK15-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 12425 // CHECK15-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 12426 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 12427 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 12428 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 12429 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 12430 // CHECK15-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12431 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 12432 // CHECK15-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 12433 // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP29]]) 12434 // CHECK15-NEXT: [[TMP30:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, i32 3, i8** [[TMP23]], i8** [[TMP24]], i64* [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 12435 // CHECK15-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 12436 // CHECK15-NEXT: br i1 [[TMP31]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 12437 // CHECK15: omp_offload.failed: 12438 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 12439 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT]] 12440 // CHECK15: omp_offload.cont: 12441 // CHECK15-NEXT: [[TMP32:%.*]] = load i32, i32* [[N]], align 4 12442 // CHECK15-NEXT: store i32 [[TMP32]], i32* [[N_CASTED3]], align 4 12443 // CHECK15-NEXT: [[TMP33:%.*]] = load i32, i32* [[N_CASTED3]], align 4 12444 // CHECK15-NEXT: [[TMP34:%.*]] = mul nuw i32 [[TMP0]], 4 12445 // CHECK15-NEXT: [[TMP35:%.*]] = sext i32 [[TMP34]] to i64 12446 // CHECK15-NEXT: [[TMP36:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES7]] to i8* 12447 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP36]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.4 to i8*), i32 24, i1 false) 12448 // CHECK15-NEXT: [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 12449 // CHECK15-NEXT: [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32* 12450 // CHECK15-NEXT: store i32 [[TMP33]], i32* [[TMP38]], align 4 12451 // CHECK15-NEXT: [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 12452 // CHECK15-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32* 12453 // CHECK15-NEXT: store i32 [[TMP33]], i32* [[TMP40]], align 4 12454 // CHECK15-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0 12455 // CHECK15-NEXT: store i8* null, i8** [[TMP41]], align 4 12456 // CHECK15-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 12457 // CHECK15-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i32* 12458 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP43]], align 4 12459 // CHECK15-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 12460 // CHECK15-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i32* 12461 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP45]], align 4 12462 // CHECK15-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1 12463 // CHECK15-NEXT: store i8* null, i8** [[TMP46]], align 4 12464 // CHECK15-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 12465 // CHECK15-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32** 12466 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP48]], align 4 12467 // CHECK15-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 12468 // CHECK15-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32** 12469 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP50]], align 4 12470 // CHECK15-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2 12471 // CHECK15-NEXT: store i64 [[TMP35]], i64* [[TMP51]], align 4 12472 // CHECK15-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2 12473 // CHECK15-NEXT: store i8* null, i8** [[TMP52]], align 4 12474 // CHECK15-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 12475 // CHECK15-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 12476 // CHECK15-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0 12477 // CHECK15-NEXT: [[TMP56:%.*]] = load i32, i32* [[N]], align 4 12478 // CHECK15-NEXT: store i32 [[TMP56]], i32* [[DOTCAPTURE_EXPR_9]], align 4 12479 // CHECK15-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4 12480 // CHECK15-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP57]], 0 12481 // CHECK15-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 12482 // CHECK15-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 12483 // CHECK15-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4 12484 // CHECK15-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 12485 // CHECK15-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP58]], 1 12486 // CHECK15-NEXT: [[TMP59:%.*]] = zext i32 [[ADD14]] to i64 12487 // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP59]]) 12488 // CHECK15-NEXT: [[TMP60:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, i32 3, i8** [[TMP53]], i8** [[TMP54]], i64* [[TMP55]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 12489 // CHECK15-NEXT: [[TMP61:%.*]] = icmp ne i32 [[TMP60]], 0 12490 // CHECK15-NEXT: br i1 [[TMP61]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]] 12491 // CHECK15: omp_offload.failed15: 12492 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i32 [[TMP33]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 12493 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT16]] 12494 // CHECK15: omp_offload.cont16: 12495 // CHECK15-NEXT: [[TMP62:%.*]] = load i32, i32* [[M]], align 4 12496 // CHECK15-NEXT: store i32 [[TMP62]], i32* [[M_CASTED]], align 4 12497 // CHECK15-NEXT: [[TMP63:%.*]] = load i32, i32* [[M_CASTED]], align 4 12498 // CHECK15-NEXT: [[TMP64:%.*]] = load i32, i32* [[N]], align 4 12499 // CHECK15-NEXT: store i32 [[TMP64]], i32* [[N_CASTED17]], align 4 12500 // CHECK15-NEXT: [[TMP65:%.*]] = load i32, i32* [[N_CASTED17]], align 4 12501 // CHECK15-NEXT: [[TMP66:%.*]] = mul nuw i32 [[TMP0]], 4 12502 // CHECK15-NEXT: [[TMP67:%.*]] = sext i32 [[TMP66]] to i64 12503 // CHECK15-NEXT: [[TMP68:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES21]] to i8* 12504 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP68]], i8* align 4 bitcast ([4 x i64]* @.offload_sizes.8 to i8*), i32 32, i1 false) 12505 // CHECK15-NEXT: [[TMP69:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0 12506 // CHECK15-NEXT: [[TMP70:%.*]] = bitcast i8** [[TMP69]] to i32* 12507 // CHECK15-NEXT: store i32 [[TMP63]], i32* [[TMP70]], align 4 12508 // CHECK15-NEXT: [[TMP71:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0 12509 // CHECK15-NEXT: [[TMP72:%.*]] = bitcast i8** [[TMP71]] to i32* 12510 // CHECK15-NEXT: store i32 [[TMP63]], i32* [[TMP72]], align 4 12511 // CHECK15-NEXT: [[TMP73:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 0 12512 // CHECK15-NEXT: store i8* null, i8** [[TMP73]], align 4 12513 // CHECK15-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 1 12514 // CHECK15-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i32* 12515 // CHECK15-NEXT: store i32 [[TMP65]], i32* [[TMP75]], align 4 12516 // CHECK15-NEXT: [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 1 12517 // CHECK15-NEXT: [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i32* 12518 // CHECK15-NEXT: store i32 [[TMP65]], i32* [[TMP77]], align 4 12519 // CHECK15-NEXT: [[TMP78:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 1 12520 // CHECK15-NEXT: store i8* null, i8** [[TMP78]], align 4 12521 // CHECK15-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 2 12522 // CHECK15-NEXT: [[TMP80:%.*]] = bitcast i8** [[TMP79]] to i32* 12523 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP80]], align 4 12524 // CHECK15-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 2 12525 // CHECK15-NEXT: [[TMP82:%.*]] = bitcast i8** [[TMP81]] to i32* 12526 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP82]], align 4 12527 // CHECK15-NEXT: [[TMP83:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 2 12528 // CHECK15-NEXT: store i8* null, i8** [[TMP83]], align 4 12529 // CHECK15-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 3 12530 // CHECK15-NEXT: [[TMP85:%.*]] = bitcast i8** [[TMP84]] to i32** 12531 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP85]], align 4 12532 // CHECK15-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 3 12533 // CHECK15-NEXT: [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i32** 12534 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP87]], align 4 12535 // CHECK15-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 3 12536 // CHECK15-NEXT: store i64 [[TMP67]], i64* [[TMP88]], align 4 12537 // CHECK15-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 3 12538 // CHECK15-NEXT: store i8* null, i8** [[TMP89]], align 4 12539 // CHECK15-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0 12540 // CHECK15-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0 12541 // CHECK15-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0 12542 // CHECK15-NEXT: [[TMP93:%.*]] = load i32, i32* [[N]], align 4 12543 // CHECK15-NEXT: store i32 [[TMP93]], i32* [[DOTCAPTURE_EXPR_23]], align 4 12544 // CHECK15-NEXT: [[TMP94:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_23]], align 4 12545 // CHECK15-NEXT: [[SUB25:%.*]] = sub nsw i32 [[TMP94]], 0 12546 // CHECK15-NEXT: [[DIV26:%.*]] = sdiv i32 [[SUB25]], 1 12547 // CHECK15-NEXT: [[SUB27:%.*]] = sub nsw i32 [[DIV26]], 1 12548 // CHECK15-NEXT: store i32 [[SUB27]], i32* [[DOTCAPTURE_EXPR_24]], align 4 12549 // CHECK15-NEXT: [[TMP95:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4 12550 // CHECK15-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP95]], 1 12551 // CHECK15-NEXT: [[TMP96:%.*]] = zext i32 [[ADD28]] to i64 12552 // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP96]]) 12553 // CHECK15-NEXT: [[TMP97:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, i32 4, i8** [[TMP90]], i8** [[TMP91]], i64* [[TMP92]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 12554 // CHECK15-NEXT: [[TMP98:%.*]] = icmp ne i32 [[TMP97]], 0 12555 // CHECK15-NEXT: br i1 [[TMP98]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]] 12556 // CHECK15: omp_offload.failed29: 12557 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i32 [[TMP63]], i32 [[TMP65]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 12558 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT30]] 12559 // CHECK15: omp_offload.cont30: 12560 // CHECK15-NEXT: [[TMP99:%.*]] = load i32, i32* [[N]], align 4 12561 // CHECK15-NEXT: store i32 [[TMP99]], i32* [[N_CASTED31]], align 4 12562 // CHECK15-NEXT: [[TMP100:%.*]] = load i32, i32* [[N_CASTED31]], align 4 12563 // CHECK15-NEXT: [[TMP101:%.*]] = mul nuw i32 [[TMP0]], 4 12564 // CHECK15-NEXT: [[TMP102:%.*]] = sext i32 [[TMP101]] to i64 12565 // CHECK15-NEXT: [[TMP103:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES35]] to i8* 12566 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP103]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.12 to i8*), i32 24, i1 false) 12567 // CHECK15-NEXT: [[TMP104:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0 12568 // CHECK15-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to i32* 12569 // CHECK15-NEXT: store i32 [[TMP100]], i32* [[TMP105]], align 4 12570 // CHECK15-NEXT: [[TMP106:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0 12571 // CHECK15-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to i32* 12572 // CHECK15-NEXT: store i32 [[TMP100]], i32* [[TMP107]], align 4 12573 // CHECK15-NEXT: [[TMP108:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 0 12574 // CHECK15-NEXT: store i8* null, i8** [[TMP108]], align 4 12575 // CHECK15-NEXT: [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 1 12576 // CHECK15-NEXT: [[TMP110:%.*]] = bitcast i8** [[TMP109]] to i32* 12577 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP110]], align 4 12578 // CHECK15-NEXT: [[TMP111:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 1 12579 // CHECK15-NEXT: [[TMP112:%.*]] = bitcast i8** [[TMP111]] to i32* 12580 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP112]], align 4 12581 // CHECK15-NEXT: [[TMP113:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 1 12582 // CHECK15-NEXT: store i8* null, i8** [[TMP113]], align 4 12583 // CHECK15-NEXT: [[TMP114:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 2 12584 // CHECK15-NEXT: [[TMP115:%.*]] = bitcast i8** [[TMP114]] to i32** 12585 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP115]], align 4 12586 // CHECK15-NEXT: [[TMP116:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 2 12587 // CHECK15-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to i32** 12588 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP117]], align 4 12589 // CHECK15-NEXT: [[TMP118:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 2 12590 // CHECK15-NEXT: store i64 [[TMP102]], i64* [[TMP118]], align 4 12591 // CHECK15-NEXT: [[TMP119:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 2 12592 // CHECK15-NEXT: store i8* null, i8** [[TMP119]], align 4 12593 // CHECK15-NEXT: [[TMP120:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0 12594 // CHECK15-NEXT: [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0 12595 // CHECK15-NEXT: [[TMP122:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 0 12596 // CHECK15-NEXT: [[TMP123:%.*]] = load i32, i32* [[N]], align 4 12597 // CHECK15-NEXT: store i32 [[TMP123]], i32* [[DOTCAPTURE_EXPR_37]], align 4 12598 // CHECK15-NEXT: [[TMP124:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_37]], align 4 12599 // CHECK15-NEXT: [[SUB39:%.*]] = sub nsw i32 [[TMP124]], 0 12600 // CHECK15-NEXT: [[DIV40:%.*]] = sdiv i32 [[SUB39]], 1 12601 // CHECK15-NEXT: [[SUB41:%.*]] = sub nsw i32 [[DIV40]], 1 12602 // CHECK15-NEXT: store i32 [[SUB41]], i32* [[DOTCAPTURE_EXPR_38]], align 4 12603 // CHECK15-NEXT: [[TMP125:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_38]], align 4 12604 // CHECK15-NEXT: [[ADD42:%.*]] = add nsw i32 [[TMP125]], 1 12605 // CHECK15-NEXT: [[TMP126:%.*]] = zext i32 [[ADD42]] to i64 12606 // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP126]]) 12607 // CHECK15-NEXT: [[TMP127:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, i32 3, i8** [[TMP120]], i8** [[TMP121]], i64* [[TMP122]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 12608 // CHECK15-NEXT: [[TMP128:%.*]] = icmp ne i32 [[TMP127]], 0 12609 // CHECK15-NEXT: br i1 [[TMP128]], label [[OMP_OFFLOAD_FAILED43:%.*]], label [[OMP_OFFLOAD_CONT44:%.*]] 12610 // CHECK15: omp_offload.failed43: 12611 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i32 [[TMP100]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 12612 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT44]] 12613 // CHECK15: omp_offload.cont44: 12614 // CHECK15-NEXT: [[TMP129:%.*]] = load i32, i32* [[M]], align 4 12615 // CHECK15-NEXT: store i32 [[TMP129]], i32* [[M_CASTED45]], align 4 12616 // CHECK15-NEXT: [[TMP130:%.*]] = load i32, i32* [[M_CASTED45]], align 4 12617 // CHECK15-NEXT: [[TMP131:%.*]] = load i32, i32* [[N]], align 4 12618 // CHECK15-NEXT: store i32 [[TMP131]], i32* [[N_CASTED46]], align 4 12619 // CHECK15-NEXT: [[TMP132:%.*]] = load i32, i32* [[N_CASTED46]], align 4 12620 // CHECK15-NEXT: [[TMP133:%.*]] = mul nuw i32 [[TMP0]], 4 12621 // CHECK15-NEXT: [[TMP134:%.*]] = sext i32 [[TMP133]] to i64 12622 // CHECK15-NEXT: [[TMP135:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES50]] to i8* 12623 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP135]], i8* align 4 bitcast ([4 x i64]* @.offload_sizes.16 to i8*), i32 32, i1 false) 12624 // CHECK15-NEXT: [[TMP136:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0 12625 // CHECK15-NEXT: [[TMP137:%.*]] = bitcast i8** [[TMP136]] to i32* 12626 // CHECK15-NEXT: store i32 [[TMP130]], i32* [[TMP137]], align 4 12627 // CHECK15-NEXT: [[TMP138:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0 12628 // CHECK15-NEXT: [[TMP139:%.*]] = bitcast i8** [[TMP138]] to i32* 12629 // CHECK15-NEXT: store i32 [[TMP130]], i32* [[TMP139]], align 4 12630 // CHECK15-NEXT: [[TMP140:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 0 12631 // CHECK15-NEXT: store i8* null, i8** [[TMP140]], align 4 12632 // CHECK15-NEXT: [[TMP141:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 1 12633 // CHECK15-NEXT: [[TMP142:%.*]] = bitcast i8** [[TMP141]] to i32* 12634 // CHECK15-NEXT: store i32 [[TMP132]], i32* [[TMP142]], align 4 12635 // CHECK15-NEXT: [[TMP143:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 1 12636 // CHECK15-NEXT: [[TMP144:%.*]] = bitcast i8** [[TMP143]] to i32* 12637 // CHECK15-NEXT: store i32 [[TMP132]], i32* [[TMP144]], align 4 12638 // CHECK15-NEXT: [[TMP145:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 1 12639 // CHECK15-NEXT: store i8* null, i8** [[TMP145]], align 4 12640 // CHECK15-NEXT: [[TMP146:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 2 12641 // CHECK15-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i32* 12642 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP147]], align 4 12643 // CHECK15-NEXT: [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 2 12644 // CHECK15-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i32* 12645 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP149]], align 4 12646 // CHECK15-NEXT: [[TMP150:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 2 12647 // CHECK15-NEXT: store i8* null, i8** [[TMP150]], align 4 12648 // CHECK15-NEXT: [[TMP151:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 3 12649 // CHECK15-NEXT: [[TMP152:%.*]] = bitcast i8** [[TMP151]] to i32** 12650 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP152]], align 4 12651 // CHECK15-NEXT: [[TMP153:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 3 12652 // CHECK15-NEXT: [[TMP154:%.*]] = bitcast i8** [[TMP153]] to i32** 12653 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP154]], align 4 12654 // CHECK15-NEXT: [[TMP155:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 3 12655 // CHECK15-NEXT: store i64 [[TMP134]], i64* [[TMP155]], align 4 12656 // CHECK15-NEXT: [[TMP156:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 3 12657 // CHECK15-NEXT: store i8* null, i8** [[TMP156]], align 4 12658 // CHECK15-NEXT: [[TMP157:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0 12659 // CHECK15-NEXT: [[TMP158:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0 12660 // CHECK15-NEXT: [[TMP159:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 0 12661 // CHECK15-NEXT: [[TMP160:%.*]] = load i32, i32* [[N]], align 4 12662 // CHECK15-NEXT: store i32 [[TMP160]], i32* [[DOTCAPTURE_EXPR_52]], align 4 12663 // CHECK15-NEXT: [[TMP161:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_52]], align 4 12664 // CHECK15-NEXT: [[SUB54:%.*]] = sub nsw i32 [[TMP161]], 0 12665 // CHECK15-NEXT: [[DIV55:%.*]] = sdiv i32 [[SUB54]], 1 12666 // CHECK15-NEXT: [[SUB56:%.*]] = sub nsw i32 [[DIV55]], 1 12667 // CHECK15-NEXT: store i32 [[SUB56]], i32* [[DOTCAPTURE_EXPR_53]], align 4 12668 // CHECK15-NEXT: [[TMP162:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_53]], align 4 12669 // CHECK15-NEXT: [[ADD57:%.*]] = add nsw i32 [[TMP162]], 1 12670 // CHECK15-NEXT: [[TMP163:%.*]] = zext i32 [[ADD57]] to i64 12671 // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP163]]) 12672 // CHECK15-NEXT: [[TMP164:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, i32 4, i8** [[TMP157]], i8** [[TMP158]], i64* [[TMP159]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 12673 // CHECK15-NEXT: [[TMP165:%.*]] = icmp ne i32 [[TMP164]], 0 12674 // CHECK15-NEXT: br i1 [[TMP165]], label [[OMP_OFFLOAD_FAILED58:%.*]], label [[OMP_OFFLOAD_CONT59:%.*]] 12675 // CHECK15: omp_offload.failed58: 12676 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i32 [[TMP130]], i32 [[TMP132]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 12677 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT59]] 12678 // CHECK15: omp_offload.cont59: 12679 // CHECK15-NEXT: [[TMP166:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 12680 // CHECK15-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP166]]) 12681 // CHECK15-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 12682 // CHECK15-NEXT: [[TMP167:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 12683 // CHECK15-NEXT: call void @llvm.stackrestore(i8* [[TMP167]]) 12684 // CHECK15-NEXT: [[TMP168:%.*]] = load i32, i32* [[RETVAL]], align 4 12685 // CHECK15-NEXT: ret i32 [[TMP168]] 12686 // 12687 // 12688 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148 12689 // CHECK15-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 12690 // CHECK15-NEXT: entry: 12691 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 12692 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 12693 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 12694 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 12695 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 12696 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 12697 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 12698 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 12699 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 12700 // CHECK15-NEXT: ret void 12701 // 12702 // 12703 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined. 12704 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 12705 // CHECK15-NEXT: entry: 12706 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 12707 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 12708 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 12709 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 12710 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 12711 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12712 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 12713 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 12714 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 12715 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 12716 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 12717 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 12718 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12719 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12720 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 12721 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 12722 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 12723 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 12724 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 12725 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 12726 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 12727 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 12728 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 12729 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 12730 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 12731 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 12732 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 12733 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 12734 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 12735 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 12736 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 12737 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 12738 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 12739 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 12740 // CHECK15: omp.precond.then: 12741 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 12742 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12743 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 12744 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12745 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 12746 // CHECK15-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12747 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 12748 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 12749 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12750 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12751 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 12752 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12753 // CHECK15: cond.true: 12754 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12755 // CHECK15-NEXT: br label [[COND_END:%.*]] 12756 // CHECK15: cond.false: 12757 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12758 // CHECK15-NEXT: br label [[COND_END]] 12759 // CHECK15: cond.end: 12760 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 12761 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 12762 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 12763 // CHECK15-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 12764 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12765 // CHECK15: omp.inner.for.cond: 12766 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12767 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12768 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 12769 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12770 // CHECK15: omp.inner.for.body: 12771 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 12772 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12773 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 12774 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12775 // CHECK15: omp.inner.for.inc: 12776 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12777 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 12778 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 12779 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 12780 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 12781 // CHECK15: omp.inner.for.end: 12782 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12783 // CHECK15: omp.loop.exit: 12784 // CHECK15-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12785 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 12786 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 12787 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 12788 // CHECK15: omp.precond.end: 12789 // CHECK15-NEXT: ret void 12790 // 12791 // 12792 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..1 12793 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 12794 // CHECK15-NEXT: entry: 12795 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 12796 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 12797 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 12798 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 12799 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 12800 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 12801 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 12802 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12803 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 12804 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 12805 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 12806 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 12807 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 12808 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 12809 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12810 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12811 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 12812 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 12813 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 12814 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 12815 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 12816 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 12817 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 12818 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 12819 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 12820 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 12821 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 12822 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 12823 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 12824 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 12825 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 12826 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 12827 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 12828 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 12829 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 12830 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 12831 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 12832 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 12833 // CHECK15: omp.precond.then: 12834 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 12835 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12836 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 12837 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 12838 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 12839 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 12840 // CHECK15-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 12841 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12842 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 12843 // CHECK15-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12844 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 12845 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 12846 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12847 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12848 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 12849 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12850 // CHECK15: cond.true: 12851 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12852 // CHECK15-NEXT: br label [[COND_END:%.*]] 12853 // CHECK15: cond.false: 12854 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12855 // CHECK15-NEXT: br label [[COND_END]] 12856 // CHECK15: cond.end: 12857 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 12858 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 12859 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 12860 // CHECK15-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 12861 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12862 // CHECK15: omp.inner.for.cond: 12863 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12864 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12865 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 12866 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12867 // CHECK15: omp.inner.for.body: 12868 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12869 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 12870 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 12871 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 12872 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4 12873 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]] 12874 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 12875 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 12876 // CHECK15: omp.body.continue: 12877 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12878 // CHECK15: omp.inner.for.inc: 12879 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12880 // CHECK15-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1 12881 // CHECK15-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 12882 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 12883 // CHECK15: omp.inner.for.end: 12884 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12885 // CHECK15: omp.loop.exit: 12886 // CHECK15-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12887 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 12888 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 12889 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 12890 // CHECK15: omp.precond.end: 12891 // CHECK15-NEXT: ret void 12892 // 12893 // 12894 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153 12895 // CHECK15-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 12896 // CHECK15-NEXT: entry: 12897 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 12898 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 12899 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 12900 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 12901 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 12902 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 12903 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 12904 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 12905 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 12906 // CHECK15-NEXT: ret void 12907 // 12908 // 12909 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..2 12910 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 12911 // CHECK15-NEXT: entry: 12912 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 12913 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 12914 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 12915 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 12916 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 12917 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12918 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 12919 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 12920 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 12921 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 12922 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 12923 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 12924 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12925 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12926 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 12927 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 12928 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 12929 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 12930 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 12931 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 12932 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 12933 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 12934 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 12935 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 12936 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 12937 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 12938 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 12939 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 12940 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 12941 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 12942 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 12943 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 12944 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 12945 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 12946 // CHECK15: omp.precond.then: 12947 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 12948 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12949 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 12950 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12951 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 12952 // CHECK15-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12953 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 12954 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 12955 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12956 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12957 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 12958 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12959 // CHECK15: cond.true: 12960 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12961 // CHECK15-NEXT: br label [[COND_END:%.*]] 12962 // CHECK15: cond.false: 12963 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12964 // CHECK15-NEXT: br label [[COND_END]] 12965 // CHECK15: cond.end: 12966 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 12967 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 12968 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 12969 // CHECK15-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 12970 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12971 // CHECK15: omp.inner.for.cond: 12972 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12973 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12974 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 12975 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12976 // CHECK15: omp.inner.for.body: 12977 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 12978 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12979 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 12980 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12981 // CHECK15: omp.inner.for.inc: 12982 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12983 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 12984 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 12985 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 12986 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 12987 // CHECK15: omp.inner.for.end: 12988 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12989 // CHECK15: omp.loop.exit: 12990 // CHECK15-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12991 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 12992 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 12993 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 12994 // CHECK15: omp.precond.end: 12995 // CHECK15-NEXT: ret void 12996 // 12997 // 12998 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..3 12999 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 13000 // CHECK15-NEXT: entry: 13001 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 13002 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 13003 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 13004 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 13005 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 13006 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 13007 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 13008 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13009 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 13010 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 13011 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 13012 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 13013 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 13014 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 13015 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13016 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13017 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 13018 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 13019 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 13020 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 13021 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 13022 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 13023 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 13024 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 13025 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 13026 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 13027 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 13028 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 13029 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 13030 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 13031 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 13032 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 13033 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 13034 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 13035 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 13036 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 13037 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 13038 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 13039 // CHECK15: omp.precond.then: 13040 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 13041 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13042 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 13043 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 13044 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 13045 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 13046 // CHECK15-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 13047 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 13048 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 13049 // CHECK15-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 13050 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 13051 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 13052 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13053 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13054 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 13055 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13056 // CHECK15: cond.true: 13057 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13058 // CHECK15-NEXT: br label [[COND_END:%.*]] 13059 // CHECK15: cond.false: 13060 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13061 // CHECK15-NEXT: br label [[COND_END]] 13062 // CHECK15: cond.end: 13063 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 13064 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 13065 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 13066 // CHECK15-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 13067 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13068 // CHECK15: omp.inner.for.cond: 13069 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13070 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13071 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 13072 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13073 // CHECK15: omp.inner.for.body: 13074 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13075 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 13076 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 13077 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 13078 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4 13079 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]] 13080 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 13081 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 13082 // CHECK15: omp.body.continue: 13083 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13084 // CHECK15: omp.inner.for.inc: 13085 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13086 // CHECK15-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1 13087 // CHECK15-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 13088 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 13089 // CHECK15: omp.inner.for.end: 13090 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 13091 // CHECK15: omp.loop.exit: 13092 // CHECK15-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 13093 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 13094 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 13095 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 13096 // CHECK15: omp.precond.end: 13097 // CHECK15-NEXT: ret void 13098 // 13099 // 13100 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158 13101 // CHECK15-SAME: (i32 noundef [[M:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 13102 // CHECK15-NEXT: entry: 13103 // CHECK15-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 13104 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 13105 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 13106 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 13107 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 13108 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 13109 // CHECK15-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 13110 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 13111 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 13112 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 13113 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 13114 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 13115 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4 13116 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 13117 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 13118 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 13119 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 13120 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]]) 13121 // CHECK15-NEXT: ret void 13122 // 13123 // 13124 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..6 13125 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 13126 // CHECK15-NEXT: entry: 13127 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 13128 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 13129 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 13130 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 13131 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 13132 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 13133 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13134 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 13135 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 13136 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 13137 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 13138 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 13139 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 13140 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13141 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13142 // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4 13143 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 13144 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 13145 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 13146 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 13147 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 13148 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 13149 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 13150 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 13151 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 13152 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 13153 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 13154 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 13155 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13156 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 13157 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 13158 // CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 13159 // CHECK15-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 13160 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 13161 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13162 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 13163 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 13164 // CHECK15: omp.precond.then: 13165 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 13166 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 13167 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 13168 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 13169 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 13170 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 13171 // CHECK15-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 13172 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 13173 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]]) 13174 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13175 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 13176 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 13177 // CHECK15-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13178 // CHECK15: cond.true: 13179 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 13180 // CHECK15-NEXT: br label [[COND_END:%.*]] 13181 // CHECK15: cond.false: 13182 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13183 // CHECK15-NEXT: br label [[COND_END]] 13184 // CHECK15: cond.end: 13185 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 13186 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 13187 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 13188 // CHECK15-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 13189 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13190 // CHECK15: omp.inner.for.cond: 13191 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13192 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 13193 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1 13194 // CHECK15-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]] 13195 // CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13196 // CHECK15: omp.inner.for.body: 13197 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 13198 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13199 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 13200 // CHECK15-NEXT: store i32 [[TMP19]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 13201 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 13202 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP20]]) 13203 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13204 // CHECK15: omp.inner.for.inc: 13205 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13206 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 13207 // CHECK15-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 13208 // CHECK15-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 13209 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 13210 // CHECK15-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 13211 // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 13212 // CHECK15-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4 13213 // CHECK15-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13214 // CHECK15-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 13215 // CHECK15-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 13216 // CHECK15-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4 13217 // CHECK15-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13218 // CHECK15-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 13219 // CHECK15-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP27]], [[TMP28]] 13220 // CHECK15-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]] 13221 // CHECK15: cond.true11: 13222 // CHECK15-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 13223 // CHECK15-NEXT: br label [[COND_END13:%.*]] 13224 // CHECK15: cond.false12: 13225 // CHECK15-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13226 // CHECK15-NEXT: br label [[COND_END13]] 13227 // CHECK15: cond.end13: 13228 // CHECK15-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP29]], [[COND_TRUE11]] ], [ [[TMP30]], [[COND_FALSE12]] ] 13229 // CHECK15-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4 13230 // CHECK15-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 13231 // CHECK15-NEXT: store i32 [[TMP31]], i32* [[DOTOMP_IV]], align 4 13232 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 13233 // CHECK15: omp.inner.for.end: 13234 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 13235 // CHECK15: omp.loop.exit: 13236 // CHECK15-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 13237 // CHECK15-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4 13238 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]]) 13239 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 13240 // CHECK15: omp.precond.end: 13241 // CHECK15-NEXT: ret void 13242 // 13243 // 13244 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..7 13245 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 13246 // CHECK15-NEXT: entry: 13247 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 13248 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 13249 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 13250 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 13251 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 13252 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 13253 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 13254 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 13255 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13256 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 13257 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 13258 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 13259 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 13260 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 13261 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 13262 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13263 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13264 // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4 13265 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 13266 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 13267 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 13268 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 13269 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 13270 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 13271 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 13272 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 13273 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 13274 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 13275 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 13276 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 13277 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 13278 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13279 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 13280 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 13281 // CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 13282 // CHECK15-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 13283 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 13284 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13285 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 13286 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 13287 // CHECK15: omp.precond.then: 13288 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 13289 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 13290 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 13291 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 13292 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 13293 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 13294 // CHECK15-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 13295 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 13296 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 13297 // CHECK15-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 13298 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 13299 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 13300 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13301 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 13302 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 13303 // CHECK15-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13304 // CHECK15: cond.true: 13305 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 13306 // CHECK15-NEXT: br label [[COND_END:%.*]] 13307 // CHECK15: cond.false: 13308 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13309 // CHECK15-NEXT: br label [[COND_END]] 13310 // CHECK15: cond.end: 13311 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 13312 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 13313 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 13314 // CHECK15-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 13315 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13316 // CHECK15: omp.inner.for.cond: 13317 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13318 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13319 // CHECK15-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 13320 // CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13321 // CHECK15: omp.inner.for.body: 13322 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13323 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 13324 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 13325 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 13326 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4 13327 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]] 13328 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 13329 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 13330 // CHECK15: omp.body.continue: 13331 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13332 // CHECK15: omp.inner.for.inc: 13333 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13334 // CHECK15-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 13335 // CHECK15-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 13336 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 13337 // CHECK15: omp.inner.for.end: 13338 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 13339 // CHECK15: omp.loop.exit: 13340 // CHECK15-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 13341 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 13342 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 13343 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 13344 // CHECK15: omp.precond.end: 13345 // CHECK15-NEXT: ret void 13346 // 13347 // 13348 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163 13349 // CHECK15-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 13350 // CHECK15-NEXT: entry: 13351 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 13352 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 13353 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 13354 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 13355 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 13356 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 13357 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 13358 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 13359 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 13360 // CHECK15-NEXT: ret void 13361 // 13362 // 13363 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..10 13364 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 13365 // CHECK15-NEXT: entry: 13366 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 13367 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 13368 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 13369 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 13370 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 13371 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13372 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 13373 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 13374 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 13375 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 13376 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 13377 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 13378 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13379 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13380 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 13381 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 13382 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 13383 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 13384 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 13385 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 13386 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 13387 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 13388 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 13389 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 13390 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 13391 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 13392 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 13393 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 13394 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 13395 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 13396 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 13397 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 13398 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 13399 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 13400 // CHECK15: omp.precond.then: 13401 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 13402 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13403 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 13404 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 13405 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 13406 // CHECK15-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 13407 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 13408 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 13409 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13410 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13411 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 13412 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13413 // CHECK15: cond.true: 13414 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13415 // CHECK15-NEXT: br label [[COND_END:%.*]] 13416 // CHECK15: cond.false: 13417 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13418 // CHECK15-NEXT: br label [[COND_END]] 13419 // CHECK15: cond.end: 13420 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 13421 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 13422 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 13423 // CHECK15-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 13424 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13425 // CHECK15: omp.inner.for.cond: 13426 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13427 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13428 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 13429 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13430 // CHECK15: omp.inner.for.body: 13431 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 13432 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13433 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 13434 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13435 // CHECK15: omp.inner.for.inc: 13436 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13437 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 13438 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 13439 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 13440 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 13441 // CHECK15: omp.inner.for.end: 13442 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 13443 // CHECK15: omp.loop.exit: 13444 // CHECK15-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 13445 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 13446 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 13447 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 13448 // CHECK15: omp.precond.end: 13449 // CHECK15-NEXT: ret void 13450 // 13451 // 13452 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..11 13453 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 13454 // CHECK15-NEXT: entry: 13455 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 13456 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 13457 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 13458 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 13459 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 13460 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 13461 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 13462 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13463 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 13464 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 13465 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 13466 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 13467 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 13468 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 13469 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13470 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13471 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 13472 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 13473 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 13474 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 13475 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 13476 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 13477 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 13478 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 13479 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 13480 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 13481 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 13482 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 13483 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 13484 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 13485 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 13486 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 13487 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 13488 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 13489 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 13490 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 13491 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 13492 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 13493 // CHECK15: omp.precond.then: 13494 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 13495 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13496 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 13497 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 13498 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 13499 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 13500 // CHECK15-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 13501 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 13502 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 13503 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 13504 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13505 // CHECK15-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 13506 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 13507 // CHECK15-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1) 13508 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 13509 // CHECK15: omp.dispatch.cond: 13510 // CHECK15-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 13511 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 13512 // CHECK15-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 13513 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 13514 // CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 13515 // CHECK15: omp.dispatch.body: 13516 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 13517 // CHECK15-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 13518 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13519 // CHECK15: omp.inner.for.cond: 13520 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 13521 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16 13522 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 13523 // CHECK15-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13524 // CHECK15: omp.inner.for.body: 13525 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 13526 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 13527 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 13528 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !16 13529 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !16 13530 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP20]] 13531 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !16 13532 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 13533 // CHECK15: omp.body.continue: 13534 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13535 // CHECK15: omp.inner.for.inc: 13536 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 13537 // CHECK15-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP21]], 1 13538 // CHECK15-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 13539 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]] 13540 // CHECK15: omp.inner.for.end: 13541 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 13542 // CHECK15: omp.dispatch.inc: 13543 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]] 13544 // CHECK15: omp.dispatch.end: 13545 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 13546 // CHECK15: omp.precond.end: 13547 // CHECK15-NEXT: ret void 13548 // 13549 // 13550 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168 13551 // CHECK15-SAME: (i32 noundef [[M:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 13552 // CHECK15-NEXT: entry: 13553 // CHECK15-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 13554 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 13555 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 13556 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 13557 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 13558 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 13559 // CHECK15-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 13560 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 13561 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 13562 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 13563 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 13564 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 13565 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4 13566 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 13567 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 13568 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 13569 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 13570 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]]) 13571 // CHECK15-NEXT: ret void 13572 // 13573 // 13574 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..14 13575 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 13576 // CHECK15-NEXT: entry: 13577 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 13578 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 13579 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 13580 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 13581 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 13582 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 13583 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13584 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 13585 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 13586 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 13587 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 13588 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 13589 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 13590 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13591 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13592 // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4 13593 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 13594 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 13595 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 13596 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 13597 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 13598 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 13599 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 13600 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 13601 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 13602 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 13603 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 13604 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 13605 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13606 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 13607 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 13608 // CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 13609 // CHECK15-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 13610 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 13611 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13612 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 13613 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 13614 // CHECK15: omp.precond.then: 13615 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 13616 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 13617 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 13618 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 13619 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 13620 // CHECK15-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 13621 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 13622 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 13623 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13624 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 13625 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 13626 // CHECK15-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13627 // CHECK15: cond.true: 13628 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 13629 // CHECK15-NEXT: br label [[COND_END:%.*]] 13630 // CHECK15: cond.false: 13631 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13632 // CHECK15-NEXT: br label [[COND_END]] 13633 // CHECK15: cond.end: 13634 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 13635 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 13636 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 13637 // CHECK15-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 13638 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13639 // CHECK15: omp.inner.for.cond: 13640 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13641 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13642 // CHECK15-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 13643 // CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13644 // CHECK15: omp.inner.for.body: 13645 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 13646 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13647 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 13648 // CHECK15-NEXT: store i32 [[TMP18]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 13649 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 13650 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP19]]) 13651 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13652 // CHECK15: omp.inner.for.inc: 13653 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13654 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 13655 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 13656 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 13657 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 13658 // CHECK15: omp.inner.for.end: 13659 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 13660 // CHECK15: omp.loop.exit: 13661 // CHECK15-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 13662 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 13663 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 13664 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 13665 // CHECK15: omp.precond.end: 13666 // CHECK15-NEXT: ret void 13667 // 13668 // 13669 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..15 13670 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 13671 // CHECK15-NEXT: entry: 13672 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 13673 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 13674 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 13675 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 13676 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 13677 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 13678 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 13679 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 13680 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13681 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 13682 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 13683 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 13684 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 13685 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 13686 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 13687 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13688 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13689 // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4 13690 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 13691 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 13692 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 13693 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 13694 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 13695 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 13696 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 13697 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 13698 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 13699 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 13700 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 13701 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 13702 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 13703 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13704 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 13705 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 13706 // CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 13707 // CHECK15-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 13708 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 13709 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13710 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 13711 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 13712 // CHECK15: omp.precond.then: 13713 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 13714 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 13715 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 13716 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 13717 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 13718 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 13719 // CHECK15-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 13720 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 13721 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 13722 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 13723 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 13724 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13725 // CHECK15-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 13726 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 13727 // CHECK15-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 1073741859, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]]) 13728 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 13729 // CHECK15: omp.dispatch.cond: 13730 // CHECK15-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 13731 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 13732 // CHECK15-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 13733 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 13734 // CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 13735 // CHECK15: omp.dispatch.body: 13736 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 13737 // CHECK15-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 13738 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13739 // CHECK15: omp.inner.for.cond: 13740 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 13741 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !19 13742 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 13743 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13744 // CHECK15: omp.inner.for.body: 13745 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 13746 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 13747 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 13748 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !19 13749 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !19 13750 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP21]] 13751 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !19 13752 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 13753 // CHECK15: omp.body.continue: 13754 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13755 // CHECK15: omp.inner.for.inc: 13756 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 13757 // CHECK15-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP22]], 1 13758 // CHECK15-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 13759 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]] 13760 // CHECK15: omp.inner.for.end: 13761 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 13762 // CHECK15: omp.dispatch.inc: 13763 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]] 13764 // CHECK15: omp.dispatch.end: 13765 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 13766 // CHECK15: omp.precond.end: 13767 // CHECK15-NEXT: ret void 13768 // 13769 // 13770 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 13771 // CHECK15-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 13772 // CHECK15-NEXT: entry: 13773 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 13774 // CHECK15-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 13775 // CHECK15-NEXT: [[M:%.*]] = alloca i32, align 4 13776 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 13777 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 13778 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 13779 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 13780 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4 13781 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4 13782 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4 13783 // CHECK15-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 13784 // CHECK15-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4 13785 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 4 13786 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 4 13787 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 4 13788 // CHECK15-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 13789 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 4 13790 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 4 13791 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 4 13792 // CHECK15-NEXT: [[_TMP16:%.*]] = alloca i32, align 4 13793 // CHECK15-NEXT: [[M_CASTED19:%.*]] = alloca i32, align 4 13794 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [2 x i8*], align 4 13795 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [2 x i8*], align 4 13796 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [2 x i8*], align 4 13797 // CHECK15-NEXT: [[_TMP23:%.*]] = alloca i32, align 4 13798 // CHECK15-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 13799 // CHECK15-NEXT: store i32 10, i32* [[M]], align 4 13800 // CHECK15-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 13801 // CHECK15-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 13802 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4 13803 // CHECK15-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 13804 // CHECK15-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 13805 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4 13806 // CHECK15-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 13807 // CHECK15-NEXT: store i8* null, i8** [[TMP4]], align 4 13808 // CHECK15-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 13809 // CHECK15-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 13810 // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 13811 // CHECK15-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.20, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.21, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 13812 // CHECK15-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 13813 // CHECK15-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 13814 // CHECK15: omp_offload.failed: 13815 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]] 13816 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT]] 13817 // CHECK15: omp_offload.cont: 13818 // CHECK15-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 13819 // CHECK15-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** 13820 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4 13821 // CHECK15-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 13822 // CHECK15-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** 13823 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4 13824 // CHECK15-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0 13825 // CHECK15-NEXT: store i8* null, i8** [[TMP13]], align 4 13826 // CHECK15-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 13827 // CHECK15-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 13828 // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 13829 // CHECK15-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.24, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.25, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 13830 // CHECK15-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 13831 // CHECK15-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 13832 // CHECK15: omp_offload.failed5: 13833 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121([10 x i32]* [[A]]) #[[ATTR3]] 13834 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT6]] 13835 // CHECK15: omp_offload.cont6: 13836 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[M]], align 4 13837 // CHECK15-NEXT: store i32 [[TMP18]], i32* [[M_CASTED]], align 4 13838 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[M_CASTED]], align 4 13839 // CHECK15-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 13840 // CHECK15-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32* 13841 // CHECK15-NEXT: store i32 [[TMP19]], i32* [[TMP21]], align 4 13842 // CHECK15-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 13843 // CHECK15-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32* 13844 // CHECK15-NEXT: store i32 [[TMP19]], i32* [[TMP23]], align 4 13845 // CHECK15-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0 13846 // CHECK15-NEXT: store i8* null, i8** [[TMP24]], align 4 13847 // CHECK15-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1 13848 // CHECK15-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]** 13849 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 4 13850 // CHECK15-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1 13851 // CHECK15-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]** 13852 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 4 13853 // CHECK15-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 1 13854 // CHECK15-NEXT: store i8* null, i8** [[TMP29]], align 4 13855 // CHECK15-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 13856 // CHECK15-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 13857 // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 13858 // CHECK15-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.28, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.29, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 13859 // CHECK15-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 13860 // CHECK15-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] 13861 // CHECK15: omp_offload.failed11: 13862 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i32 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]] 13863 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT12]] 13864 // CHECK15: omp_offload.cont12: 13865 // CHECK15-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 13866 // CHECK15-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]** 13867 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 4 13868 // CHECK15-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 13869 // CHECK15-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]** 13870 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 4 13871 // CHECK15-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 0 13872 // CHECK15-NEXT: store i8* null, i8** [[TMP38]], align 4 13873 // CHECK15-NEXT: [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 13874 // CHECK15-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 13875 // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 13876 // CHECK15-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.32, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.33, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 13877 // CHECK15-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0 13878 // CHECK15-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]] 13879 // CHECK15: omp_offload.failed17: 13880 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131([10 x i32]* [[A]]) #[[ATTR3]] 13881 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT18]] 13882 // CHECK15: omp_offload.cont18: 13883 // CHECK15-NEXT: [[TMP43:%.*]] = load i32, i32* [[M]], align 4 13884 // CHECK15-NEXT: store i32 [[TMP43]], i32* [[M_CASTED19]], align 4 13885 // CHECK15-NEXT: [[TMP44:%.*]] = load i32, i32* [[M_CASTED19]], align 4 13886 // CHECK15-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 13887 // CHECK15-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32* 13888 // CHECK15-NEXT: store i32 [[TMP44]], i32* [[TMP46]], align 4 13889 // CHECK15-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 13890 // CHECK15-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32* 13891 // CHECK15-NEXT: store i32 [[TMP44]], i32* [[TMP48]], align 4 13892 // CHECK15-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 0 13893 // CHECK15-NEXT: store i8* null, i8** [[TMP49]], align 4 13894 // CHECK15-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1 13895 // CHECK15-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]** 13896 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 4 13897 // CHECK15-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 1 13898 // CHECK15-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]** 13899 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 4 13900 // CHECK15-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 1 13901 // CHECK15-NEXT: store i8* null, i8** [[TMP54]], align 4 13902 // CHECK15-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 13903 // CHECK15-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 13904 // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 13905 // CHECK15-NEXT: [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.36, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.37, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 13906 // CHECK15-NEXT: [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0 13907 // CHECK15-NEXT: br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]] 13908 // CHECK15: omp_offload.failed24: 13909 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i32 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]] 13910 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT25]] 13911 // CHECK15: omp_offload.cont25: 13912 // CHECK15-NEXT: ret i32 0 13913 // 13914 // 13915 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116 13916 // CHECK15-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 13917 // CHECK15-NEXT: entry: 13918 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 13919 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 13920 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 13921 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 13922 // CHECK15-NEXT: ret void 13923 // 13924 // 13925 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..18 13926 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 13927 // CHECK15-NEXT: entry: 13928 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 13929 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 13930 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 13931 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13932 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 13933 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 13934 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 13935 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13936 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13937 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 13938 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 13939 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 13940 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 13941 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 13942 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 13943 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 13944 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 13945 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 13946 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 13947 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 13948 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 13949 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13950 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 13951 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13952 // CHECK15: cond.true: 13953 // CHECK15-NEXT: br label [[COND_END:%.*]] 13954 // CHECK15: cond.false: 13955 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13956 // CHECK15-NEXT: br label [[COND_END]] 13957 // CHECK15: cond.end: 13958 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 13959 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 13960 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 13961 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 13962 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13963 // CHECK15: omp.inner.for.cond: 13964 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13965 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13966 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 13967 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13968 // CHECK15: omp.inner.for.body: 13969 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 13970 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13971 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..19 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]) 13972 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13973 // CHECK15: omp.inner.for.inc: 13974 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13975 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 13976 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 13977 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 13978 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 13979 // CHECK15: omp.inner.for.end: 13980 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 13981 // CHECK15: omp.loop.exit: 13982 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 13983 // CHECK15-NEXT: ret void 13984 // 13985 // 13986 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..19 13987 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 13988 // CHECK15-NEXT: entry: 13989 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 13990 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 13991 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 13992 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 13993 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 13994 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13995 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 13996 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 13997 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 13998 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13999 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14000 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 14001 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 14002 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 14003 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 14004 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 14005 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 14006 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 14007 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 14008 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 14009 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 14010 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 14011 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 14012 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 14013 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 14014 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 14015 // CHECK15-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 14016 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 14017 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 14018 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14019 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 14020 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 14021 // CHECK15: cond.true: 14022 // CHECK15-NEXT: br label [[COND_END:%.*]] 14023 // CHECK15: cond.false: 14024 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14025 // CHECK15-NEXT: br label [[COND_END]] 14026 // CHECK15: cond.end: 14027 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 14028 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 14029 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 14030 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 14031 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14032 // CHECK15: omp.inner.for.cond: 14033 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14034 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14035 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 14036 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14037 // CHECK15: omp.inner.for.body: 14038 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14039 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 14040 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 14041 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4 14042 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 14043 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]] 14044 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 14045 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 14046 // CHECK15: omp.body.continue: 14047 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14048 // CHECK15: omp.inner.for.inc: 14049 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14050 // CHECK15-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 14051 // CHECK15-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 14052 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 14053 // CHECK15: omp.inner.for.end: 14054 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 14055 // CHECK15: omp.loop.exit: 14056 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 14057 // CHECK15-NEXT: ret void 14058 // 14059 // 14060 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121 14061 // CHECK15-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 14062 // CHECK15-NEXT: entry: 14063 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 14064 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 14065 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 14066 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..22 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 14067 // CHECK15-NEXT: ret void 14068 // 14069 // 14070 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..22 14071 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 14072 // CHECK15-NEXT: entry: 14073 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 14074 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 14075 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 14076 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14077 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 14078 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 14079 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 14080 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14081 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14082 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 14083 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 14084 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 14085 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 14086 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 14087 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 14088 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 14089 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 14090 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 14091 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 14092 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 14093 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 14094 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14095 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 14096 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 14097 // CHECK15: cond.true: 14098 // CHECK15-NEXT: br label [[COND_END:%.*]] 14099 // CHECK15: cond.false: 14100 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14101 // CHECK15-NEXT: br label [[COND_END]] 14102 // CHECK15: cond.end: 14103 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 14104 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 14105 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 14106 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 14107 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14108 // CHECK15: omp.inner.for.cond: 14109 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14110 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14111 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 14112 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14113 // CHECK15: omp.inner.for.body: 14114 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 14115 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14116 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..23 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]) 14117 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14118 // CHECK15: omp.inner.for.inc: 14119 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14120 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 14121 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 14122 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 14123 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 14124 // CHECK15: omp.inner.for.end: 14125 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 14126 // CHECK15: omp.loop.exit: 14127 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 14128 // CHECK15-NEXT: ret void 14129 // 14130 // 14131 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..23 14132 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 14133 // CHECK15-NEXT: entry: 14134 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 14135 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 14136 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 14137 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 14138 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 14139 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14140 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 14141 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 14142 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 14143 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14144 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14145 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 14146 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 14147 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 14148 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 14149 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 14150 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 14151 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 14152 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 14153 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 14154 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 14155 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 14156 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 14157 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 14158 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 14159 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 14160 // CHECK15-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 14161 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 14162 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 14163 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14164 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 14165 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 14166 // CHECK15: cond.true: 14167 // CHECK15-NEXT: br label [[COND_END:%.*]] 14168 // CHECK15: cond.false: 14169 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14170 // CHECK15-NEXT: br label [[COND_END]] 14171 // CHECK15: cond.end: 14172 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 14173 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 14174 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 14175 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 14176 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14177 // CHECK15: omp.inner.for.cond: 14178 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14179 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14180 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 14181 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14182 // CHECK15: omp.inner.for.body: 14183 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14184 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 14185 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 14186 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4 14187 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 14188 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]] 14189 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 14190 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 14191 // CHECK15: omp.body.continue: 14192 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14193 // CHECK15: omp.inner.for.inc: 14194 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14195 // CHECK15-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 14196 // CHECK15-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 14197 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 14198 // CHECK15: omp.inner.for.end: 14199 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 14200 // CHECK15: omp.loop.exit: 14201 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 14202 // CHECK15-NEXT: ret void 14203 // 14204 // 14205 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126 14206 // CHECK15-SAME: (i32 noundef [[M:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 14207 // CHECK15-NEXT: entry: 14208 // CHECK15-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 14209 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 14210 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 14211 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 14212 // CHECK15-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 14213 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 14214 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 14215 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4 14216 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 14217 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 14218 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 14219 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 14220 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..26 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]]) 14221 // CHECK15-NEXT: ret void 14222 // 14223 // 14224 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..26 14225 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 14226 // CHECK15-NEXT: entry: 14227 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 14228 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 14229 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 14230 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 14231 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14232 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 14233 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 14234 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 14235 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14236 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14237 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 14238 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 14239 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 14240 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 14241 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 14242 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 14243 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 14244 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 14245 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 14246 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 14247 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 14248 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 14249 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 14250 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 14251 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14252 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 14253 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 14254 // CHECK15: cond.true: 14255 // CHECK15-NEXT: br label [[COND_END:%.*]] 14256 // CHECK15: cond.false: 14257 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14258 // CHECK15-NEXT: br label [[COND_END]] 14259 // CHECK15: cond.end: 14260 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 14261 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 14262 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 14263 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 14264 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14265 // CHECK15: omp.inner.for.cond: 14266 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14267 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14268 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 14269 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14270 // CHECK15: omp.inner.for.body: 14271 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 14272 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14273 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 14274 // CHECK15-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 14275 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 14276 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..27 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]]) 14277 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14278 // CHECK15: omp.inner.for.inc: 14279 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14280 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 14281 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 14282 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 14283 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 14284 // CHECK15: omp.inner.for.end: 14285 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 14286 // CHECK15: omp.loop.exit: 14287 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 14288 // CHECK15-NEXT: ret void 14289 // 14290 // 14291 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..27 14292 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 14293 // CHECK15-NEXT: entry: 14294 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 14295 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 14296 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 14297 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 14298 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 14299 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 14300 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14301 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 14302 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 14303 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 14304 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14305 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14306 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 14307 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 14308 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 14309 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 14310 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 14311 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 14312 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 14313 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 14314 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 14315 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 14316 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 14317 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 14318 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 14319 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 14320 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 14321 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 14322 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 14323 // CHECK15-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 14324 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 14325 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]]) 14326 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 14327 // CHECK15: omp.dispatch.cond: 14328 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14329 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 14330 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]] 14331 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 14332 // CHECK15: cond.true: 14333 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 14334 // CHECK15-NEXT: br label [[COND_END:%.*]] 14335 // CHECK15: cond.false: 14336 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14337 // CHECK15-NEXT: br label [[COND_END]] 14338 // CHECK15: cond.end: 14339 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP8]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 14340 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 14341 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 14342 // CHECK15-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 14343 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14344 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14345 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 14346 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 14347 // CHECK15: omp.dispatch.body: 14348 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14349 // CHECK15: omp.inner.for.cond: 14350 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14351 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14352 // CHECK15-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 14353 // CHECK15-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14354 // CHECK15: omp.inner.for.body: 14355 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14356 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 14357 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 14358 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4 14359 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4 14360 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP16]] 14361 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 14362 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 14363 // CHECK15: omp.body.continue: 14364 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14365 // CHECK15: omp.inner.for.inc: 14366 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14367 // CHECK15-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1 14368 // CHECK15-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 14369 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 14370 // CHECK15: omp.inner.for.end: 14371 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 14372 // CHECK15: omp.dispatch.inc: 14373 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 14374 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 14375 // CHECK15-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 14376 // CHECK15-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 14377 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14378 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 14379 // CHECK15-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 14380 // CHECK15-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 14381 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]] 14382 // CHECK15: omp.dispatch.end: 14383 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 14384 // CHECK15-NEXT: ret void 14385 // 14386 // 14387 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131 14388 // CHECK15-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 14389 // CHECK15-NEXT: entry: 14390 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 14391 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 14392 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 14393 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..30 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 14394 // CHECK15-NEXT: ret void 14395 // 14396 // 14397 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..30 14398 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 14399 // CHECK15-NEXT: entry: 14400 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 14401 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 14402 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 14403 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14404 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 14405 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 14406 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 14407 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14408 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14409 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 14410 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 14411 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 14412 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 14413 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 14414 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 14415 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 14416 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 14417 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 14418 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 14419 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 14420 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 14421 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14422 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 14423 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 14424 // CHECK15: cond.true: 14425 // CHECK15-NEXT: br label [[COND_END:%.*]] 14426 // CHECK15: cond.false: 14427 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14428 // CHECK15-NEXT: br label [[COND_END]] 14429 // CHECK15: cond.end: 14430 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 14431 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 14432 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 14433 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 14434 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14435 // CHECK15: omp.inner.for.cond: 14436 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14437 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14438 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 14439 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14440 // CHECK15: omp.inner.for.body: 14441 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 14442 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14443 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..31 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]) 14444 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14445 // CHECK15: omp.inner.for.inc: 14446 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14447 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 14448 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 14449 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 14450 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 14451 // CHECK15: omp.inner.for.end: 14452 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 14453 // CHECK15: omp.loop.exit: 14454 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 14455 // CHECK15-NEXT: ret void 14456 // 14457 // 14458 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..31 14459 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 14460 // CHECK15-NEXT: entry: 14461 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 14462 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 14463 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 14464 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 14465 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 14466 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14467 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 14468 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 14469 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 14470 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14471 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14472 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 14473 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 14474 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 14475 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 14476 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 14477 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 14478 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 14479 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 14480 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 14481 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 14482 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 14483 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 14484 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 14485 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 14486 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 14487 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 14488 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14489 // CHECK15-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 14490 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 14491 // CHECK15-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 14492 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 14493 // CHECK15: omp.dispatch.cond: 14494 // CHECK15-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 14495 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 14496 // CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 14497 // CHECK15: omp.dispatch.body: 14498 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 14499 // CHECK15-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 14500 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14501 // CHECK15: omp.inner.for.cond: 14502 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 14503 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22 14504 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 14505 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14506 // CHECK15: omp.inner.for.body: 14507 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 14508 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 14509 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 14510 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22 14511 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !22 14512 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP12]] 14513 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !22 14514 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 14515 // CHECK15: omp.body.continue: 14516 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14517 // CHECK15: omp.inner.for.inc: 14518 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 14519 // CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 14520 // CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 14521 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]] 14522 // CHECK15: omp.inner.for.end: 14523 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 14524 // CHECK15: omp.dispatch.inc: 14525 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]] 14526 // CHECK15: omp.dispatch.end: 14527 // CHECK15-NEXT: ret void 14528 // 14529 // 14530 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136 14531 // CHECK15-SAME: (i32 noundef [[M:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 14532 // CHECK15-NEXT: entry: 14533 // CHECK15-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 14534 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 14535 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 14536 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 14537 // CHECK15-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 14538 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 14539 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 14540 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4 14541 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 14542 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 14543 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 14544 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 14545 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..34 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]]) 14546 // CHECK15-NEXT: ret void 14547 // 14548 // 14549 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..34 14550 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 14551 // CHECK15-NEXT: entry: 14552 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 14553 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 14554 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 14555 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 14556 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14557 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 14558 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 14559 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 14560 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14561 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14562 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 14563 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 14564 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 14565 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 14566 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 14567 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 14568 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 14569 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 14570 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 14571 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 14572 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 14573 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 14574 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 14575 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 14576 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14577 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 14578 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 14579 // CHECK15: cond.true: 14580 // CHECK15-NEXT: br label [[COND_END:%.*]] 14581 // CHECK15: cond.false: 14582 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14583 // CHECK15-NEXT: br label [[COND_END]] 14584 // CHECK15: cond.end: 14585 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 14586 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 14587 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 14588 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 14589 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14590 // CHECK15: omp.inner.for.cond: 14591 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14592 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14593 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 14594 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14595 // CHECK15: omp.inner.for.body: 14596 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 14597 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14598 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 14599 // CHECK15-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 14600 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 14601 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..35 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]]) 14602 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14603 // CHECK15: omp.inner.for.inc: 14604 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14605 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 14606 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 14607 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 14608 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 14609 // CHECK15: omp.inner.for.end: 14610 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 14611 // CHECK15: omp.loop.exit: 14612 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 14613 // CHECK15-NEXT: ret void 14614 // 14615 // 14616 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..35 14617 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 14618 // CHECK15-NEXT: entry: 14619 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 14620 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 14621 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 14622 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 14623 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 14624 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 14625 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14626 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 14627 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 14628 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 14629 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14630 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14631 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 14632 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 14633 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 14634 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 14635 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 14636 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 14637 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 14638 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 14639 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 14640 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 14641 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 14642 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 14643 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 14644 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 14645 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 14646 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 14647 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 14648 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 14649 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14650 // CHECK15-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 14651 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 14652 // CHECK15-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]]) 14653 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 14654 // CHECK15: omp.dispatch.cond: 14655 // CHECK15-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 14656 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0 14657 // CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 14658 // CHECK15: omp.dispatch.body: 14659 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 14660 // CHECK15-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 14661 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14662 // CHECK15: omp.inner.for.cond: 14663 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 14664 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25 14665 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 14666 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14667 // CHECK15: omp.inner.for.body: 14668 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 14669 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 14670 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 14671 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !25 14672 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !25 14673 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP13]] 14674 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !25 14675 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 14676 // CHECK15: omp.body.continue: 14677 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14678 // CHECK15: omp.inner.for.inc: 14679 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 14680 // CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP14]], 1 14681 // CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 14682 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]] 14683 // CHECK15: omp.inner.for.end: 14684 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 14685 // CHECK15: omp.dispatch.inc: 14686 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]] 14687 // CHECK15: omp.dispatch.end: 14688 // CHECK15-NEXT: ret void 14689 // 14690 // 14691 // CHECK15-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 14692 // CHECK15-SAME: () #[[ATTR6:[0-9]+]] { 14693 // CHECK15-NEXT: entry: 14694 // CHECK15-NEXT: call void @__tgt_register_requires(i64 1) 14695 // CHECK15-NEXT: ret void 14696 // 14697 // 14698 // CHECK16-LABEL: define {{[^@]+}}@main 14699 // CHECK16-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 14700 // CHECK16-NEXT: entry: 14701 // CHECK16-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 14702 // CHECK16-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 14703 // CHECK16-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 14704 // CHECK16-NEXT: [[N:%.*]] = alloca i32, align 4 14705 // CHECK16-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 14706 // CHECK16-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 14707 // CHECK16-NEXT: [[M:%.*]] = alloca i32, align 4 14708 // CHECK16-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 14709 // CHECK16-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 14710 // CHECK16-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 14711 // CHECK16-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 14712 // CHECK16-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4 14713 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 14714 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 14715 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 14716 // CHECK16-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4 14717 // CHECK16-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4 14718 // CHECK16-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4 14719 // CHECK16-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4 14720 // CHECK16-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4 14721 // CHECK16-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 14722 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 14723 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 14724 // CHECK16-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4 14725 // CHECK16-NEXT: [[N_CASTED17:%.*]] = alloca i32, align 4 14726 // CHECK16-NEXT: [[DOTOFFLOAD_BASEPTRS18:%.*]] = alloca [4 x i8*], align 4 14727 // CHECK16-NEXT: [[DOTOFFLOAD_PTRS19:%.*]] = alloca [4 x i8*], align 4 14728 // CHECK16-NEXT: [[DOTOFFLOAD_MAPPERS20:%.*]] = alloca [4 x i8*], align 4 14729 // CHECK16-NEXT: [[DOTOFFLOAD_SIZES21:%.*]] = alloca [4 x i64], align 4 14730 // CHECK16-NEXT: [[_TMP22:%.*]] = alloca i32, align 4 14731 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_23:%.*]] = alloca i32, align 4 14732 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4 14733 // CHECK16-NEXT: [[N_CASTED31:%.*]] = alloca i32, align 4 14734 // CHECK16-NEXT: [[DOTOFFLOAD_BASEPTRS32:%.*]] = alloca [3 x i8*], align 4 14735 // CHECK16-NEXT: [[DOTOFFLOAD_PTRS33:%.*]] = alloca [3 x i8*], align 4 14736 // CHECK16-NEXT: [[DOTOFFLOAD_MAPPERS34:%.*]] = alloca [3 x i8*], align 4 14737 // CHECK16-NEXT: [[DOTOFFLOAD_SIZES35:%.*]] = alloca [3 x i64], align 4 14738 // CHECK16-NEXT: [[_TMP36:%.*]] = alloca i32, align 4 14739 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_37:%.*]] = alloca i32, align 4 14740 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4 14741 // CHECK16-NEXT: [[M_CASTED45:%.*]] = alloca i32, align 4 14742 // CHECK16-NEXT: [[N_CASTED46:%.*]] = alloca i32, align 4 14743 // CHECK16-NEXT: [[DOTOFFLOAD_BASEPTRS47:%.*]] = alloca [4 x i8*], align 4 14744 // CHECK16-NEXT: [[DOTOFFLOAD_PTRS48:%.*]] = alloca [4 x i8*], align 4 14745 // CHECK16-NEXT: [[DOTOFFLOAD_MAPPERS49:%.*]] = alloca [4 x i8*], align 4 14746 // CHECK16-NEXT: [[DOTOFFLOAD_SIZES50:%.*]] = alloca [4 x i64], align 4 14747 // CHECK16-NEXT: [[_TMP51:%.*]] = alloca i32, align 4 14748 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_52:%.*]] = alloca i32, align 4 14749 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_53:%.*]] = alloca i32, align 4 14750 // CHECK16-NEXT: store i32 0, i32* [[RETVAL]], align 4 14751 // CHECK16-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 14752 // CHECK16-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 14753 // CHECK16-NEXT: store i32 100, i32* [[N]], align 4 14754 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 14755 // CHECK16-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 14756 // CHECK16-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 14757 // CHECK16-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 14758 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 14759 // CHECK16-NEXT: store i32 10, i32* [[M]], align 4 14760 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 14761 // CHECK16-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 14762 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 14763 // CHECK16-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4 14764 // CHECK16-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64 14765 // CHECK16-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 14766 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes to i8*), i32 24, i1 false) 14767 // CHECK16-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 14768 // CHECK16-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 14769 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4 14770 // CHECK16-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 14771 // CHECK16-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 14772 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 14773 // CHECK16-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 14774 // CHECK16-NEXT: store i8* null, i8** [[TMP11]], align 4 14775 // CHECK16-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 14776 // CHECK16-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 14777 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4 14778 // CHECK16-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 14779 // CHECK16-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 14780 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4 14781 // CHECK16-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 14782 // CHECK16-NEXT: store i8* null, i8** [[TMP16]], align 4 14783 // CHECK16-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 14784 // CHECK16-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 14785 // CHECK16-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 4 14786 // CHECK16-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 14787 // CHECK16-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 14788 // CHECK16-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 4 14789 // CHECK16-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 14790 // CHECK16-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 4 14791 // CHECK16-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 14792 // CHECK16-NEXT: store i8* null, i8** [[TMP22]], align 4 14793 // CHECK16-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 14794 // CHECK16-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 14795 // CHECK16-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 14796 // CHECK16-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 14797 // CHECK16-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 14798 // CHECK16-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 14799 // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 14800 // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 14801 // CHECK16-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 14802 // CHECK16-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 14803 // CHECK16-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 14804 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 14805 // CHECK16-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 14806 // CHECK16-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP29]]) 14807 // CHECK16-NEXT: [[TMP30:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, i32 3, i8** [[TMP23]], i8** [[TMP24]], i64* [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 14808 // CHECK16-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 14809 // CHECK16-NEXT: br i1 [[TMP31]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 14810 // CHECK16: omp_offload.failed: 14811 // CHECK16-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 14812 // CHECK16-NEXT: br label [[OMP_OFFLOAD_CONT]] 14813 // CHECK16: omp_offload.cont: 14814 // CHECK16-NEXT: [[TMP32:%.*]] = load i32, i32* [[N]], align 4 14815 // CHECK16-NEXT: store i32 [[TMP32]], i32* [[N_CASTED3]], align 4 14816 // CHECK16-NEXT: [[TMP33:%.*]] = load i32, i32* [[N_CASTED3]], align 4 14817 // CHECK16-NEXT: [[TMP34:%.*]] = mul nuw i32 [[TMP0]], 4 14818 // CHECK16-NEXT: [[TMP35:%.*]] = sext i32 [[TMP34]] to i64 14819 // CHECK16-NEXT: [[TMP36:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES7]] to i8* 14820 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP36]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.4 to i8*), i32 24, i1 false) 14821 // CHECK16-NEXT: [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 14822 // CHECK16-NEXT: [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32* 14823 // CHECK16-NEXT: store i32 [[TMP33]], i32* [[TMP38]], align 4 14824 // CHECK16-NEXT: [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 14825 // CHECK16-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32* 14826 // CHECK16-NEXT: store i32 [[TMP33]], i32* [[TMP40]], align 4 14827 // CHECK16-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0 14828 // CHECK16-NEXT: store i8* null, i8** [[TMP41]], align 4 14829 // CHECK16-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 14830 // CHECK16-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i32* 14831 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[TMP43]], align 4 14832 // CHECK16-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 14833 // CHECK16-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i32* 14834 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[TMP45]], align 4 14835 // CHECK16-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1 14836 // CHECK16-NEXT: store i8* null, i8** [[TMP46]], align 4 14837 // CHECK16-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 14838 // CHECK16-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32** 14839 // CHECK16-NEXT: store i32* [[VLA]], i32** [[TMP48]], align 4 14840 // CHECK16-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 14841 // CHECK16-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32** 14842 // CHECK16-NEXT: store i32* [[VLA]], i32** [[TMP50]], align 4 14843 // CHECK16-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2 14844 // CHECK16-NEXT: store i64 [[TMP35]], i64* [[TMP51]], align 4 14845 // CHECK16-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2 14846 // CHECK16-NEXT: store i8* null, i8** [[TMP52]], align 4 14847 // CHECK16-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 14848 // CHECK16-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 14849 // CHECK16-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0 14850 // CHECK16-NEXT: [[TMP56:%.*]] = load i32, i32* [[N]], align 4 14851 // CHECK16-NEXT: store i32 [[TMP56]], i32* [[DOTCAPTURE_EXPR_9]], align 4 14852 // CHECK16-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4 14853 // CHECK16-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP57]], 0 14854 // CHECK16-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 14855 // CHECK16-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 14856 // CHECK16-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4 14857 // CHECK16-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 14858 // CHECK16-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP58]], 1 14859 // CHECK16-NEXT: [[TMP59:%.*]] = zext i32 [[ADD14]] to i64 14860 // CHECK16-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP59]]) 14861 // CHECK16-NEXT: [[TMP60:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, i32 3, i8** [[TMP53]], i8** [[TMP54]], i64* [[TMP55]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 14862 // CHECK16-NEXT: [[TMP61:%.*]] = icmp ne i32 [[TMP60]], 0 14863 // CHECK16-NEXT: br i1 [[TMP61]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]] 14864 // CHECK16: omp_offload.failed15: 14865 // CHECK16-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i32 [[TMP33]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 14866 // CHECK16-NEXT: br label [[OMP_OFFLOAD_CONT16]] 14867 // CHECK16: omp_offload.cont16: 14868 // CHECK16-NEXT: [[TMP62:%.*]] = load i32, i32* [[M]], align 4 14869 // CHECK16-NEXT: store i32 [[TMP62]], i32* [[M_CASTED]], align 4 14870 // CHECK16-NEXT: [[TMP63:%.*]] = load i32, i32* [[M_CASTED]], align 4 14871 // CHECK16-NEXT: [[TMP64:%.*]] = load i32, i32* [[N]], align 4 14872 // CHECK16-NEXT: store i32 [[TMP64]], i32* [[N_CASTED17]], align 4 14873 // CHECK16-NEXT: [[TMP65:%.*]] = load i32, i32* [[N_CASTED17]], align 4 14874 // CHECK16-NEXT: [[TMP66:%.*]] = mul nuw i32 [[TMP0]], 4 14875 // CHECK16-NEXT: [[TMP67:%.*]] = sext i32 [[TMP66]] to i64 14876 // CHECK16-NEXT: [[TMP68:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES21]] to i8* 14877 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP68]], i8* align 4 bitcast ([4 x i64]* @.offload_sizes.8 to i8*), i32 32, i1 false) 14878 // CHECK16-NEXT: [[TMP69:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0 14879 // CHECK16-NEXT: [[TMP70:%.*]] = bitcast i8** [[TMP69]] to i32* 14880 // CHECK16-NEXT: store i32 [[TMP63]], i32* [[TMP70]], align 4 14881 // CHECK16-NEXT: [[TMP71:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0 14882 // CHECK16-NEXT: [[TMP72:%.*]] = bitcast i8** [[TMP71]] to i32* 14883 // CHECK16-NEXT: store i32 [[TMP63]], i32* [[TMP72]], align 4 14884 // CHECK16-NEXT: [[TMP73:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 0 14885 // CHECK16-NEXT: store i8* null, i8** [[TMP73]], align 4 14886 // CHECK16-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 1 14887 // CHECK16-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i32* 14888 // CHECK16-NEXT: store i32 [[TMP65]], i32* [[TMP75]], align 4 14889 // CHECK16-NEXT: [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 1 14890 // CHECK16-NEXT: [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i32* 14891 // CHECK16-NEXT: store i32 [[TMP65]], i32* [[TMP77]], align 4 14892 // CHECK16-NEXT: [[TMP78:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 1 14893 // CHECK16-NEXT: store i8* null, i8** [[TMP78]], align 4 14894 // CHECK16-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 2 14895 // CHECK16-NEXT: [[TMP80:%.*]] = bitcast i8** [[TMP79]] to i32* 14896 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[TMP80]], align 4 14897 // CHECK16-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 2 14898 // CHECK16-NEXT: [[TMP82:%.*]] = bitcast i8** [[TMP81]] to i32* 14899 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[TMP82]], align 4 14900 // CHECK16-NEXT: [[TMP83:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 2 14901 // CHECK16-NEXT: store i8* null, i8** [[TMP83]], align 4 14902 // CHECK16-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 3 14903 // CHECK16-NEXT: [[TMP85:%.*]] = bitcast i8** [[TMP84]] to i32** 14904 // CHECK16-NEXT: store i32* [[VLA]], i32** [[TMP85]], align 4 14905 // CHECK16-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 3 14906 // CHECK16-NEXT: [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i32** 14907 // CHECK16-NEXT: store i32* [[VLA]], i32** [[TMP87]], align 4 14908 // CHECK16-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 3 14909 // CHECK16-NEXT: store i64 [[TMP67]], i64* [[TMP88]], align 4 14910 // CHECK16-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 3 14911 // CHECK16-NEXT: store i8* null, i8** [[TMP89]], align 4 14912 // CHECK16-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0 14913 // CHECK16-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0 14914 // CHECK16-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0 14915 // CHECK16-NEXT: [[TMP93:%.*]] = load i32, i32* [[N]], align 4 14916 // CHECK16-NEXT: store i32 [[TMP93]], i32* [[DOTCAPTURE_EXPR_23]], align 4 14917 // CHECK16-NEXT: [[TMP94:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_23]], align 4 14918 // CHECK16-NEXT: [[SUB25:%.*]] = sub nsw i32 [[TMP94]], 0 14919 // CHECK16-NEXT: [[DIV26:%.*]] = sdiv i32 [[SUB25]], 1 14920 // CHECK16-NEXT: [[SUB27:%.*]] = sub nsw i32 [[DIV26]], 1 14921 // CHECK16-NEXT: store i32 [[SUB27]], i32* [[DOTCAPTURE_EXPR_24]], align 4 14922 // CHECK16-NEXT: [[TMP95:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4 14923 // CHECK16-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP95]], 1 14924 // CHECK16-NEXT: [[TMP96:%.*]] = zext i32 [[ADD28]] to i64 14925 // CHECK16-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP96]]) 14926 // CHECK16-NEXT: [[TMP97:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, i32 4, i8** [[TMP90]], i8** [[TMP91]], i64* [[TMP92]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 14927 // CHECK16-NEXT: [[TMP98:%.*]] = icmp ne i32 [[TMP97]], 0 14928 // CHECK16-NEXT: br i1 [[TMP98]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]] 14929 // CHECK16: omp_offload.failed29: 14930 // CHECK16-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i32 [[TMP63]], i32 [[TMP65]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 14931 // CHECK16-NEXT: br label [[OMP_OFFLOAD_CONT30]] 14932 // CHECK16: omp_offload.cont30: 14933 // CHECK16-NEXT: [[TMP99:%.*]] = load i32, i32* [[N]], align 4 14934 // CHECK16-NEXT: store i32 [[TMP99]], i32* [[N_CASTED31]], align 4 14935 // CHECK16-NEXT: [[TMP100:%.*]] = load i32, i32* [[N_CASTED31]], align 4 14936 // CHECK16-NEXT: [[TMP101:%.*]] = mul nuw i32 [[TMP0]], 4 14937 // CHECK16-NEXT: [[TMP102:%.*]] = sext i32 [[TMP101]] to i64 14938 // CHECK16-NEXT: [[TMP103:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES35]] to i8* 14939 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP103]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.12 to i8*), i32 24, i1 false) 14940 // CHECK16-NEXT: [[TMP104:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0 14941 // CHECK16-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to i32* 14942 // CHECK16-NEXT: store i32 [[TMP100]], i32* [[TMP105]], align 4 14943 // CHECK16-NEXT: [[TMP106:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0 14944 // CHECK16-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to i32* 14945 // CHECK16-NEXT: store i32 [[TMP100]], i32* [[TMP107]], align 4 14946 // CHECK16-NEXT: [[TMP108:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 0 14947 // CHECK16-NEXT: store i8* null, i8** [[TMP108]], align 4 14948 // CHECK16-NEXT: [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 1 14949 // CHECK16-NEXT: [[TMP110:%.*]] = bitcast i8** [[TMP109]] to i32* 14950 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[TMP110]], align 4 14951 // CHECK16-NEXT: [[TMP111:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 1 14952 // CHECK16-NEXT: [[TMP112:%.*]] = bitcast i8** [[TMP111]] to i32* 14953 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[TMP112]], align 4 14954 // CHECK16-NEXT: [[TMP113:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 1 14955 // CHECK16-NEXT: store i8* null, i8** [[TMP113]], align 4 14956 // CHECK16-NEXT: [[TMP114:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 2 14957 // CHECK16-NEXT: [[TMP115:%.*]] = bitcast i8** [[TMP114]] to i32** 14958 // CHECK16-NEXT: store i32* [[VLA]], i32** [[TMP115]], align 4 14959 // CHECK16-NEXT: [[TMP116:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 2 14960 // CHECK16-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to i32** 14961 // CHECK16-NEXT: store i32* [[VLA]], i32** [[TMP117]], align 4 14962 // CHECK16-NEXT: [[TMP118:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 2 14963 // CHECK16-NEXT: store i64 [[TMP102]], i64* [[TMP118]], align 4 14964 // CHECK16-NEXT: [[TMP119:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 2 14965 // CHECK16-NEXT: store i8* null, i8** [[TMP119]], align 4 14966 // CHECK16-NEXT: [[TMP120:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0 14967 // CHECK16-NEXT: [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0 14968 // CHECK16-NEXT: [[TMP122:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 0 14969 // CHECK16-NEXT: [[TMP123:%.*]] = load i32, i32* [[N]], align 4 14970 // CHECK16-NEXT: store i32 [[TMP123]], i32* [[DOTCAPTURE_EXPR_37]], align 4 14971 // CHECK16-NEXT: [[TMP124:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_37]], align 4 14972 // CHECK16-NEXT: [[SUB39:%.*]] = sub nsw i32 [[TMP124]], 0 14973 // CHECK16-NEXT: [[DIV40:%.*]] = sdiv i32 [[SUB39]], 1 14974 // CHECK16-NEXT: [[SUB41:%.*]] = sub nsw i32 [[DIV40]], 1 14975 // CHECK16-NEXT: store i32 [[SUB41]], i32* [[DOTCAPTURE_EXPR_38]], align 4 14976 // CHECK16-NEXT: [[TMP125:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_38]], align 4 14977 // CHECK16-NEXT: [[ADD42:%.*]] = add nsw i32 [[TMP125]], 1 14978 // CHECK16-NEXT: [[TMP126:%.*]] = zext i32 [[ADD42]] to i64 14979 // CHECK16-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP126]]) 14980 // CHECK16-NEXT: [[TMP127:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, i32 3, i8** [[TMP120]], i8** [[TMP121]], i64* [[TMP122]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 14981 // CHECK16-NEXT: [[TMP128:%.*]] = icmp ne i32 [[TMP127]], 0 14982 // CHECK16-NEXT: br i1 [[TMP128]], label [[OMP_OFFLOAD_FAILED43:%.*]], label [[OMP_OFFLOAD_CONT44:%.*]] 14983 // CHECK16: omp_offload.failed43: 14984 // CHECK16-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i32 [[TMP100]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 14985 // CHECK16-NEXT: br label [[OMP_OFFLOAD_CONT44]] 14986 // CHECK16: omp_offload.cont44: 14987 // CHECK16-NEXT: [[TMP129:%.*]] = load i32, i32* [[M]], align 4 14988 // CHECK16-NEXT: store i32 [[TMP129]], i32* [[M_CASTED45]], align 4 14989 // CHECK16-NEXT: [[TMP130:%.*]] = load i32, i32* [[M_CASTED45]], align 4 14990 // CHECK16-NEXT: [[TMP131:%.*]] = load i32, i32* [[N]], align 4 14991 // CHECK16-NEXT: store i32 [[TMP131]], i32* [[N_CASTED46]], align 4 14992 // CHECK16-NEXT: [[TMP132:%.*]] = load i32, i32* [[N_CASTED46]], align 4 14993 // CHECK16-NEXT: [[TMP133:%.*]] = mul nuw i32 [[TMP0]], 4 14994 // CHECK16-NEXT: [[TMP134:%.*]] = sext i32 [[TMP133]] to i64 14995 // CHECK16-NEXT: [[TMP135:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES50]] to i8* 14996 // CHECK16-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP135]], i8* align 4 bitcast ([4 x i64]* @.offload_sizes.16 to i8*), i32 32, i1 false) 14997 // CHECK16-NEXT: [[TMP136:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0 14998 // CHECK16-NEXT: [[TMP137:%.*]] = bitcast i8** [[TMP136]] to i32* 14999 // CHECK16-NEXT: store i32 [[TMP130]], i32* [[TMP137]], align 4 15000 // CHECK16-NEXT: [[TMP138:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0 15001 // CHECK16-NEXT: [[TMP139:%.*]] = bitcast i8** [[TMP138]] to i32* 15002 // CHECK16-NEXT: store i32 [[TMP130]], i32* [[TMP139]], align 4 15003 // CHECK16-NEXT: [[TMP140:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 0 15004 // CHECK16-NEXT: store i8* null, i8** [[TMP140]], align 4 15005 // CHECK16-NEXT: [[TMP141:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 1 15006 // CHECK16-NEXT: [[TMP142:%.*]] = bitcast i8** [[TMP141]] to i32* 15007 // CHECK16-NEXT: store i32 [[TMP132]], i32* [[TMP142]], align 4 15008 // CHECK16-NEXT: [[TMP143:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 1 15009 // CHECK16-NEXT: [[TMP144:%.*]] = bitcast i8** [[TMP143]] to i32* 15010 // CHECK16-NEXT: store i32 [[TMP132]], i32* [[TMP144]], align 4 15011 // CHECK16-NEXT: [[TMP145:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 1 15012 // CHECK16-NEXT: store i8* null, i8** [[TMP145]], align 4 15013 // CHECK16-NEXT: [[TMP146:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 2 15014 // CHECK16-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i32* 15015 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[TMP147]], align 4 15016 // CHECK16-NEXT: [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 2 15017 // CHECK16-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i32* 15018 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[TMP149]], align 4 15019 // CHECK16-NEXT: [[TMP150:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 2 15020 // CHECK16-NEXT: store i8* null, i8** [[TMP150]], align 4 15021 // CHECK16-NEXT: [[TMP151:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 3 15022 // CHECK16-NEXT: [[TMP152:%.*]] = bitcast i8** [[TMP151]] to i32** 15023 // CHECK16-NEXT: store i32* [[VLA]], i32** [[TMP152]], align 4 15024 // CHECK16-NEXT: [[TMP153:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 3 15025 // CHECK16-NEXT: [[TMP154:%.*]] = bitcast i8** [[TMP153]] to i32** 15026 // CHECK16-NEXT: store i32* [[VLA]], i32** [[TMP154]], align 4 15027 // CHECK16-NEXT: [[TMP155:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 3 15028 // CHECK16-NEXT: store i64 [[TMP134]], i64* [[TMP155]], align 4 15029 // CHECK16-NEXT: [[TMP156:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 3 15030 // CHECK16-NEXT: store i8* null, i8** [[TMP156]], align 4 15031 // CHECK16-NEXT: [[TMP157:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0 15032 // CHECK16-NEXT: [[TMP158:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0 15033 // CHECK16-NEXT: [[TMP159:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 0 15034 // CHECK16-NEXT: [[TMP160:%.*]] = load i32, i32* [[N]], align 4 15035 // CHECK16-NEXT: store i32 [[TMP160]], i32* [[DOTCAPTURE_EXPR_52]], align 4 15036 // CHECK16-NEXT: [[TMP161:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_52]], align 4 15037 // CHECK16-NEXT: [[SUB54:%.*]] = sub nsw i32 [[TMP161]], 0 15038 // CHECK16-NEXT: [[DIV55:%.*]] = sdiv i32 [[SUB54]], 1 15039 // CHECK16-NEXT: [[SUB56:%.*]] = sub nsw i32 [[DIV55]], 1 15040 // CHECK16-NEXT: store i32 [[SUB56]], i32* [[DOTCAPTURE_EXPR_53]], align 4 15041 // CHECK16-NEXT: [[TMP162:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_53]], align 4 15042 // CHECK16-NEXT: [[ADD57:%.*]] = add nsw i32 [[TMP162]], 1 15043 // CHECK16-NEXT: [[TMP163:%.*]] = zext i32 [[ADD57]] to i64 15044 // CHECK16-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP163]]) 15045 // CHECK16-NEXT: [[TMP164:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, i32 4, i8** [[TMP157]], i8** [[TMP158]], i64* [[TMP159]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 15046 // CHECK16-NEXT: [[TMP165:%.*]] = icmp ne i32 [[TMP164]], 0 15047 // CHECK16-NEXT: br i1 [[TMP165]], label [[OMP_OFFLOAD_FAILED58:%.*]], label [[OMP_OFFLOAD_CONT59:%.*]] 15048 // CHECK16: omp_offload.failed58: 15049 // CHECK16-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i32 [[TMP130]], i32 [[TMP132]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 15050 // CHECK16-NEXT: br label [[OMP_OFFLOAD_CONT59]] 15051 // CHECK16: omp_offload.cont59: 15052 // CHECK16-NEXT: [[TMP166:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 15053 // CHECK16-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP166]]) 15054 // CHECK16-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 15055 // CHECK16-NEXT: [[TMP167:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 15056 // CHECK16-NEXT: call void @llvm.stackrestore(i8* [[TMP167]]) 15057 // CHECK16-NEXT: [[TMP168:%.*]] = load i32, i32* [[RETVAL]], align 4 15058 // CHECK16-NEXT: ret i32 [[TMP168]] 15059 // 15060 // 15061 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148 15062 // CHECK16-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 15063 // CHECK16-NEXT: entry: 15064 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 15065 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 15066 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 15067 // CHECK16-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 15068 // CHECK16-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 15069 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 15070 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 15071 // CHECK16-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 15072 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 15073 // CHECK16-NEXT: ret void 15074 // 15075 // 15076 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined. 15077 // CHECK16-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 15078 // CHECK16-NEXT: entry: 15079 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 15080 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 15081 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 15082 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 15083 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 15084 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 15085 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 15086 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 15087 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 15088 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 15089 // CHECK16-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 15090 // CHECK16-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 15091 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 15092 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 15093 // CHECK16-NEXT: [[I3:%.*]] = alloca i32, align 4 15094 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 15095 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 15096 // CHECK16-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 15097 // CHECK16-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 15098 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 15099 // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 15100 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 15101 // CHECK16-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 15102 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 15103 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 15104 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15105 // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 15106 // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 15107 // CHECK16-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 15108 // CHECK16-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 15109 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 15110 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15111 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 15112 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 15113 // CHECK16: omp.precond.then: 15114 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 15115 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15116 // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 15117 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 15118 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 15119 // CHECK16-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 15120 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 15121 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 15122 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15123 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15124 // CHECK16-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 15125 // CHECK16-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 15126 // CHECK16: cond.true: 15127 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15128 // CHECK16-NEXT: br label [[COND_END:%.*]] 15129 // CHECK16: cond.false: 15130 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15131 // CHECK16-NEXT: br label [[COND_END]] 15132 // CHECK16: cond.end: 15133 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 15134 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 15135 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 15136 // CHECK16-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 15137 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 15138 // CHECK16: omp.inner.for.cond: 15139 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15140 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15141 // CHECK16-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 15142 // CHECK16-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 15143 // CHECK16: omp.inner.for.body: 15144 // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 15145 // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15146 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 15147 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 15148 // CHECK16: omp.inner.for.inc: 15149 // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15150 // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 15151 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 15152 // CHECK16-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 15153 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]] 15154 // CHECK16: omp.inner.for.end: 15155 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 15156 // CHECK16: omp.loop.exit: 15157 // CHECK16-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 15158 // CHECK16-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 15159 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 15160 // CHECK16-NEXT: br label [[OMP_PRECOND_END]] 15161 // CHECK16: omp.precond.end: 15162 // CHECK16-NEXT: ret void 15163 // 15164 // 15165 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..1 15166 // CHECK16-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 15167 // CHECK16-NEXT: entry: 15168 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 15169 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 15170 // CHECK16-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 15171 // CHECK16-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 15172 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 15173 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 15174 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 15175 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 15176 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 15177 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 15178 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 15179 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 15180 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 15181 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 15182 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 15183 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 15184 // CHECK16-NEXT: [[I3:%.*]] = alloca i32, align 4 15185 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 15186 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 15187 // CHECK16-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 15188 // CHECK16-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 15189 // CHECK16-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 15190 // CHECK16-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 15191 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 15192 // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 15193 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 15194 // CHECK16-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 15195 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 15196 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 15197 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15198 // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 15199 // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 15200 // CHECK16-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 15201 // CHECK16-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 15202 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 15203 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15204 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 15205 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 15206 // CHECK16: omp.precond.then: 15207 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 15208 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15209 // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 15210 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 15211 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 15212 // CHECK16-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 15213 // CHECK16-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 15214 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 15215 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 15216 // CHECK16-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 15217 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 15218 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 15219 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15220 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15221 // CHECK16-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 15222 // CHECK16-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 15223 // CHECK16: cond.true: 15224 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15225 // CHECK16-NEXT: br label [[COND_END:%.*]] 15226 // CHECK16: cond.false: 15227 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15228 // CHECK16-NEXT: br label [[COND_END]] 15229 // CHECK16: cond.end: 15230 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 15231 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 15232 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 15233 // CHECK16-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 15234 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 15235 // CHECK16: omp.inner.for.cond: 15236 // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15237 // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15238 // CHECK16-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 15239 // CHECK16-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 15240 // CHECK16: omp.inner.for.body: 15241 // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15242 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 15243 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 15244 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 15245 // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4 15246 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]] 15247 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 15248 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 15249 // CHECK16: omp.body.continue: 15250 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 15251 // CHECK16: omp.inner.for.inc: 15252 // CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15253 // CHECK16-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1 15254 // CHECK16-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 15255 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]] 15256 // CHECK16: omp.inner.for.end: 15257 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 15258 // CHECK16: omp.loop.exit: 15259 // CHECK16-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 15260 // CHECK16-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 15261 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 15262 // CHECK16-NEXT: br label [[OMP_PRECOND_END]] 15263 // CHECK16: omp.precond.end: 15264 // CHECK16-NEXT: ret void 15265 // 15266 // 15267 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153 15268 // CHECK16-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 15269 // CHECK16-NEXT: entry: 15270 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 15271 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 15272 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 15273 // CHECK16-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 15274 // CHECK16-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 15275 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 15276 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 15277 // CHECK16-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 15278 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 15279 // CHECK16-NEXT: ret void 15280 // 15281 // 15282 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..2 15283 // CHECK16-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 15284 // CHECK16-NEXT: entry: 15285 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 15286 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 15287 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 15288 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 15289 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 15290 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 15291 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 15292 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 15293 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 15294 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 15295 // CHECK16-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 15296 // CHECK16-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 15297 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 15298 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 15299 // CHECK16-NEXT: [[I3:%.*]] = alloca i32, align 4 15300 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 15301 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 15302 // CHECK16-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 15303 // CHECK16-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 15304 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 15305 // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 15306 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 15307 // CHECK16-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 15308 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 15309 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 15310 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15311 // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 15312 // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 15313 // CHECK16-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 15314 // CHECK16-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 15315 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 15316 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15317 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 15318 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 15319 // CHECK16: omp.precond.then: 15320 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 15321 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15322 // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 15323 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 15324 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 15325 // CHECK16-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 15326 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 15327 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 15328 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15329 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15330 // CHECK16-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 15331 // CHECK16-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 15332 // CHECK16: cond.true: 15333 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15334 // CHECK16-NEXT: br label [[COND_END:%.*]] 15335 // CHECK16: cond.false: 15336 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15337 // CHECK16-NEXT: br label [[COND_END]] 15338 // CHECK16: cond.end: 15339 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 15340 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 15341 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 15342 // CHECK16-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 15343 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 15344 // CHECK16: omp.inner.for.cond: 15345 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15346 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15347 // CHECK16-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 15348 // CHECK16-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 15349 // CHECK16: omp.inner.for.body: 15350 // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 15351 // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15352 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 15353 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 15354 // CHECK16: omp.inner.for.inc: 15355 // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15356 // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 15357 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 15358 // CHECK16-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 15359 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]] 15360 // CHECK16: omp.inner.for.end: 15361 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 15362 // CHECK16: omp.loop.exit: 15363 // CHECK16-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 15364 // CHECK16-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 15365 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 15366 // CHECK16-NEXT: br label [[OMP_PRECOND_END]] 15367 // CHECK16: omp.precond.end: 15368 // CHECK16-NEXT: ret void 15369 // 15370 // 15371 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..3 15372 // CHECK16-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 15373 // CHECK16-NEXT: entry: 15374 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 15375 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 15376 // CHECK16-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 15377 // CHECK16-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 15378 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 15379 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 15380 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 15381 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 15382 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 15383 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 15384 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 15385 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 15386 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 15387 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 15388 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 15389 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 15390 // CHECK16-NEXT: [[I3:%.*]] = alloca i32, align 4 15391 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 15392 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 15393 // CHECK16-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 15394 // CHECK16-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 15395 // CHECK16-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 15396 // CHECK16-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 15397 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 15398 // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 15399 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 15400 // CHECK16-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 15401 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 15402 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 15403 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15404 // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 15405 // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 15406 // CHECK16-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 15407 // CHECK16-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 15408 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 15409 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15410 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 15411 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 15412 // CHECK16: omp.precond.then: 15413 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 15414 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15415 // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 15416 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 15417 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 15418 // CHECK16-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 15419 // CHECK16-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 15420 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 15421 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 15422 // CHECK16-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 15423 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 15424 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 15425 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15426 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15427 // CHECK16-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 15428 // CHECK16-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 15429 // CHECK16: cond.true: 15430 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15431 // CHECK16-NEXT: br label [[COND_END:%.*]] 15432 // CHECK16: cond.false: 15433 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15434 // CHECK16-NEXT: br label [[COND_END]] 15435 // CHECK16: cond.end: 15436 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 15437 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 15438 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 15439 // CHECK16-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 15440 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 15441 // CHECK16: omp.inner.for.cond: 15442 // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15443 // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15444 // CHECK16-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 15445 // CHECK16-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 15446 // CHECK16: omp.inner.for.body: 15447 // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15448 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 15449 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 15450 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 15451 // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4 15452 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]] 15453 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 15454 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 15455 // CHECK16: omp.body.continue: 15456 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 15457 // CHECK16: omp.inner.for.inc: 15458 // CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15459 // CHECK16-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1 15460 // CHECK16-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 15461 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]] 15462 // CHECK16: omp.inner.for.end: 15463 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 15464 // CHECK16: omp.loop.exit: 15465 // CHECK16-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 15466 // CHECK16-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 15467 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 15468 // CHECK16-NEXT: br label [[OMP_PRECOND_END]] 15469 // CHECK16: omp.precond.end: 15470 // CHECK16-NEXT: ret void 15471 // 15472 // 15473 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158 15474 // CHECK16-SAME: (i32 noundef [[M:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 15475 // CHECK16-NEXT: entry: 15476 // CHECK16-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 15477 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 15478 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 15479 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 15480 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 15481 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 15482 // CHECK16-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 15483 // CHECK16-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 15484 // CHECK16-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 15485 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 15486 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 15487 // CHECK16-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 15488 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4 15489 // CHECK16-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 15490 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15491 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 15492 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 15493 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]]) 15494 // CHECK16-NEXT: ret void 15495 // 15496 // 15497 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..6 15498 // CHECK16-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 15499 // CHECK16-NEXT: entry: 15500 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 15501 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 15502 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 15503 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 15504 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 15505 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 15506 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 15507 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 15508 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 15509 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 15510 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 15511 // CHECK16-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 15512 // CHECK16-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 15513 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 15514 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 15515 // CHECK16-NEXT: [[I4:%.*]] = alloca i32, align 4 15516 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 15517 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 15518 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 15519 // CHECK16-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 15520 // CHECK16-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 15521 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 15522 // CHECK16-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 15523 // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 15524 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 15525 // CHECK16-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 15526 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 15527 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 15528 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15529 // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 15530 // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 15531 // CHECK16-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 15532 // CHECK16-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 15533 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 15534 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15535 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 15536 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 15537 // CHECK16: omp.precond.then: 15538 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 15539 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 15540 // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 15541 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 15542 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 15543 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 15544 // CHECK16-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 15545 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 15546 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]]) 15547 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15548 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 15549 // CHECK16-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 15550 // CHECK16-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 15551 // CHECK16: cond.true: 15552 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 15553 // CHECK16-NEXT: br label [[COND_END:%.*]] 15554 // CHECK16: cond.false: 15555 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15556 // CHECK16-NEXT: br label [[COND_END]] 15557 // CHECK16: cond.end: 15558 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 15559 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 15560 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 15561 // CHECK16-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 15562 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 15563 // CHECK16: omp.inner.for.cond: 15564 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15565 // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 15566 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1 15567 // CHECK16-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]] 15568 // CHECK16-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 15569 // CHECK16: omp.inner.for.body: 15570 // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 15571 // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15572 // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 15573 // CHECK16-NEXT: store i32 [[TMP19]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 15574 // CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 15575 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP20]]) 15576 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 15577 // CHECK16: omp.inner.for.inc: 15578 // CHECK16-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15579 // CHECK16-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 15580 // CHECK16-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 15581 // CHECK16-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 15582 // CHECK16-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 15583 // CHECK16-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 15584 // CHECK16-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 15585 // CHECK16-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4 15586 // CHECK16-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15587 // CHECK16-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 15588 // CHECK16-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 15589 // CHECK16-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4 15590 // CHECK16-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15591 // CHECK16-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 15592 // CHECK16-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP27]], [[TMP28]] 15593 // CHECK16-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]] 15594 // CHECK16: cond.true11: 15595 // CHECK16-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 15596 // CHECK16-NEXT: br label [[COND_END13:%.*]] 15597 // CHECK16: cond.false12: 15598 // CHECK16-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15599 // CHECK16-NEXT: br label [[COND_END13]] 15600 // CHECK16: cond.end13: 15601 // CHECK16-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP29]], [[COND_TRUE11]] ], [ [[TMP30]], [[COND_FALSE12]] ] 15602 // CHECK16-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4 15603 // CHECK16-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 15604 // CHECK16-NEXT: store i32 [[TMP31]], i32* [[DOTOMP_IV]], align 4 15605 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]] 15606 // CHECK16: omp.inner.for.end: 15607 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 15608 // CHECK16: omp.loop.exit: 15609 // CHECK16-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 15610 // CHECK16-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4 15611 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]]) 15612 // CHECK16-NEXT: br label [[OMP_PRECOND_END]] 15613 // CHECK16: omp.precond.end: 15614 // CHECK16-NEXT: ret void 15615 // 15616 // 15617 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..7 15618 // CHECK16-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 15619 // CHECK16-NEXT: entry: 15620 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 15621 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 15622 // CHECK16-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 15623 // CHECK16-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 15624 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 15625 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 15626 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 15627 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 15628 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 15629 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 15630 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 15631 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 15632 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 15633 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 15634 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 15635 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 15636 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 15637 // CHECK16-NEXT: [[I4:%.*]] = alloca i32, align 4 15638 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 15639 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 15640 // CHECK16-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 15641 // CHECK16-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 15642 // CHECK16-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 15643 // CHECK16-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 15644 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 15645 // CHECK16-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 15646 // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 15647 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 15648 // CHECK16-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 15649 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 15650 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 15651 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15652 // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 15653 // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 15654 // CHECK16-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 15655 // CHECK16-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 15656 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 15657 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15658 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 15659 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 15660 // CHECK16: omp.precond.then: 15661 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 15662 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 15663 // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 15664 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 15665 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 15666 // CHECK16-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 15667 // CHECK16-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 15668 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 15669 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 15670 // CHECK16-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 15671 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 15672 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 15673 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15674 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 15675 // CHECK16-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 15676 // CHECK16-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 15677 // CHECK16: cond.true: 15678 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 15679 // CHECK16-NEXT: br label [[COND_END:%.*]] 15680 // CHECK16: cond.false: 15681 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15682 // CHECK16-NEXT: br label [[COND_END]] 15683 // CHECK16: cond.end: 15684 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 15685 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 15686 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 15687 // CHECK16-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 15688 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 15689 // CHECK16: omp.inner.for.cond: 15690 // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15691 // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15692 // CHECK16-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 15693 // CHECK16-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 15694 // CHECK16: omp.inner.for.body: 15695 // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15696 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 15697 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 15698 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 15699 // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4 15700 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]] 15701 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 15702 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 15703 // CHECK16: omp.body.continue: 15704 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 15705 // CHECK16: omp.inner.for.inc: 15706 // CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15707 // CHECK16-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 15708 // CHECK16-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 15709 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]] 15710 // CHECK16: omp.inner.for.end: 15711 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 15712 // CHECK16: omp.loop.exit: 15713 // CHECK16-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 15714 // CHECK16-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 15715 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 15716 // CHECK16-NEXT: br label [[OMP_PRECOND_END]] 15717 // CHECK16: omp.precond.end: 15718 // CHECK16-NEXT: ret void 15719 // 15720 // 15721 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163 15722 // CHECK16-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 15723 // CHECK16-NEXT: entry: 15724 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 15725 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 15726 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 15727 // CHECK16-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 15728 // CHECK16-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 15729 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 15730 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 15731 // CHECK16-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 15732 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 15733 // CHECK16-NEXT: ret void 15734 // 15735 // 15736 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..10 15737 // CHECK16-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 15738 // CHECK16-NEXT: entry: 15739 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 15740 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 15741 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 15742 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 15743 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 15744 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 15745 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 15746 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 15747 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 15748 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 15749 // CHECK16-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 15750 // CHECK16-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 15751 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 15752 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 15753 // CHECK16-NEXT: [[I3:%.*]] = alloca i32, align 4 15754 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 15755 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 15756 // CHECK16-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 15757 // CHECK16-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 15758 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 15759 // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 15760 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 15761 // CHECK16-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 15762 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 15763 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 15764 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15765 // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 15766 // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 15767 // CHECK16-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 15768 // CHECK16-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 15769 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 15770 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15771 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 15772 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 15773 // CHECK16: omp.precond.then: 15774 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 15775 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15776 // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 15777 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 15778 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 15779 // CHECK16-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 15780 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 15781 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 15782 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15783 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15784 // CHECK16-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 15785 // CHECK16-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 15786 // CHECK16: cond.true: 15787 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15788 // CHECK16-NEXT: br label [[COND_END:%.*]] 15789 // CHECK16: cond.false: 15790 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15791 // CHECK16-NEXT: br label [[COND_END]] 15792 // CHECK16: cond.end: 15793 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 15794 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 15795 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 15796 // CHECK16-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 15797 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 15798 // CHECK16: omp.inner.for.cond: 15799 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15800 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15801 // CHECK16-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 15802 // CHECK16-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 15803 // CHECK16: omp.inner.for.body: 15804 // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 15805 // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15806 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 15807 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 15808 // CHECK16: omp.inner.for.inc: 15809 // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15810 // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 15811 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 15812 // CHECK16-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 15813 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]] 15814 // CHECK16: omp.inner.for.end: 15815 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 15816 // CHECK16: omp.loop.exit: 15817 // CHECK16-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 15818 // CHECK16-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 15819 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 15820 // CHECK16-NEXT: br label [[OMP_PRECOND_END]] 15821 // CHECK16: omp.precond.end: 15822 // CHECK16-NEXT: ret void 15823 // 15824 // 15825 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..11 15826 // CHECK16-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 15827 // CHECK16-NEXT: entry: 15828 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 15829 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 15830 // CHECK16-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 15831 // CHECK16-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 15832 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 15833 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 15834 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 15835 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 15836 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 15837 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 15838 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 15839 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 15840 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 15841 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 15842 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 15843 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 15844 // CHECK16-NEXT: [[I3:%.*]] = alloca i32, align 4 15845 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 15846 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 15847 // CHECK16-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 15848 // CHECK16-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 15849 // CHECK16-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 15850 // CHECK16-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 15851 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 15852 // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 15853 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 15854 // CHECK16-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 15855 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 15856 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 15857 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15858 // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 15859 // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 15860 // CHECK16-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 15861 // CHECK16-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 15862 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 15863 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15864 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 15865 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 15866 // CHECK16: omp.precond.then: 15867 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 15868 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15869 // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 15870 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 15871 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 15872 // CHECK16-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 15873 // CHECK16-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 15874 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 15875 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 15876 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 15877 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15878 // CHECK16-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 15879 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 15880 // CHECK16-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1) 15881 // CHECK16-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 15882 // CHECK16: omp.dispatch.cond: 15883 // CHECK16-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 15884 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 15885 // CHECK16-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 15886 // CHECK16-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 15887 // CHECK16-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 15888 // CHECK16: omp.dispatch.body: 15889 // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 15890 // CHECK16-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 15891 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 15892 // CHECK16: omp.inner.for.cond: 15893 // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 15894 // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16 15895 // CHECK16-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 15896 // CHECK16-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 15897 // CHECK16: omp.inner.for.body: 15898 // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 15899 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 15900 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 15901 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !16 15902 // CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !16 15903 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP20]] 15904 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !16 15905 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 15906 // CHECK16: omp.body.continue: 15907 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 15908 // CHECK16: omp.inner.for.inc: 15909 // CHECK16-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 15910 // CHECK16-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP21]], 1 15911 // CHECK16-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 15912 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]] 15913 // CHECK16: omp.inner.for.end: 15914 // CHECK16-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 15915 // CHECK16: omp.dispatch.inc: 15916 // CHECK16-NEXT: br label [[OMP_DISPATCH_COND]] 15917 // CHECK16: omp.dispatch.end: 15918 // CHECK16-NEXT: br label [[OMP_PRECOND_END]] 15919 // CHECK16: omp.precond.end: 15920 // CHECK16-NEXT: ret void 15921 // 15922 // 15923 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168 15924 // CHECK16-SAME: (i32 noundef [[M:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 15925 // CHECK16-NEXT: entry: 15926 // CHECK16-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 15927 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 15928 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 15929 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 15930 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 15931 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 15932 // CHECK16-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 15933 // CHECK16-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 15934 // CHECK16-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 15935 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 15936 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 15937 // CHECK16-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 15938 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4 15939 // CHECK16-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 15940 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15941 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 15942 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 15943 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]]) 15944 // CHECK16-NEXT: ret void 15945 // 15946 // 15947 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..14 15948 // CHECK16-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 15949 // CHECK16-NEXT: entry: 15950 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 15951 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 15952 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 15953 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 15954 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 15955 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 15956 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 15957 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 15958 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 15959 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 15960 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 15961 // CHECK16-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 15962 // CHECK16-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 15963 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 15964 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 15965 // CHECK16-NEXT: [[I4:%.*]] = alloca i32, align 4 15966 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 15967 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 15968 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 15969 // CHECK16-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 15970 // CHECK16-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 15971 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 15972 // CHECK16-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 15973 // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 15974 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 15975 // CHECK16-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 15976 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 15977 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 15978 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15979 // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 15980 // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 15981 // CHECK16-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 15982 // CHECK16-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 15983 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 15984 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15985 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 15986 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 15987 // CHECK16: omp.precond.then: 15988 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 15989 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 15990 // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 15991 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 15992 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 15993 // CHECK16-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 15994 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 15995 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 15996 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15997 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 15998 // CHECK16-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 15999 // CHECK16-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 16000 // CHECK16: cond.true: 16001 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 16002 // CHECK16-NEXT: br label [[COND_END:%.*]] 16003 // CHECK16: cond.false: 16004 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16005 // CHECK16-NEXT: br label [[COND_END]] 16006 // CHECK16: cond.end: 16007 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 16008 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 16009 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 16010 // CHECK16-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 16011 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 16012 // CHECK16: omp.inner.for.cond: 16013 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16014 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16015 // CHECK16-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 16016 // CHECK16-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 16017 // CHECK16: omp.inner.for.body: 16018 // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 16019 // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16020 // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 16021 // CHECK16-NEXT: store i32 [[TMP18]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 16022 // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 16023 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP19]]) 16024 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 16025 // CHECK16: omp.inner.for.inc: 16026 // CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16027 // CHECK16-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 16028 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 16029 // CHECK16-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 16030 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]] 16031 // CHECK16: omp.inner.for.end: 16032 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 16033 // CHECK16: omp.loop.exit: 16034 // CHECK16-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 16035 // CHECK16-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 16036 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 16037 // CHECK16-NEXT: br label [[OMP_PRECOND_END]] 16038 // CHECK16: omp.precond.end: 16039 // CHECK16-NEXT: ret void 16040 // 16041 // 16042 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..15 16043 // CHECK16-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 16044 // CHECK16-NEXT: entry: 16045 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 16046 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 16047 // CHECK16-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 16048 // CHECK16-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 16049 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 16050 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 16051 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 16052 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 16053 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 16054 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 16055 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 16056 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 16057 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 16058 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 16059 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 16060 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 16061 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 16062 // CHECK16-NEXT: [[I4:%.*]] = alloca i32, align 4 16063 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 16064 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 16065 // CHECK16-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 16066 // CHECK16-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 16067 // CHECK16-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 16068 // CHECK16-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 16069 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 16070 // CHECK16-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 16071 // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 16072 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 16073 // CHECK16-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 16074 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 16075 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 16076 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 16077 // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 16078 // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 16079 // CHECK16-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 16080 // CHECK16-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 16081 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 16082 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 16083 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 16084 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 16085 // CHECK16: omp.precond.then: 16086 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 16087 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 16088 // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 16089 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 16090 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 16091 // CHECK16-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 16092 // CHECK16-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 16093 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 16094 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 16095 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 16096 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 16097 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16098 // CHECK16-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 16099 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 16100 // CHECK16-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 1073741859, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]]) 16101 // CHECK16-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 16102 // CHECK16: omp.dispatch.cond: 16103 // CHECK16-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 16104 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 16105 // CHECK16-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 16106 // CHECK16-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 16107 // CHECK16-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 16108 // CHECK16: omp.dispatch.body: 16109 // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 16110 // CHECK16-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 16111 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 16112 // CHECK16: omp.inner.for.cond: 16113 // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 16114 // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !19 16115 // CHECK16-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 16116 // CHECK16-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 16117 // CHECK16: omp.inner.for.body: 16118 // CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 16119 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 16120 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 16121 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !19 16122 // CHECK16-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !19 16123 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP21]] 16124 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !19 16125 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 16126 // CHECK16: omp.body.continue: 16127 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 16128 // CHECK16: omp.inner.for.inc: 16129 // CHECK16-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 16130 // CHECK16-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP22]], 1 16131 // CHECK16-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 16132 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]] 16133 // CHECK16: omp.inner.for.end: 16134 // CHECK16-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 16135 // CHECK16: omp.dispatch.inc: 16136 // CHECK16-NEXT: br label [[OMP_DISPATCH_COND]] 16137 // CHECK16: omp.dispatch.end: 16138 // CHECK16-NEXT: br label [[OMP_PRECOND_END]] 16139 // CHECK16: omp.precond.end: 16140 // CHECK16-NEXT: ret void 16141 // 16142 // 16143 // CHECK16-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 16144 // CHECK16-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 16145 // CHECK16-NEXT: entry: 16146 // CHECK16-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 16147 // CHECK16-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 16148 // CHECK16-NEXT: [[M:%.*]] = alloca i32, align 4 16149 // CHECK16-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 16150 // CHECK16-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 16151 // CHECK16-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 16152 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 16153 // CHECK16-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4 16154 // CHECK16-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4 16155 // CHECK16-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4 16156 // CHECK16-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 16157 // CHECK16-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4 16158 // CHECK16-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 4 16159 // CHECK16-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 4 16160 // CHECK16-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 4 16161 // CHECK16-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 16162 // CHECK16-NEXT: [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 4 16163 // CHECK16-NEXT: [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 4 16164 // CHECK16-NEXT: [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 4 16165 // CHECK16-NEXT: [[_TMP16:%.*]] = alloca i32, align 4 16166 // CHECK16-NEXT: [[M_CASTED19:%.*]] = alloca i32, align 4 16167 // CHECK16-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [2 x i8*], align 4 16168 // CHECK16-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [2 x i8*], align 4 16169 // CHECK16-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [2 x i8*], align 4 16170 // CHECK16-NEXT: [[_TMP23:%.*]] = alloca i32, align 4 16171 // CHECK16-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 16172 // CHECK16-NEXT: store i32 10, i32* [[M]], align 4 16173 // CHECK16-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 16174 // CHECK16-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 16175 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4 16176 // CHECK16-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 16177 // CHECK16-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 16178 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4 16179 // CHECK16-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 16180 // CHECK16-NEXT: store i8* null, i8** [[TMP4]], align 4 16181 // CHECK16-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 16182 // CHECK16-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 16183 // CHECK16-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 16184 // CHECK16-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.20, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.21, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 16185 // CHECK16-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 16186 // CHECK16-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 16187 // CHECK16: omp_offload.failed: 16188 // CHECK16-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]] 16189 // CHECK16-NEXT: br label [[OMP_OFFLOAD_CONT]] 16190 // CHECK16: omp_offload.cont: 16191 // CHECK16-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 16192 // CHECK16-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** 16193 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4 16194 // CHECK16-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 16195 // CHECK16-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** 16196 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4 16197 // CHECK16-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0 16198 // CHECK16-NEXT: store i8* null, i8** [[TMP13]], align 4 16199 // CHECK16-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 16200 // CHECK16-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 16201 // CHECK16-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 16202 // CHECK16-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.24, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.25, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 16203 // CHECK16-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 16204 // CHECK16-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 16205 // CHECK16: omp_offload.failed5: 16206 // CHECK16-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121([10 x i32]* [[A]]) #[[ATTR3]] 16207 // CHECK16-NEXT: br label [[OMP_OFFLOAD_CONT6]] 16208 // CHECK16: omp_offload.cont6: 16209 // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[M]], align 4 16210 // CHECK16-NEXT: store i32 [[TMP18]], i32* [[M_CASTED]], align 4 16211 // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[M_CASTED]], align 4 16212 // CHECK16-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 16213 // CHECK16-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32* 16214 // CHECK16-NEXT: store i32 [[TMP19]], i32* [[TMP21]], align 4 16215 // CHECK16-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 16216 // CHECK16-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32* 16217 // CHECK16-NEXT: store i32 [[TMP19]], i32* [[TMP23]], align 4 16218 // CHECK16-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0 16219 // CHECK16-NEXT: store i8* null, i8** [[TMP24]], align 4 16220 // CHECK16-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1 16221 // CHECK16-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]** 16222 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 4 16223 // CHECK16-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1 16224 // CHECK16-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]** 16225 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 4 16226 // CHECK16-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 1 16227 // CHECK16-NEXT: store i8* null, i8** [[TMP29]], align 4 16228 // CHECK16-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 16229 // CHECK16-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 16230 // CHECK16-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 16231 // CHECK16-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.28, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.29, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 16232 // CHECK16-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 16233 // CHECK16-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] 16234 // CHECK16: omp_offload.failed11: 16235 // CHECK16-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i32 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]] 16236 // CHECK16-NEXT: br label [[OMP_OFFLOAD_CONT12]] 16237 // CHECK16: omp_offload.cont12: 16238 // CHECK16-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 16239 // CHECK16-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]** 16240 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 4 16241 // CHECK16-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 16242 // CHECK16-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]** 16243 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 4 16244 // CHECK16-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 0 16245 // CHECK16-NEXT: store i8* null, i8** [[TMP38]], align 4 16246 // CHECK16-NEXT: [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 16247 // CHECK16-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 16248 // CHECK16-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 16249 // CHECK16-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.32, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.33, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 16250 // CHECK16-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0 16251 // CHECK16-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]] 16252 // CHECK16: omp_offload.failed17: 16253 // CHECK16-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131([10 x i32]* [[A]]) #[[ATTR3]] 16254 // CHECK16-NEXT: br label [[OMP_OFFLOAD_CONT18]] 16255 // CHECK16: omp_offload.cont18: 16256 // CHECK16-NEXT: [[TMP43:%.*]] = load i32, i32* [[M]], align 4 16257 // CHECK16-NEXT: store i32 [[TMP43]], i32* [[M_CASTED19]], align 4 16258 // CHECK16-NEXT: [[TMP44:%.*]] = load i32, i32* [[M_CASTED19]], align 4 16259 // CHECK16-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 16260 // CHECK16-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32* 16261 // CHECK16-NEXT: store i32 [[TMP44]], i32* [[TMP46]], align 4 16262 // CHECK16-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 16263 // CHECK16-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32* 16264 // CHECK16-NEXT: store i32 [[TMP44]], i32* [[TMP48]], align 4 16265 // CHECK16-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 0 16266 // CHECK16-NEXT: store i8* null, i8** [[TMP49]], align 4 16267 // CHECK16-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1 16268 // CHECK16-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]** 16269 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 4 16270 // CHECK16-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 1 16271 // CHECK16-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]** 16272 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 4 16273 // CHECK16-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 1 16274 // CHECK16-NEXT: store i8* null, i8** [[TMP54]], align 4 16275 // CHECK16-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 16276 // CHECK16-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 16277 // CHECK16-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 16278 // CHECK16-NEXT: [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.36, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.37, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 16279 // CHECK16-NEXT: [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0 16280 // CHECK16-NEXT: br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]] 16281 // CHECK16: omp_offload.failed24: 16282 // CHECK16-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i32 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]] 16283 // CHECK16-NEXT: br label [[OMP_OFFLOAD_CONT25]] 16284 // CHECK16: omp_offload.cont25: 16285 // CHECK16-NEXT: ret i32 0 16286 // 16287 // 16288 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116 16289 // CHECK16-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 16290 // CHECK16-NEXT: entry: 16291 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 16292 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 16293 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 16294 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 16295 // CHECK16-NEXT: ret void 16296 // 16297 // 16298 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..18 16299 // CHECK16-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 16300 // CHECK16-NEXT: entry: 16301 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 16302 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 16303 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 16304 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 16305 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 16306 // CHECK16-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 16307 // CHECK16-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 16308 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 16309 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 16310 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 16311 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 16312 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 16313 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 16314 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 16315 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 16316 // CHECK16-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 16317 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 16318 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 16319 // CHECK16-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 16320 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 16321 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 16322 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16323 // CHECK16-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 16324 // CHECK16-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 16325 // CHECK16: cond.true: 16326 // CHECK16-NEXT: br label [[COND_END:%.*]] 16327 // CHECK16: cond.false: 16328 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16329 // CHECK16-NEXT: br label [[COND_END]] 16330 // CHECK16: cond.end: 16331 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 16332 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 16333 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 16334 // CHECK16-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 16335 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 16336 // CHECK16: omp.inner.for.cond: 16337 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16338 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16339 // CHECK16-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 16340 // CHECK16-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 16341 // CHECK16: omp.inner.for.body: 16342 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 16343 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16344 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..19 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]) 16345 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 16346 // CHECK16: omp.inner.for.inc: 16347 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16348 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 16349 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 16350 // CHECK16-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 16351 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]] 16352 // CHECK16: omp.inner.for.end: 16353 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 16354 // CHECK16: omp.loop.exit: 16355 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 16356 // CHECK16-NEXT: ret void 16357 // 16358 // 16359 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..19 16360 // CHECK16-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 16361 // CHECK16-NEXT: entry: 16362 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 16363 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 16364 // CHECK16-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 16365 // CHECK16-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 16366 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 16367 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 16368 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 16369 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 16370 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 16371 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 16372 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 16373 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 16374 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 16375 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 16376 // CHECK16-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 16377 // CHECK16-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 16378 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 16379 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 16380 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 16381 // CHECK16-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 16382 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 16383 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 16384 // CHECK16-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 16385 // CHECK16-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 16386 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 16387 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 16388 // CHECK16-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 16389 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 16390 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 16391 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16392 // CHECK16-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 16393 // CHECK16-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 16394 // CHECK16: cond.true: 16395 // CHECK16-NEXT: br label [[COND_END:%.*]] 16396 // CHECK16: cond.false: 16397 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16398 // CHECK16-NEXT: br label [[COND_END]] 16399 // CHECK16: cond.end: 16400 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 16401 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 16402 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 16403 // CHECK16-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 16404 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 16405 // CHECK16: omp.inner.for.cond: 16406 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16407 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16408 // CHECK16-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 16409 // CHECK16-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 16410 // CHECK16: omp.inner.for.body: 16411 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16412 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 16413 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 16414 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4 16415 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 16416 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]] 16417 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 16418 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 16419 // CHECK16: omp.body.continue: 16420 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 16421 // CHECK16: omp.inner.for.inc: 16422 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16423 // CHECK16-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 16424 // CHECK16-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 16425 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]] 16426 // CHECK16: omp.inner.for.end: 16427 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 16428 // CHECK16: omp.loop.exit: 16429 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 16430 // CHECK16-NEXT: ret void 16431 // 16432 // 16433 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121 16434 // CHECK16-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 16435 // CHECK16-NEXT: entry: 16436 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 16437 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 16438 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 16439 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..22 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 16440 // CHECK16-NEXT: ret void 16441 // 16442 // 16443 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..22 16444 // CHECK16-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 16445 // CHECK16-NEXT: entry: 16446 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 16447 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 16448 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 16449 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 16450 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 16451 // CHECK16-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 16452 // CHECK16-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 16453 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 16454 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 16455 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 16456 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 16457 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 16458 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 16459 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 16460 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 16461 // CHECK16-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 16462 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 16463 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 16464 // CHECK16-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 16465 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 16466 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 16467 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16468 // CHECK16-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 16469 // CHECK16-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 16470 // CHECK16: cond.true: 16471 // CHECK16-NEXT: br label [[COND_END:%.*]] 16472 // CHECK16: cond.false: 16473 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16474 // CHECK16-NEXT: br label [[COND_END]] 16475 // CHECK16: cond.end: 16476 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 16477 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 16478 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 16479 // CHECK16-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 16480 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 16481 // CHECK16: omp.inner.for.cond: 16482 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16483 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16484 // CHECK16-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 16485 // CHECK16-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 16486 // CHECK16: omp.inner.for.body: 16487 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 16488 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16489 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..23 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]) 16490 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 16491 // CHECK16: omp.inner.for.inc: 16492 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16493 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 16494 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 16495 // CHECK16-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 16496 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]] 16497 // CHECK16: omp.inner.for.end: 16498 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 16499 // CHECK16: omp.loop.exit: 16500 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 16501 // CHECK16-NEXT: ret void 16502 // 16503 // 16504 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..23 16505 // CHECK16-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 16506 // CHECK16-NEXT: entry: 16507 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 16508 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 16509 // CHECK16-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 16510 // CHECK16-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 16511 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 16512 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 16513 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 16514 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 16515 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 16516 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 16517 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 16518 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 16519 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 16520 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 16521 // CHECK16-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 16522 // CHECK16-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 16523 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 16524 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 16525 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 16526 // CHECK16-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 16527 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 16528 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 16529 // CHECK16-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 16530 // CHECK16-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 16531 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 16532 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 16533 // CHECK16-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 16534 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 16535 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 16536 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16537 // CHECK16-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 16538 // CHECK16-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 16539 // CHECK16: cond.true: 16540 // CHECK16-NEXT: br label [[COND_END:%.*]] 16541 // CHECK16: cond.false: 16542 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16543 // CHECK16-NEXT: br label [[COND_END]] 16544 // CHECK16: cond.end: 16545 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 16546 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 16547 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 16548 // CHECK16-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 16549 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 16550 // CHECK16: omp.inner.for.cond: 16551 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16552 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16553 // CHECK16-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 16554 // CHECK16-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 16555 // CHECK16: omp.inner.for.body: 16556 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16557 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 16558 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 16559 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4 16560 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 16561 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]] 16562 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 16563 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 16564 // CHECK16: omp.body.continue: 16565 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 16566 // CHECK16: omp.inner.for.inc: 16567 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16568 // CHECK16-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 16569 // CHECK16-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 16570 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]] 16571 // CHECK16: omp.inner.for.end: 16572 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 16573 // CHECK16: omp.loop.exit: 16574 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 16575 // CHECK16-NEXT: ret void 16576 // 16577 // 16578 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126 16579 // CHECK16-SAME: (i32 noundef [[M:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 16580 // CHECK16-NEXT: entry: 16581 // CHECK16-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 16582 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 16583 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 16584 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 16585 // CHECK16-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 16586 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 16587 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 16588 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4 16589 // CHECK16-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 16590 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 16591 // CHECK16-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 16592 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 16593 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..26 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]]) 16594 // CHECK16-NEXT: ret void 16595 // 16596 // 16597 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..26 16598 // CHECK16-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 16599 // CHECK16-NEXT: entry: 16600 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 16601 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 16602 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 16603 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 16604 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 16605 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 16606 // CHECK16-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 16607 // CHECK16-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 16608 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 16609 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 16610 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 16611 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 16612 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 16613 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 16614 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 16615 // CHECK16-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 16616 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 16617 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 16618 // CHECK16-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 16619 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 16620 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 16621 // CHECK16-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 16622 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 16623 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 16624 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16625 // CHECK16-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 16626 // CHECK16-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 16627 // CHECK16: cond.true: 16628 // CHECK16-NEXT: br label [[COND_END:%.*]] 16629 // CHECK16: cond.false: 16630 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16631 // CHECK16-NEXT: br label [[COND_END]] 16632 // CHECK16: cond.end: 16633 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 16634 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 16635 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 16636 // CHECK16-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 16637 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 16638 // CHECK16: omp.inner.for.cond: 16639 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16640 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16641 // CHECK16-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 16642 // CHECK16-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 16643 // CHECK16: omp.inner.for.body: 16644 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 16645 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16646 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 16647 // CHECK16-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 16648 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 16649 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..27 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]]) 16650 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 16651 // CHECK16: omp.inner.for.inc: 16652 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16653 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 16654 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 16655 // CHECK16-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 16656 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]] 16657 // CHECK16: omp.inner.for.end: 16658 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 16659 // CHECK16: omp.loop.exit: 16660 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 16661 // CHECK16-NEXT: ret void 16662 // 16663 // 16664 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..27 16665 // CHECK16-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 16666 // CHECK16-NEXT: entry: 16667 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 16668 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 16669 // CHECK16-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 16670 // CHECK16-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 16671 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 16672 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 16673 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 16674 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 16675 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 16676 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 16677 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 16678 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 16679 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 16680 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 16681 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 16682 // CHECK16-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 16683 // CHECK16-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 16684 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 16685 // CHECK16-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 16686 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 16687 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 16688 // CHECK16-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 16689 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 16690 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 16691 // CHECK16-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 16692 // CHECK16-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 16693 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 16694 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 16695 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 16696 // CHECK16-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 16697 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 16698 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]]) 16699 // CHECK16-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 16700 // CHECK16: omp.dispatch.cond: 16701 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16702 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 16703 // CHECK16-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]] 16704 // CHECK16-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 16705 // CHECK16: cond.true: 16706 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 16707 // CHECK16-NEXT: br label [[COND_END:%.*]] 16708 // CHECK16: cond.false: 16709 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16710 // CHECK16-NEXT: br label [[COND_END]] 16711 // CHECK16: cond.end: 16712 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ [[TMP8]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 16713 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 16714 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 16715 // CHECK16-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 16716 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16717 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16718 // CHECK16-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 16719 // CHECK16-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 16720 // CHECK16: omp.dispatch.body: 16721 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 16722 // CHECK16: omp.inner.for.cond: 16723 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16724 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16725 // CHECK16-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 16726 // CHECK16-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 16727 // CHECK16: omp.inner.for.body: 16728 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16729 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 16730 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 16731 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4 16732 // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4 16733 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP16]] 16734 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 16735 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 16736 // CHECK16: omp.body.continue: 16737 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 16738 // CHECK16: omp.inner.for.inc: 16739 // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16740 // CHECK16-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1 16741 // CHECK16-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 16742 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]] 16743 // CHECK16: omp.inner.for.end: 16744 // CHECK16-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 16745 // CHECK16: omp.dispatch.inc: 16746 // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 16747 // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 16748 // CHECK16-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 16749 // CHECK16-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 16750 // CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16751 // CHECK16-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 16752 // CHECK16-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 16753 // CHECK16-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 16754 // CHECK16-NEXT: br label [[OMP_DISPATCH_COND]] 16755 // CHECK16: omp.dispatch.end: 16756 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 16757 // CHECK16-NEXT: ret void 16758 // 16759 // 16760 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131 16761 // CHECK16-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 16762 // CHECK16-NEXT: entry: 16763 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 16764 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 16765 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 16766 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..30 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 16767 // CHECK16-NEXT: ret void 16768 // 16769 // 16770 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..30 16771 // CHECK16-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 16772 // CHECK16-NEXT: entry: 16773 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 16774 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 16775 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 16776 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 16777 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 16778 // CHECK16-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 16779 // CHECK16-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 16780 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 16781 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 16782 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 16783 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 16784 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 16785 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 16786 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 16787 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 16788 // CHECK16-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 16789 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 16790 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 16791 // CHECK16-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 16792 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 16793 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 16794 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16795 // CHECK16-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 16796 // CHECK16-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 16797 // CHECK16: cond.true: 16798 // CHECK16-NEXT: br label [[COND_END:%.*]] 16799 // CHECK16: cond.false: 16800 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16801 // CHECK16-NEXT: br label [[COND_END]] 16802 // CHECK16: cond.end: 16803 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 16804 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 16805 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 16806 // CHECK16-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 16807 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 16808 // CHECK16: omp.inner.for.cond: 16809 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16810 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16811 // CHECK16-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 16812 // CHECK16-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 16813 // CHECK16: omp.inner.for.body: 16814 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 16815 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16816 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..31 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]) 16817 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 16818 // CHECK16: omp.inner.for.inc: 16819 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16820 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 16821 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 16822 // CHECK16-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 16823 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]] 16824 // CHECK16: omp.inner.for.end: 16825 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 16826 // CHECK16: omp.loop.exit: 16827 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 16828 // CHECK16-NEXT: ret void 16829 // 16830 // 16831 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..31 16832 // CHECK16-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 16833 // CHECK16-NEXT: entry: 16834 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 16835 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 16836 // CHECK16-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 16837 // CHECK16-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 16838 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 16839 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 16840 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 16841 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 16842 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 16843 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 16844 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 16845 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 16846 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 16847 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 16848 // CHECK16-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 16849 // CHECK16-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 16850 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 16851 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 16852 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 16853 // CHECK16-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 16854 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 16855 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 16856 // CHECK16-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 16857 // CHECK16-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 16858 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 16859 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 16860 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 16861 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16862 // CHECK16-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 16863 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 16864 // CHECK16-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 16865 // CHECK16-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 16866 // CHECK16: omp.dispatch.cond: 16867 // CHECK16-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 16868 // CHECK16-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 16869 // CHECK16-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 16870 // CHECK16: omp.dispatch.body: 16871 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 16872 // CHECK16-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 16873 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 16874 // CHECK16: omp.inner.for.cond: 16875 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 16876 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22 16877 // CHECK16-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 16878 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 16879 // CHECK16: omp.inner.for.body: 16880 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 16881 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 16882 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 16883 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22 16884 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !22 16885 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP12]] 16886 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !22 16887 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 16888 // CHECK16: omp.body.continue: 16889 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 16890 // CHECK16: omp.inner.for.inc: 16891 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 16892 // CHECK16-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 16893 // CHECK16-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 16894 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]] 16895 // CHECK16: omp.inner.for.end: 16896 // CHECK16-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 16897 // CHECK16: omp.dispatch.inc: 16898 // CHECK16-NEXT: br label [[OMP_DISPATCH_COND]] 16899 // CHECK16: omp.dispatch.end: 16900 // CHECK16-NEXT: ret void 16901 // 16902 // 16903 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136 16904 // CHECK16-SAME: (i32 noundef [[M:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 16905 // CHECK16-NEXT: entry: 16906 // CHECK16-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 16907 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 16908 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 16909 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 16910 // CHECK16-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 16911 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 16912 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 16913 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4 16914 // CHECK16-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 16915 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 16916 // CHECK16-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 16917 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 16918 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..34 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]]) 16919 // CHECK16-NEXT: ret void 16920 // 16921 // 16922 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..34 16923 // CHECK16-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 16924 // CHECK16-NEXT: entry: 16925 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 16926 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 16927 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 16928 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 16929 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 16930 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 16931 // CHECK16-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 16932 // CHECK16-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 16933 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 16934 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 16935 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 16936 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 16937 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 16938 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 16939 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 16940 // CHECK16-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 16941 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 16942 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 16943 // CHECK16-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 16944 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 16945 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 16946 // CHECK16-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 16947 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 16948 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 16949 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16950 // CHECK16-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 16951 // CHECK16-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 16952 // CHECK16: cond.true: 16953 // CHECK16-NEXT: br label [[COND_END:%.*]] 16954 // CHECK16: cond.false: 16955 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16956 // CHECK16-NEXT: br label [[COND_END]] 16957 // CHECK16: cond.end: 16958 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 16959 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 16960 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 16961 // CHECK16-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 16962 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 16963 // CHECK16: omp.inner.for.cond: 16964 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16965 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16966 // CHECK16-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 16967 // CHECK16-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 16968 // CHECK16: omp.inner.for.body: 16969 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 16970 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16971 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 16972 // CHECK16-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 16973 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 16974 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..35 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]]) 16975 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 16976 // CHECK16: omp.inner.for.inc: 16977 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16978 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 16979 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 16980 // CHECK16-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 16981 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]] 16982 // CHECK16: omp.inner.for.end: 16983 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 16984 // CHECK16: omp.loop.exit: 16985 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 16986 // CHECK16-NEXT: ret void 16987 // 16988 // 16989 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..35 16990 // CHECK16-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 16991 // CHECK16-NEXT: entry: 16992 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 16993 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 16994 // CHECK16-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 16995 // CHECK16-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 16996 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 16997 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 16998 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 16999 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 17000 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 17001 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 17002 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 17003 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 17004 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 17005 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 17006 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 17007 // CHECK16-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 17008 // CHECK16-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 17009 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 17010 // CHECK16-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 17011 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 17012 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 17013 // CHECK16-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 17014 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 17015 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 17016 // CHECK16-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 17017 // CHECK16-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 17018 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 17019 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 17020 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 17021 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 17022 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17023 // CHECK16-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 17024 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 17025 // CHECK16-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]]) 17026 // CHECK16-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 17027 // CHECK16: omp.dispatch.cond: 17028 // CHECK16-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 17029 // CHECK16-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0 17030 // CHECK16-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 17031 // CHECK16: omp.dispatch.body: 17032 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 17033 // CHECK16-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 17034 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 17035 // CHECK16: omp.inner.for.cond: 17036 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 17037 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25 17038 // CHECK16-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 17039 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 17040 // CHECK16: omp.inner.for.body: 17041 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 17042 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 17043 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 17044 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !25 17045 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !25 17046 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP13]] 17047 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !25 17048 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 17049 // CHECK16: omp.body.continue: 17050 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 17051 // CHECK16: omp.inner.for.inc: 17052 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 17053 // CHECK16-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP14]], 1 17054 // CHECK16-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 17055 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]] 17056 // CHECK16: omp.inner.for.end: 17057 // CHECK16-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 17058 // CHECK16: omp.dispatch.inc: 17059 // CHECK16-NEXT: br label [[OMP_DISPATCH_COND]] 17060 // CHECK16: omp.dispatch.end: 17061 // CHECK16-NEXT: ret void 17062 // 17063 // 17064 // CHECK16-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 17065 // CHECK16-SAME: () #[[ATTR6:[0-9]+]] { 17066 // CHECK16-NEXT: entry: 17067 // CHECK16-NEXT: call void @__tgt_register_requires(i64 1) 17068 // CHECK16-NEXT: ret void 17069 // 17070 // 17071 // CHECK17-LABEL: define {{[^@]+}}@main 17072 // CHECK17-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 17073 // CHECK17-NEXT: entry: 17074 // CHECK17-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 17075 // CHECK17-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 17076 // CHECK17-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 17077 // CHECK17-NEXT: [[N:%.*]] = alloca i32, align 4 17078 // CHECK17-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 17079 // CHECK17-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 17080 // CHECK17-NEXT: [[M:%.*]] = alloca i32, align 4 17081 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 17082 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 17083 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 17084 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 17085 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 17086 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 17087 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 17088 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 17089 // CHECK17-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8 17090 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8 17091 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8 17092 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8 17093 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8 17094 // CHECK17-NEXT: [[_TMP9:%.*]] = alloca i32, align 4 17095 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 17096 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4 17097 // CHECK17-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 17098 // CHECK17-NEXT: [[N_CASTED19:%.*]] = alloca i64, align 8 17099 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [4 x i8*], align 8 17100 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS22:%.*]] = alloca [4 x i8*], align 8 17101 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [4 x i8*], align 8 17102 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES24:%.*]] = alloca [4 x i64], align 8 17103 // CHECK17-NEXT: [[_TMP25:%.*]] = alloca i32, align 4 17104 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4 17105 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4 17106 // CHECK17-NEXT: [[N_CASTED34:%.*]] = alloca i64, align 8 17107 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS36:%.*]] = alloca [3 x i8*], align 8 17108 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS37:%.*]] = alloca [3 x i8*], align 8 17109 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS38:%.*]] = alloca [3 x i8*], align 8 17110 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES39:%.*]] = alloca [3 x i64], align 8 17111 // CHECK17-NEXT: [[_TMP40:%.*]] = alloca i32, align 4 17112 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4 17113 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4 17114 // CHECK17-NEXT: [[M_CASTED49:%.*]] = alloca i64, align 8 17115 // CHECK17-NEXT: [[N_CASTED51:%.*]] = alloca i64, align 8 17116 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS53:%.*]] = alloca [4 x i8*], align 8 17117 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS54:%.*]] = alloca [4 x i8*], align 8 17118 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS55:%.*]] = alloca [4 x i8*], align 8 17119 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES56:%.*]] = alloca [4 x i64], align 8 17120 // CHECK17-NEXT: [[_TMP57:%.*]] = alloca i32, align 4 17121 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4 17122 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_59:%.*]] = alloca i32, align 4 17123 // CHECK17-NEXT: store i32 0, i32* [[RETVAL]], align 4 17124 // CHECK17-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 17125 // CHECK17-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 17126 // CHECK17-NEXT: store i32 100, i32* [[N]], align 4 17127 // CHECK17-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 17128 // CHECK17-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 17129 // CHECK17-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 17130 // CHECK17-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 17131 // CHECK17-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 17132 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 17133 // CHECK17-NEXT: store i32 10, i32* [[M]], align 4 17134 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 17135 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 17136 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 17137 // CHECK17-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 17138 // CHECK17-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 17139 // CHECK17-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 17140 // CHECK17-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP6]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes to i8*), i64 24, i1 false) 17141 // CHECK17-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 17142 // CHECK17-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 17143 // CHECK17-NEXT: store i64 [[TMP4]], i64* [[TMP8]], align 8 17144 // CHECK17-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 17145 // CHECK17-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 17146 // CHECK17-NEXT: store i64 [[TMP4]], i64* [[TMP10]], align 8 17147 // CHECK17-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 17148 // CHECK17-NEXT: store i8* null, i8** [[TMP11]], align 8 17149 // CHECK17-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 17150 // CHECK17-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 17151 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8 17152 // CHECK17-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 17153 // CHECK17-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 17154 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8 17155 // CHECK17-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 17156 // CHECK17-NEXT: store i8* null, i8** [[TMP16]], align 8 17157 // CHECK17-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 17158 // CHECK17-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 17159 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 8 17160 // CHECK17-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 17161 // CHECK17-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 17162 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 8 17163 // CHECK17-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 17164 // CHECK17-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 8 17165 // CHECK17-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 17166 // CHECK17-NEXT: store i8* null, i8** [[TMP22]], align 8 17167 // CHECK17-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 17168 // CHECK17-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 17169 // CHECK17-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 17170 // CHECK17-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 17171 // CHECK17-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 17172 // CHECK17-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 17173 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 17174 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 17175 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 17176 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 17177 // CHECK17-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17178 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 17179 // CHECK17-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 17180 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP29]]) 17181 // CHECK17-NEXT: [[TMP30:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, i32 3, i8** [[TMP23]], i8** [[TMP24]], i64* [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 17182 // CHECK17-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 17183 // CHECK17-NEXT: br i1 [[TMP31]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 17184 // CHECK17: omp_offload.failed: 17185 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 17186 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]] 17187 // CHECK17: omp_offload.cont: 17188 // CHECK17-NEXT: [[TMP32:%.*]] = load i32, i32* [[N]], align 4 17189 // CHECK17-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32* 17190 // CHECK17-NEXT: store i32 [[TMP32]], i32* [[CONV4]], align 4 17191 // CHECK17-NEXT: [[TMP33:%.*]] = load i64, i64* [[N_CASTED3]], align 8 17192 // CHECK17-NEXT: [[TMP34:%.*]] = mul nuw i64 [[TMP1]], 4 17193 // CHECK17-NEXT: [[TMP35:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES8]] to i8* 17194 // CHECK17-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP35]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.4 to i8*), i64 24, i1 false) 17195 // CHECK17-NEXT: [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 17196 // CHECK17-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64* 17197 // CHECK17-NEXT: store i64 [[TMP33]], i64* [[TMP37]], align 8 17198 // CHECK17-NEXT: [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 17199 // CHECK17-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64* 17200 // CHECK17-NEXT: store i64 [[TMP33]], i64* [[TMP39]], align 8 17201 // CHECK17-NEXT: [[TMP40:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0 17202 // CHECK17-NEXT: store i8* null, i8** [[TMP40]], align 8 17203 // CHECK17-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 17204 // CHECK17-NEXT: [[TMP42:%.*]] = bitcast i8** [[TMP41]] to i64* 17205 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP42]], align 8 17206 // CHECK17-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 17207 // CHECK17-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i64* 17208 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP44]], align 8 17209 // CHECK17-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1 17210 // CHECK17-NEXT: store i8* null, i8** [[TMP45]], align 8 17211 // CHECK17-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2 17212 // CHECK17-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to i32** 17213 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP47]], align 8 17214 // CHECK17-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2 17215 // CHECK17-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32** 17216 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP49]], align 8 17217 // CHECK17-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2 17218 // CHECK17-NEXT: store i64 [[TMP34]], i64* [[TMP50]], align 8 17219 // CHECK17-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2 17220 // CHECK17-NEXT: store i8* null, i8** [[TMP51]], align 8 17221 // CHECK17-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 17222 // CHECK17-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 17223 // CHECK17-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0 17224 // CHECK17-NEXT: [[TMP55:%.*]] = load i32, i32* [[N]], align 4 17225 // CHECK17-NEXT: store i32 [[TMP55]], i32* [[DOTCAPTURE_EXPR_10]], align 4 17226 // CHECK17-NEXT: [[TMP56:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 17227 // CHECK17-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP56]], 0 17228 // CHECK17-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1 17229 // CHECK17-NEXT: [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1 17230 // CHECK17-NEXT: store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4 17231 // CHECK17-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 17232 // CHECK17-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP57]], 1 17233 // CHECK17-NEXT: [[TMP58:%.*]] = zext i32 [[ADD15]] to i64 17234 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP58]]) 17235 // CHECK17-NEXT: [[TMP59:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, i32 3, i8** [[TMP52]], i8** [[TMP53]], i64* [[TMP54]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 17236 // CHECK17-NEXT: [[TMP60:%.*]] = icmp ne i32 [[TMP59]], 0 17237 // CHECK17-NEXT: br i1 [[TMP60]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 17238 // CHECK17: omp_offload.failed16: 17239 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i64 [[TMP33]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 17240 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT17]] 17241 // CHECK17: omp_offload.cont17: 17242 // CHECK17-NEXT: [[TMP61:%.*]] = load i32, i32* [[M]], align 4 17243 // CHECK17-NEXT: [[CONV18:%.*]] = bitcast i64* [[M_CASTED]] to i32* 17244 // CHECK17-NEXT: store i32 [[TMP61]], i32* [[CONV18]], align 4 17245 // CHECK17-NEXT: [[TMP62:%.*]] = load i64, i64* [[M_CASTED]], align 8 17246 // CHECK17-NEXT: [[TMP63:%.*]] = load i32, i32* [[N]], align 4 17247 // CHECK17-NEXT: [[CONV20:%.*]] = bitcast i64* [[N_CASTED19]] to i32* 17248 // CHECK17-NEXT: store i32 [[TMP63]], i32* [[CONV20]], align 4 17249 // CHECK17-NEXT: [[TMP64:%.*]] = load i64, i64* [[N_CASTED19]], align 8 17250 // CHECK17-NEXT: [[TMP65:%.*]] = mul nuw i64 [[TMP1]], 4 17251 // CHECK17-NEXT: [[TMP66:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES24]] to i8* 17252 // CHECK17-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP66]], i8* align 8 bitcast ([4 x i64]* @.offload_sizes.8 to i8*), i64 32, i1 false) 17253 // CHECK17-NEXT: [[TMP67:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 17254 // CHECK17-NEXT: [[TMP68:%.*]] = bitcast i8** [[TMP67]] to i64* 17255 // CHECK17-NEXT: store i64 [[TMP62]], i64* [[TMP68]], align 8 17256 // CHECK17-NEXT: [[TMP69:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 17257 // CHECK17-NEXT: [[TMP70:%.*]] = bitcast i8** [[TMP69]] to i64* 17258 // CHECK17-NEXT: store i64 [[TMP62]], i64* [[TMP70]], align 8 17259 // CHECK17-NEXT: [[TMP71:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0 17260 // CHECK17-NEXT: store i8* null, i8** [[TMP71]], align 8 17261 // CHECK17-NEXT: [[TMP72:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1 17262 // CHECK17-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to i64* 17263 // CHECK17-NEXT: store i64 [[TMP64]], i64* [[TMP73]], align 8 17264 // CHECK17-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1 17265 // CHECK17-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i64* 17266 // CHECK17-NEXT: store i64 [[TMP64]], i64* [[TMP75]], align 8 17267 // CHECK17-NEXT: [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1 17268 // CHECK17-NEXT: store i8* null, i8** [[TMP76]], align 8 17269 // CHECK17-NEXT: [[TMP77:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 2 17270 // CHECK17-NEXT: [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i64* 17271 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP78]], align 8 17272 // CHECK17-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 2 17273 // CHECK17-NEXT: [[TMP80:%.*]] = bitcast i8** [[TMP79]] to i64* 17274 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP80]], align 8 17275 // CHECK17-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 2 17276 // CHECK17-NEXT: store i8* null, i8** [[TMP81]], align 8 17277 // CHECK17-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 3 17278 // CHECK17-NEXT: [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i32** 17279 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP83]], align 8 17280 // CHECK17-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 3 17281 // CHECK17-NEXT: [[TMP85:%.*]] = bitcast i8** [[TMP84]] to i32** 17282 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP85]], align 8 17283 // CHECK17-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 3 17284 // CHECK17-NEXT: store i64 [[TMP65]], i64* [[TMP86]], align 8 17285 // CHECK17-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 3 17286 // CHECK17-NEXT: store i8* null, i8** [[TMP87]], align 8 17287 // CHECK17-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 17288 // CHECK17-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 17289 // CHECK17-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0 17290 // CHECK17-NEXT: [[TMP91:%.*]] = load i32, i32* [[N]], align 4 17291 // CHECK17-NEXT: store i32 [[TMP91]], i32* [[DOTCAPTURE_EXPR_26]], align 4 17292 // CHECK17-NEXT: [[TMP92:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 17293 // CHECK17-NEXT: [[SUB28:%.*]] = sub nsw i32 [[TMP92]], 0 17294 // CHECK17-NEXT: [[DIV29:%.*]] = sdiv i32 [[SUB28]], 1 17295 // CHECK17-NEXT: [[SUB30:%.*]] = sub nsw i32 [[DIV29]], 1 17296 // CHECK17-NEXT: store i32 [[SUB30]], i32* [[DOTCAPTURE_EXPR_27]], align 4 17297 // CHECK17-NEXT: [[TMP93:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 17298 // CHECK17-NEXT: [[ADD31:%.*]] = add nsw i32 [[TMP93]], 1 17299 // CHECK17-NEXT: [[TMP94:%.*]] = zext i32 [[ADD31]] to i64 17300 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP94]]) 17301 // CHECK17-NEXT: [[TMP95:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, i32 4, i8** [[TMP88]], i8** [[TMP89]], i64* [[TMP90]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 17302 // CHECK17-NEXT: [[TMP96:%.*]] = icmp ne i32 [[TMP95]], 0 17303 // CHECK17-NEXT: br i1 [[TMP96]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]] 17304 // CHECK17: omp_offload.failed32: 17305 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i64 [[TMP62]], i64 [[TMP64]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 17306 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT33]] 17307 // CHECK17: omp_offload.cont33: 17308 // CHECK17-NEXT: [[TMP97:%.*]] = load i32, i32* [[N]], align 4 17309 // CHECK17-NEXT: [[CONV35:%.*]] = bitcast i64* [[N_CASTED34]] to i32* 17310 // CHECK17-NEXT: store i32 [[TMP97]], i32* [[CONV35]], align 4 17311 // CHECK17-NEXT: [[TMP98:%.*]] = load i64, i64* [[N_CASTED34]], align 8 17312 // CHECK17-NEXT: [[TMP99:%.*]] = mul nuw i64 [[TMP1]], 4 17313 // CHECK17-NEXT: [[TMP100:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES39]] to i8* 17314 // CHECK17-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP100]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.12 to i8*), i64 24, i1 false) 17315 // CHECK17-NEXT: [[TMP101:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0 17316 // CHECK17-NEXT: [[TMP102:%.*]] = bitcast i8** [[TMP101]] to i64* 17317 // CHECK17-NEXT: store i64 [[TMP98]], i64* [[TMP102]], align 8 17318 // CHECK17-NEXT: [[TMP103:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0 17319 // CHECK17-NEXT: [[TMP104:%.*]] = bitcast i8** [[TMP103]] to i64* 17320 // CHECK17-NEXT: store i64 [[TMP98]], i64* [[TMP104]], align 8 17321 // CHECK17-NEXT: [[TMP105:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 0 17322 // CHECK17-NEXT: store i8* null, i8** [[TMP105]], align 8 17323 // CHECK17-NEXT: [[TMP106:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 1 17324 // CHECK17-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to i64* 17325 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP107]], align 8 17326 // CHECK17-NEXT: [[TMP108:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 1 17327 // CHECK17-NEXT: [[TMP109:%.*]] = bitcast i8** [[TMP108]] to i64* 17328 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP109]], align 8 17329 // CHECK17-NEXT: [[TMP110:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 1 17330 // CHECK17-NEXT: store i8* null, i8** [[TMP110]], align 8 17331 // CHECK17-NEXT: [[TMP111:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 2 17332 // CHECK17-NEXT: [[TMP112:%.*]] = bitcast i8** [[TMP111]] to i32** 17333 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP112]], align 8 17334 // CHECK17-NEXT: [[TMP113:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 2 17335 // CHECK17-NEXT: [[TMP114:%.*]] = bitcast i8** [[TMP113]] to i32** 17336 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP114]], align 8 17337 // CHECK17-NEXT: [[TMP115:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 2 17338 // CHECK17-NEXT: store i64 [[TMP99]], i64* [[TMP115]], align 8 17339 // CHECK17-NEXT: [[TMP116:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 2 17340 // CHECK17-NEXT: store i8* null, i8** [[TMP116]], align 8 17341 // CHECK17-NEXT: [[TMP117:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0 17342 // CHECK17-NEXT: [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0 17343 // CHECK17-NEXT: [[TMP119:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0 17344 // CHECK17-NEXT: [[TMP120:%.*]] = load i32, i32* [[N]], align 4 17345 // CHECK17-NEXT: store i32 [[TMP120]], i32* [[DOTCAPTURE_EXPR_41]], align 4 17346 // CHECK17-NEXT: [[TMP121:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4 17347 // CHECK17-NEXT: [[SUB43:%.*]] = sub nsw i32 [[TMP121]], 0 17348 // CHECK17-NEXT: [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1 17349 // CHECK17-NEXT: [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 1 17350 // CHECK17-NEXT: store i32 [[SUB45]], i32* [[DOTCAPTURE_EXPR_42]], align 4 17351 // CHECK17-NEXT: [[TMP122:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_42]], align 4 17352 // CHECK17-NEXT: [[ADD46:%.*]] = add nsw i32 [[TMP122]], 1 17353 // CHECK17-NEXT: [[TMP123:%.*]] = zext i32 [[ADD46]] to i64 17354 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP123]]) 17355 // CHECK17-NEXT: [[TMP124:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, i32 3, i8** [[TMP117]], i8** [[TMP118]], i64* [[TMP119]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 17356 // CHECK17-NEXT: [[TMP125:%.*]] = icmp ne i32 [[TMP124]], 0 17357 // CHECK17-NEXT: br i1 [[TMP125]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]] 17358 // CHECK17: omp_offload.failed47: 17359 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i64 [[TMP98]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 17360 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT48]] 17361 // CHECK17: omp_offload.cont48: 17362 // CHECK17-NEXT: [[TMP126:%.*]] = load i32, i32* [[M]], align 4 17363 // CHECK17-NEXT: [[CONV50:%.*]] = bitcast i64* [[M_CASTED49]] to i32* 17364 // CHECK17-NEXT: store i32 [[TMP126]], i32* [[CONV50]], align 4 17365 // CHECK17-NEXT: [[TMP127:%.*]] = load i64, i64* [[M_CASTED49]], align 8 17366 // CHECK17-NEXT: [[TMP128:%.*]] = load i32, i32* [[N]], align 4 17367 // CHECK17-NEXT: [[CONV52:%.*]] = bitcast i64* [[N_CASTED51]] to i32* 17368 // CHECK17-NEXT: store i32 [[TMP128]], i32* [[CONV52]], align 4 17369 // CHECK17-NEXT: [[TMP129:%.*]] = load i64, i64* [[N_CASTED51]], align 8 17370 // CHECK17-NEXT: [[TMP130:%.*]] = mul nuw i64 [[TMP1]], 4 17371 // CHECK17-NEXT: [[TMP131:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES56]] to i8* 17372 // CHECK17-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP131]], i8* align 8 bitcast ([4 x i64]* @.offload_sizes.16 to i8*), i64 32, i1 false) 17373 // CHECK17-NEXT: [[TMP132:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0 17374 // CHECK17-NEXT: [[TMP133:%.*]] = bitcast i8** [[TMP132]] to i64* 17375 // CHECK17-NEXT: store i64 [[TMP127]], i64* [[TMP133]], align 8 17376 // CHECK17-NEXT: [[TMP134:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0 17377 // CHECK17-NEXT: [[TMP135:%.*]] = bitcast i8** [[TMP134]] to i64* 17378 // CHECK17-NEXT: store i64 [[TMP127]], i64* [[TMP135]], align 8 17379 // CHECK17-NEXT: [[TMP136:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 0 17380 // CHECK17-NEXT: store i8* null, i8** [[TMP136]], align 8 17381 // CHECK17-NEXT: [[TMP137:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 1 17382 // CHECK17-NEXT: [[TMP138:%.*]] = bitcast i8** [[TMP137]] to i64* 17383 // CHECK17-NEXT: store i64 [[TMP129]], i64* [[TMP138]], align 8 17384 // CHECK17-NEXT: [[TMP139:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 1 17385 // CHECK17-NEXT: [[TMP140:%.*]] = bitcast i8** [[TMP139]] to i64* 17386 // CHECK17-NEXT: store i64 [[TMP129]], i64* [[TMP140]], align 8 17387 // CHECK17-NEXT: [[TMP141:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 1 17388 // CHECK17-NEXT: store i8* null, i8** [[TMP141]], align 8 17389 // CHECK17-NEXT: [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 2 17390 // CHECK17-NEXT: [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i64* 17391 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP143]], align 8 17392 // CHECK17-NEXT: [[TMP144:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 2 17393 // CHECK17-NEXT: [[TMP145:%.*]] = bitcast i8** [[TMP144]] to i64* 17394 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP145]], align 8 17395 // CHECK17-NEXT: [[TMP146:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 2 17396 // CHECK17-NEXT: store i8* null, i8** [[TMP146]], align 8 17397 // CHECK17-NEXT: [[TMP147:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 3 17398 // CHECK17-NEXT: [[TMP148:%.*]] = bitcast i8** [[TMP147]] to i32** 17399 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP148]], align 8 17400 // CHECK17-NEXT: [[TMP149:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 3 17401 // CHECK17-NEXT: [[TMP150:%.*]] = bitcast i8** [[TMP149]] to i32** 17402 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP150]], align 8 17403 // CHECK17-NEXT: [[TMP151:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 3 17404 // CHECK17-NEXT: store i64 [[TMP130]], i64* [[TMP151]], align 8 17405 // CHECK17-NEXT: [[TMP152:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 3 17406 // CHECK17-NEXT: store i8* null, i8** [[TMP152]], align 8 17407 // CHECK17-NEXT: [[TMP153:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0 17408 // CHECK17-NEXT: [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0 17409 // CHECK17-NEXT: [[TMP155:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0 17410 // CHECK17-NEXT: [[TMP156:%.*]] = load i32, i32* [[N]], align 4 17411 // CHECK17-NEXT: store i32 [[TMP156]], i32* [[DOTCAPTURE_EXPR_58]], align 4 17412 // CHECK17-NEXT: [[TMP157:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_58]], align 4 17413 // CHECK17-NEXT: [[SUB60:%.*]] = sub nsw i32 [[TMP157]], 0 17414 // CHECK17-NEXT: [[DIV61:%.*]] = sdiv i32 [[SUB60]], 1 17415 // CHECK17-NEXT: [[SUB62:%.*]] = sub nsw i32 [[DIV61]], 1 17416 // CHECK17-NEXT: store i32 [[SUB62]], i32* [[DOTCAPTURE_EXPR_59]], align 4 17417 // CHECK17-NEXT: [[TMP158:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_59]], align 4 17418 // CHECK17-NEXT: [[ADD63:%.*]] = add nsw i32 [[TMP158]], 1 17419 // CHECK17-NEXT: [[TMP159:%.*]] = zext i32 [[ADD63]] to i64 17420 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP159]]) 17421 // CHECK17-NEXT: [[TMP160:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, i32 4, i8** [[TMP153]], i8** [[TMP154]], i64* [[TMP155]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 17422 // CHECK17-NEXT: [[TMP161:%.*]] = icmp ne i32 [[TMP160]], 0 17423 // CHECK17-NEXT: br i1 [[TMP161]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]] 17424 // CHECK17: omp_offload.failed64: 17425 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i64 [[TMP127]], i64 [[TMP129]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 17426 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT65]] 17427 // CHECK17: omp_offload.cont65: 17428 // CHECK17-NEXT: [[TMP162:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 17429 // CHECK17-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP162]]) 17430 // CHECK17-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 17431 // CHECK17-NEXT: [[TMP163:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 17432 // CHECK17-NEXT: call void @llvm.stackrestore(i8* [[TMP163]]) 17433 // CHECK17-NEXT: [[TMP164:%.*]] = load i32, i32* [[RETVAL]], align 4 17434 // CHECK17-NEXT: ret i32 [[TMP164]] 17435 // 17436 // 17437 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148 17438 // CHECK17-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 17439 // CHECK17-NEXT: entry: 17440 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 17441 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 17442 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 17443 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 17444 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 17445 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 17446 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 17447 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 17448 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 17449 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 17450 // CHECK17-NEXT: ret void 17451 // 17452 // 17453 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined. 17454 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 17455 // CHECK17-NEXT: entry: 17456 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 17457 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 17458 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 17459 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 17460 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 17461 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 17462 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 17463 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 17464 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 17465 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 17466 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 17467 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 17468 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 17469 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 17470 // CHECK17-NEXT: [[I3:%.*]] = alloca i32, align 4 17471 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 17472 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 17473 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 17474 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 17475 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 17476 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 17477 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 17478 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 17479 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 17480 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 17481 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 17482 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 17483 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 17484 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 17485 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 17486 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4 17487 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 17488 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 17489 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 17490 // CHECK17: omp.precond.then: 17491 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 17492 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17493 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 17494 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 17495 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 17496 // CHECK17-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 17497 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 17498 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 17499 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17500 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17501 // CHECK17-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 17502 // CHECK17-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 17503 // CHECK17: cond.true: 17504 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17505 // CHECK17-NEXT: br label [[COND_END:%.*]] 17506 // CHECK17: cond.false: 17507 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17508 // CHECK17-NEXT: br label [[COND_END]] 17509 // CHECK17: cond.end: 17510 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 17511 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 17512 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 17513 // CHECK17-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 17514 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 17515 // CHECK17: omp.inner.for.cond: 17516 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17517 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17518 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 17519 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 17520 // CHECK17: omp.inner.for.body: 17521 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 17522 // CHECK17-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 17523 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17524 // CHECK17-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 17525 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 17526 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 17527 // CHECK17: omp.inner.for.inc: 17528 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17529 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 17530 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 17531 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 17532 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 17533 // CHECK17: omp.inner.for.end: 17534 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 17535 // CHECK17: omp.loop.exit: 17536 // CHECK17-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 17537 // CHECK17-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 17538 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 17539 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 17540 // CHECK17: omp.precond.end: 17541 // CHECK17-NEXT: ret void 17542 // 17543 // 17544 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..1 17545 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 17546 // CHECK17-NEXT: entry: 17547 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 17548 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 17549 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 17550 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 17551 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 17552 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 17553 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 17554 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 17555 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 17556 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 17557 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 17558 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 17559 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 17560 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 17561 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 17562 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 17563 // CHECK17-NEXT: [[I4:%.*]] = alloca i32, align 4 17564 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 17565 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 17566 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 17567 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 17568 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 17569 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 17570 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 17571 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 17572 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 17573 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 17574 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 17575 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 17576 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 17577 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 17578 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 17579 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 17580 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 17581 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4 17582 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 17583 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 17584 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 17585 // CHECK17: omp.precond.then: 17586 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 17587 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17588 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 17589 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 17590 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 17591 // CHECK17-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 17592 // CHECK17-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 17593 // CHECK17-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 17594 // CHECK17-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 17595 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 17596 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 17597 // CHECK17-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 17598 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 17599 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 17600 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17601 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17602 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 17603 // CHECK17-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 17604 // CHECK17: cond.true: 17605 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17606 // CHECK17-NEXT: br label [[COND_END:%.*]] 17607 // CHECK17: cond.false: 17608 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17609 // CHECK17-NEXT: br label [[COND_END]] 17610 // CHECK17: cond.end: 17611 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 17612 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 17613 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 17614 // CHECK17-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 17615 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 17616 // CHECK17: omp.inner.for.cond: 17617 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17618 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17619 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 17620 // CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 17621 // CHECK17: omp.inner.for.body: 17622 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17623 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 17624 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 17625 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 17626 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4 17627 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 17628 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 17629 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 17630 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 17631 // CHECK17: omp.body.continue: 17632 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 17633 // CHECK17: omp.inner.for.inc: 17634 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17635 // CHECK17-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 17636 // CHECK17-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 17637 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 17638 // CHECK17: omp.inner.for.end: 17639 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 17640 // CHECK17: omp.loop.exit: 17641 // CHECK17-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 17642 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 17643 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 17644 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 17645 // CHECK17: omp.precond.end: 17646 // CHECK17-NEXT: ret void 17647 // 17648 // 17649 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153 17650 // CHECK17-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 17651 // CHECK17-NEXT: entry: 17652 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 17653 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 17654 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 17655 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 17656 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 17657 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 17658 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 17659 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 17660 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 17661 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 17662 // CHECK17-NEXT: ret void 17663 // 17664 // 17665 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..2 17666 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 17667 // CHECK17-NEXT: entry: 17668 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 17669 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 17670 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 17671 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 17672 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 17673 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 17674 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 17675 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 17676 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 17677 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 17678 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 17679 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 17680 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 17681 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 17682 // CHECK17-NEXT: [[I3:%.*]] = alloca i32, align 4 17683 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 17684 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 17685 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 17686 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 17687 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 17688 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 17689 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 17690 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 17691 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 17692 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 17693 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 17694 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 17695 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 17696 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 17697 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 17698 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4 17699 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 17700 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 17701 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 17702 // CHECK17: omp.precond.then: 17703 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 17704 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17705 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 17706 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 17707 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 17708 // CHECK17-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 17709 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 17710 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 17711 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17712 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17713 // CHECK17-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 17714 // CHECK17-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 17715 // CHECK17: cond.true: 17716 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17717 // CHECK17-NEXT: br label [[COND_END:%.*]] 17718 // CHECK17: cond.false: 17719 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17720 // CHECK17-NEXT: br label [[COND_END]] 17721 // CHECK17: cond.end: 17722 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 17723 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 17724 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 17725 // CHECK17-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 17726 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 17727 // CHECK17: omp.inner.for.cond: 17728 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17729 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17730 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 17731 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 17732 // CHECK17: omp.inner.for.body: 17733 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 17734 // CHECK17-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 17735 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17736 // CHECK17-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 17737 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 17738 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 17739 // CHECK17: omp.inner.for.inc: 17740 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17741 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 17742 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 17743 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 17744 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 17745 // CHECK17: omp.inner.for.end: 17746 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 17747 // CHECK17: omp.loop.exit: 17748 // CHECK17-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 17749 // CHECK17-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 17750 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 17751 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 17752 // CHECK17: omp.precond.end: 17753 // CHECK17-NEXT: ret void 17754 // 17755 // 17756 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..3 17757 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 17758 // CHECK17-NEXT: entry: 17759 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 17760 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 17761 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 17762 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 17763 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 17764 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 17765 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 17766 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 17767 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 17768 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 17769 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 17770 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 17771 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 17772 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 17773 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 17774 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 17775 // CHECK17-NEXT: [[I4:%.*]] = alloca i32, align 4 17776 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 17777 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 17778 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 17779 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 17780 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 17781 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 17782 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 17783 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 17784 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 17785 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 17786 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 17787 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 17788 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 17789 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 17790 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 17791 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 17792 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 17793 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4 17794 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 17795 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 17796 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 17797 // CHECK17: omp.precond.then: 17798 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 17799 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17800 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 17801 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 17802 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 17803 // CHECK17-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 17804 // CHECK17-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 17805 // CHECK17-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 17806 // CHECK17-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 17807 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 17808 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 17809 // CHECK17-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 17810 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 17811 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 17812 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17813 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17814 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 17815 // CHECK17-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 17816 // CHECK17: cond.true: 17817 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17818 // CHECK17-NEXT: br label [[COND_END:%.*]] 17819 // CHECK17: cond.false: 17820 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17821 // CHECK17-NEXT: br label [[COND_END]] 17822 // CHECK17: cond.end: 17823 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 17824 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 17825 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 17826 // CHECK17-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 17827 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 17828 // CHECK17: omp.inner.for.cond: 17829 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17830 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17831 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 17832 // CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 17833 // CHECK17: omp.inner.for.body: 17834 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17835 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 17836 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 17837 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 17838 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4 17839 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 17840 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 17841 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 17842 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 17843 // CHECK17: omp.body.continue: 17844 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 17845 // CHECK17: omp.inner.for.inc: 17846 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17847 // CHECK17-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 17848 // CHECK17-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 17849 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 17850 // CHECK17: omp.inner.for.end: 17851 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 17852 // CHECK17: omp.loop.exit: 17853 // CHECK17-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 17854 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 17855 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 17856 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 17857 // CHECK17: omp.precond.end: 17858 // CHECK17-NEXT: ret void 17859 // 17860 // 17861 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158 17862 // CHECK17-SAME: (i64 noundef [[M:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 17863 // CHECK17-NEXT: entry: 17864 // CHECK17-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 17865 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 17866 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 17867 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 17868 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 17869 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 17870 // CHECK17-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 17871 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 17872 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 17873 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 17874 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* 17875 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 17876 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 17877 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 17878 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 17879 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 17880 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 17881 // CHECK17-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 17882 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4 17883 // CHECK17-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 17884 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]]) 17885 // CHECK17-NEXT: ret void 17886 // 17887 // 17888 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..6 17889 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 17890 // CHECK17-NEXT: entry: 17891 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 17892 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 17893 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 17894 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 17895 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 17896 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 17897 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 17898 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 17899 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 17900 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 17901 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 17902 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 17903 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 17904 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 17905 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 17906 // CHECK17-NEXT: [[I4:%.*]] = alloca i32, align 4 17907 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 17908 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 17909 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 17910 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 17911 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 17912 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 17913 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 17914 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 17915 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 17916 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 17917 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 17918 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 17919 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 17920 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17921 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 17922 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 17923 // CHECK17-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 17924 // CHECK17-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 17925 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4 17926 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17927 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 17928 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 17929 // CHECK17: omp.precond.then: 17930 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 17931 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 17932 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 17933 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 17934 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 17935 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[CONV]], align 4 17936 // CHECK17-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 17937 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 17938 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]]) 17939 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17940 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 17941 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 17942 // CHECK17-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 17943 // CHECK17: cond.true: 17944 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 17945 // CHECK17-NEXT: br label [[COND_END:%.*]] 17946 // CHECK17: cond.false: 17947 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17948 // CHECK17-NEXT: br label [[COND_END]] 17949 // CHECK17: cond.end: 17950 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 17951 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 17952 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 17953 // CHECK17-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 17954 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 17955 // CHECK17: omp.inner.for.cond: 17956 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17957 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 17958 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1 17959 // CHECK17-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]] 17960 // CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 17961 // CHECK17: omp.inner.for.body: 17962 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 17963 // CHECK17-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 17964 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17965 // CHECK17-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 17966 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV]], align 4 17967 // CHECK17-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 17968 // CHECK17-NEXT: store i32 [[TMP21]], i32* [[CONV7]], align 4 17969 // CHECK17-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 17970 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP22]]) 17971 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 17972 // CHECK17: omp.inner.for.inc: 17973 // CHECK17-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17974 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 17975 // CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 17976 // CHECK17-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 17977 // CHECK17-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 17978 // CHECK17-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 17979 // CHECK17-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 17980 // CHECK17-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4 17981 // CHECK17-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17982 // CHECK17-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 17983 // CHECK17-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP27]], [[TMP28]] 17984 // CHECK17-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4 17985 // CHECK17-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17986 // CHECK17-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 17987 // CHECK17-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]] 17988 // CHECK17-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]] 17989 // CHECK17: cond.true12: 17990 // CHECK17-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 17991 // CHECK17-NEXT: br label [[COND_END14:%.*]] 17992 // CHECK17: cond.false13: 17993 // CHECK17-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17994 // CHECK17-NEXT: br label [[COND_END14]] 17995 // CHECK17: cond.end14: 17996 // CHECK17-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE12]] ], [ [[TMP32]], [[COND_FALSE13]] ] 17997 // CHECK17-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4 17998 // CHECK17-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 17999 // CHECK17-NEXT: store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4 18000 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 18001 // CHECK17: omp.inner.for.end: 18002 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 18003 // CHECK17: omp.loop.exit: 18004 // CHECK17-NEXT: [[TMP34:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 18005 // CHECK17-NEXT: [[TMP35:%.*]] = load i32, i32* [[TMP34]], align 4 18006 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP35]]) 18007 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 18008 // CHECK17: omp.precond.end: 18009 // CHECK17-NEXT: ret void 18010 // 18011 // 18012 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..7 18013 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 18014 // CHECK17-NEXT: entry: 18015 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 18016 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 18017 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 18018 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 18019 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 18020 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 18021 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 18022 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 18023 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 18024 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 18025 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 18026 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 18027 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 18028 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 18029 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 18030 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 18031 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 18032 // CHECK17-NEXT: [[I6:%.*]] = alloca i32, align 4 18033 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 18034 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 18035 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 18036 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 18037 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 18038 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 18039 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 18040 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 18041 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 18042 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 18043 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 18044 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 18045 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 18046 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 18047 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 18048 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 18049 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 18050 // CHECK17-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 18051 // CHECK17-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 18052 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4 18053 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 18054 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 18055 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 18056 // CHECK17: omp.precond.then: 18057 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 18058 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 18059 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 18060 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 18061 // CHECK17-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32 18062 // CHECK17-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 18063 // CHECK17-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32 18064 // CHECK17-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 18065 // CHECK17-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 18066 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 18067 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 18068 // CHECK17-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 18069 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 18070 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 18071 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18072 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 18073 // CHECK17-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 18074 // CHECK17-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 18075 // CHECK17: cond.true: 18076 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 18077 // CHECK17-NEXT: br label [[COND_END:%.*]] 18078 // CHECK17: cond.false: 18079 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18080 // CHECK17-NEXT: br label [[COND_END]] 18081 // CHECK17: cond.end: 18082 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 18083 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 18084 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 18085 // CHECK17-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 18086 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 18087 // CHECK17: omp.inner.for.cond: 18088 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18089 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18090 // CHECK17-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 18091 // CHECK17-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 18092 // CHECK17: omp.inner.for.body: 18093 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18094 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 18095 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 18096 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I6]], align 4 18097 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4 18098 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 18099 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 18100 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 18101 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 18102 // CHECK17: omp.body.continue: 18103 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 18104 // CHECK17: omp.inner.for.inc: 18105 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18106 // CHECK17-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1 18107 // CHECK17-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 18108 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 18109 // CHECK17: omp.inner.for.end: 18110 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 18111 // CHECK17: omp.loop.exit: 18112 // CHECK17-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 18113 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 18114 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 18115 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 18116 // CHECK17: omp.precond.end: 18117 // CHECK17-NEXT: ret void 18118 // 18119 // 18120 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163 18121 // CHECK17-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 18122 // CHECK17-NEXT: entry: 18123 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 18124 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 18125 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 18126 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 18127 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 18128 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 18129 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 18130 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 18131 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 18132 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 18133 // CHECK17-NEXT: ret void 18134 // 18135 // 18136 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..10 18137 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 18138 // CHECK17-NEXT: entry: 18139 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 18140 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 18141 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 18142 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 18143 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 18144 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 18145 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 18146 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 18147 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 18148 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 18149 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 18150 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 18151 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 18152 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 18153 // CHECK17-NEXT: [[I3:%.*]] = alloca i32, align 4 18154 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 18155 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 18156 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 18157 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 18158 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 18159 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 18160 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 18161 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 18162 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 18163 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 18164 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 18165 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 18166 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 18167 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 18168 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 18169 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4 18170 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 18171 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 18172 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 18173 // CHECK17: omp.precond.then: 18174 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 18175 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 18176 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 18177 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 18178 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 18179 // CHECK17-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 18180 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 18181 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 18182 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18183 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 18184 // CHECK17-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 18185 // CHECK17-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 18186 // CHECK17: cond.true: 18187 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 18188 // CHECK17-NEXT: br label [[COND_END:%.*]] 18189 // CHECK17: cond.false: 18190 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18191 // CHECK17-NEXT: br label [[COND_END]] 18192 // CHECK17: cond.end: 18193 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 18194 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 18195 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 18196 // CHECK17-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 18197 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 18198 // CHECK17: omp.inner.for.cond: 18199 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18200 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18201 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 18202 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 18203 // CHECK17: omp.inner.for.body: 18204 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 18205 // CHECK17-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 18206 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18207 // CHECK17-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 18208 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 18209 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 18210 // CHECK17: omp.inner.for.inc: 18211 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18212 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 18213 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 18214 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 18215 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 18216 // CHECK17: omp.inner.for.end: 18217 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 18218 // CHECK17: omp.loop.exit: 18219 // CHECK17-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 18220 // CHECK17-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 18221 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 18222 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 18223 // CHECK17: omp.precond.end: 18224 // CHECK17-NEXT: ret void 18225 // 18226 // 18227 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..11 18228 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 18229 // CHECK17-NEXT: entry: 18230 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 18231 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 18232 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 18233 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 18234 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 18235 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 18236 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 18237 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 18238 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 18239 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 18240 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 18241 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 18242 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 18243 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 18244 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 18245 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 18246 // CHECK17-NEXT: [[I4:%.*]] = alloca i32, align 4 18247 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 18248 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 18249 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 18250 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 18251 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 18252 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 18253 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 18254 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 18255 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 18256 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 18257 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 18258 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 18259 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 18260 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 18261 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 18262 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 18263 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 18264 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4 18265 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 18266 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 18267 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 18268 // CHECK17: omp.precond.then: 18269 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 18270 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 18271 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 18272 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 18273 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 18274 // CHECK17-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 18275 // CHECK17-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 18276 // CHECK17-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 18277 // CHECK17-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 18278 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 18279 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 18280 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 18281 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18282 // CHECK17-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 18283 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 18284 // CHECK17-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1) 18285 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 18286 // CHECK17: omp.dispatch.cond: 18287 // CHECK17-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 18288 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 18289 // CHECK17-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 18290 // CHECK17-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 18291 // CHECK17-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 18292 // CHECK17: omp.dispatch.body: 18293 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 18294 // CHECK17-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 18295 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 18296 // CHECK17: omp.inner.for.cond: 18297 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 18298 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15 18299 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 18300 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 18301 // CHECK17: omp.inner.for.body: 18302 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 18303 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 18304 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 18305 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !15 18306 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !15 18307 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64 18308 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 18309 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15 18310 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 18311 // CHECK17: omp.body.continue: 18312 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 18313 // CHECK17: omp.inner.for.inc: 18314 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 18315 // CHECK17-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1 18316 // CHECK17-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 18317 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 18318 // CHECK17: omp.inner.for.end: 18319 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 18320 // CHECK17: omp.dispatch.inc: 18321 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]] 18322 // CHECK17: omp.dispatch.end: 18323 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 18324 // CHECK17: omp.precond.end: 18325 // CHECK17-NEXT: ret void 18326 // 18327 // 18328 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168 18329 // CHECK17-SAME: (i64 noundef [[M:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 18330 // CHECK17-NEXT: entry: 18331 // CHECK17-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 18332 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 18333 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 18334 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 18335 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 18336 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 18337 // CHECK17-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 18338 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 18339 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 18340 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 18341 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* 18342 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 18343 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 18344 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 18345 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 18346 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 18347 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 18348 // CHECK17-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 18349 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4 18350 // CHECK17-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 18351 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]]) 18352 // CHECK17-NEXT: ret void 18353 // 18354 // 18355 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..14 18356 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 18357 // CHECK17-NEXT: entry: 18358 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 18359 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 18360 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 18361 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 18362 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 18363 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 18364 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 18365 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 18366 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 18367 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 18368 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 18369 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 18370 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 18371 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 18372 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 18373 // CHECK17-NEXT: [[I4:%.*]] = alloca i32, align 4 18374 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 18375 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 18376 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 18377 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 18378 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 18379 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 18380 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 18381 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 18382 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 18383 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 18384 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 18385 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 18386 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 18387 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 18388 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 18389 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 18390 // CHECK17-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 18391 // CHECK17-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 18392 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4 18393 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 18394 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 18395 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 18396 // CHECK17: omp.precond.then: 18397 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 18398 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 18399 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 18400 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 18401 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 18402 // CHECK17-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 18403 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 18404 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 18405 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18406 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 18407 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 18408 // CHECK17-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 18409 // CHECK17: cond.true: 18410 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 18411 // CHECK17-NEXT: br label [[COND_END:%.*]] 18412 // CHECK17: cond.false: 18413 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18414 // CHECK17-NEXT: br label [[COND_END]] 18415 // CHECK17: cond.end: 18416 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 18417 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 18418 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 18419 // CHECK17-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 18420 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 18421 // CHECK17: omp.inner.for.cond: 18422 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18423 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18424 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 18425 // CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 18426 // CHECK17: omp.inner.for.body: 18427 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 18428 // CHECK17-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 18429 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18430 // CHECK17-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 18431 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV]], align 4 18432 // CHECK17-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 18433 // CHECK17-NEXT: store i32 [[TMP20]], i32* [[CONV7]], align 4 18434 // CHECK17-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 18435 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP21]]) 18436 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 18437 // CHECK17: omp.inner.for.inc: 18438 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18439 // CHECK17-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 18440 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 18441 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 18442 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 18443 // CHECK17: omp.inner.for.end: 18444 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 18445 // CHECK17: omp.loop.exit: 18446 // CHECK17-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 18447 // CHECK17-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 18448 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) 18449 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 18450 // CHECK17: omp.precond.end: 18451 // CHECK17-NEXT: ret void 18452 // 18453 // 18454 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..15 18455 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 18456 // CHECK17-NEXT: entry: 18457 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 18458 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 18459 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 18460 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 18461 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 18462 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 18463 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 18464 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 18465 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 18466 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 18467 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 18468 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 18469 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 18470 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 18471 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 18472 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 18473 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 18474 // CHECK17-NEXT: [[I6:%.*]] = alloca i32, align 4 18475 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 18476 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 18477 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 18478 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 18479 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 18480 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 18481 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 18482 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 18483 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 18484 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 18485 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 18486 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 18487 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 18488 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 18489 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 18490 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 18491 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 18492 // CHECK17-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 18493 // CHECK17-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 18494 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4 18495 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 18496 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 18497 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 18498 // CHECK17: omp.precond.then: 18499 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 18500 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 18501 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 18502 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 18503 // CHECK17-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32 18504 // CHECK17-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 18505 // CHECK17-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32 18506 // CHECK17-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 18507 // CHECK17-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 18508 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 18509 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 18510 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 4 18511 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 18512 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18513 // CHECK17-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 18514 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 18515 // CHECK17-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]]) 18516 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 18517 // CHECK17: omp.dispatch.cond: 18518 // CHECK17-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 18519 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 18520 // CHECK17-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 18521 // CHECK17-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 18522 // CHECK17-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 18523 // CHECK17: omp.dispatch.body: 18524 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 18525 // CHECK17-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 18526 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 18527 // CHECK17: omp.inner.for.cond: 18528 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 18529 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18 18530 // CHECK17-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 18531 // CHECK17-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 18532 // CHECK17: omp.inner.for.body: 18533 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 18534 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 18535 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 18536 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !18 18537 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !18 18538 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 18539 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 18540 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18 18541 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 18542 // CHECK17: omp.body.continue: 18543 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 18544 // CHECK17: omp.inner.for.inc: 18545 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 18546 // CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], 1 18547 // CHECK17-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 18548 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]] 18549 // CHECK17: omp.inner.for.end: 18550 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 18551 // CHECK17: omp.dispatch.inc: 18552 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]] 18553 // CHECK17: omp.dispatch.end: 18554 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 18555 // CHECK17: omp.precond.end: 18556 // CHECK17-NEXT: ret void 18557 // 18558 // 18559 // CHECK17-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 18560 // CHECK17-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 18561 // CHECK17-NEXT: entry: 18562 // CHECK17-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 18563 // CHECK17-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 18564 // CHECK17-NEXT: [[M:%.*]] = alloca i32, align 4 18565 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 18566 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 18567 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 18568 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 18569 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8 18570 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8 18571 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8 18572 // CHECK17-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 18573 // CHECK17-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 18574 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 8 18575 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 8 18576 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 8 18577 // CHECK17-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 18578 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 8 18579 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 8 18580 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 8 18581 // CHECK17-NEXT: [[_TMP16:%.*]] = alloca i32, align 4 18582 // CHECK17-NEXT: [[M_CASTED19:%.*]] = alloca i64, align 8 18583 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [2 x i8*], align 8 18584 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS22:%.*]] = alloca [2 x i8*], align 8 18585 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [2 x i8*], align 8 18586 // CHECK17-NEXT: [[_TMP24:%.*]] = alloca i32, align 4 18587 // CHECK17-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 18588 // CHECK17-NEXT: store i32 10, i32* [[M]], align 4 18589 // CHECK17-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 18590 // CHECK17-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 18591 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8 18592 // CHECK17-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 18593 // CHECK17-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 18594 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8 18595 // CHECK17-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 18596 // CHECK17-NEXT: store i8* null, i8** [[TMP4]], align 8 18597 // CHECK17-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 18598 // CHECK17-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 18599 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 18600 // CHECK17-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.20, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.21, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 18601 // CHECK17-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 18602 // CHECK17-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 18603 // CHECK17: omp_offload.failed: 18604 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]] 18605 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]] 18606 // CHECK17: omp_offload.cont: 18607 // CHECK17-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 18608 // CHECK17-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** 18609 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8 18610 // CHECK17-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 18611 // CHECK17-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** 18612 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8 18613 // CHECK17-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0 18614 // CHECK17-NEXT: store i8* null, i8** [[TMP13]], align 8 18615 // CHECK17-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 18616 // CHECK17-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 18617 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 18618 // CHECK17-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.24, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.25, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 18619 // CHECK17-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 18620 // CHECK17-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 18621 // CHECK17: omp_offload.failed5: 18622 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121([10 x i32]* [[A]]) #[[ATTR3]] 18623 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT6]] 18624 // CHECK17: omp_offload.cont6: 18625 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[M]], align 4 18626 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[M_CASTED]] to i32* 18627 // CHECK17-NEXT: store i32 [[TMP18]], i32* [[CONV]], align 4 18628 // CHECK17-NEXT: [[TMP19:%.*]] = load i64, i64* [[M_CASTED]], align 8 18629 // CHECK17-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 18630 // CHECK17-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64* 18631 // CHECK17-NEXT: store i64 [[TMP19]], i64* [[TMP21]], align 8 18632 // CHECK17-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 18633 // CHECK17-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64* 18634 // CHECK17-NEXT: store i64 [[TMP19]], i64* [[TMP23]], align 8 18635 // CHECK17-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0 18636 // CHECK17-NEXT: store i8* null, i8** [[TMP24]], align 8 18637 // CHECK17-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1 18638 // CHECK17-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]** 18639 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 8 18640 // CHECK17-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1 18641 // CHECK17-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]** 18642 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 8 18643 // CHECK17-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 1 18644 // CHECK17-NEXT: store i8* null, i8** [[TMP29]], align 8 18645 // CHECK17-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 18646 // CHECK17-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 18647 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 18648 // CHECK17-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.28, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.29, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 18649 // CHECK17-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 18650 // CHECK17-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] 18651 // CHECK17: omp_offload.failed11: 18652 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i64 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]] 18653 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT12]] 18654 // CHECK17: omp_offload.cont12: 18655 // CHECK17-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 18656 // CHECK17-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]** 18657 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 8 18658 // CHECK17-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 18659 // CHECK17-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]** 18660 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 8 18661 // CHECK17-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i64 0, i64 0 18662 // CHECK17-NEXT: store i8* null, i8** [[TMP38]], align 8 18663 // CHECK17-NEXT: [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 18664 // CHECK17-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 18665 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 18666 // CHECK17-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.32, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.33, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 18667 // CHECK17-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0 18668 // CHECK17-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]] 18669 // CHECK17: omp_offload.failed17: 18670 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131([10 x i32]* [[A]]) #[[ATTR3]] 18671 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT18]] 18672 // CHECK17: omp_offload.cont18: 18673 // CHECK17-NEXT: [[TMP43:%.*]] = load i32, i32* [[M]], align 4 18674 // CHECK17-NEXT: [[CONV20:%.*]] = bitcast i64* [[M_CASTED19]] to i32* 18675 // CHECK17-NEXT: store i32 [[TMP43]], i32* [[CONV20]], align 4 18676 // CHECK17-NEXT: [[TMP44:%.*]] = load i64, i64* [[M_CASTED19]], align 8 18677 // CHECK17-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 18678 // CHECK17-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64* 18679 // CHECK17-NEXT: store i64 [[TMP44]], i64* [[TMP46]], align 8 18680 // CHECK17-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 18681 // CHECK17-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64* 18682 // CHECK17-NEXT: store i64 [[TMP44]], i64* [[TMP48]], align 8 18683 // CHECK17-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0 18684 // CHECK17-NEXT: store i8* null, i8** [[TMP49]], align 8 18685 // CHECK17-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1 18686 // CHECK17-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]** 18687 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 8 18688 // CHECK17-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1 18689 // CHECK17-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]** 18690 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 8 18691 // CHECK17-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1 18692 // CHECK17-NEXT: store i8* null, i8** [[TMP54]], align 8 18693 // CHECK17-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 18694 // CHECK17-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 18695 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 18696 // CHECK17-NEXT: [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.36, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.37, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 18697 // CHECK17-NEXT: [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0 18698 // CHECK17-NEXT: br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED25:%.*]], label [[OMP_OFFLOAD_CONT26:%.*]] 18699 // CHECK17: omp_offload.failed25: 18700 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i64 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]] 18701 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT26]] 18702 // CHECK17: omp_offload.cont26: 18703 // CHECK17-NEXT: ret i32 0 18704 // 18705 // 18706 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116 18707 // CHECK17-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 18708 // CHECK17-NEXT: entry: 18709 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 18710 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 18711 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 18712 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 18713 // CHECK17-NEXT: ret void 18714 // 18715 // 18716 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..18 18717 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 18718 // CHECK17-NEXT: entry: 18719 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 18720 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 18721 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 18722 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 18723 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 18724 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 18725 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 18726 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 18727 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 18728 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 18729 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 18730 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 18731 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 18732 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 18733 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 18734 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 18735 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 18736 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 18737 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 18738 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 18739 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 18740 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18741 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 18742 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 18743 // CHECK17: cond.true: 18744 // CHECK17-NEXT: br label [[COND_END:%.*]] 18745 // CHECK17: cond.false: 18746 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18747 // CHECK17-NEXT: br label [[COND_END]] 18748 // CHECK17: cond.end: 18749 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 18750 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 18751 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 18752 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 18753 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 18754 // CHECK17: omp.inner.for.cond: 18755 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18756 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18757 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 18758 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 18759 // CHECK17: omp.inner.for.body: 18760 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 18761 // CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 18762 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18763 // CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 18764 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..19 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]) 18765 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 18766 // CHECK17: omp.inner.for.inc: 18767 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18768 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 18769 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 18770 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 18771 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 18772 // CHECK17: omp.inner.for.end: 18773 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 18774 // CHECK17: omp.loop.exit: 18775 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 18776 // CHECK17-NEXT: ret void 18777 // 18778 // 18779 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..19 18780 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 18781 // CHECK17-NEXT: entry: 18782 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 18783 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 18784 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 18785 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 18786 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 18787 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 18788 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 18789 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 18790 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 18791 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 18792 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 18793 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 18794 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 18795 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 18796 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 18797 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 18798 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 18799 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 18800 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 18801 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 18802 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 18803 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 18804 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 18805 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 18806 // CHECK17-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 18807 // CHECK17-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 18808 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 18809 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 18810 // CHECK17-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 18811 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 18812 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 18813 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18814 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 18815 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 18816 // CHECK17: cond.true: 18817 // CHECK17-NEXT: br label [[COND_END:%.*]] 18818 // CHECK17: cond.false: 18819 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18820 // CHECK17-NEXT: br label [[COND_END]] 18821 // CHECK17: cond.end: 18822 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 18823 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 18824 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 18825 // CHECK17-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 18826 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 18827 // CHECK17: omp.inner.for.cond: 18828 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18829 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18830 // CHECK17-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 18831 // CHECK17-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 18832 // CHECK17: omp.inner.for.body: 18833 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18834 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 18835 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 18836 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4 18837 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 18838 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 18839 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 18840 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 18841 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 18842 // CHECK17: omp.body.continue: 18843 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 18844 // CHECK17: omp.inner.for.inc: 18845 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18846 // CHECK17-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 18847 // CHECK17-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 18848 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 18849 // CHECK17: omp.inner.for.end: 18850 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 18851 // CHECK17: omp.loop.exit: 18852 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 18853 // CHECK17-NEXT: ret void 18854 // 18855 // 18856 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121 18857 // CHECK17-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 18858 // CHECK17-NEXT: entry: 18859 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 18860 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 18861 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 18862 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..22 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 18863 // CHECK17-NEXT: ret void 18864 // 18865 // 18866 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..22 18867 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 18868 // CHECK17-NEXT: entry: 18869 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 18870 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 18871 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 18872 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 18873 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 18874 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 18875 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 18876 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 18877 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 18878 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 18879 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 18880 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 18881 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 18882 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 18883 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 18884 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 18885 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 18886 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 18887 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 18888 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 18889 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 18890 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18891 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 18892 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 18893 // CHECK17: cond.true: 18894 // CHECK17-NEXT: br label [[COND_END:%.*]] 18895 // CHECK17: cond.false: 18896 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18897 // CHECK17-NEXT: br label [[COND_END]] 18898 // CHECK17: cond.end: 18899 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 18900 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 18901 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 18902 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 18903 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 18904 // CHECK17: omp.inner.for.cond: 18905 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18906 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18907 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 18908 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 18909 // CHECK17: omp.inner.for.body: 18910 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 18911 // CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 18912 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18913 // CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 18914 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..23 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]) 18915 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 18916 // CHECK17: omp.inner.for.inc: 18917 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18918 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 18919 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 18920 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 18921 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 18922 // CHECK17: omp.inner.for.end: 18923 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 18924 // CHECK17: omp.loop.exit: 18925 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 18926 // CHECK17-NEXT: ret void 18927 // 18928 // 18929 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..23 18930 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 18931 // CHECK17-NEXT: entry: 18932 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 18933 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 18934 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 18935 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 18936 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 18937 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 18938 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 18939 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 18940 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 18941 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 18942 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 18943 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 18944 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 18945 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 18946 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 18947 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 18948 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 18949 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 18950 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 18951 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 18952 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 18953 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 18954 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 18955 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 18956 // CHECK17-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 18957 // CHECK17-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 18958 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 18959 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 18960 // CHECK17-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 18961 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 18962 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 18963 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18964 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 18965 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 18966 // CHECK17: cond.true: 18967 // CHECK17-NEXT: br label [[COND_END:%.*]] 18968 // CHECK17: cond.false: 18969 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18970 // CHECK17-NEXT: br label [[COND_END]] 18971 // CHECK17: cond.end: 18972 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 18973 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 18974 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 18975 // CHECK17-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 18976 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 18977 // CHECK17: omp.inner.for.cond: 18978 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18979 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18980 // CHECK17-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 18981 // CHECK17-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 18982 // CHECK17: omp.inner.for.body: 18983 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18984 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 18985 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 18986 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4 18987 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 18988 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 18989 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 18990 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 18991 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 18992 // CHECK17: omp.body.continue: 18993 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 18994 // CHECK17: omp.inner.for.inc: 18995 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18996 // CHECK17-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 18997 // CHECK17-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 18998 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 18999 // CHECK17: omp.inner.for.end: 19000 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 19001 // CHECK17: omp.loop.exit: 19002 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 19003 // CHECK17-NEXT: ret void 19004 // 19005 // 19006 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126 19007 // CHECK17-SAME: (i64 noundef [[M:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 19008 // CHECK17-NEXT: entry: 19009 // CHECK17-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 19010 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 19011 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 19012 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 19013 // CHECK17-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 19014 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 19015 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* 19016 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 19017 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 19018 // CHECK17-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 19019 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 19020 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 19021 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 19022 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 19023 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..26 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]]) 19024 // CHECK17-NEXT: ret void 19025 // 19026 // 19027 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..26 19028 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 19029 // CHECK17-NEXT: entry: 19030 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 19031 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 19032 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 19033 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 19034 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 19035 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 19036 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 19037 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 19038 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 19039 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 19040 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 19041 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 19042 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 19043 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 19044 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 19045 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 19046 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 19047 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 19048 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 19049 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 19050 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 19051 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 19052 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 19053 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 19054 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 19055 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19056 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 19057 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 19058 // CHECK17: cond.true: 19059 // CHECK17-NEXT: br label [[COND_END:%.*]] 19060 // CHECK17: cond.false: 19061 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19062 // CHECK17-NEXT: br label [[COND_END]] 19063 // CHECK17: cond.end: 19064 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 19065 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 19066 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 19067 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 19068 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 19069 // CHECK17: omp.inner.for.cond: 19070 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19071 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19072 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 19073 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 19074 // CHECK17: omp.inner.for.body: 19075 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 19076 // CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 19077 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19078 // CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 19079 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 4 19080 // CHECK17-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 19081 // CHECK17-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4 19082 // CHECK17-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 19083 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..27 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]]) 19084 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 19085 // CHECK17: omp.inner.for.inc: 19086 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19087 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 19088 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 19089 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 19090 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 19091 // CHECK17: omp.inner.for.end: 19092 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 19093 // CHECK17: omp.loop.exit: 19094 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 19095 // CHECK17-NEXT: ret void 19096 // 19097 // 19098 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..27 19099 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 19100 // CHECK17-NEXT: entry: 19101 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 19102 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 19103 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 19104 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 19105 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 19106 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 19107 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 19108 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 19109 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 19110 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 19111 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 19112 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 19113 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 19114 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 19115 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 19116 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 19117 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 19118 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 19119 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 19120 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 19121 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 19122 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 19123 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 19124 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 19125 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 19126 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 19127 // CHECK17-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 19128 // CHECK17-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4 19129 // CHECK17-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 19130 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 19131 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 19132 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4 19133 // CHECK17-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 19134 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 19135 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]]) 19136 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 19137 // CHECK17: omp.dispatch.cond: 19138 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19139 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 19140 // CHECK17-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 19141 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]] 19142 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 19143 // CHECK17: cond.true: 19144 // CHECK17-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 19145 // CHECK17-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 19146 // CHECK17-NEXT: br label [[COND_END:%.*]] 19147 // CHECK17: cond.false: 19148 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19149 // CHECK17-NEXT: br label [[COND_END]] 19150 // CHECK17: cond.end: 19151 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 19152 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 19153 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 19154 // CHECK17-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 19155 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19156 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19157 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 19158 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 19159 // CHECK17: omp.dispatch.body: 19160 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 19161 // CHECK17: omp.inner.for.cond: 19162 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19163 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19164 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 19165 // CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 19166 // CHECK17: omp.inner.for.body: 19167 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19168 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 19169 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 19170 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4 19171 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4 19172 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 19173 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 19174 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 19175 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 19176 // CHECK17: omp.body.continue: 19177 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 19178 // CHECK17: omp.inner.for.inc: 19179 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19180 // CHECK17-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1 19181 // CHECK17-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 19182 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 19183 // CHECK17: omp.inner.for.end: 19184 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 19185 // CHECK17: omp.dispatch.inc: 19186 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 19187 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 19188 // CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 19189 // CHECK17-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 19190 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19191 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 19192 // CHECK17-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 19193 // CHECK17-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 19194 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]] 19195 // CHECK17: omp.dispatch.end: 19196 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 19197 // CHECK17-NEXT: ret void 19198 // 19199 // 19200 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131 19201 // CHECK17-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 19202 // CHECK17-NEXT: entry: 19203 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 19204 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 19205 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 19206 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..30 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 19207 // CHECK17-NEXT: ret void 19208 // 19209 // 19210 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..30 19211 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 19212 // CHECK17-NEXT: entry: 19213 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 19214 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 19215 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 19216 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 19217 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 19218 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 19219 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 19220 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 19221 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 19222 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 19223 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 19224 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 19225 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 19226 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 19227 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 19228 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 19229 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 19230 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 19231 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 19232 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 19233 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 19234 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19235 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 19236 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 19237 // CHECK17: cond.true: 19238 // CHECK17-NEXT: br label [[COND_END:%.*]] 19239 // CHECK17: cond.false: 19240 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19241 // CHECK17-NEXT: br label [[COND_END]] 19242 // CHECK17: cond.end: 19243 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 19244 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 19245 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 19246 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 19247 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 19248 // CHECK17: omp.inner.for.cond: 19249 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19250 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19251 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 19252 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 19253 // CHECK17: omp.inner.for.body: 19254 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 19255 // CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 19256 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19257 // CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 19258 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..31 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]) 19259 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 19260 // CHECK17: omp.inner.for.inc: 19261 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19262 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 19263 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 19264 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 19265 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 19266 // CHECK17: omp.inner.for.end: 19267 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 19268 // CHECK17: omp.loop.exit: 19269 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 19270 // CHECK17-NEXT: ret void 19271 // 19272 // 19273 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..31 19274 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 19275 // CHECK17-NEXT: entry: 19276 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 19277 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 19278 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 19279 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 19280 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 19281 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 19282 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 19283 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 19284 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 19285 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 19286 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 19287 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 19288 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 19289 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 19290 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 19291 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 19292 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 19293 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 19294 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 19295 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 19296 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 19297 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 19298 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 19299 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 19300 // CHECK17-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 19301 // CHECK17-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 19302 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 19303 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 19304 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 19305 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19306 // CHECK17-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 19307 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 19308 // CHECK17-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 19309 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 19310 // CHECK17: omp.dispatch.cond: 19311 // CHECK17-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 19312 // CHECK17-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 19313 // CHECK17-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 19314 // CHECK17: omp.dispatch.body: 19315 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 19316 // CHECK17-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 19317 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 19318 // CHECK17: omp.inner.for.cond: 19319 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 19320 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21 19321 // CHECK17-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 19322 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 19323 // CHECK17: omp.inner.for.body: 19324 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 19325 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 19326 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 19327 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21 19328 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21 19329 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 19330 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 19331 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21 19332 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 19333 // CHECK17: omp.body.continue: 19334 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 19335 // CHECK17: omp.inner.for.inc: 19336 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 19337 // CHECK17-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 19338 // CHECK17-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 19339 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]] 19340 // CHECK17: omp.inner.for.end: 19341 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 19342 // CHECK17: omp.dispatch.inc: 19343 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]] 19344 // CHECK17: omp.dispatch.end: 19345 // CHECK17-NEXT: ret void 19346 // 19347 // 19348 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136 19349 // CHECK17-SAME: (i64 noundef [[M:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 19350 // CHECK17-NEXT: entry: 19351 // CHECK17-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 19352 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 19353 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 19354 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 19355 // CHECK17-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 19356 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 19357 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* 19358 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 19359 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 19360 // CHECK17-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 19361 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 19362 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 19363 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 19364 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 19365 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..34 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]]) 19366 // CHECK17-NEXT: ret void 19367 // 19368 // 19369 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..34 19370 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 19371 // CHECK17-NEXT: entry: 19372 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 19373 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 19374 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 19375 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 19376 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 19377 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 19378 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 19379 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 19380 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 19381 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 19382 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 19383 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 19384 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 19385 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 19386 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 19387 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 19388 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 19389 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 19390 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 19391 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 19392 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 19393 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 19394 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 19395 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 19396 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 19397 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19398 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 19399 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 19400 // CHECK17: cond.true: 19401 // CHECK17-NEXT: br label [[COND_END:%.*]] 19402 // CHECK17: cond.false: 19403 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19404 // CHECK17-NEXT: br label [[COND_END]] 19405 // CHECK17: cond.end: 19406 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 19407 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 19408 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 19409 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 19410 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 19411 // CHECK17: omp.inner.for.cond: 19412 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19413 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19414 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 19415 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 19416 // CHECK17: omp.inner.for.body: 19417 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 19418 // CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 19419 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19420 // CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 19421 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 4 19422 // CHECK17-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 19423 // CHECK17-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4 19424 // CHECK17-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 19425 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..35 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]]) 19426 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 19427 // CHECK17: omp.inner.for.inc: 19428 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19429 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 19430 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 19431 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 19432 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 19433 // CHECK17: omp.inner.for.end: 19434 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 19435 // CHECK17: omp.loop.exit: 19436 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 19437 // CHECK17-NEXT: ret void 19438 // 19439 // 19440 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..35 19441 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 19442 // CHECK17-NEXT: entry: 19443 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 19444 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 19445 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 19446 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 19447 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 19448 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 19449 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 19450 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 19451 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 19452 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 19453 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 19454 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 19455 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 19456 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 19457 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 19458 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 19459 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 19460 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 19461 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 19462 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 19463 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 19464 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 19465 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 19466 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 19467 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 19468 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 19469 // CHECK17-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 19470 // CHECK17-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4 19471 // CHECK17-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 19472 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 19473 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 19474 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4 19475 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 19476 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19477 // CHECK17-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 19478 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 19479 // CHECK17-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]]) 19480 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 19481 // CHECK17: omp.dispatch.cond: 19482 // CHECK17-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 19483 // CHECK17-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0 19484 // CHECK17-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 19485 // CHECK17: omp.dispatch.body: 19486 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 19487 // CHECK17-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 19488 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 19489 // CHECK17: omp.inner.for.cond: 19490 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 19491 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !24 19492 // CHECK17-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 19493 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 19494 // CHECK17: omp.inner.for.body: 19495 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 19496 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 19497 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 19498 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !24 19499 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !24 19500 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 19501 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 19502 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !24 19503 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 19504 // CHECK17: omp.body.continue: 19505 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 19506 // CHECK17: omp.inner.for.inc: 19507 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 19508 // CHECK17-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1 19509 // CHECK17-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 19510 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]] 19511 // CHECK17: omp.inner.for.end: 19512 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 19513 // CHECK17: omp.dispatch.inc: 19514 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]] 19515 // CHECK17: omp.dispatch.end: 19516 // CHECK17-NEXT: ret void 19517 // 19518 // 19519 // CHECK17-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 19520 // CHECK17-SAME: () #[[ATTR6:[0-9]+]] { 19521 // CHECK17-NEXT: entry: 19522 // CHECK17-NEXT: call void @__tgt_register_requires(i64 1) 19523 // CHECK17-NEXT: ret void 19524 // 19525 // 19526 // CHECK18-LABEL: define {{[^@]+}}@main 19527 // CHECK18-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 19528 // CHECK18-NEXT: entry: 19529 // CHECK18-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 19530 // CHECK18-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 19531 // CHECK18-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 19532 // CHECK18-NEXT: [[N:%.*]] = alloca i32, align 4 19533 // CHECK18-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 19534 // CHECK18-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 19535 // CHECK18-NEXT: [[M:%.*]] = alloca i32, align 4 19536 // CHECK18-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 19537 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 19538 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 19539 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 19540 // CHECK18-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 19541 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 19542 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 19543 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 19544 // CHECK18-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8 19545 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8 19546 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8 19547 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8 19548 // CHECK18-NEXT: [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8 19549 // CHECK18-NEXT: [[_TMP9:%.*]] = alloca i32, align 4 19550 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 19551 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4 19552 // CHECK18-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 19553 // CHECK18-NEXT: [[N_CASTED19:%.*]] = alloca i64, align 8 19554 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [4 x i8*], align 8 19555 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS22:%.*]] = alloca [4 x i8*], align 8 19556 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [4 x i8*], align 8 19557 // CHECK18-NEXT: [[DOTOFFLOAD_SIZES24:%.*]] = alloca [4 x i64], align 8 19558 // CHECK18-NEXT: [[_TMP25:%.*]] = alloca i32, align 4 19559 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4 19560 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4 19561 // CHECK18-NEXT: [[N_CASTED34:%.*]] = alloca i64, align 8 19562 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS36:%.*]] = alloca [3 x i8*], align 8 19563 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS37:%.*]] = alloca [3 x i8*], align 8 19564 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS38:%.*]] = alloca [3 x i8*], align 8 19565 // CHECK18-NEXT: [[DOTOFFLOAD_SIZES39:%.*]] = alloca [3 x i64], align 8 19566 // CHECK18-NEXT: [[_TMP40:%.*]] = alloca i32, align 4 19567 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4 19568 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4 19569 // CHECK18-NEXT: [[M_CASTED49:%.*]] = alloca i64, align 8 19570 // CHECK18-NEXT: [[N_CASTED51:%.*]] = alloca i64, align 8 19571 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS53:%.*]] = alloca [4 x i8*], align 8 19572 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS54:%.*]] = alloca [4 x i8*], align 8 19573 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS55:%.*]] = alloca [4 x i8*], align 8 19574 // CHECK18-NEXT: [[DOTOFFLOAD_SIZES56:%.*]] = alloca [4 x i64], align 8 19575 // CHECK18-NEXT: [[_TMP57:%.*]] = alloca i32, align 4 19576 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4 19577 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_59:%.*]] = alloca i32, align 4 19578 // CHECK18-NEXT: store i32 0, i32* [[RETVAL]], align 4 19579 // CHECK18-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 19580 // CHECK18-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 19581 // CHECK18-NEXT: store i32 100, i32* [[N]], align 4 19582 // CHECK18-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 19583 // CHECK18-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 19584 // CHECK18-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 19585 // CHECK18-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 19586 // CHECK18-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 19587 // CHECK18-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 19588 // CHECK18-NEXT: store i32 10, i32* [[M]], align 4 19589 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 19590 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 19591 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 19592 // CHECK18-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 19593 // CHECK18-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 19594 // CHECK18-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 19595 // CHECK18-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP6]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes to i8*), i64 24, i1 false) 19596 // CHECK18-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 19597 // CHECK18-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 19598 // CHECK18-NEXT: store i64 [[TMP4]], i64* [[TMP8]], align 8 19599 // CHECK18-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 19600 // CHECK18-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 19601 // CHECK18-NEXT: store i64 [[TMP4]], i64* [[TMP10]], align 8 19602 // CHECK18-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 19603 // CHECK18-NEXT: store i8* null, i8** [[TMP11]], align 8 19604 // CHECK18-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 19605 // CHECK18-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 19606 // CHECK18-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8 19607 // CHECK18-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 19608 // CHECK18-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 19609 // CHECK18-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8 19610 // CHECK18-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 19611 // CHECK18-NEXT: store i8* null, i8** [[TMP16]], align 8 19612 // CHECK18-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 19613 // CHECK18-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 19614 // CHECK18-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 8 19615 // CHECK18-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 19616 // CHECK18-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 19617 // CHECK18-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 8 19618 // CHECK18-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 19619 // CHECK18-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 8 19620 // CHECK18-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 19621 // CHECK18-NEXT: store i8* null, i8** [[TMP22]], align 8 19622 // CHECK18-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 19623 // CHECK18-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 19624 // CHECK18-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 19625 // CHECK18-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 19626 // CHECK18-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 19627 // CHECK18-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 19628 // CHECK18-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 19629 // CHECK18-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 19630 // CHECK18-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 19631 // CHECK18-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 19632 // CHECK18-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 19633 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 19634 // CHECK18-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 19635 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP29]]) 19636 // CHECK18-NEXT: [[TMP30:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, i32 3, i8** [[TMP23]], i8** [[TMP24]], i64* [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 19637 // CHECK18-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 19638 // CHECK18-NEXT: br i1 [[TMP31]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 19639 // CHECK18: omp_offload.failed: 19640 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 19641 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT]] 19642 // CHECK18: omp_offload.cont: 19643 // CHECK18-NEXT: [[TMP32:%.*]] = load i32, i32* [[N]], align 4 19644 // CHECK18-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32* 19645 // CHECK18-NEXT: store i32 [[TMP32]], i32* [[CONV4]], align 4 19646 // CHECK18-NEXT: [[TMP33:%.*]] = load i64, i64* [[N_CASTED3]], align 8 19647 // CHECK18-NEXT: [[TMP34:%.*]] = mul nuw i64 [[TMP1]], 4 19648 // CHECK18-NEXT: [[TMP35:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES8]] to i8* 19649 // CHECK18-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP35]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.4 to i8*), i64 24, i1 false) 19650 // CHECK18-NEXT: [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 19651 // CHECK18-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64* 19652 // CHECK18-NEXT: store i64 [[TMP33]], i64* [[TMP37]], align 8 19653 // CHECK18-NEXT: [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 19654 // CHECK18-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64* 19655 // CHECK18-NEXT: store i64 [[TMP33]], i64* [[TMP39]], align 8 19656 // CHECK18-NEXT: [[TMP40:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0 19657 // CHECK18-NEXT: store i8* null, i8** [[TMP40]], align 8 19658 // CHECK18-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 19659 // CHECK18-NEXT: [[TMP42:%.*]] = bitcast i8** [[TMP41]] to i64* 19660 // CHECK18-NEXT: store i64 [[TMP1]], i64* [[TMP42]], align 8 19661 // CHECK18-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 19662 // CHECK18-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i64* 19663 // CHECK18-NEXT: store i64 [[TMP1]], i64* [[TMP44]], align 8 19664 // CHECK18-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1 19665 // CHECK18-NEXT: store i8* null, i8** [[TMP45]], align 8 19666 // CHECK18-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2 19667 // CHECK18-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to i32** 19668 // CHECK18-NEXT: store i32* [[VLA]], i32** [[TMP47]], align 8 19669 // CHECK18-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2 19670 // CHECK18-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32** 19671 // CHECK18-NEXT: store i32* [[VLA]], i32** [[TMP49]], align 8 19672 // CHECK18-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2 19673 // CHECK18-NEXT: store i64 [[TMP34]], i64* [[TMP50]], align 8 19674 // CHECK18-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2 19675 // CHECK18-NEXT: store i8* null, i8** [[TMP51]], align 8 19676 // CHECK18-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 19677 // CHECK18-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 19678 // CHECK18-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0 19679 // CHECK18-NEXT: [[TMP55:%.*]] = load i32, i32* [[N]], align 4 19680 // CHECK18-NEXT: store i32 [[TMP55]], i32* [[DOTCAPTURE_EXPR_10]], align 4 19681 // CHECK18-NEXT: [[TMP56:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 19682 // CHECK18-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP56]], 0 19683 // CHECK18-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1 19684 // CHECK18-NEXT: [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1 19685 // CHECK18-NEXT: store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4 19686 // CHECK18-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 19687 // CHECK18-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP57]], 1 19688 // CHECK18-NEXT: [[TMP58:%.*]] = zext i32 [[ADD15]] to i64 19689 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP58]]) 19690 // CHECK18-NEXT: [[TMP59:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, i32 3, i8** [[TMP52]], i8** [[TMP53]], i64* [[TMP54]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 19691 // CHECK18-NEXT: [[TMP60:%.*]] = icmp ne i32 [[TMP59]], 0 19692 // CHECK18-NEXT: br i1 [[TMP60]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 19693 // CHECK18: omp_offload.failed16: 19694 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i64 [[TMP33]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 19695 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT17]] 19696 // CHECK18: omp_offload.cont17: 19697 // CHECK18-NEXT: [[TMP61:%.*]] = load i32, i32* [[M]], align 4 19698 // CHECK18-NEXT: [[CONV18:%.*]] = bitcast i64* [[M_CASTED]] to i32* 19699 // CHECK18-NEXT: store i32 [[TMP61]], i32* [[CONV18]], align 4 19700 // CHECK18-NEXT: [[TMP62:%.*]] = load i64, i64* [[M_CASTED]], align 8 19701 // CHECK18-NEXT: [[TMP63:%.*]] = load i32, i32* [[N]], align 4 19702 // CHECK18-NEXT: [[CONV20:%.*]] = bitcast i64* [[N_CASTED19]] to i32* 19703 // CHECK18-NEXT: store i32 [[TMP63]], i32* [[CONV20]], align 4 19704 // CHECK18-NEXT: [[TMP64:%.*]] = load i64, i64* [[N_CASTED19]], align 8 19705 // CHECK18-NEXT: [[TMP65:%.*]] = mul nuw i64 [[TMP1]], 4 19706 // CHECK18-NEXT: [[TMP66:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES24]] to i8* 19707 // CHECK18-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP66]], i8* align 8 bitcast ([4 x i64]* @.offload_sizes.8 to i8*), i64 32, i1 false) 19708 // CHECK18-NEXT: [[TMP67:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 19709 // CHECK18-NEXT: [[TMP68:%.*]] = bitcast i8** [[TMP67]] to i64* 19710 // CHECK18-NEXT: store i64 [[TMP62]], i64* [[TMP68]], align 8 19711 // CHECK18-NEXT: [[TMP69:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 19712 // CHECK18-NEXT: [[TMP70:%.*]] = bitcast i8** [[TMP69]] to i64* 19713 // CHECK18-NEXT: store i64 [[TMP62]], i64* [[TMP70]], align 8 19714 // CHECK18-NEXT: [[TMP71:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0 19715 // CHECK18-NEXT: store i8* null, i8** [[TMP71]], align 8 19716 // CHECK18-NEXT: [[TMP72:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1 19717 // CHECK18-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to i64* 19718 // CHECK18-NEXT: store i64 [[TMP64]], i64* [[TMP73]], align 8 19719 // CHECK18-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1 19720 // CHECK18-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i64* 19721 // CHECK18-NEXT: store i64 [[TMP64]], i64* [[TMP75]], align 8 19722 // CHECK18-NEXT: [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1 19723 // CHECK18-NEXT: store i8* null, i8** [[TMP76]], align 8 19724 // CHECK18-NEXT: [[TMP77:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 2 19725 // CHECK18-NEXT: [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i64* 19726 // CHECK18-NEXT: store i64 [[TMP1]], i64* [[TMP78]], align 8 19727 // CHECK18-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 2 19728 // CHECK18-NEXT: [[TMP80:%.*]] = bitcast i8** [[TMP79]] to i64* 19729 // CHECK18-NEXT: store i64 [[TMP1]], i64* [[TMP80]], align 8 19730 // CHECK18-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 2 19731 // CHECK18-NEXT: store i8* null, i8** [[TMP81]], align 8 19732 // CHECK18-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 3 19733 // CHECK18-NEXT: [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i32** 19734 // CHECK18-NEXT: store i32* [[VLA]], i32** [[TMP83]], align 8 19735 // CHECK18-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 3 19736 // CHECK18-NEXT: [[TMP85:%.*]] = bitcast i8** [[TMP84]] to i32** 19737 // CHECK18-NEXT: store i32* [[VLA]], i32** [[TMP85]], align 8 19738 // CHECK18-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 3 19739 // CHECK18-NEXT: store i64 [[TMP65]], i64* [[TMP86]], align 8 19740 // CHECK18-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 3 19741 // CHECK18-NEXT: store i8* null, i8** [[TMP87]], align 8 19742 // CHECK18-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 19743 // CHECK18-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 19744 // CHECK18-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0 19745 // CHECK18-NEXT: [[TMP91:%.*]] = load i32, i32* [[N]], align 4 19746 // CHECK18-NEXT: store i32 [[TMP91]], i32* [[DOTCAPTURE_EXPR_26]], align 4 19747 // CHECK18-NEXT: [[TMP92:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 19748 // CHECK18-NEXT: [[SUB28:%.*]] = sub nsw i32 [[TMP92]], 0 19749 // CHECK18-NEXT: [[DIV29:%.*]] = sdiv i32 [[SUB28]], 1 19750 // CHECK18-NEXT: [[SUB30:%.*]] = sub nsw i32 [[DIV29]], 1 19751 // CHECK18-NEXT: store i32 [[SUB30]], i32* [[DOTCAPTURE_EXPR_27]], align 4 19752 // CHECK18-NEXT: [[TMP93:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 19753 // CHECK18-NEXT: [[ADD31:%.*]] = add nsw i32 [[TMP93]], 1 19754 // CHECK18-NEXT: [[TMP94:%.*]] = zext i32 [[ADD31]] to i64 19755 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP94]]) 19756 // CHECK18-NEXT: [[TMP95:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, i32 4, i8** [[TMP88]], i8** [[TMP89]], i64* [[TMP90]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 19757 // CHECK18-NEXT: [[TMP96:%.*]] = icmp ne i32 [[TMP95]], 0 19758 // CHECK18-NEXT: br i1 [[TMP96]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]] 19759 // CHECK18: omp_offload.failed32: 19760 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i64 [[TMP62]], i64 [[TMP64]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 19761 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT33]] 19762 // CHECK18: omp_offload.cont33: 19763 // CHECK18-NEXT: [[TMP97:%.*]] = load i32, i32* [[N]], align 4 19764 // CHECK18-NEXT: [[CONV35:%.*]] = bitcast i64* [[N_CASTED34]] to i32* 19765 // CHECK18-NEXT: store i32 [[TMP97]], i32* [[CONV35]], align 4 19766 // CHECK18-NEXT: [[TMP98:%.*]] = load i64, i64* [[N_CASTED34]], align 8 19767 // CHECK18-NEXT: [[TMP99:%.*]] = mul nuw i64 [[TMP1]], 4 19768 // CHECK18-NEXT: [[TMP100:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES39]] to i8* 19769 // CHECK18-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP100]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.12 to i8*), i64 24, i1 false) 19770 // CHECK18-NEXT: [[TMP101:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0 19771 // CHECK18-NEXT: [[TMP102:%.*]] = bitcast i8** [[TMP101]] to i64* 19772 // CHECK18-NEXT: store i64 [[TMP98]], i64* [[TMP102]], align 8 19773 // CHECK18-NEXT: [[TMP103:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0 19774 // CHECK18-NEXT: [[TMP104:%.*]] = bitcast i8** [[TMP103]] to i64* 19775 // CHECK18-NEXT: store i64 [[TMP98]], i64* [[TMP104]], align 8 19776 // CHECK18-NEXT: [[TMP105:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 0 19777 // CHECK18-NEXT: store i8* null, i8** [[TMP105]], align 8 19778 // CHECK18-NEXT: [[TMP106:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 1 19779 // CHECK18-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to i64* 19780 // CHECK18-NEXT: store i64 [[TMP1]], i64* [[TMP107]], align 8 19781 // CHECK18-NEXT: [[TMP108:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 1 19782 // CHECK18-NEXT: [[TMP109:%.*]] = bitcast i8** [[TMP108]] to i64* 19783 // CHECK18-NEXT: store i64 [[TMP1]], i64* [[TMP109]], align 8 19784 // CHECK18-NEXT: [[TMP110:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 1 19785 // CHECK18-NEXT: store i8* null, i8** [[TMP110]], align 8 19786 // CHECK18-NEXT: [[TMP111:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 2 19787 // CHECK18-NEXT: [[TMP112:%.*]] = bitcast i8** [[TMP111]] to i32** 19788 // CHECK18-NEXT: store i32* [[VLA]], i32** [[TMP112]], align 8 19789 // CHECK18-NEXT: [[TMP113:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 2 19790 // CHECK18-NEXT: [[TMP114:%.*]] = bitcast i8** [[TMP113]] to i32** 19791 // CHECK18-NEXT: store i32* [[VLA]], i32** [[TMP114]], align 8 19792 // CHECK18-NEXT: [[TMP115:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 2 19793 // CHECK18-NEXT: store i64 [[TMP99]], i64* [[TMP115]], align 8 19794 // CHECK18-NEXT: [[TMP116:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 2 19795 // CHECK18-NEXT: store i8* null, i8** [[TMP116]], align 8 19796 // CHECK18-NEXT: [[TMP117:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0 19797 // CHECK18-NEXT: [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0 19798 // CHECK18-NEXT: [[TMP119:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0 19799 // CHECK18-NEXT: [[TMP120:%.*]] = load i32, i32* [[N]], align 4 19800 // CHECK18-NEXT: store i32 [[TMP120]], i32* [[DOTCAPTURE_EXPR_41]], align 4 19801 // CHECK18-NEXT: [[TMP121:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4 19802 // CHECK18-NEXT: [[SUB43:%.*]] = sub nsw i32 [[TMP121]], 0 19803 // CHECK18-NEXT: [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1 19804 // CHECK18-NEXT: [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 1 19805 // CHECK18-NEXT: store i32 [[SUB45]], i32* [[DOTCAPTURE_EXPR_42]], align 4 19806 // CHECK18-NEXT: [[TMP122:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_42]], align 4 19807 // CHECK18-NEXT: [[ADD46:%.*]] = add nsw i32 [[TMP122]], 1 19808 // CHECK18-NEXT: [[TMP123:%.*]] = zext i32 [[ADD46]] to i64 19809 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP123]]) 19810 // CHECK18-NEXT: [[TMP124:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, i32 3, i8** [[TMP117]], i8** [[TMP118]], i64* [[TMP119]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 19811 // CHECK18-NEXT: [[TMP125:%.*]] = icmp ne i32 [[TMP124]], 0 19812 // CHECK18-NEXT: br i1 [[TMP125]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]] 19813 // CHECK18: omp_offload.failed47: 19814 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i64 [[TMP98]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 19815 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT48]] 19816 // CHECK18: omp_offload.cont48: 19817 // CHECK18-NEXT: [[TMP126:%.*]] = load i32, i32* [[M]], align 4 19818 // CHECK18-NEXT: [[CONV50:%.*]] = bitcast i64* [[M_CASTED49]] to i32* 19819 // CHECK18-NEXT: store i32 [[TMP126]], i32* [[CONV50]], align 4 19820 // CHECK18-NEXT: [[TMP127:%.*]] = load i64, i64* [[M_CASTED49]], align 8 19821 // CHECK18-NEXT: [[TMP128:%.*]] = load i32, i32* [[N]], align 4 19822 // CHECK18-NEXT: [[CONV52:%.*]] = bitcast i64* [[N_CASTED51]] to i32* 19823 // CHECK18-NEXT: store i32 [[TMP128]], i32* [[CONV52]], align 4 19824 // CHECK18-NEXT: [[TMP129:%.*]] = load i64, i64* [[N_CASTED51]], align 8 19825 // CHECK18-NEXT: [[TMP130:%.*]] = mul nuw i64 [[TMP1]], 4 19826 // CHECK18-NEXT: [[TMP131:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES56]] to i8* 19827 // CHECK18-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP131]], i8* align 8 bitcast ([4 x i64]* @.offload_sizes.16 to i8*), i64 32, i1 false) 19828 // CHECK18-NEXT: [[TMP132:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0 19829 // CHECK18-NEXT: [[TMP133:%.*]] = bitcast i8** [[TMP132]] to i64* 19830 // CHECK18-NEXT: store i64 [[TMP127]], i64* [[TMP133]], align 8 19831 // CHECK18-NEXT: [[TMP134:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0 19832 // CHECK18-NEXT: [[TMP135:%.*]] = bitcast i8** [[TMP134]] to i64* 19833 // CHECK18-NEXT: store i64 [[TMP127]], i64* [[TMP135]], align 8 19834 // CHECK18-NEXT: [[TMP136:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 0 19835 // CHECK18-NEXT: store i8* null, i8** [[TMP136]], align 8 19836 // CHECK18-NEXT: [[TMP137:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 1 19837 // CHECK18-NEXT: [[TMP138:%.*]] = bitcast i8** [[TMP137]] to i64* 19838 // CHECK18-NEXT: store i64 [[TMP129]], i64* [[TMP138]], align 8 19839 // CHECK18-NEXT: [[TMP139:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 1 19840 // CHECK18-NEXT: [[TMP140:%.*]] = bitcast i8** [[TMP139]] to i64* 19841 // CHECK18-NEXT: store i64 [[TMP129]], i64* [[TMP140]], align 8 19842 // CHECK18-NEXT: [[TMP141:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 1 19843 // CHECK18-NEXT: store i8* null, i8** [[TMP141]], align 8 19844 // CHECK18-NEXT: [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 2 19845 // CHECK18-NEXT: [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i64* 19846 // CHECK18-NEXT: store i64 [[TMP1]], i64* [[TMP143]], align 8 19847 // CHECK18-NEXT: [[TMP144:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 2 19848 // CHECK18-NEXT: [[TMP145:%.*]] = bitcast i8** [[TMP144]] to i64* 19849 // CHECK18-NEXT: store i64 [[TMP1]], i64* [[TMP145]], align 8 19850 // CHECK18-NEXT: [[TMP146:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 2 19851 // CHECK18-NEXT: store i8* null, i8** [[TMP146]], align 8 19852 // CHECK18-NEXT: [[TMP147:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 3 19853 // CHECK18-NEXT: [[TMP148:%.*]] = bitcast i8** [[TMP147]] to i32** 19854 // CHECK18-NEXT: store i32* [[VLA]], i32** [[TMP148]], align 8 19855 // CHECK18-NEXT: [[TMP149:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 3 19856 // CHECK18-NEXT: [[TMP150:%.*]] = bitcast i8** [[TMP149]] to i32** 19857 // CHECK18-NEXT: store i32* [[VLA]], i32** [[TMP150]], align 8 19858 // CHECK18-NEXT: [[TMP151:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 3 19859 // CHECK18-NEXT: store i64 [[TMP130]], i64* [[TMP151]], align 8 19860 // CHECK18-NEXT: [[TMP152:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 3 19861 // CHECK18-NEXT: store i8* null, i8** [[TMP152]], align 8 19862 // CHECK18-NEXT: [[TMP153:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0 19863 // CHECK18-NEXT: [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0 19864 // CHECK18-NEXT: [[TMP155:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0 19865 // CHECK18-NEXT: [[TMP156:%.*]] = load i32, i32* [[N]], align 4 19866 // CHECK18-NEXT: store i32 [[TMP156]], i32* [[DOTCAPTURE_EXPR_58]], align 4 19867 // CHECK18-NEXT: [[TMP157:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_58]], align 4 19868 // CHECK18-NEXT: [[SUB60:%.*]] = sub nsw i32 [[TMP157]], 0 19869 // CHECK18-NEXT: [[DIV61:%.*]] = sdiv i32 [[SUB60]], 1 19870 // CHECK18-NEXT: [[SUB62:%.*]] = sub nsw i32 [[DIV61]], 1 19871 // CHECK18-NEXT: store i32 [[SUB62]], i32* [[DOTCAPTURE_EXPR_59]], align 4 19872 // CHECK18-NEXT: [[TMP158:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_59]], align 4 19873 // CHECK18-NEXT: [[ADD63:%.*]] = add nsw i32 [[TMP158]], 1 19874 // CHECK18-NEXT: [[TMP159:%.*]] = zext i32 [[ADD63]] to i64 19875 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP159]]) 19876 // CHECK18-NEXT: [[TMP160:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, i32 4, i8** [[TMP153]], i8** [[TMP154]], i64* [[TMP155]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 19877 // CHECK18-NEXT: [[TMP161:%.*]] = icmp ne i32 [[TMP160]], 0 19878 // CHECK18-NEXT: br i1 [[TMP161]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]] 19879 // CHECK18: omp_offload.failed64: 19880 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i64 [[TMP127]], i64 [[TMP129]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 19881 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT65]] 19882 // CHECK18: omp_offload.cont65: 19883 // CHECK18-NEXT: [[TMP162:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 19884 // CHECK18-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP162]]) 19885 // CHECK18-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 19886 // CHECK18-NEXT: [[TMP163:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 19887 // CHECK18-NEXT: call void @llvm.stackrestore(i8* [[TMP163]]) 19888 // CHECK18-NEXT: [[TMP164:%.*]] = load i32, i32* [[RETVAL]], align 4 19889 // CHECK18-NEXT: ret i32 [[TMP164]] 19890 // 19891 // 19892 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148 19893 // CHECK18-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 19894 // CHECK18-NEXT: entry: 19895 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 19896 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 19897 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 19898 // CHECK18-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 19899 // CHECK18-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 19900 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 19901 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 19902 // CHECK18-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 19903 // CHECK18-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 19904 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 19905 // CHECK18-NEXT: ret void 19906 // 19907 // 19908 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined. 19909 // CHECK18-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 19910 // CHECK18-NEXT: entry: 19911 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 19912 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 19913 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 19914 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 19915 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 19916 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 19917 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 19918 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 19919 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 19920 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 19921 // CHECK18-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 19922 // CHECK18-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 19923 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 19924 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 19925 // CHECK18-NEXT: [[I3:%.*]] = alloca i32, align 4 19926 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 19927 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 19928 // CHECK18-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 19929 // CHECK18-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 19930 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 19931 // CHECK18-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 19932 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 19933 // CHECK18-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 19934 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 19935 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 19936 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 19937 // CHECK18-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 19938 // CHECK18-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 19939 // CHECK18-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 19940 // CHECK18-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 19941 // CHECK18-NEXT: store i32 0, i32* [[I]], align 4 19942 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 19943 // CHECK18-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 19944 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 19945 // CHECK18: omp.precond.then: 19946 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 19947 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 19948 // CHECK18-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 19949 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 19950 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 19951 // CHECK18-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 19952 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 19953 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 19954 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19955 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 19956 // CHECK18-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 19957 // CHECK18-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 19958 // CHECK18: cond.true: 19959 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 19960 // CHECK18-NEXT: br label [[COND_END:%.*]] 19961 // CHECK18: cond.false: 19962 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19963 // CHECK18-NEXT: br label [[COND_END]] 19964 // CHECK18: cond.end: 19965 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 19966 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 19967 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 19968 // CHECK18-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 19969 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 19970 // CHECK18: omp.inner.for.cond: 19971 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19972 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19973 // CHECK18-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 19974 // CHECK18-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 19975 // CHECK18: omp.inner.for.body: 19976 // CHECK18-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 19977 // CHECK18-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 19978 // CHECK18-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19979 // CHECK18-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 19980 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 19981 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 19982 // CHECK18: omp.inner.for.inc: 19983 // CHECK18-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19984 // CHECK18-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 19985 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 19986 // CHECK18-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 19987 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 19988 // CHECK18: omp.inner.for.end: 19989 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 19990 // CHECK18: omp.loop.exit: 19991 // CHECK18-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 19992 // CHECK18-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 19993 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 19994 // CHECK18-NEXT: br label [[OMP_PRECOND_END]] 19995 // CHECK18: omp.precond.end: 19996 // CHECK18-NEXT: ret void 19997 // 19998 // 19999 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..1 20000 // CHECK18-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 20001 // CHECK18-NEXT: entry: 20002 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 20003 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 20004 // CHECK18-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 20005 // CHECK18-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 20006 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 20007 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 20008 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 20009 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 20010 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 20011 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 20012 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 20013 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 20014 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 20015 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 20016 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 20017 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 20018 // CHECK18-NEXT: [[I4:%.*]] = alloca i32, align 4 20019 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 20020 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 20021 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 20022 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 20023 // CHECK18-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 20024 // CHECK18-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 20025 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 20026 // CHECK18-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 20027 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 20028 // CHECK18-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 20029 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 20030 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 20031 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 20032 // CHECK18-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 20033 // CHECK18-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 20034 // CHECK18-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 20035 // CHECK18-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 20036 // CHECK18-NEXT: store i32 0, i32* [[I]], align 4 20037 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 20038 // CHECK18-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 20039 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 20040 // CHECK18: omp.precond.then: 20041 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 20042 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20043 // CHECK18-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 20044 // CHECK18-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 20045 // CHECK18-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 20046 // CHECK18-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 20047 // CHECK18-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 20048 // CHECK18-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 20049 // CHECK18-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 20050 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 20051 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 20052 // CHECK18-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 20053 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 20054 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 20055 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 20056 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20057 // CHECK18-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 20058 // CHECK18-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 20059 // CHECK18: cond.true: 20060 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20061 // CHECK18-NEXT: br label [[COND_END:%.*]] 20062 // CHECK18: cond.false: 20063 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 20064 // CHECK18-NEXT: br label [[COND_END]] 20065 // CHECK18: cond.end: 20066 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 20067 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 20068 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 20069 // CHECK18-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 20070 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 20071 // CHECK18: omp.inner.for.cond: 20072 // CHECK18-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20073 // CHECK18-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 20074 // CHECK18-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 20075 // CHECK18-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 20076 // CHECK18: omp.inner.for.body: 20077 // CHECK18-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20078 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 20079 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 20080 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 20081 // CHECK18-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4 20082 // CHECK18-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 20083 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 20084 // CHECK18-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 20085 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 20086 // CHECK18: omp.body.continue: 20087 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 20088 // CHECK18: omp.inner.for.inc: 20089 // CHECK18-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20090 // CHECK18-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 20091 // CHECK18-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 20092 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 20093 // CHECK18: omp.inner.for.end: 20094 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 20095 // CHECK18: omp.loop.exit: 20096 // CHECK18-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 20097 // CHECK18-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 20098 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 20099 // CHECK18-NEXT: br label [[OMP_PRECOND_END]] 20100 // CHECK18: omp.precond.end: 20101 // CHECK18-NEXT: ret void 20102 // 20103 // 20104 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153 20105 // CHECK18-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 20106 // CHECK18-NEXT: entry: 20107 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 20108 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 20109 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 20110 // CHECK18-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 20111 // CHECK18-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 20112 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 20113 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 20114 // CHECK18-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 20115 // CHECK18-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 20116 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 20117 // CHECK18-NEXT: ret void 20118 // 20119 // 20120 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..2 20121 // CHECK18-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 20122 // CHECK18-NEXT: entry: 20123 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 20124 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 20125 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 20126 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 20127 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 20128 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 20129 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 20130 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 20131 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 20132 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 20133 // CHECK18-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 20134 // CHECK18-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 20135 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 20136 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 20137 // CHECK18-NEXT: [[I3:%.*]] = alloca i32, align 4 20138 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 20139 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 20140 // CHECK18-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 20141 // CHECK18-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 20142 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 20143 // CHECK18-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 20144 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 20145 // CHECK18-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 20146 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 20147 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 20148 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 20149 // CHECK18-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 20150 // CHECK18-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 20151 // CHECK18-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 20152 // CHECK18-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 20153 // CHECK18-NEXT: store i32 0, i32* [[I]], align 4 20154 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 20155 // CHECK18-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 20156 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 20157 // CHECK18: omp.precond.then: 20158 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 20159 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20160 // CHECK18-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 20161 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 20162 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 20163 // CHECK18-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 20164 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 20165 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 20166 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20167 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20168 // CHECK18-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 20169 // CHECK18-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 20170 // CHECK18: cond.true: 20171 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20172 // CHECK18-NEXT: br label [[COND_END:%.*]] 20173 // CHECK18: cond.false: 20174 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20175 // CHECK18-NEXT: br label [[COND_END]] 20176 // CHECK18: cond.end: 20177 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 20178 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 20179 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 20180 // CHECK18-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 20181 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 20182 // CHECK18: omp.inner.for.cond: 20183 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20184 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20185 // CHECK18-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 20186 // CHECK18-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 20187 // CHECK18: omp.inner.for.body: 20188 // CHECK18-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 20189 // CHECK18-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 20190 // CHECK18-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20191 // CHECK18-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 20192 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 20193 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 20194 // CHECK18: omp.inner.for.inc: 20195 // CHECK18-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20196 // CHECK18-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 20197 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 20198 // CHECK18-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 20199 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 20200 // CHECK18: omp.inner.for.end: 20201 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 20202 // CHECK18: omp.loop.exit: 20203 // CHECK18-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 20204 // CHECK18-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 20205 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 20206 // CHECK18-NEXT: br label [[OMP_PRECOND_END]] 20207 // CHECK18: omp.precond.end: 20208 // CHECK18-NEXT: ret void 20209 // 20210 // 20211 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..3 20212 // CHECK18-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 20213 // CHECK18-NEXT: entry: 20214 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 20215 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 20216 // CHECK18-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 20217 // CHECK18-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 20218 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 20219 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 20220 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 20221 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 20222 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 20223 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 20224 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 20225 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 20226 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 20227 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 20228 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 20229 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 20230 // CHECK18-NEXT: [[I4:%.*]] = alloca i32, align 4 20231 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 20232 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 20233 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 20234 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 20235 // CHECK18-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 20236 // CHECK18-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 20237 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 20238 // CHECK18-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 20239 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 20240 // CHECK18-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 20241 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 20242 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 20243 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 20244 // CHECK18-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 20245 // CHECK18-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 20246 // CHECK18-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 20247 // CHECK18-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 20248 // CHECK18-NEXT: store i32 0, i32* [[I]], align 4 20249 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 20250 // CHECK18-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 20251 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 20252 // CHECK18: omp.precond.then: 20253 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 20254 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20255 // CHECK18-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 20256 // CHECK18-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 20257 // CHECK18-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 20258 // CHECK18-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 20259 // CHECK18-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 20260 // CHECK18-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 20261 // CHECK18-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 20262 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 20263 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 20264 // CHECK18-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 20265 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 20266 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 20267 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 20268 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20269 // CHECK18-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 20270 // CHECK18-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 20271 // CHECK18: cond.true: 20272 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20273 // CHECK18-NEXT: br label [[COND_END:%.*]] 20274 // CHECK18: cond.false: 20275 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 20276 // CHECK18-NEXT: br label [[COND_END]] 20277 // CHECK18: cond.end: 20278 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 20279 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 20280 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 20281 // CHECK18-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 20282 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 20283 // CHECK18: omp.inner.for.cond: 20284 // CHECK18-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20285 // CHECK18-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 20286 // CHECK18-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 20287 // CHECK18-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 20288 // CHECK18: omp.inner.for.body: 20289 // CHECK18-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20290 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 20291 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 20292 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 20293 // CHECK18-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4 20294 // CHECK18-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 20295 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 20296 // CHECK18-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 20297 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 20298 // CHECK18: omp.body.continue: 20299 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 20300 // CHECK18: omp.inner.for.inc: 20301 // CHECK18-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20302 // CHECK18-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 20303 // CHECK18-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 20304 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 20305 // CHECK18: omp.inner.for.end: 20306 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 20307 // CHECK18: omp.loop.exit: 20308 // CHECK18-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 20309 // CHECK18-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 20310 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 20311 // CHECK18-NEXT: br label [[OMP_PRECOND_END]] 20312 // CHECK18: omp.precond.end: 20313 // CHECK18-NEXT: ret void 20314 // 20315 // 20316 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158 20317 // CHECK18-SAME: (i64 noundef [[M:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 20318 // CHECK18-NEXT: entry: 20319 // CHECK18-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 20320 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 20321 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 20322 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 20323 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 20324 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 20325 // CHECK18-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 20326 // CHECK18-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 20327 // CHECK18-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 20328 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 20329 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* 20330 // CHECK18-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 20331 // CHECK18-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 20332 // CHECK18-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 20333 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 20334 // CHECK18-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 20335 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 20336 // CHECK18-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 20337 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4 20338 // CHECK18-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 20339 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]]) 20340 // CHECK18-NEXT: ret void 20341 // 20342 // 20343 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..6 20344 // CHECK18-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 20345 // CHECK18-NEXT: entry: 20346 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 20347 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 20348 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 20349 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 20350 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 20351 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 20352 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 20353 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 20354 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 20355 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 20356 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 20357 // CHECK18-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 20358 // CHECK18-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 20359 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 20360 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 20361 // CHECK18-NEXT: [[I4:%.*]] = alloca i32, align 4 20362 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 20363 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 20364 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 20365 // CHECK18-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 20366 // CHECK18-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 20367 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 20368 // CHECK18-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 20369 // CHECK18-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 20370 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 20371 // CHECK18-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 20372 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 20373 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 20374 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 20375 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20376 // CHECK18-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 20377 // CHECK18-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 20378 // CHECK18-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 20379 // CHECK18-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 20380 // CHECK18-NEXT: store i32 0, i32* [[I]], align 4 20381 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20382 // CHECK18-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 20383 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 20384 // CHECK18: omp.precond.then: 20385 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 20386 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 20387 // CHECK18-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 20388 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 20389 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 20390 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[CONV]], align 4 20391 // CHECK18-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 20392 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 20393 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]]) 20394 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20395 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 20396 // CHECK18-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 20397 // CHECK18-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 20398 // CHECK18: cond.true: 20399 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 20400 // CHECK18-NEXT: br label [[COND_END:%.*]] 20401 // CHECK18: cond.false: 20402 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20403 // CHECK18-NEXT: br label [[COND_END]] 20404 // CHECK18: cond.end: 20405 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 20406 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 20407 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 20408 // CHECK18-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 20409 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 20410 // CHECK18: omp.inner.for.cond: 20411 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20412 // CHECK18-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 20413 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1 20414 // CHECK18-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]] 20415 // CHECK18-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 20416 // CHECK18: omp.inner.for.body: 20417 // CHECK18-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 20418 // CHECK18-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 20419 // CHECK18-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20420 // CHECK18-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 20421 // CHECK18-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV]], align 4 20422 // CHECK18-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 20423 // CHECK18-NEXT: store i32 [[TMP21]], i32* [[CONV7]], align 4 20424 // CHECK18-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 20425 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP22]]) 20426 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 20427 // CHECK18: omp.inner.for.inc: 20428 // CHECK18-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20429 // CHECK18-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 20430 // CHECK18-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 20431 // CHECK18-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 20432 // CHECK18-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 20433 // CHECK18-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 20434 // CHECK18-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 20435 // CHECK18-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4 20436 // CHECK18-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20437 // CHECK18-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 20438 // CHECK18-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP27]], [[TMP28]] 20439 // CHECK18-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4 20440 // CHECK18-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20441 // CHECK18-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 20442 // CHECK18-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]] 20443 // CHECK18-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]] 20444 // CHECK18: cond.true12: 20445 // CHECK18-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 20446 // CHECK18-NEXT: br label [[COND_END14:%.*]] 20447 // CHECK18: cond.false13: 20448 // CHECK18-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20449 // CHECK18-NEXT: br label [[COND_END14]] 20450 // CHECK18: cond.end14: 20451 // CHECK18-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE12]] ], [ [[TMP32]], [[COND_FALSE13]] ] 20452 // CHECK18-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4 20453 // CHECK18-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 20454 // CHECK18-NEXT: store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4 20455 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 20456 // CHECK18: omp.inner.for.end: 20457 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 20458 // CHECK18: omp.loop.exit: 20459 // CHECK18-NEXT: [[TMP34:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 20460 // CHECK18-NEXT: [[TMP35:%.*]] = load i32, i32* [[TMP34]], align 4 20461 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP35]]) 20462 // CHECK18-NEXT: br label [[OMP_PRECOND_END]] 20463 // CHECK18: omp.precond.end: 20464 // CHECK18-NEXT: ret void 20465 // 20466 // 20467 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..7 20468 // CHECK18-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 20469 // CHECK18-NEXT: entry: 20470 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 20471 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 20472 // CHECK18-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 20473 // CHECK18-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 20474 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 20475 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 20476 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 20477 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 20478 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 20479 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 20480 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 20481 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 20482 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 20483 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 20484 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 20485 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 20486 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 20487 // CHECK18-NEXT: [[I6:%.*]] = alloca i32, align 4 20488 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 20489 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 20490 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 20491 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 20492 // CHECK18-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 20493 // CHECK18-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 20494 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 20495 // CHECK18-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 20496 // CHECK18-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 20497 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 20498 // CHECK18-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 20499 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 20500 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 20501 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 20502 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20503 // CHECK18-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 20504 // CHECK18-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 20505 // CHECK18-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 20506 // CHECK18-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 20507 // CHECK18-NEXT: store i32 0, i32* [[I]], align 4 20508 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20509 // CHECK18-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 20510 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 20511 // CHECK18: omp.precond.then: 20512 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 20513 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 20514 // CHECK18-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 20515 // CHECK18-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 20516 // CHECK18-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32 20517 // CHECK18-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 20518 // CHECK18-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32 20519 // CHECK18-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 20520 // CHECK18-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 20521 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 20522 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 20523 // CHECK18-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 20524 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 20525 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 20526 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 20527 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 20528 // CHECK18-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 20529 // CHECK18-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 20530 // CHECK18: cond.true: 20531 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 20532 // CHECK18-NEXT: br label [[COND_END:%.*]] 20533 // CHECK18: cond.false: 20534 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 20535 // CHECK18-NEXT: br label [[COND_END]] 20536 // CHECK18: cond.end: 20537 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 20538 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 20539 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 20540 // CHECK18-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 20541 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 20542 // CHECK18: omp.inner.for.cond: 20543 // CHECK18-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20544 // CHECK18-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 20545 // CHECK18-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 20546 // CHECK18-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 20547 // CHECK18: omp.inner.for.body: 20548 // CHECK18-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20549 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 20550 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 20551 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I6]], align 4 20552 // CHECK18-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4 20553 // CHECK18-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 20554 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 20555 // CHECK18-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 20556 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 20557 // CHECK18: omp.body.continue: 20558 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 20559 // CHECK18: omp.inner.for.inc: 20560 // CHECK18-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20561 // CHECK18-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1 20562 // CHECK18-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 20563 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 20564 // CHECK18: omp.inner.for.end: 20565 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 20566 // CHECK18: omp.loop.exit: 20567 // CHECK18-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 20568 // CHECK18-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 20569 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 20570 // CHECK18-NEXT: br label [[OMP_PRECOND_END]] 20571 // CHECK18: omp.precond.end: 20572 // CHECK18-NEXT: ret void 20573 // 20574 // 20575 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163 20576 // CHECK18-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 20577 // CHECK18-NEXT: entry: 20578 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 20579 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 20580 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 20581 // CHECK18-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 20582 // CHECK18-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 20583 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 20584 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 20585 // CHECK18-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 20586 // CHECK18-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 20587 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 20588 // CHECK18-NEXT: ret void 20589 // 20590 // 20591 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..10 20592 // CHECK18-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 20593 // CHECK18-NEXT: entry: 20594 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 20595 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 20596 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 20597 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 20598 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 20599 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 20600 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 20601 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 20602 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 20603 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 20604 // CHECK18-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 20605 // CHECK18-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 20606 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 20607 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 20608 // CHECK18-NEXT: [[I3:%.*]] = alloca i32, align 4 20609 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 20610 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 20611 // CHECK18-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 20612 // CHECK18-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 20613 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 20614 // CHECK18-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 20615 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 20616 // CHECK18-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 20617 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 20618 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 20619 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 20620 // CHECK18-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 20621 // CHECK18-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 20622 // CHECK18-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 20623 // CHECK18-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 20624 // CHECK18-NEXT: store i32 0, i32* [[I]], align 4 20625 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 20626 // CHECK18-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 20627 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 20628 // CHECK18: omp.precond.then: 20629 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 20630 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20631 // CHECK18-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 20632 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 20633 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 20634 // CHECK18-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 20635 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 20636 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 20637 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20638 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20639 // CHECK18-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 20640 // CHECK18-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 20641 // CHECK18: cond.true: 20642 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20643 // CHECK18-NEXT: br label [[COND_END:%.*]] 20644 // CHECK18: cond.false: 20645 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20646 // CHECK18-NEXT: br label [[COND_END]] 20647 // CHECK18: cond.end: 20648 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 20649 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 20650 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 20651 // CHECK18-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 20652 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 20653 // CHECK18: omp.inner.for.cond: 20654 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20655 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20656 // CHECK18-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 20657 // CHECK18-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 20658 // CHECK18: omp.inner.for.body: 20659 // CHECK18-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 20660 // CHECK18-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 20661 // CHECK18-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20662 // CHECK18-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 20663 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 20664 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 20665 // CHECK18: omp.inner.for.inc: 20666 // CHECK18-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20667 // CHECK18-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 20668 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 20669 // CHECK18-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 20670 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 20671 // CHECK18: omp.inner.for.end: 20672 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 20673 // CHECK18: omp.loop.exit: 20674 // CHECK18-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 20675 // CHECK18-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 20676 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 20677 // CHECK18-NEXT: br label [[OMP_PRECOND_END]] 20678 // CHECK18: omp.precond.end: 20679 // CHECK18-NEXT: ret void 20680 // 20681 // 20682 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..11 20683 // CHECK18-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 20684 // CHECK18-NEXT: entry: 20685 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 20686 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 20687 // CHECK18-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 20688 // CHECK18-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 20689 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 20690 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 20691 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 20692 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 20693 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 20694 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 20695 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 20696 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 20697 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 20698 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 20699 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 20700 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 20701 // CHECK18-NEXT: [[I4:%.*]] = alloca i32, align 4 20702 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 20703 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 20704 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 20705 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 20706 // CHECK18-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 20707 // CHECK18-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 20708 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 20709 // CHECK18-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 20710 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 20711 // CHECK18-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 20712 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 20713 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 20714 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 20715 // CHECK18-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 20716 // CHECK18-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 20717 // CHECK18-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 20718 // CHECK18-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 20719 // CHECK18-NEXT: store i32 0, i32* [[I]], align 4 20720 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 20721 // CHECK18-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 20722 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 20723 // CHECK18: omp.precond.then: 20724 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 20725 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20726 // CHECK18-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 20727 // CHECK18-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 20728 // CHECK18-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 20729 // CHECK18-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 20730 // CHECK18-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 20731 // CHECK18-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 20732 // CHECK18-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 20733 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 20734 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 20735 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 20736 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 20737 // CHECK18-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 20738 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 20739 // CHECK18-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1) 20740 // CHECK18-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 20741 // CHECK18: omp.dispatch.cond: 20742 // CHECK18-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 20743 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 20744 // CHECK18-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 20745 // CHECK18-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 20746 // CHECK18-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 20747 // CHECK18: omp.dispatch.body: 20748 // CHECK18-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 20749 // CHECK18-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 20750 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 20751 // CHECK18: omp.inner.for.cond: 20752 // CHECK18-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 20753 // CHECK18-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15 20754 // CHECK18-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 20755 // CHECK18-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 20756 // CHECK18: omp.inner.for.body: 20757 // CHECK18-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 20758 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 20759 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 20760 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !15 20761 // CHECK18-NEXT: [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !15 20762 // CHECK18-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64 20763 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 20764 // CHECK18-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15 20765 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 20766 // CHECK18: omp.body.continue: 20767 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 20768 // CHECK18: omp.inner.for.inc: 20769 // CHECK18-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 20770 // CHECK18-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1 20771 // CHECK18-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 20772 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 20773 // CHECK18: omp.inner.for.end: 20774 // CHECK18-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 20775 // CHECK18: omp.dispatch.inc: 20776 // CHECK18-NEXT: br label [[OMP_DISPATCH_COND]] 20777 // CHECK18: omp.dispatch.end: 20778 // CHECK18-NEXT: br label [[OMP_PRECOND_END]] 20779 // CHECK18: omp.precond.end: 20780 // CHECK18-NEXT: ret void 20781 // 20782 // 20783 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168 20784 // CHECK18-SAME: (i64 noundef [[M:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 20785 // CHECK18-NEXT: entry: 20786 // CHECK18-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 20787 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 20788 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 20789 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 20790 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 20791 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 20792 // CHECK18-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 20793 // CHECK18-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 20794 // CHECK18-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 20795 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 20796 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* 20797 // CHECK18-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 20798 // CHECK18-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 20799 // CHECK18-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 20800 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 20801 // CHECK18-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 20802 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 20803 // CHECK18-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 20804 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4 20805 // CHECK18-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 20806 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]]) 20807 // CHECK18-NEXT: ret void 20808 // 20809 // 20810 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..14 20811 // CHECK18-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 20812 // CHECK18-NEXT: entry: 20813 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 20814 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 20815 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 20816 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 20817 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 20818 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 20819 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 20820 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 20821 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 20822 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 20823 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 20824 // CHECK18-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 20825 // CHECK18-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 20826 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 20827 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 20828 // CHECK18-NEXT: [[I4:%.*]] = alloca i32, align 4 20829 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 20830 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 20831 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 20832 // CHECK18-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 20833 // CHECK18-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 20834 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 20835 // CHECK18-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 20836 // CHECK18-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 20837 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 20838 // CHECK18-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 20839 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 20840 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 20841 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 20842 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20843 // CHECK18-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 20844 // CHECK18-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 20845 // CHECK18-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 20846 // CHECK18-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 20847 // CHECK18-NEXT: store i32 0, i32* [[I]], align 4 20848 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20849 // CHECK18-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 20850 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 20851 // CHECK18: omp.precond.then: 20852 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 20853 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 20854 // CHECK18-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 20855 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 20856 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 20857 // CHECK18-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 20858 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 20859 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 20860 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20861 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 20862 // CHECK18-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 20863 // CHECK18-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 20864 // CHECK18: cond.true: 20865 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 20866 // CHECK18-NEXT: br label [[COND_END:%.*]] 20867 // CHECK18: cond.false: 20868 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20869 // CHECK18-NEXT: br label [[COND_END]] 20870 // CHECK18: cond.end: 20871 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 20872 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 20873 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 20874 // CHECK18-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 20875 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 20876 // CHECK18: omp.inner.for.cond: 20877 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20878 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20879 // CHECK18-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 20880 // CHECK18-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 20881 // CHECK18: omp.inner.for.body: 20882 // CHECK18-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 20883 // CHECK18-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 20884 // CHECK18-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20885 // CHECK18-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 20886 // CHECK18-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV]], align 4 20887 // CHECK18-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 20888 // CHECK18-NEXT: store i32 [[TMP20]], i32* [[CONV7]], align 4 20889 // CHECK18-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 20890 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP21]]) 20891 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 20892 // CHECK18: omp.inner.for.inc: 20893 // CHECK18-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20894 // CHECK18-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 20895 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 20896 // CHECK18-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 20897 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 20898 // CHECK18: omp.inner.for.end: 20899 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 20900 // CHECK18: omp.loop.exit: 20901 // CHECK18-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 20902 // CHECK18-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 20903 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) 20904 // CHECK18-NEXT: br label [[OMP_PRECOND_END]] 20905 // CHECK18: omp.precond.end: 20906 // CHECK18-NEXT: ret void 20907 // 20908 // 20909 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..15 20910 // CHECK18-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 20911 // CHECK18-NEXT: entry: 20912 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 20913 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 20914 // CHECK18-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 20915 // CHECK18-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 20916 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 20917 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 20918 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 20919 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 20920 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 20921 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 20922 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 20923 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 20924 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 20925 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 20926 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 20927 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 20928 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 20929 // CHECK18-NEXT: [[I6:%.*]] = alloca i32, align 4 20930 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 20931 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 20932 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 20933 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 20934 // CHECK18-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 20935 // CHECK18-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 20936 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 20937 // CHECK18-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 20938 // CHECK18-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 20939 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 20940 // CHECK18-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 20941 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 20942 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 20943 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 20944 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20945 // CHECK18-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 20946 // CHECK18-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 20947 // CHECK18-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 20948 // CHECK18-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 20949 // CHECK18-NEXT: store i32 0, i32* [[I]], align 4 20950 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20951 // CHECK18-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 20952 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 20953 // CHECK18: omp.precond.then: 20954 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 20955 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 20956 // CHECK18-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 20957 // CHECK18-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 20958 // CHECK18-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32 20959 // CHECK18-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 20960 // CHECK18-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32 20961 // CHECK18-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 20962 // CHECK18-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 20963 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 20964 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 20965 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 4 20966 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 20967 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 20968 // CHECK18-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 20969 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 20970 // CHECK18-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]]) 20971 // CHECK18-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 20972 // CHECK18: omp.dispatch.cond: 20973 // CHECK18-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 20974 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 20975 // CHECK18-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 20976 // CHECK18-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 20977 // CHECK18-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 20978 // CHECK18: omp.dispatch.body: 20979 // CHECK18-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 20980 // CHECK18-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 20981 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 20982 // CHECK18: omp.inner.for.cond: 20983 // CHECK18-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 20984 // CHECK18-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18 20985 // CHECK18-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 20986 // CHECK18-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 20987 // CHECK18: omp.inner.for.body: 20988 // CHECK18-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 20989 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 20990 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 20991 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !18 20992 // CHECK18-NEXT: [[TMP21:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !18 20993 // CHECK18-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 20994 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 20995 // CHECK18-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18 20996 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 20997 // CHECK18: omp.body.continue: 20998 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 20999 // CHECK18: omp.inner.for.inc: 21000 // CHECK18-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 21001 // CHECK18-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], 1 21002 // CHECK18-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 21003 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]] 21004 // CHECK18: omp.inner.for.end: 21005 // CHECK18-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 21006 // CHECK18: omp.dispatch.inc: 21007 // CHECK18-NEXT: br label [[OMP_DISPATCH_COND]] 21008 // CHECK18: omp.dispatch.end: 21009 // CHECK18-NEXT: br label [[OMP_PRECOND_END]] 21010 // CHECK18: omp.precond.end: 21011 // CHECK18-NEXT: ret void 21012 // 21013 // 21014 // CHECK18-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 21015 // CHECK18-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 21016 // CHECK18-NEXT: entry: 21017 // CHECK18-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 21018 // CHECK18-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 21019 // CHECK18-NEXT: [[M:%.*]] = alloca i32, align 4 21020 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 21021 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 21022 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 21023 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 21024 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8 21025 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8 21026 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8 21027 // CHECK18-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 21028 // CHECK18-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 21029 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 8 21030 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 8 21031 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 8 21032 // CHECK18-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 21033 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 8 21034 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 8 21035 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 8 21036 // CHECK18-NEXT: [[_TMP16:%.*]] = alloca i32, align 4 21037 // CHECK18-NEXT: [[M_CASTED19:%.*]] = alloca i64, align 8 21038 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [2 x i8*], align 8 21039 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS22:%.*]] = alloca [2 x i8*], align 8 21040 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [2 x i8*], align 8 21041 // CHECK18-NEXT: [[_TMP24:%.*]] = alloca i32, align 4 21042 // CHECK18-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 21043 // CHECK18-NEXT: store i32 10, i32* [[M]], align 4 21044 // CHECK18-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 21045 // CHECK18-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 21046 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8 21047 // CHECK18-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 21048 // CHECK18-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 21049 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8 21050 // CHECK18-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 21051 // CHECK18-NEXT: store i8* null, i8** [[TMP4]], align 8 21052 // CHECK18-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 21053 // CHECK18-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 21054 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 21055 // CHECK18-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.20, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.21, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 21056 // CHECK18-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 21057 // CHECK18-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 21058 // CHECK18: omp_offload.failed: 21059 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]] 21060 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT]] 21061 // CHECK18: omp_offload.cont: 21062 // CHECK18-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 21063 // CHECK18-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** 21064 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8 21065 // CHECK18-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 21066 // CHECK18-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** 21067 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8 21068 // CHECK18-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0 21069 // CHECK18-NEXT: store i8* null, i8** [[TMP13]], align 8 21070 // CHECK18-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 21071 // CHECK18-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 21072 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 21073 // CHECK18-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.24, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.25, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 21074 // CHECK18-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 21075 // CHECK18-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 21076 // CHECK18: omp_offload.failed5: 21077 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121([10 x i32]* [[A]]) #[[ATTR3]] 21078 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT6]] 21079 // CHECK18: omp_offload.cont6: 21080 // CHECK18-NEXT: [[TMP18:%.*]] = load i32, i32* [[M]], align 4 21081 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[M_CASTED]] to i32* 21082 // CHECK18-NEXT: store i32 [[TMP18]], i32* [[CONV]], align 4 21083 // CHECK18-NEXT: [[TMP19:%.*]] = load i64, i64* [[M_CASTED]], align 8 21084 // CHECK18-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 21085 // CHECK18-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64* 21086 // CHECK18-NEXT: store i64 [[TMP19]], i64* [[TMP21]], align 8 21087 // CHECK18-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 21088 // CHECK18-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64* 21089 // CHECK18-NEXT: store i64 [[TMP19]], i64* [[TMP23]], align 8 21090 // CHECK18-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0 21091 // CHECK18-NEXT: store i8* null, i8** [[TMP24]], align 8 21092 // CHECK18-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1 21093 // CHECK18-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]** 21094 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 8 21095 // CHECK18-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1 21096 // CHECK18-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]** 21097 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 8 21098 // CHECK18-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 1 21099 // CHECK18-NEXT: store i8* null, i8** [[TMP29]], align 8 21100 // CHECK18-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 21101 // CHECK18-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 21102 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 21103 // CHECK18-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.28, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.29, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 21104 // CHECK18-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 21105 // CHECK18-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] 21106 // CHECK18: omp_offload.failed11: 21107 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i64 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]] 21108 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT12]] 21109 // CHECK18: omp_offload.cont12: 21110 // CHECK18-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 21111 // CHECK18-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]** 21112 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 8 21113 // CHECK18-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 21114 // CHECK18-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]** 21115 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 8 21116 // CHECK18-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i64 0, i64 0 21117 // CHECK18-NEXT: store i8* null, i8** [[TMP38]], align 8 21118 // CHECK18-NEXT: [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 21119 // CHECK18-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 21120 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 21121 // CHECK18-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.32, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.33, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 21122 // CHECK18-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0 21123 // CHECK18-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]] 21124 // CHECK18: omp_offload.failed17: 21125 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131([10 x i32]* [[A]]) #[[ATTR3]] 21126 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT18]] 21127 // CHECK18: omp_offload.cont18: 21128 // CHECK18-NEXT: [[TMP43:%.*]] = load i32, i32* [[M]], align 4 21129 // CHECK18-NEXT: [[CONV20:%.*]] = bitcast i64* [[M_CASTED19]] to i32* 21130 // CHECK18-NEXT: store i32 [[TMP43]], i32* [[CONV20]], align 4 21131 // CHECK18-NEXT: [[TMP44:%.*]] = load i64, i64* [[M_CASTED19]], align 8 21132 // CHECK18-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 21133 // CHECK18-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64* 21134 // CHECK18-NEXT: store i64 [[TMP44]], i64* [[TMP46]], align 8 21135 // CHECK18-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 21136 // CHECK18-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64* 21137 // CHECK18-NEXT: store i64 [[TMP44]], i64* [[TMP48]], align 8 21138 // CHECK18-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0 21139 // CHECK18-NEXT: store i8* null, i8** [[TMP49]], align 8 21140 // CHECK18-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1 21141 // CHECK18-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]** 21142 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 8 21143 // CHECK18-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1 21144 // CHECK18-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]** 21145 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 8 21146 // CHECK18-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1 21147 // CHECK18-NEXT: store i8* null, i8** [[TMP54]], align 8 21148 // CHECK18-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 21149 // CHECK18-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 21150 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 21151 // CHECK18-NEXT: [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.36, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.37, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 21152 // CHECK18-NEXT: [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0 21153 // CHECK18-NEXT: br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED25:%.*]], label [[OMP_OFFLOAD_CONT26:%.*]] 21154 // CHECK18: omp_offload.failed25: 21155 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i64 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]] 21156 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT26]] 21157 // CHECK18: omp_offload.cont26: 21158 // CHECK18-NEXT: ret i32 0 21159 // 21160 // 21161 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116 21162 // CHECK18-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 21163 // CHECK18-NEXT: entry: 21164 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 21165 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 21166 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 21167 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 21168 // CHECK18-NEXT: ret void 21169 // 21170 // 21171 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..18 21172 // CHECK18-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 21173 // CHECK18-NEXT: entry: 21174 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 21175 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 21176 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 21177 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 21178 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 21179 // CHECK18-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 21180 // CHECK18-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 21181 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 21182 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 21183 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 21184 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 21185 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 21186 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 21187 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 21188 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 21189 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 21190 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 21191 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 21192 // CHECK18-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 21193 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 21194 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 21195 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21196 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 21197 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 21198 // CHECK18: cond.true: 21199 // CHECK18-NEXT: br label [[COND_END:%.*]] 21200 // CHECK18: cond.false: 21201 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21202 // CHECK18-NEXT: br label [[COND_END]] 21203 // CHECK18: cond.end: 21204 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 21205 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 21206 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 21207 // CHECK18-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 21208 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 21209 // CHECK18: omp.inner.for.cond: 21210 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21211 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21212 // CHECK18-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 21213 // CHECK18-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 21214 // CHECK18: omp.inner.for.body: 21215 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 21216 // CHECK18-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 21217 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21218 // CHECK18-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 21219 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..19 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]) 21220 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 21221 // CHECK18: omp.inner.for.inc: 21222 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21223 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 21224 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 21225 // CHECK18-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 21226 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 21227 // CHECK18: omp.inner.for.end: 21228 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 21229 // CHECK18: omp.loop.exit: 21230 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 21231 // CHECK18-NEXT: ret void 21232 // 21233 // 21234 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..19 21235 // CHECK18-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 21236 // CHECK18-NEXT: entry: 21237 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 21238 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 21239 // CHECK18-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 21240 // CHECK18-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 21241 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 21242 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 21243 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 21244 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 21245 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 21246 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 21247 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 21248 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 21249 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 21250 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 21251 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 21252 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 21253 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 21254 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 21255 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 21256 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 21257 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 21258 // CHECK18-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 21259 // CHECK18-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 21260 // CHECK18-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 21261 // CHECK18-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 21262 // CHECK18-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 21263 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 21264 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 21265 // CHECK18-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 21266 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 21267 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 21268 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 21269 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 21270 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 21271 // CHECK18: cond.true: 21272 // CHECK18-NEXT: br label [[COND_END:%.*]] 21273 // CHECK18: cond.false: 21274 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 21275 // CHECK18-NEXT: br label [[COND_END]] 21276 // CHECK18: cond.end: 21277 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 21278 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 21279 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 21280 // CHECK18-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 21281 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 21282 // CHECK18: omp.inner.for.cond: 21283 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21284 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 21285 // CHECK18-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 21286 // CHECK18-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 21287 // CHECK18: omp.inner.for.body: 21288 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21289 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 21290 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 21291 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I]], align 4 21292 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 21293 // CHECK18-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 21294 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 21295 // CHECK18-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 21296 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 21297 // CHECK18: omp.body.continue: 21298 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 21299 // CHECK18: omp.inner.for.inc: 21300 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21301 // CHECK18-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 21302 // CHECK18-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 21303 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 21304 // CHECK18: omp.inner.for.end: 21305 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 21306 // CHECK18: omp.loop.exit: 21307 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 21308 // CHECK18-NEXT: ret void 21309 // 21310 // 21311 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121 21312 // CHECK18-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 21313 // CHECK18-NEXT: entry: 21314 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 21315 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 21316 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 21317 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..22 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 21318 // CHECK18-NEXT: ret void 21319 // 21320 // 21321 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..22 21322 // CHECK18-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 21323 // CHECK18-NEXT: entry: 21324 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 21325 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 21326 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 21327 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 21328 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 21329 // CHECK18-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 21330 // CHECK18-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 21331 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 21332 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 21333 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 21334 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 21335 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 21336 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 21337 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 21338 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 21339 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 21340 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 21341 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 21342 // CHECK18-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 21343 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 21344 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 21345 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21346 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 21347 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 21348 // CHECK18: cond.true: 21349 // CHECK18-NEXT: br label [[COND_END:%.*]] 21350 // CHECK18: cond.false: 21351 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21352 // CHECK18-NEXT: br label [[COND_END]] 21353 // CHECK18: cond.end: 21354 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 21355 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 21356 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 21357 // CHECK18-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 21358 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 21359 // CHECK18: omp.inner.for.cond: 21360 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21361 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21362 // CHECK18-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 21363 // CHECK18-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 21364 // CHECK18: omp.inner.for.body: 21365 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 21366 // CHECK18-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 21367 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21368 // CHECK18-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 21369 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..23 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]) 21370 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 21371 // CHECK18: omp.inner.for.inc: 21372 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21373 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 21374 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 21375 // CHECK18-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 21376 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 21377 // CHECK18: omp.inner.for.end: 21378 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 21379 // CHECK18: omp.loop.exit: 21380 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 21381 // CHECK18-NEXT: ret void 21382 // 21383 // 21384 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..23 21385 // CHECK18-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 21386 // CHECK18-NEXT: entry: 21387 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 21388 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 21389 // CHECK18-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 21390 // CHECK18-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 21391 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 21392 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 21393 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 21394 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 21395 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 21396 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 21397 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 21398 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 21399 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 21400 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 21401 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 21402 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 21403 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 21404 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 21405 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 21406 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 21407 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 21408 // CHECK18-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 21409 // CHECK18-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 21410 // CHECK18-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 21411 // CHECK18-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 21412 // CHECK18-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 21413 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 21414 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 21415 // CHECK18-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 21416 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 21417 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 21418 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 21419 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 21420 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 21421 // CHECK18: cond.true: 21422 // CHECK18-NEXT: br label [[COND_END:%.*]] 21423 // CHECK18: cond.false: 21424 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 21425 // CHECK18-NEXT: br label [[COND_END]] 21426 // CHECK18: cond.end: 21427 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 21428 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 21429 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 21430 // CHECK18-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 21431 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 21432 // CHECK18: omp.inner.for.cond: 21433 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21434 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 21435 // CHECK18-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 21436 // CHECK18-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 21437 // CHECK18: omp.inner.for.body: 21438 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21439 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 21440 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 21441 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I]], align 4 21442 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 21443 // CHECK18-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 21444 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 21445 // CHECK18-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 21446 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 21447 // CHECK18: omp.body.continue: 21448 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 21449 // CHECK18: omp.inner.for.inc: 21450 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21451 // CHECK18-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 21452 // CHECK18-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 21453 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 21454 // CHECK18: omp.inner.for.end: 21455 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 21456 // CHECK18: omp.loop.exit: 21457 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 21458 // CHECK18-NEXT: ret void 21459 // 21460 // 21461 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126 21462 // CHECK18-SAME: (i64 noundef [[M:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 21463 // CHECK18-NEXT: entry: 21464 // CHECK18-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 21465 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 21466 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 21467 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 21468 // CHECK18-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 21469 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 21470 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* 21471 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 21472 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 21473 // CHECK18-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 21474 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 21475 // CHECK18-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 21476 // CHECK18-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 21477 // CHECK18-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 21478 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..26 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]]) 21479 // CHECK18-NEXT: ret void 21480 // 21481 // 21482 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..26 21483 // CHECK18-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 21484 // CHECK18-NEXT: entry: 21485 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 21486 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 21487 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 21488 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 21489 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 21490 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 21491 // CHECK18-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 21492 // CHECK18-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 21493 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 21494 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 21495 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 21496 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 21497 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 21498 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 21499 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 21500 // CHECK18-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 21501 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 21502 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 21503 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 21504 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 21505 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 21506 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 21507 // CHECK18-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 21508 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 21509 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 21510 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21511 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 21512 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 21513 // CHECK18: cond.true: 21514 // CHECK18-NEXT: br label [[COND_END:%.*]] 21515 // CHECK18: cond.false: 21516 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21517 // CHECK18-NEXT: br label [[COND_END]] 21518 // CHECK18: cond.end: 21519 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 21520 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 21521 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 21522 // CHECK18-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 21523 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 21524 // CHECK18: omp.inner.for.cond: 21525 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21526 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21527 // CHECK18-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 21528 // CHECK18-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 21529 // CHECK18: omp.inner.for.body: 21530 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 21531 // CHECK18-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 21532 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21533 // CHECK18-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 21534 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 4 21535 // CHECK18-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 21536 // CHECK18-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4 21537 // CHECK18-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 21538 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..27 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]]) 21539 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 21540 // CHECK18: omp.inner.for.inc: 21541 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21542 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 21543 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 21544 // CHECK18-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 21545 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 21546 // CHECK18: omp.inner.for.end: 21547 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 21548 // CHECK18: omp.loop.exit: 21549 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 21550 // CHECK18-NEXT: ret void 21551 // 21552 // 21553 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..27 21554 // CHECK18-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 21555 // CHECK18-NEXT: entry: 21556 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 21557 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 21558 // CHECK18-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 21559 // CHECK18-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 21560 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 21561 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 21562 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 21563 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 21564 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 21565 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 21566 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 21567 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 21568 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 21569 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 21570 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 21571 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 21572 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 21573 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 21574 // CHECK18-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 21575 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 21576 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 21577 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 21578 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 21579 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 21580 // CHECK18-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 21581 // CHECK18-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 21582 // CHECK18-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 21583 // CHECK18-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4 21584 // CHECK18-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 21585 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 21586 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 21587 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4 21588 // CHECK18-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 21589 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 21590 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]]) 21591 // CHECK18-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 21592 // CHECK18: omp.dispatch.cond: 21593 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 21594 // CHECK18-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 21595 // CHECK18-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 21596 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]] 21597 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 21598 // CHECK18: cond.true: 21599 // CHECK18-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 21600 // CHECK18-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 21601 // CHECK18-NEXT: br label [[COND_END:%.*]] 21602 // CHECK18: cond.false: 21603 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 21604 // CHECK18-NEXT: br label [[COND_END]] 21605 // CHECK18: cond.end: 21606 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 21607 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 21608 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 21609 // CHECK18-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 21610 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21611 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 21612 // CHECK18-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 21613 // CHECK18-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 21614 // CHECK18: omp.dispatch.body: 21615 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 21616 // CHECK18: omp.inner.for.cond: 21617 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21618 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 21619 // CHECK18-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 21620 // CHECK18-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 21621 // CHECK18: omp.inner.for.body: 21622 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21623 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 21624 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 21625 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I]], align 4 21626 // CHECK18-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4 21627 // CHECK18-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 21628 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 21629 // CHECK18-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 21630 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 21631 // CHECK18: omp.body.continue: 21632 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 21633 // CHECK18: omp.inner.for.inc: 21634 // CHECK18-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21635 // CHECK18-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1 21636 // CHECK18-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 21637 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 21638 // CHECK18: omp.inner.for.end: 21639 // CHECK18-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 21640 // CHECK18: omp.dispatch.inc: 21641 // CHECK18-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 21642 // CHECK18-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 21643 // CHECK18-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 21644 // CHECK18-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 21645 // CHECK18-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 21646 // CHECK18-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 21647 // CHECK18-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 21648 // CHECK18-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 21649 // CHECK18-NEXT: br label [[OMP_DISPATCH_COND]] 21650 // CHECK18: omp.dispatch.end: 21651 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 21652 // CHECK18-NEXT: ret void 21653 // 21654 // 21655 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131 21656 // CHECK18-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 21657 // CHECK18-NEXT: entry: 21658 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 21659 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 21660 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 21661 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..30 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 21662 // CHECK18-NEXT: ret void 21663 // 21664 // 21665 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..30 21666 // CHECK18-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 21667 // CHECK18-NEXT: entry: 21668 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 21669 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 21670 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 21671 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 21672 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 21673 // CHECK18-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 21674 // CHECK18-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 21675 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 21676 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 21677 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 21678 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 21679 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 21680 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 21681 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 21682 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 21683 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 21684 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 21685 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 21686 // CHECK18-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 21687 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 21688 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 21689 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21690 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 21691 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 21692 // CHECK18: cond.true: 21693 // CHECK18-NEXT: br label [[COND_END:%.*]] 21694 // CHECK18: cond.false: 21695 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21696 // CHECK18-NEXT: br label [[COND_END]] 21697 // CHECK18: cond.end: 21698 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 21699 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 21700 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 21701 // CHECK18-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 21702 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 21703 // CHECK18: omp.inner.for.cond: 21704 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21705 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21706 // CHECK18-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 21707 // CHECK18-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 21708 // CHECK18: omp.inner.for.body: 21709 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 21710 // CHECK18-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 21711 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21712 // CHECK18-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 21713 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..31 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]) 21714 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 21715 // CHECK18: omp.inner.for.inc: 21716 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21717 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 21718 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 21719 // CHECK18-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 21720 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 21721 // CHECK18: omp.inner.for.end: 21722 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 21723 // CHECK18: omp.loop.exit: 21724 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 21725 // CHECK18-NEXT: ret void 21726 // 21727 // 21728 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..31 21729 // CHECK18-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 21730 // CHECK18-NEXT: entry: 21731 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 21732 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 21733 // CHECK18-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 21734 // CHECK18-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 21735 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 21736 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 21737 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 21738 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 21739 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 21740 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 21741 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 21742 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 21743 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 21744 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 21745 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 21746 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 21747 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 21748 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 21749 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 21750 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 21751 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 21752 // CHECK18-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 21753 // CHECK18-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 21754 // CHECK18-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 21755 // CHECK18-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 21756 // CHECK18-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 21757 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 21758 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 21759 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 21760 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 21761 // CHECK18-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 21762 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 21763 // CHECK18-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 21764 // CHECK18-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 21765 // CHECK18: omp.dispatch.cond: 21766 // CHECK18-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 21767 // CHECK18-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 21768 // CHECK18-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 21769 // CHECK18: omp.dispatch.body: 21770 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 21771 // CHECK18-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 21772 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 21773 // CHECK18: omp.inner.for.cond: 21774 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 21775 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21 21776 // CHECK18-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 21777 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 21778 // CHECK18: omp.inner.for.body: 21779 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 21780 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 21781 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 21782 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21 21783 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21 21784 // CHECK18-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 21785 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 21786 // CHECK18-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21 21787 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 21788 // CHECK18: omp.body.continue: 21789 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 21790 // CHECK18: omp.inner.for.inc: 21791 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 21792 // CHECK18-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 21793 // CHECK18-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 21794 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]] 21795 // CHECK18: omp.inner.for.end: 21796 // CHECK18-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 21797 // CHECK18: omp.dispatch.inc: 21798 // CHECK18-NEXT: br label [[OMP_DISPATCH_COND]] 21799 // CHECK18: omp.dispatch.end: 21800 // CHECK18-NEXT: ret void 21801 // 21802 // 21803 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136 21804 // CHECK18-SAME: (i64 noundef [[M:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 21805 // CHECK18-NEXT: entry: 21806 // CHECK18-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 21807 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 21808 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 21809 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 21810 // CHECK18-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 21811 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 21812 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* 21813 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 21814 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 21815 // CHECK18-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 21816 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 21817 // CHECK18-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 21818 // CHECK18-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 21819 // CHECK18-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 21820 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..34 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]]) 21821 // CHECK18-NEXT: ret void 21822 // 21823 // 21824 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..34 21825 // CHECK18-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 21826 // CHECK18-NEXT: entry: 21827 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 21828 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 21829 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 21830 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 21831 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 21832 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 21833 // CHECK18-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 21834 // CHECK18-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 21835 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 21836 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 21837 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 21838 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 21839 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 21840 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 21841 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 21842 // CHECK18-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 21843 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 21844 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 21845 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 21846 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 21847 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 21848 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 21849 // CHECK18-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 21850 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 21851 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 21852 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21853 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 21854 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 21855 // CHECK18: cond.true: 21856 // CHECK18-NEXT: br label [[COND_END:%.*]] 21857 // CHECK18: cond.false: 21858 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21859 // CHECK18-NEXT: br label [[COND_END]] 21860 // CHECK18: cond.end: 21861 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 21862 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 21863 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 21864 // CHECK18-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 21865 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 21866 // CHECK18: omp.inner.for.cond: 21867 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21868 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21869 // CHECK18-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 21870 // CHECK18-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 21871 // CHECK18: omp.inner.for.body: 21872 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 21873 // CHECK18-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 21874 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21875 // CHECK18-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 21876 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 4 21877 // CHECK18-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 21878 // CHECK18-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4 21879 // CHECK18-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 21880 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..35 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]]) 21881 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 21882 // CHECK18: omp.inner.for.inc: 21883 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21884 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 21885 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 21886 // CHECK18-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 21887 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 21888 // CHECK18: omp.inner.for.end: 21889 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 21890 // CHECK18: omp.loop.exit: 21891 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 21892 // CHECK18-NEXT: ret void 21893 // 21894 // 21895 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..35 21896 // CHECK18-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 21897 // CHECK18-NEXT: entry: 21898 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 21899 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 21900 // CHECK18-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 21901 // CHECK18-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 21902 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 21903 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 21904 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 21905 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 21906 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 21907 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 21908 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 21909 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 21910 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 21911 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 21912 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 21913 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 21914 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 21915 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 21916 // CHECK18-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 21917 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 21918 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 21919 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 21920 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 21921 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 21922 // CHECK18-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 21923 // CHECK18-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 21924 // CHECK18-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 21925 // CHECK18-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4 21926 // CHECK18-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 21927 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 21928 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 21929 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4 21930 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 21931 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 21932 // CHECK18-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 21933 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 21934 // CHECK18-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]]) 21935 // CHECK18-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 21936 // CHECK18: omp.dispatch.cond: 21937 // CHECK18-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 21938 // CHECK18-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0 21939 // CHECK18-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 21940 // CHECK18: omp.dispatch.body: 21941 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 21942 // CHECK18-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 21943 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 21944 // CHECK18: omp.inner.for.cond: 21945 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 21946 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !24 21947 // CHECK18-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 21948 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 21949 // CHECK18: omp.inner.for.body: 21950 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 21951 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 21952 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 21953 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !24 21954 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !24 21955 // CHECK18-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 21956 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 21957 // CHECK18-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !24 21958 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 21959 // CHECK18: omp.body.continue: 21960 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 21961 // CHECK18: omp.inner.for.inc: 21962 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 21963 // CHECK18-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1 21964 // CHECK18-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 21965 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]] 21966 // CHECK18: omp.inner.for.end: 21967 // CHECK18-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 21968 // CHECK18: omp.dispatch.inc: 21969 // CHECK18-NEXT: br label [[OMP_DISPATCH_COND]] 21970 // CHECK18: omp.dispatch.end: 21971 // CHECK18-NEXT: ret void 21972 // 21973 // 21974 // CHECK18-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 21975 // CHECK18-SAME: () #[[ATTR6:[0-9]+]] { 21976 // CHECK18-NEXT: entry: 21977 // CHECK18-NEXT: call void @__tgt_register_requires(i64 1) 21978 // CHECK18-NEXT: ret void 21979 // 21980 // 21981 // CHECK19-LABEL: define {{[^@]+}}@main 21982 // CHECK19-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 21983 // CHECK19-NEXT: entry: 21984 // CHECK19-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 21985 // CHECK19-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 21986 // CHECK19-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 21987 // CHECK19-NEXT: [[N:%.*]] = alloca i32, align 4 21988 // CHECK19-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 21989 // CHECK19-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 21990 // CHECK19-NEXT: [[M:%.*]] = alloca i32, align 4 21991 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 21992 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 21993 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 21994 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 21995 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4 21996 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 21997 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 21998 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 21999 // CHECK19-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4 22000 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4 22001 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4 22002 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4 22003 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4 22004 // CHECK19-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 22005 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 22006 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 22007 // CHECK19-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4 22008 // CHECK19-NEXT: [[N_CASTED17:%.*]] = alloca i32, align 4 22009 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS18:%.*]] = alloca [4 x i8*], align 4 22010 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS19:%.*]] = alloca [4 x i8*], align 4 22011 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS20:%.*]] = alloca [4 x i8*], align 4 22012 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES21:%.*]] = alloca [4 x i64], align 4 22013 // CHECK19-NEXT: [[_TMP22:%.*]] = alloca i32, align 4 22014 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_23:%.*]] = alloca i32, align 4 22015 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4 22016 // CHECK19-NEXT: [[N_CASTED31:%.*]] = alloca i32, align 4 22017 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS32:%.*]] = alloca [3 x i8*], align 4 22018 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS33:%.*]] = alloca [3 x i8*], align 4 22019 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS34:%.*]] = alloca [3 x i8*], align 4 22020 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES35:%.*]] = alloca [3 x i64], align 4 22021 // CHECK19-NEXT: [[_TMP36:%.*]] = alloca i32, align 4 22022 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_37:%.*]] = alloca i32, align 4 22023 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4 22024 // CHECK19-NEXT: [[M_CASTED45:%.*]] = alloca i32, align 4 22025 // CHECK19-NEXT: [[N_CASTED46:%.*]] = alloca i32, align 4 22026 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS47:%.*]] = alloca [4 x i8*], align 4 22027 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS48:%.*]] = alloca [4 x i8*], align 4 22028 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS49:%.*]] = alloca [4 x i8*], align 4 22029 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES50:%.*]] = alloca [4 x i64], align 4 22030 // CHECK19-NEXT: [[_TMP51:%.*]] = alloca i32, align 4 22031 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_52:%.*]] = alloca i32, align 4 22032 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_53:%.*]] = alloca i32, align 4 22033 // CHECK19-NEXT: store i32 0, i32* [[RETVAL]], align 4 22034 // CHECK19-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 22035 // CHECK19-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 22036 // CHECK19-NEXT: store i32 100, i32* [[N]], align 4 22037 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 22038 // CHECK19-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 22039 // CHECK19-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 22040 // CHECK19-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 22041 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 22042 // CHECK19-NEXT: store i32 10, i32* [[M]], align 4 22043 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 22044 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 22045 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 22046 // CHECK19-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4 22047 // CHECK19-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64 22048 // CHECK19-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 22049 // CHECK19-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes to i8*), i32 24, i1 false) 22050 // CHECK19-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 22051 // CHECK19-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 22052 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4 22053 // CHECK19-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 22054 // CHECK19-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 22055 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 22056 // CHECK19-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 22057 // CHECK19-NEXT: store i8* null, i8** [[TMP11]], align 4 22058 // CHECK19-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 22059 // CHECK19-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 22060 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4 22061 // CHECK19-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 22062 // CHECK19-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 22063 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4 22064 // CHECK19-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 22065 // CHECK19-NEXT: store i8* null, i8** [[TMP16]], align 4 22066 // CHECK19-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 22067 // CHECK19-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 22068 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 4 22069 // CHECK19-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 22070 // CHECK19-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 22071 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 4 22072 // CHECK19-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 22073 // CHECK19-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 4 22074 // CHECK19-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 22075 // CHECK19-NEXT: store i8* null, i8** [[TMP22]], align 4 22076 // CHECK19-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 22077 // CHECK19-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 22078 // CHECK19-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 22079 // CHECK19-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 22080 // CHECK19-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 22081 // CHECK19-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 22082 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 22083 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 22084 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 22085 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 22086 // CHECK19-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22087 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 22088 // CHECK19-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 22089 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP29]]) 22090 // CHECK19-NEXT: [[TMP30:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, i32 3, i8** [[TMP23]], i8** [[TMP24]], i64* [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 22091 // CHECK19-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 22092 // CHECK19-NEXT: br i1 [[TMP31]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 22093 // CHECK19: omp_offload.failed: 22094 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 22095 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]] 22096 // CHECK19: omp_offload.cont: 22097 // CHECK19-NEXT: [[TMP32:%.*]] = load i32, i32* [[N]], align 4 22098 // CHECK19-NEXT: store i32 [[TMP32]], i32* [[N_CASTED3]], align 4 22099 // CHECK19-NEXT: [[TMP33:%.*]] = load i32, i32* [[N_CASTED3]], align 4 22100 // CHECK19-NEXT: [[TMP34:%.*]] = mul nuw i32 [[TMP0]], 4 22101 // CHECK19-NEXT: [[TMP35:%.*]] = sext i32 [[TMP34]] to i64 22102 // CHECK19-NEXT: [[TMP36:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES7]] to i8* 22103 // CHECK19-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP36]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.4 to i8*), i32 24, i1 false) 22104 // CHECK19-NEXT: [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 22105 // CHECK19-NEXT: [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32* 22106 // CHECK19-NEXT: store i32 [[TMP33]], i32* [[TMP38]], align 4 22107 // CHECK19-NEXT: [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 22108 // CHECK19-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32* 22109 // CHECK19-NEXT: store i32 [[TMP33]], i32* [[TMP40]], align 4 22110 // CHECK19-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0 22111 // CHECK19-NEXT: store i8* null, i8** [[TMP41]], align 4 22112 // CHECK19-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 22113 // CHECK19-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i32* 22114 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP43]], align 4 22115 // CHECK19-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 22116 // CHECK19-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i32* 22117 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP45]], align 4 22118 // CHECK19-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1 22119 // CHECK19-NEXT: store i8* null, i8** [[TMP46]], align 4 22120 // CHECK19-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 22121 // CHECK19-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32** 22122 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP48]], align 4 22123 // CHECK19-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 22124 // CHECK19-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32** 22125 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP50]], align 4 22126 // CHECK19-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2 22127 // CHECK19-NEXT: store i64 [[TMP35]], i64* [[TMP51]], align 4 22128 // CHECK19-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2 22129 // CHECK19-NEXT: store i8* null, i8** [[TMP52]], align 4 22130 // CHECK19-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 22131 // CHECK19-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 22132 // CHECK19-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0 22133 // CHECK19-NEXT: [[TMP56:%.*]] = load i32, i32* [[N]], align 4 22134 // CHECK19-NEXT: store i32 [[TMP56]], i32* [[DOTCAPTURE_EXPR_9]], align 4 22135 // CHECK19-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4 22136 // CHECK19-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP57]], 0 22137 // CHECK19-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 22138 // CHECK19-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 22139 // CHECK19-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4 22140 // CHECK19-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 22141 // CHECK19-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP58]], 1 22142 // CHECK19-NEXT: [[TMP59:%.*]] = zext i32 [[ADD14]] to i64 22143 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP59]]) 22144 // CHECK19-NEXT: [[TMP60:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, i32 3, i8** [[TMP53]], i8** [[TMP54]], i64* [[TMP55]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 22145 // CHECK19-NEXT: [[TMP61:%.*]] = icmp ne i32 [[TMP60]], 0 22146 // CHECK19-NEXT: br i1 [[TMP61]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]] 22147 // CHECK19: omp_offload.failed15: 22148 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i32 [[TMP33]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 22149 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT16]] 22150 // CHECK19: omp_offload.cont16: 22151 // CHECK19-NEXT: [[TMP62:%.*]] = load i32, i32* [[M]], align 4 22152 // CHECK19-NEXT: store i32 [[TMP62]], i32* [[M_CASTED]], align 4 22153 // CHECK19-NEXT: [[TMP63:%.*]] = load i32, i32* [[M_CASTED]], align 4 22154 // CHECK19-NEXT: [[TMP64:%.*]] = load i32, i32* [[N]], align 4 22155 // CHECK19-NEXT: store i32 [[TMP64]], i32* [[N_CASTED17]], align 4 22156 // CHECK19-NEXT: [[TMP65:%.*]] = load i32, i32* [[N_CASTED17]], align 4 22157 // CHECK19-NEXT: [[TMP66:%.*]] = mul nuw i32 [[TMP0]], 4 22158 // CHECK19-NEXT: [[TMP67:%.*]] = sext i32 [[TMP66]] to i64 22159 // CHECK19-NEXT: [[TMP68:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES21]] to i8* 22160 // CHECK19-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP68]], i8* align 4 bitcast ([4 x i64]* @.offload_sizes.8 to i8*), i32 32, i1 false) 22161 // CHECK19-NEXT: [[TMP69:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0 22162 // CHECK19-NEXT: [[TMP70:%.*]] = bitcast i8** [[TMP69]] to i32* 22163 // CHECK19-NEXT: store i32 [[TMP63]], i32* [[TMP70]], align 4 22164 // CHECK19-NEXT: [[TMP71:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0 22165 // CHECK19-NEXT: [[TMP72:%.*]] = bitcast i8** [[TMP71]] to i32* 22166 // CHECK19-NEXT: store i32 [[TMP63]], i32* [[TMP72]], align 4 22167 // CHECK19-NEXT: [[TMP73:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 0 22168 // CHECK19-NEXT: store i8* null, i8** [[TMP73]], align 4 22169 // CHECK19-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 1 22170 // CHECK19-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i32* 22171 // CHECK19-NEXT: store i32 [[TMP65]], i32* [[TMP75]], align 4 22172 // CHECK19-NEXT: [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 1 22173 // CHECK19-NEXT: [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i32* 22174 // CHECK19-NEXT: store i32 [[TMP65]], i32* [[TMP77]], align 4 22175 // CHECK19-NEXT: [[TMP78:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 1 22176 // CHECK19-NEXT: store i8* null, i8** [[TMP78]], align 4 22177 // CHECK19-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 2 22178 // CHECK19-NEXT: [[TMP80:%.*]] = bitcast i8** [[TMP79]] to i32* 22179 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP80]], align 4 22180 // CHECK19-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 2 22181 // CHECK19-NEXT: [[TMP82:%.*]] = bitcast i8** [[TMP81]] to i32* 22182 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP82]], align 4 22183 // CHECK19-NEXT: [[TMP83:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 2 22184 // CHECK19-NEXT: store i8* null, i8** [[TMP83]], align 4 22185 // CHECK19-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 3 22186 // CHECK19-NEXT: [[TMP85:%.*]] = bitcast i8** [[TMP84]] to i32** 22187 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP85]], align 4 22188 // CHECK19-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 3 22189 // CHECK19-NEXT: [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i32** 22190 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP87]], align 4 22191 // CHECK19-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 3 22192 // CHECK19-NEXT: store i64 [[TMP67]], i64* [[TMP88]], align 4 22193 // CHECK19-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 3 22194 // CHECK19-NEXT: store i8* null, i8** [[TMP89]], align 4 22195 // CHECK19-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0 22196 // CHECK19-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0 22197 // CHECK19-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0 22198 // CHECK19-NEXT: [[TMP93:%.*]] = load i32, i32* [[N]], align 4 22199 // CHECK19-NEXT: store i32 [[TMP93]], i32* [[DOTCAPTURE_EXPR_23]], align 4 22200 // CHECK19-NEXT: [[TMP94:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_23]], align 4 22201 // CHECK19-NEXT: [[SUB25:%.*]] = sub nsw i32 [[TMP94]], 0 22202 // CHECK19-NEXT: [[DIV26:%.*]] = sdiv i32 [[SUB25]], 1 22203 // CHECK19-NEXT: [[SUB27:%.*]] = sub nsw i32 [[DIV26]], 1 22204 // CHECK19-NEXT: store i32 [[SUB27]], i32* [[DOTCAPTURE_EXPR_24]], align 4 22205 // CHECK19-NEXT: [[TMP95:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4 22206 // CHECK19-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP95]], 1 22207 // CHECK19-NEXT: [[TMP96:%.*]] = zext i32 [[ADD28]] to i64 22208 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP96]]) 22209 // CHECK19-NEXT: [[TMP97:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, i32 4, i8** [[TMP90]], i8** [[TMP91]], i64* [[TMP92]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 22210 // CHECK19-NEXT: [[TMP98:%.*]] = icmp ne i32 [[TMP97]], 0 22211 // CHECK19-NEXT: br i1 [[TMP98]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]] 22212 // CHECK19: omp_offload.failed29: 22213 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i32 [[TMP63]], i32 [[TMP65]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 22214 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT30]] 22215 // CHECK19: omp_offload.cont30: 22216 // CHECK19-NEXT: [[TMP99:%.*]] = load i32, i32* [[N]], align 4 22217 // CHECK19-NEXT: store i32 [[TMP99]], i32* [[N_CASTED31]], align 4 22218 // CHECK19-NEXT: [[TMP100:%.*]] = load i32, i32* [[N_CASTED31]], align 4 22219 // CHECK19-NEXT: [[TMP101:%.*]] = mul nuw i32 [[TMP0]], 4 22220 // CHECK19-NEXT: [[TMP102:%.*]] = sext i32 [[TMP101]] to i64 22221 // CHECK19-NEXT: [[TMP103:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES35]] to i8* 22222 // CHECK19-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP103]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.12 to i8*), i32 24, i1 false) 22223 // CHECK19-NEXT: [[TMP104:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0 22224 // CHECK19-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to i32* 22225 // CHECK19-NEXT: store i32 [[TMP100]], i32* [[TMP105]], align 4 22226 // CHECK19-NEXT: [[TMP106:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0 22227 // CHECK19-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to i32* 22228 // CHECK19-NEXT: store i32 [[TMP100]], i32* [[TMP107]], align 4 22229 // CHECK19-NEXT: [[TMP108:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 0 22230 // CHECK19-NEXT: store i8* null, i8** [[TMP108]], align 4 22231 // CHECK19-NEXT: [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 1 22232 // CHECK19-NEXT: [[TMP110:%.*]] = bitcast i8** [[TMP109]] to i32* 22233 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP110]], align 4 22234 // CHECK19-NEXT: [[TMP111:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 1 22235 // CHECK19-NEXT: [[TMP112:%.*]] = bitcast i8** [[TMP111]] to i32* 22236 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP112]], align 4 22237 // CHECK19-NEXT: [[TMP113:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 1 22238 // CHECK19-NEXT: store i8* null, i8** [[TMP113]], align 4 22239 // CHECK19-NEXT: [[TMP114:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 2 22240 // CHECK19-NEXT: [[TMP115:%.*]] = bitcast i8** [[TMP114]] to i32** 22241 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP115]], align 4 22242 // CHECK19-NEXT: [[TMP116:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 2 22243 // CHECK19-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to i32** 22244 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP117]], align 4 22245 // CHECK19-NEXT: [[TMP118:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 2 22246 // CHECK19-NEXT: store i64 [[TMP102]], i64* [[TMP118]], align 4 22247 // CHECK19-NEXT: [[TMP119:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 2 22248 // CHECK19-NEXT: store i8* null, i8** [[TMP119]], align 4 22249 // CHECK19-NEXT: [[TMP120:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0 22250 // CHECK19-NEXT: [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0 22251 // CHECK19-NEXT: [[TMP122:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 0 22252 // CHECK19-NEXT: [[TMP123:%.*]] = load i32, i32* [[N]], align 4 22253 // CHECK19-NEXT: store i32 [[TMP123]], i32* [[DOTCAPTURE_EXPR_37]], align 4 22254 // CHECK19-NEXT: [[TMP124:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_37]], align 4 22255 // CHECK19-NEXT: [[SUB39:%.*]] = sub nsw i32 [[TMP124]], 0 22256 // CHECK19-NEXT: [[DIV40:%.*]] = sdiv i32 [[SUB39]], 1 22257 // CHECK19-NEXT: [[SUB41:%.*]] = sub nsw i32 [[DIV40]], 1 22258 // CHECK19-NEXT: store i32 [[SUB41]], i32* [[DOTCAPTURE_EXPR_38]], align 4 22259 // CHECK19-NEXT: [[TMP125:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_38]], align 4 22260 // CHECK19-NEXT: [[ADD42:%.*]] = add nsw i32 [[TMP125]], 1 22261 // CHECK19-NEXT: [[TMP126:%.*]] = zext i32 [[ADD42]] to i64 22262 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP126]]) 22263 // CHECK19-NEXT: [[TMP127:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, i32 3, i8** [[TMP120]], i8** [[TMP121]], i64* [[TMP122]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 22264 // CHECK19-NEXT: [[TMP128:%.*]] = icmp ne i32 [[TMP127]], 0 22265 // CHECK19-NEXT: br i1 [[TMP128]], label [[OMP_OFFLOAD_FAILED43:%.*]], label [[OMP_OFFLOAD_CONT44:%.*]] 22266 // CHECK19: omp_offload.failed43: 22267 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i32 [[TMP100]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 22268 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT44]] 22269 // CHECK19: omp_offload.cont44: 22270 // CHECK19-NEXT: [[TMP129:%.*]] = load i32, i32* [[M]], align 4 22271 // CHECK19-NEXT: store i32 [[TMP129]], i32* [[M_CASTED45]], align 4 22272 // CHECK19-NEXT: [[TMP130:%.*]] = load i32, i32* [[M_CASTED45]], align 4 22273 // CHECK19-NEXT: [[TMP131:%.*]] = load i32, i32* [[N]], align 4 22274 // CHECK19-NEXT: store i32 [[TMP131]], i32* [[N_CASTED46]], align 4 22275 // CHECK19-NEXT: [[TMP132:%.*]] = load i32, i32* [[N_CASTED46]], align 4 22276 // CHECK19-NEXT: [[TMP133:%.*]] = mul nuw i32 [[TMP0]], 4 22277 // CHECK19-NEXT: [[TMP134:%.*]] = sext i32 [[TMP133]] to i64 22278 // CHECK19-NEXT: [[TMP135:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES50]] to i8* 22279 // CHECK19-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP135]], i8* align 4 bitcast ([4 x i64]* @.offload_sizes.16 to i8*), i32 32, i1 false) 22280 // CHECK19-NEXT: [[TMP136:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0 22281 // CHECK19-NEXT: [[TMP137:%.*]] = bitcast i8** [[TMP136]] to i32* 22282 // CHECK19-NEXT: store i32 [[TMP130]], i32* [[TMP137]], align 4 22283 // CHECK19-NEXT: [[TMP138:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0 22284 // CHECK19-NEXT: [[TMP139:%.*]] = bitcast i8** [[TMP138]] to i32* 22285 // CHECK19-NEXT: store i32 [[TMP130]], i32* [[TMP139]], align 4 22286 // CHECK19-NEXT: [[TMP140:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 0 22287 // CHECK19-NEXT: store i8* null, i8** [[TMP140]], align 4 22288 // CHECK19-NEXT: [[TMP141:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 1 22289 // CHECK19-NEXT: [[TMP142:%.*]] = bitcast i8** [[TMP141]] to i32* 22290 // CHECK19-NEXT: store i32 [[TMP132]], i32* [[TMP142]], align 4 22291 // CHECK19-NEXT: [[TMP143:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 1 22292 // CHECK19-NEXT: [[TMP144:%.*]] = bitcast i8** [[TMP143]] to i32* 22293 // CHECK19-NEXT: store i32 [[TMP132]], i32* [[TMP144]], align 4 22294 // CHECK19-NEXT: [[TMP145:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 1 22295 // CHECK19-NEXT: store i8* null, i8** [[TMP145]], align 4 22296 // CHECK19-NEXT: [[TMP146:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 2 22297 // CHECK19-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i32* 22298 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP147]], align 4 22299 // CHECK19-NEXT: [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 2 22300 // CHECK19-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i32* 22301 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP149]], align 4 22302 // CHECK19-NEXT: [[TMP150:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 2 22303 // CHECK19-NEXT: store i8* null, i8** [[TMP150]], align 4 22304 // CHECK19-NEXT: [[TMP151:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 3 22305 // CHECK19-NEXT: [[TMP152:%.*]] = bitcast i8** [[TMP151]] to i32** 22306 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP152]], align 4 22307 // CHECK19-NEXT: [[TMP153:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 3 22308 // CHECK19-NEXT: [[TMP154:%.*]] = bitcast i8** [[TMP153]] to i32** 22309 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP154]], align 4 22310 // CHECK19-NEXT: [[TMP155:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 3 22311 // CHECK19-NEXT: store i64 [[TMP134]], i64* [[TMP155]], align 4 22312 // CHECK19-NEXT: [[TMP156:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 3 22313 // CHECK19-NEXT: store i8* null, i8** [[TMP156]], align 4 22314 // CHECK19-NEXT: [[TMP157:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0 22315 // CHECK19-NEXT: [[TMP158:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0 22316 // CHECK19-NEXT: [[TMP159:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 0 22317 // CHECK19-NEXT: [[TMP160:%.*]] = load i32, i32* [[N]], align 4 22318 // CHECK19-NEXT: store i32 [[TMP160]], i32* [[DOTCAPTURE_EXPR_52]], align 4 22319 // CHECK19-NEXT: [[TMP161:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_52]], align 4 22320 // CHECK19-NEXT: [[SUB54:%.*]] = sub nsw i32 [[TMP161]], 0 22321 // CHECK19-NEXT: [[DIV55:%.*]] = sdiv i32 [[SUB54]], 1 22322 // CHECK19-NEXT: [[SUB56:%.*]] = sub nsw i32 [[DIV55]], 1 22323 // CHECK19-NEXT: store i32 [[SUB56]], i32* [[DOTCAPTURE_EXPR_53]], align 4 22324 // CHECK19-NEXT: [[TMP162:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_53]], align 4 22325 // CHECK19-NEXT: [[ADD57:%.*]] = add nsw i32 [[TMP162]], 1 22326 // CHECK19-NEXT: [[TMP163:%.*]] = zext i32 [[ADD57]] to i64 22327 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP163]]) 22328 // CHECK19-NEXT: [[TMP164:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, i32 4, i8** [[TMP157]], i8** [[TMP158]], i64* [[TMP159]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 22329 // CHECK19-NEXT: [[TMP165:%.*]] = icmp ne i32 [[TMP164]], 0 22330 // CHECK19-NEXT: br i1 [[TMP165]], label [[OMP_OFFLOAD_FAILED58:%.*]], label [[OMP_OFFLOAD_CONT59:%.*]] 22331 // CHECK19: omp_offload.failed58: 22332 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i32 [[TMP130]], i32 [[TMP132]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 22333 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT59]] 22334 // CHECK19: omp_offload.cont59: 22335 // CHECK19-NEXT: [[TMP166:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 22336 // CHECK19-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP166]]) 22337 // CHECK19-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 22338 // CHECK19-NEXT: [[TMP167:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 22339 // CHECK19-NEXT: call void @llvm.stackrestore(i8* [[TMP167]]) 22340 // CHECK19-NEXT: [[TMP168:%.*]] = load i32, i32* [[RETVAL]], align 4 22341 // CHECK19-NEXT: ret i32 [[TMP168]] 22342 // 22343 // 22344 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148 22345 // CHECK19-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 22346 // CHECK19-NEXT: entry: 22347 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 22348 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 22349 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 22350 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 22351 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 22352 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 22353 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 22354 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 22355 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 22356 // CHECK19-NEXT: ret void 22357 // 22358 // 22359 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined. 22360 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 22361 // CHECK19-NEXT: entry: 22362 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 22363 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 22364 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 22365 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 22366 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 22367 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 22368 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 22369 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 22370 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 22371 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 22372 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 22373 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 22374 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 22375 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 22376 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4 22377 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 22378 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 22379 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 22380 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 22381 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 22382 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 22383 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 22384 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 22385 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 22386 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 22387 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 22388 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 22389 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 22390 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 22391 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 22392 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4 22393 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 22394 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 22395 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 22396 // CHECK19: omp.precond.then: 22397 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 22398 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22399 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 22400 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 22401 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 22402 // CHECK19-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 22403 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 22404 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 22405 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22406 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22407 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 22408 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 22409 // CHECK19: cond.true: 22410 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22411 // CHECK19-NEXT: br label [[COND_END:%.*]] 22412 // CHECK19: cond.false: 22413 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22414 // CHECK19-NEXT: br label [[COND_END]] 22415 // CHECK19: cond.end: 22416 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 22417 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 22418 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 22419 // CHECK19-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 22420 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 22421 // CHECK19: omp.inner.for.cond: 22422 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22423 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22424 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 22425 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 22426 // CHECK19: omp.inner.for.body: 22427 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 22428 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22429 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 22430 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 22431 // CHECK19: omp.inner.for.inc: 22432 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22433 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 22434 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 22435 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 22436 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 22437 // CHECK19: omp.inner.for.end: 22438 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 22439 // CHECK19: omp.loop.exit: 22440 // CHECK19-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 22441 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 22442 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 22443 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 22444 // CHECK19: omp.precond.end: 22445 // CHECK19-NEXT: ret void 22446 // 22447 // 22448 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..1 22449 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 22450 // CHECK19-NEXT: entry: 22451 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 22452 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 22453 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 22454 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 22455 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 22456 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 22457 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 22458 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 22459 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 22460 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 22461 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 22462 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 22463 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 22464 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 22465 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 22466 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 22467 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4 22468 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 22469 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 22470 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 22471 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 22472 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 22473 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 22474 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 22475 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 22476 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 22477 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 22478 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 22479 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 22480 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 22481 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 22482 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 22483 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 22484 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 22485 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4 22486 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 22487 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 22488 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 22489 // CHECK19: omp.precond.then: 22490 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 22491 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22492 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 22493 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 22494 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 22495 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 22496 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 22497 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 22498 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 22499 // CHECK19-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 22500 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 22501 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 22502 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 22503 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22504 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 22505 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 22506 // CHECK19: cond.true: 22507 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22508 // CHECK19-NEXT: br label [[COND_END:%.*]] 22509 // CHECK19: cond.false: 22510 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 22511 // CHECK19-NEXT: br label [[COND_END]] 22512 // CHECK19: cond.end: 22513 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 22514 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 22515 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 22516 // CHECK19-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 22517 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 22518 // CHECK19: omp.inner.for.cond: 22519 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22520 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 22521 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 22522 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 22523 // CHECK19: omp.inner.for.body: 22524 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22525 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 22526 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 22527 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 22528 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4 22529 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]] 22530 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 22531 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 22532 // CHECK19: omp.body.continue: 22533 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 22534 // CHECK19: omp.inner.for.inc: 22535 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22536 // CHECK19-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1 22537 // CHECK19-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 22538 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 22539 // CHECK19: omp.inner.for.end: 22540 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 22541 // CHECK19: omp.loop.exit: 22542 // CHECK19-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 22543 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 22544 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 22545 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 22546 // CHECK19: omp.precond.end: 22547 // CHECK19-NEXT: ret void 22548 // 22549 // 22550 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153 22551 // CHECK19-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 22552 // CHECK19-NEXT: entry: 22553 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 22554 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 22555 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 22556 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 22557 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 22558 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 22559 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 22560 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 22561 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 22562 // CHECK19-NEXT: ret void 22563 // 22564 // 22565 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..2 22566 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 22567 // CHECK19-NEXT: entry: 22568 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 22569 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 22570 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 22571 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 22572 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 22573 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 22574 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 22575 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 22576 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 22577 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 22578 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 22579 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 22580 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 22581 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 22582 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4 22583 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 22584 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 22585 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 22586 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 22587 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 22588 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 22589 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 22590 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 22591 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 22592 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 22593 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 22594 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 22595 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 22596 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 22597 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 22598 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4 22599 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 22600 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 22601 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 22602 // CHECK19: omp.precond.then: 22603 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 22604 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22605 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 22606 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 22607 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 22608 // CHECK19-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 22609 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 22610 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 22611 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22612 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22613 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 22614 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 22615 // CHECK19: cond.true: 22616 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22617 // CHECK19-NEXT: br label [[COND_END:%.*]] 22618 // CHECK19: cond.false: 22619 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22620 // CHECK19-NEXT: br label [[COND_END]] 22621 // CHECK19: cond.end: 22622 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 22623 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 22624 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 22625 // CHECK19-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 22626 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 22627 // CHECK19: omp.inner.for.cond: 22628 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22629 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22630 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 22631 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 22632 // CHECK19: omp.inner.for.body: 22633 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 22634 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22635 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 22636 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 22637 // CHECK19: omp.inner.for.inc: 22638 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22639 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 22640 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 22641 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 22642 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 22643 // CHECK19: omp.inner.for.end: 22644 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 22645 // CHECK19: omp.loop.exit: 22646 // CHECK19-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 22647 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 22648 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 22649 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 22650 // CHECK19: omp.precond.end: 22651 // CHECK19-NEXT: ret void 22652 // 22653 // 22654 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..3 22655 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 22656 // CHECK19-NEXT: entry: 22657 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 22658 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 22659 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 22660 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 22661 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 22662 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 22663 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 22664 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 22665 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 22666 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 22667 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 22668 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 22669 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 22670 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 22671 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 22672 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 22673 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4 22674 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 22675 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 22676 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 22677 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 22678 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 22679 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 22680 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 22681 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 22682 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 22683 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 22684 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 22685 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 22686 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 22687 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 22688 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 22689 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 22690 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 22691 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4 22692 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 22693 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 22694 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 22695 // CHECK19: omp.precond.then: 22696 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 22697 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22698 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 22699 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 22700 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 22701 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 22702 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 22703 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 22704 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 22705 // CHECK19-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 22706 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 22707 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 22708 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 22709 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22710 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 22711 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 22712 // CHECK19: cond.true: 22713 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22714 // CHECK19-NEXT: br label [[COND_END:%.*]] 22715 // CHECK19: cond.false: 22716 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 22717 // CHECK19-NEXT: br label [[COND_END]] 22718 // CHECK19: cond.end: 22719 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 22720 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 22721 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 22722 // CHECK19-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 22723 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 22724 // CHECK19: omp.inner.for.cond: 22725 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22726 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 22727 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 22728 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 22729 // CHECK19: omp.inner.for.body: 22730 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22731 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 22732 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 22733 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 22734 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4 22735 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]] 22736 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 22737 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 22738 // CHECK19: omp.body.continue: 22739 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 22740 // CHECK19: omp.inner.for.inc: 22741 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22742 // CHECK19-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1 22743 // CHECK19-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 22744 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 22745 // CHECK19: omp.inner.for.end: 22746 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 22747 // CHECK19: omp.loop.exit: 22748 // CHECK19-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 22749 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 22750 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 22751 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 22752 // CHECK19: omp.precond.end: 22753 // CHECK19-NEXT: ret void 22754 // 22755 // 22756 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158 22757 // CHECK19-SAME: (i32 noundef [[M:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 22758 // CHECK19-NEXT: entry: 22759 // CHECK19-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 22760 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 22761 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 22762 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 22763 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 22764 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 22765 // CHECK19-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 22766 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 22767 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 22768 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 22769 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 22770 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 22771 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4 22772 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 22773 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 22774 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 22775 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 22776 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]]) 22777 // CHECK19-NEXT: ret void 22778 // 22779 // 22780 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..6 22781 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 22782 // CHECK19-NEXT: entry: 22783 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 22784 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 22785 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 22786 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 22787 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 22788 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 22789 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 22790 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 22791 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 22792 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 22793 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 22794 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 22795 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 22796 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 22797 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 22798 // CHECK19-NEXT: [[I4:%.*]] = alloca i32, align 4 22799 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 22800 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 22801 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 22802 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 22803 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 22804 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 22805 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 22806 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 22807 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 22808 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 22809 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 22810 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 22811 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22812 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 22813 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 22814 // CHECK19-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 22815 // CHECK19-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 22816 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4 22817 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22818 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 22819 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 22820 // CHECK19: omp.precond.then: 22821 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 22822 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 22823 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 22824 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 22825 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 22826 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 22827 // CHECK19-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 22828 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 22829 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]]) 22830 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22831 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 22832 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 22833 // CHECK19-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 22834 // CHECK19: cond.true: 22835 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 22836 // CHECK19-NEXT: br label [[COND_END:%.*]] 22837 // CHECK19: cond.false: 22838 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22839 // CHECK19-NEXT: br label [[COND_END]] 22840 // CHECK19: cond.end: 22841 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 22842 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 22843 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 22844 // CHECK19-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 22845 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 22846 // CHECK19: omp.inner.for.cond: 22847 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22848 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 22849 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1 22850 // CHECK19-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]] 22851 // CHECK19-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 22852 // CHECK19: omp.inner.for.body: 22853 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 22854 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22855 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 22856 // CHECK19-NEXT: store i32 [[TMP19]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 22857 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 22858 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP20]]) 22859 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 22860 // CHECK19: omp.inner.for.inc: 22861 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22862 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 22863 // CHECK19-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 22864 // CHECK19-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 22865 // CHECK19-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 22866 // CHECK19-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 22867 // CHECK19-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 22868 // CHECK19-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4 22869 // CHECK19-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22870 // CHECK19-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 22871 // CHECK19-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 22872 // CHECK19-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4 22873 // CHECK19-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22874 // CHECK19-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 22875 // CHECK19-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP27]], [[TMP28]] 22876 // CHECK19-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]] 22877 // CHECK19: cond.true11: 22878 // CHECK19-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 22879 // CHECK19-NEXT: br label [[COND_END13:%.*]] 22880 // CHECK19: cond.false12: 22881 // CHECK19-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22882 // CHECK19-NEXT: br label [[COND_END13]] 22883 // CHECK19: cond.end13: 22884 // CHECK19-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP29]], [[COND_TRUE11]] ], [ [[TMP30]], [[COND_FALSE12]] ] 22885 // CHECK19-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4 22886 // CHECK19-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 22887 // CHECK19-NEXT: store i32 [[TMP31]], i32* [[DOTOMP_IV]], align 4 22888 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 22889 // CHECK19: omp.inner.for.end: 22890 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 22891 // CHECK19: omp.loop.exit: 22892 // CHECK19-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 22893 // CHECK19-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4 22894 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]]) 22895 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 22896 // CHECK19: omp.precond.end: 22897 // CHECK19-NEXT: ret void 22898 // 22899 // 22900 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..7 22901 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 22902 // CHECK19-NEXT: entry: 22903 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 22904 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 22905 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 22906 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 22907 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 22908 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 22909 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 22910 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 22911 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 22912 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 22913 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 22914 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 22915 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 22916 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 22917 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 22918 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 22919 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 22920 // CHECK19-NEXT: [[I4:%.*]] = alloca i32, align 4 22921 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 22922 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 22923 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 22924 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 22925 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 22926 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 22927 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 22928 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 22929 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 22930 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 22931 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 22932 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 22933 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 22934 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22935 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 22936 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 22937 // CHECK19-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 22938 // CHECK19-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 22939 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4 22940 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22941 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 22942 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 22943 // CHECK19: omp.precond.then: 22944 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 22945 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 22946 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 22947 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 22948 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 22949 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 22950 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 22951 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 22952 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 22953 // CHECK19-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 22954 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 22955 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 22956 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 22957 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 22958 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 22959 // CHECK19-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 22960 // CHECK19: cond.true: 22961 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 22962 // CHECK19-NEXT: br label [[COND_END:%.*]] 22963 // CHECK19: cond.false: 22964 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 22965 // CHECK19-NEXT: br label [[COND_END]] 22966 // CHECK19: cond.end: 22967 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 22968 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 22969 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 22970 // CHECK19-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 22971 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 22972 // CHECK19: omp.inner.for.cond: 22973 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22974 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 22975 // CHECK19-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 22976 // CHECK19-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 22977 // CHECK19: omp.inner.for.body: 22978 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22979 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 22980 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 22981 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 22982 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4 22983 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]] 22984 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 22985 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 22986 // CHECK19: omp.body.continue: 22987 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 22988 // CHECK19: omp.inner.for.inc: 22989 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22990 // CHECK19-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 22991 // CHECK19-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 22992 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 22993 // CHECK19: omp.inner.for.end: 22994 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 22995 // CHECK19: omp.loop.exit: 22996 // CHECK19-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 22997 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 22998 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 22999 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 23000 // CHECK19: omp.precond.end: 23001 // CHECK19-NEXT: ret void 23002 // 23003 // 23004 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163 23005 // CHECK19-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 23006 // CHECK19-NEXT: entry: 23007 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 23008 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 23009 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 23010 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 23011 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 23012 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 23013 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 23014 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 23015 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 23016 // CHECK19-NEXT: ret void 23017 // 23018 // 23019 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..10 23020 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 23021 // CHECK19-NEXT: entry: 23022 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 23023 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 23024 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 23025 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 23026 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 23027 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 23028 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 23029 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 23030 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 23031 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 23032 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 23033 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 23034 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 23035 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 23036 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4 23037 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 23038 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 23039 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 23040 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 23041 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 23042 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 23043 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 23044 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 23045 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 23046 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 23047 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 23048 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 23049 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 23050 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 23051 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 23052 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4 23053 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 23054 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 23055 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 23056 // CHECK19: omp.precond.then: 23057 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 23058 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 23059 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 23060 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 23061 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 23062 // CHECK19-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 23063 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 23064 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 23065 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23066 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 23067 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 23068 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 23069 // CHECK19: cond.true: 23070 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 23071 // CHECK19-NEXT: br label [[COND_END:%.*]] 23072 // CHECK19: cond.false: 23073 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23074 // CHECK19-NEXT: br label [[COND_END]] 23075 // CHECK19: cond.end: 23076 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 23077 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 23078 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 23079 // CHECK19-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 23080 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 23081 // CHECK19: omp.inner.for.cond: 23082 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 23083 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23084 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 23085 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 23086 // CHECK19: omp.inner.for.body: 23087 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 23088 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23089 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 23090 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 23091 // CHECK19: omp.inner.for.inc: 23092 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 23093 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 23094 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 23095 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 23096 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 23097 // CHECK19: omp.inner.for.end: 23098 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 23099 // CHECK19: omp.loop.exit: 23100 // CHECK19-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 23101 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 23102 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 23103 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 23104 // CHECK19: omp.precond.end: 23105 // CHECK19-NEXT: ret void 23106 // 23107 // 23108 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..11 23109 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 23110 // CHECK19-NEXT: entry: 23111 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 23112 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 23113 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 23114 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 23115 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 23116 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 23117 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 23118 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 23119 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 23120 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 23121 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 23122 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 23123 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 23124 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 23125 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 23126 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 23127 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4 23128 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 23129 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 23130 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 23131 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 23132 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 23133 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 23134 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 23135 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 23136 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 23137 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 23138 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 23139 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 23140 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 23141 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 23142 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 23143 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 23144 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 23145 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4 23146 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 23147 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 23148 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 23149 // CHECK19: omp.precond.then: 23150 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 23151 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 23152 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 23153 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 23154 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 23155 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 23156 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 23157 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 23158 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 23159 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 23160 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 23161 // CHECK19-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 23162 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 23163 // CHECK19-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1) 23164 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 23165 // CHECK19: omp.dispatch.cond: 23166 // CHECK19-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 23167 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 23168 // CHECK19-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 23169 // CHECK19-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 23170 // CHECK19-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 23171 // CHECK19: omp.dispatch.body: 23172 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 23173 // CHECK19-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 23174 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 23175 // CHECK19: omp.inner.for.cond: 23176 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 23177 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16 23178 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 23179 // CHECK19-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 23180 // CHECK19: omp.inner.for.body: 23181 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 23182 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 23183 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 23184 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !16 23185 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !16 23186 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP20]] 23187 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !16 23188 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 23189 // CHECK19: omp.body.continue: 23190 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 23191 // CHECK19: omp.inner.for.inc: 23192 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 23193 // CHECK19-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP21]], 1 23194 // CHECK19-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 23195 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]] 23196 // CHECK19: omp.inner.for.end: 23197 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 23198 // CHECK19: omp.dispatch.inc: 23199 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]] 23200 // CHECK19: omp.dispatch.end: 23201 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 23202 // CHECK19: omp.precond.end: 23203 // CHECK19-NEXT: ret void 23204 // 23205 // 23206 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168 23207 // CHECK19-SAME: (i32 noundef [[M:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 23208 // CHECK19-NEXT: entry: 23209 // CHECK19-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 23210 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 23211 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 23212 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 23213 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 23214 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 23215 // CHECK19-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 23216 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 23217 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 23218 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 23219 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 23220 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 23221 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4 23222 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 23223 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 23224 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 23225 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 23226 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]]) 23227 // CHECK19-NEXT: ret void 23228 // 23229 // 23230 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..14 23231 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 23232 // CHECK19-NEXT: entry: 23233 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 23234 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 23235 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 23236 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 23237 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 23238 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 23239 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 23240 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 23241 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 23242 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 23243 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 23244 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 23245 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 23246 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 23247 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 23248 // CHECK19-NEXT: [[I4:%.*]] = alloca i32, align 4 23249 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 23250 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 23251 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 23252 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 23253 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 23254 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 23255 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 23256 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 23257 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 23258 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 23259 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 23260 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 23261 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 23262 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 23263 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 23264 // CHECK19-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 23265 // CHECK19-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 23266 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4 23267 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 23268 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 23269 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 23270 // CHECK19: omp.precond.then: 23271 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 23272 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 23273 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 23274 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 23275 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 23276 // CHECK19-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 23277 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 23278 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 23279 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23280 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 23281 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 23282 // CHECK19-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 23283 // CHECK19: cond.true: 23284 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 23285 // CHECK19-NEXT: br label [[COND_END:%.*]] 23286 // CHECK19: cond.false: 23287 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23288 // CHECK19-NEXT: br label [[COND_END]] 23289 // CHECK19: cond.end: 23290 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 23291 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 23292 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 23293 // CHECK19-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 23294 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 23295 // CHECK19: omp.inner.for.cond: 23296 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 23297 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23298 // CHECK19-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 23299 // CHECK19-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 23300 // CHECK19: omp.inner.for.body: 23301 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 23302 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23303 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 23304 // CHECK19-NEXT: store i32 [[TMP18]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 23305 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 23306 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP19]]) 23307 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 23308 // CHECK19: omp.inner.for.inc: 23309 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 23310 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 23311 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 23312 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 23313 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 23314 // CHECK19: omp.inner.for.end: 23315 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 23316 // CHECK19: omp.loop.exit: 23317 // CHECK19-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 23318 // CHECK19-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 23319 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 23320 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 23321 // CHECK19: omp.precond.end: 23322 // CHECK19-NEXT: ret void 23323 // 23324 // 23325 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..15 23326 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 23327 // CHECK19-NEXT: entry: 23328 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 23329 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 23330 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 23331 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 23332 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 23333 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 23334 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 23335 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 23336 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 23337 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 23338 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 23339 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 23340 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 23341 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 23342 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 23343 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 23344 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 23345 // CHECK19-NEXT: [[I4:%.*]] = alloca i32, align 4 23346 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 23347 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 23348 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 23349 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 23350 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 23351 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 23352 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 23353 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 23354 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 23355 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 23356 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 23357 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 23358 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 23359 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 23360 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 23361 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 23362 // CHECK19-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 23363 // CHECK19-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 23364 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4 23365 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 23366 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 23367 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 23368 // CHECK19: omp.precond.then: 23369 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 23370 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 23371 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 23372 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 23373 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 23374 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 23375 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 23376 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 23377 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 23378 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 23379 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 23380 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 23381 // CHECK19-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 23382 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 23383 // CHECK19-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]]) 23384 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 23385 // CHECK19: omp.dispatch.cond: 23386 // CHECK19-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 23387 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 23388 // CHECK19-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 23389 // CHECK19-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 23390 // CHECK19-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 23391 // CHECK19: omp.dispatch.body: 23392 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 23393 // CHECK19-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 23394 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 23395 // CHECK19: omp.inner.for.cond: 23396 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 23397 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !19 23398 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 23399 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 23400 // CHECK19: omp.inner.for.body: 23401 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 23402 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 23403 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 23404 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !19 23405 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !19 23406 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP21]] 23407 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !19 23408 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 23409 // CHECK19: omp.body.continue: 23410 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 23411 // CHECK19: omp.inner.for.inc: 23412 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 23413 // CHECK19-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP22]], 1 23414 // CHECK19-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 23415 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]] 23416 // CHECK19: omp.inner.for.end: 23417 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 23418 // CHECK19: omp.dispatch.inc: 23419 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]] 23420 // CHECK19: omp.dispatch.end: 23421 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 23422 // CHECK19: omp.precond.end: 23423 // CHECK19-NEXT: ret void 23424 // 23425 // 23426 // CHECK19-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 23427 // CHECK19-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 23428 // CHECK19-NEXT: entry: 23429 // CHECK19-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 23430 // CHECK19-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 23431 // CHECK19-NEXT: [[M:%.*]] = alloca i32, align 4 23432 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 23433 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 23434 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 23435 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 23436 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4 23437 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4 23438 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4 23439 // CHECK19-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 23440 // CHECK19-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4 23441 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 4 23442 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 4 23443 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 4 23444 // CHECK19-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 23445 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 4 23446 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 4 23447 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 4 23448 // CHECK19-NEXT: [[_TMP16:%.*]] = alloca i32, align 4 23449 // CHECK19-NEXT: [[M_CASTED19:%.*]] = alloca i32, align 4 23450 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [2 x i8*], align 4 23451 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [2 x i8*], align 4 23452 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [2 x i8*], align 4 23453 // CHECK19-NEXT: [[_TMP23:%.*]] = alloca i32, align 4 23454 // CHECK19-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 23455 // CHECK19-NEXT: store i32 10, i32* [[M]], align 4 23456 // CHECK19-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 23457 // CHECK19-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 23458 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4 23459 // CHECK19-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 23460 // CHECK19-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 23461 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4 23462 // CHECK19-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 23463 // CHECK19-NEXT: store i8* null, i8** [[TMP4]], align 4 23464 // CHECK19-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 23465 // CHECK19-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 23466 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 23467 // CHECK19-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.20, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.21, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 23468 // CHECK19-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 23469 // CHECK19-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 23470 // CHECK19: omp_offload.failed: 23471 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]] 23472 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]] 23473 // CHECK19: omp_offload.cont: 23474 // CHECK19-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 23475 // CHECK19-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** 23476 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4 23477 // CHECK19-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 23478 // CHECK19-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** 23479 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4 23480 // CHECK19-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0 23481 // CHECK19-NEXT: store i8* null, i8** [[TMP13]], align 4 23482 // CHECK19-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 23483 // CHECK19-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 23484 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 23485 // CHECK19-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.24, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.25, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 23486 // CHECK19-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 23487 // CHECK19-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 23488 // CHECK19: omp_offload.failed5: 23489 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121([10 x i32]* [[A]]) #[[ATTR3]] 23490 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT6]] 23491 // CHECK19: omp_offload.cont6: 23492 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[M]], align 4 23493 // CHECK19-NEXT: store i32 [[TMP18]], i32* [[M_CASTED]], align 4 23494 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[M_CASTED]], align 4 23495 // CHECK19-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 23496 // CHECK19-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32* 23497 // CHECK19-NEXT: store i32 [[TMP19]], i32* [[TMP21]], align 4 23498 // CHECK19-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 23499 // CHECK19-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32* 23500 // CHECK19-NEXT: store i32 [[TMP19]], i32* [[TMP23]], align 4 23501 // CHECK19-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0 23502 // CHECK19-NEXT: store i8* null, i8** [[TMP24]], align 4 23503 // CHECK19-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1 23504 // CHECK19-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]** 23505 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 4 23506 // CHECK19-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1 23507 // CHECK19-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]** 23508 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 4 23509 // CHECK19-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 1 23510 // CHECK19-NEXT: store i8* null, i8** [[TMP29]], align 4 23511 // CHECK19-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 23512 // CHECK19-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 23513 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 23514 // CHECK19-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.28, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.29, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 23515 // CHECK19-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 23516 // CHECK19-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] 23517 // CHECK19: omp_offload.failed11: 23518 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i32 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]] 23519 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT12]] 23520 // CHECK19: omp_offload.cont12: 23521 // CHECK19-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 23522 // CHECK19-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]** 23523 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 4 23524 // CHECK19-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 23525 // CHECK19-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]** 23526 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 4 23527 // CHECK19-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 0 23528 // CHECK19-NEXT: store i8* null, i8** [[TMP38]], align 4 23529 // CHECK19-NEXT: [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 23530 // CHECK19-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 23531 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 23532 // CHECK19-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.32, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.33, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 23533 // CHECK19-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0 23534 // CHECK19-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]] 23535 // CHECK19: omp_offload.failed17: 23536 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131([10 x i32]* [[A]]) #[[ATTR3]] 23537 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT18]] 23538 // CHECK19: omp_offload.cont18: 23539 // CHECK19-NEXT: [[TMP43:%.*]] = load i32, i32* [[M]], align 4 23540 // CHECK19-NEXT: store i32 [[TMP43]], i32* [[M_CASTED19]], align 4 23541 // CHECK19-NEXT: [[TMP44:%.*]] = load i32, i32* [[M_CASTED19]], align 4 23542 // CHECK19-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 23543 // CHECK19-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32* 23544 // CHECK19-NEXT: store i32 [[TMP44]], i32* [[TMP46]], align 4 23545 // CHECK19-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 23546 // CHECK19-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32* 23547 // CHECK19-NEXT: store i32 [[TMP44]], i32* [[TMP48]], align 4 23548 // CHECK19-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 0 23549 // CHECK19-NEXT: store i8* null, i8** [[TMP49]], align 4 23550 // CHECK19-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1 23551 // CHECK19-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]** 23552 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 4 23553 // CHECK19-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 1 23554 // CHECK19-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]** 23555 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 4 23556 // CHECK19-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 1 23557 // CHECK19-NEXT: store i8* null, i8** [[TMP54]], align 4 23558 // CHECK19-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 23559 // CHECK19-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 23560 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 23561 // CHECK19-NEXT: [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.36, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.37, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 23562 // CHECK19-NEXT: [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0 23563 // CHECK19-NEXT: br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]] 23564 // CHECK19: omp_offload.failed24: 23565 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i32 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]] 23566 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT25]] 23567 // CHECK19: omp_offload.cont25: 23568 // CHECK19-NEXT: ret i32 0 23569 // 23570 // 23571 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116 23572 // CHECK19-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 23573 // CHECK19-NEXT: entry: 23574 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 23575 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 23576 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 23577 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 23578 // CHECK19-NEXT: ret void 23579 // 23580 // 23581 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..18 23582 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 23583 // CHECK19-NEXT: entry: 23584 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 23585 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 23586 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 23587 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 23588 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 23589 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 23590 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 23591 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 23592 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 23593 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 23594 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 23595 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 23596 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 23597 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 23598 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 23599 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 23600 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 23601 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 23602 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 23603 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 23604 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 23605 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23606 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 23607 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 23608 // CHECK19: cond.true: 23609 // CHECK19-NEXT: br label [[COND_END:%.*]] 23610 // CHECK19: cond.false: 23611 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23612 // CHECK19-NEXT: br label [[COND_END]] 23613 // CHECK19: cond.end: 23614 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 23615 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 23616 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 23617 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 23618 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 23619 // CHECK19: omp.inner.for.cond: 23620 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 23621 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23622 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 23623 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 23624 // CHECK19: omp.inner.for.body: 23625 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 23626 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23627 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..19 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]) 23628 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 23629 // CHECK19: omp.inner.for.inc: 23630 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 23631 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 23632 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 23633 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 23634 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 23635 // CHECK19: omp.inner.for.end: 23636 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 23637 // CHECK19: omp.loop.exit: 23638 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 23639 // CHECK19-NEXT: ret void 23640 // 23641 // 23642 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..19 23643 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 23644 // CHECK19-NEXT: entry: 23645 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 23646 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 23647 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 23648 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 23649 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 23650 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 23651 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 23652 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 23653 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 23654 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 23655 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 23656 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 23657 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 23658 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 23659 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 23660 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 23661 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 23662 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 23663 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 23664 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 23665 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 23666 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 23667 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 23668 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 23669 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 23670 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 23671 // CHECK19-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 23672 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 23673 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 23674 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 23675 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 23676 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 23677 // CHECK19: cond.true: 23678 // CHECK19-NEXT: br label [[COND_END:%.*]] 23679 // CHECK19: cond.false: 23680 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 23681 // CHECK19-NEXT: br label [[COND_END]] 23682 // CHECK19: cond.end: 23683 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 23684 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 23685 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 23686 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 23687 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 23688 // CHECK19: omp.inner.for.cond: 23689 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 23690 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 23691 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 23692 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 23693 // CHECK19: omp.inner.for.body: 23694 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 23695 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 23696 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 23697 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4 23698 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 23699 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]] 23700 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 23701 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 23702 // CHECK19: omp.body.continue: 23703 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 23704 // CHECK19: omp.inner.for.inc: 23705 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 23706 // CHECK19-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 23707 // CHECK19-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 23708 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 23709 // CHECK19: omp.inner.for.end: 23710 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 23711 // CHECK19: omp.loop.exit: 23712 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 23713 // CHECK19-NEXT: ret void 23714 // 23715 // 23716 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121 23717 // CHECK19-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 23718 // CHECK19-NEXT: entry: 23719 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 23720 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 23721 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 23722 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..22 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 23723 // CHECK19-NEXT: ret void 23724 // 23725 // 23726 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..22 23727 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 23728 // CHECK19-NEXT: entry: 23729 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 23730 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 23731 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 23732 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 23733 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 23734 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 23735 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 23736 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 23737 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 23738 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 23739 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 23740 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 23741 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 23742 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 23743 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 23744 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 23745 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 23746 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 23747 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 23748 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 23749 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 23750 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23751 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 23752 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 23753 // CHECK19: cond.true: 23754 // CHECK19-NEXT: br label [[COND_END:%.*]] 23755 // CHECK19: cond.false: 23756 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23757 // CHECK19-NEXT: br label [[COND_END]] 23758 // CHECK19: cond.end: 23759 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 23760 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 23761 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 23762 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 23763 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 23764 // CHECK19: omp.inner.for.cond: 23765 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 23766 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23767 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 23768 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 23769 // CHECK19: omp.inner.for.body: 23770 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 23771 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23772 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..23 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]) 23773 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 23774 // CHECK19: omp.inner.for.inc: 23775 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 23776 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 23777 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 23778 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 23779 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 23780 // CHECK19: omp.inner.for.end: 23781 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 23782 // CHECK19: omp.loop.exit: 23783 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 23784 // CHECK19-NEXT: ret void 23785 // 23786 // 23787 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..23 23788 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 23789 // CHECK19-NEXT: entry: 23790 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 23791 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 23792 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 23793 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 23794 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 23795 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 23796 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 23797 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 23798 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 23799 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 23800 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 23801 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 23802 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 23803 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 23804 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 23805 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 23806 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 23807 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 23808 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 23809 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 23810 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 23811 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 23812 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 23813 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 23814 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 23815 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 23816 // CHECK19-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 23817 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 23818 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 23819 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 23820 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 23821 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 23822 // CHECK19: cond.true: 23823 // CHECK19-NEXT: br label [[COND_END:%.*]] 23824 // CHECK19: cond.false: 23825 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 23826 // CHECK19-NEXT: br label [[COND_END]] 23827 // CHECK19: cond.end: 23828 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 23829 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 23830 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 23831 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 23832 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 23833 // CHECK19: omp.inner.for.cond: 23834 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 23835 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 23836 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 23837 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 23838 // CHECK19: omp.inner.for.body: 23839 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 23840 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 23841 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 23842 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4 23843 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 23844 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]] 23845 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 23846 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 23847 // CHECK19: omp.body.continue: 23848 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 23849 // CHECK19: omp.inner.for.inc: 23850 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 23851 // CHECK19-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 23852 // CHECK19-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 23853 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 23854 // CHECK19: omp.inner.for.end: 23855 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 23856 // CHECK19: omp.loop.exit: 23857 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 23858 // CHECK19-NEXT: ret void 23859 // 23860 // 23861 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126 23862 // CHECK19-SAME: (i32 noundef [[M:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 23863 // CHECK19-NEXT: entry: 23864 // CHECK19-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 23865 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 23866 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 23867 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 23868 // CHECK19-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 23869 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 23870 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 23871 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4 23872 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 23873 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 23874 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 23875 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 23876 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..26 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]]) 23877 // CHECK19-NEXT: ret void 23878 // 23879 // 23880 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..26 23881 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 23882 // CHECK19-NEXT: entry: 23883 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 23884 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 23885 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 23886 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 23887 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 23888 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 23889 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 23890 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 23891 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 23892 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 23893 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 23894 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 23895 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 23896 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 23897 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 23898 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 23899 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 23900 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 23901 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 23902 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 23903 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 23904 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 23905 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 23906 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 23907 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23908 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 23909 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 23910 // CHECK19: cond.true: 23911 // CHECK19-NEXT: br label [[COND_END:%.*]] 23912 // CHECK19: cond.false: 23913 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23914 // CHECK19-NEXT: br label [[COND_END]] 23915 // CHECK19: cond.end: 23916 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 23917 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 23918 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 23919 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 23920 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 23921 // CHECK19: omp.inner.for.cond: 23922 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 23923 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23924 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 23925 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 23926 // CHECK19: omp.inner.for.body: 23927 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 23928 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23929 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 23930 // CHECK19-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 23931 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 23932 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..27 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]]) 23933 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 23934 // CHECK19: omp.inner.for.inc: 23935 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 23936 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 23937 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 23938 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 23939 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 23940 // CHECK19: omp.inner.for.end: 23941 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 23942 // CHECK19: omp.loop.exit: 23943 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 23944 // CHECK19-NEXT: ret void 23945 // 23946 // 23947 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..27 23948 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 23949 // CHECK19-NEXT: entry: 23950 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 23951 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 23952 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 23953 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 23954 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 23955 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 23956 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 23957 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 23958 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 23959 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 23960 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 23961 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 23962 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 23963 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 23964 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 23965 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 23966 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 23967 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 23968 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 23969 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 23970 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 23971 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 23972 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 23973 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 23974 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 23975 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 23976 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 23977 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 23978 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 23979 // CHECK19-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 23980 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 23981 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]]) 23982 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 23983 // CHECK19: omp.dispatch.cond: 23984 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 23985 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 23986 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]] 23987 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 23988 // CHECK19: cond.true: 23989 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 23990 // CHECK19-NEXT: br label [[COND_END:%.*]] 23991 // CHECK19: cond.false: 23992 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 23993 // CHECK19-NEXT: br label [[COND_END]] 23994 // CHECK19: cond.end: 23995 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP8]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 23996 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 23997 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 23998 // CHECK19-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 23999 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24000 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 24001 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 24002 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 24003 // CHECK19: omp.dispatch.body: 24004 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 24005 // CHECK19: omp.inner.for.cond: 24006 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24007 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 24008 // CHECK19-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 24009 // CHECK19-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 24010 // CHECK19: omp.inner.for.body: 24011 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24012 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 24013 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 24014 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4 24015 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4 24016 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP16]] 24017 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 24018 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 24019 // CHECK19: omp.body.continue: 24020 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 24021 // CHECK19: omp.inner.for.inc: 24022 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24023 // CHECK19-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1 24024 // CHECK19-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 24025 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 24026 // CHECK19: omp.inner.for.end: 24027 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 24028 // CHECK19: omp.dispatch.inc: 24029 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 24030 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 24031 // CHECK19-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 24032 // CHECK19-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 24033 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 24034 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 24035 // CHECK19-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 24036 // CHECK19-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 24037 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]] 24038 // CHECK19: omp.dispatch.end: 24039 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 24040 // CHECK19-NEXT: ret void 24041 // 24042 // 24043 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131 24044 // CHECK19-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 24045 // CHECK19-NEXT: entry: 24046 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 24047 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 24048 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 24049 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..30 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 24050 // CHECK19-NEXT: ret void 24051 // 24052 // 24053 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..30 24054 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 24055 // CHECK19-NEXT: entry: 24056 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 24057 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 24058 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 24059 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 24060 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 24061 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 24062 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 24063 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 24064 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 24065 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 24066 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 24067 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 24068 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 24069 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 24070 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 24071 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 24072 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 24073 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 24074 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 24075 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 24076 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 24077 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24078 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 24079 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 24080 // CHECK19: cond.true: 24081 // CHECK19-NEXT: br label [[COND_END:%.*]] 24082 // CHECK19: cond.false: 24083 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24084 // CHECK19-NEXT: br label [[COND_END]] 24085 // CHECK19: cond.end: 24086 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 24087 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 24088 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 24089 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 24090 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 24091 // CHECK19: omp.inner.for.cond: 24092 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24093 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24094 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 24095 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 24096 // CHECK19: omp.inner.for.body: 24097 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 24098 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24099 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..31 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]) 24100 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 24101 // CHECK19: omp.inner.for.inc: 24102 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24103 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 24104 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 24105 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 24106 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 24107 // CHECK19: omp.inner.for.end: 24108 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 24109 // CHECK19: omp.loop.exit: 24110 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 24111 // CHECK19-NEXT: ret void 24112 // 24113 // 24114 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..31 24115 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 24116 // CHECK19-NEXT: entry: 24117 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 24118 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 24119 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 24120 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 24121 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 24122 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 24123 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 24124 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 24125 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 24126 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 24127 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 24128 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 24129 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 24130 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 24131 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 24132 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 24133 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 24134 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 24135 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 24136 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 24137 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 24138 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 24139 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 24140 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 24141 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 24142 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 24143 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 24144 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 24145 // CHECK19-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 24146 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 24147 // CHECK19-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 24148 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 24149 // CHECK19: omp.dispatch.cond: 24150 // CHECK19-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 24151 // CHECK19-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 24152 // CHECK19-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 24153 // CHECK19: omp.dispatch.body: 24154 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 24155 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 24156 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 24157 // CHECK19: omp.inner.for.cond: 24158 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 24159 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22 24160 // CHECK19-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 24161 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 24162 // CHECK19: omp.inner.for.body: 24163 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 24164 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 24165 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 24166 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22 24167 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !22 24168 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP12]] 24169 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !22 24170 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 24171 // CHECK19: omp.body.continue: 24172 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 24173 // CHECK19: omp.inner.for.inc: 24174 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 24175 // CHECK19-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 24176 // CHECK19-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 24177 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]] 24178 // CHECK19: omp.inner.for.end: 24179 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 24180 // CHECK19: omp.dispatch.inc: 24181 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]] 24182 // CHECK19: omp.dispatch.end: 24183 // CHECK19-NEXT: ret void 24184 // 24185 // 24186 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136 24187 // CHECK19-SAME: (i32 noundef [[M:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 24188 // CHECK19-NEXT: entry: 24189 // CHECK19-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 24190 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 24191 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 24192 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 24193 // CHECK19-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 24194 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 24195 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 24196 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4 24197 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 24198 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 24199 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 24200 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 24201 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..34 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]]) 24202 // CHECK19-NEXT: ret void 24203 // 24204 // 24205 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..34 24206 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 24207 // CHECK19-NEXT: entry: 24208 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 24209 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 24210 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 24211 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 24212 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 24213 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 24214 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 24215 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 24216 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 24217 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 24218 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 24219 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 24220 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 24221 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 24222 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 24223 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 24224 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 24225 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 24226 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 24227 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 24228 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 24229 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 24230 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 24231 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 24232 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24233 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 24234 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 24235 // CHECK19: cond.true: 24236 // CHECK19-NEXT: br label [[COND_END:%.*]] 24237 // CHECK19: cond.false: 24238 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24239 // CHECK19-NEXT: br label [[COND_END]] 24240 // CHECK19: cond.end: 24241 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 24242 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 24243 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 24244 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 24245 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 24246 // CHECK19: omp.inner.for.cond: 24247 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24248 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24249 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 24250 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 24251 // CHECK19: omp.inner.for.body: 24252 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 24253 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24254 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 24255 // CHECK19-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 24256 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 24257 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..35 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]]) 24258 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 24259 // CHECK19: omp.inner.for.inc: 24260 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24261 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 24262 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 24263 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 24264 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 24265 // CHECK19: omp.inner.for.end: 24266 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 24267 // CHECK19: omp.loop.exit: 24268 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 24269 // CHECK19-NEXT: ret void 24270 // 24271 // 24272 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..35 24273 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 24274 // CHECK19-NEXT: entry: 24275 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 24276 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 24277 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 24278 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 24279 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 24280 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 24281 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 24282 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 24283 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 24284 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 24285 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 24286 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 24287 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 24288 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 24289 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 24290 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 24291 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 24292 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 24293 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 24294 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 24295 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 24296 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 24297 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 24298 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 24299 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 24300 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 24301 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 24302 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 24303 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 24304 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 24305 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 24306 // CHECK19-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 24307 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 24308 // CHECK19-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]]) 24309 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 24310 // CHECK19: omp.dispatch.cond: 24311 // CHECK19-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 24312 // CHECK19-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0 24313 // CHECK19-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 24314 // CHECK19: omp.dispatch.body: 24315 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 24316 // CHECK19-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 24317 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 24318 // CHECK19: omp.inner.for.cond: 24319 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 24320 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25 24321 // CHECK19-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 24322 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 24323 // CHECK19: omp.inner.for.body: 24324 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 24325 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 24326 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 24327 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !25 24328 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !25 24329 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP13]] 24330 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !25 24331 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 24332 // CHECK19: omp.body.continue: 24333 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 24334 // CHECK19: omp.inner.for.inc: 24335 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 24336 // CHECK19-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP14]], 1 24337 // CHECK19-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 24338 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]] 24339 // CHECK19: omp.inner.for.end: 24340 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 24341 // CHECK19: omp.dispatch.inc: 24342 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]] 24343 // CHECK19: omp.dispatch.end: 24344 // CHECK19-NEXT: ret void 24345 // 24346 // 24347 // CHECK19-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 24348 // CHECK19-SAME: () #[[ATTR6:[0-9]+]] { 24349 // CHECK19-NEXT: entry: 24350 // CHECK19-NEXT: call void @__tgt_register_requires(i64 1) 24351 // CHECK19-NEXT: ret void 24352 // 24353 // 24354 // CHECK20-LABEL: define {{[^@]+}}@main 24355 // CHECK20-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 24356 // CHECK20-NEXT: entry: 24357 // CHECK20-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 24358 // CHECK20-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 24359 // CHECK20-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 24360 // CHECK20-NEXT: [[N:%.*]] = alloca i32, align 4 24361 // CHECK20-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 24362 // CHECK20-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 24363 // CHECK20-NEXT: [[M:%.*]] = alloca i32, align 4 24364 // CHECK20-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 24365 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 24366 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 24367 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 24368 // CHECK20-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4 24369 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 24370 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 24371 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 24372 // CHECK20-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4 24373 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4 24374 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4 24375 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4 24376 // CHECK20-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4 24377 // CHECK20-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 24378 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 24379 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 24380 // CHECK20-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4 24381 // CHECK20-NEXT: [[N_CASTED17:%.*]] = alloca i32, align 4 24382 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS18:%.*]] = alloca [4 x i8*], align 4 24383 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS19:%.*]] = alloca [4 x i8*], align 4 24384 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS20:%.*]] = alloca [4 x i8*], align 4 24385 // CHECK20-NEXT: [[DOTOFFLOAD_SIZES21:%.*]] = alloca [4 x i64], align 4 24386 // CHECK20-NEXT: [[_TMP22:%.*]] = alloca i32, align 4 24387 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_23:%.*]] = alloca i32, align 4 24388 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4 24389 // CHECK20-NEXT: [[N_CASTED31:%.*]] = alloca i32, align 4 24390 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS32:%.*]] = alloca [3 x i8*], align 4 24391 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS33:%.*]] = alloca [3 x i8*], align 4 24392 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS34:%.*]] = alloca [3 x i8*], align 4 24393 // CHECK20-NEXT: [[DOTOFFLOAD_SIZES35:%.*]] = alloca [3 x i64], align 4 24394 // CHECK20-NEXT: [[_TMP36:%.*]] = alloca i32, align 4 24395 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_37:%.*]] = alloca i32, align 4 24396 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4 24397 // CHECK20-NEXT: [[M_CASTED45:%.*]] = alloca i32, align 4 24398 // CHECK20-NEXT: [[N_CASTED46:%.*]] = alloca i32, align 4 24399 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS47:%.*]] = alloca [4 x i8*], align 4 24400 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS48:%.*]] = alloca [4 x i8*], align 4 24401 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS49:%.*]] = alloca [4 x i8*], align 4 24402 // CHECK20-NEXT: [[DOTOFFLOAD_SIZES50:%.*]] = alloca [4 x i64], align 4 24403 // CHECK20-NEXT: [[_TMP51:%.*]] = alloca i32, align 4 24404 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_52:%.*]] = alloca i32, align 4 24405 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_53:%.*]] = alloca i32, align 4 24406 // CHECK20-NEXT: store i32 0, i32* [[RETVAL]], align 4 24407 // CHECK20-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 24408 // CHECK20-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 24409 // CHECK20-NEXT: store i32 100, i32* [[N]], align 4 24410 // CHECK20-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 24411 // CHECK20-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 24412 // CHECK20-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 24413 // CHECK20-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 24414 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 24415 // CHECK20-NEXT: store i32 10, i32* [[M]], align 4 24416 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 24417 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 24418 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 24419 // CHECK20-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4 24420 // CHECK20-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64 24421 // CHECK20-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 24422 // CHECK20-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes to i8*), i32 24, i1 false) 24423 // CHECK20-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 24424 // CHECK20-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 24425 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4 24426 // CHECK20-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 24427 // CHECK20-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 24428 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 24429 // CHECK20-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 24430 // CHECK20-NEXT: store i8* null, i8** [[TMP11]], align 4 24431 // CHECK20-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 24432 // CHECK20-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 24433 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4 24434 // CHECK20-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 24435 // CHECK20-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 24436 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4 24437 // CHECK20-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 24438 // CHECK20-NEXT: store i8* null, i8** [[TMP16]], align 4 24439 // CHECK20-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 24440 // CHECK20-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 24441 // CHECK20-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 4 24442 // CHECK20-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 24443 // CHECK20-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 24444 // CHECK20-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 4 24445 // CHECK20-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 24446 // CHECK20-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 4 24447 // CHECK20-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 24448 // CHECK20-NEXT: store i8* null, i8** [[TMP22]], align 4 24449 // CHECK20-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 24450 // CHECK20-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 24451 // CHECK20-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 24452 // CHECK20-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 24453 // CHECK20-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 24454 // CHECK20-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 24455 // CHECK20-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 24456 // CHECK20-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 24457 // CHECK20-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 24458 // CHECK20-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 24459 // CHECK20-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 24460 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 24461 // CHECK20-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 24462 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP29]]) 24463 // CHECK20-NEXT: [[TMP30:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, i32 3, i8** [[TMP23]], i8** [[TMP24]], i64* [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 24464 // CHECK20-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 24465 // CHECK20-NEXT: br i1 [[TMP31]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 24466 // CHECK20: omp_offload.failed: 24467 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 24468 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT]] 24469 // CHECK20: omp_offload.cont: 24470 // CHECK20-NEXT: [[TMP32:%.*]] = load i32, i32* [[N]], align 4 24471 // CHECK20-NEXT: store i32 [[TMP32]], i32* [[N_CASTED3]], align 4 24472 // CHECK20-NEXT: [[TMP33:%.*]] = load i32, i32* [[N_CASTED3]], align 4 24473 // CHECK20-NEXT: [[TMP34:%.*]] = mul nuw i32 [[TMP0]], 4 24474 // CHECK20-NEXT: [[TMP35:%.*]] = sext i32 [[TMP34]] to i64 24475 // CHECK20-NEXT: [[TMP36:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES7]] to i8* 24476 // CHECK20-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP36]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.4 to i8*), i32 24, i1 false) 24477 // CHECK20-NEXT: [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 24478 // CHECK20-NEXT: [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32* 24479 // CHECK20-NEXT: store i32 [[TMP33]], i32* [[TMP38]], align 4 24480 // CHECK20-NEXT: [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 24481 // CHECK20-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32* 24482 // CHECK20-NEXT: store i32 [[TMP33]], i32* [[TMP40]], align 4 24483 // CHECK20-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0 24484 // CHECK20-NEXT: store i8* null, i8** [[TMP41]], align 4 24485 // CHECK20-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 24486 // CHECK20-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i32* 24487 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[TMP43]], align 4 24488 // CHECK20-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 24489 // CHECK20-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i32* 24490 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[TMP45]], align 4 24491 // CHECK20-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1 24492 // CHECK20-NEXT: store i8* null, i8** [[TMP46]], align 4 24493 // CHECK20-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 24494 // CHECK20-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32** 24495 // CHECK20-NEXT: store i32* [[VLA]], i32** [[TMP48]], align 4 24496 // CHECK20-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 24497 // CHECK20-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32** 24498 // CHECK20-NEXT: store i32* [[VLA]], i32** [[TMP50]], align 4 24499 // CHECK20-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2 24500 // CHECK20-NEXT: store i64 [[TMP35]], i64* [[TMP51]], align 4 24501 // CHECK20-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2 24502 // CHECK20-NEXT: store i8* null, i8** [[TMP52]], align 4 24503 // CHECK20-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 24504 // CHECK20-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 24505 // CHECK20-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0 24506 // CHECK20-NEXT: [[TMP56:%.*]] = load i32, i32* [[N]], align 4 24507 // CHECK20-NEXT: store i32 [[TMP56]], i32* [[DOTCAPTURE_EXPR_9]], align 4 24508 // CHECK20-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4 24509 // CHECK20-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP57]], 0 24510 // CHECK20-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 24511 // CHECK20-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 24512 // CHECK20-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4 24513 // CHECK20-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 24514 // CHECK20-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP58]], 1 24515 // CHECK20-NEXT: [[TMP59:%.*]] = zext i32 [[ADD14]] to i64 24516 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP59]]) 24517 // CHECK20-NEXT: [[TMP60:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, i32 3, i8** [[TMP53]], i8** [[TMP54]], i64* [[TMP55]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 24518 // CHECK20-NEXT: [[TMP61:%.*]] = icmp ne i32 [[TMP60]], 0 24519 // CHECK20-NEXT: br i1 [[TMP61]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]] 24520 // CHECK20: omp_offload.failed15: 24521 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i32 [[TMP33]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 24522 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT16]] 24523 // CHECK20: omp_offload.cont16: 24524 // CHECK20-NEXT: [[TMP62:%.*]] = load i32, i32* [[M]], align 4 24525 // CHECK20-NEXT: store i32 [[TMP62]], i32* [[M_CASTED]], align 4 24526 // CHECK20-NEXT: [[TMP63:%.*]] = load i32, i32* [[M_CASTED]], align 4 24527 // CHECK20-NEXT: [[TMP64:%.*]] = load i32, i32* [[N]], align 4 24528 // CHECK20-NEXT: store i32 [[TMP64]], i32* [[N_CASTED17]], align 4 24529 // CHECK20-NEXT: [[TMP65:%.*]] = load i32, i32* [[N_CASTED17]], align 4 24530 // CHECK20-NEXT: [[TMP66:%.*]] = mul nuw i32 [[TMP0]], 4 24531 // CHECK20-NEXT: [[TMP67:%.*]] = sext i32 [[TMP66]] to i64 24532 // CHECK20-NEXT: [[TMP68:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES21]] to i8* 24533 // CHECK20-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP68]], i8* align 4 bitcast ([4 x i64]* @.offload_sizes.8 to i8*), i32 32, i1 false) 24534 // CHECK20-NEXT: [[TMP69:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0 24535 // CHECK20-NEXT: [[TMP70:%.*]] = bitcast i8** [[TMP69]] to i32* 24536 // CHECK20-NEXT: store i32 [[TMP63]], i32* [[TMP70]], align 4 24537 // CHECK20-NEXT: [[TMP71:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0 24538 // CHECK20-NEXT: [[TMP72:%.*]] = bitcast i8** [[TMP71]] to i32* 24539 // CHECK20-NEXT: store i32 [[TMP63]], i32* [[TMP72]], align 4 24540 // CHECK20-NEXT: [[TMP73:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 0 24541 // CHECK20-NEXT: store i8* null, i8** [[TMP73]], align 4 24542 // CHECK20-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 1 24543 // CHECK20-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i32* 24544 // CHECK20-NEXT: store i32 [[TMP65]], i32* [[TMP75]], align 4 24545 // CHECK20-NEXT: [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 1 24546 // CHECK20-NEXT: [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i32* 24547 // CHECK20-NEXT: store i32 [[TMP65]], i32* [[TMP77]], align 4 24548 // CHECK20-NEXT: [[TMP78:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 1 24549 // CHECK20-NEXT: store i8* null, i8** [[TMP78]], align 4 24550 // CHECK20-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 2 24551 // CHECK20-NEXT: [[TMP80:%.*]] = bitcast i8** [[TMP79]] to i32* 24552 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[TMP80]], align 4 24553 // CHECK20-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 2 24554 // CHECK20-NEXT: [[TMP82:%.*]] = bitcast i8** [[TMP81]] to i32* 24555 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[TMP82]], align 4 24556 // CHECK20-NEXT: [[TMP83:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 2 24557 // CHECK20-NEXT: store i8* null, i8** [[TMP83]], align 4 24558 // CHECK20-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 3 24559 // CHECK20-NEXT: [[TMP85:%.*]] = bitcast i8** [[TMP84]] to i32** 24560 // CHECK20-NEXT: store i32* [[VLA]], i32** [[TMP85]], align 4 24561 // CHECK20-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 3 24562 // CHECK20-NEXT: [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i32** 24563 // CHECK20-NEXT: store i32* [[VLA]], i32** [[TMP87]], align 4 24564 // CHECK20-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 3 24565 // CHECK20-NEXT: store i64 [[TMP67]], i64* [[TMP88]], align 4 24566 // CHECK20-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 3 24567 // CHECK20-NEXT: store i8* null, i8** [[TMP89]], align 4 24568 // CHECK20-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0 24569 // CHECK20-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0 24570 // CHECK20-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0 24571 // CHECK20-NEXT: [[TMP93:%.*]] = load i32, i32* [[N]], align 4 24572 // CHECK20-NEXT: store i32 [[TMP93]], i32* [[DOTCAPTURE_EXPR_23]], align 4 24573 // CHECK20-NEXT: [[TMP94:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_23]], align 4 24574 // CHECK20-NEXT: [[SUB25:%.*]] = sub nsw i32 [[TMP94]], 0 24575 // CHECK20-NEXT: [[DIV26:%.*]] = sdiv i32 [[SUB25]], 1 24576 // CHECK20-NEXT: [[SUB27:%.*]] = sub nsw i32 [[DIV26]], 1 24577 // CHECK20-NEXT: store i32 [[SUB27]], i32* [[DOTCAPTURE_EXPR_24]], align 4 24578 // CHECK20-NEXT: [[TMP95:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4 24579 // CHECK20-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP95]], 1 24580 // CHECK20-NEXT: [[TMP96:%.*]] = zext i32 [[ADD28]] to i64 24581 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP96]]) 24582 // CHECK20-NEXT: [[TMP97:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, i32 4, i8** [[TMP90]], i8** [[TMP91]], i64* [[TMP92]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 24583 // CHECK20-NEXT: [[TMP98:%.*]] = icmp ne i32 [[TMP97]], 0 24584 // CHECK20-NEXT: br i1 [[TMP98]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]] 24585 // CHECK20: omp_offload.failed29: 24586 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i32 [[TMP63]], i32 [[TMP65]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 24587 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT30]] 24588 // CHECK20: omp_offload.cont30: 24589 // CHECK20-NEXT: [[TMP99:%.*]] = load i32, i32* [[N]], align 4 24590 // CHECK20-NEXT: store i32 [[TMP99]], i32* [[N_CASTED31]], align 4 24591 // CHECK20-NEXT: [[TMP100:%.*]] = load i32, i32* [[N_CASTED31]], align 4 24592 // CHECK20-NEXT: [[TMP101:%.*]] = mul nuw i32 [[TMP0]], 4 24593 // CHECK20-NEXT: [[TMP102:%.*]] = sext i32 [[TMP101]] to i64 24594 // CHECK20-NEXT: [[TMP103:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES35]] to i8* 24595 // CHECK20-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP103]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.12 to i8*), i32 24, i1 false) 24596 // CHECK20-NEXT: [[TMP104:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0 24597 // CHECK20-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to i32* 24598 // CHECK20-NEXT: store i32 [[TMP100]], i32* [[TMP105]], align 4 24599 // CHECK20-NEXT: [[TMP106:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0 24600 // CHECK20-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to i32* 24601 // CHECK20-NEXT: store i32 [[TMP100]], i32* [[TMP107]], align 4 24602 // CHECK20-NEXT: [[TMP108:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 0 24603 // CHECK20-NEXT: store i8* null, i8** [[TMP108]], align 4 24604 // CHECK20-NEXT: [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 1 24605 // CHECK20-NEXT: [[TMP110:%.*]] = bitcast i8** [[TMP109]] to i32* 24606 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[TMP110]], align 4 24607 // CHECK20-NEXT: [[TMP111:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 1 24608 // CHECK20-NEXT: [[TMP112:%.*]] = bitcast i8** [[TMP111]] to i32* 24609 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[TMP112]], align 4 24610 // CHECK20-NEXT: [[TMP113:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 1 24611 // CHECK20-NEXT: store i8* null, i8** [[TMP113]], align 4 24612 // CHECK20-NEXT: [[TMP114:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 2 24613 // CHECK20-NEXT: [[TMP115:%.*]] = bitcast i8** [[TMP114]] to i32** 24614 // CHECK20-NEXT: store i32* [[VLA]], i32** [[TMP115]], align 4 24615 // CHECK20-NEXT: [[TMP116:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 2 24616 // CHECK20-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to i32** 24617 // CHECK20-NEXT: store i32* [[VLA]], i32** [[TMP117]], align 4 24618 // CHECK20-NEXT: [[TMP118:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 2 24619 // CHECK20-NEXT: store i64 [[TMP102]], i64* [[TMP118]], align 4 24620 // CHECK20-NEXT: [[TMP119:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 2 24621 // CHECK20-NEXT: store i8* null, i8** [[TMP119]], align 4 24622 // CHECK20-NEXT: [[TMP120:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0 24623 // CHECK20-NEXT: [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0 24624 // CHECK20-NEXT: [[TMP122:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 0 24625 // CHECK20-NEXT: [[TMP123:%.*]] = load i32, i32* [[N]], align 4 24626 // CHECK20-NEXT: store i32 [[TMP123]], i32* [[DOTCAPTURE_EXPR_37]], align 4 24627 // CHECK20-NEXT: [[TMP124:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_37]], align 4 24628 // CHECK20-NEXT: [[SUB39:%.*]] = sub nsw i32 [[TMP124]], 0 24629 // CHECK20-NEXT: [[DIV40:%.*]] = sdiv i32 [[SUB39]], 1 24630 // CHECK20-NEXT: [[SUB41:%.*]] = sub nsw i32 [[DIV40]], 1 24631 // CHECK20-NEXT: store i32 [[SUB41]], i32* [[DOTCAPTURE_EXPR_38]], align 4 24632 // CHECK20-NEXT: [[TMP125:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_38]], align 4 24633 // CHECK20-NEXT: [[ADD42:%.*]] = add nsw i32 [[TMP125]], 1 24634 // CHECK20-NEXT: [[TMP126:%.*]] = zext i32 [[ADD42]] to i64 24635 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP126]]) 24636 // CHECK20-NEXT: [[TMP127:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, i32 3, i8** [[TMP120]], i8** [[TMP121]], i64* [[TMP122]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 24637 // CHECK20-NEXT: [[TMP128:%.*]] = icmp ne i32 [[TMP127]], 0 24638 // CHECK20-NEXT: br i1 [[TMP128]], label [[OMP_OFFLOAD_FAILED43:%.*]], label [[OMP_OFFLOAD_CONT44:%.*]] 24639 // CHECK20: omp_offload.failed43: 24640 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i32 [[TMP100]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 24641 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT44]] 24642 // CHECK20: omp_offload.cont44: 24643 // CHECK20-NEXT: [[TMP129:%.*]] = load i32, i32* [[M]], align 4 24644 // CHECK20-NEXT: store i32 [[TMP129]], i32* [[M_CASTED45]], align 4 24645 // CHECK20-NEXT: [[TMP130:%.*]] = load i32, i32* [[M_CASTED45]], align 4 24646 // CHECK20-NEXT: [[TMP131:%.*]] = load i32, i32* [[N]], align 4 24647 // CHECK20-NEXT: store i32 [[TMP131]], i32* [[N_CASTED46]], align 4 24648 // CHECK20-NEXT: [[TMP132:%.*]] = load i32, i32* [[N_CASTED46]], align 4 24649 // CHECK20-NEXT: [[TMP133:%.*]] = mul nuw i32 [[TMP0]], 4 24650 // CHECK20-NEXT: [[TMP134:%.*]] = sext i32 [[TMP133]] to i64 24651 // CHECK20-NEXT: [[TMP135:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES50]] to i8* 24652 // CHECK20-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP135]], i8* align 4 bitcast ([4 x i64]* @.offload_sizes.16 to i8*), i32 32, i1 false) 24653 // CHECK20-NEXT: [[TMP136:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0 24654 // CHECK20-NEXT: [[TMP137:%.*]] = bitcast i8** [[TMP136]] to i32* 24655 // CHECK20-NEXT: store i32 [[TMP130]], i32* [[TMP137]], align 4 24656 // CHECK20-NEXT: [[TMP138:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0 24657 // CHECK20-NEXT: [[TMP139:%.*]] = bitcast i8** [[TMP138]] to i32* 24658 // CHECK20-NEXT: store i32 [[TMP130]], i32* [[TMP139]], align 4 24659 // CHECK20-NEXT: [[TMP140:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 0 24660 // CHECK20-NEXT: store i8* null, i8** [[TMP140]], align 4 24661 // CHECK20-NEXT: [[TMP141:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 1 24662 // CHECK20-NEXT: [[TMP142:%.*]] = bitcast i8** [[TMP141]] to i32* 24663 // CHECK20-NEXT: store i32 [[TMP132]], i32* [[TMP142]], align 4 24664 // CHECK20-NEXT: [[TMP143:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 1 24665 // CHECK20-NEXT: [[TMP144:%.*]] = bitcast i8** [[TMP143]] to i32* 24666 // CHECK20-NEXT: store i32 [[TMP132]], i32* [[TMP144]], align 4 24667 // CHECK20-NEXT: [[TMP145:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 1 24668 // CHECK20-NEXT: store i8* null, i8** [[TMP145]], align 4 24669 // CHECK20-NEXT: [[TMP146:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 2 24670 // CHECK20-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i32* 24671 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[TMP147]], align 4 24672 // CHECK20-NEXT: [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 2 24673 // CHECK20-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i32* 24674 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[TMP149]], align 4 24675 // CHECK20-NEXT: [[TMP150:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 2 24676 // CHECK20-NEXT: store i8* null, i8** [[TMP150]], align 4 24677 // CHECK20-NEXT: [[TMP151:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 3 24678 // CHECK20-NEXT: [[TMP152:%.*]] = bitcast i8** [[TMP151]] to i32** 24679 // CHECK20-NEXT: store i32* [[VLA]], i32** [[TMP152]], align 4 24680 // CHECK20-NEXT: [[TMP153:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 3 24681 // CHECK20-NEXT: [[TMP154:%.*]] = bitcast i8** [[TMP153]] to i32** 24682 // CHECK20-NEXT: store i32* [[VLA]], i32** [[TMP154]], align 4 24683 // CHECK20-NEXT: [[TMP155:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 3 24684 // CHECK20-NEXT: store i64 [[TMP134]], i64* [[TMP155]], align 4 24685 // CHECK20-NEXT: [[TMP156:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 3 24686 // CHECK20-NEXT: store i8* null, i8** [[TMP156]], align 4 24687 // CHECK20-NEXT: [[TMP157:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0 24688 // CHECK20-NEXT: [[TMP158:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0 24689 // CHECK20-NEXT: [[TMP159:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 0 24690 // CHECK20-NEXT: [[TMP160:%.*]] = load i32, i32* [[N]], align 4 24691 // CHECK20-NEXT: store i32 [[TMP160]], i32* [[DOTCAPTURE_EXPR_52]], align 4 24692 // CHECK20-NEXT: [[TMP161:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_52]], align 4 24693 // CHECK20-NEXT: [[SUB54:%.*]] = sub nsw i32 [[TMP161]], 0 24694 // CHECK20-NEXT: [[DIV55:%.*]] = sdiv i32 [[SUB54]], 1 24695 // CHECK20-NEXT: [[SUB56:%.*]] = sub nsw i32 [[DIV55]], 1 24696 // CHECK20-NEXT: store i32 [[SUB56]], i32* [[DOTCAPTURE_EXPR_53]], align 4 24697 // CHECK20-NEXT: [[TMP162:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_53]], align 4 24698 // CHECK20-NEXT: [[ADD57:%.*]] = add nsw i32 [[TMP162]], 1 24699 // CHECK20-NEXT: [[TMP163:%.*]] = zext i32 [[ADD57]] to i64 24700 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP163]]) 24701 // CHECK20-NEXT: [[TMP164:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, i32 4, i8** [[TMP157]], i8** [[TMP158]], i64* [[TMP159]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 24702 // CHECK20-NEXT: [[TMP165:%.*]] = icmp ne i32 [[TMP164]], 0 24703 // CHECK20-NEXT: br i1 [[TMP165]], label [[OMP_OFFLOAD_FAILED58:%.*]], label [[OMP_OFFLOAD_CONT59:%.*]] 24704 // CHECK20: omp_offload.failed58: 24705 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i32 [[TMP130]], i32 [[TMP132]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 24706 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT59]] 24707 // CHECK20: omp_offload.cont59: 24708 // CHECK20-NEXT: [[TMP166:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 24709 // CHECK20-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP166]]) 24710 // CHECK20-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 24711 // CHECK20-NEXT: [[TMP167:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 24712 // CHECK20-NEXT: call void @llvm.stackrestore(i8* [[TMP167]]) 24713 // CHECK20-NEXT: [[TMP168:%.*]] = load i32, i32* [[RETVAL]], align 4 24714 // CHECK20-NEXT: ret i32 [[TMP168]] 24715 // 24716 // 24717 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148 24718 // CHECK20-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 24719 // CHECK20-NEXT: entry: 24720 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 24721 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 24722 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 24723 // CHECK20-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 24724 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 24725 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 24726 // CHECK20-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 24727 // CHECK20-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 24728 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 24729 // CHECK20-NEXT: ret void 24730 // 24731 // 24732 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined. 24733 // CHECK20-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 24734 // CHECK20-NEXT: entry: 24735 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 24736 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 24737 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 24738 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 24739 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 24740 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 24741 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 24742 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 24743 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 24744 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 24745 // CHECK20-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 24746 // CHECK20-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 24747 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 24748 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 24749 // CHECK20-NEXT: [[I3:%.*]] = alloca i32, align 4 24750 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 24751 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 24752 // CHECK20-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 24753 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 24754 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 24755 // CHECK20-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 24756 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 24757 // CHECK20-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 24758 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 24759 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 24760 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 24761 // CHECK20-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 24762 // CHECK20-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 24763 // CHECK20-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 24764 // CHECK20-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 24765 // CHECK20-NEXT: store i32 0, i32* [[I]], align 4 24766 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 24767 // CHECK20-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 24768 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 24769 // CHECK20: omp.precond.then: 24770 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 24771 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 24772 // CHECK20-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 24773 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 24774 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 24775 // CHECK20-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 24776 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 24777 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 24778 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24779 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 24780 // CHECK20-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 24781 // CHECK20-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 24782 // CHECK20: cond.true: 24783 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 24784 // CHECK20-NEXT: br label [[COND_END:%.*]] 24785 // CHECK20: cond.false: 24786 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24787 // CHECK20-NEXT: br label [[COND_END]] 24788 // CHECK20: cond.end: 24789 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 24790 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 24791 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 24792 // CHECK20-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 24793 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 24794 // CHECK20: omp.inner.for.cond: 24795 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24796 // CHECK20-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24797 // CHECK20-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 24798 // CHECK20-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 24799 // CHECK20: omp.inner.for.body: 24800 // CHECK20-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 24801 // CHECK20-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24802 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 24803 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 24804 // CHECK20: omp.inner.for.inc: 24805 // CHECK20-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24806 // CHECK20-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 24807 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 24808 // CHECK20-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 24809 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 24810 // CHECK20: omp.inner.for.end: 24811 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 24812 // CHECK20: omp.loop.exit: 24813 // CHECK20-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 24814 // CHECK20-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 24815 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 24816 // CHECK20-NEXT: br label [[OMP_PRECOND_END]] 24817 // CHECK20: omp.precond.end: 24818 // CHECK20-NEXT: ret void 24819 // 24820 // 24821 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..1 24822 // CHECK20-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 24823 // CHECK20-NEXT: entry: 24824 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 24825 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 24826 // CHECK20-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 24827 // CHECK20-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 24828 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 24829 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 24830 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 24831 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 24832 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 24833 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 24834 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 24835 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 24836 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 24837 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 24838 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 24839 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 24840 // CHECK20-NEXT: [[I3:%.*]] = alloca i32, align 4 24841 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 24842 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 24843 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 24844 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 24845 // CHECK20-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 24846 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 24847 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 24848 // CHECK20-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 24849 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 24850 // CHECK20-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 24851 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 24852 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 24853 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 24854 // CHECK20-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 24855 // CHECK20-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 24856 // CHECK20-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 24857 // CHECK20-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 24858 // CHECK20-NEXT: store i32 0, i32* [[I]], align 4 24859 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 24860 // CHECK20-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 24861 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 24862 // CHECK20: omp.precond.then: 24863 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 24864 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 24865 // CHECK20-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 24866 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 24867 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 24868 // CHECK20-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 24869 // CHECK20-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 24870 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 24871 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 24872 // CHECK20-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 24873 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 24874 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 24875 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 24876 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 24877 // CHECK20-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 24878 // CHECK20-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 24879 // CHECK20: cond.true: 24880 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 24881 // CHECK20-NEXT: br label [[COND_END:%.*]] 24882 // CHECK20: cond.false: 24883 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 24884 // CHECK20-NEXT: br label [[COND_END]] 24885 // CHECK20: cond.end: 24886 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 24887 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 24888 // CHECK20-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 24889 // CHECK20-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 24890 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 24891 // CHECK20: omp.inner.for.cond: 24892 // CHECK20-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24893 // CHECK20-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 24894 // CHECK20-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 24895 // CHECK20-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 24896 // CHECK20: omp.inner.for.body: 24897 // CHECK20-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24898 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 24899 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 24900 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 24901 // CHECK20-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4 24902 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]] 24903 // CHECK20-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 24904 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 24905 // CHECK20: omp.body.continue: 24906 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 24907 // CHECK20: omp.inner.for.inc: 24908 // CHECK20-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24909 // CHECK20-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1 24910 // CHECK20-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 24911 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 24912 // CHECK20: omp.inner.for.end: 24913 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 24914 // CHECK20: omp.loop.exit: 24915 // CHECK20-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 24916 // CHECK20-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 24917 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 24918 // CHECK20-NEXT: br label [[OMP_PRECOND_END]] 24919 // CHECK20: omp.precond.end: 24920 // CHECK20-NEXT: ret void 24921 // 24922 // 24923 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153 24924 // CHECK20-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 24925 // CHECK20-NEXT: entry: 24926 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 24927 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 24928 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 24929 // CHECK20-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 24930 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 24931 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 24932 // CHECK20-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 24933 // CHECK20-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 24934 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 24935 // CHECK20-NEXT: ret void 24936 // 24937 // 24938 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..2 24939 // CHECK20-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 24940 // CHECK20-NEXT: entry: 24941 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 24942 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 24943 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 24944 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 24945 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 24946 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 24947 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 24948 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 24949 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 24950 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 24951 // CHECK20-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 24952 // CHECK20-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 24953 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 24954 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 24955 // CHECK20-NEXT: [[I3:%.*]] = alloca i32, align 4 24956 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 24957 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 24958 // CHECK20-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 24959 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 24960 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 24961 // CHECK20-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 24962 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 24963 // CHECK20-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 24964 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 24965 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 24966 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 24967 // CHECK20-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 24968 // CHECK20-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 24969 // CHECK20-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 24970 // CHECK20-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 24971 // CHECK20-NEXT: store i32 0, i32* [[I]], align 4 24972 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 24973 // CHECK20-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 24974 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 24975 // CHECK20: omp.precond.then: 24976 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 24977 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 24978 // CHECK20-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 24979 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 24980 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 24981 // CHECK20-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 24982 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 24983 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 24984 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24985 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 24986 // CHECK20-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 24987 // CHECK20-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 24988 // CHECK20: cond.true: 24989 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 24990 // CHECK20-NEXT: br label [[COND_END:%.*]] 24991 // CHECK20: cond.false: 24992 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24993 // CHECK20-NEXT: br label [[COND_END]] 24994 // CHECK20: cond.end: 24995 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 24996 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 24997 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 24998 // CHECK20-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 24999 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 25000 // CHECK20: omp.inner.for.cond: 25001 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 25002 // CHECK20-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 25003 // CHECK20-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 25004 // CHECK20-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 25005 // CHECK20: omp.inner.for.body: 25006 // CHECK20-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 25007 // CHECK20-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 25008 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 25009 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 25010 // CHECK20: omp.inner.for.inc: 25011 // CHECK20-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 25012 // CHECK20-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 25013 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 25014 // CHECK20-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 25015 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 25016 // CHECK20: omp.inner.for.end: 25017 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 25018 // CHECK20: omp.loop.exit: 25019 // CHECK20-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 25020 // CHECK20-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 25021 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 25022 // CHECK20-NEXT: br label [[OMP_PRECOND_END]] 25023 // CHECK20: omp.precond.end: 25024 // CHECK20-NEXT: ret void 25025 // 25026 // 25027 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..3 25028 // CHECK20-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 25029 // CHECK20-NEXT: entry: 25030 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 25031 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 25032 // CHECK20-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 25033 // CHECK20-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 25034 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 25035 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 25036 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 25037 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 25038 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 25039 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 25040 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 25041 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 25042 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 25043 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 25044 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 25045 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 25046 // CHECK20-NEXT: [[I3:%.*]] = alloca i32, align 4 25047 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 25048 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 25049 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 25050 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 25051 // CHECK20-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 25052 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 25053 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 25054 // CHECK20-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 25055 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 25056 // CHECK20-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 25057 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 25058 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 25059 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 25060 // CHECK20-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 25061 // CHECK20-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 25062 // CHECK20-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 25063 // CHECK20-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 25064 // CHECK20-NEXT: store i32 0, i32* [[I]], align 4 25065 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 25066 // CHECK20-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 25067 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 25068 // CHECK20: omp.precond.then: 25069 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 25070 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 25071 // CHECK20-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 25072 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 25073 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 25074 // CHECK20-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 25075 // CHECK20-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 25076 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 25077 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 25078 // CHECK20-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 25079 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 25080 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 25081 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 25082 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 25083 // CHECK20-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 25084 // CHECK20-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 25085 // CHECK20: cond.true: 25086 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 25087 // CHECK20-NEXT: br label [[COND_END:%.*]] 25088 // CHECK20: cond.false: 25089 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 25090 // CHECK20-NEXT: br label [[COND_END]] 25091 // CHECK20: cond.end: 25092 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 25093 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 25094 // CHECK20-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 25095 // CHECK20-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 25096 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 25097 // CHECK20: omp.inner.for.cond: 25098 // CHECK20-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 25099 // CHECK20-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 25100 // CHECK20-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 25101 // CHECK20-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 25102 // CHECK20: omp.inner.for.body: 25103 // CHECK20-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 25104 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 25105 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 25106 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 25107 // CHECK20-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4 25108 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]] 25109 // CHECK20-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 25110 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 25111 // CHECK20: omp.body.continue: 25112 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 25113 // CHECK20: omp.inner.for.inc: 25114 // CHECK20-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 25115 // CHECK20-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1 25116 // CHECK20-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 25117 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 25118 // CHECK20: omp.inner.for.end: 25119 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 25120 // CHECK20: omp.loop.exit: 25121 // CHECK20-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 25122 // CHECK20-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 25123 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 25124 // CHECK20-NEXT: br label [[OMP_PRECOND_END]] 25125 // CHECK20: omp.precond.end: 25126 // CHECK20-NEXT: ret void 25127 // 25128 // 25129 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158 25130 // CHECK20-SAME: (i32 noundef [[M:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 25131 // CHECK20-NEXT: entry: 25132 // CHECK20-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 25133 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 25134 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 25135 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 25136 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 25137 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 25138 // CHECK20-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 25139 // CHECK20-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 25140 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 25141 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 25142 // CHECK20-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 25143 // CHECK20-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 25144 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4 25145 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 25146 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 25147 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 25148 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 25149 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]]) 25150 // CHECK20-NEXT: ret void 25151 // 25152 // 25153 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..6 25154 // CHECK20-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 25155 // CHECK20-NEXT: entry: 25156 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 25157 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 25158 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 25159 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 25160 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 25161 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 25162 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 25163 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 25164 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 25165 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 25166 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 25167 // CHECK20-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 25168 // CHECK20-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 25169 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 25170 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 25171 // CHECK20-NEXT: [[I4:%.*]] = alloca i32, align 4 25172 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 25173 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 25174 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 25175 // CHECK20-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 25176 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 25177 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 25178 // CHECK20-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 25179 // CHECK20-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 25180 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 25181 // CHECK20-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 25182 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 25183 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 25184 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 25185 // CHECK20-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 25186 // CHECK20-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 25187 // CHECK20-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 25188 // CHECK20-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 25189 // CHECK20-NEXT: store i32 0, i32* [[I]], align 4 25190 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 25191 // CHECK20-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 25192 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 25193 // CHECK20: omp.precond.then: 25194 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 25195 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 25196 // CHECK20-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 25197 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 25198 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 25199 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 25200 // CHECK20-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 25201 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 25202 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]]) 25203 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 25204 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 25205 // CHECK20-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 25206 // CHECK20-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 25207 // CHECK20: cond.true: 25208 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 25209 // CHECK20-NEXT: br label [[COND_END:%.*]] 25210 // CHECK20: cond.false: 25211 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 25212 // CHECK20-NEXT: br label [[COND_END]] 25213 // CHECK20: cond.end: 25214 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 25215 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 25216 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 25217 // CHECK20-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 25218 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 25219 // CHECK20: omp.inner.for.cond: 25220 // CHECK20-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 25221 // CHECK20-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 25222 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1 25223 // CHECK20-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]] 25224 // CHECK20-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 25225 // CHECK20: omp.inner.for.body: 25226 // CHECK20-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 25227 // CHECK20-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 25228 // CHECK20-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 25229 // CHECK20-NEXT: store i32 [[TMP19]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 25230 // CHECK20-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 25231 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP20]]) 25232 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 25233 // CHECK20: omp.inner.for.inc: 25234 // CHECK20-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 25235 // CHECK20-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 25236 // CHECK20-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 25237 // CHECK20-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 25238 // CHECK20-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 25239 // CHECK20-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 25240 // CHECK20-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 25241 // CHECK20-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4 25242 // CHECK20-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 25243 // CHECK20-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 25244 // CHECK20-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 25245 // CHECK20-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4 25246 // CHECK20-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 25247 // CHECK20-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 25248 // CHECK20-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP27]], [[TMP28]] 25249 // CHECK20-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]] 25250 // CHECK20: cond.true11: 25251 // CHECK20-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 25252 // CHECK20-NEXT: br label [[COND_END13:%.*]] 25253 // CHECK20: cond.false12: 25254 // CHECK20-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 25255 // CHECK20-NEXT: br label [[COND_END13]] 25256 // CHECK20: cond.end13: 25257 // CHECK20-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP29]], [[COND_TRUE11]] ], [ [[TMP30]], [[COND_FALSE12]] ] 25258 // CHECK20-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4 25259 // CHECK20-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 25260 // CHECK20-NEXT: store i32 [[TMP31]], i32* [[DOTOMP_IV]], align 4 25261 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 25262 // CHECK20: omp.inner.for.end: 25263 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 25264 // CHECK20: omp.loop.exit: 25265 // CHECK20-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 25266 // CHECK20-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4 25267 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]]) 25268 // CHECK20-NEXT: br label [[OMP_PRECOND_END]] 25269 // CHECK20: omp.precond.end: 25270 // CHECK20-NEXT: ret void 25271 // 25272 // 25273 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..7 25274 // CHECK20-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 25275 // CHECK20-NEXT: entry: 25276 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 25277 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 25278 // CHECK20-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 25279 // CHECK20-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 25280 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 25281 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 25282 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 25283 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 25284 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 25285 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 25286 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 25287 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 25288 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 25289 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 25290 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 25291 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 25292 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 25293 // CHECK20-NEXT: [[I4:%.*]] = alloca i32, align 4 25294 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 25295 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 25296 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 25297 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 25298 // CHECK20-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 25299 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 25300 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 25301 // CHECK20-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 25302 // CHECK20-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 25303 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 25304 // CHECK20-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 25305 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 25306 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 25307 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 25308 // CHECK20-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 25309 // CHECK20-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 25310 // CHECK20-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 25311 // CHECK20-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 25312 // CHECK20-NEXT: store i32 0, i32* [[I]], align 4 25313 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 25314 // CHECK20-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 25315 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 25316 // CHECK20: omp.precond.then: 25317 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 25318 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 25319 // CHECK20-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 25320 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 25321 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 25322 // CHECK20-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 25323 // CHECK20-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 25324 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 25325 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 25326 // CHECK20-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 25327 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 25328 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 25329 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 25330 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 25331 // CHECK20-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 25332 // CHECK20-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 25333 // CHECK20: cond.true: 25334 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 25335 // CHECK20-NEXT: br label [[COND_END:%.*]] 25336 // CHECK20: cond.false: 25337 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 25338 // CHECK20-NEXT: br label [[COND_END]] 25339 // CHECK20: cond.end: 25340 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 25341 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 25342 // CHECK20-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 25343 // CHECK20-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 25344 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 25345 // CHECK20: omp.inner.for.cond: 25346 // CHECK20-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 25347 // CHECK20-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 25348 // CHECK20-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 25349 // CHECK20-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 25350 // CHECK20: omp.inner.for.body: 25351 // CHECK20-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 25352 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 25353 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 25354 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 25355 // CHECK20-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4 25356 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]] 25357 // CHECK20-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 25358 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 25359 // CHECK20: omp.body.continue: 25360 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 25361 // CHECK20: omp.inner.for.inc: 25362 // CHECK20-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 25363 // CHECK20-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 25364 // CHECK20-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 25365 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 25366 // CHECK20: omp.inner.for.end: 25367 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 25368 // CHECK20: omp.loop.exit: 25369 // CHECK20-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 25370 // CHECK20-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 25371 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 25372 // CHECK20-NEXT: br label [[OMP_PRECOND_END]] 25373 // CHECK20: omp.precond.end: 25374 // CHECK20-NEXT: ret void 25375 // 25376 // 25377 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163 25378 // CHECK20-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 25379 // CHECK20-NEXT: entry: 25380 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 25381 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 25382 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 25383 // CHECK20-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 25384 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 25385 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 25386 // CHECK20-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 25387 // CHECK20-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 25388 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 25389 // CHECK20-NEXT: ret void 25390 // 25391 // 25392 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..10 25393 // CHECK20-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 25394 // CHECK20-NEXT: entry: 25395 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 25396 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 25397 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 25398 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 25399 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 25400 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 25401 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 25402 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 25403 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 25404 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 25405 // CHECK20-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 25406 // CHECK20-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 25407 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 25408 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 25409 // CHECK20-NEXT: [[I3:%.*]] = alloca i32, align 4 25410 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 25411 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 25412 // CHECK20-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 25413 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 25414 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 25415 // CHECK20-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 25416 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 25417 // CHECK20-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 25418 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 25419 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 25420 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 25421 // CHECK20-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 25422 // CHECK20-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 25423 // CHECK20-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 25424 // CHECK20-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 25425 // CHECK20-NEXT: store i32 0, i32* [[I]], align 4 25426 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 25427 // CHECK20-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 25428 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 25429 // CHECK20: omp.precond.then: 25430 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 25431 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 25432 // CHECK20-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 25433 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 25434 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 25435 // CHECK20-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 25436 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 25437 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 25438 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 25439 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 25440 // CHECK20-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 25441 // CHECK20-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 25442 // CHECK20: cond.true: 25443 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 25444 // CHECK20-NEXT: br label [[COND_END:%.*]] 25445 // CHECK20: cond.false: 25446 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 25447 // CHECK20-NEXT: br label [[COND_END]] 25448 // CHECK20: cond.end: 25449 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 25450 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 25451 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 25452 // CHECK20-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 25453 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 25454 // CHECK20: omp.inner.for.cond: 25455 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 25456 // CHECK20-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 25457 // CHECK20-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 25458 // CHECK20-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 25459 // CHECK20: omp.inner.for.body: 25460 // CHECK20-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 25461 // CHECK20-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 25462 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 25463 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 25464 // CHECK20: omp.inner.for.inc: 25465 // CHECK20-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 25466 // CHECK20-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 25467 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 25468 // CHECK20-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 25469 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 25470 // CHECK20: omp.inner.for.end: 25471 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 25472 // CHECK20: omp.loop.exit: 25473 // CHECK20-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 25474 // CHECK20-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 25475 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 25476 // CHECK20-NEXT: br label [[OMP_PRECOND_END]] 25477 // CHECK20: omp.precond.end: 25478 // CHECK20-NEXT: ret void 25479 // 25480 // 25481 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..11 25482 // CHECK20-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 25483 // CHECK20-NEXT: entry: 25484 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 25485 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 25486 // CHECK20-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 25487 // CHECK20-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 25488 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 25489 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 25490 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 25491 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 25492 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 25493 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 25494 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 25495 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 25496 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 25497 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 25498 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 25499 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 25500 // CHECK20-NEXT: [[I3:%.*]] = alloca i32, align 4 25501 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 25502 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 25503 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 25504 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 25505 // CHECK20-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 25506 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 25507 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 25508 // CHECK20-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 25509 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 25510 // CHECK20-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 25511 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 25512 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 25513 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 25514 // CHECK20-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 25515 // CHECK20-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 25516 // CHECK20-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 25517 // CHECK20-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 25518 // CHECK20-NEXT: store i32 0, i32* [[I]], align 4 25519 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 25520 // CHECK20-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 25521 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 25522 // CHECK20: omp.precond.then: 25523 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 25524 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 25525 // CHECK20-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 25526 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 25527 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 25528 // CHECK20-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 25529 // CHECK20-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 25530 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 25531 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 25532 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 25533 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 25534 // CHECK20-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 25535 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 25536 // CHECK20-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1) 25537 // CHECK20-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 25538 // CHECK20: omp.dispatch.cond: 25539 // CHECK20-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 25540 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 25541 // CHECK20-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 25542 // CHECK20-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 25543 // CHECK20-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 25544 // CHECK20: omp.dispatch.body: 25545 // CHECK20-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 25546 // CHECK20-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 25547 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 25548 // CHECK20: omp.inner.for.cond: 25549 // CHECK20-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 25550 // CHECK20-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16 25551 // CHECK20-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 25552 // CHECK20-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 25553 // CHECK20: omp.inner.for.body: 25554 // CHECK20-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 25555 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 25556 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 25557 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !16 25558 // CHECK20-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !16 25559 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP20]] 25560 // CHECK20-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !16 25561 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 25562 // CHECK20: omp.body.continue: 25563 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 25564 // CHECK20: omp.inner.for.inc: 25565 // CHECK20-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 25566 // CHECK20-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP21]], 1 25567 // CHECK20-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 25568 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]] 25569 // CHECK20: omp.inner.for.end: 25570 // CHECK20-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 25571 // CHECK20: omp.dispatch.inc: 25572 // CHECK20-NEXT: br label [[OMP_DISPATCH_COND]] 25573 // CHECK20: omp.dispatch.end: 25574 // CHECK20-NEXT: br label [[OMP_PRECOND_END]] 25575 // CHECK20: omp.precond.end: 25576 // CHECK20-NEXT: ret void 25577 // 25578 // 25579 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168 25580 // CHECK20-SAME: (i32 noundef [[M:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 25581 // CHECK20-NEXT: entry: 25582 // CHECK20-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 25583 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 25584 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 25585 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 25586 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 25587 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 25588 // CHECK20-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 25589 // CHECK20-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 25590 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 25591 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 25592 // CHECK20-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 25593 // CHECK20-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 25594 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4 25595 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 25596 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 25597 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 25598 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 25599 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]]) 25600 // CHECK20-NEXT: ret void 25601 // 25602 // 25603 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..14 25604 // CHECK20-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 25605 // CHECK20-NEXT: entry: 25606 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 25607 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 25608 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 25609 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 25610 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 25611 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 25612 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 25613 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 25614 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 25615 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 25616 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 25617 // CHECK20-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 25618 // CHECK20-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 25619 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 25620 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 25621 // CHECK20-NEXT: [[I4:%.*]] = alloca i32, align 4 25622 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 25623 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 25624 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 25625 // CHECK20-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 25626 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 25627 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 25628 // CHECK20-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 25629 // CHECK20-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 25630 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 25631 // CHECK20-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 25632 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 25633 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 25634 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 25635 // CHECK20-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 25636 // CHECK20-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 25637 // CHECK20-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 25638 // CHECK20-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 25639 // CHECK20-NEXT: store i32 0, i32* [[I]], align 4 25640 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 25641 // CHECK20-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 25642 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 25643 // CHECK20: omp.precond.then: 25644 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 25645 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 25646 // CHECK20-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 25647 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 25648 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 25649 // CHECK20-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 25650 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 25651 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 25652 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 25653 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 25654 // CHECK20-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 25655 // CHECK20-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 25656 // CHECK20: cond.true: 25657 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 25658 // CHECK20-NEXT: br label [[COND_END:%.*]] 25659 // CHECK20: cond.false: 25660 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 25661 // CHECK20-NEXT: br label [[COND_END]] 25662 // CHECK20: cond.end: 25663 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 25664 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 25665 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 25666 // CHECK20-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 25667 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 25668 // CHECK20: omp.inner.for.cond: 25669 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 25670 // CHECK20-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 25671 // CHECK20-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 25672 // CHECK20-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 25673 // CHECK20: omp.inner.for.body: 25674 // CHECK20-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 25675 // CHECK20-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 25676 // CHECK20-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 25677 // CHECK20-NEXT: store i32 [[TMP18]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 25678 // CHECK20-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 25679 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP19]]) 25680 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 25681 // CHECK20: omp.inner.for.inc: 25682 // CHECK20-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 25683 // CHECK20-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 25684 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 25685 // CHECK20-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 25686 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 25687 // CHECK20: omp.inner.for.end: 25688 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 25689 // CHECK20: omp.loop.exit: 25690 // CHECK20-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 25691 // CHECK20-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 25692 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 25693 // CHECK20-NEXT: br label [[OMP_PRECOND_END]] 25694 // CHECK20: omp.precond.end: 25695 // CHECK20-NEXT: ret void 25696 // 25697 // 25698 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..15 25699 // CHECK20-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 25700 // CHECK20-NEXT: entry: 25701 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 25702 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 25703 // CHECK20-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 25704 // CHECK20-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 25705 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 25706 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 25707 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 25708 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 25709 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 25710 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 25711 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 25712 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 25713 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 25714 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 25715 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 25716 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 25717 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 25718 // CHECK20-NEXT: [[I4:%.*]] = alloca i32, align 4 25719 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 25720 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 25721 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 25722 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 25723 // CHECK20-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 25724 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 25725 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 25726 // CHECK20-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 25727 // CHECK20-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 25728 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 25729 // CHECK20-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 25730 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 25731 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 25732 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 25733 // CHECK20-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 25734 // CHECK20-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 25735 // CHECK20-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 25736 // CHECK20-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 25737 // CHECK20-NEXT: store i32 0, i32* [[I]], align 4 25738 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 25739 // CHECK20-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 25740 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 25741 // CHECK20: omp.precond.then: 25742 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 25743 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 25744 // CHECK20-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 25745 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 25746 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 25747 // CHECK20-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 25748 // CHECK20-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 25749 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 25750 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 25751 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 25752 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 25753 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 25754 // CHECK20-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 25755 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 25756 // CHECK20-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]]) 25757 // CHECK20-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 25758 // CHECK20: omp.dispatch.cond: 25759 // CHECK20-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 25760 // CHECK20-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 25761 // CHECK20-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 25762 // CHECK20-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 25763 // CHECK20-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 25764 // CHECK20: omp.dispatch.body: 25765 // CHECK20-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 25766 // CHECK20-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 25767 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 25768 // CHECK20: omp.inner.for.cond: 25769 // CHECK20-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 25770 // CHECK20-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !19 25771 // CHECK20-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 25772 // CHECK20-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 25773 // CHECK20: omp.inner.for.body: 25774 // CHECK20-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 25775 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 25776 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 25777 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !19 25778 // CHECK20-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !19 25779 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP21]] 25780 // CHECK20-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !19 25781 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 25782 // CHECK20: omp.body.continue: 25783 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 25784 // CHECK20: omp.inner.for.inc: 25785 // CHECK20-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 25786 // CHECK20-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP22]], 1 25787 // CHECK20-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 25788 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]] 25789 // CHECK20: omp.inner.for.end: 25790 // CHECK20-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 25791 // CHECK20: omp.dispatch.inc: 25792 // CHECK20-NEXT: br label [[OMP_DISPATCH_COND]] 25793 // CHECK20: omp.dispatch.end: 25794 // CHECK20-NEXT: br label [[OMP_PRECOND_END]] 25795 // CHECK20: omp.precond.end: 25796 // CHECK20-NEXT: ret void 25797 // 25798 // 25799 // CHECK20-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 25800 // CHECK20-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 25801 // CHECK20-NEXT: entry: 25802 // CHECK20-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 25803 // CHECK20-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 25804 // CHECK20-NEXT: [[M:%.*]] = alloca i32, align 4 25805 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 25806 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 25807 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 25808 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 25809 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4 25810 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4 25811 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4 25812 // CHECK20-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 25813 // CHECK20-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4 25814 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 4 25815 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 4 25816 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 4 25817 // CHECK20-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 25818 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 4 25819 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 4 25820 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 4 25821 // CHECK20-NEXT: [[_TMP16:%.*]] = alloca i32, align 4 25822 // CHECK20-NEXT: [[M_CASTED19:%.*]] = alloca i32, align 4 25823 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [2 x i8*], align 4 25824 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [2 x i8*], align 4 25825 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [2 x i8*], align 4 25826 // CHECK20-NEXT: [[_TMP23:%.*]] = alloca i32, align 4 25827 // CHECK20-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 25828 // CHECK20-NEXT: store i32 10, i32* [[M]], align 4 25829 // CHECK20-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 25830 // CHECK20-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 25831 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4 25832 // CHECK20-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 25833 // CHECK20-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 25834 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4 25835 // CHECK20-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 25836 // CHECK20-NEXT: store i8* null, i8** [[TMP4]], align 4 25837 // CHECK20-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 25838 // CHECK20-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 25839 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 25840 // CHECK20-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.20, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.21, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 25841 // CHECK20-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 25842 // CHECK20-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 25843 // CHECK20: omp_offload.failed: 25844 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]] 25845 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT]] 25846 // CHECK20: omp_offload.cont: 25847 // CHECK20-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 25848 // CHECK20-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** 25849 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4 25850 // CHECK20-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 25851 // CHECK20-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** 25852 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4 25853 // CHECK20-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0 25854 // CHECK20-NEXT: store i8* null, i8** [[TMP13]], align 4 25855 // CHECK20-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 25856 // CHECK20-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 25857 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 25858 // CHECK20-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.24, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.25, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 25859 // CHECK20-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 25860 // CHECK20-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 25861 // CHECK20: omp_offload.failed5: 25862 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121([10 x i32]* [[A]]) #[[ATTR3]] 25863 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT6]] 25864 // CHECK20: omp_offload.cont6: 25865 // CHECK20-NEXT: [[TMP18:%.*]] = load i32, i32* [[M]], align 4 25866 // CHECK20-NEXT: store i32 [[TMP18]], i32* [[M_CASTED]], align 4 25867 // CHECK20-NEXT: [[TMP19:%.*]] = load i32, i32* [[M_CASTED]], align 4 25868 // CHECK20-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 25869 // CHECK20-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32* 25870 // CHECK20-NEXT: store i32 [[TMP19]], i32* [[TMP21]], align 4 25871 // CHECK20-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 25872 // CHECK20-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32* 25873 // CHECK20-NEXT: store i32 [[TMP19]], i32* [[TMP23]], align 4 25874 // CHECK20-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0 25875 // CHECK20-NEXT: store i8* null, i8** [[TMP24]], align 4 25876 // CHECK20-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1 25877 // CHECK20-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]** 25878 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 4 25879 // CHECK20-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1 25880 // CHECK20-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]** 25881 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 4 25882 // CHECK20-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 1 25883 // CHECK20-NEXT: store i8* null, i8** [[TMP29]], align 4 25884 // CHECK20-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 25885 // CHECK20-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 25886 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 25887 // CHECK20-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.28, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.29, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 25888 // CHECK20-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 25889 // CHECK20-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] 25890 // CHECK20: omp_offload.failed11: 25891 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i32 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]] 25892 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT12]] 25893 // CHECK20: omp_offload.cont12: 25894 // CHECK20-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 25895 // CHECK20-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]** 25896 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 4 25897 // CHECK20-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 25898 // CHECK20-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]** 25899 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 4 25900 // CHECK20-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 0 25901 // CHECK20-NEXT: store i8* null, i8** [[TMP38]], align 4 25902 // CHECK20-NEXT: [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 25903 // CHECK20-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 25904 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 25905 // CHECK20-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.32, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.33, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 25906 // CHECK20-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0 25907 // CHECK20-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]] 25908 // CHECK20: omp_offload.failed17: 25909 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131([10 x i32]* [[A]]) #[[ATTR3]] 25910 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT18]] 25911 // CHECK20: omp_offload.cont18: 25912 // CHECK20-NEXT: [[TMP43:%.*]] = load i32, i32* [[M]], align 4 25913 // CHECK20-NEXT: store i32 [[TMP43]], i32* [[M_CASTED19]], align 4 25914 // CHECK20-NEXT: [[TMP44:%.*]] = load i32, i32* [[M_CASTED19]], align 4 25915 // CHECK20-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 25916 // CHECK20-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32* 25917 // CHECK20-NEXT: store i32 [[TMP44]], i32* [[TMP46]], align 4 25918 // CHECK20-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 25919 // CHECK20-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32* 25920 // CHECK20-NEXT: store i32 [[TMP44]], i32* [[TMP48]], align 4 25921 // CHECK20-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 0 25922 // CHECK20-NEXT: store i8* null, i8** [[TMP49]], align 4 25923 // CHECK20-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1 25924 // CHECK20-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]** 25925 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 4 25926 // CHECK20-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 1 25927 // CHECK20-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]** 25928 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 4 25929 // CHECK20-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 1 25930 // CHECK20-NEXT: store i8* null, i8** [[TMP54]], align 4 25931 // CHECK20-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 25932 // CHECK20-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 25933 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 25934 // CHECK20-NEXT: [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.36, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.37, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 25935 // CHECK20-NEXT: [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0 25936 // CHECK20-NEXT: br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]] 25937 // CHECK20: omp_offload.failed24: 25938 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i32 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]] 25939 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT25]] 25940 // CHECK20: omp_offload.cont25: 25941 // CHECK20-NEXT: ret i32 0 25942 // 25943 // 25944 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116 25945 // CHECK20-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 25946 // CHECK20-NEXT: entry: 25947 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 25948 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 25949 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 25950 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 25951 // CHECK20-NEXT: ret void 25952 // 25953 // 25954 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..18 25955 // CHECK20-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 25956 // CHECK20-NEXT: entry: 25957 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 25958 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 25959 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 25960 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 25961 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 25962 // CHECK20-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 25963 // CHECK20-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 25964 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 25965 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 25966 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 25967 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 25968 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 25969 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 25970 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 25971 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 25972 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 25973 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 25974 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 25975 // CHECK20-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 25976 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 25977 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 25978 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 25979 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 25980 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 25981 // CHECK20: cond.true: 25982 // CHECK20-NEXT: br label [[COND_END:%.*]] 25983 // CHECK20: cond.false: 25984 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 25985 // CHECK20-NEXT: br label [[COND_END]] 25986 // CHECK20: cond.end: 25987 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 25988 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 25989 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 25990 // CHECK20-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 25991 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 25992 // CHECK20: omp.inner.for.cond: 25993 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 25994 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 25995 // CHECK20-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 25996 // CHECK20-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 25997 // CHECK20: omp.inner.for.body: 25998 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 25999 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 26000 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..19 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]) 26001 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 26002 // CHECK20: omp.inner.for.inc: 26003 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 26004 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 26005 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 26006 // CHECK20-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 26007 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 26008 // CHECK20: omp.inner.for.end: 26009 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 26010 // CHECK20: omp.loop.exit: 26011 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 26012 // CHECK20-NEXT: ret void 26013 // 26014 // 26015 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..19 26016 // CHECK20-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 26017 // CHECK20-NEXT: entry: 26018 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 26019 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 26020 // CHECK20-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 26021 // CHECK20-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 26022 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 26023 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 26024 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 26025 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 26026 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 26027 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 26028 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 26029 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 26030 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 26031 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 26032 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 26033 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 26034 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 26035 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 26036 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 26037 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 26038 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 26039 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 26040 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 26041 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 26042 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 26043 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 26044 // CHECK20-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 26045 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 26046 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 26047 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 26048 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 26049 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 26050 // CHECK20: cond.true: 26051 // CHECK20-NEXT: br label [[COND_END:%.*]] 26052 // CHECK20: cond.false: 26053 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 26054 // CHECK20-NEXT: br label [[COND_END]] 26055 // CHECK20: cond.end: 26056 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 26057 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 26058 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 26059 // CHECK20-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 26060 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 26061 // CHECK20: omp.inner.for.cond: 26062 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 26063 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 26064 // CHECK20-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 26065 // CHECK20-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 26066 // CHECK20: omp.inner.for.body: 26067 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 26068 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 26069 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 26070 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I]], align 4 26071 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 26072 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]] 26073 // CHECK20-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 26074 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 26075 // CHECK20: omp.body.continue: 26076 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 26077 // CHECK20: omp.inner.for.inc: 26078 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 26079 // CHECK20-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 26080 // CHECK20-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 26081 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 26082 // CHECK20: omp.inner.for.end: 26083 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 26084 // CHECK20: omp.loop.exit: 26085 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 26086 // CHECK20-NEXT: ret void 26087 // 26088 // 26089 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121 26090 // CHECK20-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 26091 // CHECK20-NEXT: entry: 26092 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 26093 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 26094 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 26095 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..22 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 26096 // CHECK20-NEXT: ret void 26097 // 26098 // 26099 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..22 26100 // CHECK20-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 26101 // CHECK20-NEXT: entry: 26102 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 26103 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 26104 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 26105 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 26106 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 26107 // CHECK20-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 26108 // CHECK20-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 26109 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 26110 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 26111 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 26112 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 26113 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 26114 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 26115 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 26116 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 26117 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 26118 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 26119 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 26120 // CHECK20-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 26121 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 26122 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 26123 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 26124 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 26125 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 26126 // CHECK20: cond.true: 26127 // CHECK20-NEXT: br label [[COND_END:%.*]] 26128 // CHECK20: cond.false: 26129 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 26130 // CHECK20-NEXT: br label [[COND_END]] 26131 // CHECK20: cond.end: 26132 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 26133 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 26134 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 26135 // CHECK20-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 26136 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 26137 // CHECK20: omp.inner.for.cond: 26138 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 26139 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 26140 // CHECK20-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 26141 // CHECK20-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 26142 // CHECK20: omp.inner.for.body: 26143 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 26144 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 26145 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..23 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]) 26146 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 26147 // CHECK20: omp.inner.for.inc: 26148 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 26149 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 26150 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 26151 // CHECK20-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 26152 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 26153 // CHECK20: omp.inner.for.end: 26154 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 26155 // CHECK20: omp.loop.exit: 26156 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 26157 // CHECK20-NEXT: ret void 26158 // 26159 // 26160 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..23 26161 // CHECK20-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 26162 // CHECK20-NEXT: entry: 26163 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 26164 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 26165 // CHECK20-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 26166 // CHECK20-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 26167 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 26168 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 26169 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 26170 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 26171 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 26172 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 26173 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 26174 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 26175 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 26176 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 26177 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 26178 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 26179 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 26180 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 26181 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 26182 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 26183 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 26184 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 26185 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 26186 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 26187 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 26188 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 26189 // CHECK20-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 26190 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 26191 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 26192 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 26193 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 26194 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 26195 // CHECK20: cond.true: 26196 // CHECK20-NEXT: br label [[COND_END:%.*]] 26197 // CHECK20: cond.false: 26198 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 26199 // CHECK20-NEXT: br label [[COND_END]] 26200 // CHECK20: cond.end: 26201 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 26202 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 26203 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 26204 // CHECK20-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 26205 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 26206 // CHECK20: omp.inner.for.cond: 26207 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 26208 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 26209 // CHECK20-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 26210 // CHECK20-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 26211 // CHECK20: omp.inner.for.body: 26212 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 26213 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 26214 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 26215 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I]], align 4 26216 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 26217 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]] 26218 // CHECK20-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 26219 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 26220 // CHECK20: omp.body.continue: 26221 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 26222 // CHECK20: omp.inner.for.inc: 26223 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 26224 // CHECK20-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 26225 // CHECK20-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 26226 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 26227 // CHECK20: omp.inner.for.end: 26228 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 26229 // CHECK20: omp.loop.exit: 26230 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 26231 // CHECK20-NEXT: ret void 26232 // 26233 // 26234 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126 26235 // CHECK20-SAME: (i32 noundef [[M:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 26236 // CHECK20-NEXT: entry: 26237 // CHECK20-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 26238 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 26239 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 26240 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 26241 // CHECK20-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 26242 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 26243 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 26244 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4 26245 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 26246 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 26247 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 26248 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 26249 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..26 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]]) 26250 // CHECK20-NEXT: ret void 26251 // 26252 // 26253 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..26 26254 // CHECK20-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 26255 // CHECK20-NEXT: entry: 26256 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 26257 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 26258 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 26259 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 26260 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 26261 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 26262 // CHECK20-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 26263 // CHECK20-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 26264 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 26265 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 26266 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 26267 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 26268 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 26269 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 26270 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 26271 // CHECK20-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 26272 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 26273 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 26274 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 26275 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 26276 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 26277 // CHECK20-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 26278 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 26279 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 26280 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 26281 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 26282 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 26283 // CHECK20: cond.true: 26284 // CHECK20-NEXT: br label [[COND_END:%.*]] 26285 // CHECK20: cond.false: 26286 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 26287 // CHECK20-NEXT: br label [[COND_END]] 26288 // CHECK20: cond.end: 26289 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 26290 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 26291 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 26292 // CHECK20-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 26293 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 26294 // CHECK20: omp.inner.for.cond: 26295 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 26296 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 26297 // CHECK20-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 26298 // CHECK20-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 26299 // CHECK20: omp.inner.for.body: 26300 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 26301 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 26302 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 26303 // CHECK20-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 26304 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 26305 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..27 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]]) 26306 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 26307 // CHECK20: omp.inner.for.inc: 26308 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 26309 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 26310 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 26311 // CHECK20-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 26312 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 26313 // CHECK20: omp.inner.for.end: 26314 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 26315 // CHECK20: omp.loop.exit: 26316 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 26317 // CHECK20-NEXT: ret void 26318 // 26319 // 26320 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..27 26321 // CHECK20-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 26322 // CHECK20-NEXT: entry: 26323 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 26324 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 26325 // CHECK20-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 26326 // CHECK20-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 26327 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 26328 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 26329 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 26330 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 26331 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 26332 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 26333 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 26334 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 26335 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 26336 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 26337 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 26338 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 26339 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 26340 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 26341 // CHECK20-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 26342 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 26343 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 26344 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 26345 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 26346 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 26347 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 26348 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 26349 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 26350 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 26351 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 26352 // CHECK20-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 26353 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 26354 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]]) 26355 // CHECK20-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 26356 // CHECK20: omp.dispatch.cond: 26357 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 26358 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 26359 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]] 26360 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 26361 // CHECK20: cond.true: 26362 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 26363 // CHECK20-NEXT: br label [[COND_END:%.*]] 26364 // CHECK20: cond.false: 26365 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 26366 // CHECK20-NEXT: br label [[COND_END]] 26367 // CHECK20: cond.end: 26368 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ [[TMP8]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 26369 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 26370 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 26371 // CHECK20-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 26372 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 26373 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 26374 // CHECK20-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 26375 // CHECK20-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 26376 // CHECK20: omp.dispatch.body: 26377 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 26378 // CHECK20: omp.inner.for.cond: 26379 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 26380 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 26381 // CHECK20-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 26382 // CHECK20-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 26383 // CHECK20: omp.inner.for.body: 26384 // CHECK20-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 26385 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 26386 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 26387 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I]], align 4 26388 // CHECK20-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4 26389 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP16]] 26390 // CHECK20-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 26391 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 26392 // CHECK20: omp.body.continue: 26393 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 26394 // CHECK20: omp.inner.for.inc: 26395 // CHECK20-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 26396 // CHECK20-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1 26397 // CHECK20-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 26398 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 26399 // CHECK20: omp.inner.for.end: 26400 // CHECK20-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 26401 // CHECK20: omp.dispatch.inc: 26402 // CHECK20-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 26403 // CHECK20-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 26404 // CHECK20-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 26405 // CHECK20-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 26406 // CHECK20-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 26407 // CHECK20-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 26408 // CHECK20-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 26409 // CHECK20-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 26410 // CHECK20-NEXT: br label [[OMP_DISPATCH_COND]] 26411 // CHECK20: omp.dispatch.end: 26412 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 26413 // CHECK20-NEXT: ret void 26414 // 26415 // 26416 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131 26417 // CHECK20-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 26418 // CHECK20-NEXT: entry: 26419 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 26420 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 26421 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 26422 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..30 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 26423 // CHECK20-NEXT: ret void 26424 // 26425 // 26426 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..30 26427 // CHECK20-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 26428 // CHECK20-NEXT: entry: 26429 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 26430 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 26431 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 26432 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 26433 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 26434 // CHECK20-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 26435 // CHECK20-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 26436 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 26437 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 26438 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 26439 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 26440 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 26441 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 26442 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 26443 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 26444 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 26445 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 26446 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 26447 // CHECK20-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 26448 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 26449 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 26450 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 26451 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 26452 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 26453 // CHECK20: cond.true: 26454 // CHECK20-NEXT: br label [[COND_END:%.*]] 26455 // CHECK20: cond.false: 26456 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 26457 // CHECK20-NEXT: br label [[COND_END]] 26458 // CHECK20: cond.end: 26459 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 26460 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 26461 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 26462 // CHECK20-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 26463 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 26464 // CHECK20: omp.inner.for.cond: 26465 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 26466 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 26467 // CHECK20-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 26468 // CHECK20-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 26469 // CHECK20: omp.inner.for.body: 26470 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 26471 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 26472 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..31 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]) 26473 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 26474 // CHECK20: omp.inner.for.inc: 26475 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 26476 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 26477 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 26478 // CHECK20-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 26479 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 26480 // CHECK20: omp.inner.for.end: 26481 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 26482 // CHECK20: omp.loop.exit: 26483 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 26484 // CHECK20-NEXT: ret void 26485 // 26486 // 26487 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..31 26488 // CHECK20-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 26489 // CHECK20-NEXT: entry: 26490 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 26491 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 26492 // CHECK20-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 26493 // CHECK20-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 26494 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 26495 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 26496 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 26497 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 26498 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 26499 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 26500 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 26501 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 26502 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 26503 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 26504 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 26505 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 26506 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 26507 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 26508 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 26509 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 26510 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 26511 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 26512 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 26513 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 26514 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 26515 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 26516 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 26517 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 26518 // CHECK20-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 26519 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 26520 // CHECK20-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 26521 // CHECK20-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 26522 // CHECK20: omp.dispatch.cond: 26523 // CHECK20-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 26524 // CHECK20-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 26525 // CHECK20-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 26526 // CHECK20: omp.dispatch.body: 26527 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 26528 // CHECK20-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 26529 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 26530 // CHECK20: omp.inner.for.cond: 26531 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 26532 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22 26533 // CHECK20-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 26534 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 26535 // CHECK20: omp.inner.for.body: 26536 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 26537 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 26538 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 26539 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22 26540 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !22 26541 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP12]] 26542 // CHECK20-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !22 26543 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 26544 // CHECK20: omp.body.continue: 26545 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 26546 // CHECK20: omp.inner.for.inc: 26547 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 26548 // CHECK20-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 26549 // CHECK20-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 26550 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]] 26551 // CHECK20: omp.inner.for.end: 26552 // CHECK20-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 26553 // CHECK20: omp.dispatch.inc: 26554 // CHECK20-NEXT: br label [[OMP_DISPATCH_COND]] 26555 // CHECK20: omp.dispatch.end: 26556 // CHECK20-NEXT: ret void 26557 // 26558 // 26559 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136 26560 // CHECK20-SAME: (i32 noundef [[M:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 26561 // CHECK20-NEXT: entry: 26562 // CHECK20-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 26563 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 26564 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 26565 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 26566 // CHECK20-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 26567 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 26568 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 26569 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4 26570 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 26571 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 26572 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 26573 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 26574 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..34 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]]) 26575 // CHECK20-NEXT: ret void 26576 // 26577 // 26578 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..34 26579 // CHECK20-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 26580 // CHECK20-NEXT: entry: 26581 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 26582 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 26583 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 26584 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 26585 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 26586 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 26587 // CHECK20-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 26588 // CHECK20-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 26589 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 26590 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 26591 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 26592 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 26593 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 26594 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 26595 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 26596 // CHECK20-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 26597 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 26598 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 26599 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 26600 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 26601 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 26602 // CHECK20-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 26603 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 26604 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 26605 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 26606 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 26607 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 26608 // CHECK20: cond.true: 26609 // CHECK20-NEXT: br label [[COND_END:%.*]] 26610 // CHECK20: cond.false: 26611 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 26612 // CHECK20-NEXT: br label [[COND_END]] 26613 // CHECK20: cond.end: 26614 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 26615 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 26616 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 26617 // CHECK20-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 26618 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 26619 // CHECK20: omp.inner.for.cond: 26620 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 26621 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 26622 // CHECK20-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 26623 // CHECK20-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 26624 // CHECK20: omp.inner.for.body: 26625 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 26626 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 26627 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 26628 // CHECK20-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 26629 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 26630 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..35 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]]) 26631 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 26632 // CHECK20: omp.inner.for.inc: 26633 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 26634 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 26635 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 26636 // CHECK20-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 26637 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 26638 // CHECK20: omp.inner.for.end: 26639 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 26640 // CHECK20: omp.loop.exit: 26641 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 26642 // CHECK20-NEXT: ret void 26643 // 26644 // 26645 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..35 26646 // CHECK20-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 26647 // CHECK20-NEXT: entry: 26648 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 26649 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 26650 // CHECK20-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 26651 // CHECK20-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 26652 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 26653 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 26654 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 26655 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 26656 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 26657 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 26658 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 26659 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 26660 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 26661 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 26662 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 26663 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 26664 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 26665 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 26666 // CHECK20-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 26667 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 26668 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 26669 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 26670 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 26671 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 26672 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 26673 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 26674 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 26675 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 26676 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 26677 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 26678 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 26679 // CHECK20-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 26680 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 26681 // CHECK20-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]]) 26682 // CHECK20-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 26683 // CHECK20: omp.dispatch.cond: 26684 // CHECK20-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 26685 // CHECK20-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0 26686 // CHECK20-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 26687 // CHECK20: omp.dispatch.body: 26688 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 26689 // CHECK20-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 26690 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 26691 // CHECK20: omp.inner.for.cond: 26692 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 26693 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25 26694 // CHECK20-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 26695 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 26696 // CHECK20: omp.inner.for.body: 26697 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 26698 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 26699 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 26700 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !25 26701 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !25 26702 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP13]] 26703 // CHECK20-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !25 26704 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 26705 // CHECK20: omp.body.continue: 26706 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 26707 // CHECK20: omp.inner.for.inc: 26708 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 26709 // CHECK20-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP14]], 1 26710 // CHECK20-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 26711 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]] 26712 // CHECK20: omp.inner.for.end: 26713 // CHECK20-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 26714 // CHECK20: omp.dispatch.inc: 26715 // CHECK20-NEXT: br label [[OMP_DISPATCH_COND]] 26716 // CHECK20: omp.dispatch.end: 26717 // CHECK20-NEXT: ret void 26718 // 26719 // 26720 // CHECK20-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 26721 // CHECK20-SAME: () #[[ATTR6:[0-9]+]] { 26722 // CHECK20-NEXT: entry: 26723 // CHECK20-NEXT: call void @__tgt_register_requires(i64 1) 26724 // CHECK20-NEXT: ret void 26725 // 26726