1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // expected-no-diagnostics
3 #ifndef HEADER
4 #define HEADER
5
6 // Test host codegen.
7 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
8 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
9 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
10 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
11 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
12 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3
13
14 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5
15 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
16 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5
17 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7
18 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
19 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK7
20
21 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
22 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
23 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
24 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
25 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
26 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
27 #ifdef CK1
28
29 template <typename T, int X, long long Y>
30 struct SS{
31 T a[X];
32 float b;
fooSS33 int foo(void) {
34
35 #pragma omp target
36 #pragma omp teams distribute parallel for
37 for(int i = 0; i < X; i++) {
38 a[i] = (T)0;
39 }
40 #pragma omp target
41 #pragma omp teams distribute parallel for schedule(static)
42 for(int i = 0; i < X; i++) {
43 a[i] = (T)0;
44 }
45 #pragma omp target
46 #pragma omp teams distribute parallel for schedule(static, X/2)
47 for(int i = 0; i < X; i++) {
48 a[i] = (T)0;
49 }
50
51 #pragma omp target
52 #pragma omp teams distribute parallel for schedule(dynamic)
53 for(int i = 0; i < X; i++) {
54 a[i] = (T)0;
55 }
56
57 #pragma omp target
58 #pragma omp teams distribute parallel for schedule(dynamic, X/2)
59 for(int i = 0; i < X; i++) {
60 a[i] = (T)0;
61 }
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78 return a[0];
79 }
80 };
81
teams_template_struct(void)82 int teams_template_struct(void) {
83 SS<int, 123, 456> V;
84 return V.foo();
85
86 }
87 #endif // CK1
88
89 // Test host codegen.
90 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13
91 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
92 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK13
93 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15
94 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
95 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15
96
97 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK17
98 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
99 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK17
100 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK19
101 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
102 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK19
103
104 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
105 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
106 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
107 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
108 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
109 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
110 #ifdef CK2
111
112 template <typename T, int n>
tmain(T argc)113 int tmain(T argc) {
114 T a[n];
115 int m = 10;
116 #pragma omp target
117 #pragma omp teams distribute parallel for
118 for(int i = 0; i < n; i++) {
119 a[i] = (T)0;
120 }
121 #pragma omp target
122 #pragma omp teams distribute parallel for schedule(static)
123 for(int i = 0; i < n; i++) {
124 a[i] = (T)0;
125 }
126 #pragma omp target
127 #pragma omp teams distribute parallel for schedule(static, m)
128 for(int i = 0; i < n; i++) {
129 a[i] = (T)0;
130 }
131 #pragma omp target
132 #pragma omp teams distribute parallel for schedule(dynamic)
133 for(int i = 0; i < n; i++) {
134 a[i] = (T)0;
135 }
136 #pragma omp target
137 #pragma omp teams distribute parallel for schedule(dynamic, m)
138 for(int i = 0; i < n; i++) {
139 a[i] = (T)0;
140 }
141 return 0;
142 }
143
main(int argc,char ** argv)144 int main (int argc, char **argv) {
145 int n = 100;
146 int a[n];
147 int m = 10;
148 #pragma omp target
149 #pragma omp teams distribute parallel for
150 for(int i = 0; i < n; i++) {
151 a[i] = 0;
152 }
153 #pragma omp target
154 #pragma omp teams distribute parallel for dist_schedule(static)
155 for(int i = 0; i < n; i++) {
156 a[i] = 0;
157 }
158 #pragma omp target
159 #pragma omp teams distribute parallel for dist_schedule(static, m)
160 for(int i = 0; i < n; i++) {
161 a[i] = 0;
162 }
163 #pragma omp target
164 #pragma omp teams distribute parallel for schedule(dynamic)
165 for(int i = 0; i < n; i++) {
166 a[i] = 0;
167 }
168 #pragma omp target
169 #pragma omp teams distribute parallel for schedule(dynamic, m)
170 for(int i = 0; i < n; i++) {
171 a[i] = 0;
172 }
173 return tmain<int, 10>(argc);
174 }
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209 #endif // CK2
210 #endif // #ifndef HEADER
211 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv
212 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
213 // CHECK1-NEXT: entry:
214 // CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
215 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]])
216 // CHECK1-NEXT: ret i32 [[CALL]]
217 //
218 //
219 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
220 // CHECK1-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
221 // CHECK1-NEXT: entry:
222 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
223 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
224 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
225 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
226 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
227 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8
228 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8
229 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8
230 // CHECK1-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
231 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x i8*], align 8
232 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x i8*], align 8
233 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x i8*], align 8
234 // CHECK1-NEXT: [[_TMP14:%.*]] = alloca i32, align 4
235 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [1 x i8*], align 8
236 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [1 x i8*], align 8
237 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [1 x i8*], align 8
238 // CHECK1-NEXT: [[_TMP22:%.*]] = alloca i32, align 4
239 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS27:%.*]] = alloca [1 x i8*], align 8
240 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS28:%.*]] = alloca [1 x i8*], align 8
241 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS29:%.*]] = alloca [1 x i8*], align 8
242 // CHECK1-NEXT: [[_TMP30:%.*]] = alloca i32, align 4
243 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
244 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
245 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
246 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
247 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
248 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8
249 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
250 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
251 // CHECK1-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8
252 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
253 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8
254 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
255 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
256 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
257 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
258 // CHECK1-NEXT: store i32 1, i32* [[TMP7]], align 4
259 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
260 // CHECK1-NEXT: store i32 1, i32* [[TMP8]], align 4
261 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
262 // CHECK1-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 8
263 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
264 // CHECK1-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 8
265 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
266 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP11]], align 8
267 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
268 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP12]], align 8
269 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
270 // CHECK1-NEXT: store i8** null, i8*** [[TMP13]], align 8
271 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
272 // CHECK1-NEXT: store i8** null, i8*** [[TMP14]], align 8
273 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
274 // CHECK1-NEXT: store i64 123, i64* [[TMP15]], align 8
275 // CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
276 // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
277 // CHECK1-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
278 // CHECK1: omp_offload.failed:
279 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
280 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
281 // CHECK1: omp_offload.cont:
282 // CHECK1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
283 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
284 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
285 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8
286 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
287 // CHECK1-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
288 // CHECK1-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP21]], align 8
289 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0
290 // CHECK1-NEXT: store i8* null, i8** [[TMP22]], align 8
291 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
292 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
293 // CHECK1-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
294 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 0
295 // CHECK1-NEXT: store i32 1, i32* [[TMP25]], align 4
296 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 1
297 // CHECK1-NEXT: store i32 1, i32* [[TMP26]], align 4
298 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 2
299 // CHECK1-NEXT: store i8** [[TMP23]], i8*** [[TMP27]], align 8
300 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 3
301 // CHECK1-NEXT: store i8** [[TMP24]], i8*** [[TMP28]], align 8
302 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 4
303 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64** [[TMP29]], align 8
304 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 5
305 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP30]], align 8
306 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 6
307 // CHECK1-NEXT: store i8** null, i8*** [[TMP31]], align 8
308 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 7
309 // CHECK1-NEXT: store i8** null, i8*** [[TMP32]], align 8
310 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 8
311 // CHECK1-NEXT: store i64 123, i64* [[TMP33]], align 8
312 // CHECK1-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]])
313 // CHECK1-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
314 // CHECK1-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]
315 // CHECK1: omp_offload.failed8:
316 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]]
317 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT9]]
318 // CHECK1: omp_offload.cont9:
319 // CHECK1-NEXT: [[A10:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
320 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
321 // CHECK1-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
322 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 8
323 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
324 // CHECK1-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
325 // CHECK1-NEXT: store [123 x i32]* [[A10]], [123 x i32]** [[TMP39]], align 8
326 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS13]], i64 0, i64 0
327 // CHECK1-NEXT: store i8* null, i8** [[TMP40]], align 8
328 // CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
329 // CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
330 // CHECK1-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
331 // CHECK1-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 0
332 // CHECK1-NEXT: store i32 1, i32* [[TMP43]], align 4
333 // CHECK1-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 1
334 // CHECK1-NEXT: store i32 1, i32* [[TMP44]], align 4
335 // CHECK1-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 2
336 // CHECK1-NEXT: store i8** [[TMP41]], i8*** [[TMP45]], align 8
337 // CHECK1-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 3
338 // CHECK1-NEXT: store i8** [[TMP42]], i8*** [[TMP46]], align 8
339 // CHECK1-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 4
340 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64** [[TMP47]], align 8
341 // CHECK1-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 5
342 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i64** [[TMP48]], align 8
343 // CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 6
344 // CHECK1-NEXT: store i8** null, i8*** [[TMP49]], align 8
345 // CHECK1-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 7
346 // CHECK1-NEXT: store i8** null, i8*** [[TMP50]], align 8
347 // CHECK1-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 8
348 // CHECK1-NEXT: store i64 123, i64* [[TMP51]], align 8
349 // CHECK1-NEXT: [[TMP52:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]])
350 // CHECK1-NEXT: [[TMP53:%.*]] = icmp ne i32 [[TMP52]], 0
351 // CHECK1-NEXT: br i1 [[TMP53]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
352 // CHECK1: omp_offload.failed16:
353 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(%struct.SS* [[THIS1]]) #[[ATTR2]]
354 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT17]]
355 // CHECK1: omp_offload.cont17:
356 // CHECK1-NEXT: [[A18:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
357 // CHECK1-NEXT: [[TMP54:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
358 // CHECK1-NEXT: [[TMP55:%.*]] = bitcast i8** [[TMP54]] to %struct.SS**
359 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP55]], align 8
360 // CHECK1-NEXT: [[TMP56:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
361 // CHECK1-NEXT: [[TMP57:%.*]] = bitcast i8** [[TMP56]] to [123 x i32]**
362 // CHECK1-NEXT: store [123 x i32]* [[A18]], [123 x i32]** [[TMP57]], align 8
363 // CHECK1-NEXT: [[TMP58:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 0
364 // CHECK1-NEXT: store i8* null, i8** [[TMP58]], align 8
365 // CHECK1-NEXT: [[TMP59:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
366 // CHECK1-NEXT: [[TMP60:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
367 // CHECK1-NEXT: [[KERNEL_ARGS23:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
368 // CHECK1-NEXT: [[TMP61:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 0
369 // CHECK1-NEXT: store i32 1, i32* [[TMP61]], align 4
370 // CHECK1-NEXT: [[TMP62:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 1
371 // CHECK1-NEXT: store i32 1, i32* [[TMP62]], align 4
372 // CHECK1-NEXT: [[TMP63:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 2
373 // CHECK1-NEXT: store i8** [[TMP59]], i8*** [[TMP63]], align 8
374 // CHECK1-NEXT: [[TMP64:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 3
375 // CHECK1-NEXT: store i8** [[TMP60]], i8*** [[TMP64]], align 8
376 // CHECK1-NEXT: [[TMP65:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 4
377 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64** [[TMP65]], align 8
378 // CHECK1-NEXT: [[TMP66:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 5
379 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i64** [[TMP66]], align 8
380 // CHECK1-NEXT: [[TMP67:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 6
381 // CHECK1-NEXT: store i8** null, i8*** [[TMP67]], align 8
382 // CHECK1-NEXT: [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 7
383 // CHECK1-NEXT: store i8** null, i8*** [[TMP68]], align 8
384 // CHECK1-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 8
385 // CHECK1-NEXT: store i64 123, i64* [[TMP69]], align 8
386 // CHECK1-NEXT: [[TMP70:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]])
387 // CHECK1-NEXT: [[TMP71:%.*]] = icmp ne i32 [[TMP70]], 0
388 // CHECK1-NEXT: br i1 [[TMP71]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]]
389 // CHECK1: omp_offload.failed24:
390 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(%struct.SS* [[THIS1]]) #[[ATTR2]]
391 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT25]]
392 // CHECK1: omp_offload.cont25:
393 // CHECK1-NEXT: [[A26:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
394 // CHECK1-NEXT: [[TMP72:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0
395 // CHECK1-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to %struct.SS**
396 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP73]], align 8
397 // CHECK1-NEXT: [[TMP74:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS28]], i32 0, i32 0
398 // CHECK1-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to [123 x i32]**
399 // CHECK1-NEXT: store [123 x i32]* [[A26]], [123 x i32]** [[TMP75]], align 8
400 // CHECK1-NEXT: [[TMP76:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS29]], i64 0, i64 0
401 // CHECK1-NEXT: store i8* null, i8** [[TMP76]], align 8
402 // CHECK1-NEXT: [[TMP77:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0
403 // CHECK1-NEXT: [[TMP78:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS28]], i32 0, i32 0
404 // CHECK1-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
405 // CHECK1-NEXT: [[TMP79:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 0
406 // CHECK1-NEXT: store i32 1, i32* [[TMP79]], align 4
407 // CHECK1-NEXT: [[TMP80:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 1
408 // CHECK1-NEXT: store i32 1, i32* [[TMP80]], align 4
409 // CHECK1-NEXT: [[TMP81:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 2
410 // CHECK1-NEXT: store i8** [[TMP77]], i8*** [[TMP81]], align 8
411 // CHECK1-NEXT: [[TMP82:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 3
412 // CHECK1-NEXT: store i8** [[TMP78]], i8*** [[TMP82]], align 8
413 // CHECK1-NEXT: [[TMP83:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 4
414 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64** [[TMP83]], align 8
415 // CHECK1-NEXT: [[TMP84:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 5
416 // CHECK1-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i64** [[TMP84]], align 8
417 // CHECK1-NEXT: [[TMP85:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 6
418 // CHECK1-NEXT: store i8** null, i8*** [[TMP85]], align 8
419 // CHECK1-NEXT: [[TMP86:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 7
420 // CHECK1-NEXT: store i8** null, i8*** [[TMP86]], align 8
421 // CHECK1-NEXT: [[TMP87:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 8
422 // CHECK1-NEXT: store i64 123, i64* [[TMP87]], align 8
423 // CHECK1-NEXT: [[TMP88:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]])
424 // CHECK1-NEXT: [[TMP89:%.*]] = icmp ne i32 [[TMP88]], 0
425 // CHECK1-NEXT: br i1 [[TMP89]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
426 // CHECK1: omp_offload.failed32:
427 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(%struct.SS* [[THIS1]]) #[[ATTR2]]
428 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT33]]
429 // CHECK1: omp_offload.cont33:
430 // CHECK1-NEXT: [[A34:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
431 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A34]], i64 0, i64 0
432 // CHECK1-NEXT: [[TMP90:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
433 // CHECK1-NEXT: ret i32 [[TMP90]]
434 //
435 //
436 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35
437 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
438 // CHECK1-NEXT: entry:
439 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
440 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
441 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
442 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
443 // CHECK1-NEXT: ret void
444 //
445 //
446 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
447 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
448 // CHECK1-NEXT: entry:
449 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
450 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
451 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
452 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
453 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
454 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
455 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
456 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
457 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
458 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
459 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
460 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
461 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
462 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
463 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
464 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
465 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
466 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
467 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
468 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
469 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
470 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
471 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
472 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
473 // CHECK1: cond.true:
474 // CHECK1-NEXT: br label [[COND_END:%.*]]
475 // CHECK1: cond.false:
476 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
477 // CHECK1-NEXT: br label [[COND_END]]
478 // CHECK1: cond.end:
479 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
480 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
481 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
482 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
483 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
484 // CHECK1: omp.inner.for.cond:
485 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
486 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
487 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
488 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
489 // CHECK1: omp.inner.for.body:
490 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
491 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
492 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
493 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
494 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
495 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
496 // CHECK1: omp.inner.for.inc:
497 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
498 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
499 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
500 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
501 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
502 // CHECK1: omp.inner.for.end:
503 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
504 // CHECK1: omp.loop.exit:
505 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
506 // CHECK1-NEXT: ret void
507 //
508 //
509 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
510 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
511 // CHECK1-NEXT: entry:
512 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
513 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
514 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
515 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
516 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
517 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
518 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
519 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
520 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
521 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
522 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
523 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
524 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
525 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
526 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
527 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
528 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
529 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
530 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
531 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
532 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
533 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
534 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
535 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
536 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
537 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
538 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
539 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
540 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
541 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
542 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
543 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
544 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
545 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
546 // CHECK1: cond.true:
547 // CHECK1-NEXT: br label [[COND_END:%.*]]
548 // CHECK1: cond.false:
549 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
550 // CHECK1-NEXT: br label [[COND_END]]
551 // CHECK1: cond.end:
552 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
553 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
554 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
555 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
556 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
557 // CHECK1: omp.inner.for.cond:
558 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
559 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
560 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
561 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
562 // CHECK1: omp.inner.for.body:
563 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
564 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
565 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
566 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
567 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
568 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
569 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
570 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
571 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
572 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
573 // CHECK1: omp.body.continue:
574 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
575 // CHECK1: omp.inner.for.inc:
576 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
577 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
578 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
579 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
580 // CHECK1: omp.inner.for.end:
581 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
582 // CHECK1: omp.loop.exit:
583 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
584 // CHECK1-NEXT: ret void
585 //
586 //
587 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
588 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
589 // CHECK1-NEXT: entry:
590 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
591 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
592 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
593 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
594 // CHECK1-NEXT: ret void
595 //
596 //
597 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2
598 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
599 // CHECK1-NEXT: entry:
600 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
601 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
602 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
603 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
604 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
605 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
606 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
607 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
608 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
609 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
610 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
611 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
612 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
613 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
614 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
615 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
616 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
617 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
618 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
619 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
620 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
621 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
622 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
623 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
624 // CHECK1: cond.true:
625 // CHECK1-NEXT: br label [[COND_END:%.*]]
626 // CHECK1: cond.false:
627 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
628 // CHECK1-NEXT: br label [[COND_END]]
629 // CHECK1: cond.end:
630 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
631 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
632 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
633 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
634 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
635 // CHECK1: omp.inner.for.cond:
636 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
637 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
638 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
639 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
640 // CHECK1: omp.inner.for.body:
641 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
642 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
643 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
644 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
645 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
646 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
647 // CHECK1: omp.inner.for.inc:
648 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
649 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
650 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
651 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
652 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
653 // CHECK1: omp.inner.for.end:
654 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
655 // CHECK1: omp.loop.exit:
656 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
657 // CHECK1-NEXT: ret void
658 //
659 //
660 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3
661 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
662 // CHECK1-NEXT: entry:
663 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
664 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
665 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
666 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
667 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
668 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
669 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
670 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
671 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
672 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
673 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
674 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
675 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
676 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
677 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
678 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
679 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
680 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
681 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
682 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
683 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
684 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
685 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
686 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
687 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
688 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
689 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
690 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
691 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
692 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
693 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
694 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
695 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
696 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
697 // CHECK1: cond.true:
698 // CHECK1-NEXT: br label [[COND_END:%.*]]
699 // CHECK1: cond.false:
700 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
701 // CHECK1-NEXT: br label [[COND_END]]
702 // CHECK1: cond.end:
703 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
704 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
705 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
706 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
707 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
708 // CHECK1: omp.inner.for.cond:
709 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
710 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
711 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
712 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
713 // CHECK1: omp.inner.for.body:
714 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
715 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
716 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
717 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
718 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
719 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
720 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
721 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
722 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
723 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
724 // CHECK1: omp.body.continue:
725 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
726 // CHECK1: omp.inner.for.inc:
727 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
728 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
729 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
730 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
731 // CHECK1: omp.inner.for.end:
732 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
733 // CHECK1: omp.loop.exit:
734 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
735 // CHECK1-NEXT: ret void
736 //
737 //
738 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45
739 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
740 // CHECK1-NEXT: entry:
741 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
742 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
743 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
744 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
745 // CHECK1-NEXT: ret void
746 //
747 //
748 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6
749 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
750 // CHECK1-NEXT: entry:
751 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
752 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
753 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
754 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
755 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
756 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
757 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
758 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
759 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
760 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
761 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
762 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
763 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
764 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
765 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
766 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
767 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
768 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
769 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
770 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
771 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
772 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
773 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
774 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
775 // CHECK1: cond.true:
776 // CHECK1-NEXT: br label [[COND_END:%.*]]
777 // CHECK1: cond.false:
778 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
779 // CHECK1-NEXT: br label [[COND_END]]
780 // CHECK1: cond.end:
781 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
782 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
783 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
784 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
785 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
786 // CHECK1: omp.inner.for.cond:
787 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
788 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
789 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
790 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
791 // CHECK1: omp.inner.for.body:
792 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
793 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
794 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
795 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
796 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
797 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
798 // CHECK1: omp.inner.for.inc:
799 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
800 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
801 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
802 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
803 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
804 // CHECK1: omp.inner.for.end:
805 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
806 // CHECK1: omp.loop.exit:
807 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
808 // CHECK1-NEXT: ret void
809 //
810 //
811 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7
812 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
813 // CHECK1-NEXT: entry:
814 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
815 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
816 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
817 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
818 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
819 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
820 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
821 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
822 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
823 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
824 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
825 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
826 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
827 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
828 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
829 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
830 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
831 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
832 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
833 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
834 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
835 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
836 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
837 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
838 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
839 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
840 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
841 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
842 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
843 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
844 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
845 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
846 // CHECK1: omp.dispatch.cond:
847 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
848 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
849 // CHECK1-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32
850 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]]
851 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
852 // CHECK1: cond.true:
853 // CHECK1-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
854 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
855 // CHECK1-NEXT: br label [[COND_END:%.*]]
856 // CHECK1: cond.false:
857 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
858 // CHECK1-NEXT: br label [[COND_END]]
859 // CHECK1: cond.end:
860 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
861 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
862 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
863 // CHECK1-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
864 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
865 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
866 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
867 // CHECK1-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
868 // CHECK1: omp.dispatch.body:
869 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
870 // CHECK1: omp.inner.for.cond:
871 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
872 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
873 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
874 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
875 // CHECK1: omp.inner.for.body:
876 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
877 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
878 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
879 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4
880 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
881 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
882 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
883 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
884 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
885 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
886 // CHECK1: omp.body.continue:
887 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
888 // CHECK1: omp.inner.for.inc:
889 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
890 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1
891 // CHECK1-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
892 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
893 // CHECK1: omp.inner.for.end:
894 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
895 // CHECK1: omp.dispatch.inc:
896 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
897 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
898 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
899 // CHECK1-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4
900 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
901 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
902 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
903 // CHECK1-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4
904 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]]
905 // CHECK1: omp.dispatch.end:
906 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
907 // CHECK1-NEXT: ret void
908 //
909 //
910 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51
911 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
912 // CHECK1-NEXT: entry:
913 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
914 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
915 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
916 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
917 // CHECK1-NEXT: ret void
918 //
919 //
920 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10
921 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
922 // CHECK1-NEXT: entry:
923 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
924 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
925 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
926 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
927 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
928 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
929 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
930 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
931 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
932 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
933 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
934 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
935 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
936 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
937 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
938 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
939 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
940 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
941 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
942 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
943 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
944 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
945 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
946 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
947 // CHECK1: cond.true:
948 // CHECK1-NEXT: br label [[COND_END:%.*]]
949 // CHECK1: cond.false:
950 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
951 // CHECK1-NEXT: br label [[COND_END]]
952 // CHECK1: cond.end:
953 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
954 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
955 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
956 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
957 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
958 // CHECK1: omp.inner.for.cond:
959 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
960 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
961 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
962 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
963 // CHECK1: omp.inner.for.body:
964 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
965 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
966 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
967 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
968 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
969 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
970 // CHECK1: omp.inner.for.inc:
971 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
972 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
973 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
974 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
975 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
976 // CHECK1: omp.inner.for.end:
977 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
978 // CHECK1: omp.loop.exit:
979 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
980 // CHECK1-NEXT: ret void
981 //
982 //
983 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11
984 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
985 // CHECK1-NEXT: entry:
986 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
987 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
988 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
989 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
990 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
991 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
992 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
993 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
994 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
995 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
996 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
997 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
998 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
999 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1000 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1001 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1002 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1003 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1004 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1005 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
1006 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1007 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1008 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1009 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
1010 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1011 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1012 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1013 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1014 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1015 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1016 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1017 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
1018 // CHECK1-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
1019 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
1020 // CHECK1: omp.dispatch.cond:
1021 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
1022 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
1023 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1024 // CHECK1: omp.dispatch.body:
1025 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1026 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
1027 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1028 // CHECK1: omp.inner.for.cond:
1029 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
1030 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10
1031 // CHECK1-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
1032 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1033 // CHECK1: omp.inner.for.body:
1034 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
1035 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
1036 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1037 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !10
1038 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1039 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !10
1040 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
1041 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
1042 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !10
1043 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1044 // CHECK1: omp.body.continue:
1045 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1046 // CHECK1: omp.inner.for.inc:
1047 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
1048 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
1049 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
1050 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
1051 // CHECK1: omp.inner.for.end:
1052 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
1053 // CHECK1: omp.dispatch.inc:
1054 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]]
1055 // CHECK1: omp.dispatch.end:
1056 // CHECK1-NEXT: ret void
1057 //
1058 //
1059 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57
1060 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
1061 // CHECK1-NEXT: entry:
1062 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1063 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1064 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1065 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1066 // CHECK1-NEXT: ret void
1067 //
1068 //
1069 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..14
1070 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
1071 // CHECK1-NEXT: entry:
1072 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1073 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1074 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1075 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1076 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1077 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1078 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1079 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1080 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1081 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1082 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1083 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1084 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1085 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1086 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1087 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
1088 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1089 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1090 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1091 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1092 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1093 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1094 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1095 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1096 // CHECK1: cond.true:
1097 // CHECK1-NEXT: br label [[COND_END:%.*]]
1098 // CHECK1: cond.false:
1099 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1100 // CHECK1-NEXT: br label [[COND_END]]
1101 // CHECK1: cond.end:
1102 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1103 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1104 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1105 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1106 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1107 // CHECK1: omp.inner.for.cond:
1108 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1109 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1110 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1111 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1112 // CHECK1: omp.inner.for.body:
1113 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1114 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1115 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1116 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1117 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
1118 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1119 // CHECK1: omp.inner.for.inc:
1120 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1121 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1122 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1123 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1124 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
1125 // CHECK1: omp.inner.for.end:
1126 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1127 // CHECK1: omp.loop.exit:
1128 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1129 // CHECK1-NEXT: ret void
1130 //
1131 //
1132 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..15
1133 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
1134 // CHECK1-NEXT: entry:
1135 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1136 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1137 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1138 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1139 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1140 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1141 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
1142 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1143 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1144 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1145 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1146 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
1147 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1148 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1149 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1150 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1151 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1152 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1153 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1154 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
1155 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1156 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1157 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1158 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
1159 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1160 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1161 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1162 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1163 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1164 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1165 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1166 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
1167 // CHECK1-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
1168 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
1169 // CHECK1: omp.dispatch.cond:
1170 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
1171 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
1172 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1173 // CHECK1: omp.dispatch.body:
1174 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1175 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
1176 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1177 // CHECK1: omp.inner.for.cond:
1178 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
1179 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
1180 // CHECK1-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
1181 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1182 // CHECK1: omp.inner.for.body:
1183 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
1184 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
1185 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1186 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
1187 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1188 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13
1189 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
1190 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
1191 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13
1192 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1193 // CHECK1: omp.body.continue:
1194 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1195 // CHECK1: omp.inner.for.inc:
1196 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
1197 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
1198 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
1199 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
1200 // CHECK1: omp.inner.for.end:
1201 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
1202 // CHECK1: omp.dispatch.inc:
1203 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]]
1204 // CHECK1: omp.dispatch.end:
1205 // CHECK1-NEXT: ret void
1206 //
1207 //
1208 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1209 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] {
1210 // CHECK1-NEXT: entry:
1211 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
1212 // CHECK1-NEXT: ret void
1213 //
1214 //
1215 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv
1216 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
1217 // CHECK3-NEXT: entry:
1218 // CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
1219 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]])
1220 // CHECK3-NEXT: ret i32 [[CALL]]
1221 //
1222 //
1223 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
1224 // CHECK3-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
1225 // CHECK3-NEXT: entry:
1226 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1227 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
1228 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
1229 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
1230 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1231 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4
1232 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4
1233 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4
1234 // CHECK3-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
1235 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x i8*], align 4
1236 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x i8*], align 4
1237 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x i8*], align 4
1238 // CHECK3-NEXT: [[_TMP14:%.*]] = alloca i32, align 4
1239 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [1 x i8*], align 4
1240 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [1 x i8*], align 4
1241 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [1 x i8*], align 4
1242 // CHECK3-NEXT: [[_TMP22:%.*]] = alloca i32, align 4
1243 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS27:%.*]] = alloca [1 x i8*], align 4
1244 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS28:%.*]] = alloca [1 x i8*], align 4
1245 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS29:%.*]] = alloca [1 x i8*], align 4
1246 // CHECK3-NEXT: [[_TMP30:%.*]] = alloca i32, align 4
1247 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1248 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1249 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
1250 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1251 // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
1252 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4
1253 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1254 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
1255 // CHECK3-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4
1256 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1257 // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 4
1258 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1259 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1260 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1261 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
1262 // CHECK3-NEXT: store i32 1, i32* [[TMP7]], align 4
1263 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
1264 // CHECK3-NEXT: store i32 1, i32* [[TMP8]], align 4
1265 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
1266 // CHECK3-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 4
1267 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
1268 // CHECK3-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 4
1269 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
1270 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP11]], align 4
1271 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
1272 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP12]], align 4
1273 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
1274 // CHECK3-NEXT: store i8** null, i8*** [[TMP13]], align 4
1275 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
1276 // CHECK3-NEXT: store i8** null, i8*** [[TMP14]], align 4
1277 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
1278 // CHECK3-NEXT: store i64 123, i64* [[TMP15]], align 8
1279 // CHECK3-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
1280 // CHECK3-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
1281 // CHECK3-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1282 // CHECK3: omp_offload.failed:
1283 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
1284 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
1285 // CHECK3: omp_offload.cont:
1286 // CHECK3-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1287 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
1288 // CHECK3-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
1289 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4
1290 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
1291 // CHECK3-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
1292 // CHECK3-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP21]], align 4
1293 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
1294 // CHECK3-NEXT: store i8* null, i8** [[TMP22]], align 4
1295 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
1296 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
1297 // CHECK3-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1298 // CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 0
1299 // CHECK3-NEXT: store i32 1, i32* [[TMP25]], align 4
1300 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 1
1301 // CHECK3-NEXT: store i32 1, i32* [[TMP26]], align 4
1302 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 2
1303 // CHECK3-NEXT: store i8** [[TMP23]], i8*** [[TMP27]], align 4
1304 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 3
1305 // CHECK3-NEXT: store i8** [[TMP24]], i8*** [[TMP28]], align 4
1306 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 4
1307 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64** [[TMP29]], align 4
1308 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 5
1309 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP30]], align 4
1310 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 6
1311 // CHECK3-NEXT: store i8** null, i8*** [[TMP31]], align 4
1312 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 7
1313 // CHECK3-NEXT: store i8** null, i8*** [[TMP32]], align 4
1314 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 8
1315 // CHECK3-NEXT: store i64 123, i64* [[TMP33]], align 8
1316 // CHECK3-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]])
1317 // CHECK3-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
1318 // CHECK3-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]
1319 // CHECK3: omp_offload.failed8:
1320 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]]
1321 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT9]]
1322 // CHECK3: omp_offload.cont9:
1323 // CHECK3-NEXT: [[A10:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1324 // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
1325 // CHECK3-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
1326 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 4
1327 // CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
1328 // CHECK3-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
1329 // CHECK3-NEXT: store [123 x i32]* [[A10]], [123 x i32]** [[TMP39]], align 4
1330 // CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS13]], i32 0, i32 0
1331 // CHECK3-NEXT: store i8* null, i8** [[TMP40]], align 4
1332 // CHECK3-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
1333 // CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
1334 // CHECK3-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1335 // CHECK3-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 0
1336 // CHECK3-NEXT: store i32 1, i32* [[TMP43]], align 4
1337 // CHECK3-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 1
1338 // CHECK3-NEXT: store i32 1, i32* [[TMP44]], align 4
1339 // CHECK3-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 2
1340 // CHECK3-NEXT: store i8** [[TMP41]], i8*** [[TMP45]], align 4
1341 // CHECK3-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 3
1342 // CHECK3-NEXT: store i8** [[TMP42]], i8*** [[TMP46]], align 4
1343 // CHECK3-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 4
1344 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64** [[TMP47]], align 4
1345 // CHECK3-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 5
1346 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i64** [[TMP48]], align 4
1347 // CHECK3-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 6
1348 // CHECK3-NEXT: store i8** null, i8*** [[TMP49]], align 4
1349 // CHECK3-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 7
1350 // CHECK3-NEXT: store i8** null, i8*** [[TMP50]], align 4
1351 // CHECK3-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 8
1352 // CHECK3-NEXT: store i64 123, i64* [[TMP51]], align 8
1353 // CHECK3-NEXT: [[TMP52:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]])
1354 // CHECK3-NEXT: [[TMP53:%.*]] = icmp ne i32 [[TMP52]], 0
1355 // CHECK3-NEXT: br i1 [[TMP53]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
1356 // CHECK3: omp_offload.failed16:
1357 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(%struct.SS* [[THIS1]]) #[[ATTR2]]
1358 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT17]]
1359 // CHECK3: omp_offload.cont17:
1360 // CHECK3-NEXT: [[A18:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1361 // CHECK3-NEXT: [[TMP54:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
1362 // CHECK3-NEXT: [[TMP55:%.*]] = bitcast i8** [[TMP54]] to %struct.SS**
1363 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP55]], align 4
1364 // CHECK3-NEXT: [[TMP56:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
1365 // CHECK3-NEXT: [[TMP57:%.*]] = bitcast i8** [[TMP56]] to [123 x i32]**
1366 // CHECK3-NEXT: store [123 x i32]* [[A18]], [123 x i32]** [[TMP57]], align 4
1367 // CHECK3-NEXT: [[TMP58:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 0
1368 // CHECK3-NEXT: store i8* null, i8** [[TMP58]], align 4
1369 // CHECK3-NEXT: [[TMP59:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
1370 // CHECK3-NEXT: [[TMP60:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
1371 // CHECK3-NEXT: [[KERNEL_ARGS23:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1372 // CHECK3-NEXT: [[TMP61:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 0
1373 // CHECK3-NEXT: store i32 1, i32* [[TMP61]], align 4
1374 // CHECK3-NEXT: [[TMP62:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 1
1375 // CHECK3-NEXT: store i32 1, i32* [[TMP62]], align 4
1376 // CHECK3-NEXT: [[TMP63:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 2
1377 // CHECK3-NEXT: store i8** [[TMP59]], i8*** [[TMP63]], align 4
1378 // CHECK3-NEXT: [[TMP64:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 3
1379 // CHECK3-NEXT: store i8** [[TMP60]], i8*** [[TMP64]], align 4
1380 // CHECK3-NEXT: [[TMP65:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 4
1381 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64** [[TMP65]], align 4
1382 // CHECK3-NEXT: [[TMP66:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 5
1383 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i64** [[TMP66]], align 4
1384 // CHECK3-NEXT: [[TMP67:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 6
1385 // CHECK3-NEXT: store i8** null, i8*** [[TMP67]], align 4
1386 // CHECK3-NEXT: [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 7
1387 // CHECK3-NEXT: store i8** null, i8*** [[TMP68]], align 4
1388 // CHECK3-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 8
1389 // CHECK3-NEXT: store i64 123, i64* [[TMP69]], align 8
1390 // CHECK3-NEXT: [[TMP70:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]])
1391 // CHECK3-NEXT: [[TMP71:%.*]] = icmp ne i32 [[TMP70]], 0
1392 // CHECK3-NEXT: br i1 [[TMP71]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]]
1393 // CHECK3: omp_offload.failed24:
1394 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(%struct.SS* [[THIS1]]) #[[ATTR2]]
1395 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT25]]
1396 // CHECK3: omp_offload.cont25:
1397 // CHECK3-NEXT: [[A26:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1398 // CHECK3-NEXT: [[TMP72:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0
1399 // CHECK3-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to %struct.SS**
1400 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP73]], align 4
1401 // CHECK3-NEXT: [[TMP74:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS28]], i32 0, i32 0
1402 // CHECK3-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to [123 x i32]**
1403 // CHECK3-NEXT: store [123 x i32]* [[A26]], [123 x i32]** [[TMP75]], align 4
1404 // CHECK3-NEXT: [[TMP76:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS29]], i32 0, i32 0
1405 // CHECK3-NEXT: store i8* null, i8** [[TMP76]], align 4
1406 // CHECK3-NEXT: [[TMP77:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0
1407 // CHECK3-NEXT: [[TMP78:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS28]], i32 0, i32 0
1408 // CHECK3-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1409 // CHECK3-NEXT: [[TMP79:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 0
1410 // CHECK3-NEXT: store i32 1, i32* [[TMP79]], align 4
1411 // CHECK3-NEXT: [[TMP80:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 1
1412 // CHECK3-NEXT: store i32 1, i32* [[TMP80]], align 4
1413 // CHECK3-NEXT: [[TMP81:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 2
1414 // CHECK3-NEXT: store i8** [[TMP77]], i8*** [[TMP81]], align 4
1415 // CHECK3-NEXT: [[TMP82:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 3
1416 // CHECK3-NEXT: store i8** [[TMP78]], i8*** [[TMP82]], align 4
1417 // CHECK3-NEXT: [[TMP83:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 4
1418 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64** [[TMP83]], align 4
1419 // CHECK3-NEXT: [[TMP84:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 5
1420 // CHECK3-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i64** [[TMP84]], align 4
1421 // CHECK3-NEXT: [[TMP85:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 6
1422 // CHECK3-NEXT: store i8** null, i8*** [[TMP85]], align 4
1423 // CHECK3-NEXT: [[TMP86:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 7
1424 // CHECK3-NEXT: store i8** null, i8*** [[TMP86]], align 4
1425 // CHECK3-NEXT: [[TMP87:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 8
1426 // CHECK3-NEXT: store i64 123, i64* [[TMP87]], align 8
1427 // CHECK3-NEXT: [[TMP88:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]])
1428 // CHECK3-NEXT: [[TMP89:%.*]] = icmp ne i32 [[TMP88]], 0
1429 // CHECK3-NEXT: br i1 [[TMP89]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
1430 // CHECK3: omp_offload.failed32:
1431 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(%struct.SS* [[THIS1]]) #[[ATTR2]]
1432 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT33]]
1433 // CHECK3: omp_offload.cont33:
1434 // CHECK3-NEXT: [[A34:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1435 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A34]], i32 0, i32 0
1436 // CHECK3-NEXT: [[TMP90:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
1437 // CHECK3-NEXT: ret i32 [[TMP90]]
1438 //
1439 //
1440 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35
1441 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
1442 // CHECK3-NEXT: entry:
1443 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1444 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1445 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1446 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1447 // CHECK3-NEXT: ret void
1448 //
1449 //
1450 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
1451 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
1452 // CHECK3-NEXT: entry:
1453 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1454 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1455 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1456 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1457 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1458 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1459 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1460 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1461 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1462 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1463 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1464 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1465 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1466 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1467 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1468 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
1469 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1470 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1471 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1472 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1473 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1474 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1475 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1476 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1477 // CHECK3: cond.true:
1478 // CHECK3-NEXT: br label [[COND_END:%.*]]
1479 // CHECK3: cond.false:
1480 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1481 // CHECK3-NEXT: br label [[COND_END]]
1482 // CHECK3: cond.end:
1483 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1484 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1485 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1486 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1487 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1488 // CHECK3: omp.inner.for.cond:
1489 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1490 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1491 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1492 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1493 // CHECK3: omp.inner.for.body:
1494 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1495 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1496 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
1497 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1498 // CHECK3: omp.inner.for.inc:
1499 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1500 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1501 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
1502 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1503 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
1504 // CHECK3: omp.inner.for.end:
1505 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1506 // CHECK3: omp.loop.exit:
1507 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1508 // CHECK3-NEXT: ret void
1509 //
1510 //
1511 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
1512 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
1513 // CHECK3-NEXT: entry:
1514 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1515 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1516 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1517 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1518 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1519 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1520 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1521 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1522 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1523 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1524 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1525 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1526 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1527 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1528 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1529 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1530 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1531 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1532 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1533 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
1534 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1535 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1536 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
1537 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
1538 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1539 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1540 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1541 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1542 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1543 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1544 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
1545 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1546 // CHECK3: cond.true:
1547 // CHECK3-NEXT: br label [[COND_END:%.*]]
1548 // CHECK3: cond.false:
1549 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1550 // CHECK3-NEXT: br label [[COND_END]]
1551 // CHECK3: cond.end:
1552 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
1553 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1554 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1555 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
1556 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1557 // CHECK3: omp.inner.for.cond:
1558 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1559 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1560 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1561 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1562 // CHECK3: omp.inner.for.body:
1563 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1564 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1565 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1566 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1567 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1568 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
1569 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
1570 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
1571 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1572 // CHECK3: omp.body.continue:
1573 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1574 // CHECK3: omp.inner.for.inc:
1575 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1576 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
1577 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
1578 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
1579 // CHECK3: omp.inner.for.end:
1580 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1581 // CHECK3: omp.loop.exit:
1582 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1583 // CHECK3-NEXT: ret void
1584 //
1585 //
1586 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
1587 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
1588 // CHECK3-NEXT: entry:
1589 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1590 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1591 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1592 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1593 // CHECK3-NEXT: ret void
1594 //
1595 //
1596 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2
1597 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
1598 // CHECK3-NEXT: entry:
1599 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1600 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1601 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1602 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1603 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1604 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1605 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1606 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1607 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1608 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1609 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1610 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1611 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1612 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1613 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1614 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
1615 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1616 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1617 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1618 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1619 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1620 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1621 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1622 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1623 // CHECK3: cond.true:
1624 // CHECK3-NEXT: br label [[COND_END:%.*]]
1625 // CHECK3: cond.false:
1626 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1627 // CHECK3-NEXT: br label [[COND_END]]
1628 // CHECK3: cond.end:
1629 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1630 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1631 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1632 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1633 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1634 // CHECK3: omp.inner.for.cond:
1635 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1636 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1637 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1638 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1639 // CHECK3: omp.inner.for.body:
1640 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1641 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1642 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
1643 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1644 // CHECK3: omp.inner.for.inc:
1645 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1646 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1647 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
1648 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1649 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
1650 // CHECK3: omp.inner.for.end:
1651 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1652 // CHECK3: omp.loop.exit:
1653 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1654 // CHECK3-NEXT: ret void
1655 //
1656 //
1657 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3
1658 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
1659 // CHECK3-NEXT: entry:
1660 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1661 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1662 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1663 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1664 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1665 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1666 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1667 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1668 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1669 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1670 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1671 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1672 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1673 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1674 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1675 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1676 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1677 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1678 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1679 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
1680 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1681 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1682 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
1683 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
1684 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1685 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1686 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1687 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1688 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1689 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1690 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
1691 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1692 // CHECK3: cond.true:
1693 // CHECK3-NEXT: br label [[COND_END:%.*]]
1694 // CHECK3: cond.false:
1695 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1696 // CHECK3-NEXT: br label [[COND_END]]
1697 // CHECK3: cond.end:
1698 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
1699 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1700 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1701 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
1702 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1703 // CHECK3: omp.inner.for.cond:
1704 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1705 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1706 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1707 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1708 // CHECK3: omp.inner.for.body:
1709 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1710 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1711 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1712 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1713 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1714 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
1715 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
1716 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
1717 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1718 // CHECK3: omp.body.continue:
1719 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1720 // CHECK3: omp.inner.for.inc:
1721 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1722 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
1723 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
1724 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
1725 // CHECK3: omp.inner.for.end:
1726 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1727 // CHECK3: omp.loop.exit:
1728 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1729 // CHECK3-NEXT: ret void
1730 //
1731 //
1732 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45
1733 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
1734 // CHECK3-NEXT: entry:
1735 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1736 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1737 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1738 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1739 // CHECK3-NEXT: ret void
1740 //
1741 //
1742 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..6
1743 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
1744 // CHECK3-NEXT: entry:
1745 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1746 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1747 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1748 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1749 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1750 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1751 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1752 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1753 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1754 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1755 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1756 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1757 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1758 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1759 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1760 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
1761 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1762 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1763 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1764 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1765 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1766 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1767 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1768 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1769 // CHECK3: cond.true:
1770 // CHECK3-NEXT: br label [[COND_END:%.*]]
1771 // CHECK3: cond.false:
1772 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1773 // CHECK3-NEXT: br label [[COND_END]]
1774 // CHECK3: cond.end:
1775 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1776 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1777 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1778 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1779 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1780 // CHECK3: omp.inner.for.cond:
1781 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1782 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1783 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1784 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1785 // CHECK3: omp.inner.for.body:
1786 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1787 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1788 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
1789 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1790 // CHECK3: omp.inner.for.inc:
1791 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1792 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1793 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
1794 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1795 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
1796 // CHECK3: omp.inner.for.end:
1797 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1798 // CHECK3: omp.loop.exit:
1799 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1800 // CHECK3-NEXT: ret void
1801 //
1802 //
1803 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..7
1804 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
1805 // CHECK3-NEXT: entry:
1806 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1807 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1808 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1809 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1810 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1811 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1812 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1813 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1814 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1815 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1816 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1817 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1818 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1819 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1820 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1821 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1822 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1823 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1824 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1825 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
1826 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1827 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1828 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
1829 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
1830 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1831 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1832 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1833 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1834 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
1835 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
1836 // CHECK3: omp.dispatch.cond:
1837 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1838 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1839 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]]
1840 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1841 // CHECK3: cond.true:
1842 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1843 // CHECK3-NEXT: br label [[COND_END:%.*]]
1844 // CHECK3: cond.false:
1845 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1846 // CHECK3-NEXT: br label [[COND_END]]
1847 // CHECK3: cond.end:
1848 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
1849 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1850 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1851 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
1852 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1853 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1854 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
1855 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1856 // CHECK3: omp.dispatch.body:
1857 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1858 // CHECK3: omp.inner.for.cond:
1859 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1860 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1861 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
1862 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1863 // CHECK3: omp.inner.for.body:
1864 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1865 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
1866 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1867 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4
1868 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1869 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
1870 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP15]]
1871 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
1872 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1873 // CHECK3: omp.body.continue:
1874 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1875 // CHECK3: omp.inner.for.inc:
1876 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1877 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1
1878 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
1879 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
1880 // CHECK3: omp.inner.for.end:
1881 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
1882 // CHECK3: omp.dispatch.inc:
1883 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1884 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1885 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
1886 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
1887 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1888 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1889 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
1890 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
1891 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]]
1892 // CHECK3: omp.dispatch.end:
1893 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1894 // CHECK3-NEXT: ret void
1895 //
1896 //
1897 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51
1898 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
1899 // CHECK3-NEXT: entry:
1900 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1901 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1902 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1903 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1904 // CHECK3-NEXT: ret void
1905 //
1906 //
1907 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..10
1908 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
1909 // CHECK3-NEXT: entry:
1910 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1911 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1912 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1913 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1914 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1915 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1916 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1917 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1918 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1919 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1920 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1921 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1922 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1923 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1924 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1925 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
1926 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1927 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1928 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
1929 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1930 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1931 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1932 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1933 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1934 // CHECK3: cond.true:
1935 // CHECK3-NEXT: br label [[COND_END:%.*]]
1936 // CHECK3: cond.false:
1937 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1938 // CHECK3-NEXT: br label [[COND_END]]
1939 // CHECK3: cond.end:
1940 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1941 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1942 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1943 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1944 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1945 // CHECK3: omp.inner.for.cond:
1946 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1947 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1948 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1949 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1950 // CHECK3: omp.inner.for.body:
1951 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1952 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1953 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
1954 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1955 // CHECK3: omp.inner.for.inc:
1956 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1957 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1958 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
1959 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1960 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
1961 // CHECK3: omp.inner.for.end:
1962 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1963 // CHECK3: omp.loop.exit:
1964 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1965 // CHECK3-NEXT: ret void
1966 //
1967 //
1968 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..11
1969 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
1970 // CHECK3-NEXT: entry:
1971 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
1972 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
1973 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1974 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1975 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
1976 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1977 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1978 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1979 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1980 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1981 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1982 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1983 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
1984 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
1985 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1986 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1987 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
1988 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
1989 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
1990 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
1991 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
1992 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
1993 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
1994 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
1995 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1996 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1997 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1998 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1999 // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2000 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
2001 // CHECK3-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
2002 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
2003 // CHECK3: omp.dispatch.cond:
2004 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
2005 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
2006 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2007 // CHECK3: omp.dispatch.body:
2008 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2009 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
2010 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2011 // CHECK3: omp.inner.for.cond:
2012 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
2013 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11
2014 // CHECK3-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
2015 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2016 // CHECK3: omp.inner.for.body:
2017 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
2018 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
2019 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2020 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !11
2021 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
2022 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11
2023 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
2024 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !11
2025 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2026 // CHECK3: omp.body.continue:
2027 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2028 // CHECK3: omp.inner.for.inc:
2029 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
2030 // CHECK3-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
2031 // CHECK3-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
2032 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
2033 // CHECK3: omp.inner.for.end:
2034 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
2035 // CHECK3: omp.dispatch.inc:
2036 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]]
2037 // CHECK3: omp.dispatch.end:
2038 // CHECK3-NEXT: ret void
2039 //
2040 //
2041 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57
2042 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
2043 // CHECK3-NEXT: entry:
2044 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2045 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2046 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2047 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
2048 // CHECK3-NEXT: ret void
2049 //
2050 //
2051 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..14
2052 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
2053 // CHECK3-NEXT: entry:
2054 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2055 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2056 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2057 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2058 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2059 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2060 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2061 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2062 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2063 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2064 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2065 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2066 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2067 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2068 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2069 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
2070 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2071 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2072 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2073 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2074 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2075 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2076 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2077 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2078 // CHECK3: cond.true:
2079 // CHECK3-NEXT: br label [[COND_END:%.*]]
2080 // CHECK3: cond.false:
2081 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2082 // CHECK3-NEXT: br label [[COND_END]]
2083 // CHECK3: cond.end:
2084 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2085 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2086 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2087 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2088 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2089 // CHECK3: omp.inner.for.cond:
2090 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2091 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2092 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2093 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2094 // CHECK3: omp.inner.for.body:
2095 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2096 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2097 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
2098 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2099 // CHECK3: omp.inner.for.inc:
2100 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2101 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2102 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
2103 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2104 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
2105 // CHECK3: omp.inner.for.end:
2106 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2107 // CHECK3: omp.loop.exit:
2108 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2109 // CHECK3-NEXT: ret void
2110 //
2111 //
2112 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..15
2113 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
2114 // CHECK3-NEXT: entry:
2115 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2116 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2117 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2118 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2119 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2120 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2121 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
2122 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2123 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2124 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2125 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2126 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
2127 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2128 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2129 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2130 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2131 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2132 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2133 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2134 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
2135 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2136 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2137 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
2138 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
2139 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2140 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2141 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2142 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2143 // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2144 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
2145 // CHECK3-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
2146 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
2147 // CHECK3: omp.dispatch.cond:
2148 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
2149 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
2150 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2151 // CHECK3: omp.dispatch.body:
2152 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2153 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
2154 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2155 // CHECK3: omp.inner.for.cond:
2156 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
2157 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14
2158 // CHECK3-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
2159 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2160 // CHECK3: omp.inner.for.body:
2161 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
2162 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
2163 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2164 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14
2165 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
2166 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !14
2167 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
2168 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !14
2169 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2170 // CHECK3: omp.body.continue:
2171 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2172 // CHECK3: omp.inner.for.inc:
2173 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
2174 // CHECK3-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
2175 // CHECK3-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
2176 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
2177 // CHECK3: omp.inner.for.end:
2178 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
2179 // CHECK3: omp.dispatch.inc:
2180 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]]
2181 // CHECK3: omp.dispatch.end:
2182 // CHECK3-NEXT: ret void
2183 //
2184 //
2185 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2186 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] {
2187 // CHECK3-NEXT: entry:
2188 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1)
2189 // CHECK3-NEXT: ret void
2190 //
2191 //
2192 // CHECK5-LABEL: define {{[^@]+}}@_Z21teams_template_structv
2193 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] {
2194 // CHECK5-NEXT: entry:
2195 // CHECK5-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
2196 // CHECK5-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]])
2197 // CHECK5-NEXT: ret i32 [[CALL]]
2198 //
2199 //
2200 // CHECK5-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
2201 // CHECK5-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
2202 // CHECK5-NEXT: entry:
2203 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2204 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
2205 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
2206 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
2207 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2208 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8
2209 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8
2210 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8
2211 // CHECK5-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
2212 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x i8*], align 8
2213 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x i8*], align 8
2214 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x i8*], align 8
2215 // CHECK5-NEXT: [[_TMP14:%.*]] = alloca i32, align 4
2216 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [1 x i8*], align 8
2217 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [1 x i8*], align 8
2218 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [1 x i8*], align 8
2219 // CHECK5-NEXT: [[_TMP22:%.*]] = alloca i32, align 4
2220 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS27:%.*]] = alloca [1 x i8*], align 8
2221 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS28:%.*]] = alloca [1 x i8*], align 8
2222 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS29:%.*]] = alloca [1 x i8*], align 8
2223 // CHECK5-NEXT: [[_TMP30:%.*]] = alloca i32, align 4
2224 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2225 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2226 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
2227 // CHECK5-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2228 // CHECK5-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
2229 // CHECK5-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8
2230 // CHECK5-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2231 // CHECK5-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
2232 // CHECK5-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8
2233 // CHECK5-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
2234 // CHECK5-NEXT: store i8* null, i8** [[TMP4]], align 8
2235 // CHECK5-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2236 // CHECK5-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2237 // CHECK5-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
2238 // CHECK5-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
2239 // CHECK5-NEXT: store i32 1, i32* [[TMP7]], align 4
2240 // CHECK5-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
2241 // CHECK5-NEXT: store i32 1, i32* [[TMP8]], align 4
2242 // CHECK5-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
2243 // CHECK5-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 8
2244 // CHECK5-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
2245 // CHECK5-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 8
2246 // CHECK5-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
2247 // CHECK5-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP11]], align 8
2248 // CHECK5-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
2249 // CHECK5-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP12]], align 8
2250 // CHECK5-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
2251 // CHECK5-NEXT: store i8** null, i8*** [[TMP13]], align 8
2252 // CHECK5-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
2253 // CHECK5-NEXT: store i8** null, i8*** [[TMP14]], align 8
2254 // CHECK5-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
2255 // CHECK5-NEXT: store i64 123, i64* [[TMP15]], align 8
2256 // CHECK5-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
2257 // CHECK5-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
2258 // CHECK5-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2259 // CHECK5: omp_offload.failed:
2260 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
2261 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT]]
2262 // CHECK5: omp_offload.cont:
2263 // CHECK5-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2264 // CHECK5-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
2265 // CHECK5-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
2266 // CHECK5-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8
2267 // CHECK5-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
2268 // CHECK5-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
2269 // CHECK5-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP21]], align 8
2270 // CHECK5-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0
2271 // CHECK5-NEXT: store i8* null, i8** [[TMP22]], align 8
2272 // CHECK5-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
2273 // CHECK5-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
2274 // CHECK5-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2275 // CHECK5-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 0
2276 // CHECK5-NEXT: store i32 1, i32* [[TMP25]], align 4
2277 // CHECK5-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 1
2278 // CHECK5-NEXT: store i32 1, i32* [[TMP26]], align 4
2279 // CHECK5-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 2
2280 // CHECK5-NEXT: store i8** [[TMP23]], i8*** [[TMP27]], align 8
2281 // CHECK5-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 3
2282 // CHECK5-NEXT: store i8** [[TMP24]], i8*** [[TMP28]], align 8
2283 // CHECK5-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 4
2284 // CHECK5-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64** [[TMP29]], align 8
2285 // CHECK5-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 5
2286 // CHECK5-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP30]], align 8
2287 // CHECK5-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 6
2288 // CHECK5-NEXT: store i8** null, i8*** [[TMP31]], align 8
2289 // CHECK5-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 7
2290 // CHECK5-NEXT: store i8** null, i8*** [[TMP32]], align 8
2291 // CHECK5-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 8
2292 // CHECK5-NEXT: store i64 123, i64* [[TMP33]], align 8
2293 // CHECK5-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]])
2294 // CHECK5-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
2295 // CHECK5-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]
2296 // CHECK5: omp_offload.failed8:
2297 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]]
2298 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT9]]
2299 // CHECK5: omp_offload.cont9:
2300 // CHECK5-NEXT: [[A10:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2301 // CHECK5-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
2302 // CHECK5-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
2303 // CHECK5-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 8
2304 // CHECK5-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
2305 // CHECK5-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
2306 // CHECK5-NEXT: store [123 x i32]* [[A10]], [123 x i32]** [[TMP39]], align 8
2307 // CHECK5-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS13]], i64 0, i64 0
2308 // CHECK5-NEXT: store i8* null, i8** [[TMP40]], align 8
2309 // CHECK5-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
2310 // CHECK5-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
2311 // CHECK5-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2312 // CHECK5-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 0
2313 // CHECK5-NEXT: store i32 1, i32* [[TMP43]], align 4
2314 // CHECK5-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 1
2315 // CHECK5-NEXT: store i32 1, i32* [[TMP44]], align 4
2316 // CHECK5-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 2
2317 // CHECK5-NEXT: store i8** [[TMP41]], i8*** [[TMP45]], align 8
2318 // CHECK5-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 3
2319 // CHECK5-NEXT: store i8** [[TMP42]], i8*** [[TMP46]], align 8
2320 // CHECK5-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 4
2321 // CHECK5-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64** [[TMP47]], align 8
2322 // CHECK5-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 5
2323 // CHECK5-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i64** [[TMP48]], align 8
2324 // CHECK5-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 6
2325 // CHECK5-NEXT: store i8** null, i8*** [[TMP49]], align 8
2326 // CHECK5-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 7
2327 // CHECK5-NEXT: store i8** null, i8*** [[TMP50]], align 8
2328 // CHECK5-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 8
2329 // CHECK5-NEXT: store i64 123, i64* [[TMP51]], align 8
2330 // CHECK5-NEXT: [[TMP52:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]])
2331 // CHECK5-NEXT: [[TMP53:%.*]] = icmp ne i32 [[TMP52]], 0
2332 // CHECK5-NEXT: br i1 [[TMP53]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
2333 // CHECK5: omp_offload.failed16:
2334 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(%struct.SS* [[THIS1]]) #[[ATTR2]]
2335 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT17]]
2336 // CHECK5: omp_offload.cont17:
2337 // CHECK5-NEXT: [[A18:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2338 // CHECK5-NEXT: [[TMP54:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
2339 // CHECK5-NEXT: [[TMP55:%.*]] = bitcast i8** [[TMP54]] to %struct.SS**
2340 // CHECK5-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP55]], align 8
2341 // CHECK5-NEXT: [[TMP56:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
2342 // CHECK5-NEXT: [[TMP57:%.*]] = bitcast i8** [[TMP56]] to [123 x i32]**
2343 // CHECK5-NEXT: store [123 x i32]* [[A18]], [123 x i32]** [[TMP57]], align 8
2344 // CHECK5-NEXT: [[TMP58:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 0
2345 // CHECK5-NEXT: store i8* null, i8** [[TMP58]], align 8
2346 // CHECK5-NEXT: [[TMP59:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
2347 // CHECK5-NEXT: [[TMP60:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
2348 // CHECK5-NEXT: [[KERNEL_ARGS23:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2349 // CHECK5-NEXT: [[TMP61:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 0
2350 // CHECK5-NEXT: store i32 1, i32* [[TMP61]], align 4
2351 // CHECK5-NEXT: [[TMP62:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 1
2352 // CHECK5-NEXT: store i32 1, i32* [[TMP62]], align 4
2353 // CHECK5-NEXT: [[TMP63:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 2
2354 // CHECK5-NEXT: store i8** [[TMP59]], i8*** [[TMP63]], align 8
2355 // CHECK5-NEXT: [[TMP64:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 3
2356 // CHECK5-NEXT: store i8** [[TMP60]], i8*** [[TMP64]], align 8
2357 // CHECK5-NEXT: [[TMP65:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 4
2358 // CHECK5-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64** [[TMP65]], align 8
2359 // CHECK5-NEXT: [[TMP66:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 5
2360 // CHECK5-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i64** [[TMP66]], align 8
2361 // CHECK5-NEXT: [[TMP67:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 6
2362 // CHECK5-NEXT: store i8** null, i8*** [[TMP67]], align 8
2363 // CHECK5-NEXT: [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 7
2364 // CHECK5-NEXT: store i8** null, i8*** [[TMP68]], align 8
2365 // CHECK5-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 8
2366 // CHECK5-NEXT: store i64 123, i64* [[TMP69]], align 8
2367 // CHECK5-NEXT: [[TMP70:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]])
2368 // CHECK5-NEXT: [[TMP71:%.*]] = icmp ne i32 [[TMP70]], 0
2369 // CHECK5-NEXT: br i1 [[TMP71]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]]
2370 // CHECK5: omp_offload.failed24:
2371 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(%struct.SS* [[THIS1]]) #[[ATTR2]]
2372 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT25]]
2373 // CHECK5: omp_offload.cont25:
2374 // CHECK5-NEXT: [[A26:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2375 // CHECK5-NEXT: [[TMP72:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0
2376 // CHECK5-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to %struct.SS**
2377 // CHECK5-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP73]], align 8
2378 // CHECK5-NEXT: [[TMP74:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS28]], i32 0, i32 0
2379 // CHECK5-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to [123 x i32]**
2380 // CHECK5-NEXT: store [123 x i32]* [[A26]], [123 x i32]** [[TMP75]], align 8
2381 // CHECK5-NEXT: [[TMP76:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS29]], i64 0, i64 0
2382 // CHECK5-NEXT: store i8* null, i8** [[TMP76]], align 8
2383 // CHECK5-NEXT: [[TMP77:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0
2384 // CHECK5-NEXT: [[TMP78:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS28]], i32 0, i32 0
2385 // CHECK5-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2386 // CHECK5-NEXT: [[TMP79:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 0
2387 // CHECK5-NEXT: store i32 1, i32* [[TMP79]], align 4
2388 // CHECK5-NEXT: [[TMP80:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 1
2389 // CHECK5-NEXT: store i32 1, i32* [[TMP80]], align 4
2390 // CHECK5-NEXT: [[TMP81:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 2
2391 // CHECK5-NEXT: store i8** [[TMP77]], i8*** [[TMP81]], align 8
2392 // CHECK5-NEXT: [[TMP82:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 3
2393 // CHECK5-NEXT: store i8** [[TMP78]], i8*** [[TMP82]], align 8
2394 // CHECK5-NEXT: [[TMP83:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 4
2395 // CHECK5-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64** [[TMP83]], align 8
2396 // CHECK5-NEXT: [[TMP84:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 5
2397 // CHECK5-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i64** [[TMP84]], align 8
2398 // CHECK5-NEXT: [[TMP85:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 6
2399 // CHECK5-NEXT: store i8** null, i8*** [[TMP85]], align 8
2400 // CHECK5-NEXT: [[TMP86:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 7
2401 // CHECK5-NEXT: store i8** null, i8*** [[TMP86]], align 8
2402 // CHECK5-NEXT: [[TMP87:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 8
2403 // CHECK5-NEXT: store i64 123, i64* [[TMP87]], align 8
2404 // CHECK5-NEXT: [[TMP88:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]])
2405 // CHECK5-NEXT: [[TMP89:%.*]] = icmp ne i32 [[TMP88]], 0
2406 // CHECK5-NEXT: br i1 [[TMP89]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
2407 // CHECK5: omp_offload.failed32:
2408 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(%struct.SS* [[THIS1]]) #[[ATTR2]]
2409 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT33]]
2410 // CHECK5: omp_offload.cont33:
2411 // CHECK5-NEXT: [[A34:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2412 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A34]], i64 0, i64 0
2413 // CHECK5-NEXT: [[TMP90:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
2414 // CHECK5-NEXT: ret i32 [[TMP90]]
2415 //
2416 //
2417 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35
2418 // CHECK5-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
2419 // CHECK5-NEXT: entry:
2420 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2421 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2422 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2423 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
2424 // CHECK5-NEXT: ret void
2425 //
2426 //
2427 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined.
2428 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
2429 // CHECK5-NEXT: entry:
2430 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2431 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2432 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2433 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2434 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2435 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2436 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2437 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2438 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2439 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2440 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2441 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2442 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2443 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2444 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2445 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
2446 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2447 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2448 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2449 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2450 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2451 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2452 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2453 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2454 // CHECK5: cond.true:
2455 // CHECK5-NEXT: br label [[COND_END:%.*]]
2456 // CHECK5: cond.false:
2457 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2458 // CHECK5-NEXT: br label [[COND_END]]
2459 // CHECK5: cond.end:
2460 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2461 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2462 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2463 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2464 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2465 // CHECK5: omp.inner.for.cond:
2466 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2467 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2468 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2469 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2470 // CHECK5: omp.inner.for.body:
2471 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2472 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
2473 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2474 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
2475 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
2476 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2477 // CHECK5: omp.inner.for.inc:
2478 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2479 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2480 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2481 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2482 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
2483 // CHECK5: omp.inner.for.end:
2484 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2485 // CHECK5: omp.loop.exit:
2486 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2487 // CHECK5-NEXT: ret void
2488 //
2489 //
2490 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..1
2491 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
2492 // CHECK5-NEXT: entry:
2493 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2494 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2495 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2496 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2497 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2498 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2499 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2500 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2501 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2502 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2503 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2504 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2505 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2506 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2507 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2508 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2509 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2510 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2511 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2512 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
2513 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2514 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
2515 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2516 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
2517 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2518 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2519 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2520 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2521 // CHECK5-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2522 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2523 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2524 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2525 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
2526 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2527 // CHECK5: cond.true:
2528 // CHECK5-NEXT: br label [[COND_END:%.*]]
2529 // CHECK5: cond.false:
2530 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2531 // CHECK5-NEXT: br label [[COND_END]]
2532 // CHECK5: cond.end:
2533 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
2534 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2535 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2536 // CHECK5-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
2537 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2538 // CHECK5: omp.inner.for.cond:
2539 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2540 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2541 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2542 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2543 // CHECK5: omp.inner.for.body:
2544 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2545 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2546 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2547 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2548 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
2549 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
2550 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
2551 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
2552 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
2553 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2554 // CHECK5: omp.body.continue:
2555 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2556 // CHECK5: omp.inner.for.inc:
2557 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2558 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
2559 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
2560 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
2561 // CHECK5: omp.inner.for.end:
2562 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2563 // CHECK5: omp.loop.exit:
2564 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
2565 // CHECK5-NEXT: ret void
2566 //
2567 //
2568 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
2569 // CHECK5-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
2570 // CHECK5-NEXT: entry:
2571 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2572 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2573 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2574 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
2575 // CHECK5-NEXT: ret void
2576 //
2577 //
2578 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..2
2579 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
2580 // CHECK5-NEXT: entry:
2581 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2582 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2583 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2584 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2585 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2586 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2587 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2588 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2589 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2590 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2591 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2592 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2593 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2594 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2595 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2596 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
2597 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2598 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2599 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2600 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2601 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2602 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2603 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2604 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2605 // CHECK5: cond.true:
2606 // CHECK5-NEXT: br label [[COND_END:%.*]]
2607 // CHECK5: cond.false:
2608 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2609 // CHECK5-NEXT: br label [[COND_END]]
2610 // CHECK5: cond.end:
2611 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2612 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2613 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2614 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2615 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2616 // CHECK5: omp.inner.for.cond:
2617 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2618 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2619 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2620 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2621 // CHECK5: omp.inner.for.body:
2622 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2623 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
2624 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2625 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
2626 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
2627 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2628 // CHECK5: omp.inner.for.inc:
2629 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2630 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2631 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2632 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2633 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
2634 // CHECK5: omp.inner.for.end:
2635 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2636 // CHECK5: omp.loop.exit:
2637 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2638 // CHECK5-NEXT: ret void
2639 //
2640 //
2641 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..3
2642 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
2643 // CHECK5-NEXT: entry:
2644 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2645 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2646 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2647 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2648 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2649 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2650 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2651 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2652 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2653 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2654 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2655 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2656 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2657 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2658 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2659 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2660 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2661 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2662 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2663 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
2664 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2665 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
2666 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2667 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
2668 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2669 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2670 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2671 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2672 // CHECK5-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2673 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2674 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2675 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2676 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
2677 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2678 // CHECK5: cond.true:
2679 // CHECK5-NEXT: br label [[COND_END:%.*]]
2680 // CHECK5: cond.false:
2681 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2682 // CHECK5-NEXT: br label [[COND_END]]
2683 // CHECK5: cond.end:
2684 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
2685 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2686 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2687 // CHECK5-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
2688 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2689 // CHECK5: omp.inner.for.cond:
2690 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2691 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2692 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2693 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2694 // CHECK5: omp.inner.for.body:
2695 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2696 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2697 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2698 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2699 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
2700 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
2701 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
2702 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
2703 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
2704 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2705 // CHECK5: omp.body.continue:
2706 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2707 // CHECK5: omp.inner.for.inc:
2708 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2709 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
2710 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
2711 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
2712 // CHECK5: omp.inner.for.end:
2713 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2714 // CHECK5: omp.loop.exit:
2715 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
2716 // CHECK5-NEXT: ret void
2717 //
2718 //
2719 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45
2720 // CHECK5-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
2721 // CHECK5-NEXT: entry:
2722 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2723 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2724 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2725 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
2726 // CHECK5-NEXT: ret void
2727 //
2728 //
2729 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..6
2730 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
2731 // CHECK5-NEXT: entry:
2732 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2733 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2734 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2735 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2736 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2737 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2738 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2739 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2740 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2741 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2742 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2743 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2744 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2745 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2746 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2747 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
2748 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2749 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2750 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2751 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2752 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2753 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2754 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2755 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2756 // CHECK5: cond.true:
2757 // CHECK5-NEXT: br label [[COND_END:%.*]]
2758 // CHECK5: cond.false:
2759 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2760 // CHECK5-NEXT: br label [[COND_END]]
2761 // CHECK5: cond.end:
2762 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2763 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2764 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2765 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2766 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2767 // CHECK5: omp.inner.for.cond:
2768 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2769 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2770 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2771 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2772 // CHECK5: omp.inner.for.body:
2773 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2774 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
2775 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2776 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
2777 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
2778 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2779 // CHECK5: omp.inner.for.inc:
2780 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2781 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2782 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2783 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2784 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
2785 // CHECK5: omp.inner.for.end:
2786 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2787 // CHECK5: omp.loop.exit:
2788 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2789 // CHECK5-NEXT: ret void
2790 //
2791 //
2792 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..7
2793 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
2794 // CHECK5-NEXT: entry:
2795 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2796 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2797 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2798 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2799 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2800 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2801 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2802 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2803 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2804 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2805 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2806 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2807 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2808 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2809 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2810 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2811 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2812 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2813 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2814 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
2815 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2816 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
2817 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2818 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
2819 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2820 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2821 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2822 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2823 // CHECK5-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2824 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2825 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
2826 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
2827 // CHECK5: omp.dispatch.cond:
2828 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2829 // CHECK5-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2830 // CHECK5-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32
2831 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]]
2832 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2833 // CHECK5: cond.true:
2834 // CHECK5-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2835 // CHECK5-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
2836 // CHECK5-NEXT: br label [[COND_END:%.*]]
2837 // CHECK5: cond.false:
2838 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2839 // CHECK5-NEXT: br label [[COND_END]]
2840 // CHECK5: cond.end:
2841 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
2842 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2843 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2844 // CHECK5-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
2845 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2846 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2847 // CHECK5-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
2848 // CHECK5-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2849 // CHECK5: omp.dispatch.body:
2850 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2851 // CHECK5: omp.inner.for.cond:
2852 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2853 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2854 // CHECK5-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
2855 // CHECK5-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2856 // CHECK5: omp.inner.for.body:
2857 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2858 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
2859 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2860 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4
2861 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
2862 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
2863 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
2864 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
2865 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
2866 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2867 // CHECK5: omp.body.continue:
2868 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2869 // CHECK5: omp.inner.for.inc:
2870 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2871 // CHECK5-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1
2872 // CHECK5-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
2873 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
2874 // CHECK5: omp.inner.for.end:
2875 // CHECK5-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
2876 // CHECK5: omp.dispatch.inc:
2877 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2878 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2879 // CHECK5-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
2880 // CHECK5-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4
2881 // CHECK5-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2882 // CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2883 // CHECK5-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
2884 // CHECK5-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4
2885 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND]]
2886 // CHECK5: omp.dispatch.end:
2887 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
2888 // CHECK5-NEXT: ret void
2889 //
2890 //
2891 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51
2892 // CHECK5-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
2893 // CHECK5-NEXT: entry:
2894 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2895 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2896 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2897 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
2898 // CHECK5-NEXT: ret void
2899 //
2900 //
2901 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..10
2902 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
2903 // CHECK5-NEXT: entry:
2904 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2905 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2906 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2907 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2908 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2909 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2910 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2911 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2912 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2913 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2914 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2915 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2916 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2917 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2918 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2919 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
2920 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2921 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2922 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2923 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2924 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2925 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2926 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2927 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2928 // CHECK5: cond.true:
2929 // CHECK5-NEXT: br label [[COND_END:%.*]]
2930 // CHECK5: cond.false:
2931 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2932 // CHECK5-NEXT: br label [[COND_END]]
2933 // CHECK5: cond.end:
2934 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2935 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2936 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2937 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2938 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2939 // CHECK5: omp.inner.for.cond:
2940 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2941 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2942 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2943 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2944 // CHECK5: omp.inner.for.body:
2945 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2946 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
2947 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2948 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
2949 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
2950 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2951 // CHECK5: omp.inner.for.inc:
2952 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2953 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2954 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2955 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2956 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
2957 // CHECK5: omp.inner.for.end:
2958 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2959 // CHECK5: omp.loop.exit:
2960 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2961 // CHECK5-NEXT: ret void
2962 //
2963 //
2964 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..11
2965 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
2966 // CHECK5-NEXT: entry:
2967 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
2968 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
2969 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2970 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2971 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
2972 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2973 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
2974 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2975 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2976 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2977 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2978 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
2979 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
2980 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
2981 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2982 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2983 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
2984 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
2985 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
2986 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
2987 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
2988 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
2989 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
2990 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
2991 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
2992 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
2993 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2994 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2995 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2996 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2997 // CHECK5-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
2998 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
2999 // CHECK5-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
3000 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
3001 // CHECK5: omp.dispatch.cond:
3002 // CHECK5-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
3003 // CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
3004 // CHECK5-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3005 // CHECK5: omp.dispatch.body:
3006 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3007 // CHECK5-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
3008 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3009 // CHECK5: omp.inner.for.cond:
3010 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
3011 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10
3012 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
3013 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3014 // CHECK5: omp.inner.for.body:
3015 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
3016 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
3017 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3018 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !10
3019 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
3020 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !10
3021 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
3022 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
3023 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !10
3024 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3025 // CHECK5: omp.body.continue:
3026 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3027 // CHECK5: omp.inner.for.inc:
3028 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
3029 // CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
3030 // CHECK5-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
3031 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
3032 // CHECK5: omp.inner.for.end:
3033 // CHECK5-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
3034 // CHECK5: omp.dispatch.inc:
3035 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND]]
3036 // CHECK5: omp.dispatch.end:
3037 // CHECK5-NEXT: ret void
3038 //
3039 //
3040 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57
3041 // CHECK5-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
3042 // CHECK5-NEXT: entry:
3043 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3044 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3045 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3046 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3047 // CHECK5-NEXT: ret void
3048 //
3049 //
3050 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..14
3051 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
3052 // CHECK5-NEXT: entry:
3053 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3054 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3055 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3056 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3057 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
3058 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3059 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3060 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3061 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3062 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
3063 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3064 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3065 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3066 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3067 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3068 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
3069 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3070 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3071 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3072 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3073 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3074 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3075 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3076 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3077 // CHECK5: cond.true:
3078 // CHECK5-NEXT: br label [[COND_END:%.*]]
3079 // CHECK5: cond.false:
3080 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3081 // CHECK5-NEXT: br label [[COND_END]]
3082 // CHECK5: cond.end:
3083 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3084 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3085 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3086 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3087 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3088 // CHECK5: omp.inner.for.cond:
3089 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3090 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3091 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3092 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3093 // CHECK5: omp.inner.for.body:
3094 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3095 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
3096 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3097 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
3098 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
3099 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3100 // CHECK5: omp.inner.for.inc:
3101 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3102 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3103 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
3104 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3105 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]]
3106 // CHECK5: omp.inner.for.end:
3107 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3108 // CHECK5: omp.loop.exit:
3109 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3110 // CHECK5-NEXT: ret void
3111 //
3112 //
3113 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..15
3114 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
3115 // CHECK5-NEXT: entry:
3116 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3117 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3118 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3119 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3120 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3121 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3122 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4
3123 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3124 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3125 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3126 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3127 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4
3128 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3129 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3130 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3131 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3132 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3133 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3134 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3135 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
3136 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
3137 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
3138 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
3139 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
3140 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
3141 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
3142 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3143 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3144 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3145 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3146 // CHECK5-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3147 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
3148 // CHECK5-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
3149 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
3150 // CHECK5: omp.dispatch.cond:
3151 // CHECK5-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
3152 // CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
3153 // CHECK5-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3154 // CHECK5: omp.dispatch.body:
3155 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3156 // CHECK5-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
3157 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3158 // CHECK5: omp.inner.for.cond:
3159 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
3160 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
3161 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
3162 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3163 // CHECK5: omp.inner.for.body:
3164 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
3165 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
3166 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3167 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
3168 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
3169 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13
3170 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
3171 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
3172 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13
3173 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3174 // CHECK5: omp.body.continue:
3175 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3176 // CHECK5: omp.inner.for.inc:
3177 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
3178 // CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
3179 // CHECK5-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
3180 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
3181 // CHECK5: omp.inner.for.end:
3182 // CHECK5-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
3183 // CHECK5: omp.dispatch.inc:
3184 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND]]
3185 // CHECK5: omp.dispatch.end:
3186 // CHECK5-NEXT: ret void
3187 //
3188 //
3189 // CHECK5-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3190 // CHECK5-SAME: () #[[ATTR3:[0-9]+]] {
3191 // CHECK5-NEXT: entry:
3192 // CHECK5-NEXT: call void @__tgt_register_requires(i64 1)
3193 // CHECK5-NEXT: ret void
3194 //
3195 //
3196 // CHECK7-LABEL: define {{[^@]+}}@_Z21teams_template_structv
3197 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] {
3198 // CHECK7-NEXT: entry:
3199 // CHECK7-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
3200 // CHECK7-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]])
3201 // CHECK7-NEXT: ret i32 [[CALL]]
3202 //
3203 //
3204 // CHECK7-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
3205 // CHECK7-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
3206 // CHECK7-NEXT: entry:
3207 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3208 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
3209 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
3210 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
3211 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
3212 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4
3213 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4
3214 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4
3215 // CHECK7-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
3216 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x i8*], align 4
3217 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x i8*], align 4
3218 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x i8*], align 4
3219 // CHECK7-NEXT: [[_TMP14:%.*]] = alloca i32, align 4
3220 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [1 x i8*], align 4
3221 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [1 x i8*], align 4
3222 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [1 x i8*], align 4
3223 // CHECK7-NEXT: [[_TMP22:%.*]] = alloca i32, align 4
3224 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS27:%.*]] = alloca [1 x i8*], align 4
3225 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS28:%.*]] = alloca [1 x i8*], align 4
3226 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS29:%.*]] = alloca [1 x i8*], align 4
3227 // CHECK7-NEXT: [[_TMP30:%.*]] = alloca i32, align 4
3228 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3229 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3230 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
3231 // CHECK7-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3232 // CHECK7-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
3233 // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4
3234 // CHECK7-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3235 // CHECK7-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
3236 // CHECK7-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4
3237 // CHECK7-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
3238 // CHECK7-NEXT: store i8* null, i8** [[TMP4]], align 4
3239 // CHECK7-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3240 // CHECK7-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3241 // CHECK7-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
3242 // CHECK7-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
3243 // CHECK7-NEXT: store i32 1, i32* [[TMP7]], align 4
3244 // CHECK7-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
3245 // CHECK7-NEXT: store i32 1, i32* [[TMP8]], align 4
3246 // CHECK7-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
3247 // CHECK7-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 4
3248 // CHECK7-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
3249 // CHECK7-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 4
3250 // CHECK7-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
3251 // CHECK7-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64** [[TMP11]], align 4
3252 // CHECK7-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
3253 // CHECK7-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP12]], align 4
3254 // CHECK7-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
3255 // CHECK7-NEXT: store i8** null, i8*** [[TMP13]], align 4
3256 // CHECK7-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
3257 // CHECK7-NEXT: store i8** null, i8*** [[TMP14]], align 4
3258 // CHECK7-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
3259 // CHECK7-NEXT: store i64 123, i64* [[TMP15]], align 8
3260 // CHECK7-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
3261 // CHECK7-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
3262 // CHECK7-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3263 // CHECK7: omp_offload.failed:
3264 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
3265 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT]]
3266 // CHECK7: omp_offload.cont:
3267 // CHECK7-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3268 // CHECK7-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
3269 // CHECK7-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
3270 // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4
3271 // CHECK7-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
3272 // CHECK7-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
3273 // CHECK7-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP21]], align 4
3274 // CHECK7-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
3275 // CHECK7-NEXT: store i8* null, i8** [[TMP22]], align 4
3276 // CHECK7-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
3277 // CHECK7-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
3278 // CHECK7-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
3279 // CHECK7-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 0
3280 // CHECK7-NEXT: store i32 1, i32* [[TMP25]], align 4
3281 // CHECK7-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 1
3282 // CHECK7-NEXT: store i32 1, i32* [[TMP26]], align 4
3283 // CHECK7-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 2
3284 // CHECK7-NEXT: store i8** [[TMP23]], i8*** [[TMP27]], align 4
3285 // CHECK7-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 3
3286 // CHECK7-NEXT: store i8** [[TMP24]], i8*** [[TMP28]], align 4
3287 // CHECK7-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 4
3288 // CHECK7-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64** [[TMP29]], align 4
3289 // CHECK7-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 5
3290 // CHECK7-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP30]], align 4
3291 // CHECK7-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 6
3292 // CHECK7-NEXT: store i8** null, i8*** [[TMP31]], align 4
3293 // CHECK7-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 7
3294 // CHECK7-NEXT: store i8** null, i8*** [[TMP32]], align 4
3295 // CHECK7-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]], i32 0, i32 8
3296 // CHECK7-NEXT: store i64 123, i64* [[TMP33]], align 8
3297 // CHECK7-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS7]])
3298 // CHECK7-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
3299 // CHECK7-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]
3300 // CHECK7: omp_offload.failed8:
3301 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]]
3302 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT9]]
3303 // CHECK7: omp_offload.cont9:
3304 // CHECK7-NEXT: [[A10:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3305 // CHECK7-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
3306 // CHECK7-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
3307 // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 4
3308 // CHECK7-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
3309 // CHECK7-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
3310 // CHECK7-NEXT: store [123 x i32]* [[A10]], [123 x i32]** [[TMP39]], align 4
3311 // CHECK7-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS13]], i32 0, i32 0
3312 // CHECK7-NEXT: store i8* null, i8** [[TMP40]], align 4
3313 // CHECK7-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
3314 // CHECK7-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
3315 // CHECK7-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
3316 // CHECK7-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 0
3317 // CHECK7-NEXT: store i32 1, i32* [[TMP43]], align 4
3318 // CHECK7-NEXT: [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 1
3319 // CHECK7-NEXT: store i32 1, i32* [[TMP44]], align 4
3320 // CHECK7-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 2
3321 // CHECK7-NEXT: store i8** [[TMP41]], i8*** [[TMP45]], align 4
3322 // CHECK7-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 3
3323 // CHECK7-NEXT: store i8** [[TMP42]], i8*** [[TMP46]], align 4
3324 // CHECK7-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 4
3325 // CHECK7-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64** [[TMP47]], align 4
3326 // CHECK7-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 5
3327 // CHECK7-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i64** [[TMP48]], align 4
3328 // CHECK7-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 6
3329 // CHECK7-NEXT: store i8** null, i8*** [[TMP49]], align 4
3330 // CHECK7-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 7
3331 // CHECK7-NEXT: store i8** null, i8*** [[TMP50]], align 4
3332 // CHECK7-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 8
3333 // CHECK7-NEXT: store i64 123, i64* [[TMP51]], align 8
3334 // CHECK7-NEXT: [[TMP52:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]])
3335 // CHECK7-NEXT: [[TMP53:%.*]] = icmp ne i32 [[TMP52]], 0
3336 // CHECK7-NEXT: br i1 [[TMP53]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
3337 // CHECK7: omp_offload.failed16:
3338 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(%struct.SS* [[THIS1]]) #[[ATTR2]]
3339 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT17]]
3340 // CHECK7: omp_offload.cont17:
3341 // CHECK7-NEXT: [[A18:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3342 // CHECK7-NEXT: [[TMP54:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
3343 // CHECK7-NEXT: [[TMP55:%.*]] = bitcast i8** [[TMP54]] to %struct.SS**
3344 // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP55]], align 4
3345 // CHECK7-NEXT: [[TMP56:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
3346 // CHECK7-NEXT: [[TMP57:%.*]] = bitcast i8** [[TMP56]] to [123 x i32]**
3347 // CHECK7-NEXT: store [123 x i32]* [[A18]], [123 x i32]** [[TMP57]], align 4
3348 // CHECK7-NEXT: [[TMP58:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 0
3349 // CHECK7-NEXT: store i8* null, i8** [[TMP58]], align 4
3350 // CHECK7-NEXT: [[TMP59:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
3351 // CHECK7-NEXT: [[TMP60:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
3352 // CHECK7-NEXT: [[KERNEL_ARGS23:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
3353 // CHECK7-NEXT: [[TMP61:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 0
3354 // CHECK7-NEXT: store i32 1, i32* [[TMP61]], align 4
3355 // CHECK7-NEXT: [[TMP62:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 1
3356 // CHECK7-NEXT: store i32 1, i32* [[TMP62]], align 4
3357 // CHECK7-NEXT: [[TMP63:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 2
3358 // CHECK7-NEXT: store i8** [[TMP59]], i8*** [[TMP63]], align 4
3359 // CHECK7-NEXT: [[TMP64:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 3
3360 // CHECK7-NEXT: store i8** [[TMP60]], i8*** [[TMP64]], align 4
3361 // CHECK7-NEXT: [[TMP65:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 4
3362 // CHECK7-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64** [[TMP65]], align 4
3363 // CHECK7-NEXT: [[TMP66:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 5
3364 // CHECK7-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i64** [[TMP66]], align 4
3365 // CHECK7-NEXT: [[TMP67:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 6
3366 // CHECK7-NEXT: store i8** null, i8*** [[TMP67]], align 4
3367 // CHECK7-NEXT: [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 7
3368 // CHECK7-NEXT: store i8** null, i8*** [[TMP68]], align 4
3369 // CHECK7-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]], i32 0, i32 8
3370 // CHECK7-NEXT: store i64 123, i64* [[TMP69]], align 8
3371 // CHECK7-NEXT: [[TMP70:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS23]])
3372 // CHECK7-NEXT: [[TMP71:%.*]] = icmp ne i32 [[TMP70]], 0
3373 // CHECK7-NEXT: br i1 [[TMP71]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]]
3374 // CHECK7: omp_offload.failed24:
3375 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(%struct.SS* [[THIS1]]) #[[ATTR2]]
3376 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT25]]
3377 // CHECK7: omp_offload.cont25:
3378 // CHECK7-NEXT: [[A26:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3379 // CHECK7-NEXT: [[TMP72:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0
3380 // CHECK7-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to %struct.SS**
3381 // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP73]], align 4
3382 // CHECK7-NEXT: [[TMP74:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS28]], i32 0, i32 0
3383 // CHECK7-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to [123 x i32]**
3384 // CHECK7-NEXT: store [123 x i32]* [[A26]], [123 x i32]** [[TMP75]], align 4
3385 // CHECK7-NEXT: [[TMP76:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS29]], i32 0, i32 0
3386 // CHECK7-NEXT: store i8* null, i8** [[TMP76]], align 4
3387 // CHECK7-NEXT: [[TMP77:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0
3388 // CHECK7-NEXT: [[TMP78:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS28]], i32 0, i32 0
3389 // CHECK7-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
3390 // CHECK7-NEXT: [[TMP79:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 0
3391 // CHECK7-NEXT: store i32 1, i32* [[TMP79]], align 4
3392 // CHECK7-NEXT: [[TMP80:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 1
3393 // CHECK7-NEXT: store i32 1, i32* [[TMP80]], align 4
3394 // CHECK7-NEXT: [[TMP81:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 2
3395 // CHECK7-NEXT: store i8** [[TMP77]], i8*** [[TMP81]], align 4
3396 // CHECK7-NEXT: [[TMP82:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 3
3397 // CHECK7-NEXT: store i8** [[TMP78]], i8*** [[TMP82]], align 4
3398 // CHECK7-NEXT: [[TMP83:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 4
3399 // CHECK7-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64** [[TMP83]], align 4
3400 // CHECK7-NEXT: [[TMP84:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 5
3401 // CHECK7-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i64** [[TMP84]], align 4
3402 // CHECK7-NEXT: [[TMP85:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 6
3403 // CHECK7-NEXT: store i8** null, i8*** [[TMP85]], align 4
3404 // CHECK7-NEXT: [[TMP86:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 7
3405 // CHECK7-NEXT: store i8** null, i8*** [[TMP86]], align 4
3406 // CHECK7-NEXT: [[TMP87:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]], i32 0, i32 8
3407 // CHECK7-NEXT: store i64 123, i64* [[TMP87]], align 8
3408 // CHECK7-NEXT: [[TMP88:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS31]])
3409 // CHECK7-NEXT: [[TMP89:%.*]] = icmp ne i32 [[TMP88]], 0
3410 // CHECK7-NEXT: br i1 [[TMP89]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
3411 // CHECK7: omp_offload.failed32:
3412 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(%struct.SS* [[THIS1]]) #[[ATTR2]]
3413 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT33]]
3414 // CHECK7: omp_offload.cont33:
3415 // CHECK7-NEXT: [[A34:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3416 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A34]], i32 0, i32 0
3417 // CHECK7-NEXT: [[TMP90:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
3418 // CHECK7-NEXT: ret i32 [[TMP90]]
3419 //
3420 //
3421 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35
3422 // CHECK7-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
3423 // CHECK7-NEXT: entry:
3424 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3425 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3426 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3427 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3428 // CHECK7-NEXT: ret void
3429 //
3430 //
3431 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined.
3432 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
3433 // CHECK7-NEXT: entry:
3434 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3435 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3436 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3437 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3438 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
3439 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3440 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3441 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3442 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3443 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
3444 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3445 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3446 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3447 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3448 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3449 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
3450 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3451 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3452 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3453 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3454 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3455 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3456 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3457 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3458 // CHECK7: cond.true:
3459 // CHECK7-NEXT: br label [[COND_END:%.*]]
3460 // CHECK7: cond.false:
3461 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3462 // CHECK7-NEXT: br label [[COND_END]]
3463 // CHECK7: cond.end:
3464 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3465 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3466 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3467 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3468 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3469 // CHECK7: omp.inner.for.cond:
3470 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3471 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3472 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3473 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3474 // CHECK7: omp.inner.for.body:
3475 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3476 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3477 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
3478 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3479 // CHECK7: omp.inner.for.inc:
3480 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3481 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3482 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
3483 // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3484 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]]
3485 // CHECK7: omp.inner.for.end:
3486 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3487 // CHECK7: omp.loop.exit:
3488 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3489 // CHECK7-NEXT: ret void
3490 //
3491 //
3492 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..1
3493 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
3494 // CHECK7-NEXT: entry:
3495 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3496 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3497 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3498 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3499 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3500 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3501 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
3502 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3503 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3504 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3505 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3506 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
3507 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3508 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3509 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3510 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3511 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3512 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3513 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3514 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
3515 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3516 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3517 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
3518 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
3519 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3520 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3521 // CHECK7-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3522 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
3523 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3524 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3525 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
3526 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3527 // CHECK7: cond.true:
3528 // CHECK7-NEXT: br label [[COND_END:%.*]]
3529 // CHECK7: cond.false:
3530 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3531 // CHECK7-NEXT: br label [[COND_END]]
3532 // CHECK7: cond.end:
3533 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
3534 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3535 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3536 // CHECK7-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
3537 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3538 // CHECK7: omp.inner.for.cond:
3539 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3540 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3541 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
3542 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3543 // CHECK7: omp.inner.for.body:
3544 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3545 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
3546 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3547 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3548 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
3549 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
3550 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
3551 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
3552 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3553 // CHECK7: omp.body.continue:
3554 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3555 // CHECK7: omp.inner.for.inc:
3556 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3557 // CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
3558 // CHECK7-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
3559 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]]
3560 // CHECK7: omp.inner.for.end:
3561 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3562 // CHECK7: omp.loop.exit:
3563 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
3564 // CHECK7-NEXT: ret void
3565 //
3566 //
3567 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
3568 // CHECK7-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
3569 // CHECK7-NEXT: entry:
3570 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3571 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3572 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3573 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3574 // CHECK7-NEXT: ret void
3575 //
3576 //
3577 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..2
3578 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
3579 // CHECK7-NEXT: entry:
3580 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3581 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3582 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3583 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3584 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
3585 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3586 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3587 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3588 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3589 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
3590 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3591 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3592 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3593 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3594 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3595 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
3596 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3597 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3598 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3599 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3600 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3601 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3602 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3603 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3604 // CHECK7: cond.true:
3605 // CHECK7-NEXT: br label [[COND_END:%.*]]
3606 // CHECK7: cond.false:
3607 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3608 // CHECK7-NEXT: br label [[COND_END]]
3609 // CHECK7: cond.end:
3610 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3611 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3612 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3613 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3614 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3615 // CHECK7: omp.inner.for.cond:
3616 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3617 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3618 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3619 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3620 // CHECK7: omp.inner.for.body:
3621 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3622 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3623 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
3624 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3625 // CHECK7: omp.inner.for.inc:
3626 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3627 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3628 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
3629 // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3630 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]]
3631 // CHECK7: omp.inner.for.end:
3632 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3633 // CHECK7: omp.loop.exit:
3634 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3635 // CHECK7-NEXT: ret void
3636 //
3637 //
3638 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..3
3639 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
3640 // CHECK7-NEXT: entry:
3641 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3642 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3643 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3644 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3645 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3646 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3647 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
3648 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3649 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3650 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3651 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3652 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
3653 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3654 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3655 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3656 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3657 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3658 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3659 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3660 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
3661 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3662 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3663 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
3664 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
3665 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3666 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3667 // CHECK7-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3668 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
3669 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3670 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3671 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
3672 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3673 // CHECK7: cond.true:
3674 // CHECK7-NEXT: br label [[COND_END:%.*]]
3675 // CHECK7: cond.false:
3676 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3677 // CHECK7-NEXT: br label [[COND_END]]
3678 // CHECK7: cond.end:
3679 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
3680 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3681 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3682 // CHECK7-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
3683 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3684 // CHECK7: omp.inner.for.cond:
3685 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3686 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3687 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
3688 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3689 // CHECK7: omp.inner.for.body:
3690 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3691 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
3692 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3693 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3694 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
3695 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
3696 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
3697 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
3698 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3699 // CHECK7: omp.body.continue:
3700 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3701 // CHECK7: omp.inner.for.inc:
3702 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3703 // CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
3704 // CHECK7-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
3705 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]]
3706 // CHECK7: omp.inner.for.end:
3707 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3708 // CHECK7: omp.loop.exit:
3709 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
3710 // CHECK7-NEXT: ret void
3711 //
3712 //
3713 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45
3714 // CHECK7-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
3715 // CHECK7-NEXT: entry:
3716 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3717 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3718 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3719 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3720 // CHECK7-NEXT: ret void
3721 //
3722 //
3723 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..6
3724 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
3725 // CHECK7-NEXT: entry:
3726 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3727 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3728 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3729 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3730 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
3731 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3732 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3733 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3734 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3735 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
3736 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3737 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3738 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3739 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3740 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3741 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
3742 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3743 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3744 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3745 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3746 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3747 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3748 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3749 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3750 // CHECK7: cond.true:
3751 // CHECK7-NEXT: br label [[COND_END:%.*]]
3752 // CHECK7: cond.false:
3753 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3754 // CHECK7-NEXT: br label [[COND_END]]
3755 // CHECK7: cond.end:
3756 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3757 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3758 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3759 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3760 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3761 // CHECK7: omp.inner.for.cond:
3762 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3763 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3764 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3765 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3766 // CHECK7: omp.inner.for.body:
3767 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3768 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3769 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
3770 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3771 // CHECK7: omp.inner.for.inc:
3772 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3773 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3774 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
3775 // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3776 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]]
3777 // CHECK7: omp.inner.for.end:
3778 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3779 // CHECK7: omp.loop.exit:
3780 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3781 // CHECK7-NEXT: ret void
3782 //
3783 //
3784 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..7
3785 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
3786 // CHECK7-NEXT: entry:
3787 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3788 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3789 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3790 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3791 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3792 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3793 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
3794 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3795 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3796 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3797 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3798 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
3799 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3800 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3801 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3802 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3803 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3804 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3805 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3806 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
3807 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3808 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3809 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
3810 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
3811 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3812 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3813 // CHECK7-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3814 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
3815 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
3816 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
3817 // CHECK7: omp.dispatch.cond:
3818 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3819 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3820 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]]
3821 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3822 // CHECK7: cond.true:
3823 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3824 // CHECK7-NEXT: br label [[COND_END:%.*]]
3825 // CHECK7: cond.false:
3826 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3827 // CHECK7-NEXT: br label [[COND_END]]
3828 // CHECK7: cond.end:
3829 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
3830 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3831 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3832 // CHECK7-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
3833 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3834 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3835 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
3836 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3837 // CHECK7: omp.dispatch.body:
3838 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3839 // CHECK7: omp.inner.for.cond:
3840 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3841 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3842 // CHECK7-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
3843 // CHECK7-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3844 // CHECK7: omp.inner.for.body:
3845 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3846 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
3847 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3848 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4
3849 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
3850 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4
3851 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP15]]
3852 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
3853 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3854 // CHECK7: omp.body.continue:
3855 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3856 // CHECK7: omp.inner.for.inc:
3857 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3858 // CHECK7-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1
3859 // CHECK7-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
3860 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]]
3861 // CHECK7: omp.inner.for.end:
3862 // CHECK7-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
3863 // CHECK7: omp.dispatch.inc:
3864 // CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3865 // CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3866 // CHECK7-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
3867 // CHECK7-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
3868 // CHECK7-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3869 // CHECK7-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3870 // CHECK7-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
3871 // CHECK7-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
3872 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND]]
3873 // CHECK7: omp.dispatch.end:
3874 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
3875 // CHECK7-NEXT: ret void
3876 //
3877 //
3878 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51
3879 // CHECK7-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
3880 // CHECK7-NEXT: entry:
3881 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3882 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3883 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3884 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3885 // CHECK7-NEXT: ret void
3886 //
3887 //
3888 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..10
3889 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
3890 // CHECK7-NEXT: entry:
3891 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3892 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3893 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3894 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3895 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
3896 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3897 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3898 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3899 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3900 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
3901 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3902 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3903 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3904 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3905 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3906 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
3907 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3908 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3909 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3910 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3911 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3912 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3913 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3914 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3915 // CHECK7: cond.true:
3916 // CHECK7-NEXT: br label [[COND_END:%.*]]
3917 // CHECK7: cond.false:
3918 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3919 // CHECK7-NEXT: br label [[COND_END]]
3920 // CHECK7: cond.end:
3921 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3922 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3923 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3924 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3925 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3926 // CHECK7: omp.inner.for.cond:
3927 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3928 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3929 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3930 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3931 // CHECK7: omp.inner.for.body:
3932 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3933 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3934 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
3935 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3936 // CHECK7: omp.inner.for.inc:
3937 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3938 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3939 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
3940 // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3941 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]]
3942 // CHECK7: omp.inner.for.end:
3943 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
3944 // CHECK7: omp.loop.exit:
3945 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3946 // CHECK7-NEXT: ret void
3947 //
3948 //
3949 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..11
3950 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
3951 // CHECK7-NEXT: entry:
3952 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3953 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3954 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3955 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3956 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3957 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
3958 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
3959 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
3960 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
3961 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3962 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3963 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
3964 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3965 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3966 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3967 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3968 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3969 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3970 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
3971 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
3972 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3973 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3974 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
3975 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
3976 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3977 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3978 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3979 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3980 // CHECK7-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3981 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
3982 // CHECK7-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
3983 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
3984 // CHECK7: omp.dispatch.cond:
3985 // CHECK7-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
3986 // CHECK7-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
3987 // CHECK7-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3988 // CHECK7: omp.dispatch.body:
3989 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3990 // CHECK7-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
3991 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3992 // CHECK7: omp.inner.for.cond:
3993 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
3994 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11
3995 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
3996 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3997 // CHECK7: omp.inner.for.body:
3998 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
3999 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
4000 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4001 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !11
4002 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
4003 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11
4004 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
4005 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !11
4006 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4007 // CHECK7: omp.body.continue:
4008 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4009 // CHECK7: omp.inner.for.inc:
4010 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
4011 // CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
4012 // CHECK7-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11
4013 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
4014 // CHECK7: omp.inner.for.end:
4015 // CHECK7-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
4016 // CHECK7: omp.dispatch.inc:
4017 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND]]
4018 // CHECK7: omp.dispatch.end:
4019 // CHECK7-NEXT: ret void
4020 //
4021 //
4022 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57
4023 // CHECK7-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
4024 // CHECK7-NEXT: entry:
4025 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
4026 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
4027 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
4028 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
4029 // CHECK7-NEXT: ret void
4030 //
4031 //
4032 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..14
4033 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
4034 // CHECK7-NEXT: entry:
4035 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4036 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4037 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
4038 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4039 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
4040 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4041 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4042 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4043 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4044 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
4045 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4046 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4047 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
4048 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
4049 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4050 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
4051 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4052 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4053 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4054 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4055 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4056 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4057 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
4058 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4059 // CHECK7: cond.true:
4060 // CHECK7-NEXT: br label [[COND_END:%.*]]
4061 // CHECK7: cond.false:
4062 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4063 // CHECK7-NEXT: br label [[COND_END]]
4064 // CHECK7: cond.end:
4065 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4066 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4067 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4068 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4069 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4070 // CHECK7: omp.inner.for.cond:
4071 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4072 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4073 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4074 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4075 // CHECK7: omp.inner.for.body:
4076 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4077 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4078 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
4079 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4080 // CHECK7: omp.inner.for.inc:
4081 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4082 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4083 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
4084 // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4085 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]]
4086 // CHECK7: omp.inner.for.end:
4087 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4088 // CHECK7: omp.loop.exit:
4089 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4090 // CHECK7-NEXT: ret void
4091 //
4092 //
4093 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..15
4094 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] {
4095 // CHECK7-NEXT: entry:
4096 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
4097 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
4098 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
4099 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
4100 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
4101 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4102 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4
4103 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4104 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4105 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4106 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4107 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4
4108 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
4109 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
4110 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
4111 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4112 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
4113 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
4114 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4115 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4
4116 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
4117 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
4118 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
4119 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
4120 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4121 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4122 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4123 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4124 // CHECK7-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
4125 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
4126 // CHECK7-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
4127 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
4128 // CHECK7: omp.dispatch.cond:
4129 // CHECK7-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
4130 // CHECK7-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
4131 // CHECK7-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
4132 // CHECK7: omp.dispatch.body:
4133 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4134 // CHECK7-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
4135 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4136 // CHECK7: omp.inner.for.cond:
4137 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
4138 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14
4139 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
4140 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4141 // CHECK7: omp.inner.for.body:
4142 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
4143 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
4144 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4145 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14
4146 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
4147 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !14
4148 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
4149 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !14
4150 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4151 // CHECK7: omp.body.continue:
4152 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4153 // CHECK7: omp.inner.for.inc:
4154 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
4155 // CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
4156 // CHECK7-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
4157 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
4158 // CHECK7: omp.inner.for.end:
4159 // CHECK7-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
4160 // CHECK7: omp.dispatch.inc:
4161 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND]]
4162 // CHECK7: omp.dispatch.end:
4163 // CHECK7-NEXT: ret void
4164 //
4165 //
4166 // CHECK7-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
4167 // CHECK7-SAME: () #[[ATTR3:[0-9]+]] {
4168 // CHECK7-NEXT: entry:
4169 // CHECK7-NEXT: call void @__tgt_register_requires(i64 1)
4170 // CHECK7-NEXT: ret void
4171 //
4172 //
4173 // CHECK13-LABEL: define {{[^@]+}}@main
4174 // CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
4175 // CHECK13-NEXT: entry:
4176 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
4177 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
4178 // CHECK13-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
4179 // CHECK13-NEXT: [[N:%.*]] = alloca i32, align 4
4180 // CHECK13-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
4181 // CHECK13-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
4182 // CHECK13-NEXT: [[M:%.*]] = alloca i32, align 4
4183 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
4184 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
4185 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
4186 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
4187 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
4188 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
4189 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4190 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4191 // CHECK13-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8
4192 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8
4193 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8
4194 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8
4195 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8
4196 // CHECK13-NEXT: [[_TMP9:%.*]] = alloca i32, align 4
4197 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
4198 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
4199 // CHECK13-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8
4200 // CHECK13-NEXT: [[N_CASTED20:%.*]] = alloca i64, align 8
4201 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS22:%.*]] = alloca [4 x i8*], align 8
4202 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS23:%.*]] = alloca [4 x i8*], align 8
4203 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS24:%.*]] = alloca [4 x i8*], align 8
4204 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES25:%.*]] = alloca [4 x i64], align 8
4205 // CHECK13-NEXT: [[_TMP26:%.*]] = alloca i32, align 4
4206 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4
4207 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_28:%.*]] = alloca i32, align 4
4208 // CHECK13-NEXT: [[N_CASTED36:%.*]] = alloca i64, align 8
4209 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS38:%.*]] = alloca [3 x i8*], align 8
4210 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS39:%.*]] = alloca [3 x i8*], align 8
4211 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS40:%.*]] = alloca [3 x i8*], align 8
4212 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES41:%.*]] = alloca [3 x i64], align 8
4213 // CHECK13-NEXT: [[_TMP42:%.*]] = alloca i32, align 4
4214 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_43:%.*]] = alloca i32, align 4
4215 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_44:%.*]] = alloca i32, align 4
4216 // CHECK13-NEXT: [[M_CASTED52:%.*]] = alloca i64, align 8
4217 // CHECK13-NEXT: [[N_CASTED54:%.*]] = alloca i64, align 8
4218 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS56:%.*]] = alloca [4 x i8*], align 8
4219 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS57:%.*]] = alloca [4 x i8*], align 8
4220 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS58:%.*]] = alloca [4 x i8*], align 8
4221 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES59:%.*]] = alloca [4 x i64], align 8
4222 // CHECK13-NEXT: [[_TMP60:%.*]] = alloca i32, align 4
4223 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_61:%.*]] = alloca i32, align 4
4224 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_62:%.*]] = alloca i32, align 4
4225 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4
4226 // CHECK13-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
4227 // CHECK13-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
4228 // CHECK13-NEXT: store i32 100, i32* [[N]], align 4
4229 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
4230 // CHECK13-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
4231 // CHECK13-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
4232 // CHECK13-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
4233 // CHECK13-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
4234 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
4235 // CHECK13-NEXT: store i32 10, i32* [[M]], align 4
4236 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
4237 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
4238 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4
4239 // CHECK13-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
4240 // CHECK13-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4
4241 // CHECK13-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8*
4242 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP6]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes to i8*), i64 24, i1 false)
4243 // CHECK13-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4244 // CHECK13-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
4245 // CHECK13-NEXT: store i64 [[TMP4]], i64* [[TMP8]], align 8
4246 // CHECK13-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4247 // CHECK13-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
4248 // CHECK13-NEXT: store i64 [[TMP4]], i64* [[TMP10]], align 8
4249 // CHECK13-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
4250 // CHECK13-NEXT: store i8* null, i8** [[TMP11]], align 8
4251 // CHECK13-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
4252 // CHECK13-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
4253 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8
4254 // CHECK13-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
4255 // CHECK13-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
4256 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8
4257 // CHECK13-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
4258 // CHECK13-NEXT: store i8* null, i8** [[TMP16]], align 8
4259 // CHECK13-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
4260 // CHECK13-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32**
4261 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 8
4262 // CHECK13-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
4263 // CHECK13-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32**
4264 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 8
4265 // CHECK13-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
4266 // CHECK13-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 8
4267 // CHECK13-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
4268 // CHECK13-NEXT: store i8* null, i8** [[TMP22]], align 8
4269 // CHECK13-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4270 // CHECK13-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4271 // CHECK13-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
4272 // CHECK13-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4
4273 // CHECK13-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4
4274 // CHECK13-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4275 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0
4276 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4277 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4278 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4279 // CHECK13-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4280 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1
4281 // CHECK13-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64
4282 // CHECK13-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
4283 // CHECK13-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
4284 // CHECK13-NEXT: store i32 1, i32* [[TMP30]], align 4
4285 // CHECK13-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
4286 // CHECK13-NEXT: store i32 3, i32* [[TMP31]], align 4
4287 // CHECK13-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
4288 // CHECK13-NEXT: store i8** [[TMP23]], i8*** [[TMP32]], align 8
4289 // CHECK13-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
4290 // CHECK13-NEXT: store i8** [[TMP24]], i8*** [[TMP33]], align 8
4291 // CHECK13-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
4292 // CHECK13-NEXT: store i64* [[TMP25]], i64** [[TMP34]], align 8
4293 // CHECK13-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
4294 // CHECK13-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP35]], align 8
4295 // CHECK13-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
4296 // CHECK13-NEXT: store i8** null, i8*** [[TMP36]], align 8
4297 // CHECK13-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
4298 // CHECK13-NEXT: store i8** null, i8*** [[TMP37]], align 8
4299 // CHECK13-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
4300 // CHECK13-NEXT: store i64 [[TMP29]], i64* [[TMP38]], align 8
4301 // CHECK13-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
4302 // CHECK13-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0
4303 // CHECK13-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4304 // CHECK13: omp_offload.failed:
4305 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
4306 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]]
4307 // CHECK13: omp_offload.cont:
4308 // CHECK13-NEXT: [[TMP41:%.*]] = load i32, i32* [[N]], align 4
4309 // CHECK13-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32*
4310 // CHECK13-NEXT: store i32 [[TMP41]], i32* [[CONV4]], align 4
4311 // CHECK13-NEXT: [[TMP42:%.*]] = load i64, i64* [[N_CASTED3]], align 8
4312 // CHECK13-NEXT: [[TMP43:%.*]] = mul nuw i64 [[TMP1]], 4
4313 // CHECK13-NEXT: [[TMP44:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES8]] to i8*
4314 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP44]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.4 to i8*), i64 24, i1 false)
4315 // CHECK13-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
4316 // CHECK13-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64*
4317 // CHECK13-NEXT: store i64 [[TMP42]], i64* [[TMP46]], align 8
4318 // CHECK13-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
4319 // CHECK13-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64*
4320 // CHECK13-NEXT: store i64 [[TMP42]], i64* [[TMP48]], align 8
4321 // CHECK13-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0
4322 // CHECK13-NEXT: store i8* null, i8** [[TMP49]], align 8
4323 // CHECK13-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1
4324 // CHECK13-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i64*
4325 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP51]], align 8
4326 // CHECK13-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1
4327 // CHECK13-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to i64*
4328 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP53]], align 8
4329 // CHECK13-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1
4330 // CHECK13-NEXT: store i8* null, i8** [[TMP54]], align 8
4331 // CHECK13-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2
4332 // CHECK13-NEXT: [[TMP56:%.*]] = bitcast i8** [[TMP55]] to i32**
4333 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP56]], align 8
4334 // CHECK13-NEXT: [[TMP57:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2
4335 // CHECK13-NEXT: [[TMP58:%.*]] = bitcast i8** [[TMP57]] to i32**
4336 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP58]], align 8
4337 // CHECK13-NEXT: [[TMP59:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2
4338 // CHECK13-NEXT: store i64 [[TMP43]], i64* [[TMP59]], align 8
4339 // CHECK13-NEXT: [[TMP60:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2
4340 // CHECK13-NEXT: store i8* null, i8** [[TMP60]], align 8
4341 // CHECK13-NEXT: [[TMP61:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
4342 // CHECK13-NEXT: [[TMP62:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
4343 // CHECK13-NEXT: [[TMP63:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
4344 // CHECK13-NEXT: [[TMP64:%.*]] = load i32, i32* [[N]], align 4
4345 // CHECK13-NEXT: store i32 [[TMP64]], i32* [[DOTCAPTURE_EXPR_10]], align 4
4346 // CHECK13-NEXT: [[TMP65:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
4347 // CHECK13-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP65]], 0
4348 // CHECK13-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
4349 // CHECK13-NEXT: [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1
4350 // CHECK13-NEXT: store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4
4351 // CHECK13-NEXT: [[TMP66:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
4352 // CHECK13-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP66]], 1
4353 // CHECK13-NEXT: [[TMP67:%.*]] = zext i32 [[ADD15]] to i64
4354 // CHECK13-NEXT: [[KERNEL_ARGS16:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
4355 // CHECK13-NEXT: [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 0
4356 // CHECK13-NEXT: store i32 1, i32* [[TMP68]], align 4
4357 // CHECK13-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 1
4358 // CHECK13-NEXT: store i32 3, i32* [[TMP69]], align 4
4359 // CHECK13-NEXT: [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 2
4360 // CHECK13-NEXT: store i8** [[TMP61]], i8*** [[TMP70]], align 8
4361 // CHECK13-NEXT: [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 3
4362 // CHECK13-NEXT: store i8** [[TMP62]], i8*** [[TMP71]], align 8
4363 // CHECK13-NEXT: [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 4
4364 // CHECK13-NEXT: store i64* [[TMP63]], i64** [[TMP72]], align 8
4365 // CHECK13-NEXT: [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 5
4366 // CHECK13-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP73]], align 8
4367 // CHECK13-NEXT: [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 6
4368 // CHECK13-NEXT: store i8** null, i8*** [[TMP74]], align 8
4369 // CHECK13-NEXT: [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 7
4370 // CHECK13-NEXT: store i8** null, i8*** [[TMP75]], align 8
4371 // CHECK13-NEXT: [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 8
4372 // CHECK13-NEXT: store i64 [[TMP67]], i64* [[TMP76]], align 8
4373 // CHECK13-NEXT: [[TMP77:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]])
4374 // CHECK13-NEXT: [[TMP78:%.*]] = icmp ne i32 [[TMP77]], 0
4375 // CHECK13-NEXT: br i1 [[TMP78]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
4376 // CHECK13: omp_offload.failed17:
4377 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i64 [[TMP42]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
4378 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT18]]
4379 // CHECK13: omp_offload.cont18:
4380 // CHECK13-NEXT: [[TMP79:%.*]] = load i32, i32* [[M]], align 4
4381 // CHECK13-NEXT: [[CONV19:%.*]] = bitcast i64* [[M_CASTED]] to i32*
4382 // CHECK13-NEXT: store i32 [[TMP79]], i32* [[CONV19]], align 4
4383 // CHECK13-NEXT: [[TMP80:%.*]] = load i64, i64* [[M_CASTED]], align 8
4384 // CHECK13-NEXT: [[TMP81:%.*]] = load i32, i32* [[N]], align 4
4385 // CHECK13-NEXT: [[CONV21:%.*]] = bitcast i64* [[N_CASTED20]] to i32*
4386 // CHECK13-NEXT: store i32 [[TMP81]], i32* [[CONV21]], align 4
4387 // CHECK13-NEXT: [[TMP82:%.*]] = load i64, i64* [[N_CASTED20]], align 8
4388 // CHECK13-NEXT: [[TMP83:%.*]] = mul nuw i64 [[TMP1]], 4
4389 // CHECK13-NEXT: [[TMP84:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES25]] to i8*
4390 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP84]], i8* align 8 bitcast ([4 x i64]* @.offload_sizes.8 to i8*), i64 32, i1 false)
4391 // CHECK13-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0
4392 // CHECK13-NEXT: [[TMP86:%.*]] = bitcast i8** [[TMP85]] to i64*
4393 // CHECK13-NEXT: store i64 [[TMP80]], i64* [[TMP86]], align 8
4394 // CHECK13-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0
4395 // CHECK13-NEXT: [[TMP88:%.*]] = bitcast i8** [[TMP87]] to i64*
4396 // CHECK13-NEXT: store i64 [[TMP80]], i64* [[TMP88]], align 8
4397 // CHECK13-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 0
4398 // CHECK13-NEXT: store i8* null, i8** [[TMP89]], align 8
4399 // CHECK13-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 1
4400 // CHECK13-NEXT: [[TMP91:%.*]] = bitcast i8** [[TMP90]] to i64*
4401 // CHECK13-NEXT: store i64 [[TMP82]], i64* [[TMP91]], align 8
4402 // CHECK13-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 1
4403 // CHECK13-NEXT: [[TMP93:%.*]] = bitcast i8** [[TMP92]] to i64*
4404 // CHECK13-NEXT: store i64 [[TMP82]], i64* [[TMP93]], align 8
4405 // CHECK13-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 1
4406 // CHECK13-NEXT: store i8* null, i8** [[TMP94]], align 8
4407 // CHECK13-NEXT: [[TMP95:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 2
4408 // CHECK13-NEXT: [[TMP96:%.*]] = bitcast i8** [[TMP95]] to i64*
4409 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP96]], align 8
4410 // CHECK13-NEXT: [[TMP97:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 2
4411 // CHECK13-NEXT: [[TMP98:%.*]] = bitcast i8** [[TMP97]] to i64*
4412 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP98]], align 8
4413 // CHECK13-NEXT: [[TMP99:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 2
4414 // CHECK13-NEXT: store i8* null, i8** [[TMP99]], align 8
4415 // CHECK13-NEXT: [[TMP100:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 3
4416 // CHECK13-NEXT: [[TMP101:%.*]] = bitcast i8** [[TMP100]] to i32**
4417 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP101]], align 8
4418 // CHECK13-NEXT: [[TMP102:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 3
4419 // CHECK13-NEXT: [[TMP103:%.*]] = bitcast i8** [[TMP102]] to i32**
4420 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP103]], align 8
4421 // CHECK13-NEXT: [[TMP104:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 3
4422 // CHECK13-NEXT: store i64 [[TMP83]], i64* [[TMP104]], align 8
4423 // CHECK13-NEXT: [[TMP105:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 3
4424 // CHECK13-NEXT: store i8* null, i8** [[TMP105]], align 8
4425 // CHECK13-NEXT: [[TMP106:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0
4426 // CHECK13-NEXT: [[TMP107:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0
4427 // CHECK13-NEXT: [[TMP108:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 0
4428 // CHECK13-NEXT: [[TMP109:%.*]] = load i32, i32* [[N]], align 4
4429 // CHECK13-NEXT: store i32 [[TMP109]], i32* [[DOTCAPTURE_EXPR_27]], align 4
4430 // CHECK13-NEXT: [[TMP110:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4
4431 // CHECK13-NEXT: [[SUB29:%.*]] = sub nsw i32 [[TMP110]], 0
4432 // CHECK13-NEXT: [[DIV30:%.*]] = sdiv i32 [[SUB29]], 1
4433 // CHECK13-NEXT: [[SUB31:%.*]] = sub nsw i32 [[DIV30]], 1
4434 // CHECK13-NEXT: store i32 [[SUB31]], i32* [[DOTCAPTURE_EXPR_28]], align 4
4435 // CHECK13-NEXT: [[TMP111:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_28]], align 4
4436 // CHECK13-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP111]], 1
4437 // CHECK13-NEXT: [[TMP112:%.*]] = zext i32 [[ADD32]] to i64
4438 // CHECK13-NEXT: [[KERNEL_ARGS33:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
4439 // CHECK13-NEXT: [[TMP113:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS33]], i32 0, i32 0
4440 // CHECK13-NEXT: store i32 1, i32* [[TMP113]], align 4
4441 // CHECK13-NEXT: [[TMP114:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS33]], i32 0, i32 1
4442 // CHECK13-NEXT: store i32 4, i32* [[TMP114]], align 4
4443 // CHECK13-NEXT: [[TMP115:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS33]], i32 0, i32 2
4444 // CHECK13-NEXT: store i8** [[TMP106]], i8*** [[TMP115]], align 8
4445 // CHECK13-NEXT: [[TMP116:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS33]], i32 0, i32 3
4446 // CHECK13-NEXT: store i8** [[TMP107]], i8*** [[TMP116]], align 8
4447 // CHECK13-NEXT: [[TMP117:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS33]], i32 0, i32 4
4448 // CHECK13-NEXT: store i64* [[TMP108]], i64** [[TMP117]], align 8
4449 // CHECK13-NEXT: [[TMP118:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS33]], i32 0, i32 5
4450 // CHECK13-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.9, i32 0, i32 0), i64** [[TMP118]], align 8
4451 // CHECK13-NEXT: [[TMP119:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS33]], i32 0, i32 6
4452 // CHECK13-NEXT: store i8** null, i8*** [[TMP119]], align 8
4453 // CHECK13-NEXT: [[TMP120:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS33]], i32 0, i32 7
4454 // CHECK13-NEXT: store i8** null, i8*** [[TMP120]], align 8
4455 // CHECK13-NEXT: [[TMP121:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS33]], i32 0, i32 8
4456 // CHECK13-NEXT: store i64 [[TMP112]], i64* [[TMP121]], align 8
4457 // CHECK13-NEXT: [[TMP122:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS33]])
4458 // CHECK13-NEXT: [[TMP123:%.*]] = icmp ne i32 [[TMP122]], 0
4459 // CHECK13-NEXT: br i1 [[TMP123]], label [[OMP_OFFLOAD_FAILED34:%.*]], label [[OMP_OFFLOAD_CONT35:%.*]]
4460 // CHECK13: omp_offload.failed34:
4461 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i64 [[TMP80]], i64 [[TMP82]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
4462 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT35]]
4463 // CHECK13: omp_offload.cont35:
4464 // CHECK13-NEXT: [[TMP124:%.*]] = load i32, i32* [[N]], align 4
4465 // CHECK13-NEXT: [[CONV37:%.*]] = bitcast i64* [[N_CASTED36]] to i32*
4466 // CHECK13-NEXT: store i32 [[TMP124]], i32* [[CONV37]], align 4
4467 // CHECK13-NEXT: [[TMP125:%.*]] = load i64, i64* [[N_CASTED36]], align 8
4468 // CHECK13-NEXT: [[TMP126:%.*]] = mul nuw i64 [[TMP1]], 4
4469 // CHECK13-NEXT: [[TMP127:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES41]] to i8*
4470 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP127]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.12 to i8*), i64 24, i1 false)
4471 // CHECK13-NEXT: [[TMP128:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS38]], i32 0, i32 0
4472 // CHECK13-NEXT: [[TMP129:%.*]] = bitcast i8** [[TMP128]] to i64*
4473 // CHECK13-NEXT: store i64 [[TMP125]], i64* [[TMP129]], align 8
4474 // CHECK13-NEXT: [[TMP130:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS39]], i32 0, i32 0
4475 // CHECK13-NEXT: [[TMP131:%.*]] = bitcast i8** [[TMP130]] to i64*
4476 // CHECK13-NEXT: store i64 [[TMP125]], i64* [[TMP131]], align 8
4477 // CHECK13-NEXT: [[TMP132:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS40]], i64 0, i64 0
4478 // CHECK13-NEXT: store i8* null, i8** [[TMP132]], align 8
4479 // CHECK13-NEXT: [[TMP133:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS38]], i32 0, i32 1
4480 // CHECK13-NEXT: [[TMP134:%.*]] = bitcast i8** [[TMP133]] to i64*
4481 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP134]], align 8
4482 // CHECK13-NEXT: [[TMP135:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS39]], i32 0, i32 1
4483 // CHECK13-NEXT: [[TMP136:%.*]] = bitcast i8** [[TMP135]] to i64*
4484 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP136]], align 8
4485 // CHECK13-NEXT: [[TMP137:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS40]], i64 0, i64 1
4486 // CHECK13-NEXT: store i8* null, i8** [[TMP137]], align 8
4487 // CHECK13-NEXT: [[TMP138:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS38]], i32 0, i32 2
4488 // CHECK13-NEXT: [[TMP139:%.*]] = bitcast i8** [[TMP138]] to i32**
4489 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP139]], align 8
4490 // CHECK13-NEXT: [[TMP140:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS39]], i32 0, i32 2
4491 // CHECK13-NEXT: [[TMP141:%.*]] = bitcast i8** [[TMP140]] to i32**
4492 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP141]], align 8
4493 // CHECK13-NEXT: [[TMP142:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES41]], i32 0, i32 2
4494 // CHECK13-NEXT: store i64 [[TMP126]], i64* [[TMP142]], align 8
4495 // CHECK13-NEXT: [[TMP143:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS40]], i64 0, i64 2
4496 // CHECK13-NEXT: store i8* null, i8** [[TMP143]], align 8
4497 // CHECK13-NEXT: [[TMP144:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS38]], i32 0, i32 0
4498 // CHECK13-NEXT: [[TMP145:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS39]], i32 0, i32 0
4499 // CHECK13-NEXT: [[TMP146:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES41]], i32 0, i32 0
4500 // CHECK13-NEXT: [[TMP147:%.*]] = load i32, i32* [[N]], align 4
4501 // CHECK13-NEXT: store i32 [[TMP147]], i32* [[DOTCAPTURE_EXPR_43]], align 4
4502 // CHECK13-NEXT: [[TMP148:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_43]], align 4
4503 // CHECK13-NEXT: [[SUB45:%.*]] = sub nsw i32 [[TMP148]], 0
4504 // CHECK13-NEXT: [[DIV46:%.*]] = sdiv i32 [[SUB45]], 1
4505 // CHECK13-NEXT: [[SUB47:%.*]] = sub nsw i32 [[DIV46]], 1
4506 // CHECK13-NEXT: store i32 [[SUB47]], i32* [[DOTCAPTURE_EXPR_44]], align 4
4507 // CHECK13-NEXT: [[TMP149:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_44]], align 4
4508 // CHECK13-NEXT: [[ADD48:%.*]] = add nsw i32 [[TMP149]], 1
4509 // CHECK13-NEXT: [[TMP150:%.*]] = zext i32 [[ADD48]] to i64
4510 // CHECK13-NEXT: [[KERNEL_ARGS49:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
4511 // CHECK13-NEXT: [[TMP151:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS49]], i32 0, i32 0
4512 // CHECK13-NEXT: store i32 1, i32* [[TMP151]], align 4
4513 // CHECK13-NEXT: [[TMP152:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS49]], i32 0, i32 1
4514 // CHECK13-NEXT: store i32 3, i32* [[TMP152]], align 4
4515 // CHECK13-NEXT: [[TMP153:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS49]], i32 0, i32 2
4516 // CHECK13-NEXT: store i8** [[TMP144]], i8*** [[TMP153]], align 8
4517 // CHECK13-NEXT: [[TMP154:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS49]], i32 0, i32 3
4518 // CHECK13-NEXT: store i8** [[TMP145]], i8*** [[TMP154]], align 8
4519 // CHECK13-NEXT: [[TMP155:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS49]], i32 0, i32 4
4520 // CHECK13-NEXT: store i64* [[TMP146]], i64** [[TMP155]], align 8
4521 // CHECK13-NEXT: [[TMP156:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS49]], i32 0, i32 5
4522 // CHECK13-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.13, i32 0, i32 0), i64** [[TMP156]], align 8
4523 // CHECK13-NEXT: [[TMP157:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS49]], i32 0, i32 6
4524 // CHECK13-NEXT: store i8** null, i8*** [[TMP157]], align 8
4525 // CHECK13-NEXT: [[TMP158:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS49]], i32 0, i32 7
4526 // CHECK13-NEXT: store i8** null, i8*** [[TMP158]], align 8
4527 // CHECK13-NEXT: [[TMP159:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS49]], i32 0, i32 8
4528 // CHECK13-NEXT: store i64 [[TMP150]], i64* [[TMP159]], align 8
4529 // CHECK13-NEXT: [[TMP160:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS49]])
4530 // CHECK13-NEXT: [[TMP161:%.*]] = icmp ne i32 [[TMP160]], 0
4531 // CHECK13-NEXT: br i1 [[TMP161]], label [[OMP_OFFLOAD_FAILED50:%.*]], label [[OMP_OFFLOAD_CONT51:%.*]]
4532 // CHECK13: omp_offload.failed50:
4533 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i64 [[TMP125]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
4534 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT51]]
4535 // CHECK13: omp_offload.cont51:
4536 // CHECK13-NEXT: [[TMP162:%.*]] = load i32, i32* [[M]], align 4
4537 // CHECK13-NEXT: [[CONV53:%.*]] = bitcast i64* [[M_CASTED52]] to i32*
4538 // CHECK13-NEXT: store i32 [[TMP162]], i32* [[CONV53]], align 4
4539 // CHECK13-NEXT: [[TMP163:%.*]] = load i64, i64* [[M_CASTED52]], align 8
4540 // CHECK13-NEXT: [[TMP164:%.*]] = load i32, i32* [[N]], align 4
4541 // CHECK13-NEXT: [[CONV55:%.*]] = bitcast i64* [[N_CASTED54]] to i32*
4542 // CHECK13-NEXT: store i32 [[TMP164]], i32* [[CONV55]], align 4
4543 // CHECK13-NEXT: [[TMP165:%.*]] = load i64, i64* [[N_CASTED54]], align 8
4544 // CHECK13-NEXT: [[TMP166:%.*]] = mul nuw i64 [[TMP1]], 4
4545 // CHECK13-NEXT: [[TMP167:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES59]] to i8*
4546 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP167]], i8* align 8 bitcast ([4 x i64]* @.offload_sizes.16 to i8*), i64 32, i1 false)
4547 // CHECK13-NEXT: [[TMP168:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS56]], i32 0, i32 0
4548 // CHECK13-NEXT: [[TMP169:%.*]] = bitcast i8** [[TMP168]] to i64*
4549 // CHECK13-NEXT: store i64 [[TMP163]], i64* [[TMP169]], align 8
4550 // CHECK13-NEXT: [[TMP170:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS57]], i32 0, i32 0
4551 // CHECK13-NEXT: [[TMP171:%.*]] = bitcast i8** [[TMP170]] to i64*
4552 // CHECK13-NEXT: store i64 [[TMP163]], i64* [[TMP171]], align 8
4553 // CHECK13-NEXT: [[TMP172:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS58]], i64 0, i64 0
4554 // CHECK13-NEXT: store i8* null, i8** [[TMP172]], align 8
4555 // CHECK13-NEXT: [[TMP173:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS56]], i32 0, i32 1
4556 // CHECK13-NEXT: [[TMP174:%.*]] = bitcast i8** [[TMP173]] to i64*
4557 // CHECK13-NEXT: store i64 [[TMP165]], i64* [[TMP174]], align 8
4558 // CHECK13-NEXT: [[TMP175:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS57]], i32 0, i32 1
4559 // CHECK13-NEXT: [[TMP176:%.*]] = bitcast i8** [[TMP175]] to i64*
4560 // CHECK13-NEXT: store i64 [[TMP165]], i64* [[TMP176]], align 8
4561 // CHECK13-NEXT: [[TMP177:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS58]], i64 0, i64 1
4562 // CHECK13-NEXT: store i8* null, i8** [[TMP177]], align 8
4563 // CHECK13-NEXT: [[TMP178:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS56]], i32 0, i32 2
4564 // CHECK13-NEXT: [[TMP179:%.*]] = bitcast i8** [[TMP178]] to i64*
4565 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP179]], align 8
4566 // CHECK13-NEXT: [[TMP180:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS57]], i32 0, i32 2
4567 // CHECK13-NEXT: [[TMP181:%.*]] = bitcast i8** [[TMP180]] to i64*
4568 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP181]], align 8
4569 // CHECK13-NEXT: [[TMP182:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS58]], i64 0, i64 2
4570 // CHECK13-NEXT: store i8* null, i8** [[TMP182]], align 8
4571 // CHECK13-NEXT: [[TMP183:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS56]], i32 0, i32 3
4572 // CHECK13-NEXT: [[TMP184:%.*]] = bitcast i8** [[TMP183]] to i32**
4573 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP184]], align 8
4574 // CHECK13-NEXT: [[TMP185:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS57]], i32 0, i32 3
4575 // CHECK13-NEXT: [[TMP186:%.*]] = bitcast i8** [[TMP185]] to i32**
4576 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP186]], align 8
4577 // CHECK13-NEXT: [[TMP187:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES59]], i32 0, i32 3
4578 // CHECK13-NEXT: store i64 [[TMP166]], i64* [[TMP187]], align 8
4579 // CHECK13-NEXT: [[TMP188:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS58]], i64 0, i64 3
4580 // CHECK13-NEXT: store i8* null, i8** [[TMP188]], align 8
4581 // CHECK13-NEXT: [[TMP189:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS56]], i32 0, i32 0
4582 // CHECK13-NEXT: [[TMP190:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS57]], i32 0, i32 0
4583 // CHECK13-NEXT: [[TMP191:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES59]], i32 0, i32 0
4584 // CHECK13-NEXT: [[TMP192:%.*]] = load i32, i32* [[N]], align 4
4585 // CHECK13-NEXT: store i32 [[TMP192]], i32* [[DOTCAPTURE_EXPR_61]], align 4
4586 // CHECK13-NEXT: [[TMP193:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_61]], align 4
4587 // CHECK13-NEXT: [[SUB63:%.*]] = sub nsw i32 [[TMP193]], 0
4588 // CHECK13-NEXT: [[DIV64:%.*]] = sdiv i32 [[SUB63]], 1
4589 // CHECK13-NEXT: [[SUB65:%.*]] = sub nsw i32 [[DIV64]], 1
4590 // CHECK13-NEXT: store i32 [[SUB65]], i32* [[DOTCAPTURE_EXPR_62]], align 4
4591 // CHECK13-NEXT: [[TMP194:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_62]], align 4
4592 // CHECK13-NEXT: [[ADD66:%.*]] = add nsw i32 [[TMP194]], 1
4593 // CHECK13-NEXT: [[TMP195:%.*]] = zext i32 [[ADD66]] to i64
4594 // CHECK13-NEXT: [[KERNEL_ARGS67:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
4595 // CHECK13-NEXT: [[TMP196:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS67]], i32 0, i32 0
4596 // CHECK13-NEXT: store i32 1, i32* [[TMP196]], align 4
4597 // CHECK13-NEXT: [[TMP197:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS67]], i32 0, i32 1
4598 // CHECK13-NEXT: store i32 4, i32* [[TMP197]], align 4
4599 // CHECK13-NEXT: [[TMP198:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS67]], i32 0, i32 2
4600 // CHECK13-NEXT: store i8** [[TMP189]], i8*** [[TMP198]], align 8
4601 // CHECK13-NEXT: [[TMP199:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS67]], i32 0, i32 3
4602 // CHECK13-NEXT: store i8** [[TMP190]], i8*** [[TMP199]], align 8
4603 // CHECK13-NEXT: [[TMP200:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS67]], i32 0, i32 4
4604 // CHECK13-NEXT: store i64* [[TMP191]], i64** [[TMP200]], align 8
4605 // CHECK13-NEXT: [[TMP201:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS67]], i32 0, i32 5
4606 // CHECK13-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.17, i32 0, i32 0), i64** [[TMP201]], align 8
4607 // CHECK13-NEXT: [[TMP202:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS67]], i32 0, i32 6
4608 // CHECK13-NEXT: store i8** null, i8*** [[TMP202]], align 8
4609 // CHECK13-NEXT: [[TMP203:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS67]], i32 0, i32 7
4610 // CHECK13-NEXT: store i8** null, i8*** [[TMP203]], align 8
4611 // CHECK13-NEXT: [[TMP204:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS67]], i32 0, i32 8
4612 // CHECK13-NEXT: store i64 [[TMP195]], i64* [[TMP204]], align 8
4613 // CHECK13-NEXT: [[TMP205:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS67]])
4614 // CHECK13-NEXT: [[TMP206:%.*]] = icmp ne i32 [[TMP205]], 0
4615 // CHECK13-NEXT: br i1 [[TMP206]], label [[OMP_OFFLOAD_FAILED68:%.*]], label [[OMP_OFFLOAD_CONT69:%.*]]
4616 // CHECK13: omp_offload.failed68:
4617 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i64 [[TMP163]], i64 [[TMP165]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
4618 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT69]]
4619 // CHECK13: omp_offload.cont69:
4620 // CHECK13-NEXT: [[TMP207:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
4621 // CHECK13-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP207]])
4622 // CHECK13-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
4623 // CHECK13-NEXT: [[TMP208:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
4624 // CHECK13-NEXT: call void @llvm.stackrestore(i8* [[TMP208]])
4625 // CHECK13-NEXT: [[TMP209:%.*]] = load i32, i32* [[RETVAL]], align 4
4626 // CHECK13-NEXT: ret i32 [[TMP209]]
4627 //
4628 //
4629 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148
4630 // CHECK13-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
4631 // CHECK13-NEXT: entry:
4632 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
4633 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
4634 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
4635 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
4636 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
4637 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
4638 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
4639 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
4640 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
4641 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
4642 // CHECK13-NEXT: ret void
4643 //
4644 //
4645 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined.
4646 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
4647 // CHECK13-NEXT: entry:
4648 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4649 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4650 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
4651 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
4652 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
4653 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4654 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
4655 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4656 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4657 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
4658 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4659 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4660 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4661 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4662 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4
4663 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4664 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4665 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
4666 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
4667 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
4668 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
4669 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
4670 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
4671 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
4672 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
4673 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4674 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
4675 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4676 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4677 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4678 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
4679 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4680 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
4681 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
4682 // CHECK13: omp.precond.then:
4683 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4684 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4685 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
4686 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4687 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4688 // CHECK13-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4689 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
4690 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4691 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4692 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4693 // CHECK13-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
4694 // CHECK13-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4695 // CHECK13: cond.true:
4696 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4697 // CHECK13-NEXT: br label [[COND_END:%.*]]
4698 // CHECK13: cond.false:
4699 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4700 // CHECK13-NEXT: br label [[COND_END]]
4701 // CHECK13: cond.end:
4702 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
4703 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4704 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4705 // CHECK13-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
4706 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4707 // CHECK13: omp.inner.for.cond:
4708 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4709 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4710 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
4711 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4712 // CHECK13: omp.inner.for.body:
4713 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4714 // CHECK13-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
4715 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4716 // CHECK13-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
4717 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])
4718 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4719 // CHECK13: omp.inner.for.inc:
4720 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4721 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4722 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
4723 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4724 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
4725 // CHECK13: omp.inner.for.end:
4726 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4727 // CHECK13: omp.loop.exit:
4728 // CHECK13-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4729 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
4730 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
4731 // CHECK13-NEXT: br label [[OMP_PRECOND_END]]
4732 // CHECK13: omp.precond.end:
4733 // CHECK13-NEXT: ret void
4734 //
4735 //
4736 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..1
4737 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
4738 // CHECK13-NEXT: entry:
4739 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4740 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4741 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4742 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4743 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
4744 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
4745 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
4746 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4747 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
4748 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4749 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4750 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
4751 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4752 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4753 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4754 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4755 // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4
4756 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4757 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4758 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4759 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4760 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
4761 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
4762 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
4763 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
4764 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
4765 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
4766 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
4767 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
4768 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4769 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
4770 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4771 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4772 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4773 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
4774 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4775 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
4776 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
4777 // CHECK13: omp.precond.then:
4778 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4779 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4780 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
4781 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4782 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
4783 // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4784 // CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
4785 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4786 // CHECK13-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
4787 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4788 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4789 // CHECK13-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4790 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
4791 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4792 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4793 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4794 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
4795 // CHECK13-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4796 // CHECK13: cond.true:
4797 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4798 // CHECK13-NEXT: br label [[COND_END:%.*]]
4799 // CHECK13: cond.false:
4800 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4801 // CHECK13-NEXT: br label [[COND_END]]
4802 // CHECK13: cond.end:
4803 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
4804 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4805 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4806 // CHECK13-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
4807 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4808 // CHECK13: omp.inner.for.cond:
4809 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4810 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4811 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
4812 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4813 // CHECK13: omp.inner.for.body:
4814 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4815 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
4816 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4817 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I4]], align 4
4818 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4
4819 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
4820 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
4821 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
4822 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
4823 // CHECK13: omp.body.continue:
4824 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4825 // CHECK13: omp.inner.for.inc:
4826 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4827 // CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
4828 // CHECK13-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
4829 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
4830 // CHECK13: omp.inner.for.end:
4831 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4832 // CHECK13: omp.loop.exit:
4833 // CHECK13-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4834 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
4835 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
4836 // CHECK13-NEXT: br label [[OMP_PRECOND_END]]
4837 // CHECK13: omp.precond.end:
4838 // CHECK13-NEXT: ret void
4839 //
4840 //
4841 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153
4842 // CHECK13-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
4843 // CHECK13-NEXT: entry:
4844 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
4845 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
4846 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
4847 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
4848 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
4849 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
4850 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
4851 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
4852 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
4853 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
4854 // CHECK13-NEXT: ret void
4855 //
4856 //
4857 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..2
4858 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
4859 // CHECK13-NEXT: entry:
4860 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4861 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4862 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
4863 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
4864 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
4865 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4866 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
4867 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4868 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4869 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
4870 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4871 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4872 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4873 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4874 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4
4875 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4876 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4877 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
4878 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
4879 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
4880 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
4881 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
4882 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
4883 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
4884 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
4885 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4886 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
4887 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4888 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4889 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4890 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
4891 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4892 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
4893 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
4894 // CHECK13: omp.precond.then:
4895 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4896 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4897 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
4898 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4899 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4900 // CHECK13-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4901 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
4902 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4903 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4904 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4905 // CHECK13-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
4906 // CHECK13-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4907 // CHECK13: cond.true:
4908 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4909 // CHECK13-NEXT: br label [[COND_END:%.*]]
4910 // CHECK13: cond.false:
4911 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4912 // CHECK13-NEXT: br label [[COND_END]]
4913 // CHECK13: cond.end:
4914 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
4915 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4916 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4917 // CHECK13-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
4918 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
4919 // CHECK13: omp.inner.for.cond:
4920 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4921 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4922 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
4923 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4924 // CHECK13: omp.inner.for.body:
4925 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4926 // CHECK13-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
4927 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4928 // CHECK13-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
4929 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])
4930 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
4931 // CHECK13: omp.inner.for.inc:
4932 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4933 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4934 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
4935 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4936 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
4937 // CHECK13: omp.inner.for.end:
4938 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
4939 // CHECK13: omp.loop.exit:
4940 // CHECK13-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4941 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
4942 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
4943 // CHECK13-NEXT: br label [[OMP_PRECOND_END]]
4944 // CHECK13: omp.precond.end:
4945 // CHECK13-NEXT: ret void
4946 //
4947 //
4948 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..3
4949 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
4950 // CHECK13-NEXT: entry:
4951 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4952 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4953 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4954 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4955 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
4956 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
4957 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
4958 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
4959 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
4960 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4961 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4962 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
4963 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
4964 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
4965 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4966 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4967 // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4
4968 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4969 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4970 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4971 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4972 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
4973 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
4974 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
4975 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
4976 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
4977 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
4978 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
4979 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
4980 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4981 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
4982 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4983 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4984 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
4985 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
4986 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
4987 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
4988 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
4989 // CHECK13: omp.precond.then:
4990 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
4991 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
4992 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
4993 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4994 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
4995 // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4996 // CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
4997 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4998 // CHECK13-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
4999 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5000 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5001 // CHECK13-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5002 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
5003 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5004 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5005 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5006 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
5007 // CHECK13-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5008 // CHECK13: cond.true:
5009 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5010 // CHECK13-NEXT: br label [[COND_END:%.*]]
5011 // CHECK13: cond.false:
5012 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5013 // CHECK13-NEXT: br label [[COND_END]]
5014 // CHECK13: cond.end:
5015 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
5016 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5017 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5018 // CHECK13-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
5019 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5020 // CHECK13: omp.inner.for.cond:
5021 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5022 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5023 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
5024 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5025 // CHECK13: omp.inner.for.body:
5026 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5027 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
5028 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5029 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I4]], align 4
5030 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4
5031 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
5032 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
5033 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
5034 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5035 // CHECK13: omp.body.continue:
5036 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5037 // CHECK13: omp.inner.for.inc:
5038 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5039 // CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
5040 // CHECK13-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
5041 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
5042 // CHECK13: omp.inner.for.end:
5043 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5044 // CHECK13: omp.loop.exit:
5045 // CHECK13-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5046 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
5047 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
5048 // CHECK13-NEXT: br label [[OMP_PRECOND_END]]
5049 // CHECK13: omp.precond.end:
5050 // CHECK13-NEXT: ret void
5051 //
5052 //
5053 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158
5054 // CHECK13-SAME: (i64 noundef [[M:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
5055 // CHECK13-NEXT: entry:
5056 // CHECK13-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
5057 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
5058 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
5059 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
5060 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5061 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
5062 // CHECK13-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8
5063 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
5064 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
5065 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
5066 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
5067 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
5068 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
5069 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
5070 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
5071 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
5072 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5073 // CHECK13-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
5074 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4
5075 // CHECK13-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
5076 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]])
5077 // CHECK13-NEXT: ret void
5078 //
5079 //
5080 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..6
5081 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
5082 // CHECK13-NEXT: entry:
5083 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5084 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5085 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
5086 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
5087 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
5088 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
5089 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5090 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
5091 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5092 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
5093 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
5094 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5095 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5096 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5097 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5098 // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4
5099 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
5100 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5101 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5102 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
5103 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
5104 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
5105 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
5106 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
5107 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
5108 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
5109 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
5110 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
5111 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
5112 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5113 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
5114 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5115 // CHECK13-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
5116 // CHECK13-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
5117 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
5118 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5119 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
5120 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5121 // CHECK13: omp.precond.then:
5122 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5123 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5124 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
5125 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5126 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5127 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[CONV]], align 4
5128 // CHECK13-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5129 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
5130 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])
5131 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5132 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5133 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
5134 // CHECK13-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5135 // CHECK13: cond.true:
5136 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5137 // CHECK13-NEXT: br label [[COND_END:%.*]]
5138 // CHECK13: cond.false:
5139 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5140 // CHECK13-NEXT: br label [[COND_END]]
5141 // CHECK13: cond.end:
5142 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
5143 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5144 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5145 // CHECK13-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
5146 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5147 // CHECK13: omp.inner.for.cond:
5148 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5149 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5150 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1
5151 // CHECK13-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]]
5152 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5153 // CHECK13: omp.inner.for.body:
5154 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5155 // CHECK13-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
5156 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5157 // CHECK13-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64
5158 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV]], align 4
5159 // CHECK13-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
5160 // CHECK13-NEXT: store i32 [[TMP21]], i32* [[CONV7]], align 4
5161 // CHECK13-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
5162 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP22]])
5163 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5164 // CHECK13: omp.inner.for.inc:
5165 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5166 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5167 // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
5168 // CHECK13-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
5169 // CHECK13-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5170 // CHECK13-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5171 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]
5172 // CHECK13-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4
5173 // CHECK13-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5174 // CHECK13-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5175 // CHECK13-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP27]], [[TMP28]]
5176 // CHECK13-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4
5177 // CHECK13-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5178 // CHECK13-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5179 // CHECK13-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]]
5180 // CHECK13-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]]
5181 // CHECK13: cond.true12:
5182 // CHECK13-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5183 // CHECK13-NEXT: br label [[COND_END14:%.*]]
5184 // CHECK13: cond.false13:
5185 // CHECK13-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5186 // CHECK13-NEXT: br label [[COND_END14]]
5187 // CHECK13: cond.end14:
5188 // CHECK13-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE12]] ], [ [[TMP32]], [[COND_FALSE13]] ]
5189 // CHECK13-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4
5190 // CHECK13-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5191 // CHECK13-NEXT: store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4
5192 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
5193 // CHECK13: omp.inner.for.end:
5194 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5195 // CHECK13: omp.loop.exit:
5196 // CHECK13-NEXT: [[TMP34:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5197 // CHECK13-NEXT: [[TMP35:%.*]] = load i32, i32* [[TMP34]], align 4
5198 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP35]])
5199 // CHECK13-NEXT: br label [[OMP_PRECOND_END]]
5200 // CHECK13: omp.precond.end:
5201 // CHECK13-NEXT: ret void
5202 //
5203 //
5204 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..7
5205 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
5206 // CHECK13-NEXT: entry:
5207 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5208 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5209 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5210 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5211 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
5212 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
5213 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
5214 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
5215 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5216 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
5217 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5218 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
5219 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
5220 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5221 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5222 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5223 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5224 // CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 4
5225 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5226 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5227 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5228 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5229 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
5230 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
5231 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
5232 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
5233 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
5234 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
5235 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
5236 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
5237 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
5238 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
5239 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5240 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
5241 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5242 // CHECK13-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
5243 // CHECK13-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
5244 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
5245 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5246 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
5247 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5248 // CHECK13: omp.precond.then:
5249 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5250 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5251 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
5252 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5253 // CHECK13-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
5254 // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5255 // CHECK13-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32
5256 // CHECK13-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4
5257 // CHECK13-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
5258 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5259 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5260 // CHECK13-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5261 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
5262 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5263 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5264 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5265 // CHECK13-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
5266 // CHECK13-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5267 // CHECK13: cond.true:
5268 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5269 // CHECK13-NEXT: br label [[COND_END:%.*]]
5270 // CHECK13: cond.false:
5271 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5272 // CHECK13-NEXT: br label [[COND_END]]
5273 // CHECK13: cond.end:
5274 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
5275 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5276 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5277 // CHECK13-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
5278 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5279 // CHECK13: omp.inner.for.cond:
5280 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5281 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5282 // CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
5283 // CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5284 // CHECK13: omp.inner.for.body:
5285 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5286 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
5287 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5288 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I6]], align 4
5289 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4
5290 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
5291 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
5292 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
5293 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5294 // CHECK13: omp.body.continue:
5295 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5296 // CHECK13: omp.inner.for.inc:
5297 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5298 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1
5299 // CHECK13-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
5300 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
5301 // CHECK13: omp.inner.for.end:
5302 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5303 // CHECK13: omp.loop.exit:
5304 // CHECK13-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5305 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
5306 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
5307 // CHECK13-NEXT: br label [[OMP_PRECOND_END]]
5308 // CHECK13: omp.precond.end:
5309 // CHECK13-NEXT: ret void
5310 //
5311 //
5312 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163
5313 // CHECK13-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
5314 // CHECK13-NEXT: entry:
5315 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
5316 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
5317 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
5318 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
5319 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
5320 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
5321 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
5322 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
5323 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
5324 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
5325 // CHECK13-NEXT: ret void
5326 //
5327 //
5328 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..10
5329 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
5330 // CHECK13-NEXT: entry:
5331 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5332 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5333 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
5334 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
5335 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
5336 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5337 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
5338 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5339 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5340 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
5341 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5342 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5343 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5344 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5345 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4
5346 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5347 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5348 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
5349 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
5350 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
5351 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
5352 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
5353 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
5354 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
5355 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
5356 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5357 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
5358 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5359 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
5360 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
5361 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
5362 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5363 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
5364 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5365 // CHECK13: omp.precond.then:
5366 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5367 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5368 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
5369 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5370 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5371 // CHECK13-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5372 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
5373 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5374 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5375 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5376 // CHECK13-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
5377 // CHECK13-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5378 // CHECK13: cond.true:
5379 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5380 // CHECK13-NEXT: br label [[COND_END:%.*]]
5381 // CHECK13: cond.false:
5382 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5383 // CHECK13-NEXT: br label [[COND_END]]
5384 // CHECK13: cond.end:
5385 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
5386 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5387 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5388 // CHECK13-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
5389 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5390 // CHECK13: omp.inner.for.cond:
5391 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5392 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5393 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
5394 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5395 // CHECK13: omp.inner.for.body:
5396 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5397 // CHECK13-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
5398 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5399 // CHECK13-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
5400 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])
5401 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5402 // CHECK13: omp.inner.for.inc:
5403 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5404 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5405 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
5406 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5407 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
5408 // CHECK13: omp.inner.for.end:
5409 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5410 // CHECK13: omp.loop.exit:
5411 // CHECK13-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5412 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
5413 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
5414 // CHECK13-NEXT: br label [[OMP_PRECOND_END]]
5415 // CHECK13: omp.precond.end:
5416 // CHECK13-NEXT: ret void
5417 //
5418 //
5419 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..11
5420 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
5421 // CHECK13-NEXT: entry:
5422 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5423 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5424 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5425 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5426 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
5427 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
5428 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
5429 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5430 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
5431 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5432 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5433 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
5434 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5435 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5436 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5437 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5438 // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4
5439 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5440 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5441 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5442 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5443 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
5444 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
5445 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
5446 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
5447 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
5448 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
5449 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
5450 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
5451 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5452 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
5453 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5454 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
5455 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
5456 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
5457 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5458 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
5459 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5460 // CHECK13: omp.precond.then:
5461 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5462 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5463 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
5464 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5465 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
5466 // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5467 // CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
5468 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5469 // CHECK13-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
5470 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5471 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5472 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5473 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5474 // CHECK13-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5475 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
5476 // CHECK13-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1)
5477 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
5478 // CHECK13: omp.dispatch.cond:
5479 // CHECK13-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5480 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
5481 // CHECK13-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
5482 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
5483 // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
5484 // CHECK13: omp.dispatch.body:
5485 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5486 // CHECK13-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
5487 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5488 // CHECK13: omp.inner.for.cond:
5489 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
5490 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15
5491 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
5492 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5493 // CHECK13: omp.inner.for.body:
5494 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
5495 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
5496 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5497 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !15
5498 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !15
5499 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64
5500 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
5501 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15
5502 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5503 // CHECK13: omp.body.continue:
5504 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5505 // CHECK13: omp.inner.for.inc:
5506 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
5507 // CHECK13-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1
5508 // CHECK13-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
5509 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
5510 // CHECK13: omp.inner.for.end:
5511 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
5512 // CHECK13: omp.dispatch.inc:
5513 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]]
5514 // CHECK13: omp.dispatch.end:
5515 // CHECK13-NEXT: br label [[OMP_PRECOND_END]]
5516 // CHECK13: omp.precond.end:
5517 // CHECK13-NEXT: ret void
5518 //
5519 //
5520 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168
5521 // CHECK13-SAME: (i64 noundef [[M:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
5522 // CHECK13-NEXT: entry:
5523 // CHECK13-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
5524 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
5525 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
5526 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
5527 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5528 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
5529 // CHECK13-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8
5530 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
5531 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
5532 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
5533 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
5534 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
5535 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
5536 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
5537 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
5538 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
5539 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
5540 // CHECK13-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
5541 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4
5542 // CHECK13-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
5543 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]])
5544 // CHECK13-NEXT: ret void
5545 //
5546 //
5547 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..14
5548 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
5549 // CHECK13-NEXT: entry:
5550 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5551 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5552 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
5553 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
5554 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
5555 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
5556 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5557 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
5558 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5559 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
5560 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
5561 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5562 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5563 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5564 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5565 // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4
5566 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
5567 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5568 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5569 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
5570 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
5571 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
5572 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
5573 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
5574 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
5575 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
5576 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
5577 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
5578 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
5579 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5580 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
5581 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5582 // CHECK13-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
5583 // CHECK13-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
5584 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
5585 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5586 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
5587 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5588 // CHECK13: omp.precond.then:
5589 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5590 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5591 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
5592 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5593 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5594 // CHECK13-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5595 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
5596 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5597 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5598 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5599 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
5600 // CHECK13-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5601 // CHECK13: cond.true:
5602 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5603 // CHECK13-NEXT: br label [[COND_END:%.*]]
5604 // CHECK13: cond.false:
5605 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5606 // CHECK13-NEXT: br label [[COND_END]]
5607 // CHECK13: cond.end:
5608 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
5609 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5610 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5611 // CHECK13-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
5612 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5613 // CHECK13: omp.inner.for.cond:
5614 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5615 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5616 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
5617 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5618 // CHECK13: omp.inner.for.body:
5619 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5620 // CHECK13-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
5621 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5622 // CHECK13-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
5623 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV]], align 4
5624 // CHECK13-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
5625 // CHECK13-NEXT: store i32 [[TMP20]], i32* [[CONV7]], align 4
5626 // CHECK13-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
5627 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP21]])
5628 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5629 // CHECK13: omp.inner.for.inc:
5630 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5631 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5632 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
5633 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5634 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
5635 // CHECK13: omp.inner.for.end:
5636 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
5637 // CHECK13: omp.loop.exit:
5638 // CHECK13-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5639 // CHECK13-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4
5640 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]])
5641 // CHECK13-NEXT: br label [[OMP_PRECOND_END]]
5642 // CHECK13: omp.precond.end:
5643 // CHECK13-NEXT: ret void
5644 //
5645 //
5646 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..15
5647 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
5648 // CHECK13-NEXT: entry:
5649 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5650 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5651 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5652 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5653 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
5654 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
5655 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
5656 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
5657 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
5658 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
5659 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5660 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
5661 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
5662 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
5663 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
5664 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5665 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5666 // CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 4
5667 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5668 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5669 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5670 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5671 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
5672 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
5673 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
5674 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
5675 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
5676 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
5677 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
5678 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
5679 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
5680 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
5681 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5682 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
5683 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5684 // CHECK13-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
5685 // CHECK13-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
5686 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4
5687 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
5688 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
5689 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5690 // CHECK13: omp.precond.then:
5691 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
5692 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
5693 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
5694 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5695 // CHECK13-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
5696 // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5697 // CHECK13-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32
5698 // CHECK13-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4
5699 // CHECK13-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
5700 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5701 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5702 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 4
5703 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5704 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5705 // CHECK13-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5706 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
5707 // CHECK13-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 1073741859, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]])
5708 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
5709 // CHECK13: omp.dispatch.cond:
5710 // CHECK13-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5711 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
5712 // CHECK13-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
5713 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0
5714 // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
5715 // CHECK13: omp.dispatch.body:
5716 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5717 // CHECK13-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4
5718 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
5719 // CHECK13: omp.inner.for.cond:
5720 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
5721 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18
5722 // CHECK13-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
5723 // CHECK13-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5724 // CHECK13: omp.inner.for.body:
5725 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
5726 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
5727 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5728 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !18
5729 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !18
5730 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64
5731 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
5732 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18
5733 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
5734 // CHECK13: omp.body.continue:
5735 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
5736 // CHECK13: omp.inner.for.inc:
5737 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
5738 // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], 1
5739 // CHECK13-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
5740 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
5741 // CHECK13: omp.inner.for.end:
5742 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
5743 // CHECK13: omp.dispatch.inc:
5744 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]]
5745 // CHECK13: omp.dispatch.end:
5746 // CHECK13-NEXT: br label [[OMP_PRECOND_END]]
5747 // CHECK13: omp.precond.end:
5748 // CHECK13-NEXT: ret void
5749 //
5750 //
5751 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
5752 // CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {
5753 // CHECK13-NEXT: entry:
5754 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
5755 // CHECK13-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
5756 // CHECK13-NEXT: [[M:%.*]] = alloca i32, align 4
5757 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
5758 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
5759 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
5760 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
5761 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8
5762 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8
5763 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8
5764 // CHECK13-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
5765 // CHECK13-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8
5766 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x i8*], align 8
5767 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x i8*], align 8
5768 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x i8*], align 8
5769 // CHECK13-NEXT: [[_TMP11:%.*]] = alloca i32, align 4
5770 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS15:%.*]] = alloca [1 x i8*], align 8
5771 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS16:%.*]] = alloca [1 x i8*], align 8
5772 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS17:%.*]] = alloca [1 x i8*], align 8
5773 // CHECK13-NEXT: [[_TMP18:%.*]] = alloca i32, align 4
5774 // CHECK13-NEXT: [[M_CASTED22:%.*]] = alloca i64, align 8
5775 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [2 x i8*], align 8
5776 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [2 x i8*], align 8
5777 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [2 x i8*], align 8
5778 // CHECK13-NEXT: [[_TMP27:%.*]] = alloca i32, align 4
5779 // CHECK13-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
5780 // CHECK13-NEXT: store i32 10, i32* [[M]], align 4
5781 // CHECK13-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5782 // CHECK13-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
5783 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8
5784 // CHECK13-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5785 // CHECK13-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
5786 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8
5787 // CHECK13-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
5788 // CHECK13-NEXT: store i8* null, i8** [[TMP4]], align 8
5789 // CHECK13-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5790 // CHECK13-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5791 // CHECK13-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
5792 // CHECK13-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
5793 // CHECK13-NEXT: store i32 1, i32* [[TMP7]], align 4
5794 // CHECK13-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
5795 // CHECK13-NEXT: store i32 1, i32* [[TMP8]], align 4
5796 // CHECK13-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
5797 // CHECK13-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 8
5798 // CHECK13-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
5799 // CHECK13-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 8
5800 // CHECK13-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
5801 // CHECK13-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.20, i32 0, i32 0), i64** [[TMP11]], align 8
5802 // CHECK13-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
5803 // CHECK13-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.21, i32 0, i32 0), i64** [[TMP12]], align 8
5804 // CHECK13-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
5805 // CHECK13-NEXT: store i8** null, i8*** [[TMP13]], align 8
5806 // CHECK13-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
5807 // CHECK13-NEXT: store i8** null, i8*** [[TMP14]], align 8
5808 // CHECK13-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
5809 // CHECK13-NEXT: store i64 10, i64* [[TMP15]], align 8
5810 // CHECK13-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
5811 // CHECK13-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
5812 // CHECK13-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5813 // CHECK13: omp_offload.failed:
5814 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]]
5815 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]]
5816 // CHECK13: omp_offload.cont:
5817 // CHECK13-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
5818 // CHECK13-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]**
5819 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 8
5820 // CHECK13-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
5821 // CHECK13-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]**
5822 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 8
5823 // CHECK13-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0
5824 // CHECK13-NEXT: store i8* null, i8** [[TMP22]], align 8
5825 // CHECK13-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
5826 // CHECK13-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
5827 // CHECK13-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
5828 // CHECK13-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 0
5829 // CHECK13-NEXT: store i32 1, i32* [[TMP25]], align 4
5830 // CHECK13-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 1
5831 // CHECK13-NEXT: store i32 1, i32* [[TMP26]], align 4
5832 // CHECK13-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 2
5833 // CHECK13-NEXT: store i8** [[TMP23]], i8*** [[TMP27]], align 8
5834 // CHECK13-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 3
5835 // CHECK13-NEXT: store i8** [[TMP24]], i8*** [[TMP28]], align 8
5836 // CHECK13-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 4
5837 // CHECK13-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.24, i32 0, i32 0), i64** [[TMP29]], align 8
5838 // CHECK13-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 5
5839 // CHECK13-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.25, i32 0, i32 0), i64** [[TMP30]], align 8
5840 // CHECK13-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 6
5841 // CHECK13-NEXT: store i8** null, i8*** [[TMP31]], align 8
5842 // CHECK13-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 7
5843 // CHECK13-NEXT: store i8** null, i8*** [[TMP32]], align 8
5844 // CHECK13-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 8
5845 // CHECK13-NEXT: store i64 10, i64* [[TMP33]], align 8
5846 // CHECK13-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]])
5847 // CHECK13-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
5848 // CHECK13-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
5849 // CHECK13: omp_offload.failed6:
5850 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121([10 x i32]* [[A]]) #[[ATTR3]]
5851 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT7]]
5852 // CHECK13: omp_offload.cont7:
5853 // CHECK13-NEXT: [[TMP36:%.*]] = load i32, i32* [[M]], align 4
5854 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[M_CASTED]] to i32*
5855 // CHECK13-NEXT: store i32 [[TMP36]], i32* [[CONV]], align 4
5856 // CHECK13-NEXT: [[TMP37:%.*]] = load i64, i64* [[M_CASTED]], align 8
5857 // CHECK13-NEXT: [[TMP38:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
5858 // CHECK13-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64*
5859 // CHECK13-NEXT: store i64 [[TMP37]], i64* [[TMP39]], align 8
5860 // CHECK13-NEXT: [[TMP40:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
5861 // CHECK13-NEXT: [[TMP41:%.*]] = bitcast i8** [[TMP40]] to i64*
5862 // CHECK13-NEXT: store i64 [[TMP37]], i64* [[TMP41]], align 8
5863 // CHECK13-NEXT: [[TMP42:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 0
5864 // CHECK13-NEXT: store i8* null, i8** [[TMP42]], align 8
5865 // CHECK13-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1
5866 // CHECK13-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to [10 x i32]**
5867 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP44]], align 8
5868 // CHECK13-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 1
5869 // CHECK13-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to [10 x i32]**
5870 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP46]], align 8
5871 // CHECK13-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 1
5872 // CHECK13-NEXT: store i8* null, i8** [[TMP47]], align 8
5873 // CHECK13-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
5874 // CHECK13-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
5875 // CHECK13-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
5876 // CHECK13-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 0
5877 // CHECK13-NEXT: store i32 1, i32* [[TMP50]], align 4
5878 // CHECK13-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 1
5879 // CHECK13-NEXT: store i32 2, i32* [[TMP51]], align 4
5880 // CHECK13-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 2
5881 // CHECK13-NEXT: store i8** [[TMP48]], i8*** [[TMP52]], align 8
5882 // CHECK13-NEXT: [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 3
5883 // CHECK13-NEXT: store i8** [[TMP49]], i8*** [[TMP53]], align 8
5884 // CHECK13-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 4
5885 // CHECK13-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.28, i32 0, i32 0), i64** [[TMP54]], align 8
5886 // CHECK13-NEXT: [[TMP55:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 5
5887 // CHECK13-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.29, i32 0, i32 0), i64** [[TMP55]], align 8
5888 // CHECK13-NEXT: [[TMP56:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 6
5889 // CHECK13-NEXT: store i8** null, i8*** [[TMP56]], align 8
5890 // CHECK13-NEXT: [[TMP57:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 7
5891 // CHECK13-NEXT: store i8** null, i8*** [[TMP57]], align 8
5892 // CHECK13-NEXT: [[TMP58:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 8
5893 // CHECK13-NEXT: store i64 10, i64* [[TMP58]], align 8
5894 // CHECK13-NEXT: [[TMP59:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]])
5895 // CHECK13-NEXT: [[TMP60:%.*]] = icmp ne i32 [[TMP59]], 0
5896 // CHECK13-NEXT: br i1 [[TMP60]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]]
5897 // CHECK13: omp_offload.failed13:
5898 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i64 [[TMP37]], [10 x i32]* [[A]]) #[[ATTR3]]
5899 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT14]]
5900 // CHECK13: omp_offload.cont14:
5901 // CHECK13-NEXT: [[TMP61:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0
5902 // CHECK13-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to [10 x i32]**
5903 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP62]], align 8
5904 // CHECK13-NEXT: [[TMP63:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS16]], i32 0, i32 0
5905 // CHECK13-NEXT: [[TMP64:%.*]] = bitcast i8** [[TMP63]] to [10 x i32]**
5906 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP64]], align 8
5907 // CHECK13-NEXT: [[TMP65:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS17]], i64 0, i64 0
5908 // CHECK13-NEXT: store i8* null, i8** [[TMP65]], align 8
5909 // CHECK13-NEXT: [[TMP66:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0
5910 // CHECK13-NEXT: [[TMP67:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS16]], i32 0, i32 0
5911 // CHECK13-NEXT: [[KERNEL_ARGS19:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
5912 // CHECK13-NEXT: [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 0
5913 // CHECK13-NEXT: store i32 1, i32* [[TMP68]], align 4
5914 // CHECK13-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 1
5915 // CHECK13-NEXT: store i32 1, i32* [[TMP69]], align 4
5916 // CHECK13-NEXT: [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 2
5917 // CHECK13-NEXT: store i8** [[TMP66]], i8*** [[TMP70]], align 8
5918 // CHECK13-NEXT: [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 3
5919 // CHECK13-NEXT: store i8** [[TMP67]], i8*** [[TMP71]], align 8
5920 // CHECK13-NEXT: [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 4
5921 // CHECK13-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.32, i32 0, i32 0), i64** [[TMP72]], align 8
5922 // CHECK13-NEXT: [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 5
5923 // CHECK13-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.33, i32 0, i32 0), i64** [[TMP73]], align 8
5924 // CHECK13-NEXT: [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 6
5925 // CHECK13-NEXT: store i8** null, i8*** [[TMP74]], align 8
5926 // CHECK13-NEXT: [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 7
5927 // CHECK13-NEXT: store i8** null, i8*** [[TMP75]], align 8
5928 // CHECK13-NEXT: [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 8
5929 // CHECK13-NEXT: store i64 10, i64* [[TMP76]], align 8
5930 // CHECK13-NEXT: [[TMP77:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]])
5931 // CHECK13-NEXT: [[TMP78:%.*]] = icmp ne i32 [[TMP77]], 0
5932 // CHECK13-NEXT: br i1 [[TMP78]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]]
5933 // CHECK13: omp_offload.failed20:
5934 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131([10 x i32]* [[A]]) #[[ATTR3]]
5935 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT21]]
5936 // CHECK13: omp_offload.cont21:
5937 // CHECK13-NEXT: [[TMP79:%.*]] = load i32, i32* [[M]], align 4
5938 // CHECK13-NEXT: [[CONV23:%.*]] = bitcast i64* [[M_CASTED22]] to i32*
5939 // CHECK13-NEXT: store i32 [[TMP79]], i32* [[CONV23]], align 4
5940 // CHECK13-NEXT: [[TMP80:%.*]] = load i64, i64* [[M_CASTED22]], align 8
5941 // CHECK13-NEXT: [[TMP81:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
5942 // CHECK13-NEXT: [[TMP82:%.*]] = bitcast i8** [[TMP81]] to i64*
5943 // CHECK13-NEXT: store i64 [[TMP80]], i64* [[TMP82]], align 8
5944 // CHECK13-NEXT: [[TMP83:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
5945 // CHECK13-NEXT: [[TMP84:%.*]] = bitcast i8** [[TMP83]] to i64*
5946 // CHECK13-NEXT: store i64 [[TMP80]], i64* [[TMP84]], align 8
5947 // CHECK13-NEXT: [[TMP85:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 0
5948 // CHECK13-NEXT: store i8* null, i8** [[TMP85]], align 8
5949 // CHECK13-NEXT: [[TMP86:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 1
5950 // CHECK13-NEXT: [[TMP87:%.*]] = bitcast i8** [[TMP86]] to [10 x i32]**
5951 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP87]], align 8
5952 // CHECK13-NEXT: [[TMP88:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 1
5953 // CHECK13-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to [10 x i32]**
5954 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP89]], align 8
5955 // CHECK13-NEXT: [[TMP90:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 1
5956 // CHECK13-NEXT: store i8* null, i8** [[TMP90]], align 8
5957 // CHECK13-NEXT: [[TMP91:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
5958 // CHECK13-NEXT: [[TMP92:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
5959 // CHECK13-NEXT: [[KERNEL_ARGS28:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
5960 // CHECK13-NEXT: [[TMP93:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 0
5961 // CHECK13-NEXT: store i32 1, i32* [[TMP93]], align 4
5962 // CHECK13-NEXT: [[TMP94:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 1
5963 // CHECK13-NEXT: store i32 2, i32* [[TMP94]], align 4
5964 // CHECK13-NEXT: [[TMP95:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 2
5965 // CHECK13-NEXT: store i8** [[TMP91]], i8*** [[TMP95]], align 8
5966 // CHECK13-NEXT: [[TMP96:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 3
5967 // CHECK13-NEXT: store i8** [[TMP92]], i8*** [[TMP96]], align 8
5968 // CHECK13-NEXT: [[TMP97:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 4
5969 // CHECK13-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.36, i32 0, i32 0), i64** [[TMP97]], align 8
5970 // CHECK13-NEXT: [[TMP98:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 5
5971 // CHECK13-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.37, i32 0, i32 0), i64** [[TMP98]], align 8
5972 // CHECK13-NEXT: [[TMP99:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 6
5973 // CHECK13-NEXT: store i8** null, i8*** [[TMP99]], align 8
5974 // CHECK13-NEXT: [[TMP100:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 7
5975 // CHECK13-NEXT: store i8** null, i8*** [[TMP100]], align 8
5976 // CHECK13-NEXT: [[TMP101:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 8
5977 // CHECK13-NEXT: store i64 10, i64* [[TMP101]], align 8
5978 // CHECK13-NEXT: [[TMP102:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]])
5979 // CHECK13-NEXT: [[TMP103:%.*]] = icmp ne i32 [[TMP102]], 0
5980 // CHECK13-NEXT: br i1 [[TMP103]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]]
5981 // CHECK13: omp_offload.failed29:
5982 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i64 [[TMP80]], [10 x i32]* [[A]]) #[[ATTR3]]
5983 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT30]]
5984 // CHECK13: omp_offload.cont30:
5985 // CHECK13-NEXT: ret i32 0
5986 //
5987 //
5988 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
5989 // CHECK13-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
5990 // CHECK13-NEXT: entry:
5991 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
5992 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
5993 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
5994 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
5995 // CHECK13-NEXT: ret void
5996 //
5997 //
5998 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..18
5999 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6000 // CHECK13-NEXT: entry:
6001 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6002 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6003 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
6004 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6005 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
6006 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6007 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6008 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6009 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6010 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
6011 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6012 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6013 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
6014 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
6015 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6016 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
6017 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6018 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6019 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6020 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
6021 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6022 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6023 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
6024 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6025 // CHECK13: cond.true:
6026 // CHECK13-NEXT: br label [[COND_END:%.*]]
6027 // CHECK13: cond.false:
6028 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6029 // CHECK13-NEXT: br label [[COND_END]]
6030 // CHECK13: cond.end:
6031 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6032 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6033 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6034 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
6035 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6036 // CHECK13: omp.inner.for.cond:
6037 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6038 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6039 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6040 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6041 // CHECK13: omp.inner.for.body:
6042 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6043 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
6044 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6045 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
6046 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..19 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
6047 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6048 // CHECK13: omp.inner.for.inc:
6049 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6050 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6051 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
6052 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6053 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
6054 // CHECK13: omp.inner.for.end:
6055 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6056 // CHECK13: omp.loop.exit:
6057 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
6058 // CHECK13-NEXT: ret void
6059 //
6060 //
6061 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..19
6062 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6063 // CHECK13-NEXT: entry:
6064 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6065 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6066 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6067 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6068 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
6069 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6070 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
6071 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6072 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6073 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6074 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6075 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
6076 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6077 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6078 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6079 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6080 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
6081 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
6082 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6083 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
6084 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6085 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
6086 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6087 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
6088 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
6089 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
6090 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6091 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6092 // CHECK13-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6093 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
6094 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6095 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6096 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
6097 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6098 // CHECK13: cond.true:
6099 // CHECK13-NEXT: br label [[COND_END:%.*]]
6100 // CHECK13: cond.false:
6101 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6102 // CHECK13-NEXT: br label [[COND_END]]
6103 // CHECK13: cond.end:
6104 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
6105 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6106 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6107 // CHECK13-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
6108 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6109 // CHECK13: omp.inner.for.cond:
6110 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6111 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6112 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
6113 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6114 // CHECK13: omp.inner.for.body:
6115 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6116 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
6117 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6118 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4
6119 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
6120 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
6121 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
6122 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
6123 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6124 // CHECK13: omp.body.continue:
6125 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6126 // CHECK13: omp.inner.for.inc:
6127 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6128 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
6129 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
6130 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
6131 // CHECK13: omp.inner.for.end:
6132 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6133 // CHECK13: omp.loop.exit:
6134 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
6135 // CHECK13-NEXT: ret void
6136 //
6137 //
6138 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121
6139 // CHECK13-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6140 // CHECK13-NEXT: entry:
6141 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
6142 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
6143 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
6144 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..22 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
6145 // CHECK13-NEXT: ret void
6146 //
6147 //
6148 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..22
6149 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6150 // CHECK13-NEXT: entry:
6151 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6152 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6153 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
6154 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6155 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
6156 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6157 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6158 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6159 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6160 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
6161 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6162 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6163 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
6164 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
6165 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6166 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
6167 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6168 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6169 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6170 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
6171 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6172 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6173 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
6174 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6175 // CHECK13: cond.true:
6176 // CHECK13-NEXT: br label [[COND_END:%.*]]
6177 // CHECK13: cond.false:
6178 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6179 // CHECK13-NEXT: br label [[COND_END]]
6180 // CHECK13: cond.end:
6181 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6182 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6183 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6184 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
6185 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6186 // CHECK13: omp.inner.for.cond:
6187 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6188 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6189 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6190 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6191 // CHECK13: omp.inner.for.body:
6192 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6193 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
6194 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6195 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
6196 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..23 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
6197 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6198 // CHECK13: omp.inner.for.inc:
6199 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6200 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6201 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
6202 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6203 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
6204 // CHECK13: omp.inner.for.end:
6205 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6206 // CHECK13: omp.loop.exit:
6207 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
6208 // CHECK13-NEXT: ret void
6209 //
6210 //
6211 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..23
6212 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6213 // CHECK13-NEXT: entry:
6214 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6215 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6216 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6217 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6218 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
6219 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6220 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
6221 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6222 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6223 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6224 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6225 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
6226 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6227 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6228 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6229 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6230 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
6231 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
6232 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6233 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
6234 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6235 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
6236 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6237 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
6238 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
6239 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
6240 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6241 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6242 // CHECK13-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6243 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
6244 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6245 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6246 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
6247 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6248 // CHECK13: cond.true:
6249 // CHECK13-NEXT: br label [[COND_END:%.*]]
6250 // CHECK13: cond.false:
6251 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6252 // CHECK13-NEXT: br label [[COND_END]]
6253 // CHECK13: cond.end:
6254 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
6255 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6256 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6257 // CHECK13-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
6258 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6259 // CHECK13: omp.inner.for.cond:
6260 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6261 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6262 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
6263 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6264 // CHECK13: omp.inner.for.body:
6265 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6266 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
6267 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6268 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4
6269 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
6270 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
6271 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
6272 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
6273 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6274 // CHECK13: omp.body.continue:
6275 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6276 // CHECK13: omp.inner.for.inc:
6277 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6278 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
6279 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
6280 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
6281 // CHECK13: omp.inner.for.end:
6282 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6283 // CHECK13: omp.loop.exit:
6284 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
6285 // CHECK13-NEXT: ret void
6286 //
6287 //
6288 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126
6289 // CHECK13-SAME: (i64 noundef [[M:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6290 // CHECK13-NEXT: entry:
6291 // CHECK13-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
6292 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
6293 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
6294 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
6295 // CHECK13-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8
6296 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
6297 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
6298 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
6299 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4
6300 // CHECK13-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
6301 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6302 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
6303 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
6304 // CHECK13-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
6305 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..26 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]])
6306 // CHECK13-NEXT: ret void
6307 //
6308 //
6309 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..26
6310 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
6311 // CHECK13-NEXT: entry:
6312 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6313 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6314 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
6315 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6316 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6317 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
6318 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6319 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6320 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6321 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6322 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
6323 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
6324 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6325 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6326 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
6327 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
6328 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
6329 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
6330 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6331 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
6332 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6333 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6334 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6335 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
6336 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6337 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6338 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
6339 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6340 // CHECK13: cond.true:
6341 // CHECK13-NEXT: br label [[COND_END:%.*]]
6342 // CHECK13: cond.false:
6343 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6344 // CHECK13-NEXT: br label [[COND_END]]
6345 // CHECK13: cond.end:
6346 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6347 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6348 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6349 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
6350 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6351 // CHECK13: omp.inner.for.cond:
6352 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6353 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6354 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6355 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6356 // CHECK13: omp.inner.for.body:
6357 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6358 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
6359 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6360 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
6361 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 4
6362 // CHECK13-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
6363 // CHECK13-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4
6364 // CHECK13-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
6365 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..27 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]])
6366 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6367 // CHECK13: omp.inner.for.inc:
6368 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6369 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6370 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
6371 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6372 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
6373 // CHECK13: omp.inner.for.end:
6374 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6375 // CHECK13: omp.loop.exit:
6376 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
6377 // CHECK13-NEXT: ret void
6378 //
6379 //
6380 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..27
6381 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
6382 // CHECK13-NEXT: entry:
6383 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6384 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6385 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6386 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6387 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
6388 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6389 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6390 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
6391 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6392 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6393 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6394 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6395 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
6396 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6397 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6398 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6399 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6400 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
6401 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
6402 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
6403 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
6404 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6405 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
6406 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6407 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6408 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6409 // CHECK13-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
6410 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
6411 // CHECK13-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
6412 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6413 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6414 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
6415 // CHECK13-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6416 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
6417 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
6418 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
6419 // CHECK13: omp.dispatch.cond:
6420 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6421 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6422 // CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
6423 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]]
6424 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6425 // CHECK13: cond.true:
6426 // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6427 // CHECK13-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32
6428 // CHECK13-NEXT: br label [[COND_END:%.*]]
6429 // CHECK13: cond.false:
6430 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6431 // CHECK13-NEXT: br label [[COND_END]]
6432 // CHECK13: cond.end:
6433 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
6434 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6435 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6436 // CHECK13-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
6437 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6438 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6439 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
6440 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
6441 // CHECK13: omp.dispatch.body:
6442 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6443 // CHECK13: omp.inner.for.cond:
6444 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6445 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6446 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
6447 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6448 // CHECK13: omp.inner.for.body:
6449 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6450 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
6451 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6452 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4
6453 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4
6454 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
6455 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
6456 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
6457 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6458 // CHECK13: omp.body.continue:
6459 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6460 // CHECK13: omp.inner.for.inc:
6461 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6462 // CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1
6463 // CHECK13-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
6464 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
6465 // CHECK13: omp.inner.for.end:
6466 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
6467 // CHECK13: omp.dispatch.inc:
6468 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6469 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6470 // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
6471 // CHECK13-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
6472 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6473 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6474 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
6475 // CHECK13-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
6476 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]]
6477 // CHECK13: omp.dispatch.end:
6478 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
6479 // CHECK13-NEXT: ret void
6480 //
6481 //
6482 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131
6483 // CHECK13-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6484 // CHECK13-NEXT: entry:
6485 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
6486 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
6487 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
6488 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..30 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
6489 // CHECK13-NEXT: ret void
6490 //
6491 //
6492 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..30
6493 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6494 // CHECK13-NEXT: entry:
6495 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6496 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6497 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
6498 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6499 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
6500 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6501 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6502 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6503 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6504 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
6505 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6506 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6507 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
6508 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
6509 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6510 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
6511 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6512 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6513 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6514 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
6515 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6516 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6517 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
6518 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6519 // CHECK13: cond.true:
6520 // CHECK13-NEXT: br label [[COND_END:%.*]]
6521 // CHECK13: cond.false:
6522 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6523 // CHECK13-NEXT: br label [[COND_END]]
6524 // CHECK13: cond.end:
6525 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6526 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6527 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6528 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
6529 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6530 // CHECK13: omp.inner.for.cond:
6531 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6532 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6533 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6534 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6535 // CHECK13: omp.inner.for.body:
6536 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6537 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
6538 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6539 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
6540 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..31 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
6541 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6542 // CHECK13: omp.inner.for.inc:
6543 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6544 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6545 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
6546 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6547 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
6548 // CHECK13: omp.inner.for.end:
6549 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6550 // CHECK13: omp.loop.exit:
6551 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
6552 // CHECK13-NEXT: ret void
6553 //
6554 //
6555 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..31
6556 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6557 // CHECK13-NEXT: entry:
6558 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6559 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6560 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6561 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6562 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
6563 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6564 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
6565 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6566 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6567 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6568 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6569 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
6570 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6571 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6572 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6573 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6574 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
6575 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
6576 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6577 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
6578 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6579 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
6580 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6581 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
6582 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
6583 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
6584 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6585 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6586 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6587 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6588 // CHECK13-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6589 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
6590 // CHECK13-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
6591 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
6592 // CHECK13: omp.dispatch.cond:
6593 // CHECK13-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
6594 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
6595 // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
6596 // CHECK13: omp.dispatch.body:
6597 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6598 // CHECK13-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
6599 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6600 // CHECK13: omp.inner.for.cond:
6601 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
6602 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21
6603 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
6604 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6605 // CHECK13: omp.inner.for.body:
6606 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
6607 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
6608 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6609 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21
6610 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21
6611 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
6612 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
6613 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21
6614 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6615 // CHECK13: omp.body.continue:
6616 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6617 // CHECK13: omp.inner.for.inc:
6618 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
6619 // CHECK13-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
6620 // CHECK13-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
6621 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
6622 // CHECK13: omp.inner.for.end:
6623 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
6624 // CHECK13: omp.dispatch.inc:
6625 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]]
6626 // CHECK13: omp.dispatch.end:
6627 // CHECK13-NEXT: ret void
6628 //
6629 //
6630 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136
6631 // CHECK13-SAME: (i64 noundef [[M:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6632 // CHECK13-NEXT: entry:
6633 // CHECK13-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
6634 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
6635 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
6636 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
6637 // CHECK13-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8
6638 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
6639 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
6640 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
6641 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4
6642 // CHECK13-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
6643 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6644 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
6645 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
6646 // CHECK13-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
6647 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..34 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]])
6648 // CHECK13-NEXT: ret void
6649 //
6650 //
6651 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..34
6652 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
6653 // CHECK13-NEXT: entry:
6654 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6655 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6656 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
6657 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6658 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6659 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
6660 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6661 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6662 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6663 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6664 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
6665 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
6666 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6667 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6668 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
6669 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
6670 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
6671 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
6672 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6673 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
6674 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6675 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6676 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6677 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
6678 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6679 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6680 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
6681 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6682 // CHECK13: cond.true:
6683 // CHECK13-NEXT: br label [[COND_END:%.*]]
6684 // CHECK13: cond.false:
6685 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6686 // CHECK13-NEXT: br label [[COND_END]]
6687 // CHECK13: cond.end:
6688 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6689 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6690 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6691 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
6692 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6693 // CHECK13: omp.inner.for.cond:
6694 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6695 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6696 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6697 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6698 // CHECK13: omp.inner.for.body:
6699 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6700 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
6701 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6702 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
6703 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 4
6704 // CHECK13-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
6705 // CHECK13-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4
6706 // CHECK13-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
6707 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..35 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]])
6708 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6709 // CHECK13: omp.inner.for.inc:
6710 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6711 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6712 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
6713 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6714 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]]
6715 // CHECK13: omp.inner.for.end:
6716 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
6717 // CHECK13: omp.loop.exit:
6718 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
6719 // CHECK13-NEXT: ret void
6720 //
6721 //
6722 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..35
6723 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
6724 // CHECK13-NEXT: entry:
6725 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
6726 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
6727 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6728 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6729 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
6730 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6731 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
6732 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4
6733 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
6734 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
6735 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6736 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6737 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
6738 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
6739 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
6740 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6741 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6742 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
6743 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
6744 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
6745 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
6746 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
6747 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
6748 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
6749 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6750 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
6751 // CHECK13-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
6752 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
6753 // CHECK13-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
6754 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6755 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6756 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
6757 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6758 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6759 // CHECK13-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
6760 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
6761 // CHECK13-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
6762 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
6763 // CHECK13: omp.dispatch.cond:
6764 // CHECK13-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
6765 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
6766 // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
6767 // CHECK13: omp.dispatch.body:
6768 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6769 // CHECK13-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
6770 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
6771 // CHECK13: omp.inner.for.cond:
6772 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
6773 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !24
6774 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
6775 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6776 // CHECK13: omp.inner.for.body:
6777 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
6778 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
6779 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6780 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !24
6781 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !24
6782 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
6783 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
6784 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !24
6785 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
6786 // CHECK13: omp.body.continue:
6787 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
6788 // CHECK13: omp.inner.for.inc:
6789 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
6790 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1
6791 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
6792 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
6793 // CHECK13: omp.inner.for.end:
6794 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
6795 // CHECK13: omp.dispatch.inc:
6796 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]]
6797 // CHECK13: omp.dispatch.end:
6798 // CHECK13-NEXT: ret void
6799 //
6800 //
6801 // CHECK13-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
6802 // CHECK13-SAME: () #[[ATTR6:[0-9]+]] {
6803 // CHECK13-NEXT: entry:
6804 // CHECK13-NEXT: call void @__tgt_register_requires(i64 1)
6805 // CHECK13-NEXT: ret void
6806 //
6807 //
6808 // CHECK15-LABEL: define {{[^@]+}}@main
6809 // CHECK15-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
6810 // CHECK15-NEXT: entry:
6811 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
6812 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
6813 // CHECK15-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
6814 // CHECK15-NEXT: [[N:%.*]] = alloca i32, align 4
6815 // CHECK15-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
6816 // CHECK15-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
6817 // CHECK15-NEXT: [[M:%.*]] = alloca i32, align 4
6818 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
6819 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
6820 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
6821 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
6822 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
6823 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
6824 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
6825 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
6826 // CHECK15-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4
6827 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4
6828 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4
6829 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4
6830 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4
6831 // CHECK15-NEXT: [[_TMP8:%.*]] = alloca i32, align 4
6832 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
6833 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
6834 // CHECK15-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4
6835 // CHECK15-NEXT: [[N_CASTED18:%.*]] = alloca i32, align 4
6836 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [4 x i8*], align 4
6837 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [4 x i8*], align 4
6838 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [4 x i8*], align 4
6839 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES22:%.*]] = alloca [4 x i64], align 4
6840 // CHECK15-NEXT: [[_TMP23:%.*]] = alloca i32, align 4
6841 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4
6842 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4
6843 // CHECK15-NEXT: [[N_CASTED33:%.*]] = alloca i32, align 4
6844 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS34:%.*]] = alloca [3 x i8*], align 4
6845 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS35:%.*]] = alloca [3 x i8*], align 4
6846 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS36:%.*]] = alloca [3 x i8*], align 4
6847 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES37:%.*]] = alloca [3 x i64], align 4
6848 // CHECK15-NEXT: [[_TMP38:%.*]] = alloca i32, align 4
6849 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_39:%.*]] = alloca i32, align 4
6850 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 4
6851 // CHECK15-NEXT: [[M_CASTED48:%.*]] = alloca i32, align 4
6852 // CHECK15-NEXT: [[N_CASTED49:%.*]] = alloca i32, align 4
6853 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS50:%.*]] = alloca [4 x i8*], align 4
6854 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS51:%.*]] = alloca [4 x i8*], align 4
6855 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS52:%.*]] = alloca [4 x i8*], align 4
6856 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES53:%.*]] = alloca [4 x i64], align 4
6857 // CHECK15-NEXT: [[_TMP54:%.*]] = alloca i32, align 4
6858 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_55:%.*]] = alloca i32, align 4
6859 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_56:%.*]] = alloca i32, align 4
6860 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4
6861 // CHECK15-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
6862 // CHECK15-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
6863 // CHECK15-NEXT: store i32 100, i32* [[N]], align 4
6864 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
6865 // CHECK15-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
6866 // CHECK15-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
6867 // CHECK15-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
6868 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
6869 // CHECK15-NEXT: store i32 10, i32* [[M]], align 4
6870 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4
6871 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
6872 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
6873 // CHECK15-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4
6874 // CHECK15-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64
6875 // CHECK15-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8*
6876 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes to i8*), i32 24, i1 false)
6877 // CHECK15-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6878 // CHECK15-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32*
6879 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4
6880 // CHECK15-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6881 // CHECK15-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
6882 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4
6883 // CHECK15-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
6884 // CHECK15-NEXT: store i8* null, i8** [[TMP11]], align 4
6885 // CHECK15-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
6886 // CHECK15-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
6887 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4
6888 // CHECK15-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
6889 // CHECK15-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
6890 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4
6891 // CHECK15-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
6892 // CHECK15-NEXT: store i8* null, i8** [[TMP16]], align 4
6893 // CHECK15-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
6894 // CHECK15-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32**
6895 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 4
6896 // CHECK15-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
6897 // CHECK15-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32**
6898 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 4
6899 // CHECK15-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
6900 // CHECK15-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 4
6901 // CHECK15-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
6902 // CHECK15-NEXT: store i8* null, i8** [[TMP22]], align 4
6903 // CHECK15-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6904 // CHECK15-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6905 // CHECK15-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
6906 // CHECK15-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4
6907 // CHECK15-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4
6908 // CHECK15-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
6909 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0
6910 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
6911 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
6912 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
6913 // CHECK15-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
6914 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1
6915 // CHECK15-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64
6916 // CHECK15-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
6917 // CHECK15-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
6918 // CHECK15-NEXT: store i32 1, i32* [[TMP30]], align 4
6919 // CHECK15-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
6920 // CHECK15-NEXT: store i32 3, i32* [[TMP31]], align 4
6921 // CHECK15-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
6922 // CHECK15-NEXT: store i8** [[TMP23]], i8*** [[TMP32]], align 4
6923 // CHECK15-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
6924 // CHECK15-NEXT: store i8** [[TMP24]], i8*** [[TMP33]], align 4
6925 // CHECK15-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
6926 // CHECK15-NEXT: store i64* [[TMP25]], i64** [[TMP34]], align 4
6927 // CHECK15-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
6928 // CHECK15-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP35]], align 4
6929 // CHECK15-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
6930 // CHECK15-NEXT: store i8** null, i8*** [[TMP36]], align 4
6931 // CHECK15-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
6932 // CHECK15-NEXT: store i8** null, i8*** [[TMP37]], align 4
6933 // CHECK15-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
6934 // CHECK15-NEXT: store i64 [[TMP29]], i64* [[TMP38]], align 8
6935 // CHECK15-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
6936 // CHECK15-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0
6937 // CHECK15-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
6938 // CHECK15: omp_offload.failed:
6939 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
6940 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT]]
6941 // CHECK15: omp_offload.cont:
6942 // CHECK15-NEXT: [[TMP41:%.*]] = load i32, i32* [[N]], align 4
6943 // CHECK15-NEXT: store i32 [[TMP41]], i32* [[N_CASTED3]], align 4
6944 // CHECK15-NEXT: [[TMP42:%.*]] = load i32, i32* [[N_CASTED3]], align 4
6945 // CHECK15-NEXT: [[TMP43:%.*]] = mul nuw i32 [[TMP0]], 4
6946 // CHECK15-NEXT: [[TMP44:%.*]] = sext i32 [[TMP43]] to i64
6947 // CHECK15-NEXT: [[TMP45:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES7]] to i8*
6948 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP45]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.4 to i8*), i32 24, i1 false)
6949 // CHECK15-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
6950 // CHECK15-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to i32*
6951 // CHECK15-NEXT: store i32 [[TMP42]], i32* [[TMP47]], align 4
6952 // CHECK15-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
6953 // CHECK15-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32*
6954 // CHECK15-NEXT: store i32 [[TMP42]], i32* [[TMP49]], align 4
6955 // CHECK15-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0
6956 // CHECK15-NEXT: store i8* null, i8** [[TMP50]], align 4
6957 // CHECK15-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
6958 // CHECK15-NEXT: [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32*
6959 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP52]], align 4
6960 // CHECK15-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
6961 // CHECK15-NEXT: [[TMP54:%.*]] = bitcast i8** [[TMP53]] to i32*
6962 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP54]], align 4
6963 // CHECK15-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1
6964 // CHECK15-NEXT: store i8* null, i8** [[TMP55]], align 4
6965 // CHECK15-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
6966 // CHECK15-NEXT: [[TMP57:%.*]] = bitcast i8** [[TMP56]] to i32**
6967 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP57]], align 4
6968 // CHECK15-NEXT: [[TMP58:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
6969 // CHECK15-NEXT: [[TMP59:%.*]] = bitcast i8** [[TMP58]] to i32**
6970 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP59]], align 4
6971 // CHECK15-NEXT: [[TMP60:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
6972 // CHECK15-NEXT: store i64 [[TMP44]], i64* [[TMP60]], align 4
6973 // CHECK15-NEXT: [[TMP61:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2
6974 // CHECK15-NEXT: store i8* null, i8** [[TMP61]], align 4
6975 // CHECK15-NEXT: [[TMP62:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
6976 // CHECK15-NEXT: [[TMP63:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
6977 // CHECK15-NEXT: [[TMP64:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
6978 // CHECK15-NEXT: [[TMP65:%.*]] = load i32, i32* [[N]], align 4
6979 // CHECK15-NEXT: store i32 [[TMP65]], i32* [[DOTCAPTURE_EXPR_9]], align 4
6980 // CHECK15-NEXT: [[TMP66:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4
6981 // CHECK15-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP66]], 0
6982 // CHECK15-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
6983 // CHECK15-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
6984 // CHECK15-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4
6985 // CHECK15-NEXT: [[TMP67:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
6986 // CHECK15-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP67]], 1
6987 // CHECK15-NEXT: [[TMP68:%.*]] = zext i32 [[ADD14]] to i64
6988 // CHECK15-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
6989 // CHECK15-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 0
6990 // CHECK15-NEXT: store i32 1, i32* [[TMP69]], align 4
6991 // CHECK15-NEXT: [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 1
6992 // CHECK15-NEXT: store i32 3, i32* [[TMP70]], align 4
6993 // CHECK15-NEXT: [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 2
6994 // CHECK15-NEXT: store i8** [[TMP62]], i8*** [[TMP71]], align 4
6995 // CHECK15-NEXT: [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 3
6996 // CHECK15-NEXT: store i8** [[TMP63]], i8*** [[TMP72]], align 4
6997 // CHECK15-NEXT: [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 4
6998 // CHECK15-NEXT: store i64* [[TMP64]], i64** [[TMP73]], align 4
6999 // CHECK15-NEXT: [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 5
7000 // CHECK15-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP74]], align 4
7001 // CHECK15-NEXT: [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 6
7002 // CHECK15-NEXT: store i8** null, i8*** [[TMP75]], align 4
7003 // CHECK15-NEXT: [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 7
7004 // CHECK15-NEXT: store i8** null, i8*** [[TMP76]], align 4
7005 // CHECK15-NEXT: [[TMP77:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 8
7006 // CHECK15-NEXT: store i64 [[TMP68]], i64* [[TMP77]], align 8
7007 // CHECK15-NEXT: [[TMP78:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]])
7008 // CHECK15-NEXT: [[TMP79:%.*]] = icmp ne i32 [[TMP78]], 0
7009 // CHECK15-NEXT: br i1 [[TMP79]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
7010 // CHECK15: omp_offload.failed16:
7011 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i32 [[TMP42]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
7012 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT17]]
7013 // CHECK15: omp_offload.cont17:
7014 // CHECK15-NEXT: [[TMP80:%.*]] = load i32, i32* [[M]], align 4
7015 // CHECK15-NEXT: store i32 [[TMP80]], i32* [[M_CASTED]], align 4
7016 // CHECK15-NEXT: [[TMP81:%.*]] = load i32, i32* [[M_CASTED]], align 4
7017 // CHECK15-NEXT: [[TMP82:%.*]] = load i32, i32* [[N]], align 4
7018 // CHECK15-NEXT: store i32 [[TMP82]], i32* [[N_CASTED18]], align 4
7019 // CHECK15-NEXT: [[TMP83:%.*]] = load i32, i32* [[N_CASTED18]], align 4
7020 // CHECK15-NEXT: [[TMP84:%.*]] = mul nuw i32 [[TMP0]], 4
7021 // CHECK15-NEXT: [[TMP85:%.*]] = sext i32 [[TMP84]] to i64
7022 // CHECK15-NEXT: [[TMP86:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES22]] to i8*
7023 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP86]], i8* align 4 bitcast ([4 x i64]* @.offload_sizes.8 to i8*), i32 32, i1 false)
7024 // CHECK15-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
7025 // CHECK15-NEXT: [[TMP88:%.*]] = bitcast i8** [[TMP87]] to i32*
7026 // CHECK15-NEXT: store i32 [[TMP81]], i32* [[TMP88]], align 4
7027 // CHECK15-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
7028 // CHECK15-NEXT: [[TMP90:%.*]] = bitcast i8** [[TMP89]] to i32*
7029 // CHECK15-NEXT: store i32 [[TMP81]], i32* [[TMP90]], align 4
7030 // CHECK15-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 0
7031 // CHECK15-NEXT: store i8* null, i8** [[TMP91]], align 4
7032 // CHECK15-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 1
7033 // CHECK15-NEXT: [[TMP93:%.*]] = bitcast i8** [[TMP92]] to i32*
7034 // CHECK15-NEXT: store i32 [[TMP83]], i32* [[TMP93]], align 4
7035 // CHECK15-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 1
7036 // CHECK15-NEXT: [[TMP95:%.*]] = bitcast i8** [[TMP94]] to i32*
7037 // CHECK15-NEXT: store i32 [[TMP83]], i32* [[TMP95]], align 4
7038 // CHECK15-NEXT: [[TMP96:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 1
7039 // CHECK15-NEXT: store i8* null, i8** [[TMP96]], align 4
7040 // CHECK15-NEXT: [[TMP97:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 2
7041 // CHECK15-NEXT: [[TMP98:%.*]] = bitcast i8** [[TMP97]] to i32*
7042 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP98]], align 4
7043 // CHECK15-NEXT: [[TMP99:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 2
7044 // CHECK15-NEXT: [[TMP100:%.*]] = bitcast i8** [[TMP99]] to i32*
7045 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP100]], align 4
7046 // CHECK15-NEXT: [[TMP101:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 2
7047 // CHECK15-NEXT: store i8* null, i8** [[TMP101]], align 4
7048 // CHECK15-NEXT: [[TMP102:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 3
7049 // CHECK15-NEXT: [[TMP103:%.*]] = bitcast i8** [[TMP102]] to i32**
7050 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP103]], align 4
7051 // CHECK15-NEXT: [[TMP104:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 3
7052 // CHECK15-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to i32**
7053 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP105]], align 4
7054 // CHECK15-NEXT: [[TMP106:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 3
7055 // CHECK15-NEXT: store i64 [[TMP85]], i64* [[TMP106]], align 4
7056 // CHECK15-NEXT: [[TMP107:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 3
7057 // CHECK15-NEXT: store i8* null, i8** [[TMP107]], align 4
7058 // CHECK15-NEXT: [[TMP108:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
7059 // CHECK15-NEXT: [[TMP109:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
7060 // CHECK15-NEXT: [[TMP110:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 0
7061 // CHECK15-NEXT: [[TMP111:%.*]] = load i32, i32* [[N]], align 4
7062 // CHECK15-NEXT: store i32 [[TMP111]], i32* [[DOTCAPTURE_EXPR_24]], align 4
7063 // CHECK15-NEXT: [[TMP112:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4
7064 // CHECK15-NEXT: [[SUB26:%.*]] = sub nsw i32 [[TMP112]], 0
7065 // CHECK15-NEXT: [[DIV27:%.*]] = sdiv i32 [[SUB26]], 1
7066 // CHECK15-NEXT: [[SUB28:%.*]] = sub nsw i32 [[DIV27]], 1
7067 // CHECK15-NEXT: store i32 [[SUB28]], i32* [[DOTCAPTURE_EXPR_25]], align 4
7068 // CHECK15-NEXT: [[TMP113:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4
7069 // CHECK15-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP113]], 1
7070 // CHECK15-NEXT: [[TMP114:%.*]] = zext i32 [[ADD29]] to i64
7071 // CHECK15-NEXT: [[KERNEL_ARGS30:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
7072 // CHECK15-NEXT: [[TMP115:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS30]], i32 0, i32 0
7073 // CHECK15-NEXT: store i32 1, i32* [[TMP115]], align 4
7074 // CHECK15-NEXT: [[TMP116:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS30]], i32 0, i32 1
7075 // CHECK15-NEXT: store i32 4, i32* [[TMP116]], align 4
7076 // CHECK15-NEXT: [[TMP117:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS30]], i32 0, i32 2
7077 // CHECK15-NEXT: store i8** [[TMP108]], i8*** [[TMP117]], align 4
7078 // CHECK15-NEXT: [[TMP118:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS30]], i32 0, i32 3
7079 // CHECK15-NEXT: store i8** [[TMP109]], i8*** [[TMP118]], align 4
7080 // CHECK15-NEXT: [[TMP119:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS30]], i32 0, i32 4
7081 // CHECK15-NEXT: store i64* [[TMP110]], i64** [[TMP119]], align 4
7082 // CHECK15-NEXT: [[TMP120:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS30]], i32 0, i32 5
7083 // CHECK15-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.9, i32 0, i32 0), i64** [[TMP120]], align 4
7084 // CHECK15-NEXT: [[TMP121:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS30]], i32 0, i32 6
7085 // CHECK15-NEXT: store i8** null, i8*** [[TMP121]], align 4
7086 // CHECK15-NEXT: [[TMP122:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS30]], i32 0, i32 7
7087 // CHECK15-NEXT: store i8** null, i8*** [[TMP122]], align 4
7088 // CHECK15-NEXT: [[TMP123:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS30]], i32 0, i32 8
7089 // CHECK15-NEXT: store i64 [[TMP114]], i64* [[TMP123]], align 8
7090 // CHECK15-NEXT: [[TMP124:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS30]])
7091 // CHECK15-NEXT: [[TMP125:%.*]] = icmp ne i32 [[TMP124]], 0
7092 // CHECK15-NEXT: br i1 [[TMP125]], label [[OMP_OFFLOAD_FAILED31:%.*]], label [[OMP_OFFLOAD_CONT32:%.*]]
7093 // CHECK15: omp_offload.failed31:
7094 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i32 [[TMP81]], i32 [[TMP83]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
7095 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT32]]
7096 // CHECK15: omp_offload.cont32:
7097 // CHECK15-NEXT: [[TMP126:%.*]] = load i32, i32* [[N]], align 4
7098 // CHECK15-NEXT: store i32 [[TMP126]], i32* [[N_CASTED33]], align 4
7099 // CHECK15-NEXT: [[TMP127:%.*]] = load i32, i32* [[N_CASTED33]], align 4
7100 // CHECK15-NEXT: [[TMP128:%.*]] = mul nuw i32 [[TMP0]], 4
7101 // CHECK15-NEXT: [[TMP129:%.*]] = sext i32 [[TMP128]] to i64
7102 // CHECK15-NEXT: [[TMP130:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES37]] to i8*
7103 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP130]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.12 to i8*), i32 24, i1 false)
7104 // CHECK15-NEXT: [[TMP131:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 0
7105 // CHECK15-NEXT: [[TMP132:%.*]] = bitcast i8** [[TMP131]] to i32*
7106 // CHECK15-NEXT: store i32 [[TMP127]], i32* [[TMP132]], align 4
7107 // CHECK15-NEXT: [[TMP133:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS35]], i32 0, i32 0
7108 // CHECK15-NEXT: [[TMP134:%.*]] = bitcast i8** [[TMP133]] to i32*
7109 // CHECK15-NEXT: store i32 [[TMP127]], i32* [[TMP134]], align 4
7110 // CHECK15-NEXT: [[TMP135:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS36]], i32 0, i32 0
7111 // CHECK15-NEXT: store i8* null, i8** [[TMP135]], align 4
7112 // CHECK15-NEXT: [[TMP136:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 1
7113 // CHECK15-NEXT: [[TMP137:%.*]] = bitcast i8** [[TMP136]] to i32*
7114 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP137]], align 4
7115 // CHECK15-NEXT: [[TMP138:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS35]], i32 0, i32 1
7116 // CHECK15-NEXT: [[TMP139:%.*]] = bitcast i8** [[TMP138]] to i32*
7117 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP139]], align 4
7118 // CHECK15-NEXT: [[TMP140:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS36]], i32 0, i32 1
7119 // CHECK15-NEXT: store i8* null, i8** [[TMP140]], align 4
7120 // CHECK15-NEXT: [[TMP141:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 2
7121 // CHECK15-NEXT: [[TMP142:%.*]] = bitcast i8** [[TMP141]] to i32**
7122 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP142]], align 4
7123 // CHECK15-NEXT: [[TMP143:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS35]], i32 0, i32 2
7124 // CHECK15-NEXT: [[TMP144:%.*]] = bitcast i8** [[TMP143]] to i32**
7125 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP144]], align 4
7126 // CHECK15-NEXT: [[TMP145:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES37]], i32 0, i32 2
7127 // CHECK15-NEXT: store i64 [[TMP129]], i64* [[TMP145]], align 4
7128 // CHECK15-NEXT: [[TMP146:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS36]], i32 0, i32 2
7129 // CHECK15-NEXT: store i8* null, i8** [[TMP146]], align 4
7130 // CHECK15-NEXT: [[TMP147:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 0
7131 // CHECK15-NEXT: [[TMP148:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS35]], i32 0, i32 0
7132 // CHECK15-NEXT: [[TMP149:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES37]], i32 0, i32 0
7133 // CHECK15-NEXT: [[TMP150:%.*]] = load i32, i32* [[N]], align 4
7134 // CHECK15-NEXT: store i32 [[TMP150]], i32* [[DOTCAPTURE_EXPR_39]], align 4
7135 // CHECK15-NEXT: [[TMP151:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_39]], align 4
7136 // CHECK15-NEXT: [[SUB41:%.*]] = sub nsw i32 [[TMP151]], 0
7137 // CHECK15-NEXT: [[DIV42:%.*]] = sdiv i32 [[SUB41]], 1
7138 // CHECK15-NEXT: [[SUB43:%.*]] = sub nsw i32 [[DIV42]], 1
7139 // CHECK15-NEXT: store i32 [[SUB43]], i32* [[DOTCAPTURE_EXPR_40]], align 4
7140 // CHECK15-NEXT: [[TMP152:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_40]], align 4
7141 // CHECK15-NEXT: [[ADD44:%.*]] = add nsw i32 [[TMP152]], 1
7142 // CHECK15-NEXT: [[TMP153:%.*]] = zext i32 [[ADD44]] to i64
7143 // CHECK15-NEXT: [[KERNEL_ARGS45:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
7144 // CHECK15-NEXT: [[TMP154:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS45]], i32 0, i32 0
7145 // CHECK15-NEXT: store i32 1, i32* [[TMP154]], align 4
7146 // CHECK15-NEXT: [[TMP155:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS45]], i32 0, i32 1
7147 // CHECK15-NEXT: store i32 3, i32* [[TMP155]], align 4
7148 // CHECK15-NEXT: [[TMP156:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS45]], i32 0, i32 2
7149 // CHECK15-NEXT: store i8** [[TMP147]], i8*** [[TMP156]], align 4
7150 // CHECK15-NEXT: [[TMP157:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS45]], i32 0, i32 3
7151 // CHECK15-NEXT: store i8** [[TMP148]], i8*** [[TMP157]], align 4
7152 // CHECK15-NEXT: [[TMP158:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS45]], i32 0, i32 4
7153 // CHECK15-NEXT: store i64* [[TMP149]], i64** [[TMP158]], align 4
7154 // CHECK15-NEXT: [[TMP159:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS45]], i32 0, i32 5
7155 // CHECK15-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.13, i32 0, i32 0), i64** [[TMP159]], align 4
7156 // CHECK15-NEXT: [[TMP160:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS45]], i32 0, i32 6
7157 // CHECK15-NEXT: store i8** null, i8*** [[TMP160]], align 4
7158 // CHECK15-NEXT: [[TMP161:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS45]], i32 0, i32 7
7159 // CHECK15-NEXT: store i8** null, i8*** [[TMP161]], align 4
7160 // CHECK15-NEXT: [[TMP162:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS45]], i32 0, i32 8
7161 // CHECK15-NEXT: store i64 [[TMP153]], i64* [[TMP162]], align 8
7162 // CHECK15-NEXT: [[TMP163:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS45]])
7163 // CHECK15-NEXT: [[TMP164:%.*]] = icmp ne i32 [[TMP163]], 0
7164 // CHECK15-NEXT: br i1 [[TMP164]], label [[OMP_OFFLOAD_FAILED46:%.*]], label [[OMP_OFFLOAD_CONT47:%.*]]
7165 // CHECK15: omp_offload.failed46:
7166 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i32 [[TMP127]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
7167 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT47]]
7168 // CHECK15: omp_offload.cont47:
7169 // CHECK15-NEXT: [[TMP165:%.*]] = load i32, i32* [[M]], align 4
7170 // CHECK15-NEXT: store i32 [[TMP165]], i32* [[M_CASTED48]], align 4
7171 // CHECK15-NEXT: [[TMP166:%.*]] = load i32, i32* [[M_CASTED48]], align 4
7172 // CHECK15-NEXT: [[TMP167:%.*]] = load i32, i32* [[N]], align 4
7173 // CHECK15-NEXT: store i32 [[TMP167]], i32* [[N_CASTED49]], align 4
7174 // CHECK15-NEXT: [[TMP168:%.*]] = load i32, i32* [[N_CASTED49]], align 4
7175 // CHECK15-NEXT: [[TMP169:%.*]] = mul nuw i32 [[TMP0]], 4
7176 // CHECK15-NEXT: [[TMP170:%.*]] = sext i32 [[TMP169]] to i64
7177 // CHECK15-NEXT: [[TMP171:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES53]] to i8*
7178 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP171]], i8* align 4 bitcast ([4 x i64]* @.offload_sizes.16 to i8*), i32 32, i1 false)
7179 // CHECK15-NEXT: [[TMP172:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 0
7180 // CHECK15-NEXT: [[TMP173:%.*]] = bitcast i8** [[TMP172]] to i32*
7181 // CHECK15-NEXT: store i32 [[TMP166]], i32* [[TMP173]], align 4
7182 // CHECK15-NEXT: [[TMP174:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 0
7183 // CHECK15-NEXT: [[TMP175:%.*]] = bitcast i8** [[TMP174]] to i32*
7184 // CHECK15-NEXT: store i32 [[TMP166]], i32* [[TMP175]], align 4
7185 // CHECK15-NEXT: [[TMP176:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS52]], i32 0, i32 0
7186 // CHECK15-NEXT: store i8* null, i8** [[TMP176]], align 4
7187 // CHECK15-NEXT: [[TMP177:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 1
7188 // CHECK15-NEXT: [[TMP178:%.*]] = bitcast i8** [[TMP177]] to i32*
7189 // CHECK15-NEXT: store i32 [[TMP168]], i32* [[TMP178]], align 4
7190 // CHECK15-NEXT: [[TMP179:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 1
7191 // CHECK15-NEXT: [[TMP180:%.*]] = bitcast i8** [[TMP179]] to i32*
7192 // CHECK15-NEXT: store i32 [[TMP168]], i32* [[TMP180]], align 4
7193 // CHECK15-NEXT: [[TMP181:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS52]], i32 0, i32 1
7194 // CHECK15-NEXT: store i8* null, i8** [[TMP181]], align 4
7195 // CHECK15-NEXT: [[TMP182:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 2
7196 // CHECK15-NEXT: [[TMP183:%.*]] = bitcast i8** [[TMP182]] to i32*
7197 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP183]], align 4
7198 // CHECK15-NEXT: [[TMP184:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 2
7199 // CHECK15-NEXT: [[TMP185:%.*]] = bitcast i8** [[TMP184]] to i32*
7200 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP185]], align 4
7201 // CHECK15-NEXT: [[TMP186:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS52]], i32 0, i32 2
7202 // CHECK15-NEXT: store i8* null, i8** [[TMP186]], align 4
7203 // CHECK15-NEXT: [[TMP187:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 3
7204 // CHECK15-NEXT: [[TMP188:%.*]] = bitcast i8** [[TMP187]] to i32**
7205 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP188]], align 4
7206 // CHECK15-NEXT: [[TMP189:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 3
7207 // CHECK15-NEXT: [[TMP190:%.*]] = bitcast i8** [[TMP189]] to i32**
7208 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP190]], align 4
7209 // CHECK15-NEXT: [[TMP191:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES53]], i32 0, i32 3
7210 // CHECK15-NEXT: store i64 [[TMP170]], i64* [[TMP191]], align 4
7211 // CHECK15-NEXT: [[TMP192:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS52]], i32 0, i32 3
7212 // CHECK15-NEXT: store i8* null, i8** [[TMP192]], align 4
7213 // CHECK15-NEXT: [[TMP193:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 0
7214 // CHECK15-NEXT: [[TMP194:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 0
7215 // CHECK15-NEXT: [[TMP195:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES53]], i32 0, i32 0
7216 // CHECK15-NEXT: [[TMP196:%.*]] = load i32, i32* [[N]], align 4
7217 // CHECK15-NEXT: store i32 [[TMP196]], i32* [[DOTCAPTURE_EXPR_55]], align 4
7218 // CHECK15-NEXT: [[TMP197:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_55]], align 4
7219 // CHECK15-NEXT: [[SUB57:%.*]] = sub nsw i32 [[TMP197]], 0
7220 // CHECK15-NEXT: [[DIV58:%.*]] = sdiv i32 [[SUB57]], 1
7221 // CHECK15-NEXT: [[SUB59:%.*]] = sub nsw i32 [[DIV58]], 1
7222 // CHECK15-NEXT: store i32 [[SUB59]], i32* [[DOTCAPTURE_EXPR_56]], align 4
7223 // CHECK15-NEXT: [[TMP198:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_56]], align 4
7224 // CHECK15-NEXT: [[ADD60:%.*]] = add nsw i32 [[TMP198]], 1
7225 // CHECK15-NEXT: [[TMP199:%.*]] = zext i32 [[ADD60]] to i64
7226 // CHECK15-NEXT: [[KERNEL_ARGS61:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
7227 // CHECK15-NEXT: [[TMP200:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS61]], i32 0, i32 0
7228 // CHECK15-NEXT: store i32 1, i32* [[TMP200]], align 4
7229 // CHECK15-NEXT: [[TMP201:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS61]], i32 0, i32 1
7230 // CHECK15-NEXT: store i32 4, i32* [[TMP201]], align 4
7231 // CHECK15-NEXT: [[TMP202:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS61]], i32 0, i32 2
7232 // CHECK15-NEXT: store i8** [[TMP193]], i8*** [[TMP202]], align 4
7233 // CHECK15-NEXT: [[TMP203:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS61]], i32 0, i32 3
7234 // CHECK15-NEXT: store i8** [[TMP194]], i8*** [[TMP203]], align 4
7235 // CHECK15-NEXT: [[TMP204:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS61]], i32 0, i32 4
7236 // CHECK15-NEXT: store i64* [[TMP195]], i64** [[TMP204]], align 4
7237 // CHECK15-NEXT: [[TMP205:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS61]], i32 0, i32 5
7238 // CHECK15-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.17, i32 0, i32 0), i64** [[TMP205]], align 4
7239 // CHECK15-NEXT: [[TMP206:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS61]], i32 0, i32 6
7240 // CHECK15-NEXT: store i8** null, i8*** [[TMP206]], align 4
7241 // CHECK15-NEXT: [[TMP207:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS61]], i32 0, i32 7
7242 // CHECK15-NEXT: store i8** null, i8*** [[TMP207]], align 4
7243 // CHECK15-NEXT: [[TMP208:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS61]], i32 0, i32 8
7244 // CHECK15-NEXT: store i64 [[TMP199]], i64* [[TMP208]], align 8
7245 // CHECK15-NEXT: [[TMP209:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS61]])
7246 // CHECK15-NEXT: [[TMP210:%.*]] = icmp ne i32 [[TMP209]], 0
7247 // CHECK15-NEXT: br i1 [[TMP210]], label [[OMP_OFFLOAD_FAILED62:%.*]], label [[OMP_OFFLOAD_CONT63:%.*]]
7248 // CHECK15: omp_offload.failed62:
7249 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i32 [[TMP166]], i32 [[TMP168]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
7250 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT63]]
7251 // CHECK15: omp_offload.cont63:
7252 // CHECK15-NEXT: [[TMP211:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
7253 // CHECK15-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP211]])
7254 // CHECK15-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
7255 // CHECK15-NEXT: [[TMP212:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
7256 // CHECK15-NEXT: call void @llvm.stackrestore(i8* [[TMP212]])
7257 // CHECK15-NEXT: [[TMP213:%.*]] = load i32, i32* [[RETVAL]], align 4
7258 // CHECK15-NEXT: ret i32 [[TMP213]]
7259 //
7260 //
7261 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148
7262 // CHECK15-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
7263 // CHECK15-NEXT: entry:
7264 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
7265 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
7266 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
7267 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
7268 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
7269 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
7270 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
7271 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
7272 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
7273 // CHECK15-NEXT: ret void
7274 //
7275 //
7276 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined.
7277 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
7278 // CHECK15-NEXT: entry:
7279 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7280 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7281 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
7282 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
7283 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
7284 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7285 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
7286 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
7287 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7288 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
7289 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7290 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7291 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7292 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7293 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4
7294 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7295 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7296 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
7297 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
7298 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
7299 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
7300 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
7301 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
7302 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
7303 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
7304 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7305 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
7306 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7307 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
7308 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
7309 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
7310 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7311 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
7312 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
7313 // CHECK15: omp.precond.then:
7314 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7315 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7316 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
7317 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7318 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7319 // CHECK15-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7320 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
7321 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7322 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7323 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7324 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
7325 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7326 // CHECK15: cond.true:
7327 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7328 // CHECK15-NEXT: br label [[COND_END:%.*]]
7329 // CHECK15: cond.false:
7330 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7331 // CHECK15-NEXT: br label [[COND_END]]
7332 // CHECK15: cond.end:
7333 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
7334 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7335 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7336 // CHECK15-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
7337 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7338 // CHECK15: omp.inner.for.cond:
7339 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7340 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7341 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
7342 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7343 // CHECK15: omp.inner.for.body:
7344 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7345 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7346 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])
7347 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7348 // CHECK15: omp.inner.for.inc:
7349 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7350 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7351 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
7352 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
7353 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
7354 // CHECK15: omp.inner.for.end:
7355 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7356 // CHECK15: omp.loop.exit:
7357 // CHECK15-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7358 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
7359 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
7360 // CHECK15-NEXT: br label [[OMP_PRECOND_END]]
7361 // CHECK15: omp.precond.end:
7362 // CHECK15-NEXT: ret void
7363 //
7364 //
7365 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..1
7366 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
7367 // CHECK15-NEXT: entry:
7368 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7369 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7370 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
7371 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
7372 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
7373 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
7374 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
7375 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7376 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
7377 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
7378 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7379 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
7380 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7381 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7382 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7383 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7384 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4
7385 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7386 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7387 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7388 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7389 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
7390 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
7391 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
7392 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
7393 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
7394 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
7395 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
7396 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
7397 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7398 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
7399 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7400 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
7401 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
7402 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
7403 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7404 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
7405 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
7406 // CHECK15: omp.precond.then:
7407 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7408 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7409 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
7410 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7411 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7412 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
7413 // CHECK15-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
7414 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7415 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7416 // CHECK15-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7417 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
7418 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7419 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7420 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7421 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
7422 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7423 // CHECK15: cond.true:
7424 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7425 // CHECK15-NEXT: br label [[COND_END:%.*]]
7426 // CHECK15: cond.false:
7427 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7428 // CHECK15-NEXT: br label [[COND_END]]
7429 // CHECK15: cond.end:
7430 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
7431 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7432 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7433 // CHECK15-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
7434 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7435 // CHECK15: omp.inner.for.cond:
7436 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7437 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7438 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
7439 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7440 // CHECK15: omp.inner.for.body:
7441 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7442 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
7443 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7444 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
7445 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
7446 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
7447 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
7448 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7449 // CHECK15: omp.body.continue:
7450 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7451 // CHECK15: omp.inner.for.inc:
7452 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7453 // CHECK15-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1
7454 // CHECK15-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
7455 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
7456 // CHECK15: omp.inner.for.end:
7457 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7458 // CHECK15: omp.loop.exit:
7459 // CHECK15-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7460 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
7461 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
7462 // CHECK15-NEXT: br label [[OMP_PRECOND_END]]
7463 // CHECK15: omp.precond.end:
7464 // CHECK15-NEXT: ret void
7465 //
7466 //
7467 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153
7468 // CHECK15-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
7469 // CHECK15-NEXT: entry:
7470 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
7471 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
7472 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
7473 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
7474 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
7475 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
7476 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
7477 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
7478 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
7479 // CHECK15-NEXT: ret void
7480 //
7481 //
7482 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..2
7483 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
7484 // CHECK15-NEXT: entry:
7485 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7486 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7487 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
7488 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
7489 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
7490 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7491 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
7492 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
7493 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7494 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
7495 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7496 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7497 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7498 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7499 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4
7500 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7501 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7502 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
7503 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
7504 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
7505 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
7506 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
7507 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
7508 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
7509 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
7510 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7511 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
7512 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7513 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
7514 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
7515 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
7516 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7517 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
7518 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
7519 // CHECK15: omp.precond.then:
7520 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7521 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7522 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
7523 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7524 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7525 // CHECK15-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7526 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
7527 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7528 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7529 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7530 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
7531 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7532 // CHECK15: cond.true:
7533 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7534 // CHECK15-NEXT: br label [[COND_END:%.*]]
7535 // CHECK15: cond.false:
7536 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7537 // CHECK15-NEXT: br label [[COND_END]]
7538 // CHECK15: cond.end:
7539 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
7540 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7541 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7542 // CHECK15-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
7543 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7544 // CHECK15: omp.inner.for.cond:
7545 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7546 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7547 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
7548 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7549 // CHECK15: omp.inner.for.body:
7550 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7551 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7552 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])
7553 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7554 // CHECK15: omp.inner.for.inc:
7555 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7556 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7557 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
7558 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
7559 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
7560 // CHECK15: omp.inner.for.end:
7561 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7562 // CHECK15: omp.loop.exit:
7563 // CHECK15-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7564 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
7565 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
7566 // CHECK15-NEXT: br label [[OMP_PRECOND_END]]
7567 // CHECK15: omp.precond.end:
7568 // CHECK15-NEXT: ret void
7569 //
7570 //
7571 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..3
7572 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
7573 // CHECK15-NEXT: entry:
7574 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7575 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7576 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
7577 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
7578 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
7579 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
7580 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
7581 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7582 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
7583 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
7584 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7585 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
7586 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7587 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7588 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7589 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7590 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4
7591 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7592 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7593 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7594 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7595 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
7596 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
7597 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
7598 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
7599 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
7600 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
7601 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
7602 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
7603 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7604 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
7605 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7606 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
7607 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
7608 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
7609 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7610 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
7611 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
7612 // CHECK15: omp.precond.then:
7613 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7614 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7615 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
7616 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7617 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7618 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
7619 // CHECK15-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
7620 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7621 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7622 // CHECK15-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7623 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
7624 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7625 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7626 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7627 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
7628 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7629 // CHECK15: cond.true:
7630 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7631 // CHECK15-NEXT: br label [[COND_END:%.*]]
7632 // CHECK15: cond.false:
7633 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7634 // CHECK15-NEXT: br label [[COND_END]]
7635 // CHECK15: cond.end:
7636 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
7637 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7638 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7639 // CHECK15-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
7640 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7641 // CHECK15: omp.inner.for.cond:
7642 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7643 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7644 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
7645 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7646 // CHECK15: omp.inner.for.body:
7647 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7648 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
7649 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7650 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
7651 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
7652 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
7653 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
7654 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7655 // CHECK15: omp.body.continue:
7656 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7657 // CHECK15: omp.inner.for.inc:
7658 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7659 // CHECK15-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1
7660 // CHECK15-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
7661 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
7662 // CHECK15: omp.inner.for.end:
7663 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7664 // CHECK15: omp.loop.exit:
7665 // CHECK15-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7666 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
7667 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
7668 // CHECK15-NEXT: br label [[OMP_PRECOND_END]]
7669 // CHECK15: omp.precond.end:
7670 // CHECK15-NEXT: ret void
7671 //
7672 //
7673 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158
7674 // CHECK15-SAME: (i32 noundef [[M:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
7675 // CHECK15-NEXT: entry:
7676 // CHECK15-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
7677 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
7678 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
7679 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
7680 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
7681 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
7682 // CHECK15-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4
7683 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
7684 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
7685 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
7686 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
7687 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
7688 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4
7689 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
7690 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7691 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
7692 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
7693 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]])
7694 // CHECK15-NEXT: ret void
7695 //
7696 //
7697 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..6
7698 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
7699 // CHECK15-NEXT: entry:
7700 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7701 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7702 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
7703 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
7704 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
7705 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
7706 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7707 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
7708 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7709 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
7710 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
7711 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7712 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7713 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7714 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7715 // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4
7716 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
7717 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7718 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7719 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
7720 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
7721 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
7722 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
7723 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
7724 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
7725 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
7726 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
7727 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
7728 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7729 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
7730 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7731 // CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
7732 // CHECK15-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
7733 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
7734 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7735 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
7736 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
7737 // CHECK15: omp.precond.then:
7738 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7739 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
7740 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
7741 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7742 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7743 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
7744 // CHECK15-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7745 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
7746 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])
7747 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7748 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
7749 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
7750 // CHECK15-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7751 // CHECK15: cond.true:
7752 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
7753 // CHECK15-NEXT: br label [[COND_END:%.*]]
7754 // CHECK15: cond.false:
7755 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7756 // CHECK15-NEXT: br label [[COND_END]]
7757 // CHECK15: cond.end:
7758 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
7759 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7760 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7761 // CHECK15-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
7762 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7763 // CHECK15: omp.inner.for.cond:
7764 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7765 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
7766 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1
7767 // CHECK15-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]]
7768 // CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7769 // CHECK15: omp.inner.for.body:
7770 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7771 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7772 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
7773 // CHECK15-NEXT: store i32 [[TMP19]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
7774 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
7775 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP20]])
7776 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7777 // CHECK15: omp.inner.for.inc:
7778 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7779 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7780 // CHECK15-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
7781 // CHECK15-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
7782 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7783 // CHECK15-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7784 // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
7785 // CHECK15-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
7786 // CHECK15-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7787 // CHECK15-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7788 // CHECK15-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]
7789 // CHECK15-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
7790 // CHECK15-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7791 // CHECK15-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
7792 // CHECK15-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP27]], [[TMP28]]
7793 // CHECK15-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
7794 // CHECK15: cond.true11:
7795 // CHECK15-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
7796 // CHECK15-NEXT: br label [[COND_END13:%.*]]
7797 // CHECK15: cond.false12:
7798 // CHECK15-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7799 // CHECK15-NEXT: br label [[COND_END13]]
7800 // CHECK15: cond.end13:
7801 // CHECK15-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP29]], [[COND_TRUE11]] ], [ [[TMP30]], [[COND_FALSE12]] ]
7802 // CHECK15-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
7803 // CHECK15-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7804 // CHECK15-NEXT: store i32 [[TMP31]], i32* [[DOTOMP_IV]], align 4
7805 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
7806 // CHECK15: omp.inner.for.end:
7807 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7808 // CHECK15: omp.loop.exit:
7809 // CHECK15-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7810 // CHECK15-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4
7811 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]])
7812 // CHECK15-NEXT: br label [[OMP_PRECOND_END]]
7813 // CHECK15: omp.precond.end:
7814 // CHECK15-NEXT: ret void
7815 //
7816 //
7817 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..7
7818 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
7819 // CHECK15-NEXT: entry:
7820 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7821 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7822 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
7823 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
7824 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
7825 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
7826 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
7827 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
7828 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7829 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
7830 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7831 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
7832 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
7833 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
7834 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
7835 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7836 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7837 // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4
7838 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7839 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7840 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7841 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7842 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
7843 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
7844 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
7845 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
7846 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
7847 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
7848 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
7849 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
7850 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
7851 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7852 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
7853 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7854 // CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
7855 // CHECK15-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
7856 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
7857 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7858 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
7859 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
7860 // CHECK15: omp.precond.then:
7861 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
7862 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
7863 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
7864 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7865 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7866 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
7867 // CHECK15-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
7868 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7869 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7870 // CHECK15-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7871 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
7872 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7873 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7874 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
7875 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
7876 // CHECK15-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7877 // CHECK15: cond.true:
7878 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
7879 // CHECK15-NEXT: br label [[COND_END:%.*]]
7880 // CHECK15: cond.false:
7881 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7882 // CHECK15-NEXT: br label [[COND_END]]
7883 // CHECK15: cond.end:
7884 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
7885 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7886 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7887 // CHECK15-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
7888 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7889 // CHECK15: omp.inner.for.cond:
7890 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7891 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7892 // CHECK15-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
7893 // CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7894 // CHECK15: omp.inner.for.body:
7895 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7896 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
7897 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7898 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I4]], align 4
7899 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4
7900 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
7901 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
7902 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
7903 // CHECK15: omp.body.continue:
7904 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
7905 // CHECK15: omp.inner.for.inc:
7906 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7907 // CHECK15-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
7908 // CHECK15-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
7909 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
7910 // CHECK15: omp.inner.for.end:
7911 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
7912 // CHECK15: omp.loop.exit:
7913 // CHECK15-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7914 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
7915 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
7916 // CHECK15-NEXT: br label [[OMP_PRECOND_END]]
7917 // CHECK15: omp.precond.end:
7918 // CHECK15-NEXT: ret void
7919 //
7920 //
7921 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163
7922 // CHECK15-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
7923 // CHECK15-NEXT: entry:
7924 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
7925 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
7926 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
7927 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
7928 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
7929 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
7930 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
7931 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
7932 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
7933 // CHECK15-NEXT: ret void
7934 //
7935 //
7936 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..10
7937 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
7938 // CHECK15-NEXT: entry:
7939 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7940 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7941 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
7942 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
7943 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
7944 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
7945 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
7946 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
7947 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7948 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
7949 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7950 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7951 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7952 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7953 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4
7954 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7955 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7956 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
7957 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
7958 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
7959 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
7960 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
7961 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
7962 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
7963 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
7964 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7965 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
7966 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7967 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
7968 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
7969 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
7970 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7971 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
7972 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
7973 // CHECK15: omp.precond.then:
7974 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7975 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7976 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
7977 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7978 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7979 // CHECK15-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7980 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
7981 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7982 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7983 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7984 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
7985 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7986 // CHECK15: cond.true:
7987 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7988 // CHECK15-NEXT: br label [[COND_END:%.*]]
7989 // CHECK15: cond.false:
7990 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7991 // CHECK15-NEXT: br label [[COND_END]]
7992 // CHECK15: cond.end:
7993 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
7994 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7995 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7996 // CHECK15-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
7997 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
7998 // CHECK15: omp.inner.for.cond:
7999 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8000 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8001 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
8002 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8003 // CHECK15: omp.inner.for.body:
8004 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8005 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8006 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])
8007 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8008 // CHECK15: omp.inner.for.inc:
8009 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8010 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8011 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
8012 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
8013 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
8014 // CHECK15: omp.inner.for.end:
8015 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8016 // CHECK15: omp.loop.exit:
8017 // CHECK15-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8018 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
8019 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
8020 // CHECK15-NEXT: br label [[OMP_PRECOND_END]]
8021 // CHECK15: omp.precond.end:
8022 // CHECK15-NEXT: ret void
8023 //
8024 //
8025 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..11
8026 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
8027 // CHECK15-NEXT: entry:
8028 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8029 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8030 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
8031 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
8032 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
8033 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
8034 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
8035 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8036 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
8037 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8038 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8039 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
8040 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8041 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8042 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8043 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8044 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4
8045 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8046 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8047 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
8048 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8049 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
8050 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
8051 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
8052 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
8053 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
8054 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
8055 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
8056 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
8057 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8058 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
8059 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8060 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
8061 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8062 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
8063 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8064 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
8065 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8066 // CHECK15: omp.precond.then:
8067 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8068 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8069 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
8070 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
8071 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8072 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
8073 // CHECK15-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
8074 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8075 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8076 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8077 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8078 // CHECK15-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8079 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
8080 // CHECK15-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1)
8081 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
8082 // CHECK15: omp.dispatch.cond:
8083 // CHECK15-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8084 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
8085 // CHECK15-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
8086 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
8087 // CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
8088 // CHECK15: omp.dispatch.body:
8089 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8090 // CHECK15-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
8091 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8092 // CHECK15: omp.inner.for.cond:
8093 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
8094 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16
8095 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
8096 // CHECK15-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8097 // CHECK15: omp.inner.for.body:
8098 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
8099 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
8100 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8101 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !16
8102 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !16
8103 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP20]]
8104 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !16
8105 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8106 // CHECK15: omp.body.continue:
8107 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8108 // CHECK15: omp.inner.for.inc:
8109 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
8110 // CHECK15-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP21]], 1
8111 // CHECK15-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
8112 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
8113 // CHECK15: omp.inner.for.end:
8114 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
8115 // CHECK15: omp.dispatch.inc:
8116 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]]
8117 // CHECK15: omp.dispatch.end:
8118 // CHECK15-NEXT: br label [[OMP_PRECOND_END]]
8119 // CHECK15: omp.precond.end:
8120 // CHECK15-NEXT: ret void
8121 //
8122 //
8123 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168
8124 // CHECK15-SAME: (i32 noundef [[M:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
8125 // CHECK15-NEXT: entry:
8126 // CHECK15-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
8127 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
8128 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
8129 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
8130 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8131 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
8132 // CHECK15-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4
8133 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
8134 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
8135 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
8136 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
8137 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
8138 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4
8139 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
8140 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8141 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
8142 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
8143 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]])
8144 // CHECK15-NEXT: ret void
8145 //
8146 //
8147 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..14
8148 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
8149 // CHECK15-NEXT: entry:
8150 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8151 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8152 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
8153 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
8154 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
8155 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
8156 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8157 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
8158 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8159 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
8160 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
8161 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8162 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8163 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8164 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8165 // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4
8166 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
8167 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8168 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8169 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
8170 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
8171 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
8172 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
8173 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
8174 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
8175 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
8176 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
8177 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8178 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8179 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
8180 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8181 // CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
8182 // CHECK15-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
8183 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
8184 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8185 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
8186 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8187 // CHECK15: omp.precond.then:
8188 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8189 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8190 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
8191 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8192 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8193 // CHECK15-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8194 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
8195 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8196 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8197 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8198 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
8199 // CHECK15-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8200 // CHECK15: cond.true:
8201 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8202 // CHECK15-NEXT: br label [[COND_END:%.*]]
8203 // CHECK15: cond.false:
8204 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8205 // CHECK15-NEXT: br label [[COND_END]]
8206 // CHECK15: cond.end:
8207 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
8208 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8209 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8210 // CHECK15-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
8211 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8212 // CHECK15: omp.inner.for.cond:
8213 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8214 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8215 // CHECK15-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
8216 // CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8217 // CHECK15: omp.inner.for.body:
8218 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8219 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8220 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
8221 // CHECK15-NEXT: store i32 [[TMP18]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
8222 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
8223 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP19]])
8224 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8225 // CHECK15: omp.inner.for.inc:
8226 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8227 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8228 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
8229 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
8230 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
8231 // CHECK15: omp.inner.for.end:
8232 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8233 // CHECK15: omp.loop.exit:
8234 // CHECK15-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8235 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
8236 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
8237 // CHECK15-NEXT: br label [[OMP_PRECOND_END]]
8238 // CHECK15: omp.precond.end:
8239 // CHECK15-NEXT: ret void
8240 //
8241 //
8242 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..15
8243 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
8244 // CHECK15-NEXT: entry:
8245 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8246 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8247 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
8248 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
8249 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
8250 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
8251 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
8252 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
8253 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8254 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
8255 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8256 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
8257 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
8258 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8259 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8260 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8261 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8262 // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4
8263 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8264 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8265 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
8266 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8267 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
8268 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
8269 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
8270 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
8271 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
8272 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
8273 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
8274 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
8275 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8276 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8277 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
8278 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8279 // CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
8280 // CHECK15-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
8281 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4
8282 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8283 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
8284 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8285 // CHECK15: omp.precond.then:
8286 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8287 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8288 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
8289 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
8290 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8291 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
8292 // CHECK15-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
8293 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8294 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8295 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
8296 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8297 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8298 // CHECK15-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8299 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
8300 // CHECK15-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 1073741859, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]])
8301 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
8302 // CHECK15: omp.dispatch.cond:
8303 // CHECK15-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8304 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
8305 // CHECK15-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
8306 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0
8307 // CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
8308 // CHECK15: omp.dispatch.body:
8309 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8310 // CHECK15-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4
8311 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8312 // CHECK15: omp.inner.for.cond:
8313 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
8314 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !19
8315 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
8316 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8317 // CHECK15: omp.inner.for.body:
8318 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
8319 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
8320 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8321 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !19
8322 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !19
8323 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP21]]
8324 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !19
8325 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8326 // CHECK15: omp.body.continue:
8327 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8328 // CHECK15: omp.inner.for.inc:
8329 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
8330 // CHECK15-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP22]], 1
8331 // CHECK15-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
8332 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
8333 // CHECK15: omp.inner.for.end:
8334 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
8335 // CHECK15: omp.dispatch.inc:
8336 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]]
8337 // CHECK15: omp.dispatch.end:
8338 // CHECK15-NEXT: br label [[OMP_PRECOND_END]]
8339 // CHECK15: omp.precond.end:
8340 // CHECK15-NEXT: ret void
8341 //
8342 //
8343 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
8344 // CHECK15-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {
8345 // CHECK15-NEXT: entry:
8346 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
8347 // CHECK15-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
8348 // CHECK15-NEXT: [[M:%.*]] = alloca i32, align 4
8349 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
8350 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
8351 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
8352 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
8353 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4
8354 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4
8355 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4
8356 // CHECK15-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
8357 // CHECK15-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4
8358 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x i8*], align 4
8359 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x i8*], align 4
8360 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x i8*], align 4
8361 // CHECK15-NEXT: [[_TMP11:%.*]] = alloca i32, align 4
8362 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS15:%.*]] = alloca [1 x i8*], align 4
8363 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS16:%.*]] = alloca [1 x i8*], align 4
8364 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS17:%.*]] = alloca [1 x i8*], align 4
8365 // CHECK15-NEXT: [[_TMP18:%.*]] = alloca i32, align 4
8366 // CHECK15-NEXT: [[M_CASTED22:%.*]] = alloca i32, align 4
8367 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS23:%.*]] = alloca [2 x i8*], align 4
8368 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS24:%.*]] = alloca [2 x i8*], align 4
8369 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS25:%.*]] = alloca [2 x i8*], align 4
8370 // CHECK15-NEXT: [[_TMP26:%.*]] = alloca i32, align 4
8371 // CHECK15-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
8372 // CHECK15-NEXT: store i32 10, i32* [[M]], align 4
8373 // CHECK15-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
8374 // CHECK15-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
8375 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4
8376 // CHECK15-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
8377 // CHECK15-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
8378 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4
8379 // CHECK15-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
8380 // CHECK15-NEXT: store i8* null, i8** [[TMP4]], align 4
8381 // CHECK15-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
8382 // CHECK15-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
8383 // CHECK15-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
8384 // CHECK15-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
8385 // CHECK15-NEXT: store i32 1, i32* [[TMP7]], align 4
8386 // CHECK15-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
8387 // CHECK15-NEXT: store i32 1, i32* [[TMP8]], align 4
8388 // CHECK15-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
8389 // CHECK15-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 4
8390 // CHECK15-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
8391 // CHECK15-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 4
8392 // CHECK15-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
8393 // CHECK15-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.20, i32 0, i32 0), i64** [[TMP11]], align 4
8394 // CHECK15-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
8395 // CHECK15-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.21, i32 0, i32 0), i64** [[TMP12]], align 4
8396 // CHECK15-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
8397 // CHECK15-NEXT: store i8** null, i8*** [[TMP13]], align 4
8398 // CHECK15-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
8399 // CHECK15-NEXT: store i8** null, i8*** [[TMP14]], align 4
8400 // CHECK15-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
8401 // CHECK15-NEXT: store i64 10, i64* [[TMP15]], align 8
8402 // CHECK15-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
8403 // CHECK15-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
8404 // CHECK15-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
8405 // CHECK15: omp_offload.failed:
8406 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]]
8407 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT]]
8408 // CHECK15: omp_offload.cont:
8409 // CHECK15-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
8410 // CHECK15-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]**
8411 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 4
8412 // CHECK15-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
8413 // CHECK15-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]**
8414 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 4
8415 // CHECK15-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0
8416 // CHECK15-NEXT: store i8* null, i8** [[TMP22]], align 4
8417 // CHECK15-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
8418 // CHECK15-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
8419 // CHECK15-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
8420 // CHECK15-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 0
8421 // CHECK15-NEXT: store i32 1, i32* [[TMP25]], align 4
8422 // CHECK15-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 1
8423 // CHECK15-NEXT: store i32 1, i32* [[TMP26]], align 4
8424 // CHECK15-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 2
8425 // CHECK15-NEXT: store i8** [[TMP23]], i8*** [[TMP27]], align 4
8426 // CHECK15-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 3
8427 // CHECK15-NEXT: store i8** [[TMP24]], i8*** [[TMP28]], align 4
8428 // CHECK15-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 4
8429 // CHECK15-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.24, i32 0, i32 0), i64** [[TMP29]], align 4
8430 // CHECK15-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 5
8431 // CHECK15-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.25, i32 0, i32 0), i64** [[TMP30]], align 4
8432 // CHECK15-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 6
8433 // CHECK15-NEXT: store i8** null, i8*** [[TMP31]], align 4
8434 // CHECK15-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 7
8435 // CHECK15-NEXT: store i8** null, i8*** [[TMP32]], align 4
8436 // CHECK15-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 8
8437 // CHECK15-NEXT: store i64 10, i64* [[TMP33]], align 8
8438 // CHECK15-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]])
8439 // CHECK15-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
8440 // CHECK15-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
8441 // CHECK15: omp_offload.failed6:
8442 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121([10 x i32]* [[A]]) #[[ATTR3]]
8443 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT7]]
8444 // CHECK15: omp_offload.cont7:
8445 // CHECK15-NEXT: [[TMP36:%.*]] = load i32, i32* [[M]], align 4
8446 // CHECK15-NEXT: store i32 [[TMP36]], i32* [[M_CASTED]], align 4
8447 // CHECK15-NEXT: [[TMP37:%.*]] = load i32, i32* [[M_CASTED]], align 4
8448 // CHECK15-NEXT: [[TMP38:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
8449 // CHECK15-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i32*
8450 // CHECK15-NEXT: store i32 [[TMP37]], i32* [[TMP39]], align 4
8451 // CHECK15-NEXT: [[TMP40:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
8452 // CHECK15-NEXT: [[TMP41:%.*]] = bitcast i8** [[TMP40]] to i32*
8453 // CHECK15-NEXT: store i32 [[TMP37]], i32* [[TMP41]], align 4
8454 // CHECK15-NEXT: [[TMP42:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 0
8455 // CHECK15-NEXT: store i8* null, i8** [[TMP42]], align 4
8456 // CHECK15-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1
8457 // CHECK15-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to [10 x i32]**
8458 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP44]], align 4
8459 // CHECK15-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 1
8460 // CHECK15-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to [10 x i32]**
8461 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP46]], align 4
8462 // CHECK15-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 1
8463 // CHECK15-NEXT: store i8* null, i8** [[TMP47]], align 4
8464 // CHECK15-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
8465 // CHECK15-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
8466 // CHECK15-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
8467 // CHECK15-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 0
8468 // CHECK15-NEXT: store i32 1, i32* [[TMP50]], align 4
8469 // CHECK15-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 1
8470 // CHECK15-NEXT: store i32 2, i32* [[TMP51]], align 4
8471 // CHECK15-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 2
8472 // CHECK15-NEXT: store i8** [[TMP48]], i8*** [[TMP52]], align 4
8473 // CHECK15-NEXT: [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 3
8474 // CHECK15-NEXT: store i8** [[TMP49]], i8*** [[TMP53]], align 4
8475 // CHECK15-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 4
8476 // CHECK15-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.28, i32 0, i32 0), i64** [[TMP54]], align 4
8477 // CHECK15-NEXT: [[TMP55:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 5
8478 // CHECK15-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.29, i32 0, i32 0), i64** [[TMP55]], align 4
8479 // CHECK15-NEXT: [[TMP56:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 6
8480 // CHECK15-NEXT: store i8** null, i8*** [[TMP56]], align 4
8481 // CHECK15-NEXT: [[TMP57:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 7
8482 // CHECK15-NEXT: store i8** null, i8*** [[TMP57]], align 4
8483 // CHECK15-NEXT: [[TMP58:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 8
8484 // CHECK15-NEXT: store i64 10, i64* [[TMP58]], align 8
8485 // CHECK15-NEXT: [[TMP59:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]])
8486 // CHECK15-NEXT: [[TMP60:%.*]] = icmp ne i32 [[TMP59]], 0
8487 // CHECK15-NEXT: br i1 [[TMP60]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]]
8488 // CHECK15: omp_offload.failed13:
8489 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i32 [[TMP37]], [10 x i32]* [[A]]) #[[ATTR3]]
8490 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT14]]
8491 // CHECK15: omp_offload.cont14:
8492 // CHECK15-NEXT: [[TMP61:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0
8493 // CHECK15-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to [10 x i32]**
8494 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP62]], align 4
8495 // CHECK15-NEXT: [[TMP63:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS16]], i32 0, i32 0
8496 // CHECK15-NEXT: [[TMP64:%.*]] = bitcast i8** [[TMP63]] to [10 x i32]**
8497 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP64]], align 4
8498 // CHECK15-NEXT: [[TMP65:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS17]], i32 0, i32 0
8499 // CHECK15-NEXT: store i8* null, i8** [[TMP65]], align 4
8500 // CHECK15-NEXT: [[TMP66:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0
8501 // CHECK15-NEXT: [[TMP67:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS16]], i32 0, i32 0
8502 // CHECK15-NEXT: [[KERNEL_ARGS19:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
8503 // CHECK15-NEXT: [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 0
8504 // CHECK15-NEXT: store i32 1, i32* [[TMP68]], align 4
8505 // CHECK15-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 1
8506 // CHECK15-NEXT: store i32 1, i32* [[TMP69]], align 4
8507 // CHECK15-NEXT: [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 2
8508 // CHECK15-NEXT: store i8** [[TMP66]], i8*** [[TMP70]], align 4
8509 // CHECK15-NEXT: [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 3
8510 // CHECK15-NEXT: store i8** [[TMP67]], i8*** [[TMP71]], align 4
8511 // CHECK15-NEXT: [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 4
8512 // CHECK15-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.32, i32 0, i32 0), i64** [[TMP72]], align 4
8513 // CHECK15-NEXT: [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 5
8514 // CHECK15-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.33, i32 0, i32 0), i64** [[TMP73]], align 4
8515 // CHECK15-NEXT: [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 6
8516 // CHECK15-NEXT: store i8** null, i8*** [[TMP74]], align 4
8517 // CHECK15-NEXT: [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 7
8518 // CHECK15-NEXT: store i8** null, i8*** [[TMP75]], align 4
8519 // CHECK15-NEXT: [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 8
8520 // CHECK15-NEXT: store i64 10, i64* [[TMP76]], align 8
8521 // CHECK15-NEXT: [[TMP77:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]])
8522 // CHECK15-NEXT: [[TMP78:%.*]] = icmp ne i32 [[TMP77]], 0
8523 // CHECK15-NEXT: br i1 [[TMP78]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]]
8524 // CHECK15: omp_offload.failed20:
8525 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131([10 x i32]* [[A]]) #[[ATTR3]]
8526 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT21]]
8527 // CHECK15: omp_offload.cont21:
8528 // CHECK15-NEXT: [[TMP79:%.*]] = load i32, i32* [[M]], align 4
8529 // CHECK15-NEXT: store i32 [[TMP79]], i32* [[M_CASTED22]], align 4
8530 // CHECK15-NEXT: [[TMP80:%.*]] = load i32, i32* [[M_CASTED22]], align 4
8531 // CHECK15-NEXT: [[TMP81:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 0
8532 // CHECK15-NEXT: [[TMP82:%.*]] = bitcast i8** [[TMP81]] to i32*
8533 // CHECK15-NEXT: store i32 [[TMP80]], i32* [[TMP82]], align 4
8534 // CHECK15-NEXT: [[TMP83:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 0
8535 // CHECK15-NEXT: [[TMP84:%.*]] = bitcast i8** [[TMP83]] to i32*
8536 // CHECK15-NEXT: store i32 [[TMP80]], i32* [[TMP84]], align 4
8537 // CHECK15-NEXT: [[TMP85:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 0
8538 // CHECK15-NEXT: store i8* null, i8** [[TMP85]], align 4
8539 // CHECK15-NEXT: [[TMP86:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 1
8540 // CHECK15-NEXT: [[TMP87:%.*]] = bitcast i8** [[TMP86]] to [10 x i32]**
8541 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP87]], align 4
8542 // CHECK15-NEXT: [[TMP88:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 1
8543 // CHECK15-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to [10 x i32]**
8544 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP89]], align 4
8545 // CHECK15-NEXT: [[TMP90:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 1
8546 // CHECK15-NEXT: store i8* null, i8** [[TMP90]], align 4
8547 // CHECK15-NEXT: [[TMP91:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 0
8548 // CHECK15-NEXT: [[TMP92:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 0
8549 // CHECK15-NEXT: [[KERNEL_ARGS27:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
8550 // CHECK15-NEXT: [[TMP93:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS27]], i32 0, i32 0
8551 // CHECK15-NEXT: store i32 1, i32* [[TMP93]], align 4
8552 // CHECK15-NEXT: [[TMP94:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS27]], i32 0, i32 1
8553 // CHECK15-NEXT: store i32 2, i32* [[TMP94]], align 4
8554 // CHECK15-NEXT: [[TMP95:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS27]], i32 0, i32 2
8555 // CHECK15-NEXT: store i8** [[TMP91]], i8*** [[TMP95]], align 4
8556 // CHECK15-NEXT: [[TMP96:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS27]], i32 0, i32 3
8557 // CHECK15-NEXT: store i8** [[TMP92]], i8*** [[TMP96]], align 4
8558 // CHECK15-NEXT: [[TMP97:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS27]], i32 0, i32 4
8559 // CHECK15-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.36, i32 0, i32 0), i64** [[TMP97]], align 4
8560 // CHECK15-NEXT: [[TMP98:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS27]], i32 0, i32 5
8561 // CHECK15-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.37, i32 0, i32 0), i64** [[TMP98]], align 4
8562 // CHECK15-NEXT: [[TMP99:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS27]], i32 0, i32 6
8563 // CHECK15-NEXT: store i8** null, i8*** [[TMP99]], align 4
8564 // CHECK15-NEXT: [[TMP100:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS27]], i32 0, i32 7
8565 // CHECK15-NEXT: store i8** null, i8*** [[TMP100]], align 4
8566 // CHECK15-NEXT: [[TMP101:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS27]], i32 0, i32 8
8567 // CHECK15-NEXT: store i64 10, i64* [[TMP101]], align 8
8568 // CHECK15-NEXT: [[TMP102:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS27]])
8569 // CHECK15-NEXT: [[TMP103:%.*]] = icmp ne i32 [[TMP102]], 0
8570 // CHECK15-NEXT: br i1 [[TMP103]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]]
8571 // CHECK15: omp_offload.failed28:
8572 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i32 [[TMP80]], [10 x i32]* [[A]]) #[[ATTR3]]
8573 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT29]]
8574 // CHECK15: omp_offload.cont29:
8575 // CHECK15-NEXT: ret i32 0
8576 //
8577 //
8578 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
8579 // CHECK15-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
8580 // CHECK15-NEXT: entry:
8581 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
8582 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
8583 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
8584 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
8585 // CHECK15-NEXT: ret void
8586 //
8587 //
8588 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..18
8589 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
8590 // CHECK15-NEXT: entry:
8591 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8592 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8593 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
8594 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8595 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
8596 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8597 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8598 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8599 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8600 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
8601 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8602 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8603 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
8604 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
8605 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8606 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
8607 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8608 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8609 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8610 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
8611 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8612 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8613 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
8614 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8615 // CHECK15: cond.true:
8616 // CHECK15-NEXT: br label [[COND_END:%.*]]
8617 // CHECK15: cond.false:
8618 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8619 // CHECK15-NEXT: br label [[COND_END]]
8620 // CHECK15: cond.end:
8621 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
8622 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8623 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8624 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
8625 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8626 // CHECK15: omp.inner.for.cond:
8627 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8628 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8629 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
8630 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8631 // CHECK15: omp.inner.for.body:
8632 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8633 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8634 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..19 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
8635 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8636 // CHECK15: omp.inner.for.inc:
8637 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8638 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8639 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
8640 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
8641 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
8642 // CHECK15: omp.inner.for.end:
8643 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8644 // CHECK15: omp.loop.exit:
8645 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
8646 // CHECK15-NEXT: ret void
8647 //
8648 //
8649 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..19
8650 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
8651 // CHECK15-NEXT: entry:
8652 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8653 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8654 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
8655 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
8656 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
8657 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8658 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
8659 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8660 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8661 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8662 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8663 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
8664 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8665 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8666 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
8667 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8668 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
8669 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
8670 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8671 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
8672 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
8673 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8674 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
8675 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
8676 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8677 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8678 // CHECK15-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8679 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
8680 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8681 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8682 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
8683 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8684 // CHECK15: cond.true:
8685 // CHECK15-NEXT: br label [[COND_END:%.*]]
8686 // CHECK15: cond.false:
8687 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8688 // CHECK15-NEXT: br label [[COND_END]]
8689 // CHECK15: cond.end:
8690 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
8691 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8692 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8693 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
8694 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8695 // CHECK15: omp.inner.for.cond:
8696 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8697 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8698 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
8699 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8700 // CHECK15: omp.inner.for.body:
8701 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8702 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
8703 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8704 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4
8705 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
8706 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
8707 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
8708 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8709 // CHECK15: omp.body.continue:
8710 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8711 // CHECK15: omp.inner.for.inc:
8712 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8713 // CHECK15-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
8714 // CHECK15-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
8715 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
8716 // CHECK15: omp.inner.for.end:
8717 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8718 // CHECK15: omp.loop.exit:
8719 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
8720 // CHECK15-NEXT: ret void
8721 //
8722 //
8723 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121
8724 // CHECK15-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
8725 // CHECK15-NEXT: entry:
8726 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
8727 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
8728 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
8729 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..22 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
8730 // CHECK15-NEXT: ret void
8731 //
8732 //
8733 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..22
8734 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
8735 // CHECK15-NEXT: entry:
8736 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8737 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8738 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
8739 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8740 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
8741 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8742 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8743 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8744 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8745 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
8746 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8747 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8748 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
8749 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
8750 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8751 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
8752 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8753 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8754 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8755 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
8756 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8757 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8758 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
8759 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8760 // CHECK15: cond.true:
8761 // CHECK15-NEXT: br label [[COND_END:%.*]]
8762 // CHECK15: cond.false:
8763 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8764 // CHECK15-NEXT: br label [[COND_END]]
8765 // CHECK15: cond.end:
8766 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
8767 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8768 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8769 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
8770 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8771 // CHECK15: omp.inner.for.cond:
8772 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8773 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8774 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
8775 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8776 // CHECK15: omp.inner.for.body:
8777 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8778 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8779 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..23 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
8780 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8781 // CHECK15: omp.inner.for.inc:
8782 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8783 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8784 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
8785 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
8786 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
8787 // CHECK15: omp.inner.for.end:
8788 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8789 // CHECK15: omp.loop.exit:
8790 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
8791 // CHECK15-NEXT: ret void
8792 //
8793 //
8794 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..23
8795 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
8796 // CHECK15-NEXT: entry:
8797 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8798 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8799 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
8800 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
8801 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
8802 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8803 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
8804 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8805 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8806 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8807 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8808 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
8809 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8810 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8811 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
8812 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8813 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
8814 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
8815 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8816 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
8817 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
8818 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8819 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
8820 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
8821 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8822 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8823 // CHECK15-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8824 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
8825 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8826 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8827 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
8828 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8829 // CHECK15: cond.true:
8830 // CHECK15-NEXT: br label [[COND_END:%.*]]
8831 // CHECK15: cond.false:
8832 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8833 // CHECK15-NEXT: br label [[COND_END]]
8834 // CHECK15: cond.end:
8835 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
8836 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8837 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8838 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
8839 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8840 // CHECK15: omp.inner.for.cond:
8841 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8842 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8843 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
8844 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8845 // CHECK15: omp.inner.for.body:
8846 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8847 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
8848 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8849 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4
8850 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
8851 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
8852 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
8853 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
8854 // CHECK15: omp.body.continue:
8855 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8856 // CHECK15: omp.inner.for.inc:
8857 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8858 // CHECK15-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
8859 // CHECK15-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
8860 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
8861 // CHECK15: omp.inner.for.end:
8862 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8863 // CHECK15: omp.loop.exit:
8864 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
8865 // CHECK15-NEXT: ret void
8866 //
8867 //
8868 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126
8869 // CHECK15-SAME: (i32 noundef [[M:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
8870 // CHECK15-NEXT: entry:
8871 // CHECK15-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
8872 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
8873 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8874 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
8875 // CHECK15-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4
8876 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
8877 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
8878 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4
8879 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
8880 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8881 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
8882 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
8883 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..26 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]])
8884 // CHECK15-NEXT: ret void
8885 //
8886 //
8887 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..26
8888 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
8889 // CHECK15-NEXT: entry:
8890 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8891 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8892 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
8893 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
8894 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8895 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
8896 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8897 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8898 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8899 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8900 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
8901 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
8902 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8903 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8904 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
8905 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
8906 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
8907 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8908 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
8909 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8910 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8911 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8912 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
8913 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8914 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8915 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
8916 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8917 // CHECK15: cond.true:
8918 // CHECK15-NEXT: br label [[COND_END:%.*]]
8919 // CHECK15: cond.false:
8920 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8921 // CHECK15-NEXT: br label [[COND_END]]
8922 // CHECK15: cond.end:
8923 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
8924 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8925 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8926 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
8927 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
8928 // CHECK15: omp.inner.for.cond:
8929 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8930 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8931 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
8932 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8933 // CHECK15: omp.inner.for.body:
8934 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8935 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8936 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
8937 // CHECK15-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
8938 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
8939 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..27 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]])
8940 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
8941 // CHECK15: omp.inner.for.inc:
8942 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8943 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8944 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
8945 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
8946 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
8947 // CHECK15: omp.inner.for.end:
8948 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
8949 // CHECK15: omp.loop.exit:
8950 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
8951 // CHECK15-NEXT: ret void
8952 //
8953 //
8954 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..27
8955 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
8956 // CHECK15-NEXT: entry:
8957 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
8958 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
8959 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
8960 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
8961 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
8962 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
8963 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
8964 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
8965 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
8966 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
8967 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8968 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8969 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
8970 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
8971 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
8972 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
8973 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8974 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
8975 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
8976 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
8977 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
8978 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
8979 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
8980 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8981 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
8982 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
8983 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8984 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8985 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
8986 // CHECK15-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
8987 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
8988 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
8989 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
8990 // CHECK15: omp.dispatch.cond:
8991 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8992 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8993 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]]
8994 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8995 // CHECK15: cond.true:
8996 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
8997 // CHECK15-NEXT: br label [[COND_END:%.*]]
8998 // CHECK15: cond.false:
8999 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9000 // CHECK15-NEXT: br label [[COND_END]]
9001 // CHECK15: cond.end:
9002 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP8]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
9003 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9004 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9005 // CHECK15-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
9006 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9007 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9008 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
9009 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
9010 // CHECK15: omp.dispatch.body:
9011 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9012 // CHECK15: omp.inner.for.cond:
9013 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9014 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9015 // CHECK15-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
9016 // CHECK15-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9017 // CHECK15: omp.inner.for.body:
9018 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9019 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
9020 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9021 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4
9022 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4
9023 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP16]]
9024 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
9025 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9026 // CHECK15: omp.body.continue:
9027 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9028 // CHECK15: omp.inner.for.inc:
9029 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9030 // CHECK15-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1
9031 // CHECK15-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
9032 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
9033 // CHECK15: omp.inner.for.end:
9034 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
9035 // CHECK15: omp.dispatch.inc:
9036 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9037 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9038 // CHECK15-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
9039 // CHECK15-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
9040 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9041 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9042 // CHECK15-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
9043 // CHECK15-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
9044 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]]
9045 // CHECK15: omp.dispatch.end:
9046 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
9047 // CHECK15-NEXT: ret void
9048 //
9049 //
9050 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131
9051 // CHECK15-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9052 // CHECK15-NEXT: entry:
9053 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
9054 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
9055 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
9056 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..30 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
9057 // CHECK15-NEXT: ret void
9058 //
9059 //
9060 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..30
9061 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9062 // CHECK15-NEXT: entry:
9063 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
9064 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
9065 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
9066 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9067 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
9068 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9069 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9070 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9071 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9072 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
9073 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
9074 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
9075 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
9076 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
9077 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9078 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
9079 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9080 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9081 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
9082 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
9083 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9084 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9085 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
9086 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9087 // CHECK15: cond.true:
9088 // CHECK15-NEXT: br label [[COND_END:%.*]]
9089 // CHECK15: cond.false:
9090 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9091 // CHECK15-NEXT: br label [[COND_END]]
9092 // CHECK15: cond.end:
9093 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
9094 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9095 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9096 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
9097 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9098 // CHECK15: omp.inner.for.cond:
9099 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9100 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9101 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
9102 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9103 // CHECK15: omp.inner.for.body:
9104 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9105 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9106 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..31 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
9107 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9108 // CHECK15: omp.inner.for.inc:
9109 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9110 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9111 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
9112 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
9113 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
9114 // CHECK15: omp.inner.for.end:
9115 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9116 // CHECK15: omp.loop.exit:
9117 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
9118 // CHECK15-NEXT: ret void
9119 //
9120 //
9121 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..31
9122 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9123 // CHECK15-NEXT: entry:
9124 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
9125 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
9126 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
9127 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
9128 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
9129 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9130 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
9131 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9132 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9133 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9134 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9135 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
9136 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
9137 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
9138 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
9139 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
9140 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
9141 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
9142 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9143 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
9144 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
9145 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
9146 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
9147 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
9148 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9149 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9150 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9151 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9152 // CHECK15-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
9153 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
9154 // CHECK15-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
9155 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
9156 // CHECK15: omp.dispatch.cond:
9157 // CHECK15-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
9158 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
9159 // CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
9160 // CHECK15: omp.dispatch.body:
9161 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9162 // CHECK15-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
9163 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9164 // CHECK15: omp.inner.for.cond:
9165 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
9166 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22
9167 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
9168 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9169 // CHECK15: omp.inner.for.body:
9170 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
9171 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
9172 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9173 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22
9174 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !22
9175 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP12]]
9176 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !22
9177 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9178 // CHECK15: omp.body.continue:
9179 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9180 // CHECK15: omp.inner.for.inc:
9181 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
9182 // CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
9183 // CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
9184 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
9185 // CHECK15: omp.inner.for.end:
9186 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
9187 // CHECK15: omp.dispatch.inc:
9188 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]]
9189 // CHECK15: omp.dispatch.end:
9190 // CHECK15-NEXT: ret void
9191 //
9192 //
9193 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136
9194 // CHECK15-SAME: (i32 noundef [[M:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9195 // CHECK15-NEXT: entry:
9196 // CHECK15-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
9197 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
9198 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
9199 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
9200 // CHECK15-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4
9201 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
9202 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
9203 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4
9204 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
9205 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9206 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
9207 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
9208 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..34 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]])
9209 // CHECK15-NEXT: ret void
9210 //
9211 //
9212 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..34
9213 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
9214 // CHECK15-NEXT: entry:
9215 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
9216 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
9217 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
9218 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
9219 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9220 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
9221 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9222 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9223 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9224 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9225 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
9226 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
9227 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
9228 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
9229 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
9230 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
9231 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
9232 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9233 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
9234 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9235 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9236 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
9237 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
9238 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9239 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9240 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
9241 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9242 // CHECK15: cond.true:
9243 // CHECK15-NEXT: br label [[COND_END:%.*]]
9244 // CHECK15: cond.false:
9245 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9246 // CHECK15-NEXT: br label [[COND_END]]
9247 // CHECK15: cond.end:
9248 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
9249 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9250 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9251 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
9252 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9253 // CHECK15: omp.inner.for.cond:
9254 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9255 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9256 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
9257 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9258 // CHECK15: omp.inner.for.body:
9259 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9260 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9261 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
9262 // CHECK15-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
9263 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
9264 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..35 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]])
9265 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9266 // CHECK15: omp.inner.for.inc:
9267 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9268 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9269 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
9270 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
9271 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]]
9272 // CHECK15: omp.inner.for.end:
9273 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9274 // CHECK15: omp.loop.exit:
9275 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
9276 // CHECK15-NEXT: ret void
9277 //
9278 //
9279 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..35
9280 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
9281 // CHECK15-NEXT: entry:
9282 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
9283 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
9284 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
9285 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
9286 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
9287 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
9288 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9289 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4
9290 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9291 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9292 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9293 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9294 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
9295 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
9296 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
9297 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
9298 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
9299 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
9300 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
9301 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
9302 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9303 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
9304 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
9305 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
9306 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
9307 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
9308 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9309 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9310 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
9311 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9312 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9313 // CHECK15-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
9314 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
9315 // CHECK15-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
9316 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
9317 // CHECK15: omp.dispatch.cond:
9318 // CHECK15-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
9319 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
9320 // CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
9321 // CHECK15: omp.dispatch.body:
9322 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9323 // CHECK15-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
9324 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9325 // CHECK15: omp.inner.for.cond:
9326 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
9327 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25
9328 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
9329 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9330 // CHECK15: omp.inner.for.body:
9331 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
9332 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
9333 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9334 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !25
9335 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !25
9336 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP13]]
9337 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !25
9338 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
9339 // CHECK15: omp.body.continue:
9340 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9341 // CHECK15: omp.inner.for.inc:
9342 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
9343 // CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP14]], 1
9344 // CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
9345 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]
9346 // CHECK15: omp.inner.for.end:
9347 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
9348 // CHECK15: omp.dispatch.inc:
9349 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]]
9350 // CHECK15: omp.dispatch.end:
9351 // CHECK15-NEXT: ret void
9352 //
9353 //
9354 // CHECK15-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
9355 // CHECK15-SAME: () #[[ATTR6:[0-9]+]] {
9356 // CHECK15-NEXT: entry:
9357 // CHECK15-NEXT: call void @__tgt_register_requires(i64 1)
9358 // CHECK15-NEXT: ret void
9359 //
9360 //
9361 // CHECK17-LABEL: define {{[^@]+}}@main
9362 // CHECK17-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
9363 // CHECK17-NEXT: entry:
9364 // CHECK17-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
9365 // CHECK17-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
9366 // CHECK17-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8
9367 // CHECK17-NEXT: [[N:%.*]] = alloca i32, align 4
9368 // CHECK17-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8
9369 // CHECK17-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
9370 // CHECK17-NEXT: [[M:%.*]] = alloca i32, align 4
9371 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
9372 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
9373 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
9374 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
9375 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
9376 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
9377 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
9378 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
9379 // CHECK17-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8
9380 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8
9381 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8
9382 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8
9383 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8
9384 // CHECK17-NEXT: [[_TMP9:%.*]] = alloca i32, align 4
9385 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
9386 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
9387 // CHECK17-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8
9388 // CHECK17-NEXT: [[N_CASTED20:%.*]] = alloca i64, align 8
9389 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS22:%.*]] = alloca [4 x i8*], align 8
9390 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS23:%.*]] = alloca [4 x i8*], align 8
9391 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS24:%.*]] = alloca [4 x i8*], align 8
9392 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES25:%.*]] = alloca [4 x i64], align 8
9393 // CHECK17-NEXT: [[_TMP26:%.*]] = alloca i32, align 4
9394 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4
9395 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_28:%.*]] = alloca i32, align 4
9396 // CHECK17-NEXT: [[N_CASTED36:%.*]] = alloca i64, align 8
9397 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS38:%.*]] = alloca [3 x i8*], align 8
9398 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS39:%.*]] = alloca [3 x i8*], align 8
9399 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS40:%.*]] = alloca [3 x i8*], align 8
9400 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES41:%.*]] = alloca [3 x i64], align 8
9401 // CHECK17-NEXT: [[_TMP42:%.*]] = alloca i32, align 4
9402 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_43:%.*]] = alloca i32, align 4
9403 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_44:%.*]] = alloca i32, align 4
9404 // CHECK17-NEXT: [[M_CASTED52:%.*]] = alloca i64, align 8
9405 // CHECK17-NEXT: [[N_CASTED54:%.*]] = alloca i64, align 8
9406 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS56:%.*]] = alloca [4 x i8*], align 8
9407 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS57:%.*]] = alloca [4 x i8*], align 8
9408 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS58:%.*]] = alloca [4 x i8*], align 8
9409 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES59:%.*]] = alloca [4 x i64], align 8
9410 // CHECK17-NEXT: [[_TMP60:%.*]] = alloca i32, align 4
9411 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_61:%.*]] = alloca i32, align 4
9412 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_62:%.*]] = alloca i32, align 4
9413 // CHECK17-NEXT: store i32 0, i32* [[RETVAL]], align 4
9414 // CHECK17-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
9415 // CHECK17-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
9416 // CHECK17-NEXT: store i32 100, i32* [[N]], align 4
9417 // CHECK17-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
9418 // CHECK17-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
9419 // CHECK17-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave()
9420 // CHECK17-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
9421 // CHECK17-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
9422 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
9423 // CHECK17-NEXT: store i32 10, i32* [[M]], align 4
9424 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4
9425 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
9426 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4
9427 // CHECK17-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
9428 // CHECK17-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4
9429 // CHECK17-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8*
9430 // CHECK17-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP6]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes to i8*), i64 24, i1 false)
9431 // CHECK17-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
9432 // CHECK17-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64*
9433 // CHECK17-NEXT: store i64 [[TMP4]], i64* [[TMP8]], align 8
9434 // CHECK17-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
9435 // CHECK17-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64*
9436 // CHECK17-NEXT: store i64 [[TMP4]], i64* [[TMP10]], align 8
9437 // CHECK17-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
9438 // CHECK17-NEXT: store i8* null, i8** [[TMP11]], align 8
9439 // CHECK17-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
9440 // CHECK17-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
9441 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8
9442 // CHECK17-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
9443 // CHECK17-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
9444 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8
9445 // CHECK17-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
9446 // CHECK17-NEXT: store i8* null, i8** [[TMP16]], align 8
9447 // CHECK17-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
9448 // CHECK17-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32**
9449 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 8
9450 // CHECK17-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
9451 // CHECK17-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32**
9452 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 8
9453 // CHECK17-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
9454 // CHECK17-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 8
9455 // CHECK17-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
9456 // CHECK17-NEXT: store i8* null, i8** [[TMP22]], align 8
9457 // CHECK17-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
9458 // CHECK17-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
9459 // CHECK17-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
9460 // CHECK17-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4
9461 // CHECK17-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4
9462 // CHECK17-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9463 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0
9464 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
9465 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
9466 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
9467 // CHECK17-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9468 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1
9469 // CHECK17-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64
9470 // CHECK17-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
9471 // CHECK17-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
9472 // CHECK17-NEXT: store i32 1, i32* [[TMP30]], align 4
9473 // CHECK17-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
9474 // CHECK17-NEXT: store i32 3, i32* [[TMP31]], align 4
9475 // CHECK17-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
9476 // CHECK17-NEXT: store i8** [[TMP23]], i8*** [[TMP32]], align 8
9477 // CHECK17-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
9478 // CHECK17-NEXT: store i8** [[TMP24]], i8*** [[TMP33]], align 8
9479 // CHECK17-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
9480 // CHECK17-NEXT: store i64* [[TMP25]], i64** [[TMP34]], align 8
9481 // CHECK17-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
9482 // CHECK17-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP35]], align 8
9483 // CHECK17-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
9484 // CHECK17-NEXT: store i8** null, i8*** [[TMP36]], align 8
9485 // CHECK17-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
9486 // CHECK17-NEXT: store i8** null, i8*** [[TMP37]], align 8
9487 // CHECK17-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
9488 // CHECK17-NEXT: store i64 [[TMP29]], i64* [[TMP38]], align 8
9489 // CHECK17-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
9490 // CHECK17-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0
9491 // CHECK17-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
9492 // CHECK17: omp_offload.failed:
9493 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
9494 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]]
9495 // CHECK17: omp_offload.cont:
9496 // CHECK17-NEXT: [[TMP41:%.*]] = load i32, i32* [[N]], align 4
9497 // CHECK17-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32*
9498 // CHECK17-NEXT: store i32 [[TMP41]], i32* [[CONV4]], align 4
9499 // CHECK17-NEXT: [[TMP42:%.*]] = load i64, i64* [[N_CASTED3]], align 8
9500 // CHECK17-NEXT: [[TMP43:%.*]] = mul nuw i64 [[TMP1]], 4
9501 // CHECK17-NEXT: [[TMP44:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES8]] to i8*
9502 // CHECK17-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP44]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.4 to i8*), i64 24, i1 false)
9503 // CHECK17-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
9504 // CHECK17-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64*
9505 // CHECK17-NEXT: store i64 [[TMP42]], i64* [[TMP46]], align 8
9506 // CHECK17-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
9507 // CHECK17-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64*
9508 // CHECK17-NEXT: store i64 [[TMP42]], i64* [[TMP48]], align 8
9509 // CHECK17-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0
9510 // CHECK17-NEXT: store i8* null, i8** [[TMP49]], align 8
9511 // CHECK17-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1
9512 // CHECK17-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i64*
9513 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP51]], align 8
9514 // CHECK17-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1
9515 // CHECK17-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to i64*
9516 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP53]], align 8
9517 // CHECK17-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1
9518 // CHECK17-NEXT: store i8* null, i8** [[TMP54]], align 8
9519 // CHECK17-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2
9520 // CHECK17-NEXT: [[TMP56:%.*]] = bitcast i8** [[TMP55]] to i32**
9521 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP56]], align 8
9522 // CHECK17-NEXT: [[TMP57:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2
9523 // CHECK17-NEXT: [[TMP58:%.*]] = bitcast i8** [[TMP57]] to i32**
9524 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP58]], align 8
9525 // CHECK17-NEXT: [[TMP59:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2
9526 // CHECK17-NEXT: store i64 [[TMP43]], i64* [[TMP59]], align 8
9527 // CHECK17-NEXT: [[TMP60:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2
9528 // CHECK17-NEXT: store i8* null, i8** [[TMP60]], align 8
9529 // CHECK17-NEXT: [[TMP61:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
9530 // CHECK17-NEXT: [[TMP62:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
9531 // CHECK17-NEXT: [[TMP63:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
9532 // CHECK17-NEXT: [[TMP64:%.*]] = load i32, i32* [[N]], align 4
9533 // CHECK17-NEXT: store i32 [[TMP64]], i32* [[DOTCAPTURE_EXPR_10]], align 4
9534 // CHECK17-NEXT: [[TMP65:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
9535 // CHECK17-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP65]], 0
9536 // CHECK17-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
9537 // CHECK17-NEXT: [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1
9538 // CHECK17-NEXT: store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4
9539 // CHECK17-NEXT: [[TMP66:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
9540 // CHECK17-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP66]], 1
9541 // CHECK17-NEXT: [[TMP67:%.*]] = zext i32 [[ADD15]] to i64
9542 // CHECK17-NEXT: [[KERNEL_ARGS16:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
9543 // CHECK17-NEXT: [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 0
9544 // CHECK17-NEXT: store i32 1, i32* [[TMP68]], align 4
9545 // CHECK17-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 1
9546 // CHECK17-NEXT: store i32 3, i32* [[TMP69]], align 4
9547 // CHECK17-NEXT: [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 2
9548 // CHECK17-NEXT: store i8** [[TMP61]], i8*** [[TMP70]], align 8
9549 // CHECK17-NEXT: [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 3
9550 // CHECK17-NEXT: store i8** [[TMP62]], i8*** [[TMP71]], align 8
9551 // CHECK17-NEXT: [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 4
9552 // CHECK17-NEXT: store i64* [[TMP63]], i64** [[TMP72]], align 8
9553 // CHECK17-NEXT: [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 5
9554 // CHECK17-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP73]], align 8
9555 // CHECK17-NEXT: [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 6
9556 // CHECK17-NEXT: store i8** null, i8*** [[TMP74]], align 8
9557 // CHECK17-NEXT: [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 7
9558 // CHECK17-NEXT: store i8** null, i8*** [[TMP75]], align 8
9559 // CHECK17-NEXT: [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]], i32 0, i32 8
9560 // CHECK17-NEXT: store i64 [[TMP67]], i64* [[TMP76]], align 8
9561 // CHECK17-NEXT: [[TMP77:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS16]])
9562 // CHECK17-NEXT: [[TMP78:%.*]] = icmp ne i32 [[TMP77]], 0
9563 // CHECK17-NEXT: br i1 [[TMP78]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
9564 // CHECK17: omp_offload.failed17:
9565 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i64 [[TMP42]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
9566 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT18]]
9567 // CHECK17: omp_offload.cont18:
9568 // CHECK17-NEXT: [[TMP79:%.*]] = load i32, i32* [[M]], align 4
9569 // CHECK17-NEXT: [[CONV19:%.*]] = bitcast i64* [[M_CASTED]] to i32*
9570 // CHECK17-NEXT: store i32 [[TMP79]], i32* [[CONV19]], align 4
9571 // CHECK17-NEXT: [[TMP80:%.*]] = load i64, i64* [[M_CASTED]], align 8
9572 // CHECK17-NEXT: [[TMP81:%.*]] = load i32, i32* [[N]], align 4
9573 // CHECK17-NEXT: [[CONV21:%.*]] = bitcast i64* [[N_CASTED20]] to i32*
9574 // CHECK17-NEXT: store i32 [[TMP81]], i32* [[CONV21]], align 4
9575 // CHECK17-NEXT: [[TMP82:%.*]] = load i64, i64* [[N_CASTED20]], align 8
9576 // CHECK17-NEXT: [[TMP83:%.*]] = mul nuw i64 [[TMP1]], 4
9577 // CHECK17-NEXT: [[TMP84:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES25]] to i8*
9578 // CHECK17-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP84]], i8* align 8 bitcast ([4 x i64]* @.offload_sizes.8 to i8*), i64 32, i1 false)
9579 // CHECK17-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0
9580 // CHECK17-NEXT: [[TMP86:%.*]] = bitcast i8** [[TMP85]] to i64*
9581 // CHECK17-NEXT: store i64 [[TMP80]], i64* [[TMP86]], align 8
9582 // CHECK17-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0
9583 // CHECK17-NEXT: [[TMP88:%.*]] = bitcast i8** [[TMP87]] to i64*
9584 // CHECK17-NEXT: store i64 [[TMP80]], i64* [[TMP88]], align 8
9585 // CHECK17-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 0
9586 // CHECK17-NEXT: store i8* null, i8** [[TMP89]], align 8
9587 // CHECK17-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 1
9588 // CHECK17-NEXT: [[TMP91:%.*]] = bitcast i8** [[TMP90]] to i64*
9589 // CHECK17-NEXT: store i64 [[TMP82]], i64* [[TMP91]], align 8
9590 // CHECK17-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 1
9591 // CHECK17-NEXT: [[TMP93:%.*]] = bitcast i8** [[TMP92]] to i64*
9592 // CHECK17-NEXT: store i64 [[TMP82]], i64* [[TMP93]], align 8
9593 // CHECK17-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 1
9594 // CHECK17-NEXT: store i8* null, i8** [[TMP94]], align 8
9595 // CHECK17-NEXT: [[TMP95:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 2
9596 // CHECK17-NEXT: [[TMP96:%.*]] = bitcast i8** [[TMP95]] to i64*
9597 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP96]], align 8
9598 // CHECK17-NEXT: [[TMP97:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 2
9599 // CHECK17-NEXT: [[TMP98:%.*]] = bitcast i8** [[TMP97]] to i64*
9600 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP98]], align 8
9601 // CHECK17-NEXT: [[TMP99:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 2
9602 // CHECK17-NEXT: store i8* null, i8** [[TMP99]], align 8
9603 // CHECK17-NEXT: [[TMP100:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 3
9604 // CHECK17-NEXT: [[TMP101:%.*]] = bitcast i8** [[TMP100]] to i32**
9605 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP101]], align 8
9606 // CHECK17-NEXT: [[TMP102:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 3
9607 // CHECK17-NEXT: [[TMP103:%.*]] = bitcast i8** [[TMP102]] to i32**
9608 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP103]], align 8
9609 // CHECK17-NEXT: [[TMP104:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 3
9610 // CHECK17-NEXT: store i64 [[TMP83]], i64* [[TMP104]], align 8
9611 // CHECK17-NEXT: [[TMP105:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS24]], i64 0, i64 3
9612 // CHECK17-NEXT: store i8* null, i8** [[TMP105]], align 8
9613 // CHECK17-NEXT: [[TMP106:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS22]], i32 0, i32 0
9614 // CHECK17-NEXT: [[TMP107:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS23]], i32 0, i32 0
9615 // CHECK17-NEXT: [[TMP108:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES25]], i32 0, i32 0
9616 // CHECK17-NEXT: [[TMP109:%.*]] = load i32, i32* [[N]], align 4
9617 // CHECK17-NEXT: store i32 [[TMP109]], i32* [[DOTCAPTURE_EXPR_27]], align 4
9618 // CHECK17-NEXT: [[TMP110:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4
9619 // CHECK17-NEXT: [[SUB29:%.*]] = sub nsw i32 [[TMP110]], 0
9620 // CHECK17-NEXT: [[DIV30:%.*]] = sdiv i32 [[SUB29]], 1
9621 // CHECK17-NEXT: [[SUB31:%.*]] = sub nsw i32 [[DIV30]], 1
9622 // CHECK17-NEXT: store i32 [[SUB31]], i32* [[DOTCAPTURE_EXPR_28]], align 4
9623 // CHECK17-NEXT: [[TMP111:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_28]], align 4
9624 // CHECK17-NEXT: [[ADD32:%.*]] = add nsw i32 [[TMP111]], 1
9625 // CHECK17-NEXT: [[TMP112:%.*]] = zext i32 [[ADD32]] to i64
9626 // CHECK17-NEXT: [[KERNEL_ARGS33:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
9627 // CHECK17-NEXT: [[TMP113:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS33]], i32 0, i32 0
9628 // CHECK17-NEXT: store i32 1, i32* [[TMP113]], align 4
9629 // CHECK17-NEXT: [[TMP114:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS33]], i32 0, i32 1
9630 // CHECK17-NEXT: store i32 4, i32* [[TMP114]], align 4
9631 // CHECK17-NEXT: [[TMP115:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS33]], i32 0, i32 2
9632 // CHECK17-NEXT: store i8** [[TMP106]], i8*** [[TMP115]], align 8
9633 // CHECK17-NEXT: [[TMP116:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS33]], i32 0, i32 3
9634 // CHECK17-NEXT: store i8** [[TMP107]], i8*** [[TMP116]], align 8
9635 // CHECK17-NEXT: [[TMP117:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS33]], i32 0, i32 4
9636 // CHECK17-NEXT: store i64* [[TMP108]], i64** [[TMP117]], align 8
9637 // CHECK17-NEXT: [[TMP118:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS33]], i32 0, i32 5
9638 // CHECK17-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.9, i32 0, i32 0), i64** [[TMP118]], align 8
9639 // CHECK17-NEXT: [[TMP119:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS33]], i32 0, i32 6
9640 // CHECK17-NEXT: store i8** null, i8*** [[TMP119]], align 8
9641 // CHECK17-NEXT: [[TMP120:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS33]], i32 0, i32 7
9642 // CHECK17-NEXT: store i8** null, i8*** [[TMP120]], align 8
9643 // CHECK17-NEXT: [[TMP121:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS33]], i32 0, i32 8
9644 // CHECK17-NEXT: store i64 [[TMP112]], i64* [[TMP121]], align 8
9645 // CHECK17-NEXT: [[TMP122:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS33]])
9646 // CHECK17-NEXT: [[TMP123:%.*]] = icmp ne i32 [[TMP122]], 0
9647 // CHECK17-NEXT: br i1 [[TMP123]], label [[OMP_OFFLOAD_FAILED34:%.*]], label [[OMP_OFFLOAD_CONT35:%.*]]
9648 // CHECK17: omp_offload.failed34:
9649 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i64 [[TMP80]], i64 [[TMP82]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
9650 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT35]]
9651 // CHECK17: omp_offload.cont35:
9652 // CHECK17-NEXT: [[TMP124:%.*]] = load i32, i32* [[N]], align 4
9653 // CHECK17-NEXT: [[CONV37:%.*]] = bitcast i64* [[N_CASTED36]] to i32*
9654 // CHECK17-NEXT: store i32 [[TMP124]], i32* [[CONV37]], align 4
9655 // CHECK17-NEXT: [[TMP125:%.*]] = load i64, i64* [[N_CASTED36]], align 8
9656 // CHECK17-NEXT: [[TMP126:%.*]] = mul nuw i64 [[TMP1]], 4
9657 // CHECK17-NEXT: [[TMP127:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES41]] to i8*
9658 // CHECK17-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP127]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.12 to i8*), i64 24, i1 false)
9659 // CHECK17-NEXT: [[TMP128:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS38]], i32 0, i32 0
9660 // CHECK17-NEXT: [[TMP129:%.*]] = bitcast i8** [[TMP128]] to i64*
9661 // CHECK17-NEXT: store i64 [[TMP125]], i64* [[TMP129]], align 8
9662 // CHECK17-NEXT: [[TMP130:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS39]], i32 0, i32 0
9663 // CHECK17-NEXT: [[TMP131:%.*]] = bitcast i8** [[TMP130]] to i64*
9664 // CHECK17-NEXT: store i64 [[TMP125]], i64* [[TMP131]], align 8
9665 // CHECK17-NEXT: [[TMP132:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS40]], i64 0, i64 0
9666 // CHECK17-NEXT: store i8* null, i8** [[TMP132]], align 8
9667 // CHECK17-NEXT: [[TMP133:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS38]], i32 0, i32 1
9668 // CHECK17-NEXT: [[TMP134:%.*]] = bitcast i8** [[TMP133]] to i64*
9669 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP134]], align 8
9670 // CHECK17-NEXT: [[TMP135:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS39]], i32 0, i32 1
9671 // CHECK17-NEXT: [[TMP136:%.*]] = bitcast i8** [[TMP135]] to i64*
9672 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP136]], align 8
9673 // CHECK17-NEXT: [[TMP137:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS40]], i64 0, i64 1
9674 // CHECK17-NEXT: store i8* null, i8** [[TMP137]], align 8
9675 // CHECK17-NEXT: [[TMP138:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS38]], i32 0, i32 2
9676 // CHECK17-NEXT: [[TMP139:%.*]] = bitcast i8** [[TMP138]] to i32**
9677 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP139]], align 8
9678 // CHECK17-NEXT: [[TMP140:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS39]], i32 0, i32 2
9679 // CHECK17-NEXT: [[TMP141:%.*]] = bitcast i8** [[TMP140]] to i32**
9680 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP141]], align 8
9681 // CHECK17-NEXT: [[TMP142:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES41]], i32 0, i32 2
9682 // CHECK17-NEXT: store i64 [[TMP126]], i64* [[TMP142]], align 8
9683 // CHECK17-NEXT: [[TMP143:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS40]], i64 0, i64 2
9684 // CHECK17-NEXT: store i8* null, i8** [[TMP143]], align 8
9685 // CHECK17-NEXT: [[TMP144:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS38]], i32 0, i32 0
9686 // CHECK17-NEXT: [[TMP145:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS39]], i32 0, i32 0
9687 // CHECK17-NEXT: [[TMP146:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES41]], i32 0, i32 0
9688 // CHECK17-NEXT: [[TMP147:%.*]] = load i32, i32* [[N]], align 4
9689 // CHECK17-NEXT: store i32 [[TMP147]], i32* [[DOTCAPTURE_EXPR_43]], align 4
9690 // CHECK17-NEXT: [[TMP148:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_43]], align 4
9691 // CHECK17-NEXT: [[SUB45:%.*]] = sub nsw i32 [[TMP148]], 0
9692 // CHECK17-NEXT: [[DIV46:%.*]] = sdiv i32 [[SUB45]], 1
9693 // CHECK17-NEXT: [[SUB47:%.*]] = sub nsw i32 [[DIV46]], 1
9694 // CHECK17-NEXT: store i32 [[SUB47]], i32* [[DOTCAPTURE_EXPR_44]], align 4
9695 // CHECK17-NEXT: [[TMP149:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_44]], align 4
9696 // CHECK17-NEXT: [[ADD48:%.*]] = add nsw i32 [[TMP149]], 1
9697 // CHECK17-NEXT: [[TMP150:%.*]] = zext i32 [[ADD48]] to i64
9698 // CHECK17-NEXT: [[KERNEL_ARGS49:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
9699 // CHECK17-NEXT: [[TMP151:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS49]], i32 0, i32 0
9700 // CHECK17-NEXT: store i32 1, i32* [[TMP151]], align 4
9701 // CHECK17-NEXT: [[TMP152:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS49]], i32 0, i32 1
9702 // CHECK17-NEXT: store i32 3, i32* [[TMP152]], align 4
9703 // CHECK17-NEXT: [[TMP153:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS49]], i32 0, i32 2
9704 // CHECK17-NEXT: store i8** [[TMP144]], i8*** [[TMP153]], align 8
9705 // CHECK17-NEXT: [[TMP154:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS49]], i32 0, i32 3
9706 // CHECK17-NEXT: store i8** [[TMP145]], i8*** [[TMP154]], align 8
9707 // CHECK17-NEXT: [[TMP155:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS49]], i32 0, i32 4
9708 // CHECK17-NEXT: store i64* [[TMP146]], i64** [[TMP155]], align 8
9709 // CHECK17-NEXT: [[TMP156:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS49]], i32 0, i32 5
9710 // CHECK17-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.13, i32 0, i32 0), i64** [[TMP156]], align 8
9711 // CHECK17-NEXT: [[TMP157:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS49]], i32 0, i32 6
9712 // CHECK17-NEXT: store i8** null, i8*** [[TMP157]], align 8
9713 // CHECK17-NEXT: [[TMP158:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS49]], i32 0, i32 7
9714 // CHECK17-NEXT: store i8** null, i8*** [[TMP158]], align 8
9715 // CHECK17-NEXT: [[TMP159:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS49]], i32 0, i32 8
9716 // CHECK17-NEXT: store i64 [[TMP150]], i64* [[TMP159]], align 8
9717 // CHECK17-NEXT: [[TMP160:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS49]])
9718 // CHECK17-NEXT: [[TMP161:%.*]] = icmp ne i32 [[TMP160]], 0
9719 // CHECK17-NEXT: br i1 [[TMP161]], label [[OMP_OFFLOAD_FAILED50:%.*]], label [[OMP_OFFLOAD_CONT51:%.*]]
9720 // CHECK17: omp_offload.failed50:
9721 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i64 [[TMP125]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
9722 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT51]]
9723 // CHECK17: omp_offload.cont51:
9724 // CHECK17-NEXT: [[TMP162:%.*]] = load i32, i32* [[M]], align 4
9725 // CHECK17-NEXT: [[CONV53:%.*]] = bitcast i64* [[M_CASTED52]] to i32*
9726 // CHECK17-NEXT: store i32 [[TMP162]], i32* [[CONV53]], align 4
9727 // CHECK17-NEXT: [[TMP163:%.*]] = load i64, i64* [[M_CASTED52]], align 8
9728 // CHECK17-NEXT: [[TMP164:%.*]] = load i32, i32* [[N]], align 4
9729 // CHECK17-NEXT: [[CONV55:%.*]] = bitcast i64* [[N_CASTED54]] to i32*
9730 // CHECK17-NEXT: store i32 [[TMP164]], i32* [[CONV55]], align 4
9731 // CHECK17-NEXT: [[TMP165:%.*]] = load i64, i64* [[N_CASTED54]], align 8
9732 // CHECK17-NEXT: [[TMP166:%.*]] = mul nuw i64 [[TMP1]], 4
9733 // CHECK17-NEXT: [[TMP167:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES59]] to i8*
9734 // CHECK17-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP167]], i8* align 8 bitcast ([4 x i64]* @.offload_sizes.16 to i8*), i64 32, i1 false)
9735 // CHECK17-NEXT: [[TMP168:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS56]], i32 0, i32 0
9736 // CHECK17-NEXT: [[TMP169:%.*]] = bitcast i8** [[TMP168]] to i64*
9737 // CHECK17-NEXT: store i64 [[TMP163]], i64* [[TMP169]], align 8
9738 // CHECK17-NEXT: [[TMP170:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS57]], i32 0, i32 0
9739 // CHECK17-NEXT: [[TMP171:%.*]] = bitcast i8** [[TMP170]] to i64*
9740 // CHECK17-NEXT: store i64 [[TMP163]], i64* [[TMP171]], align 8
9741 // CHECK17-NEXT: [[TMP172:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS58]], i64 0, i64 0
9742 // CHECK17-NEXT: store i8* null, i8** [[TMP172]], align 8
9743 // CHECK17-NEXT: [[TMP173:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS56]], i32 0, i32 1
9744 // CHECK17-NEXT: [[TMP174:%.*]] = bitcast i8** [[TMP173]] to i64*
9745 // CHECK17-NEXT: store i64 [[TMP165]], i64* [[TMP174]], align 8
9746 // CHECK17-NEXT: [[TMP175:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS57]], i32 0, i32 1
9747 // CHECK17-NEXT: [[TMP176:%.*]] = bitcast i8** [[TMP175]] to i64*
9748 // CHECK17-NEXT: store i64 [[TMP165]], i64* [[TMP176]], align 8
9749 // CHECK17-NEXT: [[TMP177:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS58]], i64 0, i64 1
9750 // CHECK17-NEXT: store i8* null, i8** [[TMP177]], align 8
9751 // CHECK17-NEXT: [[TMP178:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS56]], i32 0, i32 2
9752 // CHECK17-NEXT: [[TMP179:%.*]] = bitcast i8** [[TMP178]] to i64*
9753 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP179]], align 8
9754 // CHECK17-NEXT: [[TMP180:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS57]], i32 0, i32 2
9755 // CHECK17-NEXT: [[TMP181:%.*]] = bitcast i8** [[TMP180]] to i64*
9756 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP181]], align 8
9757 // CHECK17-NEXT: [[TMP182:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS58]], i64 0, i64 2
9758 // CHECK17-NEXT: store i8* null, i8** [[TMP182]], align 8
9759 // CHECK17-NEXT: [[TMP183:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS56]], i32 0, i32 3
9760 // CHECK17-NEXT: [[TMP184:%.*]] = bitcast i8** [[TMP183]] to i32**
9761 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP184]], align 8
9762 // CHECK17-NEXT: [[TMP185:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS57]], i32 0, i32 3
9763 // CHECK17-NEXT: [[TMP186:%.*]] = bitcast i8** [[TMP185]] to i32**
9764 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP186]], align 8
9765 // CHECK17-NEXT: [[TMP187:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES59]], i32 0, i32 3
9766 // CHECK17-NEXT: store i64 [[TMP166]], i64* [[TMP187]], align 8
9767 // CHECK17-NEXT: [[TMP188:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS58]], i64 0, i64 3
9768 // CHECK17-NEXT: store i8* null, i8** [[TMP188]], align 8
9769 // CHECK17-NEXT: [[TMP189:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS56]], i32 0, i32 0
9770 // CHECK17-NEXT: [[TMP190:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS57]], i32 0, i32 0
9771 // CHECK17-NEXT: [[TMP191:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES59]], i32 0, i32 0
9772 // CHECK17-NEXT: [[TMP192:%.*]] = load i32, i32* [[N]], align 4
9773 // CHECK17-NEXT: store i32 [[TMP192]], i32* [[DOTCAPTURE_EXPR_61]], align 4
9774 // CHECK17-NEXT: [[TMP193:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_61]], align 4
9775 // CHECK17-NEXT: [[SUB63:%.*]] = sub nsw i32 [[TMP193]], 0
9776 // CHECK17-NEXT: [[DIV64:%.*]] = sdiv i32 [[SUB63]], 1
9777 // CHECK17-NEXT: [[SUB65:%.*]] = sub nsw i32 [[DIV64]], 1
9778 // CHECK17-NEXT: store i32 [[SUB65]], i32* [[DOTCAPTURE_EXPR_62]], align 4
9779 // CHECK17-NEXT: [[TMP194:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_62]], align 4
9780 // CHECK17-NEXT: [[ADD66:%.*]] = add nsw i32 [[TMP194]], 1
9781 // CHECK17-NEXT: [[TMP195:%.*]] = zext i32 [[ADD66]] to i64
9782 // CHECK17-NEXT: [[KERNEL_ARGS67:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
9783 // CHECK17-NEXT: [[TMP196:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS67]], i32 0, i32 0
9784 // CHECK17-NEXT: store i32 1, i32* [[TMP196]], align 4
9785 // CHECK17-NEXT: [[TMP197:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS67]], i32 0, i32 1
9786 // CHECK17-NEXT: store i32 4, i32* [[TMP197]], align 4
9787 // CHECK17-NEXT: [[TMP198:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS67]], i32 0, i32 2
9788 // CHECK17-NEXT: store i8** [[TMP189]], i8*** [[TMP198]], align 8
9789 // CHECK17-NEXT: [[TMP199:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS67]], i32 0, i32 3
9790 // CHECK17-NEXT: store i8** [[TMP190]], i8*** [[TMP199]], align 8
9791 // CHECK17-NEXT: [[TMP200:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS67]], i32 0, i32 4
9792 // CHECK17-NEXT: store i64* [[TMP191]], i64** [[TMP200]], align 8
9793 // CHECK17-NEXT: [[TMP201:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS67]], i32 0, i32 5
9794 // CHECK17-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.17, i32 0, i32 0), i64** [[TMP201]], align 8
9795 // CHECK17-NEXT: [[TMP202:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS67]], i32 0, i32 6
9796 // CHECK17-NEXT: store i8** null, i8*** [[TMP202]], align 8
9797 // CHECK17-NEXT: [[TMP203:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS67]], i32 0, i32 7
9798 // CHECK17-NEXT: store i8** null, i8*** [[TMP203]], align 8
9799 // CHECK17-NEXT: [[TMP204:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS67]], i32 0, i32 8
9800 // CHECK17-NEXT: store i64 [[TMP195]], i64* [[TMP204]], align 8
9801 // CHECK17-NEXT: [[TMP205:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS67]])
9802 // CHECK17-NEXT: [[TMP206:%.*]] = icmp ne i32 [[TMP205]], 0
9803 // CHECK17-NEXT: br i1 [[TMP206]], label [[OMP_OFFLOAD_FAILED68:%.*]], label [[OMP_OFFLOAD_CONT69:%.*]]
9804 // CHECK17: omp_offload.failed68:
9805 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i64 [[TMP163]], i64 [[TMP165]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
9806 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT69]]
9807 // CHECK17: omp_offload.cont69:
9808 // CHECK17-NEXT: [[TMP207:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
9809 // CHECK17-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP207]])
9810 // CHECK17-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
9811 // CHECK17-NEXT: [[TMP208:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
9812 // CHECK17-NEXT: call void @llvm.stackrestore(i8* [[TMP208]])
9813 // CHECK17-NEXT: [[TMP209:%.*]] = load i32, i32* [[RETVAL]], align 4
9814 // CHECK17-NEXT: ret i32 [[TMP209]]
9815 //
9816 //
9817 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148
9818 // CHECK17-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
9819 // CHECK17-NEXT: entry:
9820 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
9821 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
9822 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
9823 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
9824 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
9825 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
9826 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
9827 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
9828 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
9829 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
9830 // CHECK17-NEXT: ret void
9831 //
9832 //
9833 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined.
9834 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
9835 // CHECK17-NEXT: entry:
9836 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9837 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9838 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
9839 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
9840 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
9841 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9842 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
9843 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
9844 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
9845 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
9846 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9847 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9848 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9849 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9850 // CHECK17-NEXT: [[I3:%.*]] = alloca i32, align 4
9851 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9852 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9853 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
9854 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
9855 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
9856 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
9857 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
9858 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
9859 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
9860 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
9861 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9862 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
9863 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
9864 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
9865 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
9866 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4
9867 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9868 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
9869 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
9870 // CHECK17: omp.precond.then:
9871 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9872 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9873 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
9874 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9875 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9876 // CHECK17-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9877 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
9878 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9879 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9880 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9881 // CHECK17-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
9882 // CHECK17-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9883 // CHECK17: cond.true:
9884 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9885 // CHECK17-NEXT: br label [[COND_END:%.*]]
9886 // CHECK17: cond.false:
9887 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9888 // CHECK17-NEXT: br label [[COND_END]]
9889 // CHECK17: cond.end:
9890 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
9891 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9892 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9893 // CHECK17-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
9894 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9895 // CHECK17: omp.inner.for.cond:
9896 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9897 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9898 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
9899 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9900 // CHECK17: omp.inner.for.body:
9901 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9902 // CHECK17-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
9903 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9904 // CHECK17-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
9905 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])
9906 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
9907 // CHECK17: omp.inner.for.inc:
9908 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9909 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9910 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
9911 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
9912 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
9913 // CHECK17: omp.inner.for.end:
9914 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
9915 // CHECK17: omp.loop.exit:
9916 // CHECK17-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9917 // CHECK17-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
9918 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
9919 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
9920 // CHECK17: omp.precond.end:
9921 // CHECK17-NEXT: ret void
9922 //
9923 //
9924 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..1
9925 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
9926 // CHECK17-NEXT: entry:
9927 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9928 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9929 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
9930 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
9931 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
9932 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
9933 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
9934 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
9935 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
9936 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
9937 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
9938 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
9939 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
9940 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
9941 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9942 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9943 // CHECK17-NEXT: [[I4:%.*]] = alloca i32, align 4
9944 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9945 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9946 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9947 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9948 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
9949 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
9950 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
9951 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
9952 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
9953 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
9954 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
9955 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
9956 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9957 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
9958 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
9959 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
9960 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
9961 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4
9962 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9963 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
9964 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
9965 // CHECK17: omp.precond.then:
9966 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
9967 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9968 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
9969 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9970 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
9971 // CHECK17-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9972 // CHECK17-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
9973 // CHECK17-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
9974 // CHECK17-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
9975 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9976 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9977 // CHECK17-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9978 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
9979 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9980 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9981 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9982 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
9983 // CHECK17-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9984 // CHECK17: cond.true:
9985 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9986 // CHECK17-NEXT: br label [[COND_END:%.*]]
9987 // CHECK17: cond.false:
9988 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9989 // CHECK17-NEXT: br label [[COND_END]]
9990 // CHECK17: cond.end:
9991 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
9992 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9993 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9994 // CHECK17-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
9995 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
9996 // CHECK17: omp.inner.for.cond:
9997 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9998 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9999 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
10000 // CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10001 // CHECK17: omp.inner.for.body:
10002 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10003 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
10004 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10005 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I4]], align 4
10006 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4
10007 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
10008 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
10009 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
10010 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10011 // CHECK17: omp.body.continue:
10012 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10013 // CHECK17: omp.inner.for.inc:
10014 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10015 // CHECK17-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
10016 // CHECK17-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
10017 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
10018 // CHECK17: omp.inner.for.end:
10019 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10020 // CHECK17: omp.loop.exit:
10021 // CHECK17-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10022 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
10023 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
10024 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
10025 // CHECK17: omp.precond.end:
10026 // CHECK17-NEXT: ret void
10027 //
10028 //
10029 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153
10030 // CHECK17-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10031 // CHECK17-NEXT: entry:
10032 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
10033 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
10034 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
10035 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
10036 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10037 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
10038 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
10039 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10040 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10041 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
10042 // CHECK17-NEXT: ret void
10043 //
10044 //
10045 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..2
10046 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10047 // CHECK17-NEXT: entry:
10048 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10049 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10050 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
10051 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
10052 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
10053 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10054 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
10055 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10056 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10057 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
10058 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10059 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10060 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10061 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10062 // CHECK17-NEXT: [[I3:%.*]] = alloca i32, align 4
10063 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10064 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10065 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
10066 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10067 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
10068 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
10069 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10070 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10071 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
10072 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
10073 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10074 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
10075 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10076 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
10077 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
10078 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4
10079 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10080 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
10081 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10082 // CHECK17: omp.precond.then:
10083 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10084 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10085 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
10086 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10087 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10088 // CHECK17-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10089 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
10090 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10091 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10092 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10093 // CHECK17-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
10094 // CHECK17-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10095 // CHECK17: cond.true:
10096 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10097 // CHECK17-NEXT: br label [[COND_END:%.*]]
10098 // CHECK17: cond.false:
10099 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10100 // CHECK17-NEXT: br label [[COND_END]]
10101 // CHECK17: cond.end:
10102 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
10103 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10104 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10105 // CHECK17-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
10106 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10107 // CHECK17: omp.inner.for.cond:
10108 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10109 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10110 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
10111 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10112 // CHECK17: omp.inner.for.body:
10113 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10114 // CHECK17-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
10115 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10116 // CHECK17-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
10117 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])
10118 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10119 // CHECK17: omp.inner.for.inc:
10120 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10121 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10122 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
10123 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
10124 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
10125 // CHECK17: omp.inner.for.end:
10126 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10127 // CHECK17: omp.loop.exit:
10128 // CHECK17-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10129 // CHECK17-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
10130 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
10131 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
10132 // CHECK17: omp.precond.end:
10133 // CHECK17-NEXT: ret void
10134 //
10135 //
10136 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..3
10137 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10138 // CHECK17-NEXT: entry:
10139 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10140 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10141 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10142 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10143 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
10144 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
10145 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
10146 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10147 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
10148 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10149 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10150 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
10151 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10152 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10153 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10154 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10155 // CHECK17-NEXT: [[I4:%.*]] = alloca i32, align 4
10156 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10157 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10158 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10159 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10160 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
10161 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10162 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
10163 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
10164 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10165 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10166 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
10167 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
10168 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10169 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
10170 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10171 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
10172 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
10173 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4
10174 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10175 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
10176 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10177 // CHECK17: omp.precond.then:
10178 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
10179 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10180 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
10181 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10182 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
10183 // CHECK17-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10184 // CHECK17-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
10185 // CHECK17-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
10186 // CHECK17-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
10187 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10188 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10189 // CHECK17-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10190 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
10191 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10192 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10193 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10194 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
10195 // CHECK17-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10196 // CHECK17: cond.true:
10197 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10198 // CHECK17-NEXT: br label [[COND_END:%.*]]
10199 // CHECK17: cond.false:
10200 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10201 // CHECK17-NEXT: br label [[COND_END]]
10202 // CHECK17: cond.end:
10203 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
10204 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10205 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10206 // CHECK17-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
10207 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10208 // CHECK17: omp.inner.for.cond:
10209 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10210 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10211 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
10212 // CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10213 // CHECK17: omp.inner.for.body:
10214 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10215 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
10216 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10217 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I4]], align 4
10218 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4
10219 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
10220 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
10221 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
10222 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10223 // CHECK17: omp.body.continue:
10224 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10225 // CHECK17: omp.inner.for.inc:
10226 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10227 // CHECK17-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
10228 // CHECK17-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
10229 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
10230 // CHECK17: omp.inner.for.end:
10231 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10232 // CHECK17: omp.loop.exit:
10233 // CHECK17-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10234 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
10235 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
10236 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
10237 // CHECK17: omp.precond.end:
10238 // CHECK17-NEXT: ret void
10239 //
10240 //
10241 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158
10242 // CHECK17-SAME: (i64 noundef [[M:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10243 // CHECK17-NEXT: entry:
10244 // CHECK17-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
10245 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
10246 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
10247 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
10248 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10249 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
10250 // CHECK17-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8
10251 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
10252 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10253 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
10254 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
10255 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
10256 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10257 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10258 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
10259 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
10260 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10261 // CHECK17-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
10262 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4
10263 // CHECK17-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
10264 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]])
10265 // CHECK17-NEXT: ret void
10266 //
10267 //
10268 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..6
10269 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
10270 // CHECK17-NEXT: entry:
10271 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10272 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10273 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
10274 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
10275 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
10276 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
10277 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10278 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
10279 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10280 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
10281 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
10282 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10283 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10284 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10285 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10286 // CHECK17-NEXT: [[I4:%.*]] = alloca i32, align 4
10287 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
10288 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10289 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10290 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
10291 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10292 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
10293 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
10294 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
10295 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10296 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10297 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
10298 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
10299 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
10300 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10301 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
10302 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10303 // CHECK17-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
10304 // CHECK17-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
10305 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4
10306 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10307 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
10308 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10309 // CHECK17: omp.precond.then:
10310 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10311 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10312 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
10313 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10314 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10315 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[CONV]], align 4
10316 // CHECK17-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10317 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
10318 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])
10319 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10320 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10321 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
10322 // CHECK17-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10323 // CHECK17: cond.true:
10324 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10325 // CHECK17-NEXT: br label [[COND_END:%.*]]
10326 // CHECK17: cond.false:
10327 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10328 // CHECK17-NEXT: br label [[COND_END]]
10329 // CHECK17: cond.end:
10330 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
10331 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10332 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10333 // CHECK17-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
10334 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10335 // CHECK17: omp.inner.for.cond:
10336 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10337 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10338 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1
10339 // CHECK17-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]]
10340 // CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10341 // CHECK17: omp.inner.for.body:
10342 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10343 // CHECK17-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
10344 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10345 // CHECK17-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64
10346 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV]], align 4
10347 // CHECK17-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
10348 // CHECK17-NEXT: store i32 [[TMP21]], i32* [[CONV7]], align 4
10349 // CHECK17-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
10350 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP22]])
10351 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10352 // CHECK17: omp.inner.for.inc:
10353 // CHECK17-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10354 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10355 // CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
10356 // CHECK17-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
10357 // CHECK17-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10358 // CHECK17-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10359 // CHECK17-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]
10360 // CHECK17-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4
10361 // CHECK17-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10362 // CHECK17-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10363 // CHECK17-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP27]], [[TMP28]]
10364 // CHECK17-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4
10365 // CHECK17-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10366 // CHECK17-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10367 // CHECK17-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]]
10368 // CHECK17-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]]
10369 // CHECK17: cond.true12:
10370 // CHECK17-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10371 // CHECK17-NEXT: br label [[COND_END14:%.*]]
10372 // CHECK17: cond.false13:
10373 // CHECK17-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10374 // CHECK17-NEXT: br label [[COND_END14]]
10375 // CHECK17: cond.end14:
10376 // CHECK17-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE12]] ], [ [[TMP32]], [[COND_FALSE13]] ]
10377 // CHECK17-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4
10378 // CHECK17-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10379 // CHECK17-NEXT: store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4
10380 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
10381 // CHECK17: omp.inner.for.end:
10382 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10383 // CHECK17: omp.loop.exit:
10384 // CHECK17-NEXT: [[TMP34:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10385 // CHECK17-NEXT: [[TMP35:%.*]] = load i32, i32* [[TMP34]], align 4
10386 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP35]])
10387 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
10388 // CHECK17: omp.precond.end:
10389 // CHECK17-NEXT: ret void
10390 //
10391 //
10392 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..7
10393 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
10394 // CHECK17-NEXT: entry:
10395 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10396 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10397 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10398 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10399 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
10400 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
10401 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
10402 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
10403 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10404 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
10405 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10406 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
10407 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
10408 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10409 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10410 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10411 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10412 // CHECK17-NEXT: [[I6:%.*]] = alloca i32, align 4
10413 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10414 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10415 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10416 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10417 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
10418 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10419 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
10420 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
10421 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
10422 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10423 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10424 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
10425 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
10426 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
10427 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10428 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
10429 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10430 // CHECK17-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
10431 // CHECK17-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
10432 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4
10433 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10434 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
10435 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10436 // CHECK17: omp.precond.then:
10437 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
10438 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10439 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
10440 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10441 // CHECK17-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
10442 // CHECK17-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10443 // CHECK17-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32
10444 // CHECK17-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4
10445 // CHECK17-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
10446 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10447 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10448 // CHECK17-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10449 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
10450 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10451 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10452 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10453 // CHECK17-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
10454 // CHECK17-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10455 // CHECK17: cond.true:
10456 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10457 // CHECK17-NEXT: br label [[COND_END:%.*]]
10458 // CHECK17: cond.false:
10459 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10460 // CHECK17-NEXT: br label [[COND_END]]
10461 // CHECK17: cond.end:
10462 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
10463 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10464 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10465 // CHECK17-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
10466 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10467 // CHECK17: omp.inner.for.cond:
10468 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10469 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10470 // CHECK17-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
10471 // CHECK17-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10472 // CHECK17: omp.inner.for.body:
10473 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10474 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
10475 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10476 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I6]], align 4
10477 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4
10478 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
10479 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
10480 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
10481 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10482 // CHECK17: omp.body.continue:
10483 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10484 // CHECK17: omp.inner.for.inc:
10485 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10486 // CHECK17-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1
10487 // CHECK17-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
10488 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
10489 // CHECK17: omp.inner.for.end:
10490 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10491 // CHECK17: omp.loop.exit:
10492 // CHECK17-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10493 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
10494 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
10495 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
10496 // CHECK17: omp.precond.end:
10497 // CHECK17-NEXT: ret void
10498 //
10499 //
10500 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163
10501 // CHECK17-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10502 // CHECK17-NEXT: entry:
10503 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
10504 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
10505 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
10506 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
10507 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10508 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
10509 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
10510 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10511 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10512 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
10513 // CHECK17-NEXT: ret void
10514 //
10515 //
10516 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..10
10517 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10518 // CHECK17-NEXT: entry:
10519 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10520 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10521 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
10522 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
10523 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
10524 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10525 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
10526 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10527 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10528 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
10529 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10530 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10531 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10532 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10533 // CHECK17-NEXT: [[I3:%.*]] = alloca i32, align 4
10534 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10535 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10536 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
10537 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10538 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
10539 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
10540 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10541 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10542 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
10543 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
10544 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10545 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
10546 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10547 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
10548 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
10549 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4
10550 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10551 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
10552 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10553 // CHECK17: omp.precond.then:
10554 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10555 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10556 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
10557 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10558 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10559 // CHECK17-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10560 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
10561 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10562 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10563 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10564 // CHECK17-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
10565 // CHECK17-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10566 // CHECK17: cond.true:
10567 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10568 // CHECK17-NEXT: br label [[COND_END:%.*]]
10569 // CHECK17: cond.false:
10570 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10571 // CHECK17-NEXT: br label [[COND_END]]
10572 // CHECK17: cond.end:
10573 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
10574 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10575 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10576 // CHECK17-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
10577 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10578 // CHECK17: omp.inner.for.cond:
10579 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10580 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10581 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
10582 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10583 // CHECK17: omp.inner.for.body:
10584 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10585 // CHECK17-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
10586 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10587 // CHECK17-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
10588 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])
10589 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10590 // CHECK17: omp.inner.for.inc:
10591 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10592 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10593 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
10594 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
10595 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
10596 // CHECK17: omp.inner.for.end:
10597 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10598 // CHECK17: omp.loop.exit:
10599 // CHECK17-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10600 // CHECK17-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
10601 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
10602 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
10603 // CHECK17: omp.precond.end:
10604 // CHECK17-NEXT: ret void
10605 //
10606 //
10607 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..11
10608 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10609 // CHECK17-NEXT: entry:
10610 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10611 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10612 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10613 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10614 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
10615 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
10616 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
10617 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10618 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
10619 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10620 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10621 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
10622 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10623 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10624 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10625 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10626 // CHECK17-NEXT: [[I4:%.*]] = alloca i32, align 4
10627 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10628 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10629 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10630 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10631 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
10632 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10633 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
10634 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
10635 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10636 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10637 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
10638 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
10639 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10640 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
10641 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10642 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
10643 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
10644 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4
10645 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10646 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
10647 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10648 // CHECK17: omp.precond.then:
10649 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
10650 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10651 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
10652 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10653 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
10654 // CHECK17-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10655 // CHECK17-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
10656 // CHECK17-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
10657 // CHECK17-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
10658 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10659 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10660 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10661 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10662 // CHECK17-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10663 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
10664 // CHECK17-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1)
10665 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
10666 // CHECK17: omp.dispatch.cond:
10667 // CHECK17-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10668 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
10669 // CHECK17-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
10670 // CHECK17-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
10671 // CHECK17-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
10672 // CHECK17: omp.dispatch.body:
10673 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10674 // CHECK17-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
10675 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10676 // CHECK17: omp.inner.for.cond:
10677 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
10678 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15
10679 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
10680 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10681 // CHECK17: omp.inner.for.body:
10682 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
10683 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
10684 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10685 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !15
10686 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !15
10687 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64
10688 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
10689 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15
10690 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10691 // CHECK17: omp.body.continue:
10692 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10693 // CHECK17: omp.inner.for.inc:
10694 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
10695 // CHECK17-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1
10696 // CHECK17-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
10697 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
10698 // CHECK17: omp.inner.for.end:
10699 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
10700 // CHECK17: omp.dispatch.inc:
10701 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]]
10702 // CHECK17: omp.dispatch.end:
10703 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
10704 // CHECK17: omp.precond.end:
10705 // CHECK17-NEXT: ret void
10706 //
10707 //
10708 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168
10709 // CHECK17-SAME: (i64 noundef [[M:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10710 // CHECK17-NEXT: entry:
10711 // CHECK17-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
10712 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
10713 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
10714 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
10715 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10716 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
10717 // CHECK17-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8
10718 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8
10719 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10720 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
10721 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
10722 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
10723 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10724 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10725 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4
10726 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
10727 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10728 // CHECK17-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
10729 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4
10730 // CHECK17-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
10731 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]])
10732 // CHECK17-NEXT: ret void
10733 //
10734 //
10735 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..14
10736 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
10737 // CHECK17-NEXT: entry:
10738 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10739 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10740 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
10741 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
10742 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
10743 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
10744 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10745 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
10746 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10747 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
10748 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
10749 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10750 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10751 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10752 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10753 // CHECK17-NEXT: [[I4:%.*]] = alloca i32, align 4
10754 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
10755 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10756 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10757 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
10758 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10759 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
10760 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
10761 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
10762 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10763 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10764 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
10765 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
10766 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
10767 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10768 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
10769 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10770 // CHECK17-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
10771 // CHECK17-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
10772 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4
10773 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10774 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
10775 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10776 // CHECK17: omp.precond.then:
10777 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10778 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10779 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
10780 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10781 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10782 // CHECK17-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10783 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
10784 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10785 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10786 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10787 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
10788 // CHECK17-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10789 // CHECK17: cond.true:
10790 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10791 // CHECK17-NEXT: br label [[COND_END:%.*]]
10792 // CHECK17: cond.false:
10793 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10794 // CHECK17-NEXT: br label [[COND_END]]
10795 // CHECK17: cond.end:
10796 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
10797 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10798 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10799 // CHECK17-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
10800 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10801 // CHECK17: omp.inner.for.cond:
10802 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10803 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10804 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
10805 // CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10806 // CHECK17: omp.inner.for.body:
10807 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10808 // CHECK17-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
10809 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10810 // CHECK17-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
10811 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV]], align 4
10812 // CHECK17-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
10813 // CHECK17-NEXT: store i32 [[TMP20]], i32* [[CONV7]], align 4
10814 // CHECK17-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
10815 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP21]])
10816 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10817 // CHECK17: omp.inner.for.inc:
10818 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10819 // CHECK17-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10820 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
10821 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
10822 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
10823 // CHECK17: omp.inner.for.end:
10824 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
10825 // CHECK17: omp.loop.exit:
10826 // CHECK17-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10827 // CHECK17-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4
10828 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]])
10829 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
10830 // CHECK17: omp.precond.end:
10831 // CHECK17-NEXT: ret void
10832 //
10833 //
10834 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..15
10835 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
10836 // CHECK17-NEXT: entry:
10837 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10838 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10839 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10840 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10841 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8
10842 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
10843 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8
10844 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
10845 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
10846 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
10847 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10848 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
10849 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
10850 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
10851 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
10852 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10853 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10854 // CHECK17-NEXT: [[I6:%.*]] = alloca i32, align 4
10855 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10856 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10857 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10858 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10859 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8
10860 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10861 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8
10862 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
10863 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
10864 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10865 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10866 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
10867 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
10868 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
10869 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10870 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
10871 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10872 // CHECK17-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
10873 // CHECK17-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
10874 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4
10875 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10876 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
10877 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10878 // CHECK17: omp.precond.then:
10879 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
10880 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
10881 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
10882 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10883 // CHECK17-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
10884 // CHECK17-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10885 // CHECK17-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32
10886 // CHECK17-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4
10887 // CHECK17-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
10888 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10889 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10890 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 4
10891 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10892 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10893 // CHECK17-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10894 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
10895 // CHECK17-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]])
10896 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
10897 // CHECK17: omp.dispatch.cond:
10898 // CHECK17-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10899 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
10900 // CHECK17-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
10901 // CHECK17-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0
10902 // CHECK17-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
10903 // CHECK17: omp.dispatch.body:
10904 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10905 // CHECK17-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4
10906 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
10907 // CHECK17: omp.inner.for.cond:
10908 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
10909 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18
10910 // CHECK17-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
10911 // CHECK17-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10912 // CHECK17: omp.inner.for.body:
10913 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
10914 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
10915 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10916 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !18
10917 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !18
10918 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64
10919 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
10920 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18
10921 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
10922 // CHECK17: omp.body.continue:
10923 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
10924 // CHECK17: omp.inner.for.inc:
10925 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
10926 // CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], 1
10927 // CHECK17-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
10928 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
10929 // CHECK17: omp.inner.for.end:
10930 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
10931 // CHECK17: omp.dispatch.inc:
10932 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]]
10933 // CHECK17: omp.dispatch.end:
10934 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
10935 // CHECK17: omp.precond.end:
10936 // CHECK17-NEXT: ret void
10937 //
10938 //
10939 // CHECK17-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
10940 // CHECK17-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {
10941 // CHECK17-NEXT: entry:
10942 // CHECK17-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
10943 // CHECK17-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
10944 // CHECK17-NEXT: [[M:%.*]] = alloca i32, align 4
10945 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
10946 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
10947 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
10948 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
10949 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8
10950 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8
10951 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8
10952 // CHECK17-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
10953 // CHECK17-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8
10954 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x i8*], align 8
10955 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x i8*], align 8
10956 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x i8*], align 8
10957 // CHECK17-NEXT: [[_TMP11:%.*]] = alloca i32, align 4
10958 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS15:%.*]] = alloca [1 x i8*], align 8
10959 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS16:%.*]] = alloca [1 x i8*], align 8
10960 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS17:%.*]] = alloca [1 x i8*], align 8
10961 // CHECK17-NEXT: [[_TMP18:%.*]] = alloca i32, align 4
10962 // CHECK17-NEXT: [[M_CASTED22:%.*]] = alloca i64, align 8
10963 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [2 x i8*], align 8
10964 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [2 x i8*], align 8
10965 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [2 x i8*], align 8
10966 // CHECK17-NEXT: [[_TMP27:%.*]] = alloca i32, align 4
10967 // CHECK17-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
10968 // CHECK17-NEXT: store i32 10, i32* [[M]], align 4
10969 // CHECK17-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
10970 // CHECK17-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
10971 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8
10972 // CHECK17-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
10973 // CHECK17-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
10974 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8
10975 // CHECK17-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
10976 // CHECK17-NEXT: store i8* null, i8** [[TMP4]], align 8
10977 // CHECK17-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
10978 // CHECK17-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
10979 // CHECK17-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
10980 // CHECK17-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
10981 // CHECK17-NEXT: store i32 1, i32* [[TMP7]], align 4
10982 // CHECK17-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
10983 // CHECK17-NEXT: store i32 1, i32* [[TMP8]], align 4
10984 // CHECK17-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
10985 // CHECK17-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 8
10986 // CHECK17-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
10987 // CHECK17-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 8
10988 // CHECK17-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
10989 // CHECK17-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.20, i32 0, i32 0), i64** [[TMP11]], align 8
10990 // CHECK17-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
10991 // CHECK17-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.21, i32 0, i32 0), i64** [[TMP12]], align 8
10992 // CHECK17-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
10993 // CHECK17-NEXT: store i8** null, i8*** [[TMP13]], align 8
10994 // CHECK17-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
10995 // CHECK17-NEXT: store i8** null, i8*** [[TMP14]], align 8
10996 // CHECK17-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
10997 // CHECK17-NEXT: store i64 10, i64* [[TMP15]], align 8
10998 // CHECK17-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
10999 // CHECK17-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
11000 // CHECK17-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
11001 // CHECK17: omp_offload.failed:
11002 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]]
11003 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]]
11004 // CHECK17: omp_offload.cont:
11005 // CHECK17-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
11006 // CHECK17-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]**
11007 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 8
11008 // CHECK17-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
11009 // CHECK17-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]**
11010 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 8
11011 // CHECK17-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0
11012 // CHECK17-NEXT: store i8* null, i8** [[TMP22]], align 8
11013 // CHECK17-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
11014 // CHECK17-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
11015 // CHECK17-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
11016 // CHECK17-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 0
11017 // CHECK17-NEXT: store i32 1, i32* [[TMP25]], align 4
11018 // CHECK17-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 1
11019 // CHECK17-NEXT: store i32 1, i32* [[TMP26]], align 4
11020 // CHECK17-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 2
11021 // CHECK17-NEXT: store i8** [[TMP23]], i8*** [[TMP27]], align 8
11022 // CHECK17-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 3
11023 // CHECK17-NEXT: store i8** [[TMP24]], i8*** [[TMP28]], align 8
11024 // CHECK17-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 4
11025 // CHECK17-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.24, i32 0, i32 0), i64** [[TMP29]], align 8
11026 // CHECK17-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 5
11027 // CHECK17-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.25, i32 0, i32 0), i64** [[TMP30]], align 8
11028 // CHECK17-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 6
11029 // CHECK17-NEXT: store i8** null, i8*** [[TMP31]], align 8
11030 // CHECK17-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 7
11031 // CHECK17-NEXT: store i8** null, i8*** [[TMP32]], align 8
11032 // CHECK17-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 8
11033 // CHECK17-NEXT: store i64 10, i64* [[TMP33]], align 8
11034 // CHECK17-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]])
11035 // CHECK17-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
11036 // CHECK17-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
11037 // CHECK17: omp_offload.failed6:
11038 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121([10 x i32]* [[A]]) #[[ATTR3]]
11039 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT7]]
11040 // CHECK17: omp_offload.cont7:
11041 // CHECK17-NEXT: [[TMP36:%.*]] = load i32, i32* [[M]], align 4
11042 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[M_CASTED]] to i32*
11043 // CHECK17-NEXT: store i32 [[TMP36]], i32* [[CONV]], align 4
11044 // CHECK17-NEXT: [[TMP37:%.*]] = load i64, i64* [[M_CASTED]], align 8
11045 // CHECK17-NEXT: [[TMP38:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
11046 // CHECK17-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64*
11047 // CHECK17-NEXT: store i64 [[TMP37]], i64* [[TMP39]], align 8
11048 // CHECK17-NEXT: [[TMP40:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
11049 // CHECK17-NEXT: [[TMP41:%.*]] = bitcast i8** [[TMP40]] to i64*
11050 // CHECK17-NEXT: store i64 [[TMP37]], i64* [[TMP41]], align 8
11051 // CHECK17-NEXT: [[TMP42:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 0
11052 // CHECK17-NEXT: store i8* null, i8** [[TMP42]], align 8
11053 // CHECK17-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1
11054 // CHECK17-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to [10 x i32]**
11055 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP44]], align 8
11056 // CHECK17-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 1
11057 // CHECK17-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to [10 x i32]**
11058 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP46]], align 8
11059 // CHECK17-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 1
11060 // CHECK17-NEXT: store i8* null, i8** [[TMP47]], align 8
11061 // CHECK17-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
11062 // CHECK17-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
11063 // CHECK17-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
11064 // CHECK17-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 0
11065 // CHECK17-NEXT: store i32 1, i32* [[TMP50]], align 4
11066 // CHECK17-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 1
11067 // CHECK17-NEXT: store i32 2, i32* [[TMP51]], align 4
11068 // CHECK17-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 2
11069 // CHECK17-NEXT: store i8** [[TMP48]], i8*** [[TMP52]], align 8
11070 // CHECK17-NEXT: [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 3
11071 // CHECK17-NEXT: store i8** [[TMP49]], i8*** [[TMP53]], align 8
11072 // CHECK17-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 4
11073 // CHECK17-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.28, i32 0, i32 0), i64** [[TMP54]], align 8
11074 // CHECK17-NEXT: [[TMP55:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 5
11075 // CHECK17-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.29, i32 0, i32 0), i64** [[TMP55]], align 8
11076 // CHECK17-NEXT: [[TMP56:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 6
11077 // CHECK17-NEXT: store i8** null, i8*** [[TMP56]], align 8
11078 // CHECK17-NEXT: [[TMP57:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 7
11079 // CHECK17-NEXT: store i8** null, i8*** [[TMP57]], align 8
11080 // CHECK17-NEXT: [[TMP58:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 8
11081 // CHECK17-NEXT: store i64 10, i64* [[TMP58]], align 8
11082 // CHECK17-NEXT: [[TMP59:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]])
11083 // CHECK17-NEXT: [[TMP60:%.*]] = icmp ne i32 [[TMP59]], 0
11084 // CHECK17-NEXT: br i1 [[TMP60]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]]
11085 // CHECK17: omp_offload.failed13:
11086 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i64 [[TMP37]], [10 x i32]* [[A]]) #[[ATTR3]]
11087 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT14]]
11088 // CHECK17: omp_offload.cont14:
11089 // CHECK17-NEXT: [[TMP61:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0
11090 // CHECK17-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to [10 x i32]**
11091 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP62]], align 8
11092 // CHECK17-NEXT: [[TMP63:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS16]], i32 0, i32 0
11093 // CHECK17-NEXT: [[TMP64:%.*]] = bitcast i8** [[TMP63]] to [10 x i32]**
11094 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP64]], align 8
11095 // CHECK17-NEXT: [[TMP65:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS17]], i64 0, i64 0
11096 // CHECK17-NEXT: store i8* null, i8** [[TMP65]], align 8
11097 // CHECK17-NEXT: [[TMP66:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0
11098 // CHECK17-NEXT: [[TMP67:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS16]], i32 0, i32 0
11099 // CHECK17-NEXT: [[KERNEL_ARGS19:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
11100 // CHECK17-NEXT: [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 0
11101 // CHECK17-NEXT: store i32 1, i32* [[TMP68]], align 4
11102 // CHECK17-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 1
11103 // CHECK17-NEXT: store i32 1, i32* [[TMP69]], align 4
11104 // CHECK17-NEXT: [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 2
11105 // CHECK17-NEXT: store i8** [[TMP66]], i8*** [[TMP70]], align 8
11106 // CHECK17-NEXT: [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 3
11107 // CHECK17-NEXT: store i8** [[TMP67]], i8*** [[TMP71]], align 8
11108 // CHECK17-NEXT: [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 4
11109 // CHECK17-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.32, i32 0, i32 0), i64** [[TMP72]], align 8
11110 // CHECK17-NEXT: [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 5
11111 // CHECK17-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.33, i32 0, i32 0), i64** [[TMP73]], align 8
11112 // CHECK17-NEXT: [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 6
11113 // CHECK17-NEXT: store i8** null, i8*** [[TMP74]], align 8
11114 // CHECK17-NEXT: [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 7
11115 // CHECK17-NEXT: store i8** null, i8*** [[TMP75]], align 8
11116 // CHECK17-NEXT: [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 8
11117 // CHECK17-NEXT: store i64 10, i64* [[TMP76]], align 8
11118 // CHECK17-NEXT: [[TMP77:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]])
11119 // CHECK17-NEXT: [[TMP78:%.*]] = icmp ne i32 [[TMP77]], 0
11120 // CHECK17-NEXT: br i1 [[TMP78]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]]
11121 // CHECK17: omp_offload.failed20:
11122 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131([10 x i32]* [[A]]) #[[ATTR3]]
11123 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT21]]
11124 // CHECK17: omp_offload.cont21:
11125 // CHECK17-NEXT: [[TMP79:%.*]] = load i32, i32* [[M]], align 4
11126 // CHECK17-NEXT: [[CONV23:%.*]] = bitcast i64* [[M_CASTED22]] to i32*
11127 // CHECK17-NEXT: store i32 [[TMP79]], i32* [[CONV23]], align 4
11128 // CHECK17-NEXT: [[TMP80:%.*]] = load i64, i64* [[M_CASTED22]], align 8
11129 // CHECK17-NEXT: [[TMP81:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
11130 // CHECK17-NEXT: [[TMP82:%.*]] = bitcast i8** [[TMP81]] to i64*
11131 // CHECK17-NEXT: store i64 [[TMP80]], i64* [[TMP82]], align 8
11132 // CHECK17-NEXT: [[TMP83:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
11133 // CHECK17-NEXT: [[TMP84:%.*]] = bitcast i8** [[TMP83]] to i64*
11134 // CHECK17-NEXT: store i64 [[TMP80]], i64* [[TMP84]], align 8
11135 // CHECK17-NEXT: [[TMP85:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 0
11136 // CHECK17-NEXT: store i8* null, i8** [[TMP85]], align 8
11137 // CHECK17-NEXT: [[TMP86:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 1
11138 // CHECK17-NEXT: [[TMP87:%.*]] = bitcast i8** [[TMP86]] to [10 x i32]**
11139 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP87]], align 8
11140 // CHECK17-NEXT: [[TMP88:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 1
11141 // CHECK17-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to [10 x i32]**
11142 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP89]], align 8
11143 // CHECK17-NEXT: [[TMP90:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 1
11144 // CHECK17-NEXT: store i8* null, i8** [[TMP90]], align 8
11145 // CHECK17-NEXT: [[TMP91:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
11146 // CHECK17-NEXT: [[TMP92:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
11147 // CHECK17-NEXT: [[KERNEL_ARGS28:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
11148 // CHECK17-NEXT: [[TMP93:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 0
11149 // CHECK17-NEXT: store i32 1, i32* [[TMP93]], align 4
11150 // CHECK17-NEXT: [[TMP94:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 1
11151 // CHECK17-NEXT: store i32 2, i32* [[TMP94]], align 4
11152 // CHECK17-NEXT: [[TMP95:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 2
11153 // CHECK17-NEXT: store i8** [[TMP91]], i8*** [[TMP95]], align 8
11154 // CHECK17-NEXT: [[TMP96:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 3
11155 // CHECK17-NEXT: store i8** [[TMP92]], i8*** [[TMP96]], align 8
11156 // CHECK17-NEXT: [[TMP97:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 4
11157 // CHECK17-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.36, i32 0, i32 0), i64** [[TMP97]], align 8
11158 // CHECK17-NEXT: [[TMP98:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 5
11159 // CHECK17-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.37, i32 0, i32 0), i64** [[TMP98]], align 8
11160 // CHECK17-NEXT: [[TMP99:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 6
11161 // CHECK17-NEXT: store i8** null, i8*** [[TMP99]], align 8
11162 // CHECK17-NEXT: [[TMP100:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 7
11163 // CHECK17-NEXT: store i8** null, i8*** [[TMP100]], align 8
11164 // CHECK17-NEXT: [[TMP101:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]], i32 0, i32 8
11165 // CHECK17-NEXT: store i64 10, i64* [[TMP101]], align 8
11166 // CHECK17-NEXT: [[TMP102:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS28]])
11167 // CHECK17-NEXT: [[TMP103:%.*]] = icmp ne i32 [[TMP102]], 0
11168 // CHECK17-NEXT: br i1 [[TMP103]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]]
11169 // CHECK17: omp_offload.failed29:
11170 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i64 [[TMP80]], [10 x i32]* [[A]]) #[[ATTR3]]
11171 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT30]]
11172 // CHECK17: omp_offload.cont30:
11173 // CHECK17-NEXT: ret i32 0
11174 //
11175 //
11176 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
11177 // CHECK17-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11178 // CHECK17-NEXT: entry:
11179 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11180 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11181 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11182 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
11183 // CHECK17-NEXT: ret void
11184 //
11185 //
11186 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..18
11187 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11188 // CHECK17-NEXT: entry:
11189 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11190 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11191 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11192 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11193 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
11194 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11195 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11196 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11197 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11198 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
11199 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11200 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11201 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11202 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11203 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11204 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
11205 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11206 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11207 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11208 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
11209 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11210 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11211 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
11212 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11213 // CHECK17: cond.true:
11214 // CHECK17-NEXT: br label [[COND_END:%.*]]
11215 // CHECK17: cond.false:
11216 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11217 // CHECK17-NEXT: br label [[COND_END]]
11218 // CHECK17: cond.end:
11219 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
11220 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11221 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11222 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
11223 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11224 // CHECK17: omp.inner.for.cond:
11225 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11226 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11227 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
11228 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11229 // CHECK17: omp.inner.for.body:
11230 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11231 // CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
11232 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11233 // CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
11234 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..19 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
11235 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11236 // CHECK17: omp.inner.for.inc:
11237 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11238 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
11239 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
11240 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
11241 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
11242 // CHECK17: omp.inner.for.end:
11243 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11244 // CHECK17: omp.loop.exit:
11245 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
11246 // CHECK17-NEXT: ret void
11247 //
11248 //
11249 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..19
11250 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11251 // CHECK17-NEXT: entry:
11252 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11253 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11254 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11255 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11256 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11257 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11258 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
11259 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
11260 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
11261 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11262 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11263 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
11264 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11265 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11266 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11267 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11268 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11269 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11270 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
11271 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
11272 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11273 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
11274 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11275 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
11276 // CHECK17-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
11277 // CHECK17-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
11278 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11279 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11280 // CHECK17-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11281 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
11282 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11283 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11284 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
11285 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11286 // CHECK17: cond.true:
11287 // CHECK17-NEXT: br label [[COND_END:%.*]]
11288 // CHECK17: cond.false:
11289 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11290 // CHECK17-NEXT: br label [[COND_END]]
11291 // CHECK17: cond.end:
11292 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
11293 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
11294 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11295 // CHECK17-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
11296 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11297 // CHECK17: omp.inner.for.cond:
11298 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11299 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11300 // CHECK17-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
11301 // CHECK17-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11302 // CHECK17: omp.inner.for.body:
11303 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11304 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
11305 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11306 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4
11307 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
11308 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
11309 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
11310 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
11311 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
11312 // CHECK17: omp.body.continue:
11313 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11314 // CHECK17: omp.inner.for.inc:
11315 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11316 // CHECK17-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
11317 // CHECK17-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
11318 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
11319 // CHECK17: omp.inner.for.end:
11320 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11321 // CHECK17: omp.loop.exit:
11322 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
11323 // CHECK17-NEXT: ret void
11324 //
11325 //
11326 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121
11327 // CHECK17-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11328 // CHECK17-NEXT: entry:
11329 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11330 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11331 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11332 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..22 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
11333 // CHECK17-NEXT: ret void
11334 //
11335 //
11336 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..22
11337 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11338 // CHECK17-NEXT: entry:
11339 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11340 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11341 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11342 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11343 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
11344 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11345 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11346 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11347 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11348 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
11349 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11350 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11351 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11352 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11353 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11354 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
11355 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11356 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11357 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11358 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
11359 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11360 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11361 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
11362 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11363 // CHECK17: cond.true:
11364 // CHECK17-NEXT: br label [[COND_END:%.*]]
11365 // CHECK17: cond.false:
11366 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11367 // CHECK17-NEXT: br label [[COND_END]]
11368 // CHECK17: cond.end:
11369 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
11370 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11371 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11372 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
11373 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11374 // CHECK17: omp.inner.for.cond:
11375 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11376 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11377 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
11378 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11379 // CHECK17: omp.inner.for.body:
11380 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11381 // CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
11382 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11383 // CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
11384 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..23 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
11385 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11386 // CHECK17: omp.inner.for.inc:
11387 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11388 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
11389 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
11390 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
11391 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
11392 // CHECK17: omp.inner.for.end:
11393 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11394 // CHECK17: omp.loop.exit:
11395 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
11396 // CHECK17-NEXT: ret void
11397 //
11398 //
11399 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..23
11400 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11401 // CHECK17-NEXT: entry:
11402 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11403 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11404 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11405 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11406 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11407 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11408 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
11409 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
11410 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
11411 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11412 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11413 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
11414 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11415 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11416 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11417 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11418 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11419 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11420 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
11421 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
11422 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11423 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
11424 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11425 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
11426 // CHECK17-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
11427 // CHECK17-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
11428 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11429 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11430 // CHECK17-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11431 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
11432 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11433 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11434 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
11435 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11436 // CHECK17: cond.true:
11437 // CHECK17-NEXT: br label [[COND_END:%.*]]
11438 // CHECK17: cond.false:
11439 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11440 // CHECK17-NEXT: br label [[COND_END]]
11441 // CHECK17: cond.end:
11442 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
11443 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
11444 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11445 // CHECK17-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
11446 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11447 // CHECK17: omp.inner.for.cond:
11448 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11449 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11450 // CHECK17-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
11451 // CHECK17-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11452 // CHECK17: omp.inner.for.body:
11453 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11454 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
11455 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11456 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4
11457 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
11458 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
11459 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
11460 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
11461 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
11462 // CHECK17: omp.body.continue:
11463 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11464 // CHECK17: omp.inner.for.inc:
11465 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11466 // CHECK17-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
11467 // CHECK17-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
11468 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
11469 // CHECK17: omp.inner.for.end:
11470 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11471 // CHECK17: omp.loop.exit:
11472 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
11473 // CHECK17-NEXT: ret void
11474 //
11475 //
11476 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126
11477 // CHECK17-SAME: (i64 noundef [[M:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11478 // CHECK17-NEXT: entry:
11479 // CHECK17-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
11480 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11481 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
11482 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
11483 // CHECK17-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8
11484 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11485 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
11486 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11487 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4
11488 // CHECK17-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
11489 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11490 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
11491 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
11492 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
11493 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..26 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]])
11494 // CHECK17-NEXT: ret void
11495 //
11496 //
11497 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..26
11498 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
11499 // CHECK17-NEXT: entry:
11500 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11501 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11502 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11503 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11504 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11505 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
11506 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11507 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11508 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11509 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11510 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
11511 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
11512 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11513 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11514 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11515 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
11516 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11517 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
11518 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11519 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
11520 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11521 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11522 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11523 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
11524 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11525 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11526 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
11527 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11528 // CHECK17: cond.true:
11529 // CHECK17-NEXT: br label [[COND_END:%.*]]
11530 // CHECK17: cond.false:
11531 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11532 // CHECK17-NEXT: br label [[COND_END]]
11533 // CHECK17: cond.end:
11534 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
11535 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11536 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11537 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
11538 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11539 // CHECK17: omp.inner.for.cond:
11540 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11541 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11542 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
11543 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11544 // CHECK17: omp.inner.for.body:
11545 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11546 // CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
11547 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11548 // CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
11549 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 4
11550 // CHECK17-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
11551 // CHECK17-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4
11552 // CHECK17-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
11553 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..27 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]])
11554 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11555 // CHECK17: omp.inner.for.inc:
11556 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11557 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
11558 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
11559 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
11560 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
11561 // CHECK17: omp.inner.for.end:
11562 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11563 // CHECK17: omp.loop.exit:
11564 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
11565 // CHECK17-NEXT: ret void
11566 //
11567 //
11568 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..27
11569 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
11570 // CHECK17-NEXT: entry:
11571 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11572 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11573 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11574 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11575 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11576 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11577 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11578 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
11579 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
11580 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
11581 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11582 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11583 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
11584 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11585 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11586 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11587 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11588 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11589 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
11590 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11591 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
11592 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
11593 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
11594 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11595 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
11596 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11597 // CHECK17-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
11598 // CHECK17-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
11599 // CHECK17-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
11600 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11601 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11602 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
11603 // CHECK17-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11604 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
11605 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
11606 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
11607 // CHECK17: omp.dispatch.cond:
11608 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11609 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11610 // CHECK17-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
11611 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]]
11612 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11613 // CHECK17: cond.true:
11614 // CHECK17-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11615 // CHECK17-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32
11616 // CHECK17-NEXT: br label [[COND_END:%.*]]
11617 // CHECK17: cond.false:
11618 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11619 // CHECK17-NEXT: br label [[COND_END]]
11620 // CHECK17: cond.end:
11621 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
11622 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
11623 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11624 // CHECK17-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
11625 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11626 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11627 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
11628 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
11629 // CHECK17: omp.dispatch.body:
11630 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11631 // CHECK17: omp.inner.for.cond:
11632 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11633 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11634 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
11635 // CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11636 // CHECK17: omp.inner.for.body:
11637 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11638 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
11639 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11640 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4
11641 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4
11642 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
11643 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
11644 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
11645 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
11646 // CHECK17: omp.body.continue:
11647 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11648 // CHECK17: omp.inner.for.inc:
11649 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11650 // CHECK17-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1
11651 // CHECK17-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
11652 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
11653 // CHECK17: omp.inner.for.end:
11654 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
11655 // CHECK17: omp.dispatch.inc:
11656 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11657 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
11658 // CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
11659 // CHECK17-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
11660 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11661 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
11662 // CHECK17-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
11663 // CHECK17-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
11664 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]]
11665 // CHECK17: omp.dispatch.end:
11666 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
11667 // CHECK17-NEXT: ret void
11668 //
11669 //
11670 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131
11671 // CHECK17-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11672 // CHECK17-NEXT: entry:
11673 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11674 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11675 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11676 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..30 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
11677 // CHECK17-NEXT: ret void
11678 //
11679 //
11680 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..30
11681 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11682 // CHECK17-NEXT: entry:
11683 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11684 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11685 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11686 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11687 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
11688 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11689 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11690 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11691 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11692 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
11693 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11694 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11695 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11696 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11697 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11698 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
11699 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11700 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11701 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11702 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
11703 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11704 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11705 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
11706 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11707 // CHECK17: cond.true:
11708 // CHECK17-NEXT: br label [[COND_END:%.*]]
11709 // CHECK17: cond.false:
11710 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11711 // CHECK17-NEXT: br label [[COND_END]]
11712 // CHECK17: cond.end:
11713 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
11714 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11715 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11716 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
11717 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11718 // CHECK17: omp.inner.for.cond:
11719 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11720 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11721 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
11722 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11723 // CHECK17: omp.inner.for.body:
11724 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11725 // CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
11726 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11727 // CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
11728 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..31 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
11729 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11730 // CHECK17: omp.inner.for.inc:
11731 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11732 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
11733 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
11734 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
11735 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
11736 // CHECK17: omp.inner.for.end:
11737 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11738 // CHECK17: omp.loop.exit:
11739 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
11740 // CHECK17-NEXT: ret void
11741 //
11742 //
11743 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..31
11744 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11745 // CHECK17-NEXT: entry:
11746 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11747 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11748 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11749 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11750 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11751 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11752 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
11753 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
11754 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
11755 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11756 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11757 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
11758 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11759 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11760 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11761 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11762 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11763 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11764 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
11765 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
11766 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11767 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
11768 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11769 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
11770 // CHECK17-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
11771 // CHECK17-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
11772 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11773 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11774 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11775 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11776 // CHECK17-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11777 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
11778 // CHECK17-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
11779 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
11780 // CHECK17: omp.dispatch.cond:
11781 // CHECK17-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
11782 // CHECK17-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
11783 // CHECK17-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
11784 // CHECK17: omp.dispatch.body:
11785 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11786 // CHECK17-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
11787 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11788 // CHECK17: omp.inner.for.cond:
11789 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
11790 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21
11791 // CHECK17-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
11792 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11793 // CHECK17: omp.inner.for.body:
11794 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
11795 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
11796 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11797 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21
11798 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21
11799 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
11800 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
11801 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21
11802 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
11803 // CHECK17: omp.body.continue:
11804 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11805 // CHECK17: omp.inner.for.inc:
11806 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
11807 // CHECK17-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
11808 // CHECK17-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
11809 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
11810 // CHECK17: omp.inner.for.end:
11811 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
11812 // CHECK17: omp.dispatch.inc:
11813 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]]
11814 // CHECK17: omp.dispatch.end:
11815 // CHECK17-NEXT: ret void
11816 //
11817 //
11818 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136
11819 // CHECK17-SAME: (i64 noundef [[M:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11820 // CHECK17-NEXT: entry:
11821 // CHECK17-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
11822 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11823 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
11824 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
11825 // CHECK17-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8
11826 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11827 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
11828 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11829 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4
11830 // CHECK17-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
11831 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11832 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
11833 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4
11834 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
11835 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..34 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]])
11836 // CHECK17-NEXT: ret void
11837 //
11838 //
11839 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..34
11840 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
11841 // CHECK17-NEXT: entry:
11842 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11843 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11844 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11845 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11846 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11847 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
11848 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11849 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11850 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11851 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11852 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
11853 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
11854 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11855 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11856 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11857 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
11858 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11859 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
11860 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11861 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
11862 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11863 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11864 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11865 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
11866 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11867 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11868 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
11869 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11870 // CHECK17: cond.true:
11871 // CHECK17-NEXT: br label [[COND_END:%.*]]
11872 // CHECK17: cond.false:
11873 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11874 // CHECK17-NEXT: br label [[COND_END]]
11875 // CHECK17: cond.end:
11876 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
11877 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11878 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11879 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
11880 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11881 // CHECK17: omp.inner.for.cond:
11882 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11883 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11884 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
11885 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11886 // CHECK17: omp.inner.for.body:
11887 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11888 // CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
11889 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11890 // CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
11891 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 4
11892 // CHECK17-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
11893 // CHECK17-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4
11894 // CHECK17-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
11895 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..35 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]])
11896 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11897 // CHECK17: omp.inner.for.inc:
11898 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11899 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
11900 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
11901 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
11902 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
11903 // CHECK17: omp.inner.for.end:
11904 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
11905 // CHECK17: omp.loop.exit:
11906 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
11907 // CHECK17-NEXT: ret void
11908 //
11909 //
11910 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..35
11911 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
11912 // CHECK17-NEXT: entry:
11913 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11914 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11915 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11916 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11917 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
11918 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11919 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
11920 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
11921 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
11922 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
11923 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11924 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11925 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
11926 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11927 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11928 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11929 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11930 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
11931 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
11932 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
11933 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
11934 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
11935 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
11936 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11937 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
11938 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11939 // CHECK17-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
11940 // CHECK17-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
11941 // CHECK17-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
11942 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11943 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11944 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4
11945 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11946 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11947 // CHECK17-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11948 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
11949 // CHECK17-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
11950 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
11951 // CHECK17: omp.dispatch.cond:
11952 // CHECK17-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
11953 // CHECK17-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
11954 // CHECK17-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
11955 // CHECK17: omp.dispatch.body:
11956 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11957 // CHECK17-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
11958 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
11959 // CHECK17: omp.inner.for.cond:
11960 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
11961 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !24
11962 // CHECK17-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
11963 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11964 // CHECK17: omp.inner.for.body:
11965 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
11966 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
11967 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11968 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !24
11969 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !24
11970 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
11971 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
11972 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !24
11973 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
11974 // CHECK17: omp.body.continue:
11975 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
11976 // CHECK17: omp.inner.for.inc:
11977 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
11978 // CHECK17-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1
11979 // CHECK17-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
11980 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
11981 // CHECK17: omp.inner.for.end:
11982 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
11983 // CHECK17: omp.dispatch.inc:
11984 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]]
11985 // CHECK17: omp.dispatch.end:
11986 // CHECK17-NEXT: ret void
11987 //
11988 //
11989 // CHECK17-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
11990 // CHECK17-SAME: () #[[ATTR6:[0-9]+]] {
11991 // CHECK17-NEXT: entry:
11992 // CHECK17-NEXT: call void @__tgt_register_requires(i64 1)
11993 // CHECK17-NEXT: ret void
11994 //
11995 //
11996 // CHECK19-LABEL: define {{[^@]+}}@main
11997 // CHECK19-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
11998 // CHECK19-NEXT: entry:
11999 // CHECK19-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
12000 // CHECK19-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
12001 // CHECK19-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4
12002 // CHECK19-NEXT: [[N:%.*]] = alloca i32, align 4
12003 // CHECK19-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4
12004 // CHECK19-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
12005 // CHECK19-NEXT: [[M:%.*]] = alloca i32, align 4
12006 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
12007 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
12008 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
12009 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
12010 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
12011 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
12012 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
12013 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
12014 // CHECK19-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4
12015 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4
12016 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4
12017 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4
12018 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4
12019 // CHECK19-NEXT: [[_TMP8:%.*]] = alloca i32, align 4
12020 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
12021 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
12022 // CHECK19-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4
12023 // CHECK19-NEXT: [[N_CASTED18:%.*]] = alloca i32, align 4
12024 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [4 x i8*], align 4
12025 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS20:%.*]] = alloca [4 x i8*], align 4
12026 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [4 x i8*], align 4
12027 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES22:%.*]] = alloca [4 x i64], align 4
12028 // CHECK19-NEXT: [[_TMP23:%.*]] = alloca i32, align 4
12029 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4
12030 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4
12031 // CHECK19-NEXT: [[N_CASTED33:%.*]] = alloca i32, align 4
12032 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS34:%.*]] = alloca [3 x i8*], align 4
12033 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS35:%.*]] = alloca [3 x i8*], align 4
12034 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS36:%.*]] = alloca [3 x i8*], align 4
12035 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES37:%.*]] = alloca [3 x i64], align 4
12036 // CHECK19-NEXT: [[_TMP38:%.*]] = alloca i32, align 4
12037 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_39:%.*]] = alloca i32, align 4
12038 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 4
12039 // CHECK19-NEXT: [[M_CASTED48:%.*]] = alloca i32, align 4
12040 // CHECK19-NEXT: [[N_CASTED49:%.*]] = alloca i32, align 4
12041 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS50:%.*]] = alloca [4 x i8*], align 4
12042 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS51:%.*]] = alloca [4 x i8*], align 4
12043 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS52:%.*]] = alloca [4 x i8*], align 4
12044 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES53:%.*]] = alloca [4 x i64], align 4
12045 // CHECK19-NEXT: [[_TMP54:%.*]] = alloca i32, align 4
12046 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_55:%.*]] = alloca i32, align 4
12047 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_56:%.*]] = alloca i32, align 4
12048 // CHECK19-NEXT: store i32 0, i32* [[RETVAL]], align 4
12049 // CHECK19-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
12050 // CHECK19-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
12051 // CHECK19-NEXT: store i32 100, i32* [[N]], align 4
12052 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4
12053 // CHECK19-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave()
12054 // CHECK19-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
12055 // CHECK19-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
12056 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
12057 // CHECK19-NEXT: store i32 10, i32* [[M]], align 4
12058 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4
12059 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4
12060 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
12061 // CHECK19-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4
12062 // CHECK19-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64
12063 // CHECK19-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8*
12064 // CHECK19-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes to i8*), i32 24, i1 false)
12065 // CHECK19-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
12066 // CHECK19-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32*
12067 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4
12068 // CHECK19-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
12069 // CHECK19-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32*
12070 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4
12071 // CHECK19-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
12072 // CHECK19-NEXT: store i8* null, i8** [[TMP11]], align 4
12073 // CHECK19-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
12074 // CHECK19-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
12075 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4
12076 // CHECK19-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
12077 // CHECK19-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
12078 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4
12079 // CHECK19-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
12080 // CHECK19-NEXT: store i8* null, i8** [[TMP16]], align 4
12081 // CHECK19-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
12082 // CHECK19-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32**
12083 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 4
12084 // CHECK19-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
12085 // CHECK19-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32**
12086 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 4
12087 // CHECK19-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
12088 // CHECK19-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 4
12089 // CHECK19-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
12090 // CHECK19-NEXT: store i8* null, i8** [[TMP22]], align 4
12091 // CHECK19-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
12092 // CHECK19-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
12093 // CHECK19-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
12094 // CHECK19-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4
12095 // CHECK19-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4
12096 // CHECK19-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12097 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0
12098 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
12099 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
12100 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
12101 // CHECK19-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12102 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1
12103 // CHECK19-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64
12104 // CHECK19-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
12105 // CHECK19-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
12106 // CHECK19-NEXT: store i32 1, i32* [[TMP30]], align 4
12107 // CHECK19-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
12108 // CHECK19-NEXT: store i32 3, i32* [[TMP31]], align 4
12109 // CHECK19-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
12110 // CHECK19-NEXT: store i8** [[TMP23]], i8*** [[TMP32]], align 4
12111 // CHECK19-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
12112 // CHECK19-NEXT: store i8** [[TMP24]], i8*** [[TMP33]], align 4
12113 // CHECK19-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
12114 // CHECK19-NEXT: store i64* [[TMP25]], i64** [[TMP34]], align 4
12115 // CHECK19-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
12116 // CHECK19-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i64** [[TMP35]], align 4
12117 // CHECK19-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
12118 // CHECK19-NEXT: store i8** null, i8*** [[TMP36]], align 4
12119 // CHECK19-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
12120 // CHECK19-NEXT: store i8** null, i8*** [[TMP37]], align 4
12121 // CHECK19-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
12122 // CHECK19-NEXT: store i64 [[TMP29]], i64* [[TMP38]], align 8
12123 // CHECK19-NEXT: [[TMP39:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
12124 // CHECK19-NEXT: [[TMP40:%.*]] = icmp ne i32 [[TMP39]], 0
12125 // CHECK19-NEXT: br i1 [[TMP40]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
12126 // CHECK19: omp_offload.failed:
12127 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
12128 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]]
12129 // CHECK19: omp_offload.cont:
12130 // CHECK19-NEXT: [[TMP41:%.*]] = load i32, i32* [[N]], align 4
12131 // CHECK19-NEXT: store i32 [[TMP41]], i32* [[N_CASTED3]], align 4
12132 // CHECK19-NEXT: [[TMP42:%.*]] = load i32, i32* [[N_CASTED3]], align 4
12133 // CHECK19-NEXT: [[TMP43:%.*]] = mul nuw i32 [[TMP0]], 4
12134 // CHECK19-NEXT: [[TMP44:%.*]] = sext i32 [[TMP43]] to i64
12135 // CHECK19-NEXT: [[TMP45:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES7]] to i8*
12136 // CHECK19-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP45]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.4 to i8*), i32 24, i1 false)
12137 // CHECK19-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
12138 // CHECK19-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to i32*
12139 // CHECK19-NEXT: store i32 [[TMP42]], i32* [[TMP47]], align 4
12140 // CHECK19-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
12141 // CHECK19-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32*
12142 // CHECK19-NEXT: store i32 [[TMP42]], i32* [[TMP49]], align 4
12143 // CHECK19-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0
12144 // CHECK19-NEXT: store i8* null, i8** [[TMP50]], align 4
12145 // CHECK19-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
12146 // CHECK19-NEXT: [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32*
12147 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP52]], align 4
12148 // CHECK19-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
12149 // CHECK19-NEXT: [[TMP54:%.*]] = bitcast i8** [[TMP53]] to i32*
12150 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP54]], align 4
12151 // CHECK19-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1
12152 // CHECK19-NEXT: store i8* null, i8** [[TMP55]], align 4
12153 // CHECK19-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
12154 // CHECK19-NEXT: [[TMP57:%.*]] = bitcast i8** [[TMP56]] to i32**
12155 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP57]], align 4
12156 // CHECK19-NEXT: [[TMP58:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
12157 // CHECK19-NEXT: [[TMP59:%.*]] = bitcast i8** [[TMP58]] to i32**
12158 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP59]], align 4
12159 // CHECK19-NEXT: [[TMP60:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
12160 // CHECK19-NEXT: store i64 [[TMP44]], i64* [[TMP60]], align 4
12161 // CHECK19-NEXT: [[TMP61:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2
12162 // CHECK19-NEXT: store i8* null, i8** [[TMP61]], align 4
12163 // CHECK19-NEXT: [[TMP62:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
12164 // CHECK19-NEXT: [[TMP63:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
12165 // CHECK19-NEXT: [[TMP64:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
12166 // CHECK19-NEXT: [[TMP65:%.*]] = load i32, i32* [[N]], align 4
12167 // CHECK19-NEXT: store i32 [[TMP65]], i32* [[DOTCAPTURE_EXPR_9]], align 4
12168 // CHECK19-NEXT: [[TMP66:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4
12169 // CHECK19-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP66]], 0
12170 // CHECK19-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
12171 // CHECK19-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
12172 // CHECK19-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4
12173 // CHECK19-NEXT: [[TMP67:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
12174 // CHECK19-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP67]], 1
12175 // CHECK19-NEXT: [[TMP68:%.*]] = zext i32 [[ADD14]] to i64
12176 // CHECK19-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
12177 // CHECK19-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 0
12178 // CHECK19-NEXT: store i32 1, i32* [[TMP69]], align 4
12179 // CHECK19-NEXT: [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 1
12180 // CHECK19-NEXT: store i32 3, i32* [[TMP70]], align 4
12181 // CHECK19-NEXT: [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 2
12182 // CHECK19-NEXT: store i8** [[TMP62]], i8*** [[TMP71]], align 4
12183 // CHECK19-NEXT: [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 3
12184 // CHECK19-NEXT: store i8** [[TMP63]], i8*** [[TMP72]], align 4
12185 // CHECK19-NEXT: [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 4
12186 // CHECK19-NEXT: store i64* [[TMP64]], i64** [[TMP73]], align 4
12187 // CHECK19-NEXT: [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 5
12188 // CHECK19-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i64** [[TMP74]], align 4
12189 // CHECK19-NEXT: [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 6
12190 // CHECK19-NEXT: store i8** null, i8*** [[TMP75]], align 4
12191 // CHECK19-NEXT: [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 7
12192 // CHECK19-NEXT: store i8** null, i8*** [[TMP76]], align 4
12193 // CHECK19-NEXT: [[TMP77:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]], i32 0, i32 8
12194 // CHECK19-NEXT: store i64 [[TMP68]], i64* [[TMP77]], align 8
12195 // CHECK19-NEXT: [[TMP78:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS15]])
12196 // CHECK19-NEXT: [[TMP79:%.*]] = icmp ne i32 [[TMP78]], 0
12197 // CHECK19-NEXT: br i1 [[TMP79]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
12198 // CHECK19: omp_offload.failed16:
12199 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i32 [[TMP42]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
12200 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT17]]
12201 // CHECK19: omp_offload.cont17:
12202 // CHECK19-NEXT: [[TMP80:%.*]] = load i32, i32* [[M]], align 4
12203 // CHECK19-NEXT: store i32 [[TMP80]], i32* [[M_CASTED]], align 4
12204 // CHECK19-NEXT: [[TMP81:%.*]] = load i32, i32* [[M_CASTED]], align 4
12205 // CHECK19-NEXT: [[TMP82:%.*]] = load i32, i32* [[N]], align 4
12206 // CHECK19-NEXT: store i32 [[TMP82]], i32* [[N_CASTED18]], align 4
12207 // CHECK19-NEXT: [[TMP83:%.*]] = load i32, i32* [[N_CASTED18]], align 4
12208 // CHECK19-NEXT: [[TMP84:%.*]] = mul nuw i32 [[TMP0]], 4
12209 // CHECK19-NEXT: [[TMP85:%.*]] = sext i32 [[TMP84]] to i64
12210 // CHECK19-NEXT: [[TMP86:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES22]] to i8*
12211 // CHECK19-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP86]], i8* align 4 bitcast ([4 x i64]* @.offload_sizes.8 to i8*), i32 32, i1 false)
12212 // CHECK19-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
12213 // CHECK19-NEXT: [[TMP88:%.*]] = bitcast i8** [[TMP87]] to i32*
12214 // CHECK19-NEXT: store i32 [[TMP81]], i32* [[TMP88]], align 4
12215 // CHECK19-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
12216 // CHECK19-NEXT: [[TMP90:%.*]] = bitcast i8** [[TMP89]] to i32*
12217 // CHECK19-NEXT: store i32 [[TMP81]], i32* [[TMP90]], align 4
12218 // CHECK19-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 0
12219 // CHECK19-NEXT: store i8* null, i8** [[TMP91]], align 4
12220 // CHECK19-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 1
12221 // CHECK19-NEXT: [[TMP93:%.*]] = bitcast i8** [[TMP92]] to i32*
12222 // CHECK19-NEXT: store i32 [[TMP83]], i32* [[TMP93]], align 4
12223 // CHECK19-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 1
12224 // CHECK19-NEXT: [[TMP95:%.*]] = bitcast i8** [[TMP94]] to i32*
12225 // CHECK19-NEXT: store i32 [[TMP83]], i32* [[TMP95]], align 4
12226 // CHECK19-NEXT: [[TMP96:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 1
12227 // CHECK19-NEXT: store i8* null, i8** [[TMP96]], align 4
12228 // CHECK19-NEXT: [[TMP97:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 2
12229 // CHECK19-NEXT: [[TMP98:%.*]] = bitcast i8** [[TMP97]] to i32*
12230 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP98]], align 4
12231 // CHECK19-NEXT: [[TMP99:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 2
12232 // CHECK19-NEXT: [[TMP100:%.*]] = bitcast i8** [[TMP99]] to i32*
12233 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP100]], align 4
12234 // CHECK19-NEXT: [[TMP101:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 2
12235 // CHECK19-NEXT: store i8* null, i8** [[TMP101]], align 4
12236 // CHECK19-NEXT: [[TMP102:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 3
12237 // CHECK19-NEXT: [[TMP103:%.*]] = bitcast i8** [[TMP102]] to i32**
12238 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP103]], align 4
12239 // CHECK19-NEXT: [[TMP104:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 3
12240 // CHECK19-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to i32**
12241 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP105]], align 4
12242 // CHECK19-NEXT: [[TMP106:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 3
12243 // CHECK19-NEXT: store i64 [[TMP85]], i64* [[TMP106]], align 4
12244 // CHECK19-NEXT: [[TMP107:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 3
12245 // CHECK19-NEXT: store i8* null, i8** [[TMP107]], align 4
12246 // CHECK19-NEXT: [[TMP108:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
12247 // CHECK19-NEXT: [[TMP109:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
12248 // CHECK19-NEXT: [[TMP110:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES22]], i32 0, i32 0
12249 // CHECK19-NEXT: [[TMP111:%.*]] = load i32, i32* [[N]], align 4
12250 // CHECK19-NEXT: store i32 [[TMP111]], i32* [[DOTCAPTURE_EXPR_24]], align 4
12251 // CHECK19-NEXT: [[TMP112:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4
12252 // CHECK19-NEXT: [[SUB26:%.*]] = sub nsw i32 [[TMP112]], 0
12253 // CHECK19-NEXT: [[DIV27:%.*]] = sdiv i32 [[SUB26]], 1
12254 // CHECK19-NEXT: [[SUB28:%.*]] = sub nsw i32 [[DIV27]], 1
12255 // CHECK19-NEXT: store i32 [[SUB28]], i32* [[DOTCAPTURE_EXPR_25]], align 4
12256 // CHECK19-NEXT: [[TMP113:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_25]], align 4
12257 // CHECK19-NEXT: [[ADD29:%.*]] = add nsw i32 [[TMP113]], 1
12258 // CHECK19-NEXT: [[TMP114:%.*]] = zext i32 [[ADD29]] to i64
12259 // CHECK19-NEXT: [[KERNEL_ARGS30:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
12260 // CHECK19-NEXT: [[TMP115:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS30]], i32 0, i32 0
12261 // CHECK19-NEXT: store i32 1, i32* [[TMP115]], align 4
12262 // CHECK19-NEXT: [[TMP116:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS30]], i32 0, i32 1
12263 // CHECK19-NEXT: store i32 4, i32* [[TMP116]], align 4
12264 // CHECK19-NEXT: [[TMP117:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS30]], i32 0, i32 2
12265 // CHECK19-NEXT: store i8** [[TMP108]], i8*** [[TMP117]], align 4
12266 // CHECK19-NEXT: [[TMP118:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS30]], i32 0, i32 3
12267 // CHECK19-NEXT: store i8** [[TMP109]], i8*** [[TMP118]], align 4
12268 // CHECK19-NEXT: [[TMP119:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS30]], i32 0, i32 4
12269 // CHECK19-NEXT: store i64* [[TMP110]], i64** [[TMP119]], align 4
12270 // CHECK19-NEXT: [[TMP120:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS30]], i32 0, i32 5
12271 // CHECK19-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.9, i32 0, i32 0), i64** [[TMP120]], align 4
12272 // CHECK19-NEXT: [[TMP121:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS30]], i32 0, i32 6
12273 // CHECK19-NEXT: store i8** null, i8*** [[TMP121]], align 4
12274 // CHECK19-NEXT: [[TMP122:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS30]], i32 0, i32 7
12275 // CHECK19-NEXT: store i8** null, i8*** [[TMP122]], align 4
12276 // CHECK19-NEXT: [[TMP123:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS30]], i32 0, i32 8
12277 // CHECK19-NEXT: store i64 [[TMP114]], i64* [[TMP123]], align 8
12278 // CHECK19-NEXT: [[TMP124:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS30]])
12279 // CHECK19-NEXT: [[TMP125:%.*]] = icmp ne i32 [[TMP124]], 0
12280 // CHECK19-NEXT: br i1 [[TMP125]], label [[OMP_OFFLOAD_FAILED31:%.*]], label [[OMP_OFFLOAD_CONT32:%.*]]
12281 // CHECK19: omp_offload.failed31:
12282 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i32 [[TMP81]], i32 [[TMP83]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
12283 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT32]]
12284 // CHECK19: omp_offload.cont32:
12285 // CHECK19-NEXT: [[TMP126:%.*]] = load i32, i32* [[N]], align 4
12286 // CHECK19-NEXT: store i32 [[TMP126]], i32* [[N_CASTED33]], align 4
12287 // CHECK19-NEXT: [[TMP127:%.*]] = load i32, i32* [[N_CASTED33]], align 4
12288 // CHECK19-NEXT: [[TMP128:%.*]] = mul nuw i32 [[TMP0]], 4
12289 // CHECK19-NEXT: [[TMP129:%.*]] = sext i32 [[TMP128]] to i64
12290 // CHECK19-NEXT: [[TMP130:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES37]] to i8*
12291 // CHECK19-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP130]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.12 to i8*), i32 24, i1 false)
12292 // CHECK19-NEXT: [[TMP131:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 0
12293 // CHECK19-NEXT: [[TMP132:%.*]] = bitcast i8** [[TMP131]] to i32*
12294 // CHECK19-NEXT: store i32 [[TMP127]], i32* [[TMP132]], align 4
12295 // CHECK19-NEXT: [[TMP133:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS35]], i32 0, i32 0
12296 // CHECK19-NEXT: [[TMP134:%.*]] = bitcast i8** [[TMP133]] to i32*
12297 // CHECK19-NEXT: store i32 [[TMP127]], i32* [[TMP134]], align 4
12298 // CHECK19-NEXT: [[TMP135:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS36]], i32 0, i32 0
12299 // CHECK19-NEXT: store i8* null, i8** [[TMP135]], align 4
12300 // CHECK19-NEXT: [[TMP136:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 1
12301 // CHECK19-NEXT: [[TMP137:%.*]] = bitcast i8** [[TMP136]] to i32*
12302 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP137]], align 4
12303 // CHECK19-NEXT: [[TMP138:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS35]], i32 0, i32 1
12304 // CHECK19-NEXT: [[TMP139:%.*]] = bitcast i8** [[TMP138]] to i32*
12305 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP139]], align 4
12306 // CHECK19-NEXT: [[TMP140:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS36]], i32 0, i32 1
12307 // CHECK19-NEXT: store i8* null, i8** [[TMP140]], align 4
12308 // CHECK19-NEXT: [[TMP141:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 2
12309 // CHECK19-NEXT: [[TMP142:%.*]] = bitcast i8** [[TMP141]] to i32**
12310 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP142]], align 4
12311 // CHECK19-NEXT: [[TMP143:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS35]], i32 0, i32 2
12312 // CHECK19-NEXT: [[TMP144:%.*]] = bitcast i8** [[TMP143]] to i32**
12313 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP144]], align 4
12314 // CHECK19-NEXT: [[TMP145:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES37]], i32 0, i32 2
12315 // CHECK19-NEXT: store i64 [[TMP129]], i64* [[TMP145]], align 4
12316 // CHECK19-NEXT: [[TMP146:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS36]], i32 0, i32 2
12317 // CHECK19-NEXT: store i8* null, i8** [[TMP146]], align 4
12318 // CHECK19-NEXT: [[TMP147:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 0
12319 // CHECK19-NEXT: [[TMP148:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS35]], i32 0, i32 0
12320 // CHECK19-NEXT: [[TMP149:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES37]], i32 0, i32 0
12321 // CHECK19-NEXT: [[TMP150:%.*]] = load i32, i32* [[N]], align 4
12322 // CHECK19-NEXT: store i32 [[TMP150]], i32* [[DOTCAPTURE_EXPR_39]], align 4
12323 // CHECK19-NEXT: [[TMP151:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_39]], align 4
12324 // CHECK19-NEXT: [[SUB41:%.*]] = sub nsw i32 [[TMP151]], 0
12325 // CHECK19-NEXT: [[DIV42:%.*]] = sdiv i32 [[SUB41]], 1
12326 // CHECK19-NEXT: [[SUB43:%.*]] = sub nsw i32 [[DIV42]], 1
12327 // CHECK19-NEXT: store i32 [[SUB43]], i32* [[DOTCAPTURE_EXPR_40]], align 4
12328 // CHECK19-NEXT: [[TMP152:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_40]], align 4
12329 // CHECK19-NEXT: [[ADD44:%.*]] = add nsw i32 [[TMP152]], 1
12330 // CHECK19-NEXT: [[TMP153:%.*]] = zext i32 [[ADD44]] to i64
12331 // CHECK19-NEXT: [[KERNEL_ARGS45:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
12332 // CHECK19-NEXT: [[TMP154:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS45]], i32 0, i32 0
12333 // CHECK19-NEXT: store i32 1, i32* [[TMP154]], align 4
12334 // CHECK19-NEXT: [[TMP155:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS45]], i32 0, i32 1
12335 // CHECK19-NEXT: store i32 3, i32* [[TMP155]], align 4
12336 // CHECK19-NEXT: [[TMP156:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS45]], i32 0, i32 2
12337 // CHECK19-NEXT: store i8** [[TMP147]], i8*** [[TMP156]], align 4
12338 // CHECK19-NEXT: [[TMP157:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS45]], i32 0, i32 3
12339 // CHECK19-NEXT: store i8** [[TMP148]], i8*** [[TMP157]], align 4
12340 // CHECK19-NEXT: [[TMP158:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS45]], i32 0, i32 4
12341 // CHECK19-NEXT: store i64* [[TMP149]], i64** [[TMP158]], align 4
12342 // CHECK19-NEXT: [[TMP159:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS45]], i32 0, i32 5
12343 // CHECK19-NEXT: store i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.13, i32 0, i32 0), i64** [[TMP159]], align 4
12344 // CHECK19-NEXT: [[TMP160:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS45]], i32 0, i32 6
12345 // CHECK19-NEXT: store i8** null, i8*** [[TMP160]], align 4
12346 // CHECK19-NEXT: [[TMP161:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS45]], i32 0, i32 7
12347 // CHECK19-NEXT: store i8** null, i8*** [[TMP161]], align 4
12348 // CHECK19-NEXT: [[TMP162:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS45]], i32 0, i32 8
12349 // CHECK19-NEXT: store i64 [[TMP153]], i64* [[TMP162]], align 8
12350 // CHECK19-NEXT: [[TMP163:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS45]])
12351 // CHECK19-NEXT: [[TMP164:%.*]] = icmp ne i32 [[TMP163]], 0
12352 // CHECK19-NEXT: br i1 [[TMP164]], label [[OMP_OFFLOAD_FAILED46:%.*]], label [[OMP_OFFLOAD_CONT47:%.*]]
12353 // CHECK19: omp_offload.failed46:
12354 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i32 [[TMP127]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
12355 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT47]]
12356 // CHECK19: omp_offload.cont47:
12357 // CHECK19-NEXT: [[TMP165:%.*]] = load i32, i32* [[M]], align 4
12358 // CHECK19-NEXT: store i32 [[TMP165]], i32* [[M_CASTED48]], align 4
12359 // CHECK19-NEXT: [[TMP166:%.*]] = load i32, i32* [[M_CASTED48]], align 4
12360 // CHECK19-NEXT: [[TMP167:%.*]] = load i32, i32* [[N]], align 4
12361 // CHECK19-NEXT: store i32 [[TMP167]], i32* [[N_CASTED49]], align 4
12362 // CHECK19-NEXT: [[TMP168:%.*]] = load i32, i32* [[N_CASTED49]], align 4
12363 // CHECK19-NEXT: [[TMP169:%.*]] = mul nuw i32 [[TMP0]], 4
12364 // CHECK19-NEXT: [[TMP170:%.*]] = sext i32 [[TMP169]] to i64
12365 // CHECK19-NEXT: [[TMP171:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES53]] to i8*
12366 // CHECK19-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP171]], i8* align 4 bitcast ([4 x i64]* @.offload_sizes.16 to i8*), i32 32, i1 false)
12367 // CHECK19-NEXT: [[TMP172:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 0
12368 // CHECK19-NEXT: [[TMP173:%.*]] = bitcast i8** [[TMP172]] to i32*
12369 // CHECK19-NEXT: store i32 [[TMP166]], i32* [[TMP173]], align 4
12370 // CHECK19-NEXT: [[TMP174:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 0
12371 // CHECK19-NEXT: [[TMP175:%.*]] = bitcast i8** [[TMP174]] to i32*
12372 // CHECK19-NEXT: store i32 [[TMP166]], i32* [[TMP175]], align 4
12373 // CHECK19-NEXT: [[TMP176:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS52]], i32 0, i32 0
12374 // CHECK19-NEXT: store i8* null, i8** [[TMP176]], align 4
12375 // CHECK19-NEXT: [[TMP177:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 1
12376 // CHECK19-NEXT: [[TMP178:%.*]] = bitcast i8** [[TMP177]] to i32*
12377 // CHECK19-NEXT: store i32 [[TMP168]], i32* [[TMP178]], align 4
12378 // CHECK19-NEXT: [[TMP179:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 1
12379 // CHECK19-NEXT: [[TMP180:%.*]] = bitcast i8** [[TMP179]] to i32*
12380 // CHECK19-NEXT: store i32 [[TMP168]], i32* [[TMP180]], align 4
12381 // CHECK19-NEXT: [[TMP181:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS52]], i32 0, i32 1
12382 // CHECK19-NEXT: store i8* null, i8** [[TMP181]], align 4
12383 // CHECK19-NEXT: [[TMP182:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 2
12384 // CHECK19-NEXT: [[TMP183:%.*]] = bitcast i8** [[TMP182]] to i32*
12385 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP183]], align 4
12386 // CHECK19-NEXT: [[TMP184:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 2
12387 // CHECK19-NEXT: [[TMP185:%.*]] = bitcast i8** [[TMP184]] to i32*
12388 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP185]], align 4
12389 // CHECK19-NEXT: [[TMP186:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS52]], i32 0, i32 2
12390 // CHECK19-NEXT: store i8* null, i8** [[TMP186]], align 4
12391 // CHECK19-NEXT: [[TMP187:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 3
12392 // CHECK19-NEXT: [[TMP188:%.*]] = bitcast i8** [[TMP187]] to i32**
12393 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP188]], align 4
12394 // CHECK19-NEXT: [[TMP189:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 3
12395 // CHECK19-NEXT: [[TMP190:%.*]] = bitcast i8** [[TMP189]] to i32**
12396 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP190]], align 4
12397 // CHECK19-NEXT: [[TMP191:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES53]], i32 0, i32 3
12398 // CHECK19-NEXT: store i64 [[TMP170]], i64* [[TMP191]], align 4
12399 // CHECK19-NEXT: [[TMP192:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS52]], i32 0, i32 3
12400 // CHECK19-NEXT: store i8* null, i8** [[TMP192]], align 4
12401 // CHECK19-NEXT: [[TMP193:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 0
12402 // CHECK19-NEXT: [[TMP194:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS51]], i32 0, i32 0
12403 // CHECK19-NEXT: [[TMP195:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES53]], i32 0, i32 0
12404 // CHECK19-NEXT: [[TMP196:%.*]] = load i32, i32* [[N]], align 4
12405 // CHECK19-NEXT: store i32 [[TMP196]], i32* [[DOTCAPTURE_EXPR_55]], align 4
12406 // CHECK19-NEXT: [[TMP197:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_55]], align 4
12407 // CHECK19-NEXT: [[SUB57:%.*]] = sub nsw i32 [[TMP197]], 0
12408 // CHECK19-NEXT: [[DIV58:%.*]] = sdiv i32 [[SUB57]], 1
12409 // CHECK19-NEXT: [[SUB59:%.*]] = sub nsw i32 [[DIV58]], 1
12410 // CHECK19-NEXT: store i32 [[SUB59]], i32* [[DOTCAPTURE_EXPR_56]], align 4
12411 // CHECK19-NEXT: [[TMP198:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_56]], align 4
12412 // CHECK19-NEXT: [[ADD60:%.*]] = add nsw i32 [[TMP198]], 1
12413 // CHECK19-NEXT: [[TMP199:%.*]] = zext i32 [[ADD60]] to i64
12414 // CHECK19-NEXT: [[KERNEL_ARGS61:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
12415 // CHECK19-NEXT: [[TMP200:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS61]], i32 0, i32 0
12416 // CHECK19-NEXT: store i32 1, i32* [[TMP200]], align 4
12417 // CHECK19-NEXT: [[TMP201:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS61]], i32 0, i32 1
12418 // CHECK19-NEXT: store i32 4, i32* [[TMP201]], align 4
12419 // CHECK19-NEXT: [[TMP202:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS61]], i32 0, i32 2
12420 // CHECK19-NEXT: store i8** [[TMP193]], i8*** [[TMP202]], align 4
12421 // CHECK19-NEXT: [[TMP203:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS61]], i32 0, i32 3
12422 // CHECK19-NEXT: store i8** [[TMP194]], i8*** [[TMP203]], align 4
12423 // CHECK19-NEXT: [[TMP204:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS61]], i32 0, i32 4
12424 // CHECK19-NEXT: store i64* [[TMP195]], i64** [[TMP204]], align 4
12425 // CHECK19-NEXT: [[TMP205:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS61]], i32 0, i32 5
12426 // CHECK19-NEXT: store i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.17, i32 0, i32 0), i64** [[TMP205]], align 4
12427 // CHECK19-NEXT: [[TMP206:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS61]], i32 0, i32 6
12428 // CHECK19-NEXT: store i8** null, i8*** [[TMP206]], align 4
12429 // CHECK19-NEXT: [[TMP207:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS61]], i32 0, i32 7
12430 // CHECK19-NEXT: store i8** null, i8*** [[TMP207]], align 4
12431 // CHECK19-NEXT: [[TMP208:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS61]], i32 0, i32 8
12432 // CHECK19-NEXT: store i64 [[TMP199]], i64* [[TMP208]], align 8
12433 // CHECK19-NEXT: [[TMP209:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS61]])
12434 // CHECK19-NEXT: [[TMP210:%.*]] = icmp ne i32 [[TMP209]], 0
12435 // CHECK19-NEXT: br i1 [[TMP210]], label [[OMP_OFFLOAD_FAILED62:%.*]], label [[OMP_OFFLOAD_CONT63:%.*]]
12436 // CHECK19: omp_offload.failed62:
12437 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i32 [[TMP166]], i32 [[TMP168]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
12438 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT63]]
12439 // CHECK19: omp_offload.cont63:
12440 // CHECK19-NEXT: [[TMP211:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
12441 // CHECK19-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP211]])
12442 // CHECK19-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4
12443 // CHECK19-NEXT: [[TMP212:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
12444 // CHECK19-NEXT: call void @llvm.stackrestore(i8* [[TMP212]])
12445 // CHECK19-NEXT: [[TMP213:%.*]] = load i32, i32* [[RETVAL]], align 4
12446 // CHECK19-NEXT: ret i32 [[TMP213]]
12447 //
12448 //
12449 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148
12450 // CHECK19-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
12451 // CHECK19-NEXT: entry:
12452 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
12453 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
12454 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
12455 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
12456 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
12457 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
12458 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
12459 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
12460 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
12461 // CHECK19-NEXT: ret void
12462 //
12463 //
12464 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined.
12465 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
12466 // CHECK19-NEXT: entry:
12467 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
12468 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
12469 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
12470 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
12471 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
12472 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12473 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
12474 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
12475 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
12476 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
12477 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12478 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12479 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12480 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12481 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4
12482 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
12483 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
12484 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
12485 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
12486 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
12487 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
12488 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
12489 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
12490 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
12491 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
12492 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12493 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
12494 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
12495 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
12496 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
12497 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4
12498 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12499 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
12500 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
12501 // CHECK19: omp.precond.then:
12502 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
12503 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12504 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
12505 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12506 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12507 // CHECK19-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
12508 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
12509 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12510 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12511 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12512 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
12513 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12514 // CHECK19: cond.true:
12515 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12516 // CHECK19-NEXT: br label [[COND_END:%.*]]
12517 // CHECK19: cond.false:
12518 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12519 // CHECK19-NEXT: br label [[COND_END]]
12520 // CHECK19: cond.end:
12521 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
12522 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
12523 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12524 // CHECK19-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
12525 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12526 // CHECK19: omp.inner.for.cond:
12527 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12528 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12529 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
12530 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12531 // CHECK19: omp.inner.for.body:
12532 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12533 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12534 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])
12535 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12536 // CHECK19: omp.inner.for.inc:
12537 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12538 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
12539 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
12540 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
12541 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
12542 // CHECK19: omp.inner.for.end:
12543 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12544 // CHECK19: omp.loop.exit:
12545 // CHECK19-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
12546 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
12547 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
12548 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
12549 // CHECK19: omp.precond.end:
12550 // CHECK19-NEXT: ret void
12551 //
12552 //
12553 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..1
12554 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
12555 // CHECK19-NEXT: entry:
12556 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
12557 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
12558 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
12559 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
12560 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
12561 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
12562 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
12563 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12564 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
12565 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
12566 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
12567 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
12568 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
12569 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
12570 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12571 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12572 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4
12573 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
12574 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
12575 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
12576 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
12577 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
12578 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
12579 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
12580 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
12581 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
12582 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
12583 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
12584 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
12585 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12586 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
12587 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
12588 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
12589 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
12590 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4
12591 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12592 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
12593 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
12594 // CHECK19: omp.precond.then:
12595 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
12596 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12597 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
12598 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
12599 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
12600 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
12601 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
12602 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12603 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12604 // CHECK19-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
12605 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
12606 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12607 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12608 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12609 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
12610 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12611 // CHECK19: cond.true:
12612 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12613 // CHECK19-NEXT: br label [[COND_END:%.*]]
12614 // CHECK19: cond.false:
12615 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12616 // CHECK19-NEXT: br label [[COND_END]]
12617 // CHECK19: cond.end:
12618 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
12619 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
12620 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12621 // CHECK19-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
12622 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12623 // CHECK19: omp.inner.for.cond:
12624 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12625 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12626 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
12627 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12628 // CHECK19: omp.inner.for.body:
12629 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12630 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
12631 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12632 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
12633 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
12634 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
12635 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
12636 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
12637 // CHECK19: omp.body.continue:
12638 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12639 // CHECK19: omp.inner.for.inc:
12640 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12641 // CHECK19-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1
12642 // CHECK19-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
12643 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
12644 // CHECK19: omp.inner.for.end:
12645 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12646 // CHECK19: omp.loop.exit:
12647 // CHECK19-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
12648 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
12649 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
12650 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
12651 // CHECK19: omp.precond.end:
12652 // CHECK19-NEXT: ret void
12653 //
12654 //
12655 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153
12656 // CHECK19-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
12657 // CHECK19-NEXT: entry:
12658 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
12659 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
12660 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
12661 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
12662 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
12663 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
12664 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
12665 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
12666 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
12667 // CHECK19-NEXT: ret void
12668 //
12669 //
12670 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..2
12671 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
12672 // CHECK19-NEXT: entry:
12673 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
12674 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
12675 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
12676 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
12677 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
12678 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12679 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
12680 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
12681 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
12682 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
12683 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12684 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12685 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12686 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12687 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4
12688 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
12689 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
12690 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
12691 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
12692 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
12693 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
12694 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
12695 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
12696 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
12697 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
12698 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12699 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
12700 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
12701 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
12702 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
12703 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4
12704 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12705 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
12706 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
12707 // CHECK19: omp.precond.then:
12708 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
12709 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12710 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
12711 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12712 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12713 // CHECK19-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
12714 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
12715 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12716 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12717 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12718 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
12719 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12720 // CHECK19: cond.true:
12721 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12722 // CHECK19-NEXT: br label [[COND_END:%.*]]
12723 // CHECK19: cond.false:
12724 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12725 // CHECK19-NEXT: br label [[COND_END]]
12726 // CHECK19: cond.end:
12727 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
12728 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
12729 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12730 // CHECK19-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
12731 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12732 // CHECK19: omp.inner.for.cond:
12733 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12734 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12735 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
12736 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12737 // CHECK19: omp.inner.for.body:
12738 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12739 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12740 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])
12741 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12742 // CHECK19: omp.inner.for.inc:
12743 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12744 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
12745 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
12746 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
12747 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
12748 // CHECK19: omp.inner.for.end:
12749 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12750 // CHECK19: omp.loop.exit:
12751 // CHECK19-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
12752 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
12753 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
12754 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
12755 // CHECK19: omp.precond.end:
12756 // CHECK19-NEXT: ret void
12757 //
12758 //
12759 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..3
12760 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
12761 // CHECK19-NEXT: entry:
12762 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
12763 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
12764 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
12765 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
12766 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
12767 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
12768 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
12769 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12770 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
12771 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
12772 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
12773 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
12774 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
12775 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
12776 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12777 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12778 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4
12779 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
12780 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
12781 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
12782 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
12783 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
12784 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
12785 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
12786 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
12787 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
12788 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
12789 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
12790 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
12791 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12792 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
12793 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
12794 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
12795 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
12796 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4
12797 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12798 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
12799 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
12800 // CHECK19: omp.precond.then:
12801 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
12802 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12803 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
12804 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
12805 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
12806 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
12807 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
12808 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12809 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12810 // CHECK19-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
12811 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
12812 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12813 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12814 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12815 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
12816 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12817 // CHECK19: cond.true:
12818 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12819 // CHECK19-NEXT: br label [[COND_END:%.*]]
12820 // CHECK19: cond.false:
12821 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12822 // CHECK19-NEXT: br label [[COND_END]]
12823 // CHECK19: cond.end:
12824 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
12825 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
12826 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12827 // CHECK19-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
12828 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12829 // CHECK19: omp.inner.for.cond:
12830 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12831 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12832 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
12833 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12834 // CHECK19: omp.inner.for.body:
12835 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12836 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
12837 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12838 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I3]], align 4
12839 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
12840 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
12841 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
12842 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
12843 // CHECK19: omp.body.continue:
12844 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12845 // CHECK19: omp.inner.for.inc:
12846 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12847 // CHECK19-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1
12848 // CHECK19-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
12849 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
12850 // CHECK19: omp.inner.for.end:
12851 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12852 // CHECK19: omp.loop.exit:
12853 // CHECK19-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
12854 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
12855 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
12856 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
12857 // CHECK19: omp.precond.end:
12858 // CHECK19-NEXT: ret void
12859 //
12860 //
12861 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158
12862 // CHECK19-SAME: (i32 noundef [[M:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
12863 // CHECK19-NEXT: entry:
12864 // CHECK19-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
12865 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
12866 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
12867 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
12868 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
12869 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
12870 // CHECK19-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4
12871 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
12872 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
12873 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
12874 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
12875 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
12876 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4
12877 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
12878 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12879 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
12880 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
12881 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]])
12882 // CHECK19-NEXT: ret void
12883 //
12884 //
12885 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..6
12886 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
12887 // CHECK19-NEXT: entry:
12888 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
12889 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
12890 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
12891 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
12892 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
12893 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
12894 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
12895 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
12896 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
12897 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
12898 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
12899 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12900 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12901 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12902 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12903 // CHECK19-NEXT: [[I4:%.*]] = alloca i32, align 4
12904 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
12905 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
12906 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
12907 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
12908 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
12909 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
12910 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
12911 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
12912 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
12913 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
12914 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
12915 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
12916 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12917 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
12918 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
12919 // CHECK19-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
12920 // CHECK19-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
12921 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4
12922 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12923 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
12924 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
12925 // CHECK19: omp.precond.then:
12926 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
12927 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
12928 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
12929 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12930 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12931 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
12932 // CHECK19-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
12933 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
12934 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])
12935 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12936 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
12937 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
12938 // CHECK19-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12939 // CHECK19: cond.true:
12940 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
12941 // CHECK19-NEXT: br label [[COND_END:%.*]]
12942 // CHECK19: cond.false:
12943 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12944 // CHECK19-NEXT: br label [[COND_END]]
12945 // CHECK19: cond.end:
12946 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
12947 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
12948 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12949 // CHECK19-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
12950 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
12951 // CHECK19: omp.inner.for.cond:
12952 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12953 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
12954 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1
12955 // CHECK19-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]]
12956 // CHECK19-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12957 // CHECK19: omp.inner.for.body:
12958 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12959 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12960 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
12961 // CHECK19-NEXT: store i32 [[TMP19]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
12962 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
12963 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP20]])
12964 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
12965 // CHECK19: omp.inner.for.inc:
12966 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12967 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
12968 // CHECK19-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
12969 // CHECK19-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
12970 // CHECK19-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12971 // CHECK19-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
12972 // CHECK19-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
12973 // CHECK19-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
12974 // CHECK19-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12975 // CHECK19-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
12976 // CHECK19-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]
12977 // CHECK19-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
12978 // CHECK19-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12979 // CHECK19-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
12980 // CHECK19-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP27]], [[TMP28]]
12981 // CHECK19-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
12982 // CHECK19: cond.true11:
12983 // CHECK19-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
12984 // CHECK19-NEXT: br label [[COND_END13:%.*]]
12985 // CHECK19: cond.false12:
12986 // CHECK19-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12987 // CHECK19-NEXT: br label [[COND_END13]]
12988 // CHECK19: cond.end13:
12989 // CHECK19-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP29]], [[COND_TRUE11]] ], [ [[TMP30]], [[COND_FALSE12]] ]
12990 // CHECK19-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
12991 // CHECK19-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12992 // CHECK19-NEXT: store i32 [[TMP31]], i32* [[DOTOMP_IV]], align 4
12993 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
12994 // CHECK19: omp.inner.for.end:
12995 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
12996 // CHECK19: omp.loop.exit:
12997 // CHECK19-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
12998 // CHECK19-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4
12999 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]])
13000 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
13001 // CHECK19: omp.precond.end:
13002 // CHECK19-NEXT: ret void
13003 //
13004 //
13005 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..7
13006 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
13007 // CHECK19-NEXT: entry:
13008 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13009 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13010 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
13011 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
13012 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
13013 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
13014 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
13015 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
13016 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13017 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
13018 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13019 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
13020 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
13021 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
13022 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
13023 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13024 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13025 // CHECK19-NEXT: [[I4:%.*]] = alloca i32, align 4
13026 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13027 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13028 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
13029 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
13030 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
13031 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13032 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
13033 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
13034 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
13035 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13036 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13037 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
13038 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
13039 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13040 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
13041 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13042 // CHECK19-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
13043 // CHECK19-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
13044 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4
13045 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13046 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
13047 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13048 // CHECK19: omp.precond.then:
13049 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
13050 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13051 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
13052 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
13053 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
13054 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
13055 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
13056 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13057 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13058 // CHECK19-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13059 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
13060 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13061 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13062 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13063 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
13064 // CHECK19-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13065 // CHECK19: cond.true:
13066 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13067 // CHECK19-NEXT: br label [[COND_END:%.*]]
13068 // CHECK19: cond.false:
13069 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13070 // CHECK19-NEXT: br label [[COND_END]]
13071 // CHECK19: cond.end:
13072 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
13073 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
13074 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13075 // CHECK19-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
13076 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13077 // CHECK19: omp.inner.for.cond:
13078 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13079 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13080 // CHECK19-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
13081 // CHECK19-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13082 // CHECK19: omp.inner.for.body:
13083 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13084 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
13085 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13086 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I4]], align 4
13087 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4
13088 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
13089 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
13090 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
13091 // CHECK19: omp.body.continue:
13092 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13093 // CHECK19: omp.inner.for.inc:
13094 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13095 // CHECK19-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
13096 // CHECK19-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
13097 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
13098 // CHECK19: omp.inner.for.end:
13099 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13100 // CHECK19: omp.loop.exit:
13101 // CHECK19-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13102 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
13103 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
13104 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
13105 // CHECK19: omp.precond.end:
13106 // CHECK19-NEXT: ret void
13107 //
13108 //
13109 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163
13110 // CHECK19-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
13111 // CHECK19-NEXT: entry:
13112 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
13113 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
13114 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
13115 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
13116 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13117 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
13118 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13119 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13120 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
13121 // CHECK19-NEXT: ret void
13122 //
13123 //
13124 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..10
13125 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
13126 // CHECK19-NEXT: entry:
13127 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13128 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13129 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
13130 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
13131 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
13132 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13133 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
13134 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
13135 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13136 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
13137 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13138 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13139 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13140 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13141 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4
13142 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13143 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13144 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
13145 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13146 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
13147 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
13148 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13149 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13150 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
13151 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
13152 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13153 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
13154 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13155 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
13156 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
13157 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4
13158 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13159 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
13160 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13161 // CHECK19: omp.precond.then:
13162 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
13163 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13164 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
13165 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13166 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13167 // CHECK19-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13168 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
13169 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13170 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13171 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13172 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
13173 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13174 // CHECK19: cond.true:
13175 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13176 // CHECK19-NEXT: br label [[COND_END:%.*]]
13177 // CHECK19: cond.false:
13178 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13179 // CHECK19-NEXT: br label [[COND_END]]
13180 // CHECK19: cond.end:
13181 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
13182 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
13183 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13184 // CHECK19-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
13185 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13186 // CHECK19: omp.inner.for.cond:
13187 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13188 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13189 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
13190 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13191 // CHECK19: omp.inner.for.body:
13192 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13193 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13194 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])
13195 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13196 // CHECK19: omp.inner.for.inc:
13197 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13198 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
13199 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
13200 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
13201 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
13202 // CHECK19: omp.inner.for.end:
13203 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13204 // CHECK19: omp.loop.exit:
13205 // CHECK19-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13206 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
13207 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
13208 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
13209 // CHECK19: omp.precond.end:
13210 // CHECK19-NEXT: ret void
13211 //
13212 //
13213 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..11
13214 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
13215 // CHECK19-NEXT: entry:
13216 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13217 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13218 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
13219 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
13220 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
13221 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
13222 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
13223 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13224 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
13225 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
13226 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13227 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
13228 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
13229 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
13230 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13231 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13232 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4
13233 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13234 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13235 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
13236 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
13237 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
13238 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13239 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
13240 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
13241 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13242 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13243 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
13244 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
13245 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13246 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
13247 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13248 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
13249 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
13250 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4
13251 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13252 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
13253 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13254 // CHECK19: omp.precond.then:
13255 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
13256 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13257 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
13258 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
13259 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
13260 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
13261 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
13262 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13263 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13264 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13265 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13266 // CHECK19-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13267 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
13268 // CHECK19-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1)
13269 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
13270 // CHECK19: omp.dispatch.cond:
13271 // CHECK19-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13272 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
13273 // CHECK19-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
13274 // CHECK19-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
13275 // CHECK19-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
13276 // CHECK19: omp.dispatch.body:
13277 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13278 // CHECK19-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
13279 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13280 // CHECK19: omp.inner.for.cond:
13281 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
13282 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16
13283 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
13284 // CHECK19-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13285 // CHECK19: omp.inner.for.body:
13286 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
13287 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
13288 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13289 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !16
13290 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !16
13291 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP20]]
13292 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !16
13293 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
13294 // CHECK19: omp.body.continue:
13295 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13296 // CHECK19: omp.inner.for.inc:
13297 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
13298 // CHECK19-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP21]], 1
13299 // CHECK19-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16
13300 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
13301 // CHECK19: omp.inner.for.end:
13302 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
13303 // CHECK19: omp.dispatch.inc:
13304 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]]
13305 // CHECK19: omp.dispatch.end:
13306 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
13307 // CHECK19: omp.precond.end:
13308 // CHECK19-NEXT: ret void
13309 //
13310 //
13311 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168
13312 // CHECK19-SAME: (i32 noundef [[M:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
13313 // CHECK19-NEXT: entry:
13314 // CHECK19-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
13315 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
13316 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
13317 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
13318 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
13319 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
13320 // CHECK19-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4
13321 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4
13322 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13323 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
13324 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13325 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13326 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4
13327 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
13328 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13329 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
13330 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
13331 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]])
13332 // CHECK19-NEXT: ret void
13333 //
13334 //
13335 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..14
13336 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
13337 // CHECK19-NEXT: entry:
13338 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13339 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13340 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
13341 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
13342 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
13343 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
13344 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13345 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
13346 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13347 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
13348 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
13349 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13350 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13351 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13352 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13353 // CHECK19-NEXT: [[I4:%.*]] = alloca i32, align 4
13354 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
13355 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13356 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13357 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
13358 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13359 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
13360 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
13361 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
13362 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13363 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13364 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
13365 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
13366 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13367 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
13368 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13369 // CHECK19-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
13370 // CHECK19-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
13371 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4
13372 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13373 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
13374 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13375 // CHECK19: omp.precond.then:
13376 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
13377 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13378 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
13379 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13380 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13381 // CHECK19-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13382 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
13383 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13384 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13385 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13386 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
13387 // CHECK19-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13388 // CHECK19: cond.true:
13389 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13390 // CHECK19-NEXT: br label [[COND_END:%.*]]
13391 // CHECK19: cond.false:
13392 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13393 // CHECK19-NEXT: br label [[COND_END]]
13394 // CHECK19: cond.end:
13395 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
13396 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
13397 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13398 // CHECK19-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
13399 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13400 // CHECK19: omp.inner.for.cond:
13401 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13402 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13403 // CHECK19-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
13404 // CHECK19-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13405 // CHECK19: omp.inner.for.body:
13406 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13407 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13408 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
13409 // CHECK19-NEXT: store i32 [[TMP18]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
13410 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
13411 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP19]])
13412 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13413 // CHECK19: omp.inner.for.inc:
13414 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13415 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
13416 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
13417 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
13418 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
13419 // CHECK19: omp.inner.for.end:
13420 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13421 // CHECK19: omp.loop.exit:
13422 // CHECK19-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13423 // CHECK19-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
13424 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
13425 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
13426 // CHECK19: omp.precond.end:
13427 // CHECK19-NEXT: ret void
13428 //
13429 //
13430 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..15
13431 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
13432 // CHECK19-NEXT: entry:
13433 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13434 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13435 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
13436 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
13437 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4
13438 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
13439 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4
13440 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
13441 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13442 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
13443 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13444 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
13445 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
13446 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
13447 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
13448 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13449 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13450 // CHECK19-NEXT: [[I4:%.*]] = alloca i32, align 4
13451 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13452 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13453 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
13454 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
13455 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4
13456 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13457 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4
13458 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
13459 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
13460 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13461 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13462 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
13463 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
13464 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13465 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
13466 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13467 // CHECK19-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
13468 // CHECK19-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
13469 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4
13470 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13471 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
13472 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13473 // CHECK19: omp.precond.then:
13474 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
13475 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13476 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
13477 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
13478 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
13479 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
13480 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
13481 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13482 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13483 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
13484 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13485 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13486 // CHECK19-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13487 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
13488 // CHECK19-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]])
13489 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
13490 // CHECK19: omp.dispatch.cond:
13491 // CHECK19-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13492 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
13493 // CHECK19-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
13494 // CHECK19-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0
13495 // CHECK19-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
13496 // CHECK19: omp.dispatch.body:
13497 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13498 // CHECK19-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4
13499 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13500 // CHECK19: omp.inner.for.cond:
13501 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
13502 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !19
13503 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
13504 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13505 // CHECK19: omp.inner.for.body:
13506 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
13507 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
13508 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13509 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !19
13510 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !19
13511 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP21]]
13512 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !19
13513 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
13514 // CHECK19: omp.body.continue:
13515 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13516 // CHECK19: omp.inner.for.inc:
13517 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
13518 // CHECK19-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP22]], 1
13519 // CHECK19-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19
13520 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
13521 // CHECK19: omp.inner.for.end:
13522 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
13523 // CHECK19: omp.dispatch.inc:
13524 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]]
13525 // CHECK19: omp.dispatch.end:
13526 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
13527 // CHECK19: omp.precond.end:
13528 // CHECK19-NEXT: ret void
13529 //
13530 //
13531 // CHECK19-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
13532 // CHECK19-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {
13533 // CHECK19-NEXT: entry:
13534 // CHECK19-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
13535 // CHECK19-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
13536 // CHECK19-NEXT: [[M:%.*]] = alloca i32, align 4
13537 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
13538 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
13539 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
13540 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
13541 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4
13542 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4
13543 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4
13544 // CHECK19-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
13545 // CHECK19-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4
13546 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x i8*], align 4
13547 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x i8*], align 4
13548 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x i8*], align 4
13549 // CHECK19-NEXT: [[_TMP11:%.*]] = alloca i32, align 4
13550 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS15:%.*]] = alloca [1 x i8*], align 4
13551 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS16:%.*]] = alloca [1 x i8*], align 4
13552 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS17:%.*]] = alloca [1 x i8*], align 4
13553 // CHECK19-NEXT: [[_TMP18:%.*]] = alloca i32, align 4
13554 // CHECK19-NEXT: [[M_CASTED22:%.*]] = alloca i32, align 4
13555 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS23:%.*]] = alloca [2 x i8*], align 4
13556 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS24:%.*]] = alloca [2 x i8*], align 4
13557 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS25:%.*]] = alloca [2 x i8*], align 4
13558 // CHECK19-NEXT: [[_TMP26:%.*]] = alloca i32, align 4
13559 // CHECK19-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
13560 // CHECK19-NEXT: store i32 10, i32* [[M]], align 4
13561 // CHECK19-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
13562 // CHECK19-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
13563 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4
13564 // CHECK19-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
13565 // CHECK19-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
13566 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4
13567 // CHECK19-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
13568 // CHECK19-NEXT: store i8* null, i8** [[TMP4]], align 4
13569 // CHECK19-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
13570 // CHECK19-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
13571 // CHECK19-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
13572 // CHECK19-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 0
13573 // CHECK19-NEXT: store i32 1, i32* [[TMP7]], align 4
13574 // CHECK19-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 1
13575 // CHECK19-NEXT: store i32 1, i32* [[TMP8]], align 4
13576 // CHECK19-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 2
13577 // CHECK19-NEXT: store i8** [[TMP5]], i8*** [[TMP9]], align 4
13578 // CHECK19-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 3
13579 // CHECK19-NEXT: store i8** [[TMP6]], i8*** [[TMP10]], align 4
13580 // CHECK19-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 4
13581 // CHECK19-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.20, i32 0, i32 0), i64** [[TMP11]], align 4
13582 // CHECK19-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 5
13583 // CHECK19-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.21, i32 0, i32 0), i64** [[TMP12]], align 4
13584 // CHECK19-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 6
13585 // CHECK19-NEXT: store i8** null, i8*** [[TMP13]], align 4
13586 // CHECK19-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 7
13587 // CHECK19-NEXT: store i8** null, i8*** [[TMP14]], align 4
13588 // CHECK19-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]], i32 0, i32 8
13589 // CHECK19-NEXT: store i64 10, i64* [[TMP15]], align 8
13590 // CHECK19-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS]])
13591 // CHECK19-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
13592 // CHECK19-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
13593 // CHECK19: omp_offload.failed:
13594 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]]
13595 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]]
13596 // CHECK19: omp_offload.cont:
13597 // CHECK19-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
13598 // CHECK19-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to [10 x i32]**
13599 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP19]], align 4
13600 // CHECK19-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
13601 // CHECK19-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [10 x i32]**
13602 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP21]], align 4
13603 // CHECK19-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0
13604 // CHECK19-NEXT: store i8* null, i8** [[TMP22]], align 4
13605 // CHECK19-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
13606 // CHECK19-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
13607 // CHECK19-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
13608 // CHECK19-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 0
13609 // CHECK19-NEXT: store i32 1, i32* [[TMP25]], align 4
13610 // CHECK19-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 1
13611 // CHECK19-NEXT: store i32 1, i32* [[TMP26]], align 4
13612 // CHECK19-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 2
13613 // CHECK19-NEXT: store i8** [[TMP23]], i8*** [[TMP27]], align 4
13614 // CHECK19-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 3
13615 // CHECK19-NEXT: store i8** [[TMP24]], i8*** [[TMP28]], align 4
13616 // CHECK19-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 4
13617 // CHECK19-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.24, i32 0, i32 0), i64** [[TMP29]], align 4
13618 // CHECK19-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 5
13619 // CHECK19-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.25, i32 0, i32 0), i64** [[TMP30]], align 4
13620 // CHECK19-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 6
13621 // CHECK19-NEXT: store i8** null, i8*** [[TMP31]], align 4
13622 // CHECK19-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 7
13623 // CHECK19-NEXT: store i8** null, i8*** [[TMP32]], align 4
13624 // CHECK19-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]], i32 0, i32 8
13625 // CHECK19-NEXT: store i64 10, i64* [[TMP33]], align 8
13626 // CHECK19-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS5]])
13627 // CHECK19-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
13628 // CHECK19-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
13629 // CHECK19: omp_offload.failed6:
13630 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121([10 x i32]* [[A]]) #[[ATTR3]]
13631 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT7]]
13632 // CHECK19: omp_offload.cont7:
13633 // CHECK19-NEXT: [[TMP36:%.*]] = load i32, i32* [[M]], align 4
13634 // CHECK19-NEXT: store i32 [[TMP36]], i32* [[M_CASTED]], align 4
13635 // CHECK19-NEXT: [[TMP37:%.*]] = load i32, i32* [[M_CASTED]], align 4
13636 // CHECK19-NEXT: [[TMP38:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
13637 // CHECK19-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i32*
13638 // CHECK19-NEXT: store i32 [[TMP37]], i32* [[TMP39]], align 4
13639 // CHECK19-NEXT: [[TMP40:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
13640 // CHECK19-NEXT: [[TMP41:%.*]] = bitcast i8** [[TMP40]] to i32*
13641 // CHECK19-NEXT: store i32 [[TMP37]], i32* [[TMP41]], align 4
13642 // CHECK19-NEXT: [[TMP42:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 0
13643 // CHECK19-NEXT: store i8* null, i8** [[TMP42]], align 4
13644 // CHECK19-NEXT: [[TMP43:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1
13645 // CHECK19-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to [10 x i32]**
13646 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP44]], align 4
13647 // CHECK19-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 1
13648 // CHECK19-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to [10 x i32]**
13649 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP46]], align 4
13650 // CHECK19-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 1
13651 // CHECK19-NEXT: store i8* null, i8** [[TMP47]], align 4
13652 // CHECK19-NEXT: [[TMP48:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
13653 // CHECK19-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
13654 // CHECK19-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
13655 // CHECK19-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 0
13656 // CHECK19-NEXT: store i32 1, i32* [[TMP50]], align 4
13657 // CHECK19-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 1
13658 // CHECK19-NEXT: store i32 2, i32* [[TMP51]], align 4
13659 // CHECK19-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 2
13660 // CHECK19-NEXT: store i8** [[TMP48]], i8*** [[TMP52]], align 4
13661 // CHECK19-NEXT: [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 3
13662 // CHECK19-NEXT: store i8** [[TMP49]], i8*** [[TMP53]], align 4
13663 // CHECK19-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 4
13664 // CHECK19-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.28, i32 0, i32 0), i64** [[TMP54]], align 4
13665 // CHECK19-NEXT: [[TMP55:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 5
13666 // CHECK19-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.29, i32 0, i32 0), i64** [[TMP55]], align 4
13667 // CHECK19-NEXT: [[TMP56:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 6
13668 // CHECK19-NEXT: store i8** null, i8*** [[TMP56]], align 4
13669 // CHECK19-NEXT: [[TMP57:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 7
13670 // CHECK19-NEXT: store i8** null, i8*** [[TMP57]], align 4
13671 // CHECK19-NEXT: [[TMP58:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]], i32 0, i32 8
13672 // CHECK19-NEXT: store i64 10, i64* [[TMP58]], align 8
13673 // CHECK19-NEXT: [[TMP59:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS12]])
13674 // CHECK19-NEXT: [[TMP60:%.*]] = icmp ne i32 [[TMP59]], 0
13675 // CHECK19-NEXT: br i1 [[TMP60]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]]
13676 // CHECK19: omp_offload.failed13:
13677 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i32 [[TMP37]], [10 x i32]* [[A]]) #[[ATTR3]]
13678 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT14]]
13679 // CHECK19: omp_offload.cont14:
13680 // CHECK19-NEXT: [[TMP61:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0
13681 // CHECK19-NEXT: [[TMP62:%.*]] = bitcast i8** [[TMP61]] to [10 x i32]**
13682 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP62]], align 4
13683 // CHECK19-NEXT: [[TMP63:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS16]], i32 0, i32 0
13684 // CHECK19-NEXT: [[TMP64:%.*]] = bitcast i8** [[TMP63]] to [10 x i32]**
13685 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP64]], align 4
13686 // CHECK19-NEXT: [[TMP65:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS17]], i32 0, i32 0
13687 // CHECK19-NEXT: store i8* null, i8** [[TMP65]], align 4
13688 // CHECK19-NEXT: [[TMP66:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0
13689 // CHECK19-NEXT: [[TMP67:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS16]], i32 0, i32 0
13690 // CHECK19-NEXT: [[KERNEL_ARGS19:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
13691 // CHECK19-NEXT: [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 0
13692 // CHECK19-NEXT: store i32 1, i32* [[TMP68]], align 4
13693 // CHECK19-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 1
13694 // CHECK19-NEXT: store i32 1, i32* [[TMP69]], align 4
13695 // CHECK19-NEXT: [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 2
13696 // CHECK19-NEXT: store i8** [[TMP66]], i8*** [[TMP70]], align 4
13697 // CHECK19-NEXT: [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 3
13698 // CHECK19-NEXT: store i8** [[TMP67]], i8*** [[TMP71]], align 4
13699 // CHECK19-NEXT: [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 4
13700 // CHECK19-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.32, i32 0, i32 0), i64** [[TMP72]], align 4
13701 // CHECK19-NEXT: [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 5
13702 // CHECK19-NEXT: store i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.33, i32 0, i32 0), i64** [[TMP73]], align 4
13703 // CHECK19-NEXT: [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 6
13704 // CHECK19-NEXT: store i8** null, i8*** [[TMP74]], align 4
13705 // CHECK19-NEXT: [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 7
13706 // CHECK19-NEXT: store i8** null, i8*** [[TMP75]], align 4
13707 // CHECK19-NEXT: [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]], i32 0, i32 8
13708 // CHECK19-NEXT: store i64 10, i64* [[TMP76]], align 8
13709 // CHECK19-NEXT: [[TMP77:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS19]])
13710 // CHECK19-NEXT: [[TMP78:%.*]] = icmp ne i32 [[TMP77]], 0
13711 // CHECK19-NEXT: br i1 [[TMP78]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]]
13712 // CHECK19: omp_offload.failed20:
13713 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131([10 x i32]* [[A]]) #[[ATTR3]]
13714 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT21]]
13715 // CHECK19: omp_offload.cont21:
13716 // CHECK19-NEXT: [[TMP79:%.*]] = load i32, i32* [[M]], align 4
13717 // CHECK19-NEXT: store i32 [[TMP79]], i32* [[M_CASTED22]], align 4
13718 // CHECK19-NEXT: [[TMP80:%.*]] = load i32, i32* [[M_CASTED22]], align 4
13719 // CHECK19-NEXT: [[TMP81:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 0
13720 // CHECK19-NEXT: [[TMP82:%.*]] = bitcast i8** [[TMP81]] to i32*
13721 // CHECK19-NEXT: store i32 [[TMP80]], i32* [[TMP82]], align 4
13722 // CHECK19-NEXT: [[TMP83:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 0
13723 // CHECK19-NEXT: [[TMP84:%.*]] = bitcast i8** [[TMP83]] to i32*
13724 // CHECK19-NEXT: store i32 [[TMP80]], i32* [[TMP84]], align 4
13725 // CHECK19-NEXT: [[TMP85:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 0
13726 // CHECK19-NEXT: store i8* null, i8** [[TMP85]], align 4
13727 // CHECK19-NEXT: [[TMP86:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 1
13728 // CHECK19-NEXT: [[TMP87:%.*]] = bitcast i8** [[TMP86]] to [10 x i32]**
13729 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP87]], align 4
13730 // CHECK19-NEXT: [[TMP88:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 1
13731 // CHECK19-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to [10 x i32]**
13732 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP89]], align 4
13733 // CHECK19-NEXT: [[TMP90:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 1
13734 // CHECK19-NEXT: store i8* null, i8** [[TMP90]], align 4
13735 // CHECK19-NEXT: [[TMP91:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 0
13736 // CHECK19-NEXT: [[TMP92:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS24]], i32 0, i32 0
13737 // CHECK19-NEXT: [[KERNEL_ARGS27:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
13738 // CHECK19-NEXT: [[TMP93:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS27]], i32 0, i32 0
13739 // CHECK19-NEXT: store i32 1, i32* [[TMP93]], align 4
13740 // CHECK19-NEXT: [[TMP94:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS27]], i32 0, i32 1
13741 // CHECK19-NEXT: store i32 2, i32* [[TMP94]], align 4
13742 // CHECK19-NEXT: [[TMP95:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS27]], i32 0, i32 2
13743 // CHECK19-NEXT: store i8** [[TMP91]], i8*** [[TMP95]], align 4
13744 // CHECK19-NEXT: [[TMP96:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS27]], i32 0, i32 3
13745 // CHECK19-NEXT: store i8** [[TMP92]], i8*** [[TMP96]], align 4
13746 // CHECK19-NEXT: [[TMP97:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS27]], i32 0, i32 4
13747 // CHECK19-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.36, i32 0, i32 0), i64** [[TMP97]], align 4
13748 // CHECK19-NEXT: [[TMP98:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS27]], i32 0, i32 5
13749 // CHECK19-NEXT: store i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.37, i32 0, i32 0), i64** [[TMP98]], align 4
13750 // CHECK19-NEXT: [[TMP99:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS27]], i32 0, i32 6
13751 // CHECK19-NEXT: store i8** null, i8*** [[TMP99]], align 4
13752 // CHECK19-NEXT: [[TMP100:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS27]], i32 0, i32 7
13753 // CHECK19-NEXT: store i8** null, i8*** [[TMP100]], align 4
13754 // CHECK19-NEXT: [[TMP101:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], %struct.__tgt_kernel_arguments* [[KERNEL_ARGS27]], i32 0, i32 8
13755 // CHECK19-NEXT: store i64 10, i64* [[TMP101]], align 8
13756 // CHECK19-NEXT: [[TMP102:%.*]] = call i32 @__tgt_target_kernel(%struct.ident_t* @[[GLOB3]], i64 -1, i32 0, i32 0, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, %struct.__tgt_kernel_arguments* [[KERNEL_ARGS27]])
13757 // CHECK19-NEXT: [[TMP103:%.*]] = icmp ne i32 [[TMP102]], 0
13758 // CHECK19-NEXT: br i1 [[TMP103]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]]
13759 // CHECK19: omp_offload.failed28:
13760 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i32 [[TMP80]], [10 x i32]* [[A]]) #[[ATTR3]]
13761 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT29]]
13762 // CHECK19: omp_offload.cont29:
13763 // CHECK19-NEXT: ret i32 0
13764 //
13765 //
13766 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
13767 // CHECK19-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
13768 // CHECK19-NEXT: entry:
13769 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
13770 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
13771 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
13772 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
13773 // CHECK19-NEXT: ret void
13774 //
13775 //
13776 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..18
13777 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
13778 // CHECK19-NEXT: entry:
13779 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13780 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13781 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
13782 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13783 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
13784 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13785 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13786 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13787 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13788 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
13789 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13790 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13791 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
13792 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
13793 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
13794 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
13795 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13796 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13797 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13798 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
13799 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13800 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13801 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
13802 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13803 // CHECK19: cond.true:
13804 // CHECK19-NEXT: br label [[COND_END:%.*]]
13805 // CHECK19: cond.false:
13806 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13807 // CHECK19-NEXT: br label [[COND_END]]
13808 // CHECK19: cond.end:
13809 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
13810 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
13811 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13812 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
13813 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13814 // CHECK19: omp.inner.for.cond:
13815 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13816 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13817 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
13818 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13819 // CHECK19: omp.inner.for.body:
13820 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13821 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13822 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..19 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
13823 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13824 // CHECK19: omp.inner.for.inc:
13825 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13826 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
13827 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
13828 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
13829 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
13830 // CHECK19: omp.inner.for.end:
13831 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13832 // CHECK19: omp.loop.exit:
13833 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
13834 // CHECK19-NEXT: ret void
13835 //
13836 //
13837 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..19
13838 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
13839 // CHECK19-NEXT: entry:
13840 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13841 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13842 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
13843 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
13844 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
13845 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13846 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
13847 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
13848 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
13849 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13850 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13851 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
13852 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13853 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13854 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
13855 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
13856 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
13857 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
13858 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
13859 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
13860 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
13861 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
13862 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
13863 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
13864 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13865 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13866 // CHECK19-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13867 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
13868 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13869 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13870 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
13871 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13872 // CHECK19: cond.true:
13873 // CHECK19-NEXT: br label [[COND_END:%.*]]
13874 // CHECK19: cond.false:
13875 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13876 // CHECK19-NEXT: br label [[COND_END]]
13877 // CHECK19: cond.end:
13878 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
13879 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
13880 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13881 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
13882 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13883 // CHECK19: omp.inner.for.cond:
13884 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13885 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13886 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
13887 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13888 // CHECK19: omp.inner.for.body:
13889 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13890 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
13891 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13892 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4
13893 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
13894 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
13895 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
13896 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
13897 // CHECK19: omp.body.continue:
13898 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13899 // CHECK19: omp.inner.for.inc:
13900 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13901 // CHECK19-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
13902 // CHECK19-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
13903 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
13904 // CHECK19: omp.inner.for.end:
13905 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13906 // CHECK19: omp.loop.exit:
13907 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
13908 // CHECK19-NEXT: ret void
13909 //
13910 //
13911 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121
13912 // CHECK19-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
13913 // CHECK19-NEXT: entry:
13914 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
13915 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
13916 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
13917 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..22 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
13918 // CHECK19-NEXT: ret void
13919 //
13920 //
13921 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..22
13922 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
13923 // CHECK19-NEXT: entry:
13924 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13925 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13926 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
13927 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13928 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
13929 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13930 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13931 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13932 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13933 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
13934 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13935 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13936 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
13937 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
13938 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
13939 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
13940 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13941 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13942 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13943 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
13944 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13945 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13946 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
13947 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13948 // CHECK19: cond.true:
13949 // CHECK19-NEXT: br label [[COND_END:%.*]]
13950 // CHECK19: cond.false:
13951 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13952 // CHECK19-NEXT: br label [[COND_END]]
13953 // CHECK19: cond.end:
13954 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
13955 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
13956 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13957 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
13958 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
13959 // CHECK19: omp.inner.for.cond:
13960 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13961 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13962 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
13963 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13964 // CHECK19: omp.inner.for.body:
13965 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13966 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13967 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..23 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
13968 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
13969 // CHECK19: omp.inner.for.inc:
13970 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13971 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
13972 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
13973 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
13974 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
13975 // CHECK19: omp.inner.for.end:
13976 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
13977 // CHECK19: omp.loop.exit:
13978 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
13979 // CHECK19-NEXT: ret void
13980 //
13981 //
13982 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..23
13983 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
13984 // CHECK19-NEXT: entry:
13985 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13986 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13987 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
13988 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
13989 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
13990 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
13991 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
13992 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
13993 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
13994 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13995 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13996 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
13997 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13998 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13999 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14000 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14001 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14002 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14003 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
14004 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
14005 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14006 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14007 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
14008 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
14009 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14010 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14011 // CHECK19-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14012 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
14013 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14014 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14015 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
14016 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14017 // CHECK19: cond.true:
14018 // CHECK19-NEXT: br label [[COND_END:%.*]]
14019 // CHECK19: cond.false:
14020 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14021 // CHECK19-NEXT: br label [[COND_END]]
14022 // CHECK19: cond.end:
14023 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
14024 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
14025 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14026 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
14027 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14028 // CHECK19: omp.inner.for.cond:
14029 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14030 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14031 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
14032 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14033 // CHECK19: omp.inner.for.body:
14034 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14035 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
14036 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14037 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4
14038 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4
14039 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
14040 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
14041 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
14042 // CHECK19: omp.body.continue:
14043 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14044 // CHECK19: omp.inner.for.inc:
14045 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14046 // CHECK19-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
14047 // CHECK19-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
14048 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
14049 // CHECK19: omp.inner.for.end:
14050 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
14051 // CHECK19: omp.loop.exit:
14052 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
14053 // CHECK19-NEXT: ret void
14054 //
14055 //
14056 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126
14057 // CHECK19-SAME: (i32 noundef [[M:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14058 // CHECK19-NEXT: entry:
14059 // CHECK19-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
14060 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14061 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
14062 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
14063 // CHECK19-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4
14064 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14065 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14066 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4
14067 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
14068 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
14069 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14070 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14071 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..26 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]])
14072 // CHECK19-NEXT: ret void
14073 //
14074 //
14075 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..26
14076 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
14077 // CHECK19-NEXT: entry:
14078 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14079 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14080 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14081 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14082 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14083 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
14084 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14085 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14086 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14087 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14088 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
14089 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
14090 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14091 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14092 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14093 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14094 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14095 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
14096 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
14097 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14098 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14099 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14100 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
14101 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14102 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14103 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
14104 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14105 // CHECK19: cond.true:
14106 // CHECK19-NEXT: br label [[COND_END:%.*]]
14107 // CHECK19: cond.false:
14108 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14109 // CHECK19-NEXT: br label [[COND_END]]
14110 // CHECK19: cond.end:
14111 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
14112 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
14113 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14114 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
14115 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14116 // CHECK19: omp.inner.for.cond:
14117 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14118 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14119 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
14120 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14121 // CHECK19: omp.inner.for.body:
14122 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14123 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14124 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14125 // CHECK19-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14126 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14127 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..27 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]])
14128 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14129 // CHECK19: omp.inner.for.inc:
14130 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14131 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
14132 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
14133 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
14134 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
14135 // CHECK19: omp.inner.for.end:
14136 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
14137 // CHECK19: omp.loop.exit:
14138 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
14139 // CHECK19-NEXT: ret void
14140 //
14141 //
14142 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..27
14143 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
14144 // CHECK19-NEXT: entry:
14145 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14146 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14147 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
14148 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
14149 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14150 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14151 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14152 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
14153 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
14154 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
14155 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14156 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14157 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
14158 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14159 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14160 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14161 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14162 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14163 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14164 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14165 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
14166 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
14167 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14168 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14169 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
14170 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
14171 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14172 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14173 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14174 // CHECK19-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14175 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
14176 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
14177 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
14178 // CHECK19: omp.dispatch.cond:
14179 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14180 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14181 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]]
14182 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14183 // CHECK19: cond.true:
14184 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14185 // CHECK19-NEXT: br label [[COND_END:%.*]]
14186 // CHECK19: cond.false:
14187 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14188 // CHECK19-NEXT: br label [[COND_END]]
14189 // CHECK19: cond.end:
14190 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP8]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
14191 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
14192 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14193 // CHECK19-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
14194 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14195 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14196 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
14197 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
14198 // CHECK19: omp.dispatch.body:
14199 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14200 // CHECK19: omp.inner.for.cond:
14201 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14202 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14203 // CHECK19-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
14204 // CHECK19-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14205 // CHECK19: omp.inner.for.body:
14206 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14207 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
14208 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14209 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4
14210 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4
14211 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP16]]
14212 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4
14213 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
14214 // CHECK19: omp.body.continue:
14215 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14216 // CHECK19: omp.inner.for.inc:
14217 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14218 // CHECK19-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1
14219 // CHECK19-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
14220 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
14221 // CHECK19: omp.inner.for.end:
14222 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
14223 // CHECK19: omp.dispatch.inc:
14224 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14225 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
14226 // CHECK19-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
14227 // CHECK19-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
14228 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14229 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
14230 // CHECK19-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
14231 // CHECK19-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
14232 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]]
14233 // CHECK19: omp.dispatch.end:
14234 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
14235 // CHECK19-NEXT: ret void
14236 //
14237 //
14238 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131
14239 // CHECK19-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14240 // CHECK19-NEXT: entry:
14241 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14242 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14243 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14244 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..30 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
14245 // CHECK19-NEXT: ret void
14246 //
14247 //
14248 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..30
14249 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14250 // CHECK19-NEXT: entry:
14251 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14252 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14253 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14254 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14255 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
14256 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14257 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14258 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14259 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14260 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
14261 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14262 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14263 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14264 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14265 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
14266 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
14267 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14268 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14269 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14270 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
14271 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14272 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14273 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
14274 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14275 // CHECK19: cond.true:
14276 // CHECK19-NEXT: br label [[COND_END:%.*]]
14277 // CHECK19: cond.false:
14278 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14279 // CHECK19-NEXT: br label [[COND_END]]
14280 // CHECK19: cond.end:
14281 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
14282 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
14283 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14284 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
14285 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14286 // CHECK19: omp.inner.for.cond:
14287 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14288 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14289 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
14290 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14291 // CHECK19: omp.inner.for.body:
14292 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14293 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14294 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..31 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
14295 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14296 // CHECK19: omp.inner.for.inc:
14297 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14298 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
14299 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
14300 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
14301 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
14302 // CHECK19: omp.inner.for.end:
14303 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
14304 // CHECK19: omp.loop.exit:
14305 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
14306 // CHECK19-NEXT: ret void
14307 //
14308 //
14309 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..31
14310 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14311 // CHECK19-NEXT: entry:
14312 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14313 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14314 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
14315 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
14316 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14317 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14318 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
14319 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
14320 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
14321 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14322 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14323 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
14324 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14325 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14326 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14327 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14328 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14329 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14330 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
14331 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
14332 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14333 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14334 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
14335 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
14336 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14337 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14338 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14339 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14340 // CHECK19-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14341 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
14342 // CHECK19-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
14343 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
14344 // CHECK19: omp.dispatch.cond:
14345 // CHECK19-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
14346 // CHECK19-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
14347 // CHECK19-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
14348 // CHECK19: omp.dispatch.body:
14349 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14350 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
14351 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14352 // CHECK19: omp.inner.for.cond:
14353 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
14354 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22
14355 // CHECK19-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
14356 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14357 // CHECK19: omp.inner.for.body:
14358 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
14359 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
14360 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14361 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22
14362 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !22
14363 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP12]]
14364 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !22
14365 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
14366 // CHECK19: omp.body.continue:
14367 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14368 // CHECK19: omp.inner.for.inc:
14369 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
14370 // CHECK19-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
14371 // CHECK19-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22
14372 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
14373 // CHECK19: omp.inner.for.end:
14374 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
14375 // CHECK19: omp.dispatch.inc:
14376 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]]
14377 // CHECK19: omp.dispatch.end:
14378 // CHECK19-NEXT: ret void
14379 //
14380 //
14381 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136
14382 // CHECK19-SAME: (i32 noundef [[M:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14383 // CHECK19-NEXT: entry:
14384 // CHECK19-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
14385 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14386 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
14387 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
14388 // CHECK19-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4
14389 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14390 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14391 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4
14392 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
14393 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
14394 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14395 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14396 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..34 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]])
14397 // CHECK19-NEXT: ret void
14398 //
14399 //
14400 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..34
14401 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
14402 // CHECK19-NEXT: entry:
14403 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14404 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14405 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14406 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14407 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14408 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
14409 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14410 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14411 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14412 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14413 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
14414 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
14415 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14416 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14417 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14418 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14419 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14420 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
14421 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
14422 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14423 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14424 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14425 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
14426 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14427 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14428 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
14429 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14430 // CHECK19: cond.true:
14431 // CHECK19-NEXT: br label [[COND_END:%.*]]
14432 // CHECK19: cond.false:
14433 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14434 // CHECK19-NEXT: br label [[COND_END]]
14435 // CHECK19: cond.end:
14436 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
14437 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
14438 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14439 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
14440 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14441 // CHECK19: omp.inner.for.cond:
14442 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14443 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14444 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
14445 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14446 // CHECK19: omp.inner.for.body:
14447 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14448 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14449 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14450 // CHECK19-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14451 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14452 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..35 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]])
14453 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14454 // CHECK19: omp.inner.for.inc:
14455 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14456 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
14457 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
14458 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
14459 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
14460 // CHECK19: omp.inner.for.end:
14461 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
14462 // CHECK19: omp.loop.exit:
14463 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
14464 // CHECK19-NEXT: ret void
14465 //
14466 //
14467 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..35
14468 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
14469 // CHECK19-NEXT: entry:
14470 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14471 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14472 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
14473 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
14474 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14475 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14476 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
14477 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
14478 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
14479 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
14480 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14481 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14482 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
14483 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14484 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14485 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14486 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14487 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14488 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14489 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14490 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4
14491 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4
14492 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14493 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14494 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
14495 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
14496 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14497 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14498 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14499 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14500 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14501 // CHECK19-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14502 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
14503 // CHECK19-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
14504 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
14505 // CHECK19: omp.dispatch.cond:
14506 // CHECK19-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
14507 // CHECK19-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
14508 // CHECK19-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
14509 // CHECK19: omp.dispatch.body:
14510 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14511 // CHECK19-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
14512 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
14513 // CHECK19: omp.inner.for.cond:
14514 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
14515 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25
14516 // CHECK19-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
14517 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14518 // CHECK19: omp.inner.for.body:
14519 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
14520 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
14521 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14522 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !25
14523 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !25
14524 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP13]]
14525 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !25
14526 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
14527 // CHECK19: omp.body.continue:
14528 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
14529 // CHECK19: omp.inner.for.inc:
14530 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
14531 // CHECK19-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP14]], 1
14532 // CHECK19-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25
14533 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]
14534 // CHECK19: omp.inner.for.end:
14535 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
14536 // CHECK19: omp.dispatch.inc:
14537 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]]
14538 // CHECK19: omp.dispatch.end:
14539 // CHECK19-NEXT: ret void
14540 //
14541 //
14542 // CHECK19-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
14543 // CHECK19-SAME: () #[[ATTR6:[0-9]+]] {
14544 // CHECK19-NEXT: entry:
14545 // CHECK19-NEXT: call void @__tgt_register_requires(i64 1)
14546 // CHECK19-NEXT: ret void
14547 //
14548