1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // expected-no-diagnostics
3 #ifndef HEADER
4 #define HEADER
5 
6 // Test host codegen.
7 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
8 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
9 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2
10 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
11 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
12 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4
13 
14 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5
15 // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
16 // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK6
17 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7
18 // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
19 // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK8
20 
21 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
22 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
23 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10
24 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11
25 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
26 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12
27 #ifdef CK1
28 
29 template <typename T, int X, long long Y>
30 struct SS{
31   T a[X];
32   float b;
33   int foo(void) {
34 
35     #pragma omp target
36     #pragma omp teams distribute parallel for
37     for(int i = 0; i < X; i++) {
38       a[i] = (T)0;
39     }
40     #pragma omp target
41     #pragma omp teams distribute parallel for schedule(static)
42     for(int i = 0; i < X; i++) {
43       a[i] = (T)0;
44     }
45     #pragma omp target
46     #pragma omp teams distribute parallel for schedule(static, X/2)
47     for(int i = 0; i < X; i++) {
48       a[i] = (T)0;
49     }
50 
51     #pragma omp target
52     #pragma omp teams distribute parallel for schedule(dynamic)
53     for(int i = 0; i < X; i++) {
54       a[i] = (T)0;
55     }
56 
57     #pragma omp target
58     #pragma omp teams distribute parallel for schedule(dynamic, X/2)
59     for(int i = 0; i < X; i++) {
60       a[i] = (T)0;
61     }
62 
63 
64 
65 
66 
67 
68 
69 
70 
71 
72 
73 
74 
75 
76 
77 
78     return a[0];
79   }
80 };
81 
82 int teams_template_struct(void) {
83   SS<int, 123, 456> V;
84   return V.foo();
85 
86 }
87 #endif // CK1
88 
89 // Test host codegen.
90 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13
91 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
92 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK14
93 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15
94 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
95 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK16
96 
97 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK17
98 // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
99 // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK18
100 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK19
101 // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
102 // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK20
103 
104 // RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK21
105 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
106 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK22
107 // RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK23
108 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
109 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK24
110 #ifdef CK2
111 
112 template <typename T, int n>
113 int tmain(T argc) {
114   T a[n];
115   int m = 10;
116 #pragma omp target
117 #pragma omp teams distribute parallel for
118   for(int i = 0; i < n; i++) {
119     a[i] = (T)0;
120   }
121 #pragma omp target
122 #pragma omp teams distribute parallel for schedule(static)
123   for(int i = 0; i < n; i++) {
124     a[i] = (T)0;
125   }
126 #pragma omp target
127 #pragma omp teams distribute parallel for schedule(static, m)
128   for(int i = 0; i < n; i++) {
129     a[i] = (T)0;
130   }
131 #pragma omp target
132 #pragma omp teams distribute parallel for schedule(dynamic)
133   for(int i = 0; i < n; i++) {
134     a[i] = (T)0;
135   }
136 #pragma omp target
137 #pragma omp teams distribute parallel for schedule(dynamic, m)
138   for(int i = 0; i < n; i++) {
139     a[i] = (T)0;
140   }
141   return 0;
142 }
143 
144 int main (int argc, char **argv) {
145   int n = 100;
146   int a[n];
147   int m = 10;
148 #pragma omp target
149 #pragma omp teams distribute parallel for
150   for(int i = 0; i < n; i++) {
151     a[i] = 0;
152   }
153 #pragma omp target
154 #pragma omp teams distribute parallel for dist_schedule(static)
155   for(int i = 0; i < n; i++) {
156     a[i] = 0;
157   }
158 #pragma omp target
159 #pragma omp teams distribute parallel for dist_schedule(static, m)
160   for(int i = 0; i < n; i++) {
161     a[i] = 0;
162   }
163 #pragma omp target
164 #pragma omp teams distribute parallel for schedule(dynamic)
165   for(int i = 0; i < n; i++) {
166     a[i] = 0;
167   }
168 #pragma omp target
169 #pragma omp teams distribute parallel for schedule(dynamic, m)
170   for(int i = 0; i < n; i++) {
171     a[i] = 0;
172   }
173   return tmain<int, 10>(argc);
174 }
175 
176 
177 
178 
179 
180 
181 
182 
183 
184 
185 
186 
187 
188 
189 
190 
191 
192 
193 
194 
195 
196 
197 
198 
199 
200 
201 
202 
203 
204 
205 
206 
207 
208 
209 #endif // CK2
210 #endif // #ifndef HEADER
211 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv
212 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
213 // CHECK1-NEXT:  entry:
214 // CHECK1-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
215 // CHECK1-NEXT:    [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
216 // CHECK1-NEXT:    ret i32 [[CALL]]
217 //
218 //
219 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
220 // CHECK1-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
221 // CHECK1-NEXT:  entry:
222 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
223 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
224 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
225 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
226 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
227 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8
228 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8
229 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8
230 // CHECK1-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
231 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8
232 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8
233 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8
234 // CHECK1-NEXT:    [[_TMP13:%.*]] = alloca i32, align 4
235 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 8
236 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 8
237 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 8
238 // CHECK1-NEXT:    [[_TMP20:%.*]] = alloca i32, align 4
239 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 8
240 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 8
241 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 8
242 // CHECK1-NEXT:    [[_TMP27:%.*]] = alloca i32, align 4
243 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
244 // CHECK1-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
245 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
246 // CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
247 // CHECK1-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
248 // CHECK1-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8
249 // CHECK1-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
250 // CHECK1-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
251 // CHECK1-NEXT:    store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8
252 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
253 // CHECK1-NEXT:    store i8* null, i8** [[TMP4]], align 8
254 // CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
255 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
256 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123)
257 // CHECK1-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
258 // CHECK1-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
259 // CHECK1-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
260 // CHECK1:       omp_offload.failed:
261 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
262 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
263 // CHECK1:       omp_offload.cont:
264 // CHECK1-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
265 // CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
266 // CHECK1-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
267 // CHECK1-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8
268 // CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
269 // CHECK1-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
270 // CHECK1-NEXT:    store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8
271 // CHECK1-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0
272 // CHECK1-NEXT:    store i8* null, i8** [[TMP13]], align 8
273 // CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
274 // CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
275 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
276 // CHECK1-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
277 // CHECK1-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
278 // CHECK1-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
279 // CHECK1:       omp_offload.failed7:
280 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]]
281 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
282 // CHECK1:       omp_offload.cont8:
283 // CHECK1-NEXT:    [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
284 // CHECK1-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
285 // CHECK1-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
286 // CHECK1-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8
287 // CHECK1-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
288 // CHECK1-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
289 // CHECK1-NEXT:    store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8
290 // CHECK1-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0
291 // CHECK1-NEXT:    store i8* null, i8** [[TMP22]], align 8
292 // CHECK1-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
293 // CHECK1-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
294 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
295 // CHECK1-NEXT:    [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
296 // CHECK1-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
297 // CHECK1-NEXT:    br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
298 // CHECK1:       omp_offload.failed14:
299 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(%struct.SS* [[THIS1]]) #[[ATTR2]]
300 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT15]]
301 // CHECK1:       omp_offload.cont15:
302 // CHECK1-NEXT:    [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
303 // CHECK1-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
304 // CHECK1-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS**
305 // CHECK1-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 8
306 // CHECK1-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
307 // CHECK1-NEXT:    [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]**
308 // CHECK1-NEXT:    store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 8
309 // CHECK1-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i64 0, i64 0
310 // CHECK1-NEXT:    store i8* null, i8** [[TMP31]], align 8
311 // CHECK1-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
312 // CHECK1-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
313 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
314 // CHECK1-NEXT:    [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
315 // CHECK1-NEXT:    [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
316 // CHECK1-NEXT:    br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]]
317 // CHECK1:       omp_offload.failed21:
318 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(%struct.SS* [[THIS1]]) #[[ATTR2]]
319 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT22]]
320 // CHECK1:       omp_offload.cont22:
321 // CHECK1-NEXT:    [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
322 // CHECK1-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
323 // CHECK1-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
324 // CHECK1-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 8
325 // CHECK1-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
326 // CHECK1-NEXT:    [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
327 // CHECK1-NEXT:    store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 8
328 // CHECK1-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 0
329 // CHECK1-NEXT:    store i8* null, i8** [[TMP40]], align 8
330 // CHECK1-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
331 // CHECK1-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
332 // CHECK1-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
333 // CHECK1-NEXT:    [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
334 // CHECK1-NEXT:    [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
335 // CHECK1-NEXT:    br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]]
336 // CHECK1:       omp_offload.failed28:
337 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(%struct.SS* [[THIS1]]) #[[ATTR2]]
338 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT29]]
339 // CHECK1:       omp_offload.cont29:
340 // CHECK1-NEXT:    [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
341 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 0
342 // CHECK1-NEXT:    [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
343 // CHECK1-NEXT:    ret i32 [[TMP45]]
344 //
345 //
346 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35
347 // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
348 // CHECK1-NEXT:  entry:
349 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
350 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
351 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
352 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
353 // CHECK1-NEXT:    ret void
354 //
355 //
356 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined.
357 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
358 // CHECK1-NEXT:  entry:
359 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
360 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
361 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
362 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
363 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
364 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
365 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
366 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
367 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
368 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
369 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
370 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
371 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
372 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
373 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
374 // CHECK1-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
375 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
376 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
377 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
378 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
379 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
380 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
381 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
382 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
383 // CHECK1:       cond.true:
384 // CHECK1-NEXT:    br label [[COND_END:%.*]]
385 // CHECK1:       cond.false:
386 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
387 // CHECK1-NEXT:    br label [[COND_END]]
388 // CHECK1:       cond.end:
389 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
390 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
391 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
392 // CHECK1-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
393 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
394 // CHECK1:       omp.inner.for.cond:
395 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
396 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
397 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
398 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
399 // CHECK1:       omp.inner.for.body:
400 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
401 // CHECK1-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
402 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
403 // CHECK1-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
404 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
405 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
406 // CHECK1:       omp.inner.for.inc:
407 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
408 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
409 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
410 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
411 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
412 // CHECK1:       omp.inner.for.end:
413 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
414 // CHECK1:       omp.loop.exit:
415 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
416 // CHECK1-NEXT:    ret void
417 //
418 //
419 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1
420 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
421 // CHECK1-NEXT:  entry:
422 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
423 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
424 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
425 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
426 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
427 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
428 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
429 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
430 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
431 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
432 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
433 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
434 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
435 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
436 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
437 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
438 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
439 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
440 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
441 // CHECK1-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
442 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
443 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
444 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
445 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
446 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
447 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
448 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
449 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
450 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
451 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
452 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
453 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
454 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
455 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
456 // CHECK1:       cond.true:
457 // CHECK1-NEXT:    br label [[COND_END:%.*]]
458 // CHECK1:       cond.false:
459 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
460 // CHECK1-NEXT:    br label [[COND_END]]
461 // CHECK1:       cond.end:
462 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
463 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
464 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
465 // CHECK1-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
466 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
467 // CHECK1:       omp.inner.for.cond:
468 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
469 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
470 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
471 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
472 // CHECK1:       omp.inner.for.body:
473 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
474 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
475 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
476 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
477 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
478 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
479 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
480 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
481 // CHECK1-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
482 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
483 // CHECK1:       omp.body.continue:
484 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
485 // CHECK1:       omp.inner.for.inc:
486 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
487 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
488 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
489 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
490 // CHECK1:       omp.inner.for.end:
491 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
492 // CHECK1:       omp.loop.exit:
493 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
494 // CHECK1-NEXT:    ret void
495 //
496 //
497 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
498 // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
499 // CHECK1-NEXT:  entry:
500 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
501 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
502 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
503 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
504 // CHECK1-NEXT:    ret void
505 //
506 //
507 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2
508 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
509 // CHECK1-NEXT:  entry:
510 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
511 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
512 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
513 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
514 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
515 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
516 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
517 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
518 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
519 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
520 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
521 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
522 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
523 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
524 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
525 // CHECK1-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
526 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
527 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
528 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
529 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
530 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
531 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
532 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
533 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
534 // CHECK1:       cond.true:
535 // CHECK1-NEXT:    br label [[COND_END:%.*]]
536 // CHECK1:       cond.false:
537 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
538 // CHECK1-NEXT:    br label [[COND_END]]
539 // CHECK1:       cond.end:
540 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
541 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
542 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
543 // CHECK1-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
544 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
545 // CHECK1:       omp.inner.for.cond:
546 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
547 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
548 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
549 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
550 // CHECK1:       omp.inner.for.body:
551 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
552 // CHECK1-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
553 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
554 // CHECK1-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
555 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
556 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
557 // CHECK1:       omp.inner.for.inc:
558 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
559 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
560 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
561 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
562 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
563 // CHECK1:       omp.inner.for.end:
564 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
565 // CHECK1:       omp.loop.exit:
566 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
567 // CHECK1-NEXT:    ret void
568 //
569 //
570 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3
571 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
572 // CHECK1-NEXT:  entry:
573 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
574 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
575 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
576 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
577 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
578 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
579 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
580 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
581 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
582 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
583 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
584 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
585 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
586 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
587 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
588 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
589 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
590 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
591 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
592 // CHECK1-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
593 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
594 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
595 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
596 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
597 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
598 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
599 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
600 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
601 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
602 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
603 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
604 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
605 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
606 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
607 // CHECK1:       cond.true:
608 // CHECK1-NEXT:    br label [[COND_END:%.*]]
609 // CHECK1:       cond.false:
610 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
611 // CHECK1-NEXT:    br label [[COND_END]]
612 // CHECK1:       cond.end:
613 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
614 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
615 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
616 // CHECK1-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
617 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
618 // CHECK1:       omp.inner.for.cond:
619 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
620 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
621 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
622 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
623 // CHECK1:       omp.inner.for.body:
624 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
625 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
626 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
627 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
628 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
629 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
630 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
631 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
632 // CHECK1-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
633 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
634 // CHECK1:       omp.body.continue:
635 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
636 // CHECK1:       omp.inner.for.inc:
637 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
638 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
639 // CHECK1-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
640 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
641 // CHECK1:       omp.inner.for.end:
642 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
643 // CHECK1:       omp.loop.exit:
644 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
645 // CHECK1-NEXT:    ret void
646 //
647 //
648 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45
649 // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
650 // CHECK1-NEXT:  entry:
651 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
652 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
653 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
654 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
655 // CHECK1-NEXT:    ret void
656 //
657 //
658 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6
659 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
660 // CHECK1-NEXT:  entry:
661 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
662 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
663 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
664 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
665 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
666 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
667 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
668 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
669 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
670 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
671 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
672 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
673 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
674 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
675 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
676 // CHECK1-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
677 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
678 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
679 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
680 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
681 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
682 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
683 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
684 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
685 // CHECK1:       cond.true:
686 // CHECK1-NEXT:    br label [[COND_END:%.*]]
687 // CHECK1:       cond.false:
688 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
689 // CHECK1-NEXT:    br label [[COND_END]]
690 // CHECK1:       cond.end:
691 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
692 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
693 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
694 // CHECK1-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
695 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
696 // CHECK1:       omp.inner.for.cond:
697 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
698 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
699 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
700 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
701 // CHECK1:       omp.inner.for.body:
702 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
703 // CHECK1-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
704 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
705 // CHECK1-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
706 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
707 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
708 // CHECK1:       omp.inner.for.inc:
709 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
710 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
711 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
712 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
713 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
714 // CHECK1:       omp.inner.for.end:
715 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
716 // CHECK1:       omp.loop.exit:
717 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
718 // CHECK1-NEXT:    ret void
719 //
720 //
721 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7
722 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
723 // CHECK1-NEXT:  entry:
724 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
725 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
726 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
727 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
728 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
729 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
730 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
731 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
732 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
733 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
734 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
735 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
736 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
737 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
738 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
739 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
740 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
741 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
742 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
743 // CHECK1-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
744 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
745 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
746 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
747 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
748 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
749 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
750 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
751 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
752 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
753 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
754 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
755 // CHECK1-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
756 // CHECK1:       omp.dispatch.cond:
757 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
758 // CHECK1-NEXT:    [[CONV2:%.*]] = sext i32 [[TMP5]] to i64
759 // CHECK1-NEXT:    [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
760 // CHECK1-NEXT:    [[CMP:%.*]] = icmp ugt i64 [[CONV2]], [[TMP6]]
761 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
762 // CHECK1:       cond.true:
763 // CHECK1-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
764 // CHECK1-NEXT:    br label [[COND_END:%.*]]
765 // CHECK1:       cond.false:
766 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
767 // CHECK1-NEXT:    [[CONV3:%.*]] = sext i32 [[TMP8]] to i64
768 // CHECK1-NEXT:    br label [[COND_END]]
769 // CHECK1:       cond.end:
770 // CHECK1-NEXT:    [[COND:%.*]] = phi i64 [ [[TMP7]], [[COND_TRUE]] ], [ [[CONV3]], [[COND_FALSE]] ]
771 // CHECK1-NEXT:    [[CONV4:%.*]] = trunc i64 [[COND]] to i32
772 // CHECK1-NEXT:    store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
773 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
774 // CHECK1-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
775 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
776 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
777 // CHECK1-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
778 // CHECK1-NEXT:    br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
779 // CHECK1:       omp.dispatch.body:
780 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
781 // CHECK1:       omp.inner.for.cond:
782 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
783 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
784 // CHECK1-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
785 // CHECK1-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
786 // CHECK1:       omp.inner.for.body:
787 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
788 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
789 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
790 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
791 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
792 // CHECK1-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
793 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
794 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
795 // CHECK1-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
796 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
797 // CHECK1:       omp.body.continue:
798 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
799 // CHECK1:       omp.inner.for.inc:
800 // CHECK1-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
801 // CHECK1-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP16]], 1
802 // CHECK1-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
803 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
804 // CHECK1:       omp.inner.for.end:
805 // CHECK1-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
806 // CHECK1:       omp.dispatch.inc:
807 // CHECK1-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
808 // CHECK1-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
809 // CHECK1-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
810 // CHECK1-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
811 // CHECK1-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
812 // CHECK1-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
813 // CHECK1-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
814 // CHECK1-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
815 // CHECK1-NEXT:    br label [[OMP_DISPATCH_COND]]
816 // CHECK1:       omp.dispatch.end:
817 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
818 // CHECK1-NEXT:    ret void
819 //
820 //
821 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51
822 // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
823 // CHECK1-NEXT:  entry:
824 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
825 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
826 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
827 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
828 // CHECK1-NEXT:    ret void
829 //
830 //
831 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10
832 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
833 // CHECK1-NEXT:  entry:
834 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
835 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
836 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
837 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
838 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
839 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
840 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
841 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
842 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
843 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
844 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
845 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
846 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
847 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
848 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
849 // CHECK1-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
850 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
851 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
852 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
853 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
854 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
855 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
856 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
857 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
858 // CHECK1:       cond.true:
859 // CHECK1-NEXT:    br label [[COND_END:%.*]]
860 // CHECK1:       cond.false:
861 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
862 // CHECK1-NEXT:    br label [[COND_END]]
863 // CHECK1:       cond.end:
864 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
865 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
866 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
867 // CHECK1-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
868 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
869 // CHECK1:       omp.inner.for.cond:
870 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
871 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
872 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
873 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
874 // CHECK1:       omp.inner.for.body:
875 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
876 // CHECK1-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
877 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
878 // CHECK1-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
879 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
880 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
881 // CHECK1:       omp.inner.for.inc:
882 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
883 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
884 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
885 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
886 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
887 // CHECK1:       omp.inner.for.end:
888 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
889 // CHECK1:       omp.loop.exit:
890 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
891 // CHECK1-NEXT:    ret void
892 //
893 //
894 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11
895 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
896 // CHECK1-NEXT:  entry:
897 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
898 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
899 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
900 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
901 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
902 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
903 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
904 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
905 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
906 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
907 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
908 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
909 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
910 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
911 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
912 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
913 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
914 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
915 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
916 // CHECK1-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
917 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
918 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
919 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
920 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
921 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
922 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
923 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
924 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
925 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
926 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
927 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
928 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
929 // CHECK1-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
930 // CHECK1-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
931 // CHECK1:       omp.dispatch.cond:
932 // CHECK1-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
933 // CHECK1-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
934 // CHECK1-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
935 // CHECK1:       omp.dispatch.body:
936 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
937 // CHECK1-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
938 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
939 // CHECK1:       omp.inner.for.cond:
940 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
941 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9
942 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
943 // CHECK1-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
944 // CHECK1:       omp.inner.for.body:
945 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
946 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
947 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
948 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9
949 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
950 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !9
951 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
952 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
953 // CHECK1-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !9
954 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
955 // CHECK1:       omp.body.continue:
956 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
957 // CHECK1:       omp.inner.for.inc:
958 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
959 // CHECK1-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
960 // CHECK1-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
961 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
962 // CHECK1:       omp.inner.for.end:
963 // CHECK1-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
964 // CHECK1:       omp.dispatch.inc:
965 // CHECK1-NEXT:    br label [[OMP_DISPATCH_COND]]
966 // CHECK1:       omp.dispatch.end:
967 // CHECK1-NEXT:    ret void
968 //
969 //
970 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57
971 // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
972 // CHECK1-NEXT:  entry:
973 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
974 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
975 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
976 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
977 // CHECK1-NEXT:    ret void
978 //
979 //
980 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..14
981 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
982 // CHECK1-NEXT:  entry:
983 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
984 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
985 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
986 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
987 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
988 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
989 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
990 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
991 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
992 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
993 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
994 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
995 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
996 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
997 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
998 // CHECK1-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
999 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1000 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1001 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1002 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1003 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1004 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1005 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1006 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1007 // CHECK1:       cond.true:
1008 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1009 // CHECK1:       cond.false:
1010 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1011 // CHECK1-NEXT:    br label [[COND_END]]
1012 // CHECK1:       cond.end:
1013 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1014 // CHECK1-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1015 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1016 // CHECK1-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1017 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1018 // CHECK1:       omp.inner.for.cond:
1019 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1020 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1021 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1022 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1023 // CHECK1:       omp.inner.for.body:
1024 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1025 // CHECK1-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1026 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1027 // CHECK1-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1028 // CHECK1-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
1029 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1030 // CHECK1:       omp.inner.for.inc:
1031 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1032 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1033 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1034 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1035 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
1036 // CHECK1:       omp.inner.for.end:
1037 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1038 // CHECK1:       omp.loop.exit:
1039 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1040 // CHECK1-NEXT:    ret void
1041 //
1042 //
1043 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..15
1044 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1045 // CHECK1-NEXT:  entry:
1046 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1047 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1048 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1049 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1050 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1051 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1052 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1053 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1054 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1055 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1056 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1057 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1058 // CHECK1-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1059 // CHECK1-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1060 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1061 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1062 // CHECK1-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1063 // CHECK1-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1064 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1065 // CHECK1-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
1066 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1067 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1068 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1069 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
1070 // CHECK1-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1071 // CHECK1-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1072 // CHECK1-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1073 // CHECK1-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1074 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1075 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1076 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1077 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
1078 // CHECK1-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
1079 // CHECK1-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
1080 // CHECK1:       omp.dispatch.cond:
1081 // CHECK1-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
1082 // CHECK1-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
1083 // CHECK1-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1084 // CHECK1:       omp.dispatch.body:
1085 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1086 // CHECK1-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
1087 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1088 // CHECK1:       omp.inner.for.cond:
1089 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
1090 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12
1091 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
1092 // CHECK1-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1093 // CHECK1:       omp.inner.for.body:
1094 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
1095 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
1096 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1097 // CHECK1-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12
1098 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1099 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12
1100 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
1101 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
1102 // CHECK1-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12
1103 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1104 // CHECK1:       omp.body.continue:
1105 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1106 // CHECK1:       omp.inner.for.inc:
1107 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
1108 // CHECK1-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
1109 // CHECK1-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
1110 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
1111 // CHECK1:       omp.inner.for.end:
1112 // CHECK1-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
1113 // CHECK1:       omp.dispatch.inc:
1114 // CHECK1-NEXT:    br label [[OMP_DISPATCH_COND]]
1115 // CHECK1:       omp.dispatch.end:
1116 // CHECK1-NEXT:    ret void
1117 //
1118 //
1119 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1120 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] {
1121 // CHECK1-NEXT:  entry:
1122 // CHECK1-NEXT:    call void @__tgt_register_requires(i64 1)
1123 // CHECK1-NEXT:    ret void
1124 //
1125 //
1126 // CHECK2-LABEL: define {{[^@]+}}@_Z21teams_template_structv
1127 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] {
1128 // CHECK2-NEXT:  entry:
1129 // CHECK2-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
1130 // CHECK2-NEXT:    [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
1131 // CHECK2-NEXT:    ret i32 [[CALL]]
1132 //
1133 //
1134 // CHECK2-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
1135 // CHECK2-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
1136 // CHECK2-NEXT:  entry:
1137 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1138 // CHECK2-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
1139 // CHECK2-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
1140 // CHECK2-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
1141 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1142 // CHECK2-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8
1143 // CHECK2-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8
1144 // CHECK2-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8
1145 // CHECK2-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
1146 // CHECK2-NEXT:    [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8
1147 // CHECK2-NEXT:    [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8
1148 // CHECK2-NEXT:    [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8
1149 // CHECK2-NEXT:    [[_TMP13:%.*]] = alloca i32, align 4
1150 // CHECK2-NEXT:    [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 8
1151 // CHECK2-NEXT:    [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 8
1152 // CHECK2-NEXT:    [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 8
1153 // CHECK2-NEXT:    [[_TMP20:%.*]] = alloca i32, align 4
1154 // CHECK2-NEXT:    [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 8
1155 // CHECK2-NEXT:    [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 8
1156 // CHECK2-NEXT:    [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 8
1157 // CHECK2-NEXT:    [[_TMP27:%.*]] = alloca i32, align 4
1158 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1159 // CHECK2-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1160 // CHECK2-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
1161 // CHECK2-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1162 // CHECK2-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
1163 // CHECK2-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8
1164 // CHECK2-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1165 // CHECK2-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
1166 // CHECK2-NEXT:    store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8
1167 // CHECK2-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1168 // CHECK2-NEXT:    store i8* null, i8** [[TMP4]], align 8
1169 // CHECK2-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1170 // CHECK2-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1171 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123)
1172 // CHECK2-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1173 // CHECK2-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
1174 // CHECK2-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1175 // CHECK2:       omp_offload.failed:
1176 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
1177 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1178 // CHECK2:       omp_offload.cont:
1179 // CHECK2-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1180 // CHECK2-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
1181 // CHECK2-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
1182 // CHECK2-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8
1183 // CHECK2-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
1184 // CHECK2-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
1185 // CHECK2-NEXT:    store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8
1186 // CHECK2-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0
1187 // CHECK2-NEXT:    store i8* null, i8** [[TMP13]], align 8
1188 // CHECK2-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
1189 // CHECK2-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
1190 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
1191 // CHECK2-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1192 // CHECK2-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
1193 // CHECK2-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
1194 // CHECK2:       omp_offload.failed7:
1195 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]]
1196 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
1197 // CHECK2:       omp_offload.cont8:
1198 // CHECK2-NEXT:    [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1199 // CHECK2-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
1200 // CHECK2-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
1201 // CHECK2-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8
1202 // CHECK2-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
1203 // CHECK2-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
1204 // CHECK2-NEXT:    store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8
1205 // CHECK2-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0
1206 // CHECK2-NEXT:    store i8* null, i8** [[TMP22]], align 8
1207 // CHECK2-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
1208 // CHECK2-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
1209 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
1210 // CHECK2-NEXT:    [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1211 // CHECK2-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
1212 // CHECK2-NEXT:    br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
1213 // CHECK2:       omp_offload.failed14:
1214 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(%struct.SS* [[THIS1]]) #[[ATTR2]]
1215 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT15]]
1216 // CHECK2:       omp_offload.cont15:
1217 // CHECK2-NEXT:    [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1218 // CHECK2-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
1219 // CHECK2-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS**
1220 // CHECK2-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 8
1221 // CHECK2-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
1222 // CHECK2-NEXT:    [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]**
1223 // CHECK2-NEXT:    store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 8
1224 // CHECK2-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i64 0, i64 0
1225 // CHECK2-NEXT:    store i8* null, i8** [[TMP31]], align 8
1226 // CHECK2-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
1227 // CHECK2-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
1228 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
1229 // CHECK2-NEXT:    [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1230 // CHECK2-NEXT:    [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
1231 // CHECK2-NEXT:    br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]]
1232 // CHECK2:       omp_offload.failed21:
1233 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(%struct.SS* [[THIS1]]) #[[ATTR2]]
1234 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT22]]
1235 // CHECK2:       omp_offload.cont22:
1236 // CHECK2-NEXT:    [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1237 // CHECK2-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
1238 // CHECK2-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
1239 // CHECK2-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 8
1240 // CHECK2-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
1241 // CHECK2-NEXT:    [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
1242 // CHECK2-NEXT:    store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 8
1243 // CHECK2-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 0
1244 // CHECK2-NEXT:    store i8* null, i8** [[TMP40]], align 8
1245 // CHECK2-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
1246 // CHECK2-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
1247 // CHECK2-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
1248 // CHECK2-NEXT:    [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
1249 // CHECK2-NEXT:    [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
1250 // CHECK2-NEXT:    br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]]
1251 // CHECK2:       omp_offload.failed28:
1252 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(%struct.SS* [[THIS1]]) #[[ATTR2]]
1253 // CHECK2-NEXT:    br label [[OMP_OFFLOAD_CONT29]]
1254 // CHECK2:       omp_offload.cont29:
1255 // CHECK2-NEXT:    [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
1256 // CHECK2-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 0
1257 // CHECK2-NEXT:    [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
1258 // CHECK2-NEXT:    ret i32 [[TMP45]]
1259 //
1260 //
1261 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35
1262 // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
1263 // CHECK2-NEXT:  entry:
1264 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1265 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1266 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1267 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1268 // CHECK2-NEXT:    ret void
1269 //
1270 //
1271 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined.
1272 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1273 // CHECK2-NEXT:  entry:
1274 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1275 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1276 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1277 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1278 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1279 // CHECK2-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1280 // CHECK2-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1281 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1282 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1283 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1284 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1285 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1286 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1287 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1288 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1289 // CHECK2-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
1290 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1291 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1292 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1293 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1294 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1295 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1296 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1297 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1298 // CHECK2:       cond.true:
1299 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1300 // CHECK2:       cond.false:
1301 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1302 // CHECK2-NEXT:    br label [[COND_END]]
1303 // CHECK2:       cond.end:
1304 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1305 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1306 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1307 // CHECK2-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1308 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1309 // CHECK2:       omp.inner.for.cond:
1310 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1311 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1312 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1313 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1314 // CHECK2:       omp.inner.for.body:
1315 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1316 // CHECK2-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1317 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1318 // CHECK2-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1319 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
1320 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1321 // CHECK2:       omp.inner.for.inc:
1322 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1323 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1324 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1325 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1326 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1327 // CHECK2:       omp.inner.for.end:
1328 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1329 // CHECK2:       omp.loop.exit:
1330 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1331 // CHECK2-NEXT:    ret void
1332 //
1333 //
1334 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1
1335 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1336 // CHECK2-NEXT:  entry:
1337 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1338 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1339 // CHECK2-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1340 // CHECK2-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1341 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1342 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1343 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1344 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1345 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1346 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1347 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1348 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1349 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1350 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1351 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1352 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1353 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1354 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1355 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1356 // CHECK2-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
1357 // CHECK2-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1358 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1359 // CHECK2-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1360 // CHECK2-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
1361 // CHECK2-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1362 // CHECK2-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1363 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1364 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1365 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1366 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1367 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1368 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1369 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
1370 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1371 // CHECK2:       cond.true:
1372 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1373 // CHECK2:       cond.false:
1374 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1375 // CHECK2-NEXT:    br label [[COND_END]]
1376 // CHECK2:       cond.end:
1377 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
1378 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1379 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1380 // CHECK2-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
1381 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1382 // CHECK2:       omp.inner.for.cond:
1383 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1384 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1385 // CHECK2-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1386 // CHECK2-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1387 // CHECK2:       omp.inner.for.body:
1388 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1389 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1390 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1391 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1392 // CHECK2-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1393 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
1394 // CHECK2-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
1395 // CHECK2-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
1396 // CHECK2-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
1397 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1398 // CHECK2:       omp.body.continue:
1399 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1400 // CHECK2:       omp.inner.for.inc:
1401 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1402 // CHECK2-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
1403 // CHECK2-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
1404 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1405 // CHECK2:       omp.inner.for.end:
1406 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1407 // CHECK2:       omp.loop.exit:
1408 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1409 // CHECK2-NEXT:    ret void
1410 //
1411 //
1412 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
1413 // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1414 // CHECK2-NEXT:  entry:
1415 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1416 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1417 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1418 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1419 // CHECK2-NEXT:    ret void
1420 //
1421 //
1422 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..2
1423 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1424 // CHECK2-NEXT:  entry:
1425 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1426 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1427 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1428 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1429 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1430 // CHECK2-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1431 // CHECK2-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1432 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1433 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1434 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1435 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1436 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1437 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1438 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1439 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1440 // CHECK2-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
1441 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1442 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1443 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1444 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1445 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1446 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1447 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1448 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1449 // CHECK2:       cond.true:
1450 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1451 // CHECK2:       cond.false:
1452 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1453 // CHECK2-NEXT:    br label [[COND_END]]
1454 // CHECK2:       cond.end:
1455 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1456 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1457 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1458 // CHECK2-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1459 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1460 // CHECK2:       omp.inner.for.cond:
1461 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1462 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1463 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1464 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1465 // CHECK2:       omp.inner.for.body:
1466 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1467 // CHECK2-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1468 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1469 // CHECK2-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1470 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
1471 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1472 // CHECK2:       omp.inner.for.inc:
1473 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1474 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1475 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1476 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1477 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1478 // CHECK2:       omp.inner.for.end:
1479 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1480 // CHECK2:       omp.loop.exit:
1481 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1482 // CHECK2-NEXT:    ret void
1483 //
1484 //
1485 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..3
1486 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1487 // CHECK2-NEXT:  entry:
1488 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1489 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1490 // CHECK2-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1491 // CHECK2-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1492 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1493 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1494 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1495 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1496 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1497 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1498 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1499 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1500 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1501 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1502 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1503 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1504 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1505 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1506 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1507 // CHECK2-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
1508 // CHECK2-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1509 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1510 // CHECK2-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1511 // CHECK2-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
1512 // CHECK2-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1513 // CHECK2-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1514 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1515 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1516 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1517 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1518 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1519 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1520 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
1521 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1522 // CHECK2:       cond.true:
1523 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1524 // CHECK2:       cond.false:
1525 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1526 // CHECK2-NEXT:    br label [[COND_END]]
1527 // CHECK2:       cond.end:
1528 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
1529 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
1530 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1531 // CHECK2-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
1532 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1533 // CHECK2:       omp.inner.for.cond:
1534 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1535 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1536 // CHECK2-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1537 // CHECK2-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1538 // CHECK2:       omp.inner.for.body:
1539 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1540 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1541 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1542 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1543 // CHECK2-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1544 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
1545 // CHECK2-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
1546 // CHECK2-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
1547 // CHECK2-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
1548 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1549 // CHECK2:       omp.body.continue:
1550 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1551 // CHECK2:       omp.inner.for.inc:
1552 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1553 // CHECK2-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
1554 // CHECK2-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
1555 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1556 // CHECK2:       omp.inner.for.end:
1557 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1558 // CHECK2:       omp.loop.exit:
1559 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1560 // CHECK2-NEXT:    ret void
1561 //
1562 //
1563 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45
1564 // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1565 // CHECK2-NEXT:  entry:
1566 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1567 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1568 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1569 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1570 // CHECK2-NEXT:    ret void
1571 //
1572 //
1573 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..6
1574 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1575 // CHECK2-NEXT:  entry:
1576 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1577 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1578 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1579 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1580 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1581 // CHECK2-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1582 // CHECK2-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1583 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1584 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1585 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1586 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1587 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1588 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1589 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1590 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1591 // CHECK2-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
1592 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1593 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1594 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1595 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1596 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1597 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1598 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1599 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1600 // CHECK2:       cond.true:
1601 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1602 // CHECK2:       cond.false:
1603 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1604 // CHECK2-NEXT:    br label [[COND_END]]
1605 // CHECK2:       cond.end:
1606 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1607 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1608 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1609 // CHECK2-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1610 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1611 // CHECK2:       omp.inner.for.cond:
1612 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1613 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1614 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1615 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1616 // CHECK2:       omp.inner.for.body:
1617 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1618 // CHECK2-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1619 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1620 // CHECK2-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1621 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
1622 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1623 // CHECK2:       omp.inner.for.inc:
1624 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1625 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1626 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1627 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1628 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1629 // CHECK2:       omp.inner.for.end:
1630 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1631 // CHECK2:       omp.loop.exit:
1632 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1633 // CHECK2-NEXT:    ret void
1634 //
1635 //
1636 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..7
1637 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1638 // CHECK2-NEXT:  entry:
1639 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1640 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1641 // CHECK2-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1642 // CHECK2-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1643 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1644 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1645 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1646 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1647 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1648 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1649 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1650 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1651 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1652 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1653 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1654 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1655 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1656 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1657 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1658 // CHECK2-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
1659 // CHECK2-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1660 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1661 // CHECK2-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1662 // CHECK2-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
1663 // CHECK2-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1664 // CHECK2-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1665 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1666 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1667 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1668 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
1669 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
1670 // CHECK2-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
1671 // CHECK2:       omp.dispatch.cond:
1672 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1673 // CHECK2-NEXT:    [[CONV2:%.*]] = sext i32 [[TMP5]] to i64
1674 // CHECK2-NEXT:    [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1675 // CHECK2-NEXT:    [[CMP:%.*]] = icmp ugt i64 [[CONV2]], [[TMP6]]
1676 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1677 // CHECK2:       cond.true:
1678 // CHECK2-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1679 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1680 // CHECK2:       cond.false:
1681 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1682 // CHECK2-NEXT:    [[CONV3:%.*]] = sext i32 [[TMP8]] to i64
1683 // CHECK2-NEXT:    br label [[COND_END]]
1684 // CHECK2:       cond.end:
1685 // CHECK2-NEXT:    [[COND:%.*]] = phi i64 [ [[TMP7]], [[COND_TRUE]] ], [ [[CONV3]], [[COND_FALSE]] ]
1686 // CHECK2-NEXT:    [[CONV4:%.*]] = trunc i64 [[COND]] to i32
1687 // CHECK2-NEXT:    store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
1688 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1689 // CHECK2-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
1690 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1691 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1692 // CHECK2-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
1693 // CHECK2-NEXT:    br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1694 // CHECK2:       omp.dispatch.body:
1695 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1696 // CHECK2:       omp.inner.for.cond:
1697 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1698 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1699 // CHECK2-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
1700 // CHECK2-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1701 // CHECK2:       omp.inner.for.body:
1702 // CHECK2-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1703 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
1704 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1705 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
1706 // CHECK2-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1707 // CHECK2-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
1708 // CHECK2-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
1709 // CHECK2-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
1710 // CHECK2-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
1711 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1712 // CHECK2:       omp.body.continue:
1713 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1714 // CHECK2:       omp.inner.for.inc:
1715 // CHECK2-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1716 // CHECK2-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP16]], 1
1717 // CHECK2-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
1718 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1719 // CHECK2:       omp.inner.for.end:
1720 // CHECK2-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
1721 // CHECK2:       omp.dispatch.inc:
1722 // CHECK2-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1723 // CHECK2-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1724 // CHECK2-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
1725 // CHECK2-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
1726 // CHECK2-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1727 // CHECK2-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1728 // CHECK2-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
1729 // CHECK2-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
1730 // CHECK2-NEXT:    br label [[OMP_DISPATCH_COND]]
1731 // CHECK2:       omp.dispatch.end:
1732 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
1733 // CHECK2-NEXT:    ret void
1734 //
1735 //
1736 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51
1737 // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1738 // CHECK2-NEXT:  entry:
1739 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1740 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1741 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1742 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1743 // CHECK2-NEXT:    ret void
1744 //
1745 //
1746 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..10
1747 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1748 // CHECK2-NEXT:  entry:
1749 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1750 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1751 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1752 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1753 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1754 // CHECK2-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1755 // CHECK2-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1756 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1757 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1758 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1759 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1760 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1761 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1762 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1763 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1764 // CHECK2-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
1765 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1766 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1767 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1768 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1769 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1770 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1771 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1772 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1773 // CHECK2:       cond.true:
1774 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1775 // CHECK2:       cond.false:
1776 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1777 // CHECK2-NEXT:    br label [[COND_END]]
1778 // CHECK2:       cond.end:
1779 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1780 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1781 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1782 // CHECK2-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1783 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1784 // CHECK2:       omp.inner.for.cond:
1785 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1786 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1787 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1788 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1789 // CHECK2:       omp.inner.for.body:
1790 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1791 // CHECK2-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1792 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1793 // CHECK2-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1794 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
1795 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1796 // CHECK2:       omp.inner.for.inc:
1797 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1798 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1799 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1800 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1801 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1802 // CHECK2:       omp.inner.for.end:
1803 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1804 // CHECK2:       omp.loop.exit:
1805 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1806 // CHECK2-NEXT:    ret void
1807 //
1808 //
1809 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..11
1810 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1811 // CHECK2-NEXT:  entry:
1812 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1813 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1814 // CHECK2-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1815 // CHECK2-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1816 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1817 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1818 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1819 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1820 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1821 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1822 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1823 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1824 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1825 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1826 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1827 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1828 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1829 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1830 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1831 // CHECK2-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
1832 // CHECK2-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1833 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1834 // CHECK2-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1835 // CHECK2-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
1836 // CHECK2-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1837 // CHECK2-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1838 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1839 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1840 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1841 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1842 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1843 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
1844 // CHECK2-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
1845 // CHECK2-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
1846 // CHECK2:       omp.dispatch.cond:
1847 // CHECK2-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
1848 // CHECK2-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
1849 // CHECK2-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1850 // CHECK2:       omp.dispatch.body:
1851 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1852 // CHECK2-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
1853 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1854 // CHECK2:       omp.inner.for.cond:
1855 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
1856 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9
1857 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
1858 // CHECK2-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1859 // CHECK2:       omp.inner.for.body:
1860 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
1861 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
1862 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1863 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9
1864 // CHECK2-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
1865 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !9
1866 // CHECK2-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
1867 // CHECK2-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
1868 // CHECK2-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !9
1869 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1870 // CHECK2:       omp.body.continue:
1871 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1872 // CHECK2:       omp.inner.for.inc:
1873 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
1874 // CHECK2-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
1875 // CHECK2-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
1876 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
1877 // CHECK2:       omp.inner.for.end:
1878 // CHECK2-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
1879 // CHECK2:       omp.dispatch.inc:
1880 // CHECK2-NEXT:    br label [[OMP_DISPATCH_COND]]
1881 // CHECK2:       omp.dispatch.end:
1882 // CHECK2-NEXT:    ret void
1883 //
1884 //
1885 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57
1886 // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1887 // CHECK2-NEXT:  entry:
1888 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1889 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1890 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1891 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
1892 // CHECK2-NEXT:    ret void
1893 //
1894 //
1895 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..14
1896 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1897 // CHECK2-NEXT:  entry:
1898 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1899 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1900 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1901 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1902 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1903 // CHECK2-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1904 // CHECK2-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1905 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1906 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1907 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1908 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1909 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1910 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1911 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1912 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
1913 // CHECK2-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
1914 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1915 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1916 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1917 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
1918 // CHECK2-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
1919 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1920 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1921 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1922 // CHECK2:       cond.true:
1923 // CHECK2-NEXT:    br label [[COND_END:%.*]]
1924 // CHECK2:       cond.false:
1925 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1926 // CHECK2-NEXT:    br label [[COND_END]]
1927 // CHECK2:       cond.end:
1928 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1929 // CHECK2-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
1930 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1931 // CHECK2-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
1932 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1933 // CHECK2:       omp.inner.for.cond:
1934 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1935 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1936 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1937 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1938 // CHECK2:       omp.inner.for.body:
1939 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
1940 // CHECK2-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1941 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
1942 // CHECK2-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1943 // CHECK2-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
1944 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1945 // CHECK2:       omp.inner.for.inc:
1946 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
1947 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
1948 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1949 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
1950 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
1951 // CHECK2:       omp.inner.for.end:
1952 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1953 // CHECK2:       omp.loop.exit:
1954 // CHECK2-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
1955 // CHECK2-NEXT:    ret void
1956 //
1957 //
1958 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..15
1959 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
1960 // CHECK2-NEXT:  entry:
1961 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
1962 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
1963 // CHECK2-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1964 // CHECK2-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1965 // CHECK2-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
1966 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1967 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1968 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1969 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1970 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1971 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1972 // CHECK2-NEXT:    [[I:%.*]] = alloca i32, align 4
1973 // CHECK2-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
1974 // CHECK2-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
1975 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1976 // CHECK2-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1977 // CHECK2-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
1978 // CHECK2-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
1979 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
1980 // CHECK2-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
1981 // CHECK2-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
1982 // CHECK2-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1983 // CHECK2-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
1984 // CHECK2-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
1985 // CHECK2-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
1986 // CHECK2-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
1987 // CHECK2-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
1988 // CHECK2-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
1989 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
1990 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
1991 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
1992 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
1993 // CHECK2-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
1994 // CHECK2-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
1995 // CHECK2:       omp.dispatch.cond:
1996 // CHECK2-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
1997 // CHECK2-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
1998 // CHECK2-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1999 // CHECK2:       omp.dispatch.body:
2000 // CHECK2-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2001 // CHECK2-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
2002 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2003 // CHECK2:       omp.inner.for.cond:
2004 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
2005 // CHECK2-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12
2006 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
2007 // CHECK2-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2008 // CHECK2:       omp.inner.for.body:
2009 // CHECK2-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
2010 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
2011 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2012 // CHECK2-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12
2013 // CHECK2-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
2014 // CHECK2-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12
2015 // CHECK2-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
2016 // CHECK2-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
2017 // CHECK2-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12
2018 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2019 // CHECK2:       omp.body.continue:
2020 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2021 // CHECK2:       omp.inner.for.inc:
2022 // CHECK2-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
2023 // CHECK2-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
2024 // CHECK2-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
2025 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
2026 // CHECK2:       omp.inner.for.end:
2027 // CHECK2-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
2028 // CHECK2:       omp.dispatch.inc:
2029 // CHECK2-NEXT:    br label [[OMP_DISPATCH_COND]]
2030 // CHECK2:       omp.dispatch.end:
2031 // CHECK2-NEXT:    ret void
2032 //
2033 //
2034 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2035 // CHECK2-SAME: () #[[ATTR3:[0-9]+]] {
2036 // CHECK2-NEXT:  entry:
2037 // CHECK2-NEXT:    call void @__tgt_register_requires(i64 1)
2038 // CHECK2-NEXT:    ret void
2039 //
2040 //
2041 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv
2042 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
2043 // CHECK3-NEXT:  entry:
2044 // CHECK3-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
2045 // CHECK3-NEXT:    [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
2046 // CHECK3-NEXT:    ret i32 [[CALL]]
2047 //
2048 //
2049 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
2050 // CHECK3-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
2051 // CHECK3-NEXT:  entry:
2052 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2053 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
2054 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
2055 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
2056 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2057 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4
2058 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4
2059 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4
2060 // CHECK3-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
2061 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4
2062 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4
2063 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4
2064 // CHECK3-NEXT:    [[_TMP13:%.*]] = alloca i32, align 4
2065 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 4
2066 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 4
2067 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 4
2068 // CHECK3-NEXT:    [[_TMP20:%.*]] = alloca i32, align 4
2069 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 4
2070 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 4
2071 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 4
2072 // CHECK3-NEXT:    [[_TMP27:%.*]] = alloca i32, align 4
2073 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2074 // CHECK3-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2075 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
2076 // CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2077 // CHECK3-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
2078 // CHECK3-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4
2079 // CHECK3-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2080 // CHECK3-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
2081 // CHECK3-NEXT:    store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4
2082 // CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
2083 // CHECK3-NEXT:    store i8* null, i8** [[TMP4]], align 4
2084 // CHECK3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2085 // CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2086 // CHECK3-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123)
2087 // CHECK3-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2088 // CHECK3-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
2089 // CHECK3-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2090 // CHECK3:       omp_offload.failed:
2091 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
2092 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]
2093 // CHECK3:       omp_offload.cont:
2094 // CHECK3-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2095 // CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
2096 // CHECK3-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
2097 // CHECK3-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4
2098 // CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
2099 // CHECK3-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
2100 // CHECK3-NEXT:    store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4
2101 // CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
2102 // CHECK3-NEXT:    store i8* null, i8** [[TMP13]], align 4
2103 // CHECK3-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
2104 // CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
2105 // CHECK3-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
2106 // CHECK3-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2107 // CHECK3-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
2108 // CHECK3-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
2109 // CHECK3:       omp_offload.failed7:
2110 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]]
2111 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
2112 // CHECK3:       omp_offload.cont8:
2113 // CHECK3-NEXT:    [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2114 // CHECK3-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
2115 // CHECK3-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
2116 // CHECK3-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4
2117 // CHECK3-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
2118 // CHECK3-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
2119 // CHECK3-NEXT:    store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4
2120 // CHECK3-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0
2121 // CHECK3-NEXT:    store i8* null, i8** [[TMP22]], align 4
2122 // CHECK3-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
2123 // CHECK3-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
2124 // CHECK3-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
2125 // CHECK3-NEXT:    [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2126 // CHECK3-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
2127 // CHECK3-NEXT:    br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
2128 // CHECK3:       omp_offload.failed14:
2129 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(%struct.SS* [[THIS1]]) #[[ATTR2]]
2130 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT15]]
2131 // CHECK3:       omp_offload.cont15:
2132 // CHECK3-NEXT:    [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2133 // CHECK3-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
2134 // CHECK3-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS**
2135 // CHECK3-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 4
2136 // CHECK3-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
2137 // CHECK3-NEXT:    [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]**
2138 // CHECK3-NEXT:    store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 4
2139 // CHECK3-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 0
2140 // CHECK3-NEXT:    store i8* null, i8** [[TMP31]], align 4
2141 // CHECK3-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
2142 // CHECK3-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
2143 // CHECK3-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
2144 // CHECK3-NEXT:    [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2145 // CHECK3-NEXT:    [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
2146 // CHECK3-NEXT:    br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]]
2147 // CHECK3:       omp_offload.failed21:
2148 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(%struct.SS* [[THIS1]]) #[[ATTR2]]
2149 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT22]]
2150 // CHECK3:       omp_offload.cont22:
2151 // CHECK3-NEXT:    [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2152 // CHECK3-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
2153 // CHECK3-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
2154 // CHECK3-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 4
2155 // CHECK3-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
2156 // CHECK3-NEXT:    [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
2157 // CHECK3-NEXT:    store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 4
2158 // CHECK3-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 0
2159 // CHECK3-NEXT:    store i8* null, i8** [[TMP40]], align 4
2160 // CHECK3-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
2161 // CHECK3-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
2162 // CHECK3-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
2163 // CHECK3-NEXT:    [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2164 // CHECK3-NEXT:    [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
2165 // CHECK3-NEXT:    br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]]
2166 // CHECK3:       omp_offload.failed28:
2167 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(%struct.SS* [[THIS1]]) #[[ATTR2]]
2168 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT29]]
2169 // CHECK3:       omp_offload.cont29:
2170 // CHECK3-NEXT:    [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2171 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i32 0, i32 0
2172 // CHECK3-NEXT:    [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
2173 // CHECK3-NEXT:    ret i32 [[TMP45]]
2174 //
2175 //
2176 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35
2177 // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
2178 // CHECK3-NEXT:  entry:
2179 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2180 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2181 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2182 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
2183 // CHECK3-NEXT:    ret void
2184 //
2185 //
2186 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined.
2187 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2188 // CHECK3-NEXT:  entry:
2189 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2190 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2191 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2192 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2193 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2194 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2195 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2196 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2197 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2198 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2199 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2200 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2201 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2202 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2203 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2204 // CHECK3-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
2205 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2206 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2207 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2208 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2209 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2210 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2211 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2212 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2213 // CHECK3:       cond.true:
2214 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2215 // CHECK3:       cond.false:
2216 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2217 // CHECK3-NEXT:    br label [[COND_END]]
2218 // CHECK3:       cond.end:
2219 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2220 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2221 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2222 // CHECK3-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2223 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2224 // CHECK3:       omp.inner.for.cond:
2225 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2226 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2227 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2228 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2229 // CHECK3:       omp.inner.for.body:
2230 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2231 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2232 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
2233 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2234 // CHECK3:       omp.inner.for.inc:
2235 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2236 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2237 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
2238 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2239 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
2240 // CHECK3:       omp.inner.for.end:
2241 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2242 // CHECK3:       omp.loop.exit:
2243 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2244 // CHECK3-NEXT:    ret void
2245 //
2246 //
2247 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1
2248 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2249 // CHECK3-NEXT:  entry:
2250 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2251 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2252 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2253 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2254 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2255 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2256 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2257 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2258 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2259 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2260 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2261 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2262 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2263 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2264 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2265 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2266 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2267 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2268 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2269 // CHECK3-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
2270 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2271 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2272 // CHECK3-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
2273 // CHECK3-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
2274 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2275 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2276 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2277 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2278 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2279 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2280 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
2281 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2282 // CHECK3:       cond.true:
2283 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2284 // CHECK3:       cond.false:
2285 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2286 // CHECK3-NEXT:    br label [[COND_END]]
2287 // CHECK3:       cond.end:
2288 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
2289 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2290 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2291 // CHECK3-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
2292 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2293 // CHECK3:       omp.inner.for.cond:
2294 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2295 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2296 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2297 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2298 // CHECK3:       omp.inner.for.body:
2299 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2300 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2301 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2302 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
2303 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
2304 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
2305 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
2306 // CHECK3-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
2307 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2308 // CHECK3:       omp.body.continue:
2309 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2310 // CHECK3:       omp.inner.for.inc:
2311 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2312 // CHECK3-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
2313 // CHECK3-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
2314 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
2315 // CHECK3:       omp.inner.for.end:
2316 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2317 // CHECK3:       omp.loop.exit:
2318 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
2319 // CHECK3-NEXT:    ret void
2320 //
2321 //
2322 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
2323 // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2324 // CHECK3-NEXT:  entry:
2325 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2326 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2327 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2328 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
2329 // CHECK3-NEXT:    ret void
2330 //
2331 //
2332 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2
2333 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2334 // CHECK3-NEXT:  entry:
2335 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2336 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2337 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2338 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2339 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2340 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2341 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2342 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2343 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2344 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2345 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2346 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2347 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2348 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2349 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2350 // CHECK3-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
2351 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2352 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2353 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2354 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2355 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2356 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2357 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2358 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2359 // CHECK3:       cond.true:
2360 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2361 // CHECK3:       cond.false:
2362 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2363 // CHECK3-NEXT:    br label [[COND_END]]
2364 // CHECK3:       cond.end:
2365 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2366 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2367 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2368 // CHECK3-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2369 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2370 // CHECK3:       omp.inner.for.cond:
2371 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2372 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2373 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2374 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2375 // CHECK3:       omp.inner.for.body:
2376 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2377 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2378 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
2379 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2380 // CHECK3:       omp.inner.for.inc:
2381 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2382 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2383 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
2384 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2385 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
2386 // CHECK3:       omp.inner.for.end:
2387 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2388 // CHECK3:       omp.loop.exit:
2389 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2390 // CHECK3-NEXT:    ret void
2391 //
2392 //
2393 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3
2394 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2395 // CHECK3-NEXT:  entry:
2396 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2397 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2398 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2399 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2400 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2401 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2402 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2403 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2404 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2405 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2406 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2407 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2408 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2409 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2410 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2411 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2412 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2413 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2414 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2415 // CHECK3-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
2416 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2417 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2418 // CHECK3-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
2419 // CHECK3-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
2420 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2421 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2422 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2423 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2424 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2425 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2426 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
2427 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2428 // CHECK3:       cond.true:
2429 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2430 // CHECK3:       cond.false:
2431 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2432 // CHECK3-NEXT:    br label [[COND_END]]
2433 // CHECK3:       cond.end:
2434 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
2435 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2436 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2437 // CHECK3-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
2438 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2439 // CHECK3:       omp.inner.for.cond:
2440 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2441 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2442 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2443 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2444 // CHECK3:       omp.inner.for.body:
2445 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2446 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2447 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2448 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
2449 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
2450 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
2451 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
2452 // CHECK3-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
2453 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2454 // CHECK3:       omp.body.continue:
2455 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2456 // CHECK3:       omp.inner.for.inc:
2457 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2458 // CHECK3-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
2459 // CHECK3-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
2460 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
2461 // CHECK3:       omp.inner.for.end:
2462 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2463 // CHECK3:       omp.loop.exit:
2464 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
2465 // CHECK3-NEXT:    ret void
2466 //
2467 //
2468 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45
2469 // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2470 // CHECK3-NEXT:  entry:
2471 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2472 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2473 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2474 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
2475 // CHECK3-NEXT:    ret void
2476 //
2477 //
2478 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..6
2479 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2480 // CHECK3-NEXT:  entry:
2481 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2482 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2483 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2484 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2485 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2486 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2487 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2488 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2489 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2490 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2491 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2492 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2493 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2494 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2495 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2496 // CHECK3-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
2497 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2498 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2499 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2500 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2501 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2502 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2503 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2504 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2505 // CHECK3:       cond.true:
2506 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2507 // CHECK3:       cond.false:
2508 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2509 // CHECK3-NEXT:    br label [[COND_END]]
2510 // CHECK3:       cond.end:
2511 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2512 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2513 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2514 // CHECK3-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2515 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2516 // CHECK3:       omp.inner.for.cond:
2517 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2518 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2519 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2520 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2521 // CHECK3:       omp.inner.for.body:
2522 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2523 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2524 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
2525 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2526 // CHECK3:       omp.inner.for.inc:
2527 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2528 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2529 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
2530 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2531 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
2532 // CHECK3:       omp.inner.for.end:
2533 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2534 // CHECK3:       omp.loop.exit:
2535 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2536 // CHECK3-NEXT:    ret void
2537 //
2538 //
2539 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..7
2540 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2541 // CHECK3-NEXT:  entry:
2542 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2543 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2544 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2545 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2546 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2547 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2548 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2549 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2550 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2551 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2552 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2553 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2554 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2555 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2556 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2557 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2558 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2559 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2560 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2561 // CHECK3-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
2562 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2563 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2564 // CHECK3-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
2565 // CHECK3-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
2566 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2567 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2568 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2569 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
2570 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
2571 // CHECK3-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
2572 // CHECK3:       omp.dispatch.cond:
2573 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2574 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2575 // CHECK3-NEXT:    [[CMP:%.*]] = icmp ugt i32 [[TMP5]], [[TMP6]]
2576 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2577 // CHECK3:       cond.true:
2578 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2579 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2580 // CHECK3:       cond.false:
2581 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2582 // CHECK3-NEXT:    br label [[COND_END]]
2583 // CHECK3:       cond.end:
2584 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
2585 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
2586 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2587 // CHECK3-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
2588 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2589 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2590 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
2591 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2592 // CHECK3:       omp.dispatch.body:
2593 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2594 // CHECK3:       omp.inner.for.cond:
2595 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2596 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2597 // CHECK3-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
2598 // CHECK3-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2599 // CHECK3:       omp.inner.for.body:
2600 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2601 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
2602 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2603 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
2604 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
2605 // CHECK3-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
2606 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP15]]
2607 // CHECK3-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
2608 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2609 // CHECK3:       omp.body.continue:
2610 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2611 // CHECK3:       omp.inner.for.inc:
2612 // CHECK3-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2613 // CHECK3-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1
2614 // CHECK3-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
2615 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
2616 // CHECK3:       omp.inner.for.end:
2617 // CHECK3-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
2618 // CHECK3:       omp.dispatch.inc:
2619 // CHECK3-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2620 // CHECK3-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2621 // CHECK3-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
2622 // CHECK3-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
2623 // CHECK3-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2624 // CHECK3-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2625 // CHECK3-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
2626 // CHECK3-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
2627 // CHECK3-NEXT:    br label [[OMP_DISPATCH_COND]]
2628 // CHECK3:       omp.dispatch.end:
2629 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
2630 // CHECK3-NEXT:    ret void
2631 //
2632 //
2633 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51
2634 // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2635 // CHECK3-NEXT:  entry:
2636 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2637 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2638 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2639 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
2640 // CHECK3-NEXT:    ret void
2641 //
2642 //
2643 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..10
2644 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2645 // CHECK3-NEXT:  entry:
2646 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2647 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2648 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2649 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2650 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2651 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2652 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2653 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2654 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2655 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2656 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2657 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2658 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2659 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2660 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2661 // CHECK3-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
2662 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2663 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2664 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2665 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2666 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2667 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2668 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2669 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2670 // CHECK3:       cond.true:
2671 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2672 // CHECK3:       cond.false:
2673 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2674 // CHECK3-NEXT:    br label [[COND_END]]
2675 // CHECK3:       cond.end:
2676 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2677 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2678 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2679 // CHECK3-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2680 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2681 // CHECK3:       omp.inner.for.cond:
2682 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2683 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2684 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2685 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2686 // CHECK3:       omp.inner.for.body:
2687 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2688 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2689 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
2690 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2691 // CHECK3:       omp.inner.for.inc:
2692 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2693 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2694 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
2695 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2696 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
2697 // CHECK3:       omp.inner.for.end:
2698 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2699 // CHECK3:       omp.loop.exit:
2700 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2701 // CHECK3-NEXT:    ret void
2702 //
2703 //
2704 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..11
2705 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2706 // CHECK3-NEXT:  entry:
2707 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2708 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2709 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2710 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2711 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2712 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2713 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2714 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2715 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2716 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2717 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2718 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2719 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2720 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2721 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2722 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2723 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2724 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2725 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2726 // CHECK3-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
2727 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2728 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2729 // CHECK3-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
2730 // CHECK3-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
2731 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2732 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2733 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2734 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2735 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2736 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
2737 // CHECK3-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
2738 // CHECK3-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
2739 // CHECK3:       omp.dispatch.cond:
2740 // CHECK3-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
2741 // CHECK3-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
2742 // CHECK3-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2743 // CHECK3:       omp.dispatch.body:
2744 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2745 // CHECK3-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
2746 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2747 // CHECK3:       omp.inner.for.cond:
2748 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
2749 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10
2750 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
2751 // CHECK3-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2752 // CHECK3:       omp.inner.for.body:
2753 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
2754 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
2755 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2756 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !10
2757 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
2758 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !10
2759 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
2760 // CHECK3-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !10
2761 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2762 // CHECK3:       omp.body.continue:
2763 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2764 // CHECK3:       omp.inner.for.inc:
2765 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
2766 // CHECK3-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
2767 // CHECK3-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
2768 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
2769 // CHECK3:       omp.inner.for.end:
2770 // CHECK3-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
2771 // CHECK3:       omp.dispatch.inc:
2772 // CHECK3-NEXT:    br label [[OMP_DISPATCH_COND]]
2773 // CHECK3:       omp.dispatch.end:
2774 // CHECK3-NEXT:    ret void
2775 //
2776 //
2777 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57
2778 // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2779 // CHECK3-NEXT:  entry:
2780 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2781 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2782 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2783 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
2784 // CHECK3-NEXT:    ret void
2785 //
2786 //
2787 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..14
2788 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2789 // CHECK3-NEXT:  entry:
2790 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2791 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2792 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2793 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2794 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2795 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2796 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2797 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2798 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2799 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2800 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2801 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2802 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2803 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2804 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
2805 // CHECK3-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
2806 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2807 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2808 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2809 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
2810 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
2811 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2812 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2813 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2814 // CHECK3:       cond.true:
2815 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2816 // CHECK3:       cond.false:
2817 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2818 // CHECK3-NEXT:    br label [[COND_END]]
2819 // CHECK3:       cond.end:
2820 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2821 // CHECK3-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
2822 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2823 // CHECK3-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
2824 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2825 // CHECK3:       omp.inner.for.cond:
2826 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2827 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2828 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2829 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2830 // CHECK3:       omp.inner.for.body:
2831 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
2832 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
2833 // CHECK3-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
2834 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2835 // CHECK3:       omp.inner.for.inc:
2836 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
2837 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
2838 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
2839 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
2840 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
2841 // CHECK3:       omp.inner.for.end:
2842 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2843 // CHECK3:       omp.loop.exit:
2844 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
2845 // CHECK3-NEXT:    ret void
2846 //
2847 //
2848 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..15
2849 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
2850 // CHECK3-NEXT:  entry:
2851 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
2852 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
2853 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2854 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2855 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2856 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2857 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2858 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2859 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2860 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2861 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2862 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2863 // CHECK3-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
2864 // CHECK3-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
2865 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2866 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2867 // CHECK3-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2868 // CHECK3-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2869 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
2870 // CHECK3-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
2871 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
2872 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
2873 // CHECK3-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
2874 // CHECK3-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
2875 // CHECK3-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
2876 // CHECK3-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
2877 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2878 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
2879 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
2880 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
2881 // CHECK3-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
2882 // CHECK3-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
2883 // CHECK3:       omp.dispatch.cond:
2884 // CHECK3-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
2885 // CHECK3-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
2886 // CHECK3-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2887 // CHECK3:       omp.dispatch.body:
2888 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
2889 // CHECK3-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
2890 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2891 // CHECK3:       omp.inner.for.cond:
2892 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
2893 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
2894 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
2895 // CHECK3-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2896 // CHECK3:       omp.inner.for.body:
2897 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
2898 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
2899 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2900 // CHECK3-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
2901 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
2902 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13
2903 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
2904 // CHECK3-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13
2905 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2906 // CHECK3:       omp.body.continue:
2907 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2908 // CHECK3:       omp.inner.for.inc:
2909 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
2910 // CHECK3-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
2911 // CHECK3-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
2912 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
2913 // CHECK3:       omp.inner.for.end:
2914 // CHECK3-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
2915 // CHECK3:       omp.dispatch.inc:
2916 // CHECK3-NEXT:    br label [[OMP_DISPATCH_COND]]
2917 // CHECK3:       omp.dispatch.end:
2918 // CHECK3-NEXT:    ret void
2919 //
2920 //
2921 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2922 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] {
2923 // CHECK3-NEXT:  entry:
2924 // CHECK3-NEXT:    call void @__tgt_register_requires(i64 1)
2925 // CHECK3-NEXT:    ret void
2926 //
2927 //
2928 // CHECK4-LABEL: define {{[^@]+}}@_Z21teams_template_structv
2929 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] {
2930 // CHECK4-NEXT:  entry:
2931 // CHECK4-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
2932 // CHECK4-NEXT:    [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
2933 // CHECK4-NEXT:    ret i32 [[CALL]]
2934 //
2935 //
2936 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
2937 // CHECK4-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
2938 // CHECK4-NEXT:  entry:
2939 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
2940 // CHECK4-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
2941 // CHECK4-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
2942 // CHECK4-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
2943 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2944 // CHECK4-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4
2945 // CHECK4-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4
2946 // CHECK4-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4
2947 // CHECK4-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
2948 // CHECK4-NEXT:    [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4
2949 // CHECK4-NEXT:    [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4
2950 // CHECK4-NEXT:    [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4
2951 // CHECK4-NEXT:    [[_TMP13:%.*]] = alloca i32, align 4
2952 // CHECK4-NEXT:    [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 4
2953 // CHECK4-NEXT:    [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 4
2954 // CHECK4-NEXT:    [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 4
2955 // CHECK4-NEXT:    [[_TMP20:%.*]] = alloca i32, align 4
2956 // CHECK4-NEXT:    [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 4
2957 // CHECK4-NEXT:    [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 4
2958 // CHECK4-NEXT:    [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 4
2959 // CHECK4-NEXT:    [[_TMP27:%.*]] = alloca i32, align 4
2960 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
2961 // CHECK4-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
2962 // CHECK4-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
2963 // CHECK4-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2964 // CHECK4-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
2965 // CHECK4-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4
2966 // CHECK4-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2967 // CHECK4-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
2968 // CHECK4-NEXT:    store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4
2969 // CHECK4-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
2970 // CHECK4-NEXT:    store i8* null, i8** [[TMP4]], align 4
2971 // CHECK4-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2972 // CHECK4-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2973 // CHECK4-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123)
2974 // CHECK4-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2975 // CHECK4-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
2976 // CHECK4-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2977 // CHECK4:       omp_offload.failed:
2978 // CHECK4-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
2979 // CHECK4-NEXT:    br label [[OMP_OFFLOAD_CONT]]
2980 // CHECK4:       omp_offload.cont:
2981 // CHECK4-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
2982 // CHECK4-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
2983 // CHECK4-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
2984 // CHECK4-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4
2985 // CHECK4-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
2986 // CHECK4-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
2987 // CHECK4-NEXT:    store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4
2988 // CHECK4-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
2989 // CHECK4-NEXT:    store i8* null, i8** [[TMP13]], align 4
2990 // CHECK4-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
2991 // CHECK4-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
2992 // CHECK4-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
2993 // CHECK4-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
2994 // CHECK4-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
2995 // CHECK4-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
2996 // CHECK4:       omp_offload.failed7:
2997 // CHECK4-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]]
2998 // CHECK4-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
2999 // CHECK4:       omp_offload.cont8:
3000 // CHECK4-NEXT:    [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3001 // CHECK4-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
3002 // CHECK4-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
3003 // CHECK4-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4
3004 // CHECK4-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
3005 // CHECK4-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
3006 // CHECK4-NEXT:    store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4
3007 // CHECK4-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0
3008 // CHECK4-NEXT:    store i8* null, i8** [[TMP22]], align 4
3009 // CHECK4-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
3010 // CHECK4-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
3011 // CHECK4-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
3012 // CHECK4-NEXT:    [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3013 // CHECK4-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
3014 // CHECK4-NEXT:    br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
3015 // CHECK4:       omp_offload.failed14:
3016 // CHECK4-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(%struct.SS* [[THIS1]]) #[[ATTR2]]
3017 // CHECK4-NEXT:    br label [[OMP_OFFLOAD_CONT15]]
3018 // CHECK4:       omp_offload.cont15:
3019 // CHECK4-NEXT:    [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3020 // CHECK4-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
3021 // CHECK4-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS**
3022 // CHECK4-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 4
3023 // CHECK4-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
3024 // CHECK4-NEXT:    [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]**
3025 // CHECK4-NEXT:    store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 4
3026 // CHECK4-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 0
3027 // CHECK4-NEXT:    store i8* null, i8** [[TMP31]], align 4
3028 // CHECK4-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
3029 // CHECK4-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
3030 // CHECK4-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
3031 // CHECK4-NEXT:    [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3032 // CHECK4-NEXT:    [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
3033 // CHECK4-NEXT:    br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]]
3034 // CHECK4:       omp_offload.failed21:
3035 // CHECK4-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(%struct.SS* [[THIS1]]) #[[ATTR2]]
3036 // CHECK4-NEXT:    br label [[OMP_OFFLOAD_CONT22]]
3037 // CHECK4:       omp_offload.cont22:
3038 // CHECK4-NEXT:    [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3039 // CHECK4-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
3040 // CHECK4-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
3041 // CHECK4-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 4
3042 // CHECK4-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
3043 // CHECK4-NEXT:    [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
3044 // CHECK4-NEXT:    store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 4
3045 // CHECK4-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 0
3046 // CHECK4-NEXT:    store i8* null, i8** [[TMP40]], align 4
3047 // CHECK4-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
3048 // CHECK4-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
3049 // CHECK4-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
3050 // CHECK4-NEXT:    [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3051 // CHECK4-NEXT:    [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
3052 // CHECK4-NEXT:    br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]]
3053 // CHECK4:       omp_offload.failed28:
3054 // CHECK4-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(%struct.SS* [[THIS1]]) #[[ATTR2]]
3055 // CHECK4-NEXT:    br label [[OMP_OFFLOAD_CONT29]]
3056 // CHECK4:       omp_offload.cont29:
3057 // CHECK4-NEXT:    [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3058 // CHECK4-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i32 0, i32 0
3059 // CHECK4-NEXT:    [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
3060 // CHECK4-NEXT:    ret i32 [[TMP45]]
3061 //
3062 //
3063 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35
3064 // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
3065 // CHECK4-NEXT:  entry:
3066 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3067 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3068 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3069 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3070 // CHECK4-NEXT:    ret void
3071 //
3072 //
3073 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined.
3074 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3075 // CHECK4-NEXT:  entry:
3076 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3077 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3078 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3079 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3080 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3081 // CHECK4-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3082 // CHECK4-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3083 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3084 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3085 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
3086 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3087 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3088 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3089 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3090 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3091 // CHECK4-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
3092 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3093 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3094 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3095 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3096 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3097 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3098 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3099 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3100 // CHECK4:       cond.true:
3101 // CHECK4-NEXT:    br label [[COND_END:%.*]]
3102 // CHECK4:       cond.false:
3103 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3104 // CHECK4-NEXT:    br label [[COND_END]]
3105 // CHECK4:       cond.end:
3106 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3107 // CHECK4-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3108 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3109 // CHECK4-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3110 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3111 // CHECK4:       omp.inner.for.cond:
3112 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3113 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3114 // CHECK4-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3115 // CHECK4-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3116 // CHECK4:       omp.inner.for.body:
3117 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3118 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3119 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
3120 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3121 // CHECK4:       omp.inner.for.inc:
3122 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3123 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3124 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
3125 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3126 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
3127 // CHECK4:       omp.inner.for.end:
3128 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3129 // CHECK4:       omp.loop.exit:
3130 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3131 // CHECK4-NEXT:    ret void
3132 //
3133 //
3134 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1
3135 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3136 // CHECK4-NEXT:  entry:
3137 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3138 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3139 // CHECK4-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3140 // CHECK4-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3141 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3142 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3143 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3144 // CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3145 // CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3146 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3147 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3148 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
3149 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3150 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3151 // CHECK4-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3152 // CHECK4-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3153 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3154 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3155 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3156 // CHECK4-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
3157 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3158 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3159 // CHECK4-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
3160 // CHECK4-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
3161 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3162 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3163 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3164 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
3165 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3166 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3167 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
3168 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3169 // CHECK4:       cond.true:
3170 // CHECK4-NEXT:    br label [[COND_END:%.*]]
3171 // CHECK4:       cond.false:
3172 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3173 // CHECK4-NEXT:    br label [[COND_END]]
3174 // CHECK4:       cond.end:
3175 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
3176 // CHECK4-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3177 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3178 // CHECK4-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
3179 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3180 // CHECK4:       omp.inner.for.cond:
3181 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3182 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3183 // CHECK4-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
3184 // CHECK4-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3185 // CHECK4:       omp.inner.for.body:
3186 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3187 // CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
3188 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3189 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
3190 // CHECK4-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
3191 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
3192 // CHECK4-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
3193 // CHECK4-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
3194 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3195 // CHECK4:       omp.body.continue:
3196 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3197 // CHECK4:       omp.inner.for.inc:
3198 // CHECK4-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3199 // CHECK4-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
3200 // CHECK4-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
3201 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
3202 // CHECK4:       omp.inner.for.end:
3203 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3204 // CHECK4:       omp.loop.exit:
3205 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
3206 // CHECK4-NEXT:    ret void
3207 //
3208 //
3209 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
3210 // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3211 // CHECK4-NEXT:  entry:
3212 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3213 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3214 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3215 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3216 // CHECK4-NEXT:    ret void
3217 //
3218 //
3219 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..2
3220 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3221 // CHECK4-NEXT:  entry:
3222 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3223 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3224 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3225 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3226 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3227 // CHECK4-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3228 // CHECK4-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3229 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3230 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3231 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
3232 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3233 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3234 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3235 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3236 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3237 // CHECK4-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
3238 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3239 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3240 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3241 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3242 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3243 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3244 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3245 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3246 // CHECK4:       cond.true:
3247 // CHECK4-NEXT:    br label [[COND_END:%.*]]
3248 // CHECK4:       cond.false:
3249 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3250 // CHECK4-NEXT:    br label [[COND_END]]
3251 // CHECK4:       cond.end:
3252 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3253 // CHECK4-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3254 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3255 // CHECK4-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3256 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3257 // CHECK4:       omp.inner.for.cond:
3258 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3259 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3260 // CHECK4-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3261 // CHECK4-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3262 // CHECK4:       omp.inner.for.body:
3263 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3264 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3265 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
3266 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3267 // CHECK4:       omp.inner.for.inc:
3268 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3269 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3270 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
3271 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3272 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
3273 // CHECK4:       omp.inner.for.end:
3274 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3275 // CHECK4:       omp.loop.exit:
3276 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3277 // CHECK4-NEXT:    ret void
3278 //
3279 //
3280 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..3
3281 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3282 // CHECK4-NEXT:  entry:
3283 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3284 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3285 // CHECK4-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3286 // CHECK4-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3287 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3288 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3289 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3290 // CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3291 // CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3292 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3293 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3294 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
3295 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3296 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3297 // CHECK4-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3298 // CHECK4-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3299 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3300 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3301 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3302 // CHECK4-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
3303 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3304 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3305 // CHECK4-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
3306 // CHECK4-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
3307 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3308 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3309 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3310 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
3311 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3312 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3313 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
3314 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3315 // CHECK4:       cond.true:
3316 // CHECK4-NEXT:    br label [[COND_END:%.*]]
3317 // CHECK4:       cond.false:
3318 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3319 // CHECK4-NEXT:    br label [[COND_END]]
3320 // CHECK4:       cond.end:
3321 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
3322 // CHECK4-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3323 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3324 // CHECK4-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
3325 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3326 // CHECK4:       omp.inner.for.cond:
3327 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3328 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3329 // CHECK4-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
3330 // CHECK4-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3331 // CHECK4:       omp.inner.for.body:
3332 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3333 // CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
3334 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3335 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
3336 // CHECK4-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
3337 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
3338 // CHECK4-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
3339 // CHECK4-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
3340 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3341 // CHECK4:       omp.body.continue:
3342 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3343 // CHECK4:       omp.inner.for.inc:
3344 // CHECK4-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3345 // CHECK4-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
3346 // CHECK4-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
3347 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
3348 // CHECK4:       omp.inner.for.end:
3349 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3350 // CHECK4:       omp.loop.exit:
3351 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
3352 // CHECK4-NEXT:    ret void
3353 //
3354 //
3355 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45
3356 // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3357 // CHECK4-NEXT:  entry:
3358 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3359 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3360 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3361 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3362 // CHECK4-NEXT:    ret void
3363 //
3364 //
3365 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..6
3366 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3367 // CHECK4-NEXT:  entry:
3368 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3369 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3370 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3371 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3372 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3373 // CHECK4-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3374 // CHECK4-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3375 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3376 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3377 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
3378 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3379 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3380 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3381 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3382 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3383 // CHECK4-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
3384 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3385 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3386 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3387 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3388 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3389 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3390 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3391 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3392 // CHECK4:       cond.true:
3393 // CHECK4-NEXT:    br label [[COND_END:%.*]]
3394 // CHECK4:       cond.false:
3395 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3396 // CHECK4-NEXT:    br label [[COND_END]]
3397 // CHECK4:       cond.end:
3398 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3399 // CHECK4-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3400 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3401 // CHECK4-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3402 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3403 // CHECK4:       omp.inner.for.cond:
3404 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3405 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3406 // CHECK4-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3407 // CHECK4-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3408 // CHECK4:       omp.inner.for.body:
3409 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3410 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3411 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
3412 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3413 // CHECK4:       omp.inner.for.inc:
3414 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3415 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3416 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
3417 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3418 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
3419 // CHECK4:       omp.inner.for.end:
3420 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3421 // CHECK4:       omp.loop.exit:
3422 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3423 // CHECK4-NEXT:    ret void
3424 //
3425 //
3426 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..7
3427 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3428 // CHECK4-NEXT:  entry:
3429 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3430 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3431 // CHECK4-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3432 // CHECK4-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3433 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3434 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3435 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3436 // CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3437 // CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3438 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3439 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3440 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
3441 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3442 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3443 // CHECK4-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3444 // CHECK4-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3445 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3446 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3447 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3448 // CHECK4-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
3449 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3450 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3451 // CHECK4-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
3452 // CHECK4-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
3453 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3454 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3455 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3456 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
3457 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
3458 // CHECK4-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
3459 // CHECK4:       omp.dispatch.cond:
3460 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3461 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3462 // CHECK4-NEXT:    [[CMP:%.*]] = icmp ugt i32 [[TMP5]], [[TMP6]]
3463 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3464 // CHECK4:       cond.true:
3465 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3466 // CHECK4-NEXT:    br label [[COND_END:%.*]]
3467 // CHECK4:       cond.false:
3468 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3469 // CHECK4-NEXT:    br label [[COND_END]]
3470 // CHECK4:       cond.end:
3471 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
3472 // CHECK4-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
3473 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3474 // CHECK4-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
3475 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3476 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3477 // CHECK4-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
3478 // CHECK4-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3479 // CHECK4:       omp.dispatch.body:
3480 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3481 // CHECK4:       omp.inner.for.cond:
3482 // CHECK4-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3483 // CHECK4-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3484 // CHECK4-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
3485 // CHECK4-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3486 // CHECK4:       omp.inner.for.body:
3487 // CHECK4-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3488 // CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
3489 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3490 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
3491 // CHECK4-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
3492 // CHECK4-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
3493 // CHECK4-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP15]]
3494 // CHECK4-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
3495 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3496 // CHECK4:       omp.body.continue:
3497 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3498 // CHECK4:       omp.inner.for.inc:
3499 // CHECK4-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3500 // CHECK4-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1
3501 // CHECK4-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
3502 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
3503 // CHECK4:       omp.inner.for.end:
3504 // CHECK4-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
3505 // CHECK4:       omp.dispatch.inc:
3506 // CHECK4-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3507 // CHECK4-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3508 // CHECK4-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
3509 // CHECK4-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
3510 // CHECK4-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3511 // CHECK4-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3512 // CHECK4-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
3513 // CHECK4-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
3514 // CHECK4-NEXT:    br label [[OMP_DISPATCH_COND]]
3515 // CHECK4:       omp.dispatch.end:
3516 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
3517 // CHECK4-NEXT:    ret void
3518 //
3519 //
3520 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51
3521 // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3522 // CHECK4-NEXT:  entry:
3523 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3524 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3525 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3526 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3527 // CHECK4-NEXT:    ret void
3528 //
3529 //
3530 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..10
3531 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3532 // CHECK4-NEXT:  entry:
3533 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3534 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3535 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3536 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3537 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3538 // CHECK4-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3539 // CHECK4-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3540 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3541 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3542 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
3543 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3544 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3545 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3546 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3547 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3548 // CHECK4-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
3549 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3550 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3551 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3552 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3553 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3554 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3555 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3556 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3557 // CHECK4:       cond.true:
3558 // CHECK4-NEXT:    br label [[COND_END:%.*]]
3559 // CHECK4:       cond.false:
3560 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3561 // CHECK4-NEXT:    br label [[COND_END]]
3562 // CHECK4:       cond.end:
3563 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3564 // CHECK4-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3565 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3566 // CHECK4-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3567 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3568 // CHECK4:       omp.inner.for.cond:
3569 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3570 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3571 // CHECK4-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3572 // CHECK4-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3573 // CHECK4:       omp.inner.for.body:
3574 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3575 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3576 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
3577 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3578 // CHECK4:       omp.inner.for.inc:
3579 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3580 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3581 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
3582 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3583 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
3584 // CHECK4:       omp.inner.for.end:
3585 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3586 // CHECK4:       omp.loop.exit:
3587 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3588 // CHECK4-NEXT:    ret void
3589 //
3590 //
3591 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..11
3592 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3593 // CHECK4-NEXT:  entry:
3594 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3595 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3596 // CHECK4-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3597 // CHECK4-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3598 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3599 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3600 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3601 // CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3602 // CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3603 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3604 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3605 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
3606 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3607 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3608 // CHECK4-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3609 // CHECK4-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3610 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3611 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3612 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3613 // CHECK4-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
3614 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3615 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3616 // CHECK4-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
3617 // CHECK4-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
3618 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3619 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3620 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3621 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3622 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3623 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
3624 // CHECK4-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
3625 // CHECK4-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
3626 // CHECK4:       omp.dispatch.cond:
3627 // CHECK4-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
3628 // CHECK4-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
3629 // CHECK4-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3630 // CHECK4:       omp.dispatch.body:
3631 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3632 // CHECK4-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
3633 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3634 // CHECK4:       omp.inner.for.cond:
3635 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
3636 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10
3637 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
3638 // CHECK4-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3639 // CHECK4:       omp.inner.for.body:
3640 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
3641 // CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
3642 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3643 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !10
3644 // CHECK4-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
3645 // CHECK4-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !10
3646 // CHECK4-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
3647 // CHECK4-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !10
3648 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3649 // CHECK4:       omp.body.continue:
3650 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3651 // CHECK4:       omp.inner.for.inc:
3652 // CHECK4-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
3653 // CHECK4-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
3654 // CHECK4-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
3655 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
3656 // CHECK4:       omp.inner.for.end:
3657 // CHECK4-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
3658 // CHECK4:       omp.dispatch.inc:
3659 // CHECK4-NEXT:    br label [[OMP_DISPATCH_COND]]
3660 // CHECK4:       omp.dispatch.end:
3661 // CHECK4-NEXT:    ret void
3662 //
3663 //
3664 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57
3665 // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3666 // CHECK4-NEXT:  entry:
3667 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3668 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3669 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3670 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3671 // CHECK4-NEXT:    ret void
3672 //
3673 //
3674 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..14
3675 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3676 // CHECK4-NEXT:  entry:
3677 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3678 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3679 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3680 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3681 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3682 // CHECK4-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3683 // CHECK4-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3684 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3685 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3686 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
3687 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3688 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3689 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3690 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3691 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3692 // CHECK4-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
3693 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3694 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3695 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3696 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3697 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3698 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3699 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3700 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3701 // CHECK4:       cond.true:
3702 // CHECK4-NEXT:    br label [[COND_END:%.*]]
3703 // CHECK4:       cond.false:
3704 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3705 // CHECK4-NEXT:    br label [[COND_END]]
3706 // CHECK4:       cond.end:
3707 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3708 // CHECK4-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3709 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3710 // CHECK4-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3711 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3712 // CHECK4:       omp.inner.for.cond:
3713 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3714 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3715 // CHECK4-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3716 // CHECK4-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3717 // CHECK4:       omp.inner.for.body:
3718 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3719 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3720 // CHECK4-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
3721 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3722 // CHECK4:       omp.inner.for.inc:
3723 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
3724 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
3725 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
3726 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
3727 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
3728 // CHECK4:       omp.inner.for.end:
3729 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3730 // CHECK4:       omp.loop.exit:
3731 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
3732 // CHECK4-NEXT:    ret void
3733 //
3734 //
3735 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..15
3736 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3737 // CHECK4-NEXT:  entry:
3738 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
3739 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
3740 // CHECK4-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3741 // CHECK4-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3742 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
3743 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3744 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3745 // CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3746 // CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3747 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3748 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3749 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
3750 // CHECK4-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
3751 // CHECK4-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
3752 // CHECK4-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3753 // CHECK4-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3754 // CHECK4-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
3755 // CHECK4-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
3756 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
3757 // CHECK4-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
3758 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
3759 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
3760 // CHECK4-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
3761 // CHECK4-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
3762 // CHECK4-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3763 // CHECK4-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3764 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3765 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
3766 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
3767 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
3768 // CHECK4-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
3769 // CHECK4-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
3770 // CHECK4:       omp.dispatch.cond:
3771 // CHECK4-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
3772 // CHECK4-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
3773 // CHECK4-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3774 // CHECK4:       omp.dispatch.body:
3775 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
3776 // CHECK4-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
3777 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3778 // CHECK4:       omp.inner.for.cond:
3779 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
3780 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
3781 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
3782 // CHECK4-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3783 // CHECK4:       omp.inner.for.body:
3784 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
3785 // CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
3786 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3787 // CHECK4-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
3788 // CHECK4-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
3789 // CHECK4-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13
3790 // CHECK4-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
3791 // CHECK4-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13
3792 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3793 // CHECK4:       omp.body.continue:
3794 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3795 // CHECK4:       omp.inner.for.inc:
3796 // CHECK4-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
3797 // CHECK4-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
3798 // CHECK4-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
3799 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
3800 // CHECK4:       omp.inner.for.end:
3801 // CHECK4-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
3802 // CHECK4:       omp.dispatch.inc:
3803 // CHECK4-NEXT:    br label [[OMP_DISPATCH_COND]]
3804 // CHECK4:       omp.dispatch.end:
3805 // CHECK4-NEXT:    ret void
3806 //
3807 //
3808 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3809 // CHECK4-SAME: () #[[ATTR3:[0-9]+]] {
3810 // CHECK4-NEXT:  entry:
3811 // CHECK4-NEXT:    call void @__tgt_register_requires(i64 1)
3812 // CHECK4-NEXT:    ret void
3813 //
3814 //
3815 // CHECK5-LABEL: define {{[^@]+}}@_Z21teams_template_structv
3816 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] {
3817 // CHECK5-NEXT:  entry:
3818 // CHECK5-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
3819 // CHECK5-NEXT:    [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
3820 // CHECK5-NEXT:    ret i32 [[CALL]]
3821 //
3822 //
3823 // CHECK5-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
3824 // CHECK5-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
3825 // CHECK5-NEXT:  entry:
3826 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3827 // CHECK5-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
3828 // CHECK5-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
3829 // CHECK5-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
3830 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3831 // CHECK5-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8
3832 // CHECK5-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8
3833 // CHECK5-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8
3834 // CHECK5-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
3835 // CHECK5-NEXT:    [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8
3836 // CHECK5-NEXT:    [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8
3837 // CHECK5-NEXT:    [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8
3838 // CHECK5-NEXT:    [[_TMP13:%.*]] = alloca i32, align 4
3839 // CHECK5-NEXT:    [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 8
3840 // CHECK5-NEXT:    [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 8
3841 // CHECK5-NEXT:    [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 8
3842 // CHECK5-NEXT:    [[_TMP20:%.*]] = alloca i32, align 4
3843 // CHECK5-NEXT:    [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 8
3844 // CHECK5-NEXT:    [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 8
3845 // CHECK5-NEXT:    [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 8
3846 // CHECK5-NEXT:    [[_TMP27:%.*]] = alloca i32, align 4
3847 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3848 // CHECK5-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3849 // CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
3850 // CHECK5-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3851 // CHECK5-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
3852 // CHECK5-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8
3853 // CHECK5-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3854 // CHECK5-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
3855 // CHECK5-NEXT:    store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8
3856 // CHECK5-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
3857 // CHECK5-NEXT:    store i8* null, i8** [[TMP4]], align 8
3858 // CHECK5-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3859 // CHECK5-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3860 // CHECK5-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123)
3861 // CHECK5-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3862 // CHECK5-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
3863 // CHECK5-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3864 // CHECK5:       omp_offload.failed:
3865 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
3866 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT]]
3867 // CHECK5:       omp_offload.cont:
3868 // CHECK5-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3869 // CHECK5-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
3870 // CHECK5-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
3871 // CHECK5-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8
3872 // CHECK5-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
3873 // CHECK5-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
3874 // CHECK5-NEXT:    store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8
3875 // CHECK5-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0
3876 // CHECK5-NEXT:    store i8* null, i8** [[TMP13]], align 8
3877 // CHECK5-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
3878 // CHECK5-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
3879 // CHECK5-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
3880 // CHECK5-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3881 // CHECK5-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
3882 // CHECK5-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
3883 // CHECK5:       omp_offload.failed7:
3884 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]]
3885 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
3886 // CHECK5:       omp_offload.cont8:
3887 // CHECK5-NEXT:    [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3888 // CHECK5-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
3889 // CHECK5-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
3890 // CHECK5-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8
3891 // CHECK5-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
3892 // CHECK5-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
3893 // CHECK5-NEXT:    store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8
3894 // CHECK5-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0
3895 // CHECK5-NEXT:    store i8* null, i8** [[TMP22]], align 8
3896 // CHECK5-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
3897 // CHECK5-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
3898 // CHECK5-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
3899 // CHECK5-NEXT:    [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3900 // CHECK5-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
3901 // CHECK5-NEXT:    br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
3902 // CHECK5:       omp_offload.failed14:
3903 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(%struct.SS* [[THIS1]]) #[[ATTR2]]
3904 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT15]]
3905 // CHECK5:       omp_offload.cont15:
3906 // CHECK5-NEXT:    [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3907 // CHECK5-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
3908 // CHECK5-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS**
3909 // CHECK5-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 8
3910 // CHECK5-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
3911 // CHECK5-NEXT:    [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]**
3912 // CHECK5-NEXT:    store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 8
3913 // CHECK5-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i64 0, i64 0
3914 // CHECK5-NEXT:    store i8* null, i8** [[TMP31]], align 8
3915 // CHECK5-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
3916 // CHECK5-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
3917 // CHECK5-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
3918 // CHECK5-NEXT:    [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3919 // CHECK5-NEXT:    [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
3920 // CHECK5-NEXT:    br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]]
3921 // CHECK5:       omp_offload.failed21:
3922 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(%struct.SS* [[THIS1]]) #[[ATTR2]]
3923 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT22]]
3924 // CHECK5:       omp_offload.cont22:
3925 // CHECK5-NEXT:    [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3926 // CHECK5-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
3927 // CHECK5-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
3928 // CHECK5-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 8
3929 // CHECK5-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
3930 // CHECK5-NEXT:    [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
3931 // CHECK5-NEXT:    store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 8
3932 // CHECK5-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 0
3933 // CHECK5-NEXT:    store i8* null, i8** [[TMP40]], align 8
3934 // CHECK5-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
3935 // CHECK5-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
3936 // CHECK5-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
3937 // CHECK5-NEXT:    [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
3938 // CHECK5-NEXT:    [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
3939 // CHECK5-NEXT:    br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]]
3940 // CHECK5:       omp_offload.failed28:
3941 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(%struct.SS* [[THIS1]]) #[[ATTR2]]
3942 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT29]]
3943 // CHECK5:       omp_offload.cont29:
3944 // CHECK5-NEXT:    [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
3945 // CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 0
3946 // CHECK5-NEXT:    [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
3947 // CHECK5-NEXT:    ret i32 [[TMP45]]
3948 //
3949 //
3950 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35
3951 // CHECK5-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
3952 // CHECK5-NEXT:  entry:
3953 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3954 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3955 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3956 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
3957 // CHECK5-NEXT:    ret void
3958 //
3959 //
3960 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined.
3961 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
3962 // CHECK5-NEXT:  entry:
3963 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
3964 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
3965 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
3966 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3967 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3968 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3969 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3970 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3971 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3972 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3973 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
3974 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
3975 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
3976 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
3977 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
3978 // CHECK5-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
3979 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
3980 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
3981 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
3982 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
3983 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
3984 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3985 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3986 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3987 // CHECK5:       cond.true:
3988 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3989 // CHECK5:       cond.false:
3990 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
3991 // CHECK5-NEXT:    br label [[COND_END]]
3992 // CHECK5:       cond.end:
3993 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3994 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
3995 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
3996 // CHECK5-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
3997 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3998 // CHECK5:       omp.inner.for.cond:
3999 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4000 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4001 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4002 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4003 // CHECK5:       omp.inner.for.body:
4004 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4005 // CHECK5-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
4006 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4007 // CHECK5-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
4008 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
4009 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4010 // CHECK5:       omp.inner.for.inc:
4011 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4012 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4013 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
4014 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4015 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
4016 // CHECK5:       omp.inner.for.end:
4017 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4018 // CHECK5:       omp.loop.exit:
4019 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4020 // CHECK5-NEXT:    ret void
4021 //
4022 //
4023 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..1
4024 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4025 // CHECK5-NEXT:  entry:
4026 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4027 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4028 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4029 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4030 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4031 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4032 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4033 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4034 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4035 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4036 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4037 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4038 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4039 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4040 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4041 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4042 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4043 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4044 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4045 // CHECK5-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
4046 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4047 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
4048 // CHECK5-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4049 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
4050 // CHECK5-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4051 // CHECK5-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4052 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4053 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4054 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4055 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
4056 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4057 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4058 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
4059 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4060 // CHECK5:       cond.true:
4061 // CHECK5-NEXT:    br label [[COND_END:%.*]]
4062 // CHECK5:       cond.false:
4063 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4064 // CHECK5-NEXT:    br label [[COND_END]]
4065 // CHECK5:       cond.end:
4066 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
4067 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4068 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4069 // CHECK5-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
4070 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4071 // CHECK5:       omp.inner.for.cond:
4072 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4073 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4074 // CHECK5-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
4075 // CHECK5-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4076 // CHECK5:       omp.inner.for.body:
4077 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4078 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
4079 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4080 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
4081 // CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
4082 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
4083 // CHECK5-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
4084 // CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
4085 // CHECK5-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
4086 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4087 // CHECK5:       omp.body.continue:
4088 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4089 // CHECK5:       omp.inner.for.inc:
4090 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4091 // CHECK5-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
4092 // CHECK5-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
4093 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
4094 // CHECK5:       omp.inner.for.end:
4095 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4096 // CHECK5:       omp.loop.exit:
4097 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
4098 // CHECK5-NEXT:    ret void
4099 //
4100 //
4101 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
4102 // CHECK5-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4103 // CHECK5-NEXT:  entry:
4104 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4105 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4106 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4107 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
4108 // CHECK5-NEXT:    ret void
4109 //
4110 //
4111 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..2
4112 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4113 // CHECK5-NEXT:  entry:
4114 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4115 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4116 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4117 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4118 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4119 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4120 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4121 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4122 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4123 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4124 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4125 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4126 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4127 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4128 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4129 // CHECK5-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
4130 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4131 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4132 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4133 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4134 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4135 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4136 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
4137 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4138 // CHECK5:       cond.true:
4139 // CHECK5-NEXT:    br label [[COND_END:%.*]]
4140 // CHECK5:       cond.false:
4141 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4142 // CHECK5-NEXT:    br label [[COND_END]]
4143 // CHECK5:       cond.end:
4144 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4145 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4146 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4147 // CHECK5-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4148 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4149 // CHECK5:       omp.inner.for.cond:
4150 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4151 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4152 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4153 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4154 // CHECK5:       omp.inner.for.body:
4155 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4156 // CHECK5-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
4157 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4158 // CHECK5-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
4159 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
4160 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4161 // CHECK5:       omp.inner.for.inc:
4162 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4163 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4164 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
4165 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4166 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
4167 // CHECK5:       omp.inner.for.end:
4168 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4169 // CHECK5:       omp.loop.exit:
4170 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4171 // CHECK5-NEXT:    ret void
4172 //
4173 //
4174 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..3
4175 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4176 // CHECK5-NEXT:  entry:
4177 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4178 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4179 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4180 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4181 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4182 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4183 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4184 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4185 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4186 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4187 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4188 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4189 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4190 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4191 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4192 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4193 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4194 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4195 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4196 // CHECK5-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
4197 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4198 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
4199 // CHECK5-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4200 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
4201 // CHECK5-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4202 // CHECK5-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4203 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4204 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4205 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4206 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
4207 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4208 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4209 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
4210 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4211 // CHECK5:       cond.true:
4212 // CHECK5-NEXT:    br label [[COND_END:%.*]]
4213 // CHECK5:       cond.false:
4214 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4215 // CHECK5-NEXT:    br label [[COND_END]]
4216 // CHECK5:       cond.end:
4217 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
4218 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4219 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4220 // CHECK5-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
4221 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4222 // CHECK5:       omp.inner.for.cond:
4223 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4224 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4225 // CHECK5-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
4226 // CHECK5-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4227 // CHECK5:       omp.inner.for.body:
4228 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4229 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
4230 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4231 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
4232 // CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
4233 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
4234 // CHECK5-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
4235 // CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
4236 // CHECK5-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
4237 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4238 // CHECK5:       omp.body.continue:
4239 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4240 // CHECK5:       omp.inner.for.inc:
4241 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4242 // CHECK5-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
4243 // CHECK5-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
4244 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
4245 // CHECK5:       omp.inner.for.end:
4246 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4247 // CHECK5:       omp.loop.exit:
4248 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
4249 // CHECK5-NEXT:    ret void
4250 //
4251 //
4252 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45
4253 // CHECK5-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4254 // CHECK5-NEXT:  entry:
4255 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4256 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4257 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4258 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
4259 // CHECK5-NEXT:    ret void
4260 //
4261 //
4262 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..6
4263 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4264 // CHECK5-NEXT:  entry:
4265 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4266 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4267 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4268 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4269 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4270 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4271 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4272 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4273 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4274 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4275 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4276 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4277 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4278 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4279 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4280 // CHECK5-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
4281 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4282 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4283 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4284 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4285 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4286 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4287 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
4288 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4289 // CHECK5:       cond.true:
4290 // CHECK5-NEXT:    br label [[COND_END:%.*]]
4291 // CHECK5:       cond.false:
4292 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4293 // CHECK5-NEXT:    br label [[COND_END]]
4294 // CHECK5:       cond.end:
4295 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4296 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4297 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4298 // CHECK5-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4299 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4300 // CHECK5:       omp.inner.for.cond:
4301 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4302 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4303 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4304 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4305 // CHECK5:       omp.inner.for.body:
4306 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4307 // CHECK5-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
4308 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4309 // CHECK5-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
4310 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
4311 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4312 // CHECK5:       omp.inner.for.inc:
4313 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4314 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4315 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
4316 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4317 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
4318 // CHECK5:       omp.inner.for.end:
4319 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4320 // CHECK5:       omp.loop.exit:
4321 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4322 // CHECK5-NEXT:    ret void
4323 //
4324 //
4325 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..7
4326 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4327 // CHECK5-NEXT:  entry:
4328 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4329 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4330 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4331 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4332 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4333 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4334 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4335 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4336 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4337 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4338 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4339 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4340 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4341 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4342 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4343 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4344 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4345 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4346 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4347 // CHECK5-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
4348 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4349 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
4350 // CHECK5-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4351 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
4352 // CHECK5-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4353 // CHECK5-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4354 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4355 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4356 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4357 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
4358 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
4359 // CHECK5-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
4360 // CHECK5:       omp.dispatch.cond:
4361 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4362 // CHECK5-NEXT:    [[CONV2:%.*]] = sext i32 [[TMP5]] to i64
4363 // CHECK5-NEXT:    [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4364 // CHECK5-NEXT:    [[CMP:%.*]] = icmp ugt i64 [[CONV2]], [[TMP6]]
4365 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4366 // CHECK5:       cond.true:
4367 // CHECK5-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4368 // CHECK5-NEXT:    br label [[COND_END:%.*]]
4369 // CHECK5:       cond.false:
4370 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4371 // CHECK5-NEXT:    [[CONV3:%.*]] = sext i32 [[TMP8]] to i64
4372 // CHECK5-NEXT:    br label [[COND_END]]
4373 // CHECK5:       cond.end:
4374 // CHECK5-NEXT:    [[COND:%.*]] = phi i64 [ [[TMP7]], [[COND_TRUE]] ], [ [[CONV3]], [[COND_FALSE]] ]
4375 // CHECK5-NEXT:    [[CONV4:%.*]] = trunc i64 [[COND]] to i32
4376 // CHECK5-NEXT:    store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
4377 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4378 // CHECK5-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
4379 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4380 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4381 // CHECK5-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
4382 // CHECK5-NEXT:    br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
4383 // CHECK5:       omp.dispatch.body:
4384 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4385 // CHECK5:       omp.inner.for.cond:
4386 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4387 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4388 // CHECK5-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
4389 // CHECK5-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4390 // CHECK5:       omp.inner.for.body:
4391 // CHECK5-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4392 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
4393 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4394 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
4395 // CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
4396 // CHECK5-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
4397 // CHECK5-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
4398 // CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
4399 // CHECK5-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
4400 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4401 // CHECK5:       omp.body.continue:
4402 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4403 // CHECK5:       omp.inner.for.inc:
4404 // CHECK5-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4405 // CHECK5-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP16]], 1
4406 // CHECK5-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
4407 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
4408 // CHECK5:       omp.inner.for.end:
4409 // CHECK5-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
4410 // CHECK5:       omp.dispatch.inc:
4411 // CHECK5-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4412 // CHECK5-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4413 // CHECK5-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
4414 // CHECK5-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
4415 // CHECK5-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4416 // CHECK5-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4417 // CHECK5-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
4418 // CHECK5-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
4419 // CHECK5-NEXT:    br label [[OMP_DISPATCH_COND]]
4420 // CHECK5:       omp.dispatch.end:
4421 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
4422 // CHECK5-NEXT:    ret void
4423 //
4424 //
4425 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51
4426 // CHECK5-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4427 // CHECK5-NEXT:  entry:
4428 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4429 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4430 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4431 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
4432 // CHECK5-NEXT:    ret void
4433 //
4434 //
4435 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..10
4436 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4437 // CHECK5-NEXT:  entry:
4438 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4439 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4440 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4441 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4442 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4443 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4444 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4445 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4446 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4447 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4448 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4449 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4450 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4451 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4452 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4453 // CHECK5-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
4454 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4455 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4456 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4457 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4458 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4459 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4460 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
4461 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4462 // CHECK5:       cond.true:
4463 // CHECK5-NEXT:    br label [[COND_END:%.*]]
4464 // CHECK5:       cond.false:
4465 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4466 // CHECK5-NEXT:    br label [[COND_END]]
4467 // CHECK5:       cond.end:
4468 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4469 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4470 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4471 // CHECK5-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4472 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4473 // CHECK5:       omp.inner.for.cond:
4474 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4475 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4476 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4477 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4478 // CHECK5:       omp.inner.for.body:
4479 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4480 // CHECK5-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
4481 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4482 // CHECK5-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
4483 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
4484 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4485 // CHECK5:       omp.inner.for.inc:
4486 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4487 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4488 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
4489 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4490 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
4491 // CHECK5:       omp.inner.for.end:
4492 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4493 // CHECK5:       omp.loop.exit:
4494 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4495 // CHECK5-NEXT:    ret void
4496 //
4497 //
4498 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..11
4499 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4500 // CHECK5-NEXT:  entry:
4501 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4502 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4503 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4504 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4505 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4506 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4507 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4508 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4509 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4510 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4511 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4512 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4513 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4514 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4515 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4516 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4517 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4518 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4519 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4520 // CHECK5-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
4521 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4522 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
4523 // CHECK5-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4524 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
4525 // CHECK5-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4526 // CHECK5-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4527 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4528 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4529 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4530 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4531 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4532 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
4533 // CHECK5-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
4534 // CHECK5-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
4535 // CHECK5:       omp.dispatch.cond:
4536 // CHECK5-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
4537 // CHECK5-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
4538 // CHECK5-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
4539 // CHECK5:       omp.dispatch.body:
4540 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4541 // CHECK5-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
4542 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4543 // CHECK5:       omp.inner.for.cond:
4544 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
4545 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9
4546 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
4547 // CHECK5-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4548 // CHECK5:       omp.inner.for.body:
4549 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
4550 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
4551 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4552 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9
4553 // CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
4554 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !9
4555 // CHECK5-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
4556 // CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
4557 // CHECK5-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !9
4558 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4559 // CHECK5:       omp.body.continue:
4560 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4561 // CHECK5:       omp.inner.for.inc:
4562 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
4563 // CHECK5-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
4564 // CHECK5-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
4565 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
4566 // CHECK5:       omp.inner.for.end:
4567 // CHECK5-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
4568 // CHECK5:       omp.dispatch.inc:
4569 // CHECK5-NEXT:    br label [[OMP_DISPATCH_COND]]
4570 // CHECK5:       omp.dispatch.end:
4571 // CHECK5-NEXT:    ret void
4572 //
4573 //
4574 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57
4575 // CHECK5-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4576 // CHECK5-NEXT:  entry:
4577 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4578 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4579 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4580 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
4581 // CHECK5-NEXT:    ret void
4582 //
4583 //
4584 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..14
4585 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4586 // CHECK5-NEXT:  entry:
4587 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4588 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4589 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4590 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4591 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4592 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4593 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4594 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4595 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4596 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4597 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4598 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4599 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4600 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4601 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4602 // CHECK5-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
4603 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4604 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4605 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4606 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4607 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4608 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4609 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
4610 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4611 // CHECK5:       cond.true:
4612 // CHECK5-NEXT:    br label [[COND_END:%.*]]
4613 // CHECK5:       cond.false:
4614 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4615 // CHECK5-NEXT:    br label [[COND_END]]
4616 // CHECK5:       cond.end:
4617 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4618 // CHECK5-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4619 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4620 // CHECK5-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4621 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4622 // CHECK5:       omp.inner.for.cond:
4623 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4624 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4625 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4626 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4627 // CHECK5:       omp.inner.for.body:
4628 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4629 // CHECK5-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
4630 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4631 // CHECK5-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
4632 // CHECK5-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
4633 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4634 // CHECK5:       omp.inner.for.inc:
4635 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4636 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4637 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
4638 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4639 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
4640 // CHECK5:       omp.inner.for.end:
4641 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4642 // CHECK5:       omp.loop.exit:
4643 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4644 // CHECK5-NEXT:    ret void
4645 //
4646 //
4647 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..15
4648 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4649 // CHECK5-NEXT:  entry:
4650 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4651 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4652 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4653 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4654 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4655 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4656 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4657 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4658 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4659 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4660 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4661 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
4662 // CHECK5-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4663 // CHECK5-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4664 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4665 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4666 // CHECK5-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4667 // CHECK5-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4668 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4669 // CHECK5-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
4670 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4671 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
4672 // CHECK5-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4673 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
4674 // CHECK5-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4675 // CHECK5-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4676 // CHECK5-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4677 // CHECK5-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4678 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4679 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4680 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4681 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
4682 // CHECK5-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
4683 // CHECK5-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
4684 // CHECK5:       omp.dispatch.cond:
4685 // CHECK5-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
4686 // CHECK5-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
4687 // CHECK5-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
4688 // CHECK5:       omp.dispatch.body:
4689 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4690 // CHECK5-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
4691 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4692 // CHECK5:       omp.inner.for.cond:
4693 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
4694 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12
4695 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
4696 // CHECK5-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4697 // CHECK5:       omp.inner.for.body:
4698 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
4699 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
4700 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4701 // CHECK5-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12
4702 // CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
4703 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12
4704 // CHECK5-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
4705 // CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
4706 // CHECK5-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12
4707 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4708 // CHECK5:       omp.body.continue:
4709 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4710 // CHECK5:       omp.inner.for.inc:
4711 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
4712 // CHECK5-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
4713 // CHECK5-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
4714 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
4715 // CHECK5:       omp.inner.for.end:
4716 // CHECK5-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
4717 // CHECK5:       omp.dispatch.inc:
4718 // CHECK5-NEXT:    br label [[OMP_DISPATCH_COND]]
4719 // CHECK5:       omp.dispatch.end:
4720 // CHECK5-NEXT:    ret void
4721 //
4722 //
4723 // CHECK5-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
4724 // CHECK5-SAME: () #[[ATTR3:[0-9]+]] {
4725 // CHECK5-NEXT:  entry:
4726 // CHECK5-NEXT:    call void @__tgt_register_requires(i64 1)
4727 // CHECK5-NEXT:    ret void
4728 //
4729 //
4730 // CHECK6-LABEL: define {{[^@]+}}@_Z21teams_template_structv
4731 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] {
4732 // CHECK6-NEXT:  entry:
4733 // CHECK6-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
4734 // CHECK6-NEXT:    [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
4735 // CHECK6-NEXT:    ret i32 [[CALL]]
4736 //
4737 //
4738 // CHECK6-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
4739 // CHECK6-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
4740 // CHECK6-NEXT:  entry:
4741 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4742 // CHECK6-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
4743 // CHECK6-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
4744 // CHECK6-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
4745 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4746 // CHECK6-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8
4747 // CHECK6-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8
4748 // CHECK6-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8
4749 // CHECK6-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
4750 // CHECK6-NEXT:    [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8
4751 // CHECK6-NEXT:    [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8
4752 // CHECK6-NEXT:    [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8
4753 // CHECK6-NEXT:    [[_TMP13:%.*]] = alloca i32, align 4
4754 // CHECK6-NEXT:    [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 8
4755 // CHECK6-NEXT:    [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 8
4756 // CHECK6-NEXT:    [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 8
4757 // CHECK6-NEXT:    [[_TMP20:%.*]] = alloca i32, align 4
4758 // CHECK6-NEXT:    [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 8
4759 // CHECK6-NEXT:    [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 8
4760 // CHECK6-NEXT:    [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 8
4761 // CHECK6-NEXT:    [[_TMP27:%.*]] = alloca i32, align 4
4762 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4763 // CHECK6-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4764 // CHECK6-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
4765 // CHECK6-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4766 // CHECK6-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
4767 // CHECK6-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8
4768 // CHECK6-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4769 // CHECK6-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
4770 // CHECK6-NEXT:    store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8
4771 // CHECK6-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
4772 // CHECK6-NEXT:    store i8* null, i8** [[TMP4]], align 8
4773 // CHECK6-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4774 // CHECK6-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4775 // CHECK6-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123)
4776 // CHECK6-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4777 // CHECK6-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
4778 // CHECK6-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4779 // CHECK6:       omp_offload.failed:
4780 // CHECK6-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
4781 // CHECK6-NEXT:    br label [[OMP_OFFLOAD_CONT]]
4782 // CHECK6:       omp_offload.cont:
4783 // CHECK6-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
4784 // CHECK6-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
4785 // CHECK6-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
4786 // CHECK6-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8
4787 // CHECK6-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
4788 // CHECK6-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
4789 // CHECK6-NEXT:    store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8
4790 // CHECK6-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0
4791 // CHECK6-NEXT:    store i8* null, i8** [[TMP13]], align 8
4792 // CHECK6-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
4793 // CHECK6-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
4794 // CHECK6-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
4795 // CHECK6-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4796 // CHECK6-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
4797 // CHECK6-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
4798 // CHECK6:       omp_offload.failed7:
4799 // CHECK6-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]]
4800 // CHECK6-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
4801 // CHECK6:       omp_offload.cont8:
4802 // CHECK6-NEXT:    [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
4803 // CHECK6-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
4804 // CHECK6-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
4805 // CHECK6-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8
4806 // CHECK6-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
4807 // CHECK6-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
4808 // CHECK6-NEXT:    store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8
4809 // CHECK6-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0
4810 // CHECK6-NEXT:    store i8* null, i8** [[TMP22]], align 8
4811 // CHECK6-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
4812 // CHECK6-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
4813 // CHECK6-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
4814 // CHECK6-NEXT:    [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4815 // CHECK6-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
4816 // CHECK6-NEXT:    br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
4817 // CHECK6:       omp_offload.failed14:
4818 // CHECK6-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(%struct.SS* [[THIS1]]) #[[ATTR2]]
4819 // CHECK6-NEXT:    br label [[OMP_OFFLOAD_CONT15]]
4820 // CHECK6:       omp_offload.cont15:
4821 // CHECK6-NEXT:    [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
4822 // CHECK6-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
4823 // CHECK6-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS**
4824 // CHECK6-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 8
4825 // CHECK6-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
4826 // CHECK6-NEXT:    [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]**
4827 // CHECK6-NEXT:    store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 8
4828 // CHECK6-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i64 0, i64 0
4829 // CHECK6-NEXT:    store i8* null, i8** [[TMP31]], align 8
4830 // CHECK6-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
4831 // CHECK6-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
4832 // CHECK6-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
4833 // CHECK6-NEXT:    [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4834 // CHECK6-NEXT:    [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
4835 // CHECK6-NEXT:    br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]]
4836 // CHECK6:       omp_offload.failed21:
4837 // CHECK6-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(%struct.SS* [[THIS1]]) #[[ATTR2]]
4838 // CHECK6-NEXT:    br label [[OMP_OFFLOAD_CONT22]]
4839 // CHECK6:       omp_offload.cont22:
4840 // CHECK6-NEXT:    [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
4841 // CHECK6-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
4842 // CHECK6-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
4843 // CHECK6-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 8
4844 // CHECK6-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
4845 // CHECK6-NEXT:    [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
4846 // CHECK6-NEXT:    store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 8
4847 // CHECK6-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 0
4848 // CHECK6-NEXT:    store i8* null, i8** [[TMP40]], align 8
4849 // CHECK6-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
4850 // CHECK6-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
4851 // CHECK6-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
4852 // CHECK6-NEXT:    [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
4853 // CHECK6-NEXT:    [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
4854 // CHECK6-NEXT:    br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]]
4855 // CHECK6:       omp_offload.failed28:
4856 // CHECK6-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(%struct.SS* [[THIS1]]) #[[ATTR2]]
4857 // CHECK6-NEXT:    br label [[OMP_OFFLOAD_CONT29]]
4858 // CHECK6:       omp_offload.cont29:
4859 // CHECK6-NEXT:    [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
4860 // CHECK6-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 0
4861 // CHECK6-NEXT:    [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
4862 // CHECK6-NEXT:    ret i32 [[TMP45]]
4863 //
4864 //
4865 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35
4866 // CHECK6-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
4867 // CHECK6-NEXT:  entry:
4868 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4869 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4870 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4871 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
4872 // CHECK6-NEXT:    ret void
4873 //
4874 //
4875 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined.
4876 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4877 // CHECK6-NEXT:  entry:
4878 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4879 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4880 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4881 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4882 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4883 // CHECK6-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4884 // CHECK6-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4885 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4886 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4887 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
4888 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4889 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4890 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4891 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4892 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
4893 // CHECK6-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
4894 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4895 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4896 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4897 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
4898 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4899 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4900 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
4901 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4902 // CHECK6:       cond.true:
4903 // CHECK6-NEXT:    br label [[COND_END:%.*]]
4904 // CHECK6:       cond.false:
4905 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4906 // CHECK6-NEXT:    br label [[COND_END]]
4907 // CHECK6:       cond.end:
4908 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4909 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
4910 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4911 // CHECK6-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
4912 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4913 // CHECK6:       omp.inner.for.cond:
4914 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4915 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4916 // CHECK6-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4917 // CHECK6-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4918 // CHECK6:       omp.inner.for.body:
4919 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
4920 // CHECK6-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
4921 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
4922 // CHECK6-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
4923 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
4924 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4925 // CHECK6:       omp.inner.for.inc:
4926 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4927 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
4928 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
4929 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
4930 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
4931 // CHECK6:       omp.inner.for.end:
4932 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4933 // CHECK6:       omp.loop.exit:
4934 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
4935 // CHECK6-NEXT:    ret void
4936 //
4937 //
4938 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..1
4939 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
4940 // CHECK6-NEXT:  entry:
4941 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
4942 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
4943 // CHECK6-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4944 // CHECK6-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4945 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
4946 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4947 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4948 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4949 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4950 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4951 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4952 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
4953 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
4954 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
4955 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4956 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4957 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
4958 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
4959 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
4960 // CHECK6-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
4961 // CHECK6-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
4962 // CHECK6-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
4963 // CHECK6-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
4964 // CHECK6-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
4965 // CHECK6-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
4966 // CHECK6-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
4967 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
4968 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
4969 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
4970 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
4971 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
4972 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4973 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
4974 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4975 // CHECK6:       cond.true:
4976 // CHECK6-NEXT:    br label [[COND_END:%.*]]
4977 // CHECK6:       cond.false:
4978 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4979 // CHECK6-NEXT:    br label [[COND_END]]
4980 // CHECK6:       cond.end:
4981 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
4982 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
4983 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
4984 // CHECK6-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
4985 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4986 // CHECK6:       omp.inner.for.cond:
4987 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4988 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
4989 // CHECK6-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
4990 // CHECK6-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4991 // CHECK6:       omp.inner.for.body:
4992 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
4993 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
4994 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4995 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
4996 // CHECK6-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
4997 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
4998 // CHECK6-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
4999 // CHECK6-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
5000 // CHECK6-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
5001 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5002 // CHECK6:       omp.body.continue:
5003 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5004 // CHECK6:       omp.inner.for.inc:
5005 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5006 // CHECK6-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
5007 // CHECK6-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
5008 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
5009 // CHECK6:       omp.inner.for.end:
5010 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5011 // CHECK6:       omp.loop.exit:
5012 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
5013 // CHECK6-NEXT:    ret void
5014 //
5015 //
5016 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
5017 // CHECK6-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5018 // CHECK6-NEXT:  entry:
5019 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5020 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5021 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5022 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
5023 // CHECK6-NEXT:    ret void
5024 //
5025 //
5026 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..2
5027 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5028 // CHECK6-NEXT:  entry:
5029 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5030 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5031 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5032 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5033 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5034 // CHECK6-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5035 // CHECK6-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5036 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5037 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5038 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5039 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5040 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5041 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5042 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5043 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5044 // CHECK6-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
5045 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5046 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5047 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5048 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
5049 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5050 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5051 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
5052 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5053 // CHECK6:       cond.true:
5054 // CHECK6-NEXT:    br label [[COND_END:%.*]]
5055 // CHECK6:       cond.false:
5056 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5057 // CHECK6-NEXT:    br label [[COND_END]]
5058 // CHECK6:       cond.end:
5059 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5060 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5061 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5062 // CHECK6-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5063 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5064 // CHECK6:       omp.inner.for.cond:
5065 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5066 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5067 // CHECK6-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5068 // CHECK6-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5069 // CHECK6:       omp.inner.for.body:
5070 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5071 // CHECK6-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
5072 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5073 // CHECK6-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
5074 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
5075 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5076 // CHECK6:       omp.inner.for.inc:
5077 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5078 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5079 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
5080 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5081 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
5082 // CHECK6:       omp.inner.for.end:
5083 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5084 // CHECK6:       omp.loop.exit:
5085 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
5086 // CHECK6-NEXT:    ret void
5087 //
5088 //
5089 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..3
5090 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5091 // CHECK6-NEXT:  entry:
5092 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5093 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5094 // CHECK6-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5095 // CHECK6-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5096 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5097 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5098 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5099 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5100 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5101 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5102 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5103 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5104 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5105 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5106 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5107 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5108 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5109 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5110 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5111 // CHECK6-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
5112 // CHECK6-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5113 // CHECK6-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
5114 // CHECK6-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5115 // CHECK6-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
5116 // CHECK6-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5117 // CHECK6-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5118 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5119 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5120 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5121 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
5122 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5123 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5124 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
5125 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5126 // CHECK6:       cond.true:
5127 // CHECK6-NEXT:    br label [[COND_END:%.*]]
5128 // CHECK6:       cond.false:
5129 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5130 // CHECK6-NEXT:    br label [[COND_END]]
5131 // CHECK6:       cond.end:
5132 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
5133 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5134 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5135 // CHECK6-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
5136 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5137 // CHECK6:       omp.inner.for.cond:
5138 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5139 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5140 // CHECK6-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
5141 // CHECK6-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5142 // CHECK6:       omp.inner.for.body:
5143 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5144 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
5145 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5146 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
5147 // CHECK6-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
5148 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
5149 // CHECK6-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
5150 // CHECK6-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
5151 // CHECK6-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
5152 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5153 // CHECK6:       omp.body.continue:
5154 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5155 // CHECK6:       omp.inner.for.inc:
5156 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5157 // CHECK6-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
5158 // CHECK6-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
5159 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
5160 // CHECK6:       omp.inner.for.end:
5161 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5162 // CHECK6:       omp.loop.exit:
5163 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
5164 // CHECK6-NEXT:    ret void
5165 //
5166 //
5167 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45
5168 // CHECK6-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5169 // CHECK6-NEXT:  entry:
5170 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5171 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5172 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5173 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
5174 // CHECK6-NEXT:    ret void
5175 //
5176 //
5177 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..6
5178 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5179 // CHECK6-NEXT:  entry:
5180 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5181 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5182 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5183 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5184 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5185 // CHECK6-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5186 // CHECK6-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5187 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5188 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5189 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5190 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5191 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5192 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5193 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5194 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5195 // CHECK6-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
5196 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5197 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5198 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5199 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
5200 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5201 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5202 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
5203 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5204 // CHECK6:       cond.true:
5205 // CHECK6-NEXT:    br label [[COND_END:%.*]]
5206 // CHECK6:       cond.false:
5207 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5208 // CHECK6-NEXT:    br label [[COND_END]]
5209 // CHECK6:       cond.end:
5210 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5211 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5212 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5213 // CHECK6-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5214 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5215 // CHECK6:       omp.inner.for.cond:
5216 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5217 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5218 // CHECK6-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5219 // CHECK6-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5220 // CHECK6:       omp.inner.for.body:
5221 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5222 // CHECK6-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
5223 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5224 // CHECK6-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
5225 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
5226 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5227 // CHECK6:       omp.inner.for.inc:
5228 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5229 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5230 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
5231 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5232 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
5233 // CHECK6:       omp.inner.for.end:
5234 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5235 // CHECK6:       omp.loop.exit:
5236 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
5237 // CHECK6-NEXT:    ret void
5238 //
5239 //
5240 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..7
5241 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5242 // CHECK6-NEXT:  entry:
5243 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5244 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5245 // CHECK6-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5246 // CHECK6-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5247 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5248 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5249 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5250 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5251 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5252 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5253 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5254 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5255 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5256 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5257 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5258 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5259 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5260 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5261 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5262 // CHECK6-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
5263 // CHECK6-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5264 // CHECK6-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
5265 // CHECK6-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5266 // CHECK6-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
5267 // CHECK6-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5268 // CHECK6-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5269 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5270 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5271 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5272 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
5273 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
5274 // CHECK6-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
5275 // CHECK6:       omp.dispatch.cond:
5276 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5277 // CHECK6-NEXT:    [[CONV2:%.*]] = sext i32 [[TMP5]] to i64
5278 // CHECK6-NEXT:    [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5279 // CHECK6-NEXT:    [[CMP:%.*]] = icmp ugt i64 [[CONV2]], [[TMP6]]
5280 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5281 // CHECK6:       cond.true:
5282 // CHECK6-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5283 // CHECK6-NEXT:    br label [[COND_END:%.*]]
5284 // CHECK6:       cond.false:
5285 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5286 // CHECK6-NEXT:    [[CONV3:%.*]] = sext i32 [[TMP8]] to i64
5287 // CHECK6-NEXT:    br label [[COND_END]]
5288 // CHECK6:       cond.end:
5289 // CHECK6-NEXT:    [[COND:%.*]] = phi i64 [ [[TMP7]], [[COND_TRUE]] ], [ [[CONV3]], [[COND_FALSE]] ]
5290 // CHECK6-NEXT:    [[CONV4:%.*]] = trunc i64 [[COND]] to i32
5291 // CHECK6-NEXT:    store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4
5292 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5293 // CHECK6-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
5294 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5295 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5296 // CHECK6-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
5297 // CHECK6-NEXT:    br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
5298 // CHECK6:       omp.dispatch.body:
5299 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5300 // CHECK6:       omp.inner.for.cond:
5301 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5302 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5303 // CHECK6-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
5304 // CHECK6-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5305 // CHECK6:       omp.inner.for.body:
5306 // CHECK6-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5307 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
5308 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5309 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
5310 // CHECK6-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
5311 // CHECK6-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
5312 // CHECK6-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
5313 // CHECK6-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
5314 // CHECK6-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
5315 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5316 // CHECK6:       omp.body.continue:
5317 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5318 // CHECK6:       omp.inner.for.inc:
5319 // CHECK6-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5320 // CHECK6-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP16]], 1
5321 // CHECK6-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
5322 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
5323 // CHECK6:       omp.inner.for.end:
5324 // CHECK6-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
5325 // CHECK6:       omp.dispatch.inc:
5326 // CHECK6-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5327 // CHECK6-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5328 // CHECK6-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
5329 // CHECK6-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4
5330 // CHECK6-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5331 // CHECK6-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5332 // CHECK6-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
5333 // CHECK6-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4
5334 // CHECK6-NEXT:    br label [[OMP_DISPATCH_COND]]
5335 // CHECK6:       omp.dispatch.end:
5336 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
5337 // CHECK6-NEXT:    ret void
5338 //
5339 //
5340 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51
5341 // CHECK6-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5342 // CHECK6-NEXT:  entry:
5343 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5344 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5345 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5346 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
5347 // CHECK6-NEXT:    ret void
5348 //
5349 //
5350 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..10
5351 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5352 // CHECK6-NEXT:  entry:
5353 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5354 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5355 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5356 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5357 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5358 // CHECK6-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5359 // CHECK6-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5360 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5361 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5362 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5363 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5364 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5365 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5366 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5367 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5368 // CHECK6-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
5369 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5370 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5371 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5372 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
5373 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5374 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5375 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
5376 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5377 // CHECK6:       cond.true:
5378 // CHECK6-NEXT:    br label [[COND_END:%.*]]
5379 // CHECK6:       cond.false:
5380 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5381 // CHECK6-NEXT:    br label [[COND_END]]
5382 // CHECK6:       cond.end:
5383 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5384 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5385 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5386 // CHECK6-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5387 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5388 // CHECK6:       omp.inner.for.cond:
5389 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5390 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5391 // CHECK6-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5392 // CHECK6-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5393 // CHECK6:       omp.inner.for.body:
5394 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5395 // CHECK6-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
5396 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5397 // CHECK6-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
5398 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
5399 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5400 // CHECK6:       omp.inner.for.inc:
5401 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5402 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5403 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
5404 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5405 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
5406 // CHECK6:       omp.inner.for.end:
5407 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5408 // CHECK6:       omp.loop.exit:
5409 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
5410 // CHECK6-NEXT:    ret void
5411 //
5412 //
5413 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..11
5414 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5415 // CHECK6-NEXT:  entry:
5416 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5417 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5418 // CHECK6-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5419 // CHECK6-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5420 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5421 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5422 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5423 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5424 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5425 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5426 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5427 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5428 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5429 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5430 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5431 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5432 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5433 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5434 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5435 // CHECK6-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
5436 // CHECK6-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5437 // CHECK6-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
5438 // CHECK6-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5439 // CHECK6-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
5440 // CHECK6-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5441 // CHECK6-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5442 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5443 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5444 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5445 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5446 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5447 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
5448 // CHECK6-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
5449 // CHECK6-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
5450 // CHECK6:       omp.dispatch.cond:
5451 // CHECK6-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
5452 // CHECK6-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
5453 // CHECK6-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
5454 // CHECK6:       omp.dispatch.body:
5455 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5456 // CHECK6-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
5457 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5458 // CHECK6:       omp.inner.for.cond:
5459 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
5460 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9
5461 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
5462 // CHECK6-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5463 // CHECK6:       omp.inner.for.body:
5464 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
5465 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
5466 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5467 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9
5468 // CHECK6-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
5469 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !9
5470 // CHECK6-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
5471 // CHECK6-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
5472 // CHECK6-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !9
5473 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5474 // CHECK6:       omp.body.continue:
5475 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5476 // CHECK6:       omp.inner.for.inc:
5477 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
5478 // CHECK6-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
5479 // CHECK6-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9
5480 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
5481 // CHECK6:       omp.inner.for.end:
5482 // CHECK6-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
5483 // CHECK6:       omp.dispatch.inc:
5484 // CHECK6-NEXT:    br label [[OMP_DISPATCH_COND]]
5485 // CHECK6:       omp.dispatch.end:
5486 // CHECK6-NEXT:    ret void
5487 //
5488 //
5489 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57
5490 // CHECK6-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5491 // CHECK6-NEXT:  entry:
5492 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5493 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5494 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5495 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
5496 // CHECK6-NEXT:    ret void
5497 //
5498 //
5499 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..14
5500 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5501 // CHECK6-NEXT:  entry:
5502 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5503 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5504 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5505 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5506 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5507 // CHECK6-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5508 // CHECK6-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5509 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5510 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5511 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5512 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5513 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5514 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5515 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5516 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5517 // CHECK6-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
5518 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5519 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5520 // CHECK6-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5521 // CHECK6-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
5522 // CHECK6-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5523 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5524 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
5525 // CHECK6-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5526 // CHECK6:       cond.true:
5527 // CHECK6-NEXT:    br label [[COND_END:%.*]]
5528 // CHECK6:       cond.false:
5529 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5530 // CHECK6-NEXT:    br label [[COND_END]]
5531 // CHECK6:       cond.end:
5532 // CHECK6-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5533 // CHECK6-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5534 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5535 // CHECK6-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5536 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5537 // CHECK6:       omp.inner.for.cond:
5538 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5539 // CHECK6-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5540 // CHECK6-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5541 // CHECK6-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5542 // CHECK6:       omp.inner.for.body:
5543 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5544 // CHECK6-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
5545 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5546 // CHECK6-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
5547 // CHECK6-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]])
5548 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5549 // CHECK6:       omp.inner.for.inc:
5550 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5551 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5552 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
5553 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5554 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]]
5555 // CHECK6:       omp.inner.for.end:
5556 // CHECK6-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5557 // CHECK6:       omp.loop.exit:
5558 // CHECK6-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
5559 // CHECK6-NEXT:    ret void
5560 //
5561 //
5562 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..15
5563 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5564 // CHECK6-NEXT:  entry:
5565 // CHECK6-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
5566 // CHECK6-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
5567 // CHECK6-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5568 // CHECK6-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5569 // CHECK6-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
5570 // CHECK6-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5571 // CHECK6-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5572 // CHECK6-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5573 // CHECK6-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5574 // CHECK6-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5575 // CHECK6-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5576 // CHECK6-NEXT:    [[I:%.*]] = alloca i32, align 4
5577 // CHECK6-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
5578 // CHECK6-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
5579 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5580 // CHECK6-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5581 // CHECK6-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
5582 // CHECK6-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
5583 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5584 // CHECK6-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
5585 // CHECK6-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
5586 // CHECK6-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
5587 // CHECK6-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
5588 // CHECK6-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
5589 // CHECK6-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
5590 // CHECK6-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
5591 // CHECK6-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5592 // CHECK6-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5593 // CHECK6-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5594 // CHECK6-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5595 // CHECK6-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
5596 // CHECK6-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
5597 // CHECK6-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
5598 // CHECK6-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
5599 // CHECK6:       omp.dispatch.cond:
5600 // CHECK6-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
5601 // CHECK6-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
5602 // CHECK6-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
5603 // CHECK6:       omp.dispatch.body:
5604 // CHECK6-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5605 // CHECK6-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
5606 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5607 // CHECK6:       omp.inner.for.cond:
5608 // CHECK6-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
5609 // CHECK6-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12
5610 // CHECK6-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
5611 // CHECK6-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5612 // CHECK6:       omp.inner.for.body:
5613 // CHECK6-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
5614 // CHECK6-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
5615 // CHECK6-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5616 // CHECK6-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12
5617 // CHECK6-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
5618 // CHECK6-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12
5619 // CHECK6-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
5620 // CHECK6-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
5621 // CHECK6-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12
5622 // CHECK6-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5623 // CHECK6:       omp.body.continue:
5624 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5625 // CHECK6:       omp.inner.for.inc:
5626 // CHECK6-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
5627 // CHECK6-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
5628 // CHECK6-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12
5629 // CHECK6-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
5630 // CHECK6:       omp.inner.for.end:
5631 // CHECK6-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
5632 // CHECK6:       omp.dispatch.inc:
5633 // CHECK6-NEXT:    br label [[OMP_DISPATCH_COND]]
5634 // CHECK6:       omp.dispatch.end:
5635 // CHECK6-NEXT:    ret void
5636 //
5637 //
5638 // CHECK6-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
5639 // CHECK6-SAME: () #[[ATTR3:[0-9]+]] {
5640 // CHECK6-NEXT:  entry:
5641 // CHECK6-NEXT:    call void @__tgt_register_requires(i64 1)
5642 // CHECK6-NEXT:    ret void
5643 //
5644 //
5645 // CHECK7-LABEL: define {{[^@]+}}@_Z21teams_template_structv
5646 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] {
5647 // CHECK7-NEXT:  entry:
5648 // CHECK7-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
5649 // CHECK7-NEXT:    [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
5650 // CHECK7-NEXT:    ret i32 [[CALL]]
5651 //
5652 //
5653 // CHECK7-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
5654 // CHECK7-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
5655 // CHECK7-NEXT:  entry:
5656 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5657 // CHECK7-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
5658 // CHECK7-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
5659 // CHECK7-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
5660 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5661 // CHECK7-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4
5662 // CHECK7-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4
5663 // CHECK7-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4
5664 // CHECK7-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
5665 // CHECK7-NEXT:    [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4
5666 // CHECK7-NEXT:    [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4
5667 // CHECK7-NEXT:    [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4
5668 // CHECK7-NEXT:    [[_TMP13:%.*]] = alloca i32, align 4
5669 // CHECK7-NEXT:    [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 4
5670 // CHECK7-NEXT:    [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 4
5671 // CHECK7-NEXT:    [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 4
5672 // CHECK7-NEXT:    [[_TMP20:%.*]] = alloca i32, align 4
5673 // CHECK7-NEXT:    [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 4
5674 // CHECK7-NEXT:    [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 4
5675 // CHECK7-NEXT:    [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 4
5676 // CHECK7-NEXT:    [[_TMP27:%.*]] = alloca i32, align 4
5677 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5678 // CHECK7-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5679 // CHECK7-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
5680 // CHECK7-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5681 // CHECK7-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
5682 // CHECK7-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4
5683 // CHECK7-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5684 // CHECK7-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
5685 // CHECK7-NEXT:    store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4
5686 // CHECK7-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
5687 // CHECK7-NEXT:    store i8* null, i8** [[TMP4]], align 4
5688 // CHECK7-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5689 // CHECK7-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5690 // CHECK7-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123)
5691 // CHECK7-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
5692 // CHECK7-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
5693 // CHECK7-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5694 // CHECK7:       omp_offload.failed:
5695 // CHECK7-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
5696 // CHECK7-NEXT:    br label [[OMP_OFFLOAD_CONT]]
5697 // CHECK7:       omp_offload.cont:
5698 // CHECK7-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5699 // CHECK7-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
5700 // CHECK7-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
5701 // CHECK7-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4
5702 // CHECK7-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
5703 // CHECK7-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
5704 // CHECK7-NEXT:    store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4
5705 // CHECK7-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
5706 // CHECK7-NEXT:    store i8* null, i8** [[TMP13]], align 4
5707 // CHECK7-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
5708 // CHECK7-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
5709 // CHECK7-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
5710 // CHECK7-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
5711 // CHECK7-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
5712 // CHECK7-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
5713 // CHECK7:       omp_offload.failed7:
5714 // CHECK7-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]]
5715 // CHECK7-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
5716 // CHECK7:       omp_offload.cont8:
5717 // CHECK7-NEXT:    [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5718 // CHECK7-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
5719 // CHECK7-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
5720 // CHECK7-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4
5721 // CHECK7-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
5722 // CHECK7-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
5723 // CHECK7-NEXT:    store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4
5724 // CHECK7-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0
5725 // CHECK7-NEXT:    store i8* null, i8** [[TMP22]], align 4
5726 // CHECK7-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
5727 // CHECK7-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
5728 // CHECK7-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
5729 // CHECK7-NEXT:    [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
5730 // CHECK7-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
5731 // CHECK7-NEXT:    br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
5732 // CHECK7:       omp_offload.failed14:
5733 // CHECK7-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(%struct.SS* [[THIS1]]) #[[ATTR2]]
5734 // CHECK7-NEXT:    br label [[OMP_OFFLOAD_CONT15]]
5735 // CHECK7:       omp_offload.cont15:
5736 // CHECK7-NEXT:    [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5737 // CHECK7-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
5738 // CHECK7-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS**
5739 // CHECK7-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 4
5740 // CHECK7-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
5741 // CHECK7-NEXT:    [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]**
5742 // CHECK7-NEXT:    store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 4
5743 // CHECK7-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 0
5744 // CHECK7-NEXT:    store i8* null, i8** [[TMP31]], align 4
5745 // CHECK7-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
5746 // CHECK7-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
5747 // CHECK7-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
5748 // CHECK7-NEXT:    [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
5749 // CHECK7-NEXT:    [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
5750 // CHECK7-NEXT:    br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]]
5751 // CHECK7:       omp_offload.failed21:
5752 // CHECK7-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(%struct.SS* [[THIS1]]) #[[ATTR2]]
5753 // CHECK7-NEXT:    br label [[OMP_OFFLOAD_CONT22]]
5754 // CHECK7:       omp_offload.cont22:
5755 // CHECK7-NEXT:    [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5756 // CHECK7-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
5757 // CHECK7-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
5758 // CHECK7-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 4
5759 // CHECK7-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
5760 // CHECK7-NEXT:    [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
5761 // CHECK7-NEXT:    store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 4
5762 // CHECK7-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 0
5763 // CHECK7-NEXT:    store i8* null, i8** [[TMP40]], align 4
5764 // CHECK7-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
5765 // CHECK7-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
5766 // CHECK7-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
5767 // CHECK7-NEXT:    [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
5768 // CHECK7-NEXT:    [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
5769 // CHECK7-NEXT:    br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]]
5770 // CHECK7:       omp_offload.failed28:
5771 // CHECK7-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(%struct.SS* [[THIS1]]) #[[ATTR2]]
5772 // CHECK7-NEXT:    br label [[OMP_OFFLOAD_CONT29]]
5773 // CHECK7:       omp_offload.cont29:
5774 // CHECK7-NEXT:    [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
5775 // CHECK7-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i32 0, i32 0
5776 // CHECK7-NEXT:    [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
5777 // CHECK7-NEXT:    ret i32 [[TMP45]]
5778 //
5779 //
5780 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35
5781 // CHECK7-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
5782 // CHECK7-NEXT:  entry:
5783 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5784 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5785 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5786 // CHECK7-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
5787 // CHECK7-NEXT:    ret void
5788 //
5789 //
5790 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined.
5791 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5792 // CHECK7-NEXT:  entry:
5793 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5794 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5795 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5796 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5797 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5798 // CHECK7-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5799 // CHECK7-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5800 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5801 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5802 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
5803 // CHECK7-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5804 // CHECK7-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5805 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5806 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5807 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5808 // CHECK7-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
5809 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5810 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5811 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5812 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
5813 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5814 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5815 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
5816 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5817 // CHECK7:       cond.true:
5818 // CHECK7-NEXT:    br label [[COND_END:%.*]]
5819 // CHECK7:       cond.false:
5820 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5821 // CHECK7-NEXT:    br label [[COND_END]]
5822 // CHECK7:       cond.end:
5823 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5824 // CHECK7-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5825 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5826 // CHECK7-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5827 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5828 // CHECK7:       omp.inner.for.cond:
5829 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5830 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5831 // CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5832 // CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5833 // CHECK7:       omp.inner.for.body:
5834 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5835 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5836 // CHECK7-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
5837 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5838 // CHECK7:       omp.inner.for.inc:
5839 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5840 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5841 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
5842 // CHECK7-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5843 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
5844 // CHECK7:       omp.inner.for.end:
5845 // CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5846 // CHECK7:       omp.loop.exit:
5847 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
5848 // CHECK7-NEXT:    ret void
5849 //
5850 //
5851 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..1
5852 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5853 // CHECK7-NEXT:  entry:
5854 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5855 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5856 // CHECK7-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
5857 // CHECK7-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
5858 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5859 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5860 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5861 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5862 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5863 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5864 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5865 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
5866 // CHECK7-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5867 // CHECK7-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5868 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
5869 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
5870 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5871 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5872 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
5873 // CHECK7-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
5874 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
5875 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
5876 // CHECK7-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
5877 // CHECK7-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
5878 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5879 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5880 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5881 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
5882 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5883 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5884 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
5885 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5886 // CHECK7:       cond.true:
5887 // CHECK7-NEXT:    br label [[COND_END:%.*]]
5888 // CHECK7:       cond.false:
5889 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5890 // CHECK7-NEXT:    br label [[COND_END]]
5891 // CHECK7:       cond.end:
5892 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
5893 // CHECK7-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
5894 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
5895 // CHECK7-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
5896 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5897 // CHECK7:       omp.inner.for.cond:
5898 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5899 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
5900 // CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
5901 // CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5902 // CHECK7:       omp.inner.for.body:
5903 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5904 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
5905 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5906 // CHECK7-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
5907 // CHECK7-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
5908 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
5909 // CHECK7-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
5910 // CHECK7-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
5911 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5912 // CHECK7:       omp.body.continue:
5913 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5914 // CHECK7:       omp.inner.for.inc:
5915 // CHECK7-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5916 // CHECK7-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
5917 // CHECK7-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
5918 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
5919 // CHECK7:       omp.inner.for.end:
5920 // CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5921 // CHECK7:       omp.loop.exit:
5922 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
5923 // CHECK7-NEXT:    ret void
5924 //
5925 //
5926 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
5927 // CHECK7-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5928 // CHECK7-NEXT:  entry:
5929 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5930 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5931 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5932 // CHECK7-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
5933 // CHECK7-NEXT:    ret void
5934 //
5935 //
5936 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..2
5937 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5938 // CHECK7-NEXT:  entry:
5939 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
5940 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
5941 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
5942 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5943 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5944 // CHECK7-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5945 // CHECK7-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5946 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5947 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5948 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
5949 // CHECK7-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
5950 // CHECK7-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
5951 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
5952 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
5953 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
5954 // CHECK7-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
5955 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
5956 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
5957 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
5958 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
5959 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
5960 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5961 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
5962 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5963 // CHECK7:       cond.true:
5964 // CHECK7-NEXT:    br label [[COND_END:%.*]]
5965 // CHECK7:       cond.false:
5966 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5967 // CHECK7-NEXT:    br label [[COND_END]]
5968 // CHECK7:       cond.end:
5969 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5970 // CHECK7-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
5971 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5972 // CHECK7-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
5973 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5974 // CHECK7:       omp.inner.for.cond:
5975 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5976 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5977 // CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5978 // CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5979 // CHECK7:       omp.inner.for.body:
5980 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
5981 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
5982 // CHECK7-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
5983 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5984 // CHECK7:       omp.inner.for.inc:
5985 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
5986 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
5987 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
5988 // CHECK7-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
5989 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
5990 // CHECK7:       omp.inner.for.end:
5991 // CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5992 // CHECK7:       omp.loop.exit:
5993 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
5994 // CHECK7-NEXT:    ret void
5995 //
5996 //
5997 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..3
5998 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
5999 // CHECK7-NEXT:  entry:
6000 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6001 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6002 // CHECK7-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
6003 // CHECK7-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
6004 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6005 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6006 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6007 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6008 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6009 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6010 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6011 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
6012 // CHECK7-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6013 // CHECK7-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6014 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6015 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6016 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6017 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6018 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
6019 // CHECK7-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
6020 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6021 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6022 // CHECK7-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
6023 // CHECK7-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
6024 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6025 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6026 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6027 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
6028 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6029 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6030 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
6031 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6032 // CHECK7:       cond.true:
6033 // CHECK7-NEXT:    br label [[COND_END:%.*]]
6034 // CHECK7:       cond.false:
6035 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6036 // CHECK7-NEXT:    br label [[COND_END]]
6037 // CHECK7:       cond.end:
6038 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
6039 // CHECK7-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6040 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6041 // CHECK7-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
6042 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6043 // CHECK7:       omp.inner.for.cond:
6044 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6045 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6046 // CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
6047 // CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6048 // CHECK7:       omp.inner.for.body:
6049 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6050 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
6051 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6052 // CHECK7-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
6053 // CHECK7-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
6054 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
6055 // CHECK7-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
6056 // CHECK7-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
6057 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6058 // CHECK7:       omp.body.continue:
6059 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6060 // CHECK7:       omp.inner.for.inc:
6061 // CHECK7-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6062 // CHECK7-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
6063 // CHECK7-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
6064 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
6065 // CHECK7:       omp.inner.for.end:
6066 // CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6067 // CHECK7:       omp.loop.exit:
6068 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
6069 // CHECK7-NEXT:    ret void
6070 //
6071 //
6072 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45
6073 // CHECK7-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6074 // CHECK7-NEXT:  entry:
6075 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6076 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6077 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6078 // CHECK7-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
6079 // CHECK7-NEXT:    ret void
6080 //
6081 //
6082 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..6
6083 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6084 // CHECK7-NEXT:  entry:
6085 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6086 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6087 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6088 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6089 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6090 // CHECK7-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6091 // CHECK7-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6092 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6093 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6094 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
6095 // CHECK7-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6096 // CHECK7-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6097 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6098 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6099 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6100 // CHECK7-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
6101 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6102 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6103 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6104 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
6105 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6106 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6107 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
6108 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6109 // CHECK7:       cond.true:
6110 // CHECK7-NEXT:    br label [[COND_END:%.*]]
6111 // CHECK7:       cond.false:
6112 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6113 // CHECK7-NEXT:    br label [[COND_END]]
6114 // CHECK7:       cond.end:
6115 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6116 // CHECK7-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6117 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6118 // CHECK7-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
6119 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6120 // CHECK7:       omp.inner.for.cond:
6121 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6122 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6123 // CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6124 // CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6125 // CHECK7:       omp.inner.for.body:
6126 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6127 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6128 // CHECK7-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
6129 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6130 // CHECK7:       omp.inner.for.inc:
6131 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6132 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6133 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
6134 // CHECK7-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6135 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
6136 // CHECK7:       omp.inner.for.end:
6137 // CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6138 // CHECK7:       omp.loop.exit:
6139 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
6140 // CHECK7-NEXT:    ret void
6141 //
6142 //
6143 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..7
6144 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6145 // CHECK7-NEXT:  entry:
6146 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6147 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6148 // CHECK7-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
6149 // CHECK7-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
6150 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6151 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6152 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6153 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6154 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6155 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6156 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6157 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
6158 // CHECK7-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6159 // CHECK7-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6160 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6161 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6162 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6163 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6164 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
6165 // CHECK7-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
6166 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6167 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6168 // CHECK7-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
6169 // CHECK7-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
6170 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6171 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6172 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6173 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
6174 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
6175 // CHECK7-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
6176 // CHECK7:       omp.dispatch.cond:
6177 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6178 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6179 // CHECK7-NEXT:    [[CMP:%.*]] = icmp ugt i32 [[TMP5]], [[TMP6]]
6180 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6181 // CHECK7:       cond.true:
6182 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6183 // CHECK7-NEXT:    br label [[COND_END:%.*]]
6184 // CHECK7:       cond.false:
6185 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6186 // CHECK7-NEXT:    br label [[COND_END]]
6187 // CHECK7:       cond.end:
6188 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
6189 // CHECK7-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6190 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6191 // CHECK7-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
6192 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6193 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6194 // CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
6195 // CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
6196 // CHECK7:       omp.dispatch.body:
6197 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6198 // CHECK7:       omp.inner.for.cond:
6199 // CHECK7-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6200 // CHECK7-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6201 // CHECK7-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
6202 // CHECK7-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6203 // CHECK7:       omp.inner.for.body:
6204 // CHECK7-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6205 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
6206 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6207 // CHECK7-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
6208 // CHECK7-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
6209 // CHECK7-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
6210 // CHECK7-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP15]]
6211 // CHECK7-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
6212 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6213 // CHECK7:       omp.body.continue:
6214 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6215 // CHECK7:       omp.inner.for.inc:
6216 // CHECK7-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6217 // CHECK7-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1
6218 // CHECK7-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
6219 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
6220 // CHECK7:       omp.inner.for.end:
6221 // CHECK7-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
6222 // CHECK7:       omp.dispatch.inc:
6223 // CHECK7-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6224 // CHECK7-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6225 // CHECK7-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
6226 // CHECK7-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
6227 // CHECK7-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6228 // CHECK7-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6229 // CHECK7-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
6230 // CHECK7-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
6231 // CHECK7-NEXT:    br label [[OMP_DISPATCH_COND]]
6232 // CHECK7:       omp.dispatch.end:
6233 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
6234 // CHECK7-NEXT:    ret void
6235 //
6236 //
6237 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51
6238 // CHECK7-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6239 // CHECK7-NEXT:  entry:
6240 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6241 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6242 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6243 // CHECK7-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
6244 // CHECK7-NEXT:    ret void
6245 //
6246 //
6247 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..10
6248 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6249 // CHECK7-NEXT:  entry:
6250 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6251 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6252 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6253 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6254 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6255 // CHECK7-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6256 // CHECK7-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6257 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6258 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6259 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
6260 // CHECK7-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6261 // CHECK7-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6262 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6263 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6264 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6265 // CHECK7-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
6266 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6267 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6268 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6269 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
6270 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6271 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6272 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
6273 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6274 // CHECK7:       cond.true:
6275 // CHECK7-NEXT:    br label [[COND_END:%.*]]
6276 // CHECK7:       cond.false:
6277 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6278 // CHECK7-NEXT:    br label [[COND_END]]
6279 // CHECK7:       cond.end:
6280 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6281 // CHECK7-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6282 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6283 // CHECK7-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
6284 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6285 // CHECK7:       omp.inner.for.cond:
6286 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6287 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6288 // CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6289 // CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6290 // CHECK7:       omp.inner.for.body:
6291 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6292 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6293 // CHECK7-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
6294 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6295 // CHECK7:       omp.inner.for.inc:
6296 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6297 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6298 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
6299 // CHECK7-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6300 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
6301 // CHECK7:       omp.inner.for.end:
6302 // CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6303 // CHECK7:       omp.loop.exit:
6304 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
6305 // CHECK7-NEXT:    ret void
6306 //
6307 //
6308 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..11
6309 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6310 // CHECK7-NEXT:  entry:
6311 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6312 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6313 // CHECK7-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
6314 // CHECK7-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
6315 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6316 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6317 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6318 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6319 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6320 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6321 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6322 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
6323 // CHECK7-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6324 // CHECK7-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6325 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6326 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6327 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6328 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6329 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
6330 // CHECK7-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
6331 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6332 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6333 // CHECK7-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
6334 // CHECK7-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
6335 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6336 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6337 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6338 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6339 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6340 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
6341 // CHECK7-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
6342 // CHECK7-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
6343 // CHECK7:       omp.dispatch.cond:
6344 // CHECK7-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
6345 // CHECK7-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
6346 // CHECK7-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
6347 // CHECK7:       omp.dispatch.body:
6348 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6349 // CHECK7-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
6350 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6351 // CHECK7:       omp.inner.for.cond:
6352 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
6353 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10
6354 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
6355 // CHECK7-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6356 // CHECK7:       omp.inner.for.body:
6357 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
6358 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
6359 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6360 // CHECK7-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !10
6361 // CHECK7-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
6362 // CHECK7-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !10
6363 // CHECK7-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
6364 // CHECK7-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !10
6365 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6366 // CHECK7:       omp.body.continue:
6367 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6368 // CHECK7:       omp.inner.for.inc:
6369 // CHECK7-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
6370 // CHECK7-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
6371 // CHECK7-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
6372 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
6373 // CHECK7:       omp.inner.for.end:
6374 // CHECK7-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
6375 // CHECK7:       omp.dispatch.inc:
6376 // CHECK7-NEXT:    br label [[OMP_DISPATCH_COND]]
6377 // CHECK7:       omp.dispatch.end:
6378 // CHECK7-NEXT:    ret void
6379 //
6380 //
6381 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57
6382 // CHECK7-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6383 // CHECK7-NEXT:  entry:
6384 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6385 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6386 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6387 // CHECK7-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
6388 // CHECK7-NEXT:    ret void
6389 //
6390 //
6391 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..14
6392 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6393 // CHECK7-NEXT:  entry:
6394 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6395 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6396 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6397 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6398 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6399 // CHECK7-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6400 // CHECK7-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6401 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6402 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6403 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
6404 // CHECK7-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6405 // CHECK7-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6406 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6407 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6408 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6409 // CHECK7-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
6410 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6411 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6412 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6413 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
6414 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6415 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6416 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
6417 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6418 // CHECK7:       cond.true:
6419 // CHECK7-NEXT:    br label [[COND_END:%.*]]
6420 // CHECK7:       cond.false:
6421 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6422 // CHECK7-NEXT:    br label [[COND_END]]
6423 // CHECK7:       cond.end:
6424 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6425 // CHECK7-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6426 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6427 // CHECK7-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
6428 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6429 // CHECK7:       omp.inner.for.cond:
6430 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6431 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6432 // CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6433 // CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6434 // CHECK7:       omp.inner.for.body:
6435 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6436 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6437 // CHECK7-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
6438 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6439 // CHECK7:       omp.inner.for.inc:
6440 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6441 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6442 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
6443 // CHECK7-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6444 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
6445 // CHECK7:       omp.inner.for.end:
6446 // CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6447 // CHECK7:       omp.loop.exit:
6448 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
6449 // CHECK7-NEXT:    ret void
6450 //
6451 //
6452 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..15
6453 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6454 // CHECK7-NEXT:  entry:
6455 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6456 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6457 // CHECK7-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
6458 // CHECK7-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
6459 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6460 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6461 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6462 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6463 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6464 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6465 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6466 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
6467 // CHECK7-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6468 // CHECK7-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6469 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6470 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6471 // CHECK7-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6472 // CHECK7-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6473 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
6474 // CHECK7-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
6475 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6476 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6477 // CHECK7-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
6478 // CHECK7-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
6479 // CHECK7-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6480 // CHECK7-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6481 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6482 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6483 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6484 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
6485 // CHECK7-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
6486 // CHECK7-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
6487 // CHECK7:       omp.dispatch.cond:
6488 // CHECK7-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
6489 // CHECK7-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
6490 // CHECK7-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
6491 // CHECK7:       omp.dispatch.body:
6492 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6493 // CHECK7-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
6494 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6495 // CHECK7:       omp.inner.for.cond:
6496 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
6497 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
6498 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
6499 // CHECK7-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6500 // CHECK7:       omp.inner.for.body:
6501 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
6502 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
6503 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6504 // CHECK7-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
6505 // CHECK7-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
6506 // CHECK7-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13
6507 // CHECK7-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
6508 // CHECK7-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13
6509 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6510 // CHECK7:       omp.body.continue:
6511 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6512 // CHECK7:       omp.inner.for.inc:
6513 // CHECK7-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
6514 // CHECK7-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
6515 // CHECK7-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
6516 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
6517 // CHECK7:       omp.inner.for.end:
6518 // CHECK7-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
6519 // CHECK7:       omp.dispatch.inc:
6520 // CHECK7-NEXT:    br label [[OMP_DISPATCH_COND]]
6521 // CHECK7:       omp.dispatch.end:
6522 // CHECK7-NEXT:    ret void
6523 //
6524 //
6525 // CHECK7-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
6526 // CHECK7-SAME: () #[[ATTR3:[0-9]+]] {
6527 // CHECK7-NEXT:  entry:
6528 // CHECK7-NEXT:    call void @__tgt_register_requires(i64 1)
6529 // CHECK7-NEXT:    ret void
6530 //
6531 //
6532 // CHECK8-LABEL: define {{[^@]+}}@_Z21teams_template_structv
6533 // CHECK8-SAME: () #[[ATTR0:[0-9]+]] {
6534 // CHECK8-NEXT:  entry:
6535 // CHECK8-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
6536 // CHECK8-NEXT:    [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
6537 // CHECK8-NEXT:    ret i32 [[CALL]]
6538 //
6539 //
6540 // CHECK8-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
6541 // CHECK8-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
6542 // CHECK8-NEXT:  entry:
6543 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6544 // CHECK8-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
6545 // CHECK8-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
6546 // CHECK8-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
6547 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6548 // CHECK8-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4
6549 // CHECK8-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4
6550 // CHECK8-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4
6551 // CHECK8-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
6552 // CHECK8-NEXT:    [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4
6553 // CHECK8-NEXT:    [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4
6554 // CHECK8-NEXT:    [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4
6555 // CHECK8-NEXT:    [[_TMP13:%.*]] = alloca i32, align 4
6556 // CHECK8-NEXT:    [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 4
6557 // CHECK8-NEXT:    [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 4
6558 // CHECK8-NEXT:    [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 4
6559 // CHECK8-NEXT:    [[_TMP20:%.*]] = alloca i32, align 4
6560 // CHECK8-NEXT:    [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 4
6561 // CHECK8-NEXT:    [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 4
6562 // CHECK8-NEXT:    [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 4
6563 // CHECK8-NEXT:    [[_TMP27:%.*]] = alloca i32, align 4
6564 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6565 // CHECK8-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6566 // CHECK8-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
6567 // CHECK8-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6568 // CHECK8-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS**
6569 // CHECK8-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4
6570 // CHECK8-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6571 // CHECK8-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]**
6572 // CHECK8-NEXT:    store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4
6573 // CHECK8-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
6574 // CHECK8-NEXT:    store i8* null, i8** [[TMP4]], align 4
6575 // CHECK8-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6576 // CHECK8-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6577 // CHECK8-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123)
6578 // CHECK8-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
6579 // CHECK8-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
6580 // CHECK8-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
6581 // CHECK8:       omp_offload.failed:
6582 // CHECK8-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]]
6583 // CHECK8-NEXT:    br label [[OMP_OFFLOAD_CONT]]
6584 // CHECK8:       omp_offload.cont:
6585 // CHECK8-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
6586 // CHECK8-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
6587 // CHECK8-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS**
6588 // CHECK8-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4
6589 // CHECK8-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
6590 // CHECK8-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]**
6591 // CHECK8-NEXT:    store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4
6592 // CHECK8-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
6593 // CHECK8-NEXT:    store i8* null, i8** [[TMP13]], align 4
6594 // CHECK8-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
6595 // CHECK8-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
6596 // CHECK8-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
6597 // CHECK8-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
6598 // CHECK8-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
6599 // CHECK8-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
6600 // CHECK8:       omp_offload.failed7:
6601 // CHECK8-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]]
6602 // CHECK8-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
6603 // CHECK8:       omp_offload.cont8:
6604 // CHECK8-NEXT:    [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
6605 // CHECK8-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
6606 // CHECK8-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS**
6607 // CHECK8-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4
6608 // CHECK8-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
6609 // CHECK8-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]**
6610 // CHECK8-NEXT:    store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4
6611 // CHECK8-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0
6612 // CHECK8-NEXT:    store i8* null, i8** [[TMP22]], align 4
6613 // CHECK8-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0
6614 // CHECK8-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0
6615 // CHECK8-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
6616 // CHECK8-NEXT:    [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
6617 // CHECK8-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
6618 // CHECK8-NEXT:    br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]]
6619 // CHECK8:       omp_offload.failed14:
6620 // CHECK8-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(%struct.SS* [[THIS1]]) #[[ATTR2]]
6621 // CHECK8-NEXT:    br label [[OMP_OFFLOAD_CONT15]]
6622 // CHECK8:       omp_offload.cont15:
6623 // CHECK8-NEXT:    [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
6624 // CHECK8-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
6625 // CHECK8-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS**
6626 // CHECK8-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 4
6627 // CHECK8-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
6628 // CHECK8-NEXT:    [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]**
6629 // CHECK8-NEXT:    store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 4
6630 // CHECK8-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 0
6631 // CHECK8-NEXT:    store i8* null, i8** [[TMP31]], align 4
6632 // CHECK8-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0
6633 // CHECK8-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0
6634 // CHECK8-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
6635 // CHECK8-NEXT:    [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
6636 // CHECK8-NEXT:    [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0
6637 // CHECK8-NEXT:    br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]]
6638 // CHECK8:       omp_offload.failed21:
6639 // CHECK8-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(%struct.SS* [[THIS1]]) #[[ATTR2]]
6640 // CHECK8-NEXT:    br label [[OMP_OFFLOAD_CONT22]]
6641 // CHECK8:       omp_offload.cont22:
6642 // CHECK8-NEXT:    [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
6643 // CHECK8-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
6644 // CHECK8-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS**
6645 // CHECK8-NEXT:    store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 4
6646 // CHECK8-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
6647 // CHECK8-NEXT:    [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]**
6648 // CHECK8-NEXT:    store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 4
6649 // CHECK8-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 0
6650 // CHECK8-NEXT:    store i8* null, i8** [[TMP40]], align 4
6651 // CHECK8-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
6652 // CHECK8-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
6653 // CHECK8-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123)
6654 // CHECK8-NEXT:    [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
6655 // CHECK8-NEXT:    [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0
6656 // CHECK8-NEXT:    br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]]
6657 // CHECK8:       omp_offload.failed28:
6658 // CHECK8-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(%struct.SS* [[THIS1]]) #[[ATTR2]]
6659 // CHECK8-NEXT:    br label [[OMP_OFFLOAD_CONT29]]
6660 // CHECK8:       omp_offload.cont29:
6661 // CHECK8-NEXT:    [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
6662 // CHECK8-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i32 0, i32 0
6663 // CHECK8-NEXT:    [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
6664 // CHECK8-NEXT:    ret i32 [[TMP45]]
6665 //
6666 //
6667 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35
6668 // CHECK8-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
6669 // CHECK8-NEXT:  entry:
6670 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6671 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6672 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6673 // CHECK8-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
6674 // CHECK8-NEXT:    ret void
6675 //
6676 //
6677 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined.
6678 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6679 // CHECK8-NEXT:  entry:
6680 // CHECK8-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6681 // CHECK8-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6682 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6683 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6684 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6685 // CHECK8-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6686 // CHECK8-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6687 // CHECK8-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6688 // CHECK8-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6689 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
6690 // CHECK8-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6691 // CHECK8-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6692 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6693 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6694 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6695 // CHECK8-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
6696 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6697 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6698 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6699 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
6700 // CHECK8-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6701 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6702 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
6703 // CHECK8-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6704 // CHECK8:       cond.true:
6705 // CHECK8-NEXT:    br label [[COND_END:%.*]]
6706 // CHECK8:       cond.false:
6707 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6708 // CHECK8-NEXT:    br label [[COND_END]]
6709 // CHECK8:       cond.end:
6710 // CHECK8-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6711 // CHECK8-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6712 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6713 // CHECK8-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
6714 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6715 // CHECK8:       omp.inner.for.cond:
6716 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6717 // CHECK8-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6718 // CHECK8-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6719 // CHECK8-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6720 // CHECK8:       omp.inner.for.body:
6721 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6722 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6723 // CHECK8-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
6724 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6725 // CHECK8:       omp.inner.for.inc:
6726 // CHECK8-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6727 // CHECK8-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6728 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
6729 // CHECK8-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6730 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]]
6731 // CHECK8:       omp.inner.for.end:
6732 // CHECK8-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6733 // CHECK8:       omp.loop.exit:
6734 // CHECK8-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
6735 // CHECK8-NEXT:    ret void
6736 //
6737 //
6738 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..1
6739 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6740 // CHECK8-NEXT:  entry:
6741 // CHECK8-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6742 // CHECK8-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6743 // CHECK8-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
6744 // CHECK8-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
6745 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6746 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6747 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6748 // CHECK8-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6749 // CHECK8-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6750 // CHECK8-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6751 // CHECK8-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6752 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
6753 // CHECK8-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6754 // CHECK8-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6755 // CHECK8-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6756 // CHECK8-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6757 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6758 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6759 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
6760 // CHECK8-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
6761 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6762 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6763 // CHECK8-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
6764 // CHECK8-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
6765 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6766 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6767 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6768 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
6769 // CHECK8-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6770 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6771 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
6772 // CHECK8-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6773 // CHECK8:       cond.true:
6774 // CHECK8-NEXT:    br label [[COND_END:%.*]]
6775 // CHECK8:       cond.false:
6776 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6777 // CHECK8-NEXT:    br label [[COND_END]]
6778 // CHECK8:       cond.end:
6779 // CHECK8-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
6780 // CHECK8-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6781 // CHECK8-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6782 // CHECK8-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
6783 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6784 // CHECK8:       omp.inner.for.cond:
6785 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6786 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6787 // CHECK8-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
6788 // CHECK8-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6789 // CHECK8:       omp.inner.for.body:
6790 // CHECK8-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6791 // CHECK8-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
6792 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6793 // CHECK8-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
6794 // CHECK8-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
6795 // CHECK8-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
6796 // CHECK8-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
6797 // CHECK8-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
6798 // CHECK8-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6799 // CHECK8:       omp.body.continue:
6800 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6801 // CHECK8:       omp.inner.for.inc:
6802 // CHECK8-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6803 // CHECK8-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
6804 // CHECK8-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
6805 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]]
6806 // CHECK8:       omp.inner.for.end:
6807 // CHECK8-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6808 // CHECK8:       omp.loop.exit:
6809 // CHECK8-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
6810 // CHECK8-NEXT:    ret void
6811 //
6812 //
6813 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
6814 // CHECK8-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6815 // CHECK8-NEXT:  entry:
6816 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6817 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6818 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6819 // CHECK8-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
6820 // CHECK8-NEXT:    ret void
6821 //
6822 //
6823 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..2
6824 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6825 // CHECK8-NEXT:  entry:
6826 // CHECK8-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6827 // CHECK8-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6828 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6829 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6830 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6831 // CHECK8-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6832 // CHECK8-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6833 // CHECK8-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6834 // CHECK8-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6835 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
6836 // CHECK8-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6837 // CHECK8-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6838 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6839 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6840 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6841 // CHECK8-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
6842 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6843 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6844 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6845 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
6846 // CHECK8-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6847 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6848 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
6849 // CHECK8-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6850 // CHECK8:       cond.true:
6851 // CHECK8-NEXT:    br label [[COND_END:%.*]]
6852 // CHECK8:       cond.false:
6853 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6854 // CHECK8-NEXT:    br label [[COND_END]]
6855 // CHECK8:       cond.end:
6856 // CHECK8-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6857 // CHECK8-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
6858 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6859 // CHECK8-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
6860 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6861 // CHECK8:       omp.inner.for.cond:
6862 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6863 // CHECK8-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6864 // CHECK8-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6865 // CHECK8-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6866 // CHECK8:       omp.inner.for.body:
6867 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
6868 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6869 // CHECK8-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
6870 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6871 // CHECK8:       omp.inner.for.inc:
6872 // CHECK8-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6873 // CHECK8-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
6874 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
6875 // CHECK8-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
6876 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]]
6877 // CHECK8:       omp.inner.for.end:
6878 // CHECK8-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6879 // CHECK8:       omp.loop.exit:
6880 // CHECK8-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
6881 // CHECK8-NEXT:    ret void
6882 //
6883 //
6884 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..3
6885 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6886 // CHECK8-NEXT:  entry:
6887 // CHECK8-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6888 // CHECK8-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6889 // CHECK8-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
6890 // CHECK8-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
6891 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6892 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6893 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6894 // CHECK8-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6895 // CHECK8-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6896 // CHECK8-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6897 // CHECK8-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6898 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
6899 // CHECK8-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6900 // CHECK8-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6901 // CHECK8-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6902 // CHECK8-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6903 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6904 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6905 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
6906 // CHECK8-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
6907 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
6908 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
6909 // CHECK8-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
6910 // CHECK8-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
6911 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6912 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6913 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6914 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
6915 // CHECK8-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6916 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6917 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
6918 // CHECK8-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6919 // CHECK8:       cond.true:
6920 // CHECK8-NEXT:    br label [[COND_END:%.*]]
6921 // CHECK8:       cond.false:
6922 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6923 // CHECK8-NEXT:    br label [[COND_END]]
6924 // CHECK8:       cond.end:
6925 // CHECK8-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
6926 // CHECK8-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
6927 // CHECK8-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
6928 // CHECK8-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
6929 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6930 // CHECK8:       omp.inner.for.cond:
6931 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6932 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
6933 // CHECK8-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
6934 // CHECK8-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6935 // CHECK8:       omp.inner.for.body:
6936 // CHECK8-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6937 // CHECK8-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
6938 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6939 // CHECK8-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
6940 // CHECK8-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
6941 // CHECK8-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
6942 // CHECK8-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]]
6943 // CHECK8-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
6944 // CHECK8-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6945 // CHECK8:       omp.body.continue:
6946 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6947 // CHECK8:       omp.inner.for.inc:
6948 // CHECK8-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
6949 // CHECK8-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
6950 // CHECK8-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
6951 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]]
6952 // CHECK8:       omp.inner.for.end:
6953 // CHECK8-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6954 // CHECK8:       omp.loop.exit:
6955 // CHECK8-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
6956 // CHECK8-NEXT:    ret void
6957 //
6958 //
6959 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45
6960 // CHECK8-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6961 // CHECK8-NEXT:  entry:
6962 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6963 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6964 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6965 // CHECK8-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
6966 // CHECK8-NEXT:    ret void
6967 //
6968 //
6969 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..6
6970 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
6971 // CHECK8-NEXT:  entry:
6972 // CHECK8-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
6973 // CHECK8-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
6974 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
6975 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6976 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6977 // CHECK8-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6978 // CHECK8-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6979 // CHECK8-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6980 // CHECK8-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6981 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
6982 // CHECK8-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
6983 // CHECK8-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
6984 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
6985 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
6986 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
6987 // CHECK8-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
6988 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
6989 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
6990 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
6991 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
6992 // CHECK8-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
6993 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
6994 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
6995 // CHECK8-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6996 // CHECK8:       cond.true:
6997 // CHECK8-NEXT:    br label [[COND_END:%.*]]
6998 // CHECK8:       cond.false:
6999 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7000 // CHECK8-NEXT:    br label [[COND_END]]
7001 // CHECK8:       cond.end:
7002 // CHECK8-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
7003 // CHECK8-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7004 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7005 // CHECK8-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
7006 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7007 // CHECK8:       omp.inner.for.cond:
7008 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7009 // CHECK8-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7010 // CHECK8-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7011 // CHECK8-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7012 // CHECK8:       omp.inner.for.body:
7013 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7014 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7015 // CHECK8-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
7016 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7017 // CHECK8:       omp.inner.for.inc:
7018 // CHECK8-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7019 // CHECK8-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7020 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
7021 // CHECK8-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
7022 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]]
7023 // CHECK8:       omp.inner.for.end:
7024 // CHECK8-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7025 // CHECK8:       omp.loop.exit:
7026 // CHECK8-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
7027 // CHECK8-NEXT:    ret void
7028 //
7029 //
7030 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..7
7031 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
7032 // CHECK8-NEXT:  entry:
7033 // CHECK8-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7034 // CHECK8-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7035 // CHECK8-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
7036 // CHECK8-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
7037 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
7038 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7039 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7040 // CHECK8-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7041 // CHECK8-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7042 // CHECK8-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7043 // CHECK8-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7044 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
7045 // CHECK8-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7046 // CHECK8-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7047 // CHECK8-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7048 // CHECK8-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7049 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
7050 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
7051 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
7052 // CHECK8-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
7053 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7054 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7055 // CHECK8-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
7056 // CHECK8-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
7057 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7058 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7059 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7060 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
7061 // CHECK8-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61)
7062 // CHECK8-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
7063 // CHECK8:       omp.dispatch.cond:
7064 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7065 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7066 // CHECK8-NEXT:    [[CMP:%.*]] = icmp ugt i32 [[TMP5]], [[TMP6]]
7067 // CHECK8-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7068 // CHECK8:       cond.true:
7069 // CHECK8-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7070 // CHECK8-NEXT:    br label [[COND_END:%.*]]
7071 // CHECK8:       cond.false:
7072 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7073 // CHECK8-NEXT:    br label [[COND_END]]
7074 // CHECK8:       cond.end:
7075 // CHECK8-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
7076 // CHECK8-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
7077 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7078 // CHECK8-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
7079 // CHECK8-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7080 // CHECK8-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7081 // CHECK8-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
7082 // CHECK8-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
7083 // CHECK8:       omp.dispatch.body:
7084 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7085 // CHECK8:       omp.inner.for.cond:
7086 // CHECK8-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7087 // CHECK8-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7088 // CHECK8-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
7089 // CHECK8-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7090 // CHECK8:       omp.inner.for.body:
7091 // CHECK8-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7092 // CHECK8-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
7093 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7094 // CHECK8-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
7095 // CHECK8-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
7096 // CHECK8-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I]], align 4
7097 // CHECK8-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP15]]
7098 // CHECK8-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
7099 // CHECK8-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7100 // CHECK8:       omp.body.continue:
7101 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7102 // CHECK8:       omp.inner.for.inc:
7103 // CHECK8-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7104 // CHECK8-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1
7105 // CHECK8-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
7106 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]]
7107 // CHECK8:       omp.inner.for.end:
7108 // CHECK8-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
7109 // CHECK8:       omp.dispatch.inc:
7110 // CHECK8-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7111 // CHECK8-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7112 // CHECK8-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
7113 // CHECK8-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
7114 // CHECK8-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7115 // CHECK8-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7116 // CHECK8-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
7117 // CHECK8-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
7118 // CHECK8-NEXT:    br label [[OMP_DISPATCH_COND]]
7119 // CHECK8:       omp.dispatch.end:
7120 // CHECK8-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
7121 // CHECK8-NEXT:    ret void
7122 //
7123 //
7124 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51
7125 // CHECK8-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
7126 // CHECK8-NEXT:  entry:
7127 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
7128 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
7129 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
7130 // CHECK8-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
7131 // CHECK8-NEXT:    ret void
7132 //
7133 //
7134 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..10
7135 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
7136 // CHECK8-NEXT:  entry:
7137 // CHECK8-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7138 // CHECK8-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7139 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
7140 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7141 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7142 // CHECK8-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7143 // CHECK8-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7144 // CHECK8-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7145 // CHECK8-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7146 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
7147 // CHECK8-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7148 // CHECK8-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7149 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
7150 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
7151 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7152 // CHECK8-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
7153 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7154 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7155 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7156 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
7157 // CHECK8-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7158 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7159 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
7160 // CHECK8-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7161 // CHECK8:       cond.true:
7162 // CHECK8-NEXT:    br label [[COND_END:%.*]]
7163 // CHECK8:       cond.false:
7164 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7165 // CHECK8-NEXT:    br label [[COND_END]]
7166 // CHECK8:       cond.end:
7167 // CHECK8-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
7168 // CHECK8-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7169 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7170 // CHECK8-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
7171 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7172 // CHECK8:       omp.inner.for.cond:
7173 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7174 // CHECK8-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7175 // CHECK8-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7176 // CHECK8-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7177 // CHECK8:       omp.inner.for.body:
7178 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7179 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7180 // CHECK8-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
7181 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7182 // CHECK8:       omp.inner.for.inc:
7183 // CHECK8-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7184 // CHECK8-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7185 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
7186 // CHECK8-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
7187 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]]
7188 // CHECK8:       omp.inner.for.end:
7189 // CHECK8-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7190 // CHECK8:       omp.loop.exit:
7191 // CHECK8-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
7192 // CHECK8-NEXT:    ret void
7193 //
7194 //
7195 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..11
7196 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
7197 // CHECK8-NEXT:  entry:
7198 // CHECK8-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7199 // CHECK8-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7200 // CHECK8-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
7201 // CHECK8-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
7202 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
7203 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7204 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7205 // CHECK8-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7206 // CHECK8-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7207 // CHECK8-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7208 // CHECK8-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7209 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
7210 // CHECK8-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7211 // CHECK8-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7212 // CHECK8-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7213 // CHECK8-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7214 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
7215 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
7216 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
7217 // CHECK8-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
7218 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7219 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7220 // CHECK8-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
7221 // CHECK8-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
7222 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7223 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7224 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7225 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7226 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7227 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
7228 // CHECK8-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
7229 // CHECK8-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
7230 // CHECK8:       omp.dispatch.cond:
7231 // CHECK8-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
7232 // CHECK8-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
7233 // CHECK8-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
7234 // CHECK8:       omp.dispatch.body:
7235 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7236 // CHECK8-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
7237 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7238 // CHECK8:       omp.inner.for.cond:
7239 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
7240 // CHECK8-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10
7241 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
7242 // CHECK8-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7243 // CHECK8:       omp.inner.for.body:
7244 // CHECK8-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
7245 // CHECK8-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
7246 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7247 // CHECK8-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !10
7248 // CHECK8-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
7249 // CHECK8-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !10
7250 // CHECK8-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
7251 // CHECK8-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !10
7252 // CHECK8-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7253 // CHECK8:       omp.body.continue:
7254 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7255 // CHECK8:       omp.inner.for.inc:
7256 // CHECK8-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
7257 // CHECK8-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
7258 // CHECK8-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10
7259 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
7260 // CHECK8:       omp.inner.for.end:
7261 // CHECK8-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
7262 // CHECK8:       omp.dispatch.inc:
7263 // CHECK8-NEXT:    br label [[OMP_DISPATCH_COND]]
7264 // CHECK8:       omp.dispatch.end:
7265 // CHECK8-NEXT:    ret void
7266 //
7267 //
7268 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57
7269 // CHECK8-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
7270 // CHECK8-NEXT:  entry:
7271 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
7272 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
7273 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
7274 // CHECK8-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]])
7275 // CHECK8-NEXT:    ret void
7276 //
7277 //
7278 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..14
7279 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
7280 // CHECK8-NEXT:  entry:
7281 // CHECK8-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7282 // CHECK8-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7283 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
7284 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7285 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7286 // CHECK8-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7287 // CHECK8-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7288 // CHECK8-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7289 // CHECK8-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7290 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
7291 // CHECK8-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7292 // CHECK8-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7293 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
7294 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
7295 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
7296 // CHECK8-NEXT:    store i32 122, i32* [[DOTOMP_COMB_UB]], align 4
7297 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7298 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7299 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7300 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
7301 // CHECK8-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
7302 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7303 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
7304 // CHECK8-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7305 // CHECK8:       cond.true:
7306 // CHECK8-NEXT:    br label [[COND_END:%.*]]
7307 // CHECK8:       cond.false:
7308 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7309 // CHECK8-NEXT:    br label [[COND_END]]
7310 // CHECK8:       cond.end:
7311 // CHECK8-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
7312 // CHECK8-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
7313 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7314 // CHECK8-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
7315 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7316 // CHECK8:       omp.inner.for.cond:
7317 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7318 // CHECK8-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7319 // CHECK8-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7320 // CHECK8-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7321 // CHECK8:       omp.inner.for.body:
7322 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
7323 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
7324 // CHECK8-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]])
7325 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7326 // CHECK8:       omp.inner.for.inc:
7327 // CHECK8-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
7328 // CHECK8-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
7329 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
7330 // CHECK8-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
7331 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]]
7332 // CHECK8:       omp.inner.for.end:
7333 // CHECK8-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7334 // CHECK8:       omp.loop.exit:
7335 // CHECK8-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
7336 // CHECK8-NEXT:    ret void
7337 //
7338 //
7339 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..15
7340 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] {
7341 // CHECK8-NEXT:  entry:
7342 // CHECK8-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
7343 // CHECK8-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
7344 // CHECK8-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
7345 // CHECK8-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
7346 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
7347 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7348 // CHECK8-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7349 // CHECK8-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7350 // CHECK8-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7351 // CHECK8-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7352 // CHECK8-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7353 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
7354 // CHECK8-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
7355 // CHECK8-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
7356 // CHECK8-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7357 // CHECK8-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7358 // CHECK8-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
7359 // CHECK8-NEXT:    [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
7360 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
7361 // CHECK8-NEXT:    store i32 122, i32* [[DOTOMP_UB]], align 4
7362 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
7363 // CHECK8-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
7364 // CHECK8-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
7365 // CHECK8-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
7366 // CHECK8-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
7367 // CHECK8-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
7368 // CHECK8-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7369 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
7370 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
7371 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
7372 // CHECK8-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
7373 // CHECK8-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
7374 // CHECK8:       omp.dispatch.cond:
7375 // CHECK8-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
7376 // CHECK8-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
7377 // CHECK8-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
7378 // CHECK8:       omp.dispatch.body:
7379 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
7380 // CHECK8-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
7381 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7382 // CHECK8:       omp.inner.for.cond:
7383 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
7384 // CHECK8-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13
7385 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
7386 // CHECK8-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7387 // CHECK8:       omp.inner.for.body:
7388 // CHECK8-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
7389 // CHECK8-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
7390 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7391 // CHECK8-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13
7392 // CHECK8-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0
7393 // CHECK8-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13
7394 // CHECK8-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]]
7395 // CHECK8-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13
7396 // CHECK8-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7397 // CHECK8:       omp.body.continue:
7398 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7399 // CHECK8:       omp.inner.for.inc:
7400 // CHECK8-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
7401 // CHECK8-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
7402 // CHECK8-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13
7403 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
7404 // CHECK8:       omp.inner.for.end:
7405 // CHECK8-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
7406 // CHECK8:       omp.dispatch.inc:
7407 // CHECK8-NEXT:    br label [[OMP_DISPATCH_COND]]
7408 // CHECK8:       omp.dispatch.end:
7409 // CHECK8-NEXT:    ret void
7410 //
7411 //
7412 // CHECK8-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
7413 // CHECK8-SAME: () #[[ATTR3:[0-9]+]] {
7414 // CHECK8-NEXT:  entry:
7415 // CHECK8-NEXT:    call void @__tgt_register_requires(i64 1)
7416 // CHECK8-NEXT:    ret void
7417 //
7418 //
7419 // CHECK9-LABEL: define {{[^@]+}}@_Z21teams_template_structv
7420 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
7421 // CHECK9-NEXT:  entry:
7422 // CHECK9-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
7423 // CHECK9-NEXT:    [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
7424 // CHECK9-NEXT:    ret i32 [[CALL]]
7425 //
7426 //
7427 // CHECK9-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
7428 // CHECK9-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
7429 // CHECK9-NEXT:  entry:
7430 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
7431 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
7432 // CHECK9-NEXT:    [[I2:%.*]] = alloca i32, align 4
7433 // CHECK9-NEXT:    [[I12:%.*]] = alloca i32, align 4
7434 // CHECK9-NEXT:    [[I22:%.*]] = alloca i32, align 4
7435 // CHECK9-NEXT:    [[I32:%.*]] = alloca i32, align 4
7436 // CHECK9-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
7437 // CHECK9-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
7438 // CHECK9-NEXT:    store i32 0, i32* [[I]], align 4
7439 // CHECK9-NEXT:    br label [[FOR_COND:%.*]]
7440 // CHECK9:       for.cond:
7441 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32, i32* [[I]], align 4
7442 // CHECK9-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP0]], 123
7443 // CHECK9-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
7444 // CHECK9:       for.body:
7445 // CHECK9-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
7446 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, i32* [[I]], align 4
7447 // CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP1]] to i64
7448 // CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
7449 // CHECK9-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
7450 // CHECK9-NEXT:    br label [[FOR_INC:%.*]]
7451 // CHECK9:       for.inc:
7452 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I]], align 4
7453 // CHECK9-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP2]], 1
7454 // CHECK9-NEXT:    store i32 [[INC]], i32* [[I]], align 4
7455 // CHECK9-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
7456 // CHECK9:       for.end:
7457 // CHECK9-NEXT:    store i32 0, i32* [[I2]], align 4
7458 // CHECK9-NEXT:    br label [[FOR_COND3:%.*]]
7459 // CHECK9:       for.cond3:
7460 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I2]], align 4
7461 // CHECK9-NEXT:    [[CMP4:%.*]] = icmp slt i32 [[TMP3]], 123
7462 // CHECK9-NEXT:    br i1 [[CMP4]], label [[FOR_BODY5:%.*]], label [[FOR_END11:%.*]]
7463 // CHECK9:       for.body5:
7464 // CHECK9-NEXT:    [[A6:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
7465 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, i32* [[I2]], align 4
7466 // CHECK9-NEXT:    [[IDXPROM7:%.*]] = sext i32 [[TMP4]] to i64
7467 // CHECK9-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A6]], i64 0, i64 [[IDXPROM7]]
7468 // CHECK9-NEXT:    store i32 0, i32* [[ARRAYIDX8]], align 4
7469 // CHECK9-NEXT:    br label [[FOR_INC9:%.*]]
7470 // CHECK9:       for.inc9:
7471 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I2]], align 4
7472 // CHECK9-NEXT:    [[INC10:%.*]] = add nsw i32 [[TMP5]], 1
7473 // CHECK9-NEXT:    store i32 [[INC10]], i32* [[I2]], align 4
7474 // CHECK9-NEXT:    br label [[FOR_COND3]], !llvm.loop [[LOOP4:![0-9]+]]
7475 // CHECK9:       for.end11:
7476 // CHECK9-NEXT:    store i32 0, i32* [[I12]], align 4
7477 // CHECK9-NEXT:    br label [[FOR_COND13:%.*]]
7478 // CHECK9:       for.cond13:
7479 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I12]], align 4
7480 // CHECK9-NEXT:    [[CMP14:%.*]] = icmp slt i32 [[TMP6]], 123
7481 // CHECK9-NEXT:    br i1 [[CMP14]], label [[FOR_BODY15:%.*]], label [[FOR_END21:%.*]]
7482 // CHECK9:       for.body15:
7483 // CHECK9-NEXT:    [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
7484 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, i32* [[I12]], align 4
7485 // CHECK9-NEXT:    [[IDXPROM17:%.*]] = sext i32 [[TMP7]] to i64
7486 // CHECK9-NEXT:    [[ARRAYIDX18:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A16]], i64 0, i64 [[IDXPROM17]]
7487 // CHECK9-NEXT:    store i32 0, i32* [[ARRAYIDX18]], align 4
7488 // CHECK9-NEXT:    br label [[FOR_INC19:%.*]]
7489 // CHECK9:       for.inc19:
7490 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, i32* [[I12]], align 4
7491 // CHECK9-NEXT:    [[INC20:%.*]] = add nsw i32 [[TMP8]], 1
7492 // CHECK9-NEXT:    store i32 [[INC20]], i32* [[I12]], align 4
7493 // CHECK9-NEXT:    br label [[FOR_COND13]], !llvm.loop [[LOOP5:![0-9]+]]
7494 // CHECK9:       for.end21:
7495 // CHECK9-NEXT:    store i32 0, i32* [[I22]], align 4
7496 // CHECK9-NEXT:    br label [[FOR_COND23:%.*]]
7497 // CHECK9:       for.cond23:
7498 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I22]], align 4
7499 // CHECK9-NEXT:    [[CMP24:%.*]] = icmp slt i32 [[TMP9]], 123
7500 // CHECK9-NEXT:    br i1 [[CMP24]], label [[FOR_BODY25:%.*]], label [[FOR_END31:%.*]]
7501 // CHECK9:       for.body25:
7502 // CHECK9-NEXT:    [[A26:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
7503 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, i32* [[I22]], align 4
7504 // CHECK9-NEXT:    [[IDXPROM27:%.*]] = sext i32 [[TMP10]] to i64
7505 // CHECK9-NEXT:    [[ARRAYIDX28:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A26]], i64 0, i64 [[IDXPROM27]]
7506 // CHECK9-NEXT:    store i32 0, i32* [[ARRAYIDX28]], align 4
7507 // CHECK9-NEXT:    br label [[FOR_INC29:%.*]]
7508 // CHECK9:       for.inc29:
7509 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I22]], align 4
7510 // CHECK9-NEXT:    [[INC30:%.*]] = add nsw i32 [[TMP11]], 1
7511 // CHECK9-NEXT:    store i32 [[INC30]], i32* [[I22]], align 4
7512 // CHECK9-NEXT:    br label [[FOR_COND23]], !llvm.loop [[LOOP6:![0-9]+]]
7513 // CHECK9:       for.end31:
7514 // CHECK9-NEXT:    store i32 0, i32* [[I32]], align 4
7515 // CHECK9-NEXT:    br label [[FOR_COND33:%.*]]
7516 // CHECK9:       for.cond33:
7517 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I32]], align 4
7518 // CHECK9-NEXT:    [[CMP34:%.*]] = icmp slt i32 [[TMP12]], 123
7519 // CHECK9-NEXT:    br i1 [[CMP34]], label [[FOR_BODY35:%.*]], label [[FOR_END41:%.*]]
7520 // CHECK9:       for.body35:
7521 // CHECK9-NEXT:    [[A36:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
7522 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I32]], align 4
7523 // CHECK9-NEXT:    [[IDXPROM37:%.*]] = sext i32 [[TMP13]] to i64
7524 // CHECK9-NEXT:    [[ARRAYIDX38:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A36]], i64 0, i64 [[IDXPROM37]]
7525 // CHECK9-NEXT:    store i32 0, i32* [[ARRAYIDX38]], align 4
7526 // CHECK9-NEXT:    br label [[FOR_INC39:%.*]]
7527 // CHECK9:       for.inc39:
7528 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, i32* [[I32]], align 4
7529 // CHECK9-NEXT:    [[INC40:%.*]] = add nsw i32 [[TMP14]], 1
7530 // CHECK9-NEXT:    store i32 [[INC40]], i32* [[I32]], align 4
7531 // CHECK9-NEXT:    br label [[FOR_COND33]], !llvm.loop [[LOOP7:![0-9]+]]
7532 // CHECK9:       for.end41:
7533 // CHECK9-NEXT:    [[A42:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
7534 // CHECK9-NEXT:    [[ARRAYIDX43:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A42]], i64 0, i64 0
7535 // CHECK9-NEXT:    [[TMP15:%.*]] = load i32, i32* [[ARRAYIDX43]], align 4
7536 // CHECK9-NEXT:    ret i32 [[TMP15]]
7537 //
7538 //
7539 // CHECK10-LABEL: define {{[^@]+}}@_Z21teams_template_structv
7540 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] {
7541 // CHECK10-NEXT:  entry:
7542 // CHECK10-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
7543 // CHECK10-NEXT:    [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
7544 // CHECK10-NEXT:    ret i32 [[CALL]]
7545 //
7546 //
7547 // CHECK10-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
7548 // CHECK10-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
7549 // CHECK10-NEXT:  entry:
7550 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8
7551 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
7552 // CHECK10-NEXT:    [[I2:%.*]] = alloca i32, align 4
7553 // CHECK10-NEXT:    [[I12:%.*]] = alloca i32, align 4
7554 // CHECK10-NEXT:    [[I22:%.*]] = alloca i32, align 4
7555 // CHECK10-NEXT:    [[I32:%.*]] = alloca i32, align 4
7556 // CHECK10-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8
7557 // CHECK10-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8
7558 // CHECK10-NEXT:    store i32 0, i32* [[I]], align 4
7559 // CHECK10-NEXT:    br label [[FOR_COND:%.*]]
7560 // CHECK10:       for.cond:
7561 // CHECK10-NEXT:    [[TMP0:%.*]] = load i32, i32* [[I]], align 4
7562 // CHECK10-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP0]], 123
7563 // CHECK10-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
7564 // CHECK10:       for.body:
7565 // CHECK10-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
7566 // CHECK10-NEXT:    [[TMP1:%.*]] = load i32, i32* [[I]], align 4
7567 // CHECK10-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP1]] to i64
7568 // CHECK10-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
7569 // CHECK10-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
7570 // CHECK10-NEXT:    br label [[FOR_INC:%.*]]
7571 // CHECK10:       for.inc:
7572 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I]], align 4
7573 // CHECK10-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP2]], 1
7574 // CHECK10-NEXT:    store i32 [[INC]], i32* [[I]], align 4
7575 // CHECK10-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
7576 // CHECK10:       for.end:
7577 // CHECK10-NEXT:    store i32 0, i32* [[I2]], align 4
7578 // CHECK10-NEXT:    br label [[FOR_COND3:%.*]]
7579 // CHECK10:       for.cond3:
7580 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I2]], align 4
7581 // CHECK10-NEXT:    [[CMP4:%.*]] = icmp slt i32 [[TMP3]], 123
7582 // CHECK10-NEXT:    br i1 [[CMP4]], label [[FOR_BODY5:%.*]], label [[FOR_END11:%.*]]
7583 // CHECK10:       for.body5:
7584 // CHECK10-NEXT:    [[A6:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
7585 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, i32* [[I2]], align 4
7586 // CHECK10-NEXT:    [[IDXPROM7:%.*]] = sext i32 [[TMP4]] to i64
7587 // CHECK10-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A6]], i64 0, i64 [[IDXPROM7]]
7588 // CHECK10-NEXT:    store i32 0, i32* [[ARRAYIDX8]], align 4
7589 // CHECK10-NEXT:    br label [[FOR_INC9:%.*]]
7590 // CHECK10:       for.inc9:
7591 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I2]], align 4
7592 // CHECK10-NEXT:    [[INC10:%.*]] = add nsw i32 [[TMP5]], 1
7593 // CHECK10-NEXT:    store i32 [[INC10]], i32* [[I2]], align 4
7594 // CHECK10-NEXT:    br label [[FOR_COND3]], !llvm.loop [[LOOP4:![0-9]+]]
7595 // CHECK10:       for.end11:
7596 // CHECK10-NEXT:    store i32 0, i32* [[I12]], align 4
7597 // CHECK10-NEXT:    br label [[FOR_COND13:%.*]]
7598 // CHECK10:       for.cond13:
7599 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I12]], align 4
7600 // CHECK10-NEXT:    [[CMP14:%.*]] = icmp slt i32 [[TMP6]], 123
7601 // CHECK10-NEXT:    br i1 [[CMP14]], label [[FOR_BODY15:%.*]], label [[FOR_END21:%.*]]
7602 // CHECK10:       for.body15:
7603 // CHECK10-NEXT:    [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
7604 // CHECK10-NEXT:    [[TMP7:%.*]] = load i32, i32* [[I12]], align 4
7605 // CHECK10-NEXT:    [[IDXPROM17:%.*]] = sext i32 [[TMP7]] to i64
7606 // CHECK10-NEXT:    [[ARRAYIDX18:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A16]], i64 0, i64 [[IDXPROM17]]
7607 // CHECK10-NEXT:    store i32 0, i32* [[ARRAYIDX18]], align 4
7608 // CHECK10-NEXT:    br label [[FOR_INC19:%.*]]
7609 // CHECK10:       for.inc19:
7610 // CHECK10-NEXT:    [[TMP8:%.*]] = load i32, i32* [[I12]], align 4
7611 // CHECK10-NEXT:    [[INC20:%.*]] = add nsw i32 [[TMP8]], 1
7612 // CHECK10-NEXT:    store i32 [[INC20]], i32* [[I12]], align 4
7613 // CHECK10-NEXT:    br label [[FOR_COND13]], !llvm.loop [[LOOP5:![0-9]+]]
7614 // CHECK10:       for.end21:
7615 // CHECK10-NEXT:    store i32 0, i32* [[I22]], align 4
7616 // CHECK10-NEXT:    br label [[FOR_COND23:%.*]]
7617 // CHECK10:       for.cond23:
7618 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I22]], align 4
7619 // CHECK10-NEXT:    [[CMP24:%.*]] = icmp slt i32 [[TMP9]], 123
7620 // CHECK10-NEXT:    br i1 [[CMP24]], label [[FOR_BODY25:%.*]], label [[FOR_END31:%.*]]
7621 // CHECK10:       for.body25:
7622 // CHECK10-NEXT:    [[A26:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
7623 // CHECK10-NEXT:    [[TMP10:%.*]] = load i32, i32* [[I22]], align 4
7624 // CHECK10-NEXT:    [[IDXPROM27:%.*]] = sext i32 [[TMP10]] to i64
7625 // CHECK10-NEXT:    [[ARRAYIDX28:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A26]], i64 0, i64 [[IDXPROM27]]
7626 // CHECK10-NEXT:    store i32 0, i32* [[ARRAYIDX28]], align 4
7627 // CHECK10-NEXT:    br label [[FOR_INC29:%.*]]
7628 // CHECK10:       for.inc29:
7629 // CHECK10-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I22]], align 4
7630 // CHECK10-NEXT:    [[INC30:%.*]] = add nsw i32 [[TMP11]], 1
7631 // CHECK10-NEXT:    store i32 [[INC30]], i32* [[I22]], align 4
7632 // CHECK10-NEXT:    br label [[FOR_COND23]], !llvm.loop [[LOOP6:![0-9]+]]
7633 // CHECK10:       for.end31:
7634 // CHECK10-NEXT:    store i32 0, i32* [[I32]], align 4
7635 // CHECK10-NEXT:    br label [[FOR_COND33:%.*]]
7636 // CHECK10:       for.cond33:
7637 // CHECK10-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I32]], align 4
7638 // CHECK10-NEXT:    [[CMP34:%.*]] = icmp slt i32 [[TMP12]], 123
7639 // CHECK10-NEXT:    br i1 [[CMP34]], label [[FOR_BODY35:%.*]], label [[FOR_END41:%.*]]
7640 // CHECK10:       for.body35:
7641 // CHECK10-NEXT:    [[A36:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
7642 // CHECK10-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I32]], align 4
7643 // CHECK10-NEXT:    [[IDXPROM37:%.*]] = sext i32 [[TMP13]] to i64
7644 // CHECK10-NEXT:    [[ARRAYIDX38:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A36]], i64 0, i64 [[IDXPROM37]]
7645 // CHECK10-NEXT:    store i32 0, i32* [[ARRAYIDX38]], align 4
7646 // CHECK10-NEXT:    br label [[FOR_INC39:%.*]]
7647 // CHECK10:       for.inc39:
7648 // CHECK10-NEXT:    [[TMP14:%.*]] = load i32, i32* [[I32]], align 4
7649 // CHECK10-NEXT:    [[INC40:%.*]] = add nsw i32 [[TMP14]], 1
7650 // CHECK10-NEXT:    store i32 [[INC40]], i32* [[I32]], align 4
7651 // CHECK10-NEXT:    br label [[FOR_COND33]], !llvm.loop [[LOOP7:![0-9]+]]
7652 // CHECK10:       for.end41:
7653 // CHECK10-NEXT:    [[A42:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
7654 // CHECK10-NEXT:    [[ARRAYIDX43:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A42]], i64 0, i64 0
7655 // CHECK10-NEXT:    [[TMP15:%.*]] = load i32, i32* [[ARRAYIDX43]], align 4
7656 // CHECK10-NEXT:    ret i32 [[TMP15]]
7657 //
7658 //
7659 // CHECK11-LABEL: define {{[^@]+}}@_Z21teams_template_structv
7660 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] {
7661 // CHECK11-NEXT:  entry:
7662 // CHECK11-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
7663 // CHECK11-NEXT:    [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
7664 // CHECK11-NEXT:    ret i32 [[CALL]]
7665 //
7666 //
7667 // CHECK11-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
7668 // CHECK11-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
7669 // CHECK11-NEXT:  entry:
7670 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
7671 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
7672 // CHECK11-NEXT:    [[I2:%.*]] = alloca i32, align 4
7673 // CHECK11-NEXT:    [[I11:%.*]] = alloca i32, align 4
7674 // CHECK11-NEXT:    [[I20:%.*]] = alloca i32, align 4
7675 // CHECK11-NEXT:    [[I29:%.*]] = alloca i32, align 4
7676 // CHECK11-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
7677 // CHECK11-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
7678 // CHECK11-NEXT:    store i32 0, i32* [[I]], align 4
7679 // CHECK11-NEXT:    br label [[FOR_COND:%.*]]
7680 // CHECK11:       for.cond:
7681 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32, i32* [[I]], align 4
7682 // CHECK11-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP0]], 123
7683 // CHECK11-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
7684 // CHECK11:       for.body:
7685 // CHECK11-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
7686 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, i32* [[I]], align 4
7687 // CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP1]]
7688 // CHECK11-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
7689 // CHECK11-NEXT:    br label [[FOR_INC:%.*]]
7690 // CHECK11:       for.inc:
7691 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I]], align 4
7692 // CHECK11-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP2]], 1
7693 // CHECK11-NEXT:    store i32 [[INC]], i32* [[I]], align 4
7694 // CHECK11-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
7695 // CHECK11:       for.end:
7696 // CHECK11-NEXT:    store i32 0, i32* [[I2]], align 4
7697 // CHECK11-NEXT:    br label [[FOR_COND3:%.*]]
7698 // CHECK11:       for.cond3:
7699 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I2]], align 4
7700 // CHECK11-NEXT:    [[CMP4:%.*]] = icmp slt i32 [[TMP3]], 123
7701 // CHECK11-NEXT:    br i1 [[CMP4]], label [[FOR_BODY5:%.*]], label [[FOR_END10:%.*]]
7702 // CHECK11:       for.body5:
7703 // CHECK11-NEXT:    [[A6:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
7704 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, i32* [[I2]], align 4
7705 // CHECK11-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A6]], i32 0, i32 [[TMP4]]
7706 // CHECK11-NEXT:    store i32 0, i32* [[ARRAYIDX7]], align 4
7707 // CHECK11-NEXT:    br label [[FOR_INC8:%.*]]
7708 // CHECK11:       for.inc8:
7709 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I2]], align 4
7710 // CHECK11-NEXT:    [[INC9:%.*]] = add nsw i32 [[TMP5]], 1
7711 // CHECK11-NEXT:    store i32 [[INC9]], i32* [[I2]], align 4
7712 // CHECK11-NEXT:    br label [[FOR_COND3]], !llvm.loop [[LOOP5:![0-9]+]]
7713 // CHECK11:       for.end10:
7714 // CHECK11-NEXT:    store i32 0, i32* [[I11]], align 4
7715 // CHECK11-NEXT:    br label [[FOR_COND12:%.*]]
7716 // CHECK11:       for.cond12:
7717 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I11]], align 4
7718 // CHECK11-NEXT:    [[CMP13:%.*]] = icmp slt i32 [[TMP6]], 123
7719 // CHECK11-NEXT:    br i1 [[CMP13]], label [[FOR_BODY14:%.*]], label [[FOR_END19:%.*]]
7720 // CHECK11:       for.body14:
7721 // CHECK11-NEXT:    [[A15:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
7722 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, i32* [[I11]], align 4
7723 // CHECK11-NEXT:    [[ARRAYIDX16:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A15]], i32 0, i32 [[TMP7]]
7724 // CHECK11-NEXT:    store i32 0, i32* [[ARRAYIDX16]], align 4
7725 // CHECK11-NEXT:    br label [[FOR_INC17:%.*]]
7726 // CHECK11:       for.inc17:
7727 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, i32* [[I11]], align 4
7728 // CHECK11-NEXT:    [[INC18:%.*]] = add nsw i32 [[TMP8]], 1
7729 // CHECK11-NEXT:    store i32 [[INC18]], i32* [[I11]], align 4
7730 // CHECK11-NEXT:    br label [[FOR_COND12]], !llvm.loop [[LOOP6:![0-9]+]]
7731 // CHECK11:       for.end19:
7732 // CHECK11-NEXT:    store i32 0, i32* [[I20]], align 4
7733 // CHECK11-NEXT:    br label [[FOR_COND21:%.*]]
7734 // CHECK11:       for.cond21:
7735 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I20]], align 4
7736 // CHECK11-NEXT:    [[CMP22:%.*]] = icmp slt i32 [[TMP9]], 123
7737 // CHECK11-NEXT:    br i1 [[CMP22]], label [[FOR_BODY23:%.*]], label [[FOR_END28:%.*]]
7738 // CHECK11:       for.body23:
7739 // CHECK11-NEXT:    [[A24:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
7740 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, i32* [[I20]], align 4
7741 // CHECK11-NEXT:    [[ARRAYIDX25:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A24]], i32 0, i32 [[TMP10]]
7742 // CHECK11-NEXT:    store i32 0, i32* [[ARRAYIDX25]], align 4
7743 // CHECK11-NEXT:    br label [[FOR_INC26:%.*]]
7744 // CHECK11:       for.inc26:
7745 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I20]], align 4
7746 // CHECK11-NEXT:    [[INC27:%.*]] = add nsw i32 [[TMP11]], 1
7747 // CHECK11-NEXT:    store i32 [[INC27]], i32* [[I20]], align 4
7748 // CHECK11-NEXT:    br label [[FOR_COND21]], !llvm.loop [[LOOP7:![0-9]+]]
7749 // CHECK11:       for.end28:
7750 // CHECK11-NEXT:    store i32 0, i32* [[I29]], align 4
7751 // CHECK11-NEXT:    br label [[FOR_COND30:%.*]]
7752 // CHECK11:       for.cond30:
7753 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I29]], align 4
7754 // CHECK11-NEXT:    [[CMP31:%.*]] = icmp slt i32 [[TMP12]], 123
7755 // CHECK11-NEXT:    br i1 [[CMP31]], label [[FOR_BODY32:%.*]], label [[FOR_END37:%.*]]
7756 // CHECK11:       for.body32:
7757 // CHECK11-NEXT:    [[A33:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
7758 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I29]], align 4
7759 // CHECK11-NEXT:    [[ARRAYIDX34:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A33]], i32 0, i32 [[TMP13]]
7760 // CHECK11-NEXT:    store i32 0, i32* [[ARRAYIDX34]], align 4
7761 // CHECK11-NEXT:    br label [[FOR_INC35:%.*]]
7762 // CHECK11:       for.inc35:
7763 // CHECK11-NEXT:    [[TMP14:%.*]] = load i32, i32* [[I29]], align 4
7764 // CHECK11-NEXT:    [[INC36:%.*]] = add nsw i32 [[TMP14]], 1
7765 // CHECK11-NEXT:    store i32 [[INC36]], i32* [[I29]], align 4
7766 // CHECK11-NEXT:    br label [[FOR_COND30]], !llvm.loop [[LOOP8:![0-9]+]]
7767 // CHECK11:       for.end37:
7768 // CHECK11-NEXT:    [[A38:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
7769 // CHECK11-NEXT:    [[ARRAYIDX39:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A38]], i32 0, i32 0
7770 // CHECK11-NEXT:    [[TMP15:%.*]] = load i32, i32* [[ARRAYIDX39]], align 4
7771 // CHECK11-NEXT:    ret i32 [[TMP15]]
7772 //
7773 //
7774 // CHECK12-LABEL: define {{[^@]+}}@_Z21teams_template_structv
7775 // CHECK12-SAME: () #[[ATTR0:[0-9]+]] {
7776 // CHECK12-NEXT:  entry:
7777 // CHECK12-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
7778 // CHECK12-NEXT:    [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]])
7779 // CHECK12-NEXT:    ret i32 [[CALL]]
7780 //
7781 //
7782 // CHECK12-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
7783 // CHECK12-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
7784 // CHECK12-NEXT:  entry:
7785 // CHECK12-NEXT:    [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4
7786 // CHECK12-NEXT:    [[I:%.*]] = alloca i32, align 4
7787 // CHECK12-NEXT:    [[I2:%.*]] = alloca i32, align 4
7788 // CHECK12-NEXT:    [[I11:%.*]] = alloca i32, align 4
7789 // CHECK12-NEXT:    [[I20:%.*]] = alloca i32, align 4
7790 // CHECK12-NEXT:    [[I29:%.*]] = alloca i32, align 4
7791 // CHECK12-NEXT:    store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4
7792 // CHECK12-NEXT:    [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4
7793 // CHECK12-NEXT:    store i32 0, i32* [[I]], align 4
7794 // CHECK12-NEXT:    br label [[FOR_COND:%.*]]
7795 // CHECK12:       for.cond:
7796 // CHECK12-NEXT:    [[TMP0:%.*]] = load i32, i32* [[I]], align 4
7797 // CHECK12-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP0]], 123
7798 // CHECK12-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
7799 // CHECK12:       for.body:
7800 // CHECK12-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0
7801 // CHECK12-NEXT:    [[TMP1:%.*]] = load i32, i32* [[I]], align 4
7802 // CHECK12-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP1]]
7803 // CHECK12-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
7804 // CHECK12-NEXT:    br label [[FOR_INC:%.*]]
7805 // CHECK12:       for.inc:
7806 // CHECK12-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I]], align 4
7807 // CHECK12-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP2]], 1
7808 // CHECK12-NEXT:    store i32 [[INC]], i32* [[I]], align 4
7809 // CHECK12-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
7810 // CHECK12:       for.end:
7811 // CHECK12-NEXT:    store i32 0, i32* [[I2]], align 4
7812 // CHECK12-NEXT:    br label [[FOR_COND3:%.*]]
7813 // CHECK12:       for.cond3:
7814 // CHECK12-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I2]], align 4
7815 // CHECK12-NEXT:    [[CMP4:%.*]] = icmp slt i32 [[TMP3]], 123
7816 // CHECK12-NEXT:    br i1 [[CMP4]], label [[FOR_BODY5:%.*]], label [[FOR_END10:%.*]]
7817 // CHECK12:       for.body5:
7818 // CHECK12-NEXT:    [[A6:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
7819 // CHECK12-NEXT:    [[TMP4:%.*]] = load i32, i32* [[I2]], align 4
7820 // CHECK12-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A6]], i32 0, i32 [[TMP4]]
7821 // CHECK12-NEXT:    store i32 0, i32* [[ARRAYIDX7]], align 4
7822 // CHECK12-NEXT:    br label [[FOR_INC8:%.*]]
7823 // CHECK12:       for.inc8:
7824 // CHECK12-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I2]], align 4
7825 // CHECK12-NEXT:    [[INC9:%.*]] = add nsw i32 [[TMP5]], 1
7826 // CHECK12-NEXT:    store i32 [[INC9]], i32* [[I2]], align 4
7827 // CHECK12-NEXT:    br label [[FOR_COND3]], !llvm.loop [[LOOP5:![0-9]+]]
7828 // CHECK12:       for.end10:
7829 // CHECK12-NEXT:    store i32 0, i32* [[I11]], align 4
7830 // CHECK12-NEXT:    br label [[FOR_COND12:%.*]]
7831 // CHECK12:       for.cond12:
7832 // CHECK12-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I11]], align 4
7833 // CHECK12-NEXT:    [[CMP13:%.*]] = icmp slt i32 [[TMP6]], 123
7834 // CHECK12-NEXT:    br i1 [[CMP13]], label [[FOR_BODY14:%.*]], label [[FOR_END19:%.*]]
7835 // CHECK12:       for.body14:
7836 // CHECK12-NEXT:    [[A15:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
7837 // CHECK12-NEXT:    [[TMP7:%.*]] = load i32, i32* [[I11]], align 4
7838 // CHECK12-NEXT:    [[ARRAYIDX16:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A15]], i32 0, i32 [[TMP7]]
7839 // CHECK12-NEXT:    store i32 0, i32* [[ARRAYIDX16]], align 4
7840 // CHECK12-NEXT:    br label [[FOR_INC17:%.*]]
7841 // CHECK12:       for.inc17:
7842 // CHECK12-NEXT:    [[TMP8:%.*]] = load i32, i32* [[I11]], align 4
7843 // CHECK12-NEXT:    [[INC18:%.*]] = add nsw i32 [[TMP8]], 1
7844 // CHECK12-NEXT:    store i32 [[INC18]], i32* [[I11]], align 4
7845 // CHECK12-NEXT:    br label [[FOR_COND12]], !llvm.loop [[LOOP6:![0-9]+]]
7846 // CHECK12:       for.end19:
7847 // CHECK12-NEXT:    store i32 0, i32* [[I20]], align 4
7848 // CHECK12-NEXT:    br label [[FOR_COND21:%.*]]
7849 // CHECK12:       for.cond21:
7850 // CHECK12-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I20]], align 4
7851 // CHECK12-NEXT:    [[CMP22:%.*]] = icmp slt i32 [[TMP9]], 123
7852 // CHECK12-NEXT:    br i1 [[CMP22]], label [[FOR_BODY23:%.*]], label [[FOR_END28:%.*]]
7853 // CHECK12:       for.body23:
7854 // CHECK12-NEXT:    [[A24:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
7855 // CHECK12-NEXT:    [[TMP10:%.*]] = load i32, i32* [[I20]], align 4
7856 // CHECK12-NEXT:    [[ARRAYIDX25:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A24]], i32 0, i32 [[TMP10]]
7857 // CHECK12-NEXT:    store i32 0, i32* [[ARRAYIDX25]], align 4
7858 // CHECK12-NEXT:    br label [[FOR_INC26:%.*]]
7859 // CHECK12:       for.inc26:
7860 // CHECK12-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I20]], align 4
7861 // CHECK12-NEXT:    [[INC27:%.*]] = add nsw i32 [[TMP11]], 1
7862 // CHECK12-NEXT:    store i32 [[INC27]], i32* [[I20]], align 4
7863 // CHECK12-NEXT:    br label [[FOR_COND21]], !llvm.loop [[LOOP7:![0-9]+]]
7864 // CHECK12:       for.end28:
7865 // CHECK12-NEXT:    store i32 0, i32* [[I29]], align 4
7866 // CHECK12-NEXT:    br label [[FOR_COND30:%.*]]
7867 // CHECK12:       for.cond30:
7868 // CHECK12-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I29]], align 4
7869 // CHECK12-NEXT:    [[CMP31:%.*]] = icmp slt i32 [[TMP12]], 123
7870 // CHECK12-NEXT:    br i1 [[CMP31]], label [[FOR_BODY32:%.*]], label [[FOR_END37:%.*]]
7871 // CHECK12:       for.body32:
7872 // CHECK12-NEXT:    [[A33:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
7873 // CHECK12-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I29]], align 4
7874 // CHECK12-NEXT:    [[ARRAYIDX34:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A33]], i32 0, i32 [[TMP13]]
7875 // CHECK12-NEXT:    store i32 0, i32* [[ARRAYIDX34]], align 4
7876 // CHECK12-NEXT:    br label [[FOR_INC35:%.*]]
7877 // CHECK12:       for.inc35:
7878 // CHECK12-NEXT:    [[TMP14:%.*]] = load i32, i32* [[I29]], align 4
7879 // CHECK12-NEXT:    [[INC36:%.*]] = add nsw i32 [[TMP14]], 1
7880 // CHECK12-NEXT:    store i32 [[INC36]], i32* [[I29]], align 4
7881 // CHECK12-NEXT:    br label [[FOR_COND30]], !llvm.loop [[LOOP8:![0-9]+]]
7882 // CHECK12:       for.end37:
7883 // CHECK12-NEXT:    [[A38:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0
7884 // CHECK12-NEXT:    [[ARRAYIDX39:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A38]], i32 0, i32 0
7885 // CHECK12-NEXT:    [[TMP15:%.*]] = load i32, i32* [[ARRAYIDX39]], align 4
7886 // CHECK12-NEXT:    ret i32 [[TMP15]]
7887 //
7888 //
7889 // CHECK13-LABEL: define {{[^@]+}}@main
7890 // CHECK13-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
7891 // CHECK13-NEXT:  entry:
7892 // CHECK13-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
7893 // CHECK13-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
7894 // CHECK13-NEXT:    [[ARGV_ADDR:%.*]] = alloca i8**, align 8
7895 // CHECK13-NEXT:    [[N:%.*]] = alloca i32, align 4
7896 // CHECK13-NEXT:    [[SAVED_STACK:%.*]] = alloca i8*, align 8
7897 // CHECK13-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i64, align 8
7898 // CHECK13-NEXT:    [[M:%.*]] = alloca i32, align 4
7899 // CHECK13-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
7900 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
7901 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
7902 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
7903 // CHECK13-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
7904 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7905 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
7906 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7907 // CHECK13-NEXT:    [[N_CASTED3:%.*]] = alloca i64, align 8
7908 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8
7909 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8
7910 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8
7911 // CHECK13-NEXT:    [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8
7912 // CHECK13-NEXT:    [[_TMP9:%.*]] = alloca i32, align 4
7913 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
7914 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
7915 // CHECK13-NEXT:    [[M_CASTED:%.*]] = alloca i64, align 8
7916 // CHECK13-NEXT:    [[N_CASTED19:%.*]] = alloca i64, align 8
7917 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [4 x i8*], align 8
7918 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS22:%.*]] = alloca [4 x i8*], align 8
7919 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [4 x i8*], align 8
7920 // CHECK13-NEXT:    [[DOTOFFLOAD_SIZES24:%.*]] = alloca [4 x i64], align 8
7921 // CHECK13-NEXT:    [[_TMP25:%.*]] = alloca i32, align 4
7922 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4
7923 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4
7924 // CHECK13-NEXT:    [[N_CASTED34:%.*]] = alloca i64, align 8
7925 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS36:%.*]] = alloca [3 x i8*], align 8
7926 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS37:%.*]] = alloca [3 x i8*], align 8
7927 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS38:%.*]] = alloca [3 x i8*], align 8
7928 // CHECK13-NEXT:    [[DOTOFFLOAD_SIZES39:%.*]] = alloca [3 x i64], align 8
7929 // CHECK13-NEXT:    [[_TMP40:%.*]] = alloca i32, align 4
7930 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4
7931 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4
7932 // CHECK13-NEXT:    [[M_CASTED49:%.*]] = alloca i64, align 8
7933 // CHECK13-NEXT:    [[N_CASTED51:%.*]] = alloca i64, align 8
7934 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS53:%.*]] = alloca [4 x i8*], align 8
7935 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS54:%.*]] = alloca [4 x i8*], align 8
7936 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS55:%.*]] = alloca [4 x i8*], align 8
7937 // CHECK13-NEXT:    [[DOTOFFLOAD_SIZES56:%.*]] = alloca [4 x i64], align 8
7938 // CHECK13-NEXT:    [[_TMP57:%.*]] = alloca i32, align 4
7939 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4
7940 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_59:%.*]] = alloca i32, align 4
7941 // CHECK13-NEXT:    store i32 0, i32* [[RETVAL]], align 4
7942 // CHECK13-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
7943 // CHECK13-NEXT:    store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
7944 // CHECK13-NEXT:    store i32 100, i32* [[N]], align 4
7945 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N]], align 4
7946 // CHECK13-NEXT:    [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
7947 // CHECK13-NEXT:    [[TMP2:%.*]] = call i8* @llvm.stacksave()
7948 // CHECK13-NEXT:    store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
7949 // CHECK13-NEXT:    [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
7950 // CHECK13-NEXT:    store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
7951 // CHECK13-NEXT:    store i32 10, i32* [[M]], align 4
7952 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N]], align 4
7953 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
7954 // CHECK13-NEXT:    store i32 [[TMP3]], i32* [[CONV]], align 4
7955 // CHECK13-NEXT:    [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
7956 // CHECK13-NEXT:    [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4
7957 // CHECK13-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7958 // CHECK13-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
7959 // CHECK13-NEXT:    store i64 [[TMP4]], i64* [[TMP7]], align 8
7960 // CHECK13-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7961 // CHECK13-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
7962 // CHECK13-NEXT:    store i64 [[TMP4]], i64* [[TMP9]], align 8
7963 // CHECK13-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
7964 // CHECK13-NEXT:    store i64 4, i64* [[TMP10]], align 8
7965 // CHECK13-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
7966 // CHECK13-NEXT:    store i8* null, i8** [[TMP11]], align 8
7967 // CHECK13-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
7968 // CHECK13-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
7969 // CHECK13-NEXT:    store i64 [[TMP1]], i64* [[TMP13]], align 8
7970 // CHECK13-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
7971 // CHECK13-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
7972 // CHECK13-NEXT:    store i64 [[TMP1]], i64* [[TMP15]], align 8
7973 // CHECK13-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
7974 // CHECK13-NEXT:    store i64 8, i64* [[TMP16]], align 8
7975 // CHECK13-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
7976 // CHECK13-NEXT:    store i8* null, i8** [[TMP17]], align 8
7977 // CHECK13-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
7978 // CHECK13-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
7979 // CHECK13-NEXT:    store i32* [[VLA]], i32** [[TMP19]], align 8
7980 // CHECK13-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
7981 // CHECK13-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
7982 // CHECK13-NEXT:    store i32* [[VLA]], i32** [[TMP21]], align 8
7983 // CHECK13-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
7984 // CHECK13-NEXT:    store i64 [[TMP5]], i64* [[TMP22]], align 8
7985 // CHECK13-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
7986 // CHECK13-NEXT:    store i8* null, i8** [[TMP23]], align 8
7987 // CHECK13-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7988 // CHECK13-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7989 // CHECK13-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
7990 // CHECK13-NEXT:    [[TMP27:%.*]] = load i32, i32* [[N]], align 4
7991 // CHECK13-NEXT:    store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
7992 // CHECK13-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
7993 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
7994 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7995 // CHECK13-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
7996 // CHECK13-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
7997 // CHECK13-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
7998 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
7999 // CHECK13-NEXT:    [[TMP30:%.*]] = zext i32 [[ADD]] to i64
8000 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]])
8001 // CHECK13-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
8002 // CHECK13-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
8003 // CHECK13-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
8004 // CHECK13:       omp_offload.failed:
8005 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
8006 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT]]
8007 // CHECK13:       omp_offload.cont:
8008 // CHECK13-NEXT:    [[TMP33:%.*]] = load i32, i32* [[N]], align 4
8009 // CHECK13-NEXT:    [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32*
8010 // CHECK13-NEXT:    store i32 [[TMP33]], i32* [[CONV4]], align 4
8011 // CHECK13-NEXT:    [[TMP34:%.*]] = load i64, i64* [[N_CASTED3]], align 8
8012 // CHECK13-NEXT:    [[TMP35:%.*]] = mul nuw i64 [[TMP1]], 4
8013 // CHECK13-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
8014 // CHECK13-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64*
8015 // CHECK13-NEXT:    store i64 [[TMP34]], i64* [[TMP37]], align 8
8016 // CHECK13-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
8017 // CHECK13-NEXT:    [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64*
8018 // CHECK13-NEXT:    store i64 [[TMP34]], i64* [[TMP39]], align 8
8019 // CHECK13-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
8020 // CHECK13-NEXT:    store i64 4, i64* [[TMP40]], align 8
8021 // CHECK13-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0
8022 // CHECK13-NEXT:    store i8* null, i8** [[TMP41]], align 8
8023 // CHECK13-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1
8024 // CHECK13-NEXT:    [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i64*
8025 // CHECK13-NEXT:    store i64 [[TMP1]], i64* [[TMP43]], align 8
8026 // CHECK13-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1
8027 // CHECK13-NEXT:    [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i64*
8028 // CHECK13-NEXT:    store i64 [[TMP1]], i64* [[TMP45]], align 8
8029 // CHECK13-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 1
8030 // CHECK13-NEXT:    store i64 8, i64* [[TMP46]], align 8
8031 // CHECK13-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1
8032 // CHECK13-NEXT:    store i8* null, i8** [[TMP47]], align 8
8033 // CHECK13-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2
8034 // CHECK13-NEXT:    [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32**
8035 // CHECK13-NEXT:    store i32* [[VLA]], i32** [[TMP49]], align 8
8036 // CHECK13-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2
8037 // CHECK13-NEXT:    [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i32**
8038 // CHECK13-NEXT:    store i32* [[VLA]], i32** [[TMP51]], align 8
8039 // CHECK13-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2
8040 // CHECK13-NEXT:    store i64 [[TMP35]], i64* [[TMP52]], align 8
8041 // CHECK13-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2
8042 // CHECK13-NEXT:    store i8* null, i8** [[TMP53]], align 8
8043 // CHECK13-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
8044 // CHECK13-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
8045 // CHECK13-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
8046 // CHECK13-NEXT:    [[TMP57:%.*]] = load i32, i32* [[N]], align 4
8047 // CHECK13-NEXT:    store i32 [[TMP57]], i32* [[DOTCAPTURE_EXPR_10]], align 4
8048 // CHECK13-NEXT:    [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
8049 // CHECK13-NEXT:    [[SUB12:%.*]] = sub nsw i32 [[TMP58]], 0
8050 // CHECK13-NEXT:    [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
8051 // CHECK13-NEXT:    [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1
8052 // CHECK13-NEXT:    store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4
8053 // CHECK13-NEXT:    [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
8054 // CHECK13-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP59]], 1
8055 // CHECK13-NEXT:    [[TMP60:%.*]] = zext i32 [[ADD15]] to i64
8056 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP60]])
8057 // CHECK13-NEXT:    [[TMP61:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, i32 3, i8** [[TMP54]], i8** [[TMP55]], i64* [[TMP56]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
8058 // CHECK13-NEXT:    [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0
8059 // CHECK13-NEXT:    br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
8060 // CHECK13:       omp_offload.failed16:
8061 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i64 [[TMP34]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
8062 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT17]]
8063 // CHECK13:       omp_offload.cont17:
8064 // CHECK13-NEXT:    [[TMP63:%.*]] = load i32, i32* [[M]], align 4
8065 // CHECK13-NEXT:    [[CONV18:%.*]] = bitcast i64* [[M_CASTED]] to i32*
8066 // CHECK13-NEXT:    store i32 [[TMP63]], i32* [[CONV18]], align 4
8067 // CHECK13-NEXT:    [[TMP64:%.*]] = load i64, i64* [[M_CASTED]], align 8
8068 // CHECK13-NEXT:    [[TMP65:%.*]] = load i32, i32* [[N]], align 4
8069 // CHECK13-NEXT:    [[CONV20:%.*]] = bitcast i64* [[N_CASTED19]] to i32*
8070 // CHECK13-NEXT:    store i32 [[TMP65]], i32* [[CONV20]], align 4
8071 // CHECK13-NEXT:    [[TMP66:%.*]] = load i64, i64* [[N_CASTED19]], align 8
8072 // CHECK13-NEXT:    [[TMP67:%.*]] = mul nuw i64 [[TMP1]], 4
8073 // CHECK13-NEXT:    [[TMP68:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
8074 // CHECK13-NEXT:    [[TMP69:%.*]] = bitcast i8** [[TMP68]] to i64*
8075 // CHECK13-NEXT:    store i64 [[TMP64]], i64* [[TMP69]], align 8
8076 // CHECK13-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
8077 // CHECK13-NEXT:    [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i64*
8078 // CHECK13-NEXT:    store i64 [[TMP64]], i64* [[TMP71]], align 8
8079 // CHECK13-NEXT:    [[TMP72:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0
8080 // CHECK13-NEXT:    store i64 4, i64* [[TMP72]], align 8
8081 // CHECK13-NEXT:    [[TMP73:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0
8082 // CHECK13-NEXT:    store i8* null, i8** [[TMP73]], align 8
8083 // CHECK13-NEXT:    [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1
8084 // CHECK13-NEXT:    [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i64*
8085 // CHECK13-NEXT:    store i64 [[TMP66]], i64* [[TMP75]], align 8
8086 // CHECK13-NEXT:    [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1
8087 // CHECK13-NEXT:    [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i64*
8088 // CHECK13-NEXT:    store i64 [[TMP66]], i64* [[TMP77]], align 8
8089 // CHECK13-NEXT:    [[TMP78:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 1
8090 // CHECK13-NEXT:    store i64 4, i64* [[TMP78]], align 8
8091 // CHECK13-NEXT:    [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1
8092 // CHECK13-NEXT:    store i8* null, i8** [[TMP79]], align 8
8093 // CHECK13-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 2
8094 // CHECK13-NEXT:    [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i64*
8095 // CHECK13-NEXT:    store i64 [[TMP1]], i64* [[TMP81]], align 8
8096 // CHECK13-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 2
8097 // CHECK13-NEXT:    [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i64*
8098 // CHECK13-NEXT:    store i64 [[TMP1]], i64* [[TMP83]], align 8
8099 // CHECK13-NEXT:    [[TMP84:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 2
8100 // CHECK13-NEXT:    store i64 8, i64* [[TMP84]], align 8
8101 // CHECK13-NEXT:    [[TMP85:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 2
8102 // CHECK13-NEXT:    store i8* null, i8** [[TMP85]], align 8
8103 // CHECK13-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 3
8104 // CHECK13-NEXT:    [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i32**
8105 // CHECK13-NEXT:    store i32* [[VLA]], i32** [[TMP87]], align 8
8106 // CHECK13-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 3
8107 // CHECK13-NEXT:    [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32**
8108 // CHECK13-NEXT:    store i32* [[VLA]], i32** [[TMP89]], align 8
8109 // CHECK13-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 3
8110 // CHECK13-NEXT:    store i64 [[TMP67]], i64* [[TMP90]], align 8
8111 // CHECK13-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 3
8112 // CHECK13-NEXT:    store i8* null, i8** [[TMP91]], align 8
8113 // CHECK13-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
8114 // CHECK13-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
8115 // CHECK13-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0
8116 // CHECK13-NEXT:    [[TMP95:%.*]] = load i32, i32* [[N]], align 4
8117 // CHECK13-NEXT:    store i32 [[TMP95]], i32* [[DOTCAPTURE_EXPR_26]], align 4
8118 // CHECK13-NEXT:    [[TMP96:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4
8119 // CHECK13-NEXT:    [[SUB28:%.*]] = sub nsw i32 [[TMP96]], 0
8120 // CHECK13-NEXT:    [[DIV29:%.*]] = sdiv i32 [[SUB28]], 1
8121 // CHECK13-NEXT:    [[SUB30:%.*]] = sub nsw i32 [[DIV29]], 1
8122 // CHECK13-NEXT:    store i32 [[SUB30]], i32* [[DOTCAPTURE_EXPR_27]], align 4
8123 // CHECK13-NEXT:    [[TMP97:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4
8124 // CHECK13-NEXT:    [[ADD31:%.*]] = add nsw i32 [[TMP97]], 1
8125 // CHECK13-NEXT:    [[TMP98:%.*]] = zext i32 [[ADD31]] to i64
8126 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP98]])
8127 // CHECK13-NEXT:    [[TMP99:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, i32 4, i8** [[TMP92]], i8** [[TMP93]], i64* [[TMP94]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
8128 // CHECK13-NEXT:    [[TMP100:%.*]] = icmp ne i32 [[TMP99]], 0
8129 // CHECK13-NEXT:    br i1 [[TMP100]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
8130 // CHECK13:       omp_offload.failed32:
8131 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i64 [[TMP64]], i64 [[TMP66]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
8132 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT33]]
8133 // CHECK13:       omp_offload.cont33:
8134 // CHECK13-NEXT:    [[TMP101:%.*]] = load i32, i32* [[N]], align 4
8135 // CHECK13-NEXT:    [[CONV35:%.*]] = bitcast i64* [[N_CASTED34]] to i32*
8136 // CHECK13-NEXT:    store i32 [[TMP101]], i32* [[CONV35]], align 4
8137 // CHECK13-NEXT:    [[TMP102:%.*]] = load i64, i64* [[N_CASTED34]], align 8
8138 // CHECK13-NEXT:    [[TMP103:%.*]] = mul nuw i64 [[TMP1]], 4
8139 // CHECK13-NEXT:    [[TMP104:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0
8140 // CHECK13-NEXT:    [[TMP105:%.*]] = bitcast i8** [[TMP104]] to i64*
8141 // CHECK13-NEXT:    store i64 [[TMP102]], i64* [[TMP105]], align 8
8142 // CHECK13-NEXT:    [[TMP106:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0
8143 // CHECK13-NEXT:    [[TMP107:%.*]] = bitcast i8** [[TMP106]] to i64*
8144 // CHECK13-NEXT:    store i64 [[TMP102]], i64* [[TMP107]], align 8
8145 // CHECK13-NEXT:    [[TMP108:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0
8146 // CHECK13-NEXT:    store i64 4, i64* [[TMP108]], align 8
8147 // CHECK13-NEXT:    [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 0
8148 // CHECK13-NEXT:    store i8* null, i8** [[TMP109]], align 8
8149 // CHECK13-NEXT:    [[TMP110:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 1
8150 // CHECK13-NEXT:    [[TMP111:%.*]] = bitcast i8** [[TMP110]] to i64*
8151 // CHECK13-NEXT:    store i64 [[TMP1]], i64* [[TMP111]], align 8
8152 // CHECK13-NEXT:    [[TMP112:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 1
8153 // CHECK13-NEXT:    [[TMP113:%.*]] = bitcast i8** [[TMP112]] to i64*
8154 // CHECK13-NEXT:    store i64 [[TMP1]], i64* [[TMP113]], align 8
8155 // CHECK13-NEXT:    [[TMP114:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 1
8156 // CHECK13-NEXT:    store i64 8, i64* [[TMP114]], align 8
8157 // CHECK13-NEXT:    [[TMP115:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 1
8158 // CHECK13-NEXT:    store i8* null, i8** [[TMP115]], align 8
8159 // CHECK13-NEXT:    [[TMP116:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 2
8160 // CHECK13-NEXT:    [[TMP117:%.*]] = bitcast i8** [[TMP116]] to i32**
8161 // CHECK13-NEXT:    store i32* [[VLA]], i32** [[TMP117]], align 8
8162 // CHECK13-NEXT:    [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 2
8163 // CHECK13-NEXT:    [[TMP119:%.*]] = bitcast i8** [[TMP118]] to i32**
8164 // CHECK13-NEXT:    store i32* [[VLA]], i32** [[TMP119]], align 8
8165 // CHECK13-NEXT:    [[TMP120:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 2
8166 // CHECK13-NEXT:    store i64 [[TMP103]], i64* [[TMP120]], align 8
8167 // CHECK13-NEXT:    [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 2
8168 // CHECK13-NEXT:    store i8* null, i8** [[TMP121]], align 8
8169 // CHECK13-NEXT:    [[TMP122:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0
8170 // CHECK13-NEXT:    [[TMP123:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0
8171 // CHECK13-NEXT:    [[TMP124:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0
8172 // CHECK13-NEXT:    [[TMP125:%.*]] = load i32, i32* [[N]], align 4
8173 // CHECK13-NEXT:    store i32 [[TMP125]], i32* [[DOTCAPTURE_EXPR_41]], align 4
8174 // CHECK13-NEXT:    [[TMP126:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4
8175 // CHECK13-NEXT:    [[SUB43:%.*]] = sub nsw i32 [[TMP126]], 0
8176 // CHECK13-NEXT:    [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1
8177 // CHECK13-NEXT:    [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 1
8178 // CHECK13-NEXT:    store i32 [[SUB45]], i32* [[DOTCAPTURE_EXPR_42]], align 4
8179 // CHECK13-NEXT:    [[TMP127:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_42]], align 4
8180 // CHECK13-NEXT:    [[ADD46:%.*]] = add nsw i32 [[TMP127]], 1
8181 // CHECK13-NEXT:    [[TMP128:%.*]] = zext i32 [[ADD46]] to i64
8182 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP128]])
8183 // CHECK13-NEXT:    [[TMP129:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, i32 3, i8** [[TMP122]], i8** [[TMP123]], i64* [[TMP124]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
8184 // CHECK13-NEXT:    [[TMP130:%.*]] = icmp ne i32 [[TMP129]], 0
8185 // CHECK13-NEXT:    br i1 [[TMP130]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]]
8186 // CHECK13:       omp_offload.failed47:
8187 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i64 [[TMP102]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
8188 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT48]]
8189 // CHECK13:       omp_offload.cont48:
8190 // CHECK13-NEXT:    [[TMP131:%.*]] = load i32, i32* [[M]], align 4
8191 // CHECK13-NEXT:    [[CONV50:%.*]] = bitcast i64* [[M_CASTED49]] to i32*
8192 // CHECK13-NEXT:    store i32 [[TMP131]], i32* [[CONV50]], align 4
8193 // CHECK13-NEXT:    [[TMP132:%.*]] = load i64, i64* [[M_CASTED49]], align 8
8194 // CHECK13-NEXT:    [[TMP133:%.*]] = load i32, i32* [[N]], align 4
8195 // CHECK13-NEXT:    [[CONV52:%.*]] = bitcast i64* [[N_CASTED51]] to i32*
8196 // CHECK13-NEXT:    store i32 [[TMP133]], i32* [[CONV52]], align 4
8197 // CHECK13-NEXT:    [[TMP134:%.*]] = load i64, i64* [[N_CASTED51]], align 8
8198 // CHECK13-NEXT:    [[TMP135:%.*]] = mul nuw i64 [[TMP1]], 4
8199 // CHECK13-NEXT:    [[TMP136:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0
8200 // CHECK13-NEXT:    [[TMP137:%.*]] = bitcast i8** [[TMP136]] to i64*
8201 // CHECK13-NEXT:    store i64 [[TMP132]], i64* [[TMP137]], align 8
8202 // CHECK13-NEXT:    [[TMP138:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0
8203 // CHECK13-NEXT:    [[TMP139:%.*]] = bitcast i8** [[TMP138]] to i64*
8204 // CHECK13-NEXT:    store i64 [[TMP132]], i64* [[TMP139]], align 8
8205 // CHECK13-NEXT:    [[TMP140:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0
8206 // CHECK13-NEXT:    store i64 4, i64* [[TMP140]], align 8
8207 // CHECK13-NEXT:    [[TMP141:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 0
8208 // CHECK13-NEXT:    store i8* null, i8** [[TMP141]], align 8
8209 // CHECK13-NEXT:    [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 1
8210 // CHECK13-NEXT:    [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i64*
8211 // CHECK13-NEXT:    store i64 [[TMP134]], i64* [[TMP143]], align 8
8212 // CHECK13-NEXT:    [[TMP144:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 1
8213 // CHECK13-NEXT:    [[TMP145:%.*]] = bitcast i8** [[TMP144]] to i64*
8214 // CHECK13-NEXT:    store i64 [[TMP134]], i64* [[TMP145]], align 8
8215 // CHECK13-NEXT:    [[TMP146:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 1
8216 // CHECK13-NEXT:    store i64 4, i64* [[TMP146]], align 8
8217 // CHECK13-NEXT:    [[TMP147:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 1
8218 // CHECK13-NEXT:    store i8* null, i8** [[TMP147]], align 8
8219 // CHECK13-NEXT:    [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 2
8220 // CHECK13-NEXT:    [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i64*
8221 // CHECK13-NEXT:    store i64 [[TMP1]], i64* [[TMP149]], align 8
8222 // CHECK13-NEXT:    [[TMP150:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 2
8223 // CHECK13-NEXT:    [[TMP151:%.*]] = bitcast i8** [[TMP150]] to i64*
8224 // CHECK13-NEXT:    store i64 [[TMP1]], i64* [[TMP151]], align 8
8225 // CHECK13-NEXT:    [[TMP152:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 2
8226 // CHECK13-NEXT:    store i64 8, i64* [[TMP152]], align 8
8227 // CHECK13-NEXT:    [[TMP153:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 2
8228 // CHECK13-NEXT:    store i8* null, i8** [[TMP153]], align 8
8229 // CHECK13-NEXT:    [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 3
8230 // CHECK13-NEXT:    [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32**
8231 // CHECK13-NEXT:    store i32* [[VLA]], i32** [[TMP155]], align 8
8232 // CHECK13-NEXT:    [[TMP156:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 3
8233 // CHECK13-NEXT:    [[TMP157:%.*]] = bitcast i8** [[TMP156]] to i32**
8234 // CHECK13-NEXT:    store i32* [[VLA]], i32** [[TMP157]], align 8
8235 // CHECK13-NEXT:    [[TMP158:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 3
8236 // CHECK13-NEXT:    store i64 [[TMP135]], i64* [[TMP158]], align 8
8237 // CHECK13-NEXT:    [[TMP159:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 3
8238 // CHECK13-NEXT:    store i8* null, i8** [[TMP159]], align 8
8239 // CHECK13-NEXT:    [[TMP160:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0
8240 // CHECK13-NEXT:    [[TMP161:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0
8241 // CHECK13-NEXT:    [[TMP162:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0
8242 // CHECK13-NEXT:    [[TMP163:%.*]] = load i32, i32* [[N]], align 4
8243 // CHECK13-NEXT:    store i32 [[TMP163]], i32* [[DOTCAPTURE_EXPR_58]], align 4
8244 // CHECK13-NEXT:    [[TMP164:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_58]], align 4
8245 // CHECK13-NEXT:    [[SUB60:%.*]] = sub nsw i32 [[TMP164]], 0
8246 // CHECK13-NEXT:    [[DIV61:%.*]] = sdiv i32 [[SUB60]], 1
8247 // CHECK13-NEXT:    [[SUB62:%.*]] = sub nsw i32 [[DIV61]], 1
8248 // CHECK13-NEXT:    store i32 [[SUB62]], i32* [[DOTCAPTURE_EXPR_59]], align 4
8249 // CHECK13-NEXT:    [[TMP165:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_59]], align 4
8250 // CHECK13-NEXT:    [[ADD63:%.*]] = add nsw i32 [[TMP165]], 1
8251 // CHECK13-NEXT:    [[TMP166:%.*]] = zext i32 [[ADD63]] to i64
8252 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP166]])
8253 // CHECK13-NEXT:    [[TMP167:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, i32 4, i8** [[TMP160]], i8** [[TMP161]], i64* [[TMP162]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
8254 // CHECK13-NEXT:    [[TMP168:%.*]] = icmp ne i32 [[TMP167]], 0
8255 // CHECK13-NEXT:    br i1 [[TMP168]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]]
8256 // CHECK13:       omp_offload.failed64:
8257 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i64 [[TMP132]], i64 [[TMP134]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
8258 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT65]]
8259 // CHECK13:       omp_offload.cont65:
8260 // CHECK13-NEXT:    [[TMP169:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
8261 // CHECK13-NEXT:    [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP169]])
8262 // CHECK13-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
8263 // CHECK13-NEXT:    [[TMP170:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
8264 // CHECK13-NEXT:    call void @llvm.stackrestore(i8* [[TMP170]])
8265 // CHECK13-NEXT:    [[TMP171:%.*]] = load i32, i32* [[RETVAL]], align 4
8266 // CHECK13-NEXT:    ret i32 [[TMP171]]
8267 //
8268 //
8269 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148
8270 // CHECK13-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
8271 // CHECK13-NEXT:  entry:
8272 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
8273 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
8274 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
8275 // CHECK13-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
8276 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
8277 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
8278 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
8279 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
8280 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
8281 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
8282 // CHECK13-NEXT:    ret void
8283 //
8284 //
8285 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined.
8286 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
8287 // CHECK13-NEXT:  entry:
8288 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8289 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8290 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
8291 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
8292 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
8293 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8294 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8295 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8296 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8297 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
8298 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8299 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8300 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8301 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8302 // CHECK13-NEXT:    [[I3:%.*]] = alloca i32, align 4
8303 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8304 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8305 // CHECK13-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
8306 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
8307 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
8308 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
8309 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
8310 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
8311 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
8312 // CHECK13-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
8313 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8314 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
8315 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8316 // CHECK13-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
8317 // CHECK13-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8318 // CHECK13-NEXT:    store i32 0, i32* [[I]], align 4
8319 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8320 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
8321 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8322 // CHECK13:       omp.precond.then:
8323 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8324 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8325 // CHECK13-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
8326 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8327 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8328 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8329 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
8330 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8331 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8332 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8333 // CHECK13-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
8334 // CHECK13-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8335 // CHECK13:       cond.true:
8336 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8337 // CHECK13-NEXT:    br label [[COND_END:%.*]]
8338 // CHECK13:       cond.false:
8339 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8340 // CHECK13-NEXT:    br label [[COND_END]]
8341 // CHECK13:       cond.end:
8342 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
8343 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8344 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8345 // CHECK13-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
8346 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8347 // CHECK13:       omp.inner.for.cond:
8348 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8349 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8350 // CHECK13-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
8351 // CHECK13-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8352 // CHECK13:       omp.inner.for.body:
8353 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8354 // CHECK13-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
8355 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8356 // CHECK13-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
8357 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])
8358 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8359 // CHECK13:       omp.inner.for.inc:
8360 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8361 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8362 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
8363 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
8364 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
8365 // CHECK13:       omp.inner.for.end:
8366 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8367 // CHECK13:       omp.loop.exit:
8368 // CHECK13-NEXT:    [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8369 // CHECK13-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
8370 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
8371 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
8372 // CHECK13:       omp.precond.end:
8373 // CHECK13-NEXT:    ret void
8374 //
8375 //
8376 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..1
8377 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
8378 // CHECK13-NEXT:  entry:
8379 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8380 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8381 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
8382 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
8383 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
8384 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
8385 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
8386 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8387 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8388 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8389 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8390 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
8391 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8392 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8393 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8394 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8395 // CHECK13-NEXT:    [[I4:%.*]] = alloca i32, align 4
8396 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8397 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8398 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8399 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8400 // CHECK13-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
8401 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
8402 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
8403 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
8404 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
8405 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
8406 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
8407 // CHECK13-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
8408 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8409 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
8410 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8411 // CHECK13-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
8412 // CHECK13-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8413 // CHECK13-NEXT:    store i32 0, i32* [[I]], align 4
8414 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8415 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
8416 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8417 // CHECK13:       omp.precond.then:
8418 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
8419 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8420 // CHECK13-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
8421 // CHECK13-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8422 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
8423 // CHECK13-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8424 // CHECK13-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
8425 // CHECK13-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
8426 // CHECK13-NEXT:    store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
8427 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8428 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8429 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8430 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
8431 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8432 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8433 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8434 // CHECK13-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
8435 // CHECK13-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8436 // CHECK13:       cond.true:
8437 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8438 // CHECK13-NEXT:    br label [[COND_END:%.*]]
8439 // CHECK13:       cond.false:
8440 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8441 // CHECK13-NEXT:    br label [[COND_END]]
8442 // CHECK13:       cond.end:
8443 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
8444 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8445 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8446 // CHECK13-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
8447 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8448 // CHECK13:       omp.inner.for.cond:
8449 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8450 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8451 // CHECK13-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
8452 // CHECK13-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8453 // CHECK13:       omp.inner.for.body:
8454 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8455 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
8456 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8457 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4
8458 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I4]], align 4
8459 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
8460 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
8461 // CHECK13-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
8462 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8463 // CHECK13:       omp.body.continue:
8464 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8465 // CHECK13:       omp.inner.for.inc:
8466 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8467 // CHECK13-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
8468 // CHECK13-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
8469 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
8470 // CHECK13:       omp.inner.for.end:
8471 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8472 // CHECK13:       omp.loop.exit:
8473 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8474 // CHECK13-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
8475 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
8476 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
8477 // CHECK13:       omp.precond.end:
8478 // CHECK13-NEXT:    ret void
8479 //
8480 //
8481 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153
8482 // CHECK13-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
8483 // CHECK13-NEXT:  entry:
8484 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
8485 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
8486 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
8487 // CHECK13-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
8488 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
8489 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
8490 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
8491 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
8492 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
8493 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
8494 // CHECK13-NEXT:    ret void
8495 //
8496 //
8497 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..2
8498 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
8499 // CHECK13-NEXT:  entry:
8500 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8501 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8502 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
8503 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
8504 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
8505 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8506 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8507 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8508 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8509 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
8510 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8511 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8512 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8513 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8514 // CHECK13-NEXT:    [[I3:%.*]] = alloca i32, align 4
8515 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8516 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8517 // CHECK13-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
8518 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
8519 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
8520 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
8521 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
8522 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
8523 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
8524 // CHECK13-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
8525 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8526 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
8527 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8528 // CHECK13-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
8529 // CHECK13-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8530 // CHECK13-NEXT:    store i32 0, i32* [[I]], align 4
8531 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8532 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
8533 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8534 // CHECK13:       omp.precond.then:
8535 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8536 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8537 // CHECK13-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
8538 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8539 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8540 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8541 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
8542 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8543 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8544 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8545 // CHECK13-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
8546 // CHECK13-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8547 // CHECK13:       cond.true:
8548 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8549 // CHECK13-NEXT:    br label [[COND_END:%.*]]
8550 // CHECK13:       cond.false:
8551 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8552 // CHECK13-NEXT:    br label [[COND_END]]
8553 // CHECK13:       cond.end:
8554 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
8555 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8556 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8557 // CHECK13-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
8558 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8559 // CHECK13:       omp.inner.for.cond:
8560 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8561 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8562 // CHECK13-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
8563 // CHECK13-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8564 // CHECK13:       omp.inner.for.body:
8565 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8566 // CHECK13-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
8567 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8568 // CHECK13-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
8569 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])
8570 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8571 // CHECK13:       omp.inner.for.inc:
8572 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8573 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8574 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
8575 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
8576 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
8577 // CHECK13:       omp.inner.for.end:
8578 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8579 // CHECK13:       omp.loop.exit:
8580 // CHECK13-NEXT:    [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8581 // CHECK13-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
8582 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
8583 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
8584 // CHECK13:       omp.precond.end:
8585 // CHECK13-NEXT:    ret void
8586 //
8587 //
8588 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..3
8589 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
8590 // CHECK13-NEXT:  entry:
8591 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8592 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8593 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
8594 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
8595 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
8596 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
8597 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
8598 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8599 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8600 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8601 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8602 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
8603 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8604 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8605 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8606 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8607 // CHECK13-NEXT:    [[I4:%.*]] = alloca i32, align 4
8608 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8609 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8610 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8611 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8612 // CHECK13-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
8613 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
8614 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
8615 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
8616 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
8617 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
8618 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
8619 // CHECK13-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
8620 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8621 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
8622 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8623 // CHECK13-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
8624 // CHECK13-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8625 // CHECK13-NEXT:    store i32 0, i32* [[I]], align 4
8626 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8627 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
8628 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8629 // CHECK13:       omp.precond.then:
8630 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
8631 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8632 // CHECK13-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
8633 // CHECK13-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8634 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
8635 // CHECK13-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8636 // CHECK13-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
8637 // CHECK13-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
8638 // CHECK13-NEXT:    store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
8639 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8640 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8641 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8642 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
8643 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8644 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8645 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8646 // CHECK13-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
8647 // CHECK13-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8648 // CHECK13:       cond.true:
8649 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8650 // CHECK13-NEXT:    br label [[COND_END:%.*]]
8651 // CHECK13:       cond.false:
8652 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8653 // CHECK13-NEXT:    br label [[COND_END]]
8654 // CHECK13:       cond.end:
8655 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
8656 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8657 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8658 // CHECK13-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
8659 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8660 // CHECK13:       omp.inner.for.cond:
8661 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8662 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8663 // CHECK13-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
8664 // CHECK13-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8665 // CHECK13:       omp.inner.for.body:
8666 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8667 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
8668 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8669 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4
8670 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I4]], align 4
8671 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
8672 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
8673 // CHECK13-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
8674 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8675 // CHECK13:       omp.body.continue:
8676 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8677 // CHECK13:       omp.inner.for.inc:
8678 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8679 // CHECK13-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
8680 // CHECK13-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
8681 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
8682 // CHECK13:       omp.inner.for.end:
8683 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8684 // CHECK13:       omp.loop.exit:
8685 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8686 // CHECK13-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
8687 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
8688 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
8689 // CHECK13:       omp.precond.end:
8690 // CHECK13-NEXT:    ret void
8691 //
8692 //
8693 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158
8694 // CHECK13-SAME: (i64 [[M:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
8695 // CHECK13-NEXT:  entry:
8696 // CHECK13-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8
8697 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
8698 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
8699 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
8700 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8701 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
8702 // CHECK13-NEXT:    store i64 [[M]], i64* [[M_ADDR]], align 8
8703 // CHECK13-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
8704 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
8705 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
8706 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
8707 // CHECK13-NEXT:    [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
8708 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
8709 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
8710 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
8711 // CHECK13-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
8712 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8713 // CHECK13-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
8714 // CHECK13-NEXT:    store i32 [[TMP3]], i32* [[CONV2]], align 4
8715 // CHECK13-NEXT:    [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
8716 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]])
8717 // CHECK13-NEXT:    ret void
8718 //
8719 //
8720 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..5
8721 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
8722 // CHECK13-NEXT:  entry:
8723 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8724 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8725 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
8726 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
8727 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
8728 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
8729 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8730 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8731 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8732 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
8733 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
8734 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8735 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8736 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8737 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8738 // CHECK13-NEXT:    [[I4:%.*]] = alloca i32, align 4
8739 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
8740 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8741 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8742 // CHECK13-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
8743 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
8744 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
8745 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
8746 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
8747 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
8748 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
8749 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
8750 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
8751 // CHECK13-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8752 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8753 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
8754 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8755 // CHECK13-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
8756 // CHECK13-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
8757 // CHECK13-NEXT:    store i32 0, i32* [[I]], align 4
8758 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8759 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
8760 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8761 // CHECK13:       omp.precond.then:
8762 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
8763 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8764 // CHECK13-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
8765 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8766 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8767 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[CONV]], align 8
8768 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8769 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
8770 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])
8771 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8772 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8773 // CHECK13-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
8774 // CHECK13-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8775 // CHECK13:       cond.true:
8776 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8777 // CHECK13-NEXT:    br label [[COND_END:%.*]]
8778 // CHECK13:       cond.false:
8779 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8780 // CHECK13-NEXT:    br label [[COND_END]]
8781 // CHECK13:       cond.end:
8782 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
8783 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
8784 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8785 // CHECK13-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
8786 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8787 // CHECK13:       omp.inner.for.cond:
8788 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8789 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8790 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP16]], 1
8791 // CHECK13-NEXT:    [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]]
8792 // CHECK13-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8793 // CHECK13:       omp.inner.for.body:
8794 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8795 // CHECK13-NEXT:    [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
8796 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8797 // CHECK13-NEXT:    [[TMP20:%.*]] = zext i32 [[TMP19]] to i64
8798 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, i32* [[CONV]], align 8
8799 // CHECK13-NEXT:    [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
8800 // CHECK13-NEXT:    store i32 [[TMP21]], i32* [[CONV7]], align 4
8801 // CHECK13-NEXT:    [[TMP22:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
8802 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP22]])
8803 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8804 // CHECK13:       omp.inner.for.inc:
8805 // CHECK13-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8806 // CHECK13-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8807 // CHECK13-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
8808 // CHECK13-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
8809 // CHECK13-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8810 // CHECK13-NEXT:    [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8811 // CHECK13-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]
8812 // CHECK13-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4
8813 // CHECK13-NEXT:    [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8814 // CHECK13-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
8815 // CHECK13-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP27]], [[TMP28]]
8816 // CHECK13-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4
8817 // CHECK13-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8818 // CHECK13-NEXT:    [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8819 // CHECK13-NEXT:    [[CMP11:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]]
8820 // CHECK13-NEXT:    br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]]
8821 // CHECK13:       cond.true12:
8822 // CHECK13-NEXT:    [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8823 // CHECK13-NEXT:    br label [[COND_END14:%.*]]
8824 // CHECK13:       cond.false13:
8825 // CHECK13-NEXT:    [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
8826 // CHECK13-NEXT:    br label [[COND_END14]]
8827 // CHECK13:       cond.end14:
8828 // CHECK13-NEXT:    [[COND15:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE12]] ], [ [[TMP32]], [[COND_FALSE13]] ]
8829 // CHECK13-NEXT:    store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4
8830 // CHECK13-NEXT:    [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
8831 // CHECK13-NEXT:    store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4
8832 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
8833 // CHECK13:       omp.inner.for.end:
8834 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8835 // CHECK13:       omp.loop.exit:
8836 // CHECK13-NEXT:    [[TMP34:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8837 // CHECK13-NEXT:    [[TMP35:%.*]] = load i32, i32* [[TMP34]], align 4
8838 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP35]])
8839 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
8840 // CHECK13:       omp.precond.end:
8841 // CHECK13-NEXT:    ret void
8842 //
8843 //
8844 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..6
8845 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
8846 // CHECK13-NEXT:  entry:
8847 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8848 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8849 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
8850 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
8851 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
8852 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
8853 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
8854 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
8855 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8856 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8857 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8858 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
8859 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
8860 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8861 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8862 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8863 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8864 // CHECK13-NEXT:    [[I6:%.*]] = alloca i32, align 4
8865 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8866 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8867 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8868 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8869 // CHECK13-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
8870 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
8871 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
8872 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
8873 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
8874 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
8875 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
8876 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
8877 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
8878 // CHECK13-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
8879 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8880 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
8881 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8882 // CHECK13-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
8883 // CHECK13-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
8884 // CHECK13-NEXT:    store i32 0, i32* [[I]], align 4
8885 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
8886 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
8887 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8888 // CHECK13:       omp.precond.then:
8889 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
8890 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8891 // CHECK13-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
8892 // CHECK13-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
8893 // CHECK13-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
8894 // CHECK13-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
8895 // CHECK13-NEXT:    [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32
8896 // CHECK13-NEXT:    store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4
8897 // CHECK13-NEXT:    store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
8898 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
8899 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
8900 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8901 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
8902 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
8903 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8904 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8905 // CHECK13-NEXT:    [[CMP7:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
8906 // CHECK13-NEXT:    br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8907 // CHECK13:       cond.true:
8908 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
8909 // CHECK13-NEXT:    br label [[COND_END:%.*]]
8910 // CHECK13:       cond.false:
8911 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8912 // CHECK13-NEXT:    br label [[COND_END]]
8913 // CHECK13:       cond.end:
8914 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
8915 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
8916 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
8917 // CHECK13-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
8918 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8919 // CHECK13:       omp.inner.for.cond:
8920 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8921 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
8922 // CHECK13-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
8923 // CHECK13-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8924 // CHECK13:       omp.inner.for.body:
8925 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8926 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
8927 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8928 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I6]], align 4
8929 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I6]], align 4
8930 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
8931 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
8932 // CHECK13-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
8933 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8934 // CHECK13:       omp.body.continue:
8935 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8936 // CHECK13:       omp.inner.for.inc:
8937 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
8938 // CHECK13-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1
8939 // CHECK13-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
8940 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
8941 // CHECK13:       omp.inner.for.end:
8942 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8943 // CHECK13:       omp.loop.exit:
8944 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
8945 // CHECK13-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
8946 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
8947 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
8948 // CHECK13:       omp.precond.end:
8949 // CHECK13-NEXT:    ret void
8950 //
8951 //
8952 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163
8953 // CHECK13-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
8954 // CHECK13-NEXT:  entry:
8955 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
8956 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
8957 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
8958 // CHECK13-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
8959 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
8960 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
8961 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
8962 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
8963 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
8964 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
8965 // CHECK13-NEXT:    ret void
8966 //
8967 //
8968 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..8
8969 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
8970 // CHECK13-NEXT:  entry:
8971 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
8972 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
8973 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
8974 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
8975 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
8976 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8977 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8978 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8979 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8980 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
8981 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8982 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8983 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8984 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8985 // CHECK13-NEXT:    [[I3:%.*]] = alloca i32, align 4
8986 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
8987 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
8988 // CHECK13-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
8989 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
8990 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
8991 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
8992 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
8993 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
8994 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
8995 // CHECK13-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
8996 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
8997 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
8998 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8999 // CHECK13-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
9000 // CHECK13-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
9001 // CHECK13-NEXT:    store i32 0, i32* [[I]], align 4
9002 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9003 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
9004 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
9005 // CHECK13:       omp.precond.then:
9006 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9007 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9008 // CHECK13-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
9009 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9010 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9011 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9012 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
9013 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9014 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9015 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9016 // CHECK13-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
9017 // CHECK13-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9018 // CHECK13:       cond.true:
9019 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9020 // CHECK13-NEXT:    br label [[COND_END:%.*]]
9021 // CHECK13:       cond.false:
9022 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9023 // CHECK13-NEXT:    br label [[COND_END]]
9024 // CHECK13:       cond.end:
9025 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
9026 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9027 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9028 // CHECK13-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
9029 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9030 // CHECK13:       omp.inner.for.cond:
9031 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9032 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9033 // CHECK13-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
9034 // CHECK13-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9035 // CHECK13:       omp.inner.for.body:
9036 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9037 // CHECK13-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
9038 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9039 // CHECK13-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
9040 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])
9041 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9042 // CHECK13:       omp.inner.for.inc:
9043 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9044 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9045 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
9046 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
9047 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
9048 // CHECK13:       omp.inner.for.end:
9049 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9050 // CHECK13:       omp.loop.exit:
9051 // CHECK13-NEXT:    [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9052 // CHECK13-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
9053 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
9054 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
9055 // CHECK13:       omp.precond.end:
9056 // CHECK13-NEXT:    ret void
9057 //
9058 //
9059 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..9
9060 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
9061 // CHECK13-NEXT:  entry:
9062 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9063 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9064 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
9065 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
9066 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
9067 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
9068 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
9069 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9070 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9071 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
9072 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
9073 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9074 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
9075 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
9076 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9077 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9078 // CHECK13-NEXT:    [[I4:%.*]] = alloca i32, align 4
9079 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9080 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9081 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9082 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9083 // CHECK13-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
9084 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
9085 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
9086 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
9087 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
9088 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
9089 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
9090 // CHECK13-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
9091 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9092 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
9093 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
9094 // CHECK13-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
9095 // CHECK13-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
9096 // CHECK13-NEXT:    store i32 0, i32* [[I]], align 4
9097 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9098 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
9099 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
9100 // CHECK13:       omp.precond.then:
9101 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
9102 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9103 // CHECK13-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
9104 // CHECK13-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9105 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
9106 // CHECK13-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9107 // CHECK13-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
9108 // CHECK13-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
9109 // CHECK13-NEXT:    store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
9110 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9111 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9112 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9113 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9114 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9115 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
9116 // CHECK13-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1)
9117 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
9118 // CHECK13:       omp.dispatch.cond:
9119 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9120 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
9121 // CHECK13-NEXT:    [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
9122 // CHECK13-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
9123 // CHECK13-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
9124 // CHECK13:       omp.dispatch.body:
9125 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9126 // CHECK13-NEXT:    store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
9127 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9128 // CHECK13:       omp.inner.for.cond:
9129 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
9130 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14
9131 // CHECK13-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
9132 // CHECK13-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9133 // CHECK13:       omp.inner.for.body:
9134 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
9135 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
9136 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9137 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !14
9138 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !14
9139 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64
9140 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
9141 // CHECK13-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !14
9142 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
9143 // CHECK13:       omp.body.continue:
9144 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9145 // CHECK13:       omp.inner.for.inc:
9146 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
9147 // CHECK13-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1
9148 // CHECK13-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
9149 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
9150 // CHECK13:       omp.inner.for.end:
9151 // CHECK13-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
9152 // CHECK13:       omp.dispatch.inc:
9153 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND]]
9154 // CHECK13:       omp.dispatch.end:
9155 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
9156 // CHECK13:       omp.precond.end:
9157 // CHECK13-NEXT:    ret void
9158 //
9159 //
9160 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168
9161 // CHECK13-SAME: (i64 [[M:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
9162 // CHECK13-NEXT:  entry:
9163 // CHECK13-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8
9164 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
9165 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
9166 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
9167 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
9168 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
9169 // CHECK13-NEXT:    store i64 [[M]], i64* [[M_ADDR]], align 8
9170 // CHECK13-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
9171 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
9172 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
9173 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
9174 // CHECK13-NEXT:    [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
9175 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
9176 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
9177 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
9178 // CHECK13-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
9179 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9180 // CHECK13-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
9181 // CHECK13-NEXT:    store i32 [[TMP3]], i32* [[CONV2]], align 4
9182 // CHECK13-NEXT:    [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
9183 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]])
9184 // CHECK13-NEXT:    ret void
9185 //
9186 //
9187 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..11
9188 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
9189 // CHECK13-NEXT:  entry:
9190 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9191 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9192 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
9193 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
9194 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
9195 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
9196 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9197 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9198 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
9199 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
9200 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9201 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9202 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9203 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9204 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9205 // CHECK13-NEXT:    [[I4:%.*]] = alloca i32, align 4
9206 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
9207 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9208 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9209 // CHECK13-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
9210 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
9211 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
9212 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
9213 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
9214 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
9215 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
9216 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
9217 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
9218 // CHECK13-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
9219 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9220 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
9221 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
9222 // CHECK13-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
9223 // CHECK13-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
9224 // CHECK13-NEXT:    store i32 0, i32* [[I]], align 4
9225 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9226 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
9227 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
9228 // CHECK13:       omp.precond.then:
9229 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9230 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
9231 // CHECK13-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
9232 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9233 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9234 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9235 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
9236 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9237 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9238 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
9239 // CHECK13-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
9240 // CHECK13-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9241 // CHECK13:       cond.true:
9242 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
9243 // CHECK13-NEXT:    br label [[COND_END:%.*]]
9244 // CHECK13:       cond.false:
9245 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9246 // CHECK13-NEXT:    br label [[COND_END]]
9247 // CHECK13:       cond.end:
9248 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
9249 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9250 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9251 // CHECK13-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
9252 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9253 // CHECK13:       omp.inner.for.cond:
9254 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9255 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9256 // CHECK13-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
9257 // CHECK13-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9258 // CHECK13:       omp.inner.for.body:
9259 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9260 // CHECK13-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
9261 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9262 // CHECK13-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
9263 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, i32* [[CONV]], align 8
9264 // CHECK13-NEXT:    [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
9265 // CHECK13-NEXT:    store i32 [[TMP20]], i32* [[CONV7]], align 4
9266 // CHECK13-NEXT:    [[TMP21:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
9267 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP21]])
9268 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9269 // CHECK13:       omp.inner.for.inc:
9270 // CHECK13-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9271 // CHECK13-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9272 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
9273 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
9274 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
9275 // CHECK13:       omp.inner.for.end:
9276 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9277 // CHECK13:       omp.loop.exit:
9278 // CHECK13-NEXT:    [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9279 // CHECK13-NEXT:    [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4
9280 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]])
9281 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
9282 // CHECK13:       omp.precond.end:
9283 // CHECK13-NEXT:    ret void
9284 //
9285 //
9286 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..12
9287 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
9288 // CHECK13-NEXT:  entry:
9289 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9290 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9291 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
9292 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
9293 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
9294 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
9295 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
9296 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
9297 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9298 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9299 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
9300 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
9301 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9302 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
9303 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
9304 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9305 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9306 // CHECK13-NEXT:    [[I6:%.*]] = alloca i32, align 4
9307 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9308 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9309 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9310 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9311 // CHECK13-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
9312 // CHECK13-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
9313 // CHECK13-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
9314 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
9315 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
9316 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
9317 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
9318 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
9319 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
9320 // CHECK13-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
9321 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9322 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
9323 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
9324 // CHECK13-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
9325 // CHECK13-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
9326 // CHECK13-NEXT:    store i32 0, i32* [[I]], align 4
9327 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
9328 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
9329 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
9330 // CHECK13:       omp.precond.then:
9331 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
9332 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
9333 // CHECK13-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
9334 // CHECK13-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9335 // CHECK13-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
9336 // CHECK13-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9337 // CHECK13-NEXT:    [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32
9338 // CHECK13-NEXT:    store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4
9339 // CHECK13-NEXT:    store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
9340 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9341 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9342 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[CONV]], align 8
9343 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9344 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9345 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9346 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
9347 // CHECK13-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 1073741859, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]])
9348 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
9349 // CHECK13:       omp.dispatch.cond:
9350 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9351 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
9352 // CHECK13-NEXT:    [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
9353 // CHECK13-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0
9354 // CHECK13-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
9355 // CHECK13:       omp.dispatch.body:
9356 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9357 // CHECK13-NEXT:    store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4
9358 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9359 // CHECK13:       omp.inner.for.cond:
9360 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
9361 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !17
9362 // CHECK13-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
9363 // CHECK13-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9364 // CHECK13:       omp.inner.for.body:
9365 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
9366 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
9367 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9368 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !17
9369 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !17
9370 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64
9371 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
9372 // CHECK13-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !17
9373 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
9374 // CHECK13:       omp.body.continue:
9375 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9376 // CHECK13:       omp.inner.for.inc:
9377 // CHECK13-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
9378 // CHECK13-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP22]], 1
9379 // CHECK13-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
9380 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
9381 // CHECK13:       omp.inner.for.end:
9382 // CHECK13-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
9383 // CHECK13:       omp.dispatch.inc:
9384 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND]]
9385 // CHECK13:       omp.dispatch.end:
9386 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
9387 // CHECK13:       omp.precond.end:
9388 // CHECK13-NEXT:    ret void
9389 //
9390 //
9391 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
9392 // CHECK13-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
9393 // CHECK13-NEXT:  entry:
9394 // CHECK13-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
9395 // CHECK13-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
9396 // CHECK13-NEXT:    [[M:%.*]] = alloca i32, align 4
9397 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
9398 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
9399 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
9400 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9401 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8
9402 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8
9403 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8
9404 // CHECK13-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
9405 // CHECK13-NEXT:    [[M_CASTED:%.*]] = alloca i64, align 8
9406 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 8
9407 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 8
9408 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 8
9409 // CHECK13-NEXT:    [[_TMP10:%.*]] = alloca i32, align 4
9410 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 8
9411 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 8
9412 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 8
9413 // CHECK13-NEXT:    [[_TMP16:%.*]] = alloca i32, align 4
9414 // CHECK13-NEXT:    [[M_CASTED19:%.*]] = alloca i64, align 8
9415 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [2 x i8*], align 8
9416 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS22:%.*]] = alloca [2 x i8*], align 8
9417 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [2 x i8*], align 8
9418 // CHECK13-NEXT:    [[_TMP24:%.*]] = alloca i32, align 4
9419 // CHECK13-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
9420 // CHECK13-NEXT:    store i32 10, i32* [[M]], align 4
9421 // CHECK13-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
9422 // CHECK13-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
9423 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8
9424 // CHECK13-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
9425 // CHECK13-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
9426 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8
9427 // CHECK13-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
9428 // CHECK13-NEXT:    store i8* null, i8** [[TMP4]], align 8
9429 // CHECK13-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
9430 // CHECK13-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
9431 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
9432 // CHECK13-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
9433 // CHECK13-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
9434 // CHECK13-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
9435 // CHECK13:       omp_offload.failed:
9436 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]]
9437 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT]]
9438 // CHECK13:       omp_offload.cont:
9439 // CHECK13-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
9440 // CHECK13-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
9441 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8
9442 // CHECK13-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
9443 // CHECK13-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
9444 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8
9445 // CHECK13-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0
9446 // CHECK13-NEXT:    store i8* null, i8** [[TMP13]], align 8
9447 // CHECK13-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
9448 // CHECK13-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
9449 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
9450 // CHECK13-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
9451 // CHECK13-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
9452 // CHECK13-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
9453 // CHECK13:       omp_offload.failed5:
9454 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121([10 x i32]* [[A]]) #[[ATTR3]]
9455 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT6]]
9456 // CHECK13:       omp_offload.cont6:
9457 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, i32* [[M]], align 4
9458 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[M_CASTED]] to i32*
9459 // CHECK13-NEXT:    store i32 [[TMP18]], i32* [[CONV]], align 4
9460 // CHECK13-NEXT:    [[TMP19:%.*]] = load i64, i64* [[M_CASTED]], align 8
9461 // CHECK13-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
9462 // CHECK13-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64*
9463 // CHECK13-NEXT:    store i64 [[TMP19]], i64* [[TMP21]], align 8
9464 // CHECK13-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
9465 // CHECK13-NEXT:    [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64*
9466 // CHECK13-NEXT:    store i64 [[TMP19]], i64* [[TMP23]], align 8
9467 // CHECK13-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0
9468 // CHECK13-NEXT:    store i8* null, i8** [[TMP24]], align 8
9469 // CHECK13-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1
9470 // CHECK13-NEXT:    [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]**
9471 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 8
9472 // CHECK13-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1
9473 // CHECK13-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]**
9474 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 8
9475 // CHECK13-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 1
9476 // CHECK13-NEXT:    store i8* null, i8** [[TMP29]], align 8
9477 // CHECK13-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
9478 // CHECK13-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
9479 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
9480 // CHECK13-NEXT:    [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
9481 // CHECK13-NEXT:    [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
9482 // CHECK13-NEXT:    br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
9483 // CHECK13:       omp_offload.failed11:
9484 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i64 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]]
9485 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT12]]
9486 // CHECK13:       omp_offload.cont12:
9487 // CHECK13-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
9488 // CHECK13-NEXT:    [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]**
9489 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 8
9490 // CHECK13-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
9491 // CHECK13-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]**
9492 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 8
9493 // CHECK13-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i64 0, i64 0
9494 // CHECK13-NEXT:    store i8* null, i8** [[TMP38]], align 8
9495 // CHECK13-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
9496 // CHECK13-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
9497 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
9498 // CHECK13-NEXT:    [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
9499 // CHECK13-NEXT:    [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0
9500 // CHECK13-NEXT:    br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
9501 // CHECK13:       omp_offload.failed17:
9502 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131([10 x i32]* [[A]]) #[[ATTR3]]
9503 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT18]]
9504 // CHECK13:       omp_offload.cont18:
9505 // CHECK13-NEXT:    [[TMP43:%.*]] = load i32, i32* [[M]], align 4
9506 // CHECK13-NEXT:    [[CONV20:%.*]] = bitcast i64* [[M_CASTED19]] to i32*
9507 // CHECK13-NEXT:    store i32 [[TMP43]], i32* [[CONV20]], align 4
9508 // CHECK13-NEXT:    [[TMP44:%.*]] = load i64, i64* [[M_CASTED19]], align 8
9509 // CHECK13-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
9510 // CHECK13-NEXT:    [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64*
9511 // CHECK13-NEXT:    store i64 [[TMP44]], i64* [[TMP46]], align 8
9512 // CHECK13-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
9513 // CHECK13-NEXT:    [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64*
9514 // CHECK13-NEXT:    store i64 [[TMP44]], i64* [[TMP48]], align 8
9515 // CHECK13-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0
9516 // CHECK13-NEXT:    store i8* null, i8** [[TMP49]], align 8
9517 // CHECK13-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1
9518 // CHECK13-NEXT:    [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]**
9519 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 8
9520 // CHECK13-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1
9521 // CHECK13-NEXT:    [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]**
9522 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 8
9523 // CHECK13-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1
9524 // CHECK13-NEXT:    store i8* null, i8** [[TMP54]], align 8
9525 // CHECK13-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
9526 // CHECK13-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
9527 // CHECK13-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
9528 // CHECK13-NEXT:    [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
9529 // CHECK13-NEXT:    [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0
9530 // CHECK13-NEXT:    br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED25:%.*]], label [[OMP_OFFLOAD_CONT26:%.*]]
9531 // CHECK13:       omp_offload.failed25:
9532 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i64 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]]
9533 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT26]]
9534 // CHECK13:       omp_offload.cont26:
9535 // CHECK13-NEXT:    ret i32 0
9536 //
9537 //
9538 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
9539 // CHECK13-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9540 // CHECK13-NEXT:  entry:
9541 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
9542 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
9543 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
9544 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
9545 // CHECK13-NEXT:    ret void
9546 //
9547 //
9548 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..14
9549 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9550 // CHECK13-NEXT:  entry:
9551 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9552 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9553 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
9554 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9555 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9556 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9557 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9558 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9559 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9560 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9561 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9562 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9563 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
9564 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
9565 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9566 // CHECK13-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
9567 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9568 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9569 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9570 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
9571 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9572 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9573 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
9574 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9575 // CHECK13:       cond.true:
9576 // CHECK13-NEXT:    br label [[COND_END:%.*]]
9577 // CHECK13:       cond.false:
9578 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9579 // CHECK13-NEXT:    br label [[COND_END]]
9580 // CHECK13:       cond.end:
9581 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
9582 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9583 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9584 // CHECK13-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
9585 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9586 // CHECK13:       omp.inner.for.cond:
9587 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9588 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9589 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
9590 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9591 // CHECK13:       omp.inner.for.body:
9592 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9593 // CHECK13-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
9594 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9595 // CHECK13-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
9596 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
9597 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9598 // CHECK13:       omp.inner.for.inc:
9599 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9600 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9601 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
9602 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
9603 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
9604 // CHECK13:       omp.inner.for.end:
9605 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9606 // CHECK13:       omp.loop.exit:
9607 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
9608 // CHECK13-NEXT:    ret void
9609 //
9610 //
9611 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..15
9612 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9613 // CHECK13-NEXT:  entry:
9614 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9615 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9616 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
9617 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
9618 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
9619 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9620 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9621 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
9622 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
9623 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9624 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9625 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9626 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9627 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9628 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9629 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9630 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
9631 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
9632 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
9633 // CHECK13-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
9634 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9635 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
9636 // CHECK13-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9637 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
9638 // CHECK13-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
9639 // CHECK13-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
9640 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9641 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9642 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9643 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
9644 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9645 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9646 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
9647 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9648 // CHECK13:       cond.true:
9649 // CHECK13-NEXT:    br label [[COND_END:%.*]]
9650 // CHECK13:       cond.false:
9651 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9652 // CHECK13-NEXT:    br label [[COND_END]]
9653 // CHECK13:       cond.end:
9654 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
9655 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9656 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9657 // CHECK13-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
9658 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9659 // CHECK13:       omp.inner.for.cond:
9660 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9661 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9662 // CHECK13-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
9663 // CHECK13-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9664 // CHECK13:       omp.inner.for.body:
9665 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9666 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
9667 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9668 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
9669 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
9670 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
9671 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
9672 // CHECK13-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
9673 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
9674 // CHECK13:       omp.body.continue:
9675 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9676 // CHECK13:       omp.inner.for.inc:
9677 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9678 // CHECK13-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
9679 // CHECK13-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
9680 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
9681 // CHECK13:       omp.inner.for.end:
9682 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9683 // CHECK13:       omp.loop.exit:
9684 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
9685 // CHECK13-NEXT:    ret void
9686 //
9687 //
9688 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121
9689 // CHECK13-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9690 // CHECK13-NEXT:  entry:
9691 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
9692 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
9693 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
9694 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
9695 // CHECK13-NEXT:    ret void
9696 //
9697 //
9698 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..17
9699 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9700 // CHECK13-NEXT:  entry:
9701 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9702 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9703 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
9704 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9705 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9706 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9707 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9708 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9709 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9710 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9711 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9712 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9713 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
9714 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
9715 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9716 // CHECK13-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
9717 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9718 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9719 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9720 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
9721 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9722 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9723 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
9724 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9725 // CHECK13:       cond.true:
9726 // CHECK13-NEXT:    br label [[COND_END:%.*]]
9727 // CHECK13:       cond.false:
9728 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9729 // CHECK13-NEXT:    br label [[COND_END]]
9730 // CHECK13:       cond.end:
9731 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
9732 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9733 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9734 // CHECK13-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
9735 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9736 // CHECK13:       omp.inner.for.cond:
9737 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9738 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9739 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
9740 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9741 // CHECK13:       omp.inner.for.body:
9742 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9743 // CHECK13-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
9744 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9745 // CHECK13-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
9746 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
9747 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9748 // CHECK13:       omp.inner.for.inc:
9749 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9750 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9751 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
9752 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
9753 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
9754 // CHECK13:       omp.inner.for.end:
9755 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9756 // CHECK13:       omp.loop.exit:
9757 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
9758 // CHECK13-NEXT:    ret void
9759 //
9760 //
9761 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..18
9762 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9763 // CHECK13-NEXT:  entry:
9764 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9765 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9766 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
9767 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
9768 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
9769 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9770 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9771 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
9772 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
9773 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9774 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9775 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9776 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9777 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9778 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9779 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9780 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
9781 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
9782 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
9783 // CHECK13-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
9784 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9785 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
9786 // CHECK13-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9787 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
9788 // CHECK13-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
9789 // CHECK13-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
9790 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9791 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9792 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9793 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
9794 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9795 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9796 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
9797 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9798 // CHECK13:       cond.true:
9799 // CHECK13-NEXT:    br label [[COND_END:%.*]]
9800 // CHECK13:       cond.false:
9801 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9802 // CHECK13-NEXT:    br label [[COND_END]]
9803 // CHECK13:       cond.end:
9804 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
9805 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
9806 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9807 // CHECK13-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
9808 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9809 // CHECK13:       omp.inner.for.cond:
9810 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9811 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9812 // CHECK13-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
9813 // CHECK13-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9814 // CHECK13:       omp.inner.for.body:
9815 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9816 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
9817 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9818 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
9819 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
9820 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
9821 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
9822 // CHECK13-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
9823 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
9824 // CHECK13:       omp.body.continue:
9825 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9826 // CHECK13:       omp.inner.for.inc:
9827 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9828 // CHECK13-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
9829 // CHECK13-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
9830 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
9831 // CHECK13:       omp.inner.for.end:
9832 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9833 // CHECK13:       omp.loop.exit:
9834 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
9835 // CHECK13-NEXT:    ret void
9836 //
9837 //
9838 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126
9839 // CHECK13-SAME: (i64 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9840 // CHECK13-NEXT:  entry:
9841 // CHECK13-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8
9842 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
9843 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
9844 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
9845 // CHECK13-NEXT:    store i64 [[M]], i64* [[M_ADDR]], align 8
9846 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
9847 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
9848 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
9849 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
9850 // CHECK13-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
9851 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
9852 // CHECK13-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
9853 // CHECK13-NEXT:    store i32 [[TMP2]], i32* [[CONV1]], align 4
9854 // CHECK13-NEXT:    [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
9855 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]])
9856 // CHECK13-NEXT:    ret void
9857 //
9858 //
9859 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..21
9860 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
9861 // CHECK13-NEXT:  entry:
9862 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9863 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9864 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
9865 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
9866 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9867 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9868 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9869 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9870 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9871 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9872 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9873 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
9874 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9875 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9876 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
9877 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
9878 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
9879 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
9880 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
9881 // CHECK13-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
9882 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9883 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9884 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9885 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
9886 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
9887 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9888 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
9889 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9890 // CHECK13:       cond.true:
9891 // CHECK13-NEXT:    br label [[COND_END:%.*]]
9892 // CHECK13:       cond.false:
9893 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9894 // CHECK13-NEXT:    br label [[COND_END]]
9895 // CHECK13:       cond.end:
9896 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
9897 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
9898 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9899 // CHECK13-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
9900 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9901 // CHECK13:       omp.inner.for.cond:
9902 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9903 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9904 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
9905 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9906 // CHECK13:       omp.inner.for.body:
9907 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
9908 // CHECK13-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
9909 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
9910 // CHECK13-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
9911 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8
9912 // CHECK13-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
9913 // CHECK13-NEXT:    store i32 [[TMP12]], i32* [[CONV2]], align 4
9914 // CHECK13-NEXT:    [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
9915 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]])
9916 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9917 // CHECK13:       omp.inner.for.inc:
9918 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9919 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
9920 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
9921 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
9922 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
9923 // CHECK13:       omp.inner.for.end:
9924 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9925 // CHECK13:       omp.loop.exit:
9926 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
9927 // CHECK13-NEXT:    ret void
9928 //
9929 //
9930 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..22
9931 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
9932 // CHECK13-NEXT:  entry:
9933 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
9934 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
9935 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
9936 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
9937 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
9938 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
9939 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9940 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9941 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
9942 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
9943 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9944 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9945 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
9946 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
9947 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
9948 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9949 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9950 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
9951 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
9952 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
9953 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
9954 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
9955 // CHECK13-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
9956 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
9957 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
9958 // CHECK13-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9959 // CHECK13-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
9960 // CHECK13-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
9961 // CHECK13-NEXT:    store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
9962 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
9963 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
9964 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
9965 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
9966 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
9967 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
9968 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
9969 // CHECK13:       omp.dispatch.cond:
9970 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9971 // CHECK13-NEXT:    [[CONV3:%.*]] = sext i32 [[TMP6]] to i64
9972 // CHECK13-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9973 // CHECK13-NEXT:    [[CMP:%.*]] = icmp ugt i64 [[CONV3]], [[TMP7]]
9974 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9975 // CHECK13:       cond.true:
9976 // CHECK13-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
9977 // CHECK13-NEXT:    br label [[COND_END:%.*]]
9978 // CHECK13:       cond.false:
9979 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9980 // CHECK13-NEXT:    [[CONV4:%.*]] = sext i32 [[TMP9]] to i64
9981 // CHECK13-NEXT:    br label [[COND_END]]
9982 // CHECK13:       cond.end:
9983 // CHECK13-NEXT:    [[COND:%.*]] = phi i64 [ [[TMP8]], [[COND_TRUE]] ], [ [[CONV4]], [[COND_FALSE]] ]
9984 // CHECK13-NEXT:    [[CONV5:%.*]] = trunc i64 [[COND]] to i32
9985 // CHECK13-NEXT:    store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
9986 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
9987 // CHECK13-NEXT:    store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
9988 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9989 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9990 // CHECK13-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
9991 // CHECK13-NEXT:    br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
9992 // CHECK13:       omp.dispatch.body:
9993 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9994 // CHECK13:       omp.inner.for.cond:
9995 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
9996 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
9997 // CHECK13-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
9998 // CHECK13-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9999 // CHECK13:       omp.inner.for.body:
10000 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10001 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
10002 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10003 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
10004 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I]], align 4
10005 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
10006 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
10007 // CHECK13-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
10008 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
10009 // CHECK13:       omp.body.continue:
10010 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10011 // CHECK13:       omp.inner.for.inc:
10012 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10013 // CHECK13-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP17]], 1
10014 // CHECK13-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
10015 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
10016 // CHECK13:       omp.inner.for.end:
10017 // CHECK13-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
10018 // CHECK13:       omp.dispatch.inc:
10019 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10020 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10021 // CHECK13-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
10022 // CHECK13-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4
10023 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10024 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10025 // CHECK13-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
10026 // CHECK13-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4
10027 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND]]
10028 // CHECK13:       omp.dispatch.end:
10029 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
10030 // CHECK13-NEXT:    ret void
10031 //
10032 //
10033 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131
10034 // CHECK13-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
10035 // CHECK13-NEXT:  entry:
10036 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
10037 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
10038 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
10039 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
10040 // CHECK13-NEXT:    ret void
10041 //
10042 //
10043 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..25
10044 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
10045 // CHECK13-NEXT:  entry:
10046 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10047 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10048 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
10049 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10050 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10051 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10052 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10053 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10054 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10055 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
10056 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10057 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10058 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
10059 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
10060 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10061 // CHECK13-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
10062 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10063 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10064 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10065 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
10066 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10067 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10068 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
10069 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10070 // CHECK13:       cond.true:
10071 // CHECK13-NEXT:    br label [[COND_END:%.*]]
10072 // CHECK13:       cond.false:
10073 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10074 // CHECK13-NEXT:    br label [[COND_END]]
10075 // CHECK13:       cond.end:
10076 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
10077 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10078 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10079 // CHECK13-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
10080 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10081 // CHECK13:       omp.inner.for.cond:
10082 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10083 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10084 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
10085 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10086 // CHECK13:       omp.inner.for.body:
10087 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10088 // CHECK13-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
10089 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10090 // CHECK13-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
10091 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
10092 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10093 // CHECK13:       omp.inner.for.inc:
10094 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10095 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10096 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
10097 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
10098 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
10099 // CHECK13:       omp.inner.for.end:
10100 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10101 // CHECK13:       omp.loop.exit:
10102 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
10103 // CHECK13-NEXT:    ret void
10104 //
10105 //
10106 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..26
10107 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
10108 // CHECK13-NEXT:  entry:
10109 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10110 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10111 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10112 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10113 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
10114 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10115 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10116 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
10117 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
10118 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10119 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10120 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
10121 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10122 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10123 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10124 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10125 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
10126 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
10127 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
10128 // CHECK13-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
10129 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10130 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
10131 // CHECK13-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10132 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
10133 // CHECK13-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
10134 // CHECK13-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
10135 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10136 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10137 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10138 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10139 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10140 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
10141 // CHECK13-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
10142 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
10143 // CHECK13:       omp.dispatch.cond:
10144 // CHECK13-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
10145 // CHECK13-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
10146 // CHECK13-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
10147 // CHECK13:       omp.dispatch.body:
10148 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10149 // CHECK13-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
10150 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10151 // CHECK13:       omp.inner.for.cond:
10152 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20
10153 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !20
10154 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
10155 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10156 // CHECK13:       omp.inner.for.body:
10157 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20
10158 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
10159 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10160 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !20
10161 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !20
10162 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
10163 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
10164 // CHECK13-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !20
10165 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
10166 // CHECK13:       omp.body.continue:
10167 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10168 // CHECK13:       omp.inner.for.inc:
10169 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20
10170 // CHECK13-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
10171 // CHECK13-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20
10172 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]
10173 // CHECK13:       omp.inner.for.end:
10174 // CHECK13-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
10175 // CHECK13:       omp.dispatch.inc:
10176 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND]]
10177 // CHECK13:       omp.dispatch.end:
10178 // CHECK13-NEXT:    ret void
10179 //
10180 //
10181 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136
10182 // CHECK13-SAME: (i64 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
10183 // CHECK13-NEXT:  entry:
10184 // CHECK13-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8
10185 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
10186 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10187 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
10188 // CHECK13-NEXT:    store i64 [[M]], i64* [[M_ADDR]], align 8
10189 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
10190 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
10191 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
10192 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
10193 // CHECK13-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
10194 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10195 // CHECK13-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
10196 // CHECK13-NEXT:    store i32 [[TMP2]], i32* [[CONV1]], align 4
10197 // CHECK13-NEXT:    [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
10198 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]])
10199 // CHECK13-NEXT:    ret void
10200 //
10201 //
10202 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..29
10203 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
10204 // CHECK13-NEXT:  entry:
10205 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10206 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10207 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
10208 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
10209 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10210 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10211 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10212 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10213 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10214 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10215 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
10216 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
10217 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10218 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10219 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
10220 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
10221 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
10222 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
10223 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10224 // CHECK13-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
10225 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10226 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10227 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10228 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
10229 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10230 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10231 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
10232 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10233 // CHECK13:       cond.true:
10234 // CHECK13-NEXT:    br label [[COND_END:%.*]]
10235 // CHECK13:       cond.false:
10236 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10237 // CHECK13-NEXT:    br label [[COND_END]]
10238 // CHECK13:       cond.end:
10239 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
10240 // CHECK13-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10241 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10242 // CHECK13-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
10243 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10244 // CHECK13:       omp.inner.for.cond:
10245 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10246 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10247 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
10248 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10249 // CHECK13:       omp.inner.for.body:
10250 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10251 // CHECK13-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
10252 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10253 // CHECK13-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
10254 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8
10255 // CHECK13-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
10256 // CHECK13-NEXT:    store i32 [[TMP12]], i32* [[CONV2]], align 4
10257 // CHECK13-NEXT:    [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
10258 // CHECK13-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]])
10259 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10260 // CHECK13:       omp.inner.for.inc:
10261 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10262 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10263 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
10264 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
10265 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
10266 // CHECK13:       omp.inner.for.end:
10267 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10268 // CHECK13:       omp.loop.exit:
10269 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
10270 // CHECK13-NEXT:    ret void
10271 //
10272 //
10273 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..30
10274 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
10275 // CHECK13-NEXT:  entry:
10276 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10277 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10278 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10279 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10280 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
10281 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
10282 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10283 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10284 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
10285 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
10286 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10287 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10288 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
10289 // CHECK13-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10290 // CHECK13-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10291 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10292 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10293 // CHECK13-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
10294 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
10295 // CHECK13-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
10296 // CHECK13-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
10297 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
10298 // CHECK13-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
10299 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10300 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
10301 // CHECK13-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10302 // CHECK13-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
10303 // CHECK13-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
10304 // CHECK13-NEXT:    store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
10305 // CHECK13-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10306 // CHECK13-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10307 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
10308 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10309 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10310 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10311 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
10312 // CHECK13-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
10313 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
10314 // CHECK13:       omp.dispatch.cond:
10315 // CHECK13-NEXT:    [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
10316 // CHECK13-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
10317 // CHECK13-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
10318 // CHECK13:       omp.dispatch.body:
10319 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10320 // CHECK13-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
10321 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10322 // CHECK13:       omp.inner.for.cond:
10323 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
10324 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !23
10325 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
10326 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10327 // CHECK13:       omp.inner.for.body:
10328 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
10329 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
10330 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10331 // CHECK13-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !23
10332 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !23
10333 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
10334 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
10335 // CHECK13-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !23
10336 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
10337 // CHECK13:       omp.body.continue:
10338 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10339 // CHECK13:       omp.inner.for.inc:
10340 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
10341 // CHECK13-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1
10342 // CHECK13-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
10343 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
10344 // CHECK13:       omp.inner.for.end:
10345 // CHECK13-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
10346 // CHECK13:       omp.dispatch.inc:
10347 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND]]
10348 // CHECK13:       omp.dispatch.end:
10349 // CHECK13-NEXT:    ret void
10350 //
10351 //
10352 // CHECK13-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
10353 // CHECK13-SAME: () #[[ATTR5:[0-9]+]] {
10354 // CHECK13-NEXT:  entry:
10355 // CHECK13-NEXT:    call void @__tgt_register_requires(i64 1)
10356 // CHECK13-NEXT:    ret void
10357 //
10358 //
10359 // CHECK14-LABEL: define {{[^@]+}}@main
10360 // CHECK14-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
10361 // CHECK14-NEXT:  entry:
10362 // CHECK14-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
10363 // CHECK14-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
10364 // CHECK14-NEXT:    [[ARGV_ADDR:%.*]] = alloca i8**, align 8
10365 // CHECK14-NEXT:    [[N:%.*]] = alloca i32, align 4
10366 // CHECK14-NEXT:    [[SAVED_STACK:%.*]] = alloca i8*, align 8
10367 // CHECK14-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i64, align 8
10368 // CHECK14-NEXT:    [[M:%.*]] = alloca i32, align 4
10369 // CHECK14-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
10370 // CHECK14-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
10371 // CHECK14-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
10372 // CHECK14-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
10373 // CHECK14-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
10374 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10375 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10376 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10377 // CHECK14-NEXT:    [[N_CASTED3:%.*]] = alloca i64, align 8
10378 // CHECK14-NEXT:    [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8
10379 // CHECK14-NEXT:    [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8
10380 // CHECK14-NEXT:    [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8
10381 // CHECK14-NEXT:    [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8
10382 // CHECK14-NEXT:    [[_TMP9:%.*]] = alloca i32, align 4
10383 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
10384 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
10385 // CHECK14-NEXT:    [[M_CASTED:%.*]] = alloca i64, align 8
10386 // CHECK14-NEXT:    [[N_CASTED19:%.*]] = alloca i64, align 8
10387 // CHECK14-NEXT:    [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [4 x i8*], align 8
10388 // CHECK14-NEXT:    [[DOTOFFLOAD_PTRS22:%.*]] = alloca [4 x i8*], align 8
10389 // CHECK14-NEXT:    [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [4 x i8*], align 8
10390 // CHECK14-NEXT:    [[DOTOFFLOAD_SIZES24:%.*]] = alloca [4 x i64], align 8
10391 // CHECK14-NEXT:    [[_TMP25:%.*]] = alloca i32, align 4
10392 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4
10393 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4
10394 // CHECK14-NEXT:    [[N_CASTED34:%.*]] = alloca i64, align 8
10395 // CHECK14-NEXT:    [[DOTOFFLOAD_BASEPTRS36:%.*]] = alloca [3 x i8*], align 8
10396 // CHECK14-NEXT:    [[DOTOFFLOAD_PTRS37:%.*]] = alloca [3 x i8*], align 8
10397 // CHECK14-NEXT:    [[DOTOFFLOAD_MAPPERS38:%.*]] = alloca [3 x i8*], align 8
10398 // CHECK14-NEXT:    [[DOTOFFLOAD_SIZES39:%.*]] = alloca [3 x i64], align 8
10399 // CHECK14-NEXT:    [[_TMP40:%.*]] = alloca i32, align 4
10400 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4
10401 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4
10402 // CHECK14-NEXT:    [[M_CASTED49:%.*]] = alloca i64, align 8
10403 // CHECK14-NEXT:    [[N_CASTED51:%.*]] = alloca i64, align 8
10404 // CHECK14-NEXT:    [[DOTOFFLOAD_BASEPTRS53:%.*]] = alloca [4 x i8*], align 8
10405 // CHECK14-NEXT:    [[DOTOFFLOAD_PTRS54:%.*]] = alloca [4 x i8*], align 8
10406 // CHECK14-NEXT:    [[DOTOFFLOAD_MAPPERS55:%.*]] = alloca [4 x i8*], align 8
10407 // CHECK14-NEXT:    [[DOTOFFLOAD_SIZES56:%.*]] = alloca [4 x i64], align 8
10408 // CHECK14-NEXT:    [[_TMP57:%.*]] = alloca i32, align 4
10409 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4
10410 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_59:%.*]] = alloca i32, align 4
10411 // CHECK14-NEXT:    store i32 0, i32* [[RETVAL]], align 4
10412 // CHECK14-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
10413 // CHECK14-NEXT:    store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
10414 // CHECK14-NEXT:    store i32 100, i32* [[N]], align 4
10415 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N]], align 4
10416 // CHECK14-NEXT:    [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
10417 // CHECK14-NEXT:    [[TMP2:%.*]] = call i8* @llvm.stacksave()
10418 // CHECK14-NEXT:    store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
10419 // CHECK14-NEXT:    [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
10420 // CHECK14-NEXT:    store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
10421 // CHECK14-NEXT:    store i32 10, i32* [[M]], align 4
10422 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N]], align 4
10423 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
10424 // CHECK14-NEXT:    store i32 [[TMP3]], i32* [[CONV]], align 4
10425 // CHECK14-NEXT:    [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
10426 // CHECK14-NEXT:    [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4
10427 // CHECK14-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
10428 // CHECK14-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
10429 // CHECK14-NEXT:    store i64 [[TMP4]], i64* [[TMP7]], align 8
10430 // CHECK14-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
10431 // CHECK14-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
10432 // CHECK14-NEXT:    store i64 [[TMP4]], i64* [[TMP9]], align 8
10433 // CHECK14-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
10434 // CHECK14-NEXT:    store i64 4, i64* [[TMP10]], align 8
10435 // CHECK14-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
10436 // CHECK14-NEXT:    store i8* null, i8** [[TMP11]], align 8
10437 // CHECK14-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
10438 // CHECK14-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
10439 // CHECK14-NEXT:    store i64 [[TMP1]], i64* [[TMP13]], align 8
10440 // CHECK14-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
10441 // CHECK14-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
10442 // CHECK14-NEXT:    store i64 [[TMP1]], i64* [[TMP15]], align 8
10443 // CHECK14-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
10444 // CHECK14-NEXT:    store i64 8, i64* [[TMP16]], align 8
10445 // CHECK14-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
10446 // CHECK14-NEXT:    store i8* null, i8** [[TMP17]], align 8
10447 // CHECK14-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
10448 // CHECK14-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
10449 // CHECK14-NEXT:    store i32* [[VLA]], i32** [[TMP19]], align 8
10450 // CHECK14-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
10451 // CHECK14-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
10452 // CHECK14-NEXT:    store i32* [[VLA]], i32** [[TMP21]], align 8
10453 // CHECK14-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
10454 // CHECK14-NEXT:    store i64 [[TMP5]], i64* [[TMP22]], align 8
10455 // CHECK14-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
10456 // CHECK14-NEXT:    store i8* null, i8** [[TMP23]], align 8
10457 // CHECK14-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
10458 // CHECK14-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
10459 // CHECK14-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
10460 // CHECK14-NEXT:    [[TMP27:%.*]] = load i32, i32* [[N]], align 4
10461 // CHECK14-NEXT:    store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
10462 // CHECK14-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10463 // CHECK14-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
10464 // CHECK14-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10465 // CHECK14-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
10466 // CHECK14-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
10467 // CHECK14-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10468 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
10469 // CHECK14-NEXT:    [[TMP30:%.*]] = zext i32 [[ADD]] to i64
10470 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]])
10471 // CHECK14-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
10472 // CHECK14-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
10473 // CHECK14-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
10474 // CHECK14:       omp_offload.failed:
10475 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
10476 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT]]
10477 // CHECK14:       omp_offload.cont:
10478 // CHECK14-NEXT:    [[TMP33:%.*]] = load i32, i32* [[N]], align 4
10479 // CHECK14-NEXT:    [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32*
10480 // CHECK14-NEXT:    store i32 [[TMP33]], i32* [[CONV4]], align 4
10481 // CHECK14-NEXT:    [[TMP34:%.*]] = load i64, i64* [[N_CASTED3]], align 8
10482 // CHECK14-NEXT:    [[TMP35:%.*]] = mul nuw i64 [[TMP1]], 4
10483 // CHECK14-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
10484 // CHECK14-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64*
10485 // CHECK14-NEXT:    store i64 [[TMP34]], i64* [[TMP37]], align 8
10486 // CHECK14-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
10487 // CHECK14-NEXT:    [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64*
10488 // CHECK14-NEXT:    store i64 [[TMP34]], i64* [[TMP39]], align 8
10489 // CHECK14-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
10490 // CHECK14-NEXT:    store i64 4, i64* [[TMP40]], align 8
10491 // CHECK14-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0
10492 // CHECK14-NEXT:    store i8* null, i8** [[TMP41]], align 8
10493 // CHECK14-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1
10494 // CHECK14-NEXT:    [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i64*
10495 // CHECK14-NEXT:    store i64 [[TMP1]], i64* [[TMP43]], align 8
10496 // CHECK14-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1
10497 // CHECK14-NEXT:    [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i64*
10498 // CHECK14-NEXT:    store i64 [[TMP1]], i64* [[TMP45]], align 8
10499 // CHECK14-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 1
10500 // CHECK14-NEXT:    store i64 8, i64* [[TMP46]], align 8
10501 // CHECK14-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1
10502 // CHECK14-NEXT:    store i8* null, i8** [[TMP47]], align 8
10503 // CHECK14-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2
10504 // CHECK14-NEXT:    [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32**
10505 // CHECK14-NEXT:    store i32* [[VLA]], i32** [[TMP49]], align 8
10506 // CHECK14-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2
10507 // CHECK14-NEXT:    [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i32**
10508 // CHECK14-NEXT:    store i32* [[VLA]], i32** [[TMP51]], align 8
10509 // CHECK14-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2
10510 // CHECK14-NEXT:    store i64 [[TMP35]], i64* [[TMP52]], align 8
10511 // CHECK14-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2
10512 // CHECK14-NEXT:    store i8* null, i8** [[TMP53]], align 8
10513 // CHECK14-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
10514 // CHECK14-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
10515 // CHECK14-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
10516 // CHECK14-NEXT:    [[TMP57:%.*]] = load i32, i32* [[N]], align 4
10517 // CHECK14-NEXT:    store i32 [[TMP57]], i32* [[DOTCAPTURE_EXPR_10]], align 4
10518 // CHECK14-NEXT:    [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
10519 // CHECK14-NEXT:    [[SUB12:%.*]] = sub nsw i32 [[TMP58]], 0
10520 // CHECK14-NEXT:    [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
10521 // CHECK14-NEXT:    [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1
10522 // CHECK14-NEXT:    store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4
10523 // CHECK14-NEXT:    [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
10524 // CHECK14-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP59]], 1
10525 // CHECK14-NEXT:    [[TMP60:%.*]] = zext i32 [[ADD15]] to i64
10526 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP60]])
10527 // CHECK14-NEXT:    [[TMP61:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, i32 3, i8** [[TMP54]], i8** [[TMP55]], i64* [[TMP56]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
10528 // CHECK14-NEXT:    [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0
10529 // CHECK14-NEXT:    br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
10530 // CHECK14:       omp_offload.failed16:
10531 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i64 [[TMP34]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
10532 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT17]]
10533 // CHECK14:       omp_offload.cont17:
10534 // CHECK14-NEXT:    [[TMP63:%.*]] = load i32, i32* [[M]], align 4
10535 // CHECK14-NEXT:    [[CONV18:%.*]] = bitcast i64* [[M_CASTED]] to i32*
10536 // CHECK14-NEXT:    store i32 [[TMP63]], i32* [[CONV18]], align 4
10537 // CHECK14-NEXT:    [[TMP64:%.*]] = load i64, i64* [[M_CASTED]], align 8
10538 // CHECK14-NEXT:    [[TMP65:%.*]] = load i32, i32* [[N]], align 4
10539 // CHECK14-NEXT:    [[CONV20:%.*]] = bitcast i64* [[N_CASTED19]] to i32*
10540 // CHECK14-NEXT:    store i32 [[TMP65]], i32* [[CONV20]], align 4
10541 // CHECK14-NEXT:    [[TMP66:%.*]] = load i64, i64* [[N_CASTED19]], align 8
10542 // CHECK14-NEXT:    [[TMP67:%.*]] = mul nuw i64 [[TMP1]], 4
10543 // CHECK14-NEXT:    [[TMP68:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
10544 // CHECK14-NEXT:    [[TMP69:%.*]] = bitcast i8** [[TMP68]] to i64*
10545 // CHECK14-NEXT:    store i64 [[TMP64]], i64* [[TMP69]], align 8
10546 // CHECK14-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
10547 // CHECK14-NEXT:    [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i64*
10548 // CHECK14-NEXT:    store i64 [[TMP64]], i64* [[TMP71]], align 8
10549 // CHECK14-NEXT:    [[TMP72:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0
10550 // CHECK14-NEXT:    store i64 4, i64* [[TMP72]], align 8
10551 // CHECK14-NEXT:    [[TMP73:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0
10552 // CHECK14-NEXT:    store i8* null, i8** [[TMP73]], align 8
10553 // CHECK14-NEXT:    [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1
10554 // CHECK14-NEXT:    [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i64*
10555 // CHECK14-NEXT:    store i64 [[TMP66]], i64* [[TMP75]], align 8
10556 // CHECK14-NEXT:    [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1
10557 // CHECK14-NEXT:    [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i64*
10558 // CHECK14-NEXT:    store i64 [[TMP66]], i64* [[TMP77]], align 8
10559 // CHECK14-NEXT:    [[TMP78:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 1
10560 // CHECK14-NEXT:    store i64 4, i64* [[TMP78]], align 8
10561 // CHECK14-NEXT:    [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1
10562 // CHECK14-NEXT:    store i8* null, i8** [[TMP79]], align 8
10563 // CHECK14-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 2
10564 // CHECK14-NEXT:    [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i64*
10565 // CHECK14-NEXT:    store i64 [[TMP1]], i64* [[TMP81]], align 8
10566 // CHECK14-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 2
10567 // CHECK14-NEXT:    [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i64*
10568 // CHECK14-NEXT:    store i64 [[TMP1]], i64* [[TMP83]], align 8
10569 // CHECK14-NEXT:    [[TMP84:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 2
10570 // CHECK14-NEXT:    store i64 8, i64* [[TMP84]], align 8
10571 // CHECK14-NEXT:    [[TMP85:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 2
10572 // CHECK14-NEXT:    store i8* null, i8** [[TMP85]], align 8
10573 // CHECK14-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 3
10574 // CHECK14-NEXT:    [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i32**
10575 // CHECK14-NEXT:    store i32* [[VLA]], i32** [[TMP87]], align 8
10576 // CHECK14-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 3
10577 // CHECK14-NEXT:    [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32**
10578 // CHECK14-NEXT:    store i32* [[VLA]], i32** [[TMP89]], align 8
10579 // CHECK14-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 3
10580 // CHECK14-NEXT:    store i64 [[TMP67]], i64* [[TMP90]], align 8
10581 // CHECK14-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 3
10582 // CHECK14-NEXT:    store i8* null, i8** [[TMP91]], align 8
10583 // CHECK14-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
10584 // CHECK14-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
10585 // CHECK14-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0
10586 // CHECK14-NEXT:    [[TMP95:%.*]] = load i32, i32* [[N]], align 4
10587 // CHECK14-NEXT:    store i32 [[TMP95]], i32* [[DOTCAPTURE_EXPR_26]], align 4
10588 // CHECK14-NEXT:    [[TMP96:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4
10589 // CHECK14-NEXT:    [[SUB28:%.*]] = sub nsw i32 [[TMP96]], 0
10590 // CHECK14-NEXT:    [[DIV29:%.*]] = sdiv i32 [[SUB28]], 1
10591 // CHECK14-NEXT:    [[SUB30:%.*]] = sub nsw i32 [[DIV29]], 1
10592 // CHECK14-NEXT:    store i32 [[SUB30]], i32* [[DOTCAPTURE_EXPR_27]], align 4
10593 // CHECK14-NEXT:    [[TMP97:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4
10594 // CHECK14-NEXT:    [[ADD31:%.*]] = add nsw i32 [[TMP97]], 1
10595 // CHECK14-NEXT:    [[TMP98:%.*]] = zext i32 [[ADD31]] to i64
10596 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP98]])
10597 // CHECK14-NEXT:    [[TMP99:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, i32 4, i8** [[TMP92]], i8** [[TMP93]], i64* [[TMP94]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
10598 // CHECK14-NEXT:    [[TMP100:%.*]] = icmp ne i32 [[TMP99]], 0
10599 // CHECK14-NEXT:    br i1 [[TMP100]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
10600 // CHECK14:       omp_offload.failed32:
10601 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i64 [[TMP64]], i64 [[TMP66]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
10602 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT33]]
10603 // CHECK14:       omp_offload.cont33:
10604 // CHECK14-NEXT:    [[TMP101:%.*]] = load i32, i32* [[N]], align 4
10605 // CHECK14-NEXT:    [[CONV35:%.*]] = bitcast i64* [[N_CASTED34]] to i32*
10606 // CHECK14-NEXT:    store i32 [[TMP101]], i32* [[CONV35]], align 4
10607 // CHECK14-NEXT:    [[TMP102:%.*]] = load i64, i64* [[N_CASTED34]], align 8
10608 // CHECK14-NEXT:    [[TMP103:%.*]] = mul nuw i64 [[TMP1]], 4
10609 // CHECK14-NEXT:    [[TMP104:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0
10610 // CHECK14-NEXT:    [[TMP105:%.*]] = bitcast i8** [[TMP104]] to i64*
10611 // CHECK14-NEXT:    store i64 [[TMP102]], i64* [[TMP105]], align 8
10612 // CHECK14-NEXT:    [[TMP106:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0
10613 // CHECK14-NEXT:    [[TMP107:%.*]] = bitcast i8** [[TMP106]] to i64*
10614 // CHECK14-NEXT:    store i64 [[TMP102]], i64* [[TMP107]], align 8
10615 // CHECK14-NEXT:    [[TMP108:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0
10616 // CHECK14-NEXT:    store i64 4, i64* [[TMP108]], align 8
10617 // CHECK14-NEXT:    [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 0
10618 // CHECK14-NEXT:    store i8* null, i8** [[TMP109]], align 8
10619 // CHECK14-NEXT:    [[TMP110:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 1
10620 // CHECK14-NEXT:    [[TMP111:%.*]] = bitcast i8** [[TMP110]] to i64*
10621 // CHECK14-NEXT:    store i64 [[TMP1]], i64* [[TMP111]], align 8
10622 // CHECK14-NEXT:    [[TMP112:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 1
10623 // CHECK14-NEXT:    [[TMP113:%.*]] = bitcast i8** [[TMP112]] to i64*
10624 // CHECK14-NEXT:    store i64 [[TMP1]], i64* [[TMP113]], align 8
10625 // CHECK14-NEXT:    [[TMP114:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 1
10626 // CHECK14-NEXT:    store i64 8, i64* [[TMP114]], align 8
10627 // CHECK14-NEXT:    [[TMP115:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 1
10628 // CHECK14-NEXT:    store i8* null, i8** [[TMP115]], align 8
10629 // CHECK14-NEXT:    [[TMP116:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 2
10630 // CHECK14-NEXT:    [[TMP117:%.*]] = bitcast i8** [[TMP116]] to i32**
10631 // CHECK14-NEXT:    store i32* [[VLA]], i32** [[TMP117]], align 8
10632 // CHECK14-NEXT:    [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 2
10633 // CHECK14-NEXT:    [[TMP119:%.*]] = bitcast i8** [[TMP118]] to i32**
10634 // CHECK14-NEXT:    store i32* [[VLA]], i32** [[TMP119]], align 8
10635 // CHECK14-NEXT:    [[TMP120:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 2
10636 // CHECK14-NEXT:    store i64 [[TMP103]], i64* [[TMP120]], align 8
10637 // CHECK14-NEXT:    [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 2
10638 // CHECK14-NEXT:    store i8* null, i8** [[TMP121]], align 8
10639 // CHECK14-NEXT:    [[TMP122:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0
10640 // CHECK14-NEXT:    [[TMP123:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0
10641 // CHECK14-NEXT:    [[TMP124:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0
10642 // CHECK14-NEXT:    [[TMP125:%.*]] = load i32, i32* [[N]], align 4
10643 // CHECK14-NEXT:    store i32 [[TMP125]], i32* [[DOTCAPTURE_EXPR_41]], align 4
10644 // CHECK14-NEXT:    [[TMP126:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4
10645 // CHECK14-NEXT:    [[SUB43:%.*]] = sub nsw i32 [[TMP126]], 0
10646 // CHECK14-NEXT:    [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1
10647 // CHECK14-NEXT:    [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 1
10648 // CHECK14-NEXT:    store i32 [[SUB45]], i32* [[DOTCAPTURE_EXPR_42]], align 4
10649 // CHECK14-NEXT:    [[TMP127:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_42]], align 4
10650 // CHECK14-NEXT:    [[ADD46:%.*]] = add nsw i32 [[TMP127]], 1
10651 // CHECK14-NEXT:    [[TMP128:%.*]] = zext i32 [[ADD46]] to i64
10652 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP128]])
10653 // CHECK14-NEXT:    [[TMP129:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, i32 3, i8** [[TMP122]], i8** [[TMP123]], i64* [[TMP124]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
10654 // CHECK14-NEXT:    [[TMP130:%.*]] = icmp ne i32 [[TMP129]], 0
10655 // CHECK14-NEXT:    br i1 [[TMP130]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]]
10656 // CHECK14:       omp_offload.failed47:
10657 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i64 [[TMP102]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
10658 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT48]]
10659 // CHECK14:       omp_offload.cont48:
10660 // CHECK14-NEXT:    [[TMP131:%.*]] = load i32, i32* [[M]], align 4
10661 // CHECK14-NEXT:    [[CONV50:%.*]] = bitcast i64* [[M_CASTED49]] to i32*
10662 // CHECK14-NEXT:    store i32 [[TMP131]], i32* [[CONV50]], align 4
10663 // CHECK14-NEXT:    [[TMP132:%.*]] = load i64, i64* [[M_CASTED49]], align 8
10664 // CHECK14-NEXT:    [[TMP133:%.*]] = load i32, i32* [[N]], align 4
10665 // CHECK14-NEXT:    [[CONV52:%.*]] = bitcast i64* [[N_CASTED51]] to i32*
10666 // CHECK14-NEXT:    store i32 [[TMP133]], i32* [[CONV52]], align 4
10667 // CHECK14-NEXT:    [[TMP134:%.*]] = load i64, i64* [[N_CASTED51]], align 8
10668 // CHECK14-NEXT:    [[TMP135:%.*]] = mul nuw i64 [[TMP1]], 4
10669 // CHECK14-NEXT:    [[TMP136:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0
10670 // CHECK14-NEXT:    [[TMP137:%.*]] = bitcast i8** [[TMP136]] to i64*
10671 // CHECK14-NEXT:    store i64 [[TMP132]], i64* [[TMP137]], align 8
10672 // CHECK14-NEXT:    [[TMP138:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0
10673 // CHECK14-NEXT:    [[TMP139:%.*]] = bitcast i8** [[TMP138]] to i64*
10674 // CHECK14-NEXT:    store i64 [[TMP132]], i64* [[TMP139]], align 8
10675 // CHECK14-NEXT:    [[TMP140:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0
10676 // CHECK14-NEXT:    store i64 4, i64* [[TMP140]], align 8
10677 // CHECK14-NEXT:    [[TMP141:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 0
10678 // CHECK14-NEXT:    store i8* null, i8** [[TMP141]], align 8
10679 // CHECK14-NEXT:    [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 1
10680 // CHECK14-NEXT:    [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i64*
10681 // CHECK14-NEXT:    store i64 [[TMP134]], i64* [[TMP143]], align 8
10682 // CHECK14-NEXT:    [[TMP144:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 1
10683 // CHECK14-NEXT:    [[TMP145:%.*]] = bitcast i8** [[TMP144]] to i64*
10684 // CHECK14-NEXT:    store i64 [[TMP134]], i64* [[TMP145]], align 8
10685 // CHECK14-NEXT:    [[TMP146:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 1
10686 // CHECK14-NEXT:    store i64 4, i64* [[TMP146]], align 8
10687 // CHECK14-NEXT:    [[TMP147:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 1
10688 // CHECK14-NEXT:    store i8* null, i8** [[TMP147]], align 8
10689 // CHECK14-NEXT:    [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 2
10690 // CHECK14-NEXT:    [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i64*
10691 // CHECK14-NEXT:    store i64 [[TMP1]], i64* [[TMP149]], align 8
10692 // CHECK14-NEXT:    [[TMP150:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 2
10693 // CHECK14-NEXT:    [[TMP151:%.*]] = bitcast i8** [[TMP150]] to i64*
10694 // CHECK14-NEXT:    store i64 [[TMP1]], i64* [[TMP151]], align 8
10695 // CHECK14-NEXT:    [[TMP152:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 2
10696 // CHECK14-NEXT:    store i64 8, i64* [[TMP152]], align 8
10697 // CHECK14-NEXT:    [[TMP153:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 2
10698 // CHECK14-NEXT:    store i8* null, i8** [[TMP153]], align 8
10699 // CHECK14-NEXT:    [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 3
10700 // CHECK14-NEXT:    [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32**
10701 // CHECK14-NEXT:    store i32* [[VLA]], i32** [[TMP155]], align 8
10702 // CHECK14-NEXT:    [[TMP156:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 3
10703 // CHECK14-NEXT:    [[TMP157:%.*]] = bitcast i8** [[TMP156]] to i32**
10704 // CHECK14-NEXT:    store i32* [[VLA]], i32** [[TMP157]], align 8
10705 // CHECK14-NEXT:    [[TMP158:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 3
10706 // CHECK14-NEXT:    store i64 [[TMP135]], i64* [[TMP158]], align 8
10707 // CHECK14-NEXT:    [[TMP159:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 3
10708 // CHECK14-NEXT:    store i8* null, i8** [[TMP159]], align 8
10709 // CHECK14-NEXT:    [[TMP160:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0
10710 // CHECK14-NEXT:    [[TMP161:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0
10711 // CHECK14-NEXT:    [[TMP162:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0
10712 // CHECK14-NEXT:    [[TMP163:%.*]] = load i32, i32* [[N]], align 4
10713 // CHECK14-NEXT:    store i32 [[TMP163]], i32* [[DOTCAPTURE_EXPR_58]], align 4
10714 // CHECK14-NEXT:    [[TMP164:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_58]], align 4
10715 // CHECK14-NEXT:    [[SUB60:%.*]] = sub nsw i32 [[TMP164]], 0
10716 // CHECK14-NEXT:    [[DIV61:%.*]] = sdiv i32 [[SUB60]], 1
10717 // CHECK14-NEXT:    [[SUB62:%.*]] = sub nsw i32 [[DIV61]], 1
10718 // CHECK14-NEXT:    store i32 [[SUB62]], i32* [[DOTCAPTURE_EXPR_59]], align 4
10719 // CHECK14-NEXT:    [[TMP165:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_59]], align 4
10720 // CHECK14-NEXT:    [[ADD63:%.*]] = add nsw i32 [[TMP165]], 1
10721 // CHECK14-NEXT:    [[TMP166:%.*]] = zext i32 [[ADD63]] to i64
10722 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP166]])
10723 // CHECK14-NEXT:    [[TMP167:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, i32 4, i8** [[TMP160]], i8** [[TMP161]], i64* [[TMP162]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
10724 // CHECK14-NEXT:    [[TMP168:%.*]] = icmp ne i32 [[TMP167]], 0
10725 // CHECK14-NEXT:    br i1 [[TMP168]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]]
10726 // CHECK14:       omp_offload.failed64:
10727 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i64 [[TMP132]], i64 [[TMP134]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
10728 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT65]]
10729 // CHECK14:       omp_offload.cont65:
10730 // CHECK14-NEXT:    [[TMP169:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
10731 // CHECK14-NEXT:    [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP169]])
10732 // CHECK14-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
10733 // CHECK14-NEXT:    [[TMP170:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
10734 // CHECK14-NEXT:    call void @llvm.stackrestore(i8* [[TMP170]])
10735 // CHECK14-NEXT:    [[TMP171:%.*]] = load i32, i32* [[RETVAL]], align 4
10736 // CHECK14-NEXT:    ret i32 [[TMP171]]
10737 //
10738 //
10739 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148
10740 // CHECK14-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
10741 // CHECK14-NEXT:  entry:
10742 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
10743 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10744 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
10745 // CHECK14-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
10746 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10747 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
10748 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
10749 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10750 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10751 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
10752 // CHECK14-NEXT:    ret void
10753 //
10754 //
10755 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined.
10756 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10757 // CHECK14-NEXT:  entry:
10758 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10759 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10760 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
10761 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10762 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
10763 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10764 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10765 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10766 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10767 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
10768 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10769 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10770 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10771 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10772 // CHECK14-NEXT:    [[I3:%.*]] = alloca i32, align 4
10773 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10774 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10775 // CHECK14-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
10776 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10777 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
10778 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
10779 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10780 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10781 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
10782 // CHECK14-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
10783 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10784 // CHECK14-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
10785 // CHECK14-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10786 // CHECK14-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
10787 // CHECK14-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
10788 // CHECK14-NEXT:    store i32 0, i32* [[I]], align 4
10789 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10790 // CHECK14-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
10791 // CHECK14-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10792 // CHECK14:       omp.precond.then:
10793 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
10794 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10795 // CHECK14-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
10796 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10797 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10798 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10799 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
10800 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10801 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10802 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10803 // CHECK14-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
10804 // CHECK14-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10805 // CHECK14:       cond.true:
10806 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10807 // CHECK14-NEXT:    br label [[COND_END:%.*]]
10808 // CHECK14:       cond.false:
10809 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10810 // CHECK14-NEXT:    br label [[COND_END]]
10811 // CHECK14:       cond.end:
10812 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
10813 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
10814 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10815 // CHECK14-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
10816 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10817 // CHECK14:       omp.inner.for.cond:
10818 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10819 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10820 // CHECK14-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
10821 // CHECK14-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10822 // CHECK14:       omp.inner.for.body:
10823 // CHECK14-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
10824 // CHECK14-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
10825 // CHECK14-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
10826 // CHECK14-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
10827 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])
10828 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10829 // CHECK14:       omp.inner.for.inc:
10830 // CHECK14-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10831 // CHECK14-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
10832 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
10833 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
10834 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
10835 // CHECK14:       omp.inner.for.end:
10836 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10837 // CHECK14:       omp.loop.exit:
10838 // CHECK14-NEXT:    [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10839 // CHECK14-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
10840 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
10841 // CHECK14-NEXT:    br label [[OMP_PRECOND_END]]
10842 // CHECK14:       omp.precond.end:
10843 // CHECK14-NEXT:    ret void
10844 //
10845 //
10846 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..1
10847 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10848 // CHECK14-NEXT:  entry:
10849 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10850 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10851 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10852 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10853 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
10854 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10855 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
10856 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10857 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10858 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10859 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10860 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
10861 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
10862 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
10863 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10864 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10865 // CHECK14-NEXT:    [[I4:%.*]] = alloca i32, align 4
10866 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10867 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10868 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10869 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10870 // CHECK14-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
10871 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10872 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
10873 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
10874 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10875 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10876 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
10877 // CHECK14-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
10878 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10879 // CHECK14-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
10880 // CHECK14-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10881 // CHECK14-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
10882 // CHECK14-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
10883 // CHECK14-NEXT:    store i32 0, i32* [[I]], align 4
10884 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10885 // CHECK14-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
10886 // CHECK14-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10887 // CHECK14:       omp.precond.then:
10888 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
10889 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10890 // CHECK14-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
10891 // CHECK14-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
10892 // CHECK14-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
10893 // CHECK14-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
10894 // CHECK14-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
10895 // CHECK14-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
10896 // CHECK14-NEXT:    store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
10897 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
10898 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
10899 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10900 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
10901 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
10902 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10903 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10904 // CHECK14-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
10905 // CHECK14-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10906 // CHECK14:       cond.true:
10907 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
10908 // CHECK14-NEXT:    br label [[COND_END:%.*]]
10909 // CHECK14:       cond.false:
10910 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10911 // CHECK14-NEXT:    br label [[COND_END]]
10912 // CHECK14:       cond.end:
10913 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
10914 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
10915 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
10916 // CHECK14-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
10917 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10918 // CHECK14:       omp.inner.for.cond:
10919 // CHECK14-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10920 // CHECK14-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
10921 // CHECK14-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
10922 // CHECK14-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10923 // CHECK14:       omp.inner.for.body:
10924 // CHECK14-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10925 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
10926 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10927 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4
10928 // CHECK14-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I4]], align 4
10929 // CHECK14-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
10930 // CHECK14-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
10931 // CHECK14-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
10932 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
10933 // CHECK14:       omp.body.continue:
10934 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10935 // CHECK14:       omp.inner.for.inc:
10936 // CHECK14-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
10937 // CHECK14-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
10938 // CHECK14-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
10939 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
10940 // CHECK14:       omp.inner.for.end:
10941 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10942 // CHECK14:       omp.loop.exit:
10943 // CHECK14-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
10944 // CHECK14-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
10945 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
10946 // CHECK14-NEXT:    br label [[OMP_PRECOND_END]]
10947 // CHECK14:       omp.precond.end:
10948 // CHECK14-NEXT:    ret void
10949 //
10950 //
10951 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153
10952 // CHECK14-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10953 // CHECK14-NEXT:  entry:
10954 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
10955 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10956 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
10957 // CHECK14-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
10958 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10959 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
10960 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
10961 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10962 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10963 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
10964 // CHECK14-NEXT:    ret void
10965 //
10966 //
10967 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..2
10968 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10969 // CHECK14-NEXT:  entry:
10970 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
10971 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
10972 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
10973 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10974 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
10975 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10976 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10977 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10978 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10979 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
10980 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10981 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10982 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10983 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10984 // CHECK14-NEXT:    [[I3:%.*]] = alloca i32, align 4
10985 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
10986 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
10987 // CHECK14-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
10988 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
10989 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
10990 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
10991 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
10992 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
10993 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
10994 // CHECK14-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
10995 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
10996 // CHECK14-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
10997 // CHECK14-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10998 // CHECK14-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
10999 // CHECK14-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
11000 // CHECK14-NEXT:    store i32 0, i32* [[I]], align 4
11001 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11002 // CHECK14-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
11003 // CHECK14-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
11004 // CHECK14:       omp.precond.then:
11005 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11006 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11007 // CHECK14-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
11008 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11009 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11010 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11011 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
11012 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11013 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11014 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11015 // CHECK14-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
11016 // CHECK14-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11017 // CHECK14:       cond.true:
11018 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11019 // CHECK14-NEXT:    br label [[COND_END:%.*]]
11020 // CHECK14:       cond.false:
11021 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11022 // CHECK14-NEXT:    br label [[COND_END]]
11023 // CHECK14:       cond.end:
11024 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
11025 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11026 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11027 // CHECK14-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
11028 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11029 // CHECK14:       omp.inner.for.cond:
11030 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11031 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11032 // CHECK14-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
11033 // CHECK14-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11034 // CHECK14:       omp.inner.for.body:
11035 // CHECK14-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11036 // CHECK14-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
11037 // CHECK14-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11038 // CHECK14-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
11039 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])
11040 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11041 // CHECK14:       omp.inner.for.inc:
11042 // CHECK14-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11043 // CHECK14-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
11044 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
11045 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
11046 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
11047 // CHECK14:       omp.inner.for.end:
11048 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11049 // CHECK14:       omp.loop.exit:
11050 // CHECK14-NEXT:    [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11051 // CHECK14-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
11052 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
11053 // CHECK14-NEXT:    br label [[OMP_PRECOND_END]]
11054 // CHECK14:       omp.precond.end:
11055 // CHECK14-NEXT:    ret void
11056 //
11057 //
11058 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..3
11059 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
11060 // CHECK14-NEXT:  entry:
11061 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11062 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11063 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11064 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11065 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
11066 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
11067 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
11068 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11069 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11070 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
11071 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
11072 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11073 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
11074 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
11075 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11076 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11077 // CHECK14-NEXT:    [[I4:%.*]] = alloca i32, align 4
11078 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11079 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11080 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11081 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11082 // CHECK14-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
11083 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
11084 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
11085 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
11086 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
11087 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
11088 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
11089 // CHECK14-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
11090 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11091 // CHECK14-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
11092 // CHECK14-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
11093 // CHECK14-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
11094 // CHECK14-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
11095 // CHECK14-NEXT:    store i32 0, i32* [[I]], align 4
11096 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11097 // CHECK14-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
11098 // CHECK14-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
11099 // CHECK14:       omp.precond.then:
11100 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
11101 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11102 // CHECK14-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
11103 // CHECK14-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11104 // CHECK14-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
11105 // CHECK14-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11106 // CHECK14-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
11107 // CHECK14-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
11108 // CHECK14-NEXT:    store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
11109 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11110 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11111 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11112 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
11113 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11114 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11115 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11116 // CHECK14-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
11117 // CHECK14-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11118 // CHECK14:       cond.true:
11119 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11120 // CHECK14-NEXT:    br label [[COND_END:%.*]]
11121 // CHECK14:       cond.false:
11122 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11123 // CHECK14-NEXT:    br label [[COND_END]]
11124 // CHECK14:       cond.end:
11125 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
11126 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
11127 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11128 // CHECK14-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
11129 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11130 // CHECK14:       omp.inner.for.cond:
11131 // CHECK14-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11132 // CHECK14-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11133 // CHECK14-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
11134 // CHECK14-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11135 // CHECK14:       omp.inner.for.body:
11136 // CHECK14-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11137 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
11138 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11139 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4
11140 // CHECK14-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I4]], align 4
11141 // CHECK14-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
11142 // CHECK14-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
11143 // CHECK14-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
11144 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
11145 // CHECK14:       omp.body.continue:
11146 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11147 // CHECK14:       omp.inner.for.inc:
11148 // CHECK14-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11149 // CHECK14-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
11150 // CHECK14-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
11151 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
11152 // CHECK14:       omp.inner.for.end:
11153 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11154 // CHECK14:       omp.loop.exit:
11155 // CHECK14-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11156 // CHECK14-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
11157 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
11158 // CHECK14-NEXT:    br label [[OMP_PRECOND_END]]
11159 // CHECK14:       omp.precond.end:
11160 // CHECK14-NEXT:    ret void
11161 //
11162 //
11163 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158
11164 // CHECK14-SAME: (i64 [[M:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
11165 // CHECK14-NEXT:  entry:
11166 // CHECK14-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8
11167 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
11168 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
11169 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
11170 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
11171 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
11172 // CHECK14-NEXT:    store i64 [[M]], i64* [[M_ADDR]], align 8
11173 // CHECK14-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
11174 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
11175 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
11176 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
11177 // CHECK14-NEXT:    [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
11178 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
11179 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
11180 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
11181 // CHECK14-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
11182 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11183 // CHECK14-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
11184 // CHECK14-NEXT:    store i32 [[TMP3]], i32* [[CONV2]], align 4
11185 // CHECK14-NEXT:    [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
11186 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]])
11187 // CHECK14-NEXT:    ret void
11188 //
11189 //
11190 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..5
11191 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
11192 // CHECK14-NEXT:  entry:
11193 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11194 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11195 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
11196 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
11197 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
11198 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11199 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11200 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11201 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
11202 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
11203 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11204 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11205 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11206 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11207 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11208 // CHECK14-NEXT:    [[I4:%.*]] = alloca i32, align 4
11209 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
11210 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11211 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11212 // CHECK14-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
11213 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
11214 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
11215 // CHECK14-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
11216 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
11217 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
11218 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
11219 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
11220 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
11221 // CHECK14-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
11222 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11223 // CHECK14-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
11224 // CHECK14-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
11225 // CHECK14-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
11226 // CHECK14-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
11227 // CHECK14-NEXT:    store i32 0, i32* [[I]], align 4
11228 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11229 // CHECK14-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
11230 // CHECK14-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
11231 // CHECK14:       omp.precond.then:
11232 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11233 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
11234 // CHECK14-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
11235 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11236 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11237 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[CONV]], align 8
11238 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11239 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
11240 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])
11241 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11242 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
11243 // CHECK14-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
11244 // CHECK14-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11245 // CHECK14:       cond.true:
11246 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
11247 // CHECK14-NEXT:    br label [[COND_END:%.*]]
11248 // CHECK14:       cond.false:
11249 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11250 // CHECK14-NEXT:    br label [[COND_END]]
11251 // CHECK14:       cond.end:
11252 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
11253 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11254 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11255 // CHECK14-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
11256 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11257 // CHECK14:       omp.inner.for.cond:
11258 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11259 // CHECK14-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
11260 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP16]], 1
11261 // CHECK14-NEXT:    [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]]
11262 // CHECK14-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11263 // CHECK14:       omp.inner.for.body:
11264 // CHECK14-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11265 // CHECK14-NEXT:    [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
11266 // CHECK14-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11267 // CHECK14-NEXT:    [[TMP20:%.*]] = zext i32 [[TMP19]] to i64
11268 // CHECK14-NEXT:    [[TMP21:%.*]] = load i32, i32* [[CONV]], align 8
11269 // CHECK14-NEXT:    [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
11270 // CHECK14-NEXT:    store i32 [[TMP21]], i32* [[CONV7]], align 4
11271 // CHECK14-NEXT:    [[TMP22:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
11272 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP22]])
11273 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11274 // CHECK14:       omp.inner.for.inc:
11275 // CHECK14-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11276 // CHECK14-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
11277 // CHECK14-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
11278 // CHECK14-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
11279 // CHECK14-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11280 // CHECK14-NEXT:    [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
11281 // CHECK14-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]
11282 // CHECK14-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4
11283 // CHECK14-NEXT:    [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11284 // CHECK14-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
11285 // CHECK14-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP27]], [[TMP28]]
11286 // CHECK14-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4
11287 // CHECK14-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11288 // CHECK14-NEXT:    [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
11289 // CHECK14-NEXT:    [[CMP11:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]]
11290 // CHECK14-NEXT:    br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]]
11291 // CHECK14:       cond.true12:
11292 // CHECK14-NEXT:    [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
11293 // CHECK14-NEXT:    br label [[COND_END14:%.*]]
11294 // CHECK14:       cond.false13:
11295 // CHECK14-NEXT:    [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11296 // CHECK14-NEXT:    br label [[COND_END14]]
11297 // CHECK14:       cond.end14:
11298 // CHECK14-NEXT:    [[COND15:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE12]] ], [ [[TMP32]], [[COND_FALSE13]] ]
11299 // CHECK14-NEXT:    store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4
11300 // CHECK14-NEXT:    [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11301 // CHECK14-NEXT:    store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4
11302 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
11303 // CHECK14:       omp.inner.for.end:
11304 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11305 // CHECK14:       omp.loop.exit:
11306 // CHECK14-NEXT:    [[TMP34:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11307 // CHECK14-NEXT:    [[TMP35:%.*]] = load i32, i32* [[TMP34]], align 4
11308 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP35]])
11309 // CHECK14-NEXT:    br label [[OMP_PRECOND_END]]
11310 // CHECK14:       omp.precond.end:
11311 // CHECK14-NEXT:    ret void
11312 //
11313 //
11314 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..6
11315 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
11316 // CHECK14-NEXT:  entry:
11317 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11318 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11319 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11320 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11321 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
11322 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
11323 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
11324 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11325 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11326 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11327 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
11328 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
11329 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11330 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
11331 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
11332 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11333 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11334 // CHECK14-NEXT:    [[I6:%.*]] = alloca i32, align 4
11335 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11336 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11337 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11338 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11339 // CHECK14-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
11340 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
11341 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
11342 // CHECK14-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
11343 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
11344 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
11345 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
11346 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
11347 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
11348 // CHECK14-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
11349 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11350 // CHECK14-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
11351 // CHECK14-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
11352 // CHECK14-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
11353 // CHECK14-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
11354 // CHECK14-NEXT:    store i32 0, i32* [[I]], align 4
11355 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11356 // CHECK14-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
11357 // CHECK14-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
11358 // CHECK14:       omp.precond.then:
11359 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
11360 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
11361 // CHECK14-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
11362 // CHECK14-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11363 // CHECK14-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
11364 // CHECK14-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11365 // CHECK14-NEXT:    [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32
11366 // CHECK14-NEXT:    store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4
11367 // CHECK14-NEXT:    store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
11368 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11369 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11370 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11371 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
11372 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11373 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11374 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
11375 // CHECK14-NEXT:    [[CMP7:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
11376 // CHECK14-NEXT:    br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11377 // CHECK14:       cond.true:
11378 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
11379 // CHECK14-NEXT:    br label [[COND_END:%.*]]
11380 // CHECK14:       cond.false:
11381 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11382 // CHECK14-NEXT:    br label [[COND_END]]
11383 // CHECK14:       cond.end:
11384 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
11385 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
11386 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11387 // CHECK14-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
11388 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11389 // CHECK14:       omp.inner.for.cond:
11390 // CHECK14-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11391 // CHECK14-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11392 // CHECK14-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
11393 // CHECK14-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11394 // CHECK14:       omp.inner.for.body:
11395 // CHECK14-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11396 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
11397 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11398 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I6]], align 4
11399 // CHECK14-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I6]], align 4
11400 // CHECK14-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
11401 // CHECK14-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
11402 // CHECK14-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
11403 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
11404 // CHECK14:       omp.body.continue:
11405 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11406 // CHECK14:       omp.inner.for.inc:
11407 // CHECK14-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11408 // CHECK14-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1
11409 // CHECK14-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
11410 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
11411 // CHECK14:       omp.inner.for.end:
11412 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11413 // CHECK14:       omp.loop.exit:
11414 // CHECK14-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11415 // CHECK14-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
11416 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
11417 // CHECK14-NEXT:    br label [[OMP_PRECOND_END]]
11418 // CHECK14:       omp.precond.end:
11419 // CHECK14-NEXT:    ret void
11420 //
11421 //
11422 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163
11423 // CHECK14-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
11424 // CHECK14-NEXT:  entry:
11425 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
11426 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
11427 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
11428 // CHECK14-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
11429 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
11430 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
11431 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
11432 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
11433 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
11434 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
11435 // CHECK14-NEXT:    ret void
11436 //
11437 //
11438 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..8
11439 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
11440 // CHECK14-NEXT:  entry:
11441 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11442 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11443 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
11444 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
11445 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
11446 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11447 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11448 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
11449 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
11450 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11451 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11452 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11453 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11454 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11455 // CHECK14-NEXT:    [[I3:%.*]] = alloca i32, align 4
11456 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11457 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11458 // CHECK14-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
11459 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
11460 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
11461 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
11462 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
11463 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
11464 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
11465 // CHECK14-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
11466 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11467 // CHECK14-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
11468 // CHECK14-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
11469 // CHECK14-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
11470 // CHECK14-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
11471 // CHECK14-NEXT:    store i32 0, i32* [[I]], align 4
11472 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11473 // CHECK14-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
11474 // CHECK14-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
11475 // CHECK14:       omp.precond.then:
11476 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11477 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11478 // CHECK14-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
11479 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11480 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11481 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11482 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
11483 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11484 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11485 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11486 // CHECK14-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
11487 // CHECK14-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11488 // CHECK14:       cond.true:
11489 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11490 // CHECK14-NEXT:    br label [[COND_END:%.*]]
11491 // CHECK14:       cond.false:
11492 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11493 // CHECK14-NEXT:    br label [[COND_END]]
11494 // CHECK14:       cond.end:
11495 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
11496 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11497 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11498 // CHECK14-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
11499 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11500 // CHECK14:       omp.inner.for.cond:
11501 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11502 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11503 // CHECK14-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
11504 // CHECK14-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11505 // CHECK14:       omp.inner.for.body:
11506 // CHECK14-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11507 // CHECK14-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
11508 // CHECK14-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11509 // CHECK14-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
11510 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])
11511 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11512 // CHECK14:       omp.inner.for.inc:
11513 // CHECK14-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11514 // CHECK14-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
11515 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
11516 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
11517 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
11518 // CHECK14:       omp.inner.for.end:
11519 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11520 // CHECK14:       omp.loop.exit:
11521 // CHECK14-NEXT:    [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11522 // CHECK14-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
11523 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
11524 // CHECK14-NEXT:    br label [[OMP_PRECOND_END]]
11525 // CHECK14:       omp.precond.end:
11526 // CHECK14-NEXT:    ret void
11527 //
11528 //
11529 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..9
11530 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
11531 // CHECK14-NEXT:  entry:
11532 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11533 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11534 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11535 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11536 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
11537 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
11538 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
11539 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11540 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11541 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
11542 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
11543 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11544 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
11545 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
11546 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11547 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11548 // CHECK14-NEXT:    [[I4:%.*]] = alloca i32, align 4
11549 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11550 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11551 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11552 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11553 // CHECK14-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
11554 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
11555 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
11556 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
11557 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
11558 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
11559 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
11560 // CHECK14-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
11561 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11562 // CHECK14-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
11563 // CHECK14-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
11564 // CHECK14-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
11565 // CHECK14-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
11566 // CHECK14-NEXT:    store i32 0, i32* [[I]], align 4
11567 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11568 // CHECK14-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
11569 // CHECK14-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
11570 // CHECK14:       omp.precond.then:
11571 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
11572 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11573 // CHECK14-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
11574 // CHECK14-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11575 // CHECK14-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
11576 // CHECK14-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11577 // CHECK14-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
11578 // CHECK14-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
11579 // CHECK14-NEXT:    store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
11580 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11581 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11582 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11583 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11584 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11585 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
11586 // CHECK14-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1)
11587 // CHECK14-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
11588 // CHECK14:       omp.dispatch.cond:
11589 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11590 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
11591 // CHECK14-NEXT:    [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
11592 // CHECK14-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
11593 // CHECK14-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
11594 // CHECK14:       omp.dispatch.body:
11595 // CHECK14-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11596 // CHECK14-NEXT:    store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
11597 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11598 // CHECK14:       omp.inner.for.cond:
11599 // CHECK14-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
11600 // CHECK14-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14
11601 // CHECK14-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
11602 // CHECK14-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11603 // CHECK14:       omp.inner.for.body:
11604 // CHECK14-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
11605 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
11606 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11607 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !14
11608 // CHECK14-NEXT:    [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !14
11609 // CHECK14-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64
11610 // CHECK14-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
11611 // CHECK14-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !14
11612 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
11613 // CHECK14:       omp.body.continue:
11614 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11615 // CHECK14:       omp.inner.for.inc:
11616 // CHECK14-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
11617 // CHECK14-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1
11618 // CHECK14-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
11619 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
11620 // CHECK14:       omp.inner.for.end:
11621 // CHECK14-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
11622 // CHECK14:       omp.dispatch.inc:
11623 // CHECK14-NEXT:    br label [[OMP_DISPATCH_COND]]
11624 // CHECK14:       omp.dispatch.end:
11625 // CHECK14-NEXT:    br label [[OMP_PRECOND_END]]
11626 // CHECK14:       omp.precond.end:
11627 // CHECK14-NEXT:    ret void
11628 //
11629 //
11630 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168
11631 // CHECK14-SAME: (i64 [[M:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
11632 // CHECK14-NEXT:  entry:
11633 // CHECK14-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8
11634 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
11635 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
11636 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
11637 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
11638 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
11639 // CHECK14-NEXT:    store i64 [[M]], i64* [[M_ADDR]], align 8
11640 // CHECK14-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
11641 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
11642 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
11643 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
11644 // CHECK14-NEXT:    [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
11645 // CHECK14-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
11646 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
11647 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
11648 // CHECK14-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
11649 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
11650 // CHECK14-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
11651 // CHECK14-NEXT:    store i32 [[TMP3]], i32* [[CONV2]], align 4
11652 // CHECK14-NEXT:    [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
11653 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]])
11654 // CHECK14-NEXT:    ret void
11655 //
11656 //
11657 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..11
11658 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
11659 // CHECK14-NEXT:  entry:
11660 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11661 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11662 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
11663 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
11664 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
11665 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11666 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11667 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11668 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
11669 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
11670 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11671 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11672 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11673 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11674 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11675 // CHECK14-NEXT:    [[I4:%.*]] = alloca i32, align 4
11676 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
11677 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11678 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11679 // CHECK14-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
11680 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
11681 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
11682 // CHECK14-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
11683 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
11684 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
11685 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
11686 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
11687 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
11688 // CHECK14-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
11689 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11690 // CHECK14-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
11691 // CHECK14-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
11692 // CHECK14-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
11693 // CHECK14-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
11694 // CHECK14-NEXT:    store i32 0, i32* [[I]], align 4
11695 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11696 // CHECK14-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
11697 // CHECK14-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
11698 // CHECK14:       omp.precond.then:
11699 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
11700 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
11701 // CHECK14-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
11702 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11703 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11704 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11705 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
11706 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
11707 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11708 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
11709 // CHECK14-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
11710 // CHECK14-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11711 // CHECK14:       cond.true:
11712 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
11713 // CHECK14-NEXT:    br label [[COND_END:%.*]]
11714 // CHECK14:       cond.false:
11715 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11716 // CHECK14-NEXT:    br label [[COND_END]]
11717 // CHECK14:       cond.end:
11718 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
11719 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
11720 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11721 // CHECK14-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
11722 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11723 // CHECK14:       omp.inner.for.cond:
11724 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11725 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11726 // CHECK14-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
11727 // CHECK14-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11728 // CHECK14:       omp.inner.for.body:
11729 // CHECK14-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
11730 // CHECK14-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
11731 // CHECK14-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
11732 // CHECK14-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
11733 // CHECK14-NEXT:    [[TMP20:%.*]] = load i32, i32* [[CONV]], align 8
11734 // CHECK14-NEXT:    [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
11735 // CHECK14-NEXT:    store i32 [[TMP20]], i32* [[CONV7]], align 4
11736 // CHECK14-NEXT:    [[TMP21:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
11737 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP21]])
11738 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11739 // CHECK14:       omp.inner.for.inc:
11740 // CHECK14-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
11741 // CHECK14-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
11742 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
11743 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
11744 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
11745 // CHECK14:       omp.inner.for.end:
11746 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11747 // CHECK14:       omp.loop.exit:
11748 // CHECK14-NEXT:    [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11749 // CHECK14-NEXT:    [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4
11750 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]])
11751 // CHECK14-NEXT:    br label [[OMP_PRECOND_END]]
11752 // CHECK14:       omp.precond.end:
11753 // CHECK14-NEXT:    ret void
11754 //
11755 //
11756 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..12
11757 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
11758 // CHECK14-NEXT:  entry:
11759 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
11760 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
11761 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11762 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11763 // CHECK14-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
11764 // CHECK14-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
11765 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
11766 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11767 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11768 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11769 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
11770 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
11771 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
11772 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
11773 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
11774 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11775 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11776 // CHECK14-NEXT:    [[I6:%.*]] = alloca i32, align 4
11777 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
11778 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
11779 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11780 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11781 // CHECK14-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
11782 // CHECK14-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
11783 // CHECK14-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
11784 // CHECK14-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
11785 // CHECK14-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
11786 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
11787 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
11788 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
11789 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
11790 // CHECK14-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
11791 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11792 // CHECK14-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
11793 // CHECK14-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
11794 // CHECK14-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
11795 // CHECK14-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
11796 // CHECK14-NEXT:    store i32 0, i32* [[I]], align 4
11797 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
11798 // CHECK14-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
11799 // CHECK14-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
11800 // CHECK14:       omp.precond.then:
11801 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
11802 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
11803 // CHECK14-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
11804 // CHECK14-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
11805 // CHECK14-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
11806 // CHECK14-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
11807 // CHECK14-NEXT:    [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32
11808 // CHECK14-NEXT:    store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4
11809 // CHECK14-NEXT:    store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
11810 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
11811 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
11812 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[CONV]], align 8
11813 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11814 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
11815 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11816 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
11817 // CHECK14-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 1073741859, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]])
11818 // CHECK14-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
11819 // CHECK14:       omp.dispatch.cond:
11820 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
11821 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
11822 // CHECK14-NEXT:    [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
11823 // CHECK14-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0
11824 // CHECK14-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
11825 // CHECK14:       omp.dispatch.body:
11826 // CHECK14-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
11827 // CHECK14-NEXT:    store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4
11828 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11829 // CHECK14:       omp.inner.for.cond:
11830 // CHECK14-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
11831 // CHECK14-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !17
11832 // CHECK14-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
11833 // CHECK14-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11834 // CHECK14:       omp.inner.for.body:
11835 // CHECK14-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
11836 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
11837 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11838 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !17
11839 // CHECK14-NEXT:    [[TMP21:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !17
11840 // CHECK14-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64
11841 // CHECK14-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
11842 // CHECK14-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !17
11843 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
11844 // CHECK14:       omp.body.continue:
11845 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11846 // CHECK14:       omp.inner.for.inc:
11847 // CHECK14-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
11848 // CHECK14-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP22]], 1
11849 // CHECK14-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
11850 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
11851 // CHECK14:       omp.inner.for.end:
11852 // CHECK14-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
11853 // CHECK14:       omp.dispatch.inc:
11854 // CHECK14-NEXT:    br label [[OMP_DISPATCH_COND]]
11855 // CHECK14:       omp.dispatch.end:
11856 // CHECK14-NEXT:    br label [[OMP_PRECOND_END]]
11857 // CHECK14:       omp.precond.end:
11858 // CHECK14-NEXT:    ret void
11859 //
11860 //
11861 // CHECK14-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
11862 // CHECK14-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
11863 // CHECK14-NEXT:  entry:
11864 // CHECK14-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
11865 // CHECK14-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
11866 // CHECK14-NEXT:    [[M:%.*]] = alloca i32, align 4
11867 // CHECK14-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
11868 // CHECK14-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
11869 // CHECK14-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
11870 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11871 // CHECK14-NEXT:    [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8
11872 // CHECK14-NEXT:    [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8
11873 // CHECK14-NEXT:    [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8
11874 // CHECK14-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
11875 // CHECK14-NEXT:    [[M_CASTED:%.*]] = alloca i64, align 8
11876 // CHECK14-NEXT:    [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 8
11877 // CHECK14-NEXT:    [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 8
11878 // CHECK14-NEXT:    [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 8
11879 // CHECK14-NEXT:    [[_TMP10:%.*]] = alloca i32, align 4
11880 // CHECK14-NEXT:    [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 8
11881 // CHECK14-NEXT:    [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 8
11882 // CHECK14-NEXT:    [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 8
11883 // CHECK14-NEXT:    [[_TMP16:%.*]] = alloca i32, align 4
11884 // CHECK14-NEXT:    [[M_CASTED19:%.*]] = alloca i64, align 8
11885 // CHECK14-NEXT:    [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [2 x i8*], align 8
11886 // CHECK14-NEXT:    [[DOTOFFLOAD_PTRS22:%.*]] = alloca [2 x i8*], align 8
11887 // CHECK14-NEXT:    [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [2 x i8*], align 8
11888 // CHECK14-NEXT:    [[_TMP24:%.*]] = alloca i32, align 4
11889 // CHECK14-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
11890 // CHECK14-NEXT:    store i32 10, i32* [[M]], align 4
11891 // CHECK14-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
11892 // CHECK14-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
11893 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8
11894 // CHECK14-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
11895 // CHECK14-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
11896 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8
11897 // CHECK14-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
11898 // CHECK14-NEXT:    store i8* null, i8** [[TMP4]], align 8
11899 // CHECK14-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
11900 // CHECK14-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
11901 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
11902 // CHECK14-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
11903 // CHECK14-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
11904 // CHECK14-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
11905 // CHECK14:       omp_offload.failed:
11906 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]]
11907 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT]]
11908 // CHECK14:       omp_offload.cont:
11909 // CHECK14-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
11910 // CHECK14-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
11911 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8
11912 // CHECK14-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
11913 // CHECK14-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
11914 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8
11915 // CHECK14-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0
11916 // CHECK14-NEXT:    store i8* null, i8** [[TMP13]], align 8
11917 // CHECK14-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
11918 // CHECK14-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
11919 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
11920 // CHECK14-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
11921 // CHECK14-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
11922 // CHECK14-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
11923 // CHECK14:       omp_offload.failed5:
11924 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121([10 x i32]* [[A]]) #[[ATTR3]]
11925 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT6]]
11926 // CHECK14:       omp_offload.cont6:
11927 // CHECK14-NEXT:    [[TMP18:%.*]] = load i32, i32* [[M]], align 4
11928 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[M_CASTED]] to i32*
11929 // CHECK14-NEXT:    store i32 [[TMP18]], i32* [[CONV]], align 4
11930 // CHECK14-NEXT:    [[TMP19:%.*]] = load i64, i64* [[M_CASTED]], align 8
11931 // CHECK14-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
11932 // CHECK14-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64*
11933 // CHECK14-NEXT:    store i64 [[TMP19]], i64* [[TMP21]], align 8
11934 // CHECK14-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
11935 // CHECK14-NEXT:    [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64*
11936 // CHECK14-NEXT:    store i64 [[TMP19]], i64* [[TMP23]], align 8
11937 // CHECK14-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0
11938 // CHECK14-NEXT:    store i8* null, i8** [[TMP24]], align 8
11939 // CHECK14-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1
11940 // CHECK14-NEXT:    [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]**
11941 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 8
11942 // CHECK14-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1
11943 // CHECK14-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]**
11944 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 8
11945 // CHECK14-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 1
11946 // CHECK14-NEXT:    store i8* null, i8** [[TMP29]], align 8
11947 // CHECK14-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
11948 // CHECK14-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
11949 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
11950 // CHECK14-NEXT:    [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
11951 // CHECK14-NEXT:    [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
11952 // CHECK14-NEXT:    br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
11953 // CHECK14:       omp_offload.failed11:
11954 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i64 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]]
11955 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT12]]
11956 // CHECK14:       omp_offload.cont12:
11957 // CHECK14-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
11958 // CHECK14-NEXT:    [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]**
11959 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 8
11960 // CHECK14-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
11961 // CHECK14-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]**
11962 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 8
11963 // CHECK14-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i64 0, i64 0
11964 // CHECK14-NEXT:    store i8* null, i8** [[TMP38]], align 8
11965 // CHECK14-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
11966 // CHECK14-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
11967 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
11968 // CHECK14-NEXT:    [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
11969 // CHECK14-NEXT:    [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0
11970 // CHECK14-NEXT:    br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
11971 // CHECK14:       omp_offload.failed17:
11972 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131([10 x i32]* [[A]]) #[[ATTR3]]
11973 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT18]]
11974 // CHECK14:       omp_offload.cont18:
11975 // CHECK14-NEXT:    [[TMP43:%.*]] = load i32, i32* [[M]], align 4
11976 // CHECK14-NEXT:    [[CONV20:%.*]] = bitcast i64* [[M_CASTED19]] to i32*
11977 // CHECK14-NEXT:    store i32 [[TMP43]], i32* [[CONV20]], align 4
11978 // CHECK14-NEXT:    [[TMP44:%.*]] = load i64, i64* [[M_CASTED19]], align 8
11979 // CHECK14-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
11980 // CHECK14-NEXT:    [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64*
11981 // CHECK14-NEXT:    store i64 [[TMP44]], i64* [[TMP46]], align 8
11982 // CHECK14-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
11983 // CHECK14-NEXT:    [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64*
11984 // CHECK14-NEXT:    store i64 [[TMP44]], i64* [[TMP48]], align 8
11985 // CHECK14-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0
11986 // CHECK14-NEXT:    store i8* null, i8** [[TMP49]], align 8
11987 // CHECK14-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1
11988 // CHECK14-NEXT:    [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]**
11989 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 8
11990 // CHECK14-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1
11991 // CHECK14-NEXT:    [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]**
11992 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 8
11993 // CHECK14-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1
11994 // CHECK14-NEXT:    store i8* null, i8** [[TMP54]], align 8
11995 // CHECK14-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
11996 // CHECK14-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
11997 // CHECK14-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
11998 // CHECK14-NEXT:    [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
11999 // CHECK14-NEXT:    [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0
12000 // CHECK14-NEXT:    br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED25:%.*]], label [[OMP_OFFLOAD_CONT26:%.*]]
12001 // CHECK14:       omp_offload.failed25:
12002 // CHECK14-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i64 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]]
12003 // CHECK14-NEXT:    br label [[OMP_OFFLOAD_CONT26]]
12004 // CHECK14:       omp_offload.cont26:
12005 // CHECK14-NEXT:    ret i32 0
12006 //
12007 //
12008 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
12009 // CHECK14-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
12010 // CHECK14-NEXT:  entry:
12011 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
12012 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
12013 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
12014 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
12015 // CHECK14-NEXT:    ret void
12016 //
12017 //
12018 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..14
12019 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
12020 // CHECK14-NEXT:  entry:
12021 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12022 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12023 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
12024 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
12025 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12026 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12027 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12028 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12029 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12030 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
12031 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12032 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12033 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
12034 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
12035 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
12036 // CHECK14-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
12037 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12038 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12039 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12040 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
12041 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12042 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12043 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
12044 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12045 // CHECK14:       cond.true:
12046 // CHECK14-NEXT:    br label [[COND_END:%.*]]
12047 // CHECK14:       cond.false:
12048 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12049 // CHECK14-NEXT:    br label [[COND_END]]
12050 // CHECK14:       cond.end:
12051 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
12052 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
12053 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12054 // CHECK14-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
12055 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
12056 // CHECK14:       omp.inner.for.cond:
12057 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12058 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12059 // CHECK14-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
12060 // CHECK14-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12061 // CHECK14:       omp.inner.for.body:
12062 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12063 // CHECK14-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
12064 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12065 // CHECK14-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
12066 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
12067 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
12068 // CHECK14:       omp.inner.for.inc:
12069 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12070 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
12071 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
12072 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
12073 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
12074 // CHECK14:       omp.inner.for.end:
12075 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
12076 // CHECK14:       omp.loop.exit:
12077 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
12078 // CHECK14-NEXT:    ret void
12079 //
12080 //
12081 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..15
12082 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
12083 // CHECK14-NEXT:  entry:
12084 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12085 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12086 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
12087 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
12088 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
12089 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
12090 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12091 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
12092 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
12093 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12094 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12095 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
12096 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12097 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12098 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12099 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12100 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
12101 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
12102 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
12103 // CHECK14-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
12104 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12105 // CHECK14-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
12106 // CHECK14-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12107 // CHECK14-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
12108 // CHECK14-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
12109 // CHECK14-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
12110 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12111 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12112 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12113 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
12114 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12115 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12116 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
12117 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12118 // CHECK14:       cond.true:
12119 // CHECK14-NEXT:    br label [[COND_END:%.*]]
12120 // CHECK14:       cond.false:
12121 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12122 // CHECK14-NEXT:    br label [[COND_END]]
12123 // CHECK14:       cond.end:
12124 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
12125 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
12126 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12127 // CHECK14-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
12128 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
12129 // CHECK14:       omp.inner.for.cond:
12130 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12131 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12132 // CHECK14-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
12133 // CHECK14-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12134 // CHECK14:       omp.inner.for.body:
12135 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12136 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
12137 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12138 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
12139 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
12140 // CHECK14-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
12141 // CHECK14-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
12142 // CHECK14-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
12143 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
12144 // CHECK14:       omp.body.continue:
12145 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
12146 // CHECK14:       omp.inner.for.inc:
12147 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12148 // CHECK14-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
12149 // CHECK14-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
12150 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
12151 // CHECK14:       omp.inner.for.end:
12152 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
12153 // CHECK14:       omp.loop.exit:
12154 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
12155 // CHECK14-NEXT:    ret void
12156 //
12157 //
12158 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121
12159 // CHECK14-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
12160 // CHECK14-NEXT:  entry:
12161 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
12162 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
12163 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
12164 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
12165 // CHECK14-NEXT:    ret void
12166 //
12167 //
12168 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..17
12169 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
12170 // CHECK14-NEXT:  entry:
12171 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12172 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12173 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
12174 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
12175 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12176 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12177 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12178 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12179 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12180 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
12181 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12182 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12183 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
12184 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
12185 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
12186 // CHECK14-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
12187 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12188 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12189 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12190 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
12191 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12192 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12193 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
12194 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12195 // CHECK14:       cond.true:
12196 // CHECK14-NEXT:    br label [[COND_END:%.*]]
12197 // CHECK14:       cond.false:
12198 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12199 // CHECK14-NEXT:    br label [[COND_END]]
12200 // CHECK14:       cond.end:
12201 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
12202 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
12203 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12204 // CHECK14-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
12205 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
12206 // CHECK14:       omp.inner.for.cond:
12207 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12208 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12209 // CHECK14-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
12210 // CHECK14-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12211 // CHECK14:       omp.inner.for.body:
12212 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12213 // CHECK14-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
12214 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12215 // CHECK14-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
12216 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
12217 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
12218 // CHECK14:       omp.inner.for.inc:
12219 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12220 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
12221 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
12222 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
12223 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
12224 // CHECK14:       omp.inner.for.end:
12225 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
12226 // CHECK14:       omp.loop.exit:
12227 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
12228 // CHECK14-NEXT:    ret void
12229 //
12230 //
12231 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..18
12232 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
12233 // CHECK14-NEXT:  entry:
12234 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12235 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12236 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
12237 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
12238 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
12239 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
12240 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12241 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
12242 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
12243 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12244 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12245 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
12246 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12247 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12248 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12249 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12250 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
12251 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
12252 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
12253 // CHECK14-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
12254 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12255 // CHECK14-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
12256 // CHECK14-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12257 // CHECK14-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
12258 // CHECK14-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
12259 // CHECK14-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
12260 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12261 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12262 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12263 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
12264 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12265 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12266 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
12267 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12268 // CHECK14:       cond.true:
12269 // CHECK14-NEXT:    br label [[COND_END:%.*]]
12270 // CHECK14:       cond.false:
12271 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12272 // CHECK14-NEXT:    br label [[COND_END]]
12273 // CHECK14:       cond.end:
12274 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
12275 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
12276 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12277 // CHECK14-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
12278 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
12279 // CHECK14:       omp.inner.for.cond:
12280 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12281 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12282 // CHECK14-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
12283 // CHECK14-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12284 // CHECK14:       omp.inner.for.body:
12285 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12286 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
12287 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12288 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
12289 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
12290 // CHECK14-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
12291 // CHECK14-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
12292 // CHECK14-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
12293 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
12294 // CHECK14:       omp.body.continue:
12295 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
12296 // CHECK14:       omp.inner.for.inc:
12297 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12298 // CHECK14-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
12299 // CHECK14-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
12300 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
12301 // CHECK14:       omp.inner.for.end:
12302 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
12303 // CHECK14:       omp.loop.exit:
12304 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
12305 // CHECK14-NEXT:    ret void
12306 //
12307 //
12308 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126
12309 // CHECK14-SAME: (i64 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
12310 // CHECK14-NEXT:  entry:
12311 // CHECK14-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8
12312 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
12313 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
12314 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
12315 // CHECK14-NEXT:    store i64 [[M]], i64* [[M_ADDR]], align 8
12316 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
12317 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
12318 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
12319 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
12320 // CHECK14-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
12321 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12322 // CHECK14-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
12323 // CHECK14-NEXT:    store i32 [[TMP2]], i32* [[CONV1]], align 4
12324 // CHECK14-NEXT:    [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
12325 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]])
12326 // CHECK14-NEXT:    ret void
12327 //
12328 //
12329 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..21
12330 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
12331 // CHECK14-NEXT:  entry:
12332 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12333 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12334 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
12335 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
12336 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
12337 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12338 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12339 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12340 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12341 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12342 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
12343 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
12344 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12345 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12346 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
12347 // CHECK14-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
12348 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
12349 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
12350 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
12351 // CHECK14-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
12352 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12353 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12354 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12355 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
12356 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12357 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12358 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
12359 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12360 // CHECK14:       cond.true:
12361 // CHECK14-NEXT:    br label [[COND_END:%.*]]
12362 // CHECK14:       cond.false:
12363 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12364 // CHECK14-NEXT:    br label [[COND_END]]
12365 // CHECK14:       cond.end:
12366 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
12367 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
12368 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12369 // CHECK14-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
12370 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
12371 // CHECK14:       omp.inner.for.cond:
12372 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12373 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12374 // CHECK14-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
12375 // CHECK14-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12376 // CHECK14:       omp.inner.for.body:
12377 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12378 // CHECK14-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
12379 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12380 // CHECK14-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
12381 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8
12382 // CHECK14-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
12383 // CHECK14-NEXT:    store i32 [[TMP12]], i32* [[CONV2]], align 4
12384 // CHECK14-NEXT:    [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
12385 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]])
12386 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
12387 // CHECK14:       omp.inner.for.inc:
12388 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12389 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
12390 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
12391 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
12392 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
12393 // CHECK14:       omp.inner.for.end:
12394 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
12395 // CHECK14:       omp.loop.exit:
12396 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
12397 // CHECK14-NEXT:    ret void
12398 //
12399 //
12400 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..22
12401 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
12402 // CHECK14-NEXT:  entry:
12403 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12404 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12405 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
12406 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
12407 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
12408 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
12409 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
12410 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12411 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
12412 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
12413 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12414 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12415 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
12416 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12417 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12418 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12419 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12420 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
12421 // CHECK14-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
12422 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
12423 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
12424 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
12425 // CHECK14-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
12426 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12427 // CHECK14-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
12428 // CHECK14-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12429 // CHECK14-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
12430 // CHECK14-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
12431 // CHECK14-NEXT:    store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
12432 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12433 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12434 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
12435 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12436 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
12437 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
12438 // CHECK14-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
12439 // CHECK14:       omp.dispatch.cond:
12440 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12441 // CHECK14-NEXT:    [[CONV3:%.*]] = sext i32 [[TMP6]] to i64
12442 // CHECK14-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12443 // CHECK14-NEXT:    [[CMP:%.*]] = icmp ugt i64 [[CONV3]], [[TMP7]]
12444 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12445 // CHECK14:       cond.true:
12446 // CHECK14-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12447 // CHECK14-NEXT:    br label [[COND_END:%.*]]
12448 // CHECK14:       cond.false:
12449 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12450 // CHECK14-NEXT:    [[CONV4:%.*]] = sext i32 [[TMP9]] to i64
12451 // CHECK14-NEXT:    br label [[COND_END]]
12452 // CHECK14:       cond.end:
12453 // CHECK14-NEXT:    [[COND:%.*]] = phi i64 [ [[TMP8]], [[COND_TRUE]] ], [ [[CONV4]], [[COND_FALSE]] ]
12454 // CHECK14-NEXT:    [[CONV5:%.*]] = trunc i64 [[COND]] to i32
12455 // CHECK14-NEXT:    store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
12456 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12457 // CHECK14-NEXT:    store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
12458 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12459 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12460 // CHECK14-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
12461 // CHECK14-NEXT:    br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
12462 // CHECK14:       omp.dispatch.body:
12463 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
12464 // CHECK14:       omp.inner.for.cond:
12465 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12466 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12467 // CHECK14-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
12468 // CHECK14-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12469 // CHECK14:       omp.inner.for.body:
12470 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12471 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
12472 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12473 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
12474 // CHECK14-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I]], align 4
12475 // CHECK14-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
12476 // CHECK14-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
12477 // CHECK14-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
12478 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
12479 // CHECK14:       omp.body.continue:
12480 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
12481 // CHECK14:       omp.inner.for.inc:
12482 // CHECK14-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12483 // CHECK14-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP17]], 1
12484 // CHECK14-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
12485 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
12486 // CHECK14:       omp.inner.for.end:
12487 // CHECK14-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
12488 // CHECK14:       omp.dispatch.inc:
12489 // CHECK14-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12490 // CHECK14-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
12491 // CHECK14-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
12492 // CHECK14-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4
12493 // CHECK14-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12494 // CHECK14-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
12495 // CHECK14-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
12496 // CHECK14-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4
12497 // CHECK14-NEXT:    br label [[OMP_DISPATCH_COND]]
12498 // CHECK14:       omp.dispatch.end:
12499 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
12500 // CHECK14-NEXT:    ret void
12501 //
12502 //
12503 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131
12504 // CHECK14-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
12505 // CHECK14-NEXT:  entry:
12506 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
12507 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
12508 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
12509 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
12510 // CHECK14-NEXT:    ret void
12511 //
12512 //
12513 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..25
12514 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
12515 // CHECK14-NEXT:  entry:
12516 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12517 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12518 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
12519 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
12520 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12521 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12522 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12523 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12524 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12525 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
12526 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12527 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12528 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
12529 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
12530 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
12531 // CHECK14-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
12532 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12533 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12534 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12535 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
12536 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12537 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12538 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
12539 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12540 // CHECK14:       cond.true:
12541 // CHECK14-NEXT:    br label [[COND_END:%.*]]
12542 // CHECK14:       cond.false:
12543 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12544 // CHECK14-NEXT:    br label [[COND_END]]
12545 // CHECK14:       cond.end:
12546 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
12547 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
12548 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12549 // CHECK14-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
12550 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
12551 // CHECK14:       omp.inner.for.cond:
12552 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12553 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12554 // CHECK14-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
12555 // CHECK14-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12556 // CHECK14:       omp.inner.for.body:
12557 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12558 // CHECK14-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
12559 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12560 // CHECK14-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
12561 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
12562 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
12563 // CHECK14:       omp.inner.for.inc:
12564 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12565 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
12566 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
12567 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
12568 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
12569 // CHECK14:       omp.inner.for.end:
12570 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
12571 // CHECK14:       omp.loop.exit:
12572 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
12573 // CHECK14-NEXT:    ret void
12574 //
12575 //
12576 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..26
12577 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
12578 // CHECK14-NEXT:  entry:
12579 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12580 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12581 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
12582 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
12583 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
12584 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
12585 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12586 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
12587 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
12588 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12589 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12590 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
12591 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12592 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12593 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12594 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12595 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
12596 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
12597 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
12598 // CHECK14-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
12599 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12600 // CHECK14-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
12601 // CHECK14-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12602 // CHECK14-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
12603 // CHECK14-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
12604 // CHECK14-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
12605 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12606 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12607 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12608 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12609 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12610 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
12611 // CHECK14-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
12612 // CHECK14-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
12613 // CHECK14:       omp.dispatch.cond:
12614 // CHECK14-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
12615 // CHECK14-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
12616 // CHECK14-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
12617 // CHECK14:       omp.dispatch.body:
12618 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12619 // CHECK14-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
12620 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
12621 // CHECK14:       omp.inner.for.cond:
12622 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20
12623 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !20
12624 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
12625 // CHECK14-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12626 // CHECK14:       omp.inner.for.body:
12627 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20
12628 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
12629 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12630 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !20
12631 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !20
12632 // CHECK14-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
12633 // CHECK14-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
12634 // CHECK14-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !20
12635 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
12636 // CHECK14:       omp.body.continue:
12637 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
12638 // CHECK14:       omp.inner.for.inc:
12639 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20
12640 // CHECK14-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
12641 // CHECK14-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20
12642 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]
12643 // CHECK14:       omp.inner.for.end:
12644 // CHECK14-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
12645 // CHECK14:       omp.dispatch.inc:
12646 // CHECK14-NEXT:    br label [[OMP_DISPATCH_COND]]
12647 // CHECK14:       omp.dispatch.end:
12648 // CHECK14-NEXT:    ret void
12649 //
12650 //
12651 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136
12652 // CHECK14-SAME: (i64 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
12653 // CHECK14-NEXT:  entry:
12654 // CHECK14-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8
12655 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
12656 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
12657 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
12658 // CHECK14-NEXT:    store i64 [[M]], i64* [[M_ADDR]], align 8
12659 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
12660 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
12661 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
12662 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
12663 // CHECK14-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
12664 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12665 // CHECK14-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
12666 // CHECK14-NEXT:    store i32 [[TMP2]], i32* [[CONV1]], align 4
12667 // CHECK14-NEXT:    [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
12668 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]])
12669 // CHECK14-NEXT:    ret void
12670 //
12671 //
12672 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..29
12673 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
12674 // CHECK14-NEXT:  entry:
12675 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12676 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12677 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
12678 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
12679 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
12680 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12681 // CHECK14-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12682 // CHECK14-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12683 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12684 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12685 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
12686 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
12687 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12688 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12689 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
12690 // CHECK14-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
12691 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
12692 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
12693 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
12694 // CHECK14-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
12695 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12696 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12697 // CHECK14-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12698 // CHECK14-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
12699 // CHECK14-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
12700 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12701 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
12702 // CHECK14-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12703 // CHECK14:       cond.true:
12704 // CHECK14-NEXT:    br label [[COND_END:%.*]]
12705 // CHECK14:       cond.false:
12706 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12707 // CHECK14-NEXT:    br label [[COND_END]]
12708 // CHECK14:       cond.end:
12709 // CHECK14-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
12710 // CHECK14-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
12711 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12712 // CHECK14-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
12713 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
12714 // CHECK14:       omp.inner.for.cond:
12715 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12716 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12717 // CHECK14-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
12718 // CHECK14-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12719 // CHECK14:       omp.inner.for.body:
12720 // CHECK14-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
12721 // CHECK14-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
12722 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
12723 // CHECK14-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
12724 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8
12725 // CHECK14-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
12726 // CHECK14-NEXT:    store i32 [[TMP12]], i32* [[CONV2]], align 4
12727 // CHECK14-NEXT:    [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
12728 // CHECK14-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]])
12729 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
12730 // CHECK14:       omp.inner.for.inc:
12731 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
12732 // CHECK14-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
12733 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
12734 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
12735 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]]
12736 // CHECK14:       omp.inner.for.end:
12737 // CHECK14-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
12738 // CHECK14:       omp.loop.exit:
12739 // CHECK14-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
12740 // CHECK14-NEXT:    ret void
12741 //
12742 //
12743 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..30
12744 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
12745 // CHECK14-NEXT:  entry:
12746 // CHECK14-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
12747 // CHECK14-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
12748 // CHECK14-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
12749 // CHECK14-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
12750 // CHECK14-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
12751 // CHECK14-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
12752 // CHECK14-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
12753 // CHECK14-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12754 // CHECK14-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
12755 // CHECK14-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
12756 // CHECK14-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12757 // CHECK14-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12758 // CHECK14-NEXT:    [[I:%.*]] = alloca i32, align 4
12759 // CHECK14-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
12760 // CHECK14-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
12761 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12762 // CHECK14-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12763 // CHECK14-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
12764 // CHECK14-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
12765 // CHECK14-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
12766 // CHECK14-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
12767 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
12768 // CHECK14-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
12769 // CHECK14-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
12770 // CHECK14-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
12771 // CHECK14-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
12772 // CHECK14-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
12773 // CHECK14-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
12774 // CHECK14-NEXT:    store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
12775 // CHECK14-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
12776 // CHECK14-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
12777 // CHECK14-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
12778 // CHECK14-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12779 // CHECK14-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
12780 // CHECK14-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
12781 // CHECK14-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
12782 // CHECK14-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
12783 // CHECK14-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
12784 // CHECK14:       omp.dispatch.cond:
12785 // CHECK14-NEXT:    [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
12786 // CHECK14-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
12787 // CHECK14-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
12788 // CHECK14:       omp.dispatch.body:
12789 // CHECK14-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
12790 // CHECK14-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
12791 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
12792 // CHECK14:       omp.inner.for.cond:
12793 // CHECK14-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
12794 // CHECK14-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !23
12795 // CHECK14-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
12796 // CHECK14-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12797 // CHECK14:       omp.inner.for.body:
12798 // CHECK14-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
12799 // CHECK14-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
12800 // CHECK14-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12801 // CHECK14-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !23
12802 // CHECK14-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !23
12803 // CHECK14-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
12804 // CHECK14-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
12805 // CHECK14-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !23
12806 // CHECK14-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
12807 // CHECK14:       omp.body.continue:
12808 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
12809 // CHECK14:       omp.inner.for.inc:
12810 // CHECK14-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
12811 // CHECK14-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1
12812 // CHECK14-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
12813 // CHECK14-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
12814 // CHECK14:       omp.inner.for.end:
12815 // CHECK14-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
12816 // CHECK14:       omp.dispatch.inc:
12817 // CHECK14-NEXT:    br label [[OMP_DISPATCH_COND]]
12818 // CHECK14:       omp.dispatch.end:
12819 // CHECK14-NEXT:    ret void
12820 //
12821 //
12822 // CHECK14-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
12823 // CHECK14-SAME: () #[[ATTR5:[0-9]+]] {
12824 // CHECK14-NEXT:  entry:
12825 // CHECK14-NEXT:    call void @__tgt_register_requires(i64 1)
12826 // CHECK14-NEXT:    ret void
12827 //
12828 //
12829 // CHECK15-LABEL: define {{[^@]+}}@main
12830 // CHECK15-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
12831 // CHECK15-NEXT:  entry:
12832 // CHECK15-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
12833 // CHECK15-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
12834 // CHECK15-NEXT:    [[ARGV_ADDR:%.*]] = alloca i8**, align 4
12835 // CHECK15-NEXT:    [[N:%.*]] = alloca i32, align 4
12836 // CHECK15-NEXT:    [[SAVED_STACK:%.*]] = alloca i8*, align 4
12837 // CHECK15-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i32, align 4
12838 // CHECK15-NEXT:    [[M:%.*]] = alloca i32, align 4
12839 // CHECK15-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
12840 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
12841 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
12842 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
12843 // CHECK15-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
12844 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12845 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
12846 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
12847 // CHECK15-NEXT:    [[N_CASTED3:%.*]] = alloca i32, align 4
12848 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4
12849 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4
12850 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4
12851 // CHECK15-NEXT:    [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4
12852 // CHECK15-NEXT:    [[_TMP8:%.*]] = alloca i32, align 4
12853 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
12854 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
12855 // CHECK15-NEXT:    [[M_CASTED:%.*]] = alloca i32, align 4
12856 // CHECK15-NEXT:    [[N_CASTED17:%.*]] = alloca i32, align 4
12857 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS18:%.*]] = alloca [4 x i8*], align 4
12858 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS19:%.*]] = alloca [4 x i8*], align 4
12859 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS20:%.*]] = alloca [4 x i8*], align 4
12860 // CHECK15-NEXT:    [[DOTOFFLOAD_SIZES21:%.*]] = alloca [4 x i64], align 4
12861 // CHECK15-NEXT:    [[_TMP22:%.*]] = alloca i32, align 4
12862 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_23:%.*]] = alloca i32, align 4
12863 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4
12864 // CHECK15-NEXT:    [[N_CASTED31:%.*]] = alloca i32, align 4
12865 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS32:%.*]] = alloca [3 x i8*], align 4
12866 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS33:%.*]] = alloca [3 x i8*], align 4
12867 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS34:%.*]] = alloca [3 x i8*], align 4
12868 // CHECK15-NEXT:    [[DOTOFFLOAD_SIZES35:%.*]] = alloca [3 x i64], align 4
12869 // CHECK15-NEXT:    [[_TMP36:%.*]] = alloca i32, align 4
12870 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_37:%.*]] = alloca i32, align 4
12871 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4
12872 // CHECK15-NEXT:    [[M_CASTED45:%.*]] = alloca i32, align 4
12873 // CHECK15-NEXT:    [[N_CASTED46:%.*]] = alloca i32, align 4
12874 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS47:%.*]] = alloca [4 x i8*], align 4
12875 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS48:%.*]] = alloca [4 x i8*], align 4
12876 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS49:%.*]] = alloca [4 x i8*], align 4
12877 // CHECK15-NEXT:    [[DOTOFFLOAD_SIZES50:%.*]] = alloca [4 x i64], align 4
12878 // CHECK15-NEXT:    [[_TMP51:%.*]] = alloca i32, align 4
12879 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_52:%.*]] = alloca i32, align 4
12880 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_53:%.*]] = alloca i32, align 4
12881 // CHECK15-NEXT:    store i32 0, i32* [[RETVAL]], align 4
12882 // CHECK15-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
12883 // CHECK15-NEXT:    store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
12884 // CHECK15-NEXT:    store i32 100, i32* [[N]], align 4
12885 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N]], align 4
12886 // CHECK15-NEXT:    [[TMP1:%.*]] = call i8* @llvm.stacksave()
12887 // CHECK15-NEXT:    store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
12888 // CHECK15-NEXT:    [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
12889 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
12890 // CHECK15-NEXT:    store i32 10, i32* [[M]], align 4
12891 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N]], align 4
12892 // CHECK15-NEXT:    store i32 [[TMP2]], i32* [[N_CASTED]], align 4
12893 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
12894 // CHECK15-NEXT:    [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4
12895 // CHECK15-NEXT:    [[TMP5:%.*]] = sext i32 [[TMP4]] to i64
12896 // CHECK15-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
12897 // CHECK15-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32*
12898 // CHECK15-NEXT:    store i32 [[TMP3]], i32* [[TMP7]], align 4
12899 // CHECK15-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
12900 // CHECK15-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32*
12901 // CHECK15-NEXT:    store i32 [[TMP3]], i32* [[TMP9]], align 4
12902 // CHECK15-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
12903 // CHECK15-NEXT:    store i64 4, i64* [[TMP10]], align 4
12904 // CHECK15-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
12905 // CHECK15-NEXT:    store i8* null, i8** [[TMP11]], align 4
12906 // CHECK15-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
12907 // CHECK15-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
12908 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[TMP13]], align 4
12909 // CHECK15-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
12910 // CHECK15-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
12911 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[TMP15]], align 4
12912 // CHECK15-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
12913 // CHECK15-NEXT:    store i64 4, i64* [[TMP16]], align 4
12914 // CHECK15-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
12915 // CHECK15-NEXT:    store i8* null, i8** [[TMP17]], align 4
12916 // CHECK15-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
12917 // CHECK15-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
12918 // CHECK15-NEXT:    store i32* [[VLA]], i32** [[TMP19]], align 4
12919 // CHECK15-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
12920 // CHECK15-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
12921 // CHECK15-NEXT:    store i32* [[VLA]], i32** [[TMP21]], align 4
12922 // CHECK15-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
12923 // CHECK15-NEXT:    store i64 [[TMP5]], i64* [[TMP22]], align 4
12924 // CHECK15-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
12925 // CHECK15-NEXT:    store i8* null, i8** [[TMP23]], align 4
12926 // CHECK15-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
12927 // CHECK15-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
12928 // CHECK15-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
12929 // CHECK15-NEXT:    [[TMP27:%.*]] = load i32, i32* [[N]], align 4
12930 // CHECK15-NEXT:    store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
12931 // CHECK15-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
12932 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
12933 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
12934 // CHECK15-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
12935 // CHECK15-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
12936 // CHECK15-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
12937 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
12938 // CHECK15-NEXT:    [[TMP30:%.*]] = zext i32 [[ADD]] to i64
12939 // CHECK15-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]])
12940 // CHECK15-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
12941 // CHECK15-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
12942 // CHECK15-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
12943 // CHECK15:       omp_offload.failed:
12944 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
12945 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT]]
12946 // CHECK15:       omp_offload.cont:
12947 // CHECK15-NEXT:    [[TMP33:%.*]] = load i32, i32* [[N]], align 4
12948 // CHECK15-NEXT:    store i32 [[TMP33]], i32* [[N_CASTED3]], align 4
12949 // CHECK15-NEXT:    [[TMP34:%.*]] = load i32, i32* [[N_CASTED3]], align 4
12950 // CHECK15-NEXT:    [[TMP35:%.*]] = mul nuw i32 [[TMP0]], 4
12951 // CHECK15-NEXT:    [[TMP36:%.*]] = sext i32 [[TMP35]] to i64
12952 // CHECK15-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
12953 // CHECK15-NEXT:    [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32*
12954 // CHECK15-NEXT:    store i32 [[TMP34]], i32* [[TMP38]], align 4
12955 // CHECK15-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
12956 // CHECK15-NEXT:    [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32*
12957 // CHECK15-NEXT:    store i32 [[TMP34]], i32* [[TMP40]], align 4
12958 // CHECK15-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
12959 // CHECK15-NEXT:    store i64 4, i64* [[TMP41]], align 4
12960 // CHECK15-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0
12961 // CHECK15-NEXT:    store i8* null, i8** [[TMP42]], align 4
12962 // CHECK15-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
12963 // CHECK15-NEXT:    [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i32*
12964 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[TMP44]], align 4
12965 // CHECK15-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
12966 // CHECK15-NEXT:    [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32*
12967 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[TMP46]], align 4
12968 // CHECK15-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 1
12969 // CHECK15-NEXT:    store i64 4, i64* [[TMP47]], align 4
12970 // CHECK15-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1
12971 // CHECK15-NEXT:    store i8* null, i8** [[TMP48]], align 4
12972 // CHECK15-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
12973 // CHECK15-NEXT:    [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32**
12974 // CHECK15-NEXT:    store i32* [[VLA]], i32** [[TMP50]], align 4
12975 // CHECK15-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
12976 // CHECK15-NEXT:    [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32**
12977 // CHECK15-NEXT:    store i32* [[VLA]], i32** [[TMP52]], align 4
12978 // CHECK15-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
12979 // CHECK15-NEXT:    store i64 [[TMP36]], i64* [[TMP53]], align 4
12980 // CHECK15-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2
12981 // CHECK15-NEXT:    store i8* null, i8** [[TMP54]], align 4
12982 // CHECK15-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
12983 // CHECK15-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
12984 // CHECK15-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
12985 // CHECK15-NEXT:    [[TMP58:%.*]] = load i32, i32* [[N]], align 4
12986 // CHECK15-NEXT:    store i32 [[TMP58]], i32* [[DOTCAPTURE_EXPR_9]], align 4
12987 // CHECK15-NEXT:    [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4
12988 // CHECK15-NEXT:    [[SUB11:%.*]] = sub nsw i32 [[TMP59]], 0
12989 // CHECK15-NEXT:    [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
12990 // CHECK15-NEXT:    [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
12991 // CHECK15-NEXT:    store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4
12992 // CHECK15-NEXT:    [[TMP60:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
12993 // CHECK15-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP60]], 1
12994 // CHECK15-NEXT:    [[TMP61:%.*]] = zext i32 [[ADD14]] to i64
12995 // CHECK15-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP61]])
12996 // CHECK15-NEXT:    [[TMP62:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, i32 3, i8** [[TMP55]], i8** [[TMP56]], i64* [[TMP57]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
12997 // CHECK15-NEXT:    [[TMP63:%.*]] = icmp ne i32 [[TMP62]], 0
12998 // CHECK15-NEXT:    br i1 [[TMP63]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]]
12999 // CHECK15:       omp_offload.failed15:
13000 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i32 [[TMP34]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
13001 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT16]]
13002 // CHECK15:       omp_offload.cont16:
13003 // CHECK15-NEXT:    [[TMP64:%.*]] = load i32, i32* [[M]], align 4
13004 // CHECK15-NEXT:    store i32 [[TMP64]], i32* [[M_CASTED]], align 4
13005 // CHECK15-NEXT:    [[TMP65:%.*]] = load i32, i32* [[M_CASTED]], align 4
13006 // CHECK15-NEXT:    [[TMP66:%.*]] = load i32, i32* [[N]], align 4
13007 // CHECK15-NEXT:    store i32 [[TMP66]], i32* [[N_CASTED17]], align 4
13008 // CHECK15-NEXT:    [[TMP67:%.*]] = load i32, i32* [[N_CASTED17]], align 4
13009 // CHECK15-NEXT:    [[TMP68:%.*]] = mul nuw i32 [[TMP0]], 4
13010 // CHECK15-NEXT:    [[TMP69:%.*]] = sext i32 [[TMP68]] to i64
13011 // CHECK15-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0
13012 // CHECK15-NEXT:    [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i32*
13013 // CHECK15-NEXT:    store i32 [[TMP65]], i32* [[TMP71]], align 4
13014 // CHECK15-NEXT:    [[TMP72:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0
13015 // CHECK15-NEXT:    [[TMP73:%.*]] = bitcast i8** [[TMP72]] to i32*
13016 // CHECK15-NEXT:    store i32 [[TMP65]], i32* [[TMP73]], align 4
13017 // CHECK15-NEXT:    [[TMP74:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0
13018 // CHECK15-NEXT:    store i64 4, i64* [[TMP74]], align 4
13019 // CHECK15-NEXT:    [[TMP75:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 0
13020 // CHECK15-NEXT:    store i8* null, i8** [[TMP75]], align 4
13021 // CHECK15-NEXT:    [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 1
13022 // CHECK15-NEXT:    [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i32*
13023 // CHECK15-NEXT:    store i32 [[TMP67]], i32* [[TMP77]], align 4
13024 // CHECK15-NEXT:    [[TMP78:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 1
13025 // CHECK15-NEXT:    [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i32*
13026 // CHECK15-NEXT:    store i32 [[TMP67]], i32* [[TMP79]], align 4
13027 // CHECK15-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 1
13028 // CHECK15-NEXT:    store i64 4, i64* [[TMP80]], align 4
13029 // CHECK15-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 1
13030 // CHECK15-NEXT:    store i8* null, i8** [[TMP81]], align 4
13031 // CHECK15-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 2
13032 // CHECK15-NEXT:    [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i32*
13033 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[TMP83]], align 4
13034 // CHECK15-NEXT:    [[TMP84:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 2
13035 // CHECK15-NEXT:    [[TMP85:%.*]] = bitcast i8** [[TMP84]] to i32*
13036 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[TMP85]], align 4
13037 // CHECK15-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 2
13038 // CHECK15-NEXT:    store i64 4, i64* [[TMP86]], align 4
13039 // CHECK15-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 2
13040 // CHECK15-NEXT:    store i8* null, i8** [[TMP87]], align 4
13041 // CHECK15-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 3
13042 // CHECK15-NEXT:    [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32**
13043 // CHECK15-NEXT:    store i32* [[VLA]], i32** [[TMP89]], align 4
13044 // CHECK15-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 3
13045 // CHECK15-NEXT:    [[TMP91:%.*]] = bitcast i8** [[TMP90]] to i32**
13046 // CHECK15-NEXT:    store i32* [[VLA]], i32** [[TMP91]], align 4
13047 // CHECK15-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 3
13048 // CHECK15-NEXT:    store i64 [[TMP69]], i64* [[TMP92]], align 4
13049 // CHECK15-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 3
13050 // CHECK15-NEXT:    store i8* null, i8** [[TMP93]], align 4
13051 // CHECK15-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0
13052 // CHECK15-NEXT:    [[TMP95:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0
13053 // CHECK15-NEXT:    [[TMP96:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0
13054 // CHECK15-NEXT:    [[TMP97:%.*]] = load i32, i32* [[N]], align 4
13055 // CHECK15-NEXT:    store i32 [[TMP97]], i32* [[DOTCAPTURE_EXPR_23]], align 4
13056 // CHECK15-NEXT:    [[TMP98:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_23]], align 4
13057 // CHECK15-NEXT:    [[SUB25:%.*]] = sub nsw i32 [[TMP98]], 0
13058 // CHECK15-NEXT:    [[DIV26:%.*]] = sdiv i32 [[SUB25]], 1
13059 // CHECK15-NEXT:    [[SUB27:%.*]] = sub nsw i32 [[DIV26]], 1
13060 // CHECK15-NEXT:    store i32 [[SUB27]], i32* [[DOTCAPTURE_EXPR_24]], align 4
13061 // CHECK15-NEXT:    [[TMP99:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4
13062 // CHECK15-NEXT:    [[ADD28:%.*]] = add nsw i32 [[TMP99]], 1
13063 // CHECK15-NEXT:    [[TMP100:%.*]] = zext i32 [[ADD28]] to i64
13064 // CHECK15-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP100]])
13065 // CHECK15-NEXT:    [[TMP101:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, i32 4, i8** [[TMP94]], i8** [[TMP95]], i64* [[TMP96]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
13066 // CHECK15-NEXT:    [[TMP102:%.*]] = icmp ne i32 [[TMP101]], 0
13067 // CHECK15-NEXT:    br i1 [[TMP102]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]]
13068 // CHECK15:       omp_offload.failed29:
13069 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i32 [[TMP65]], i32 [[TMP67]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
13070 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT30]]
13071 // CHECK15:       omp_offload.cont30:
13072 // CHECK15-NEXT:    [[TMP103:%.*]] = load i32, i32* [[N]], align 4
13073 // CHECK15-NEXT:    store i32 [[TMP103]], i32* [[N_CASTED31]], align 4
13074 // CHECK15-NEXT:    [[TMP104:%.*]] = load i32, i32* [[N_CASTED31]], align 4
13075 // CHECK15-NEXT:    [[TMP105:%.*]] = mul nuw i32 [[TMP0]], 4
13076 // CHECK15-NEXT:    [[TMP106:%.*]] = sext i32 [[TMP105]] to i64
13077 // CHECK15-NEXT:    [[TMP107:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0
13078 // CHECK15-NEXT:    [[TMP108:%.*]] = bitcast i8** [[TMP107]] to i32*
13079 // CHECK15-NEXT:    store i32 [[TMP104]], i32* [[TMP108]], align 4
13080 // CHECK15-NEXT:    [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0
13081 // CHECK15-NEXT:    [[TMP110:%.*]] = bitcast i8** [[TMP109]] to i32*
13082 // CHECK15-NEXT:    store i32 [[TMP104]], i32* [[TMP110]], align 4
13083 // CHECK15-NEXT:    [[TMP111:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 0
13084 // CHECK15-NEXT:    store i64 4, i64* [[TMP111]], align 4
13085 // CHECK15-NEXT:    [[TMP112:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 0
13086 // CHECK15-NEXT:    store i8* null, i8** [[TMP112]], align 4
13087 // CHECK15-NEXT:    [[TMP113:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 1
13088 // CHECK15-NEXT:    [[TMP114:%.*]] = bitcast i8** [[TMP113]] to i32*
13089 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[TMP114]], align 4
13090 // CHECK15-NEXT:    [[TMP115:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 1
13091 // CHECK15-NEXT:    [[TMP116:%.*]] = bitcast i8** [[TMP115]] to i32*
13092 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[TMP116]], align 4
13093 // CHECK15-NEXT:    [[TMP117:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 1
13094 // CHECK15-NEXT:    store i64 4, i64* [[TMP117]], align 4
13095 // CHECK15-NEXT:    [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 1
13096 // CHECK15-NEXT:    store i8* null, i8** [[TMP118]], align 4
13097 // CHECK15-NEXT:    [[TMP119:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 2
13098 // CHECK15-NEXT:    [[TMP120:%.*]] = bitcast i8** [[TMP119]] to i32**
13099 // CHECK15-NEXT:    store i32* [[VLA]], i32** [[TMP120]], align 4
13100 // CHECK15-NEXT:    [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 2
13101 // CHECK15-NEXT:    [[TMP122:%.*]] = bitcast i8** [[TMP121]] to i32**
13102 // CHECK15-NEXT:    store i32* [[VLA]], i32** [[TMP122]], align 4
13103 // CHECK15-NEXT:    [[TMP123:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 2
13104 // CHECK15-NEXT:    store i64 [[TMP106]], i64* [[TMP123]], align 4
13105 // CHECK15-NEXT:    [[TMP124:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 2
13106 // CHECK15-NEXT:    store i8* null, i8** [[TMP124]], align 4
13107 // CHECK15-NEXT:    [[TMP125:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0
13108 // CHECK15-NEXT:    [[TMP126:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0
13109 // CHECK15-NEXT:    [[TMP127:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 0
13110 // CHECK15-NEXT:    [[TMP128:%.*]] = load i32, i32* [[N]], align 4
13111 // CHECK15-NEXT:    store i32 [[TMP128]], i32* [[DOTCAPTURE_EXPR_37]], align 4
13112 // CHECK15-NEXT:    [[TMP129:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_37]], align 4
13113 // CHECK15-NEXT:    [[SUB39:%.*]] = sub nsw i32 [[TMP129]], 0
13114 // CHECK15-NEXT:    [[DIV40:%.*]] = sdiv i32 [[SUB39]], 1
13115 // CHECK15-NEXT:    [[SUB41:%.*]] = sub nsw i32 [[DIV40]], 1
13116 // CHECK15-NEXT:    store i32 [[SUB41]], i32* [[DOTCAPTURE_EXPR_38]], align 4
13117 // CHECK15-NEXT:    [[TMP130:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_38]], align 4
13118 // CHECK15-NEXT:    [[ADD42:%.*]] = add nsw i32 [[TMP130]], 1
13119 // CHECK15-NEXT:    [[TMP131:%.*]] = zext i32 [[ADD42]] to i64
13120 // CHECK15-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP131]])
13121 // CHECK15-NEXT:    [[TMP132:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, i32 3, i8** [[TMP125]], i8** [[TMP126]], i64* [[TMP127]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
13122 // CHECK15-NEXT:    [[TMP133:%.*]] = icmp ne i32 [[TMP132]], 0
13123 // CHECK15-NEXT:    br i1 [[TMP133]], label [[OMP_OFFLOAD_FAILED43:%.*]], label [[OMP_OFFLOAD_CONT44:%.*]]
13124 // CHECK15:       omp_offload.failed43:
13125 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i32 [[TMP104]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
13126 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT44]]
13127 // CHECK15:       omp_offload.cont44:
13128 // CHECK15-NEXT:    [[TMP134:%.*]] = load i32, i32* [[M]], align 4
13129 // CHECK15-NEXT:    store i32 [[TMP134]], i32* [[M_CASTED45]], align 4
13130 // CHECK15-NEXT:    [[TMP135:%.*]] = load i32, i32* [[M_CASTED45]], align 4
13131 // CHECK15-NEXT:    [[TMP136:%.*]] = load i32, i32* [[N]], align 4
13132 // CHECK15-NEXT:    store i32 [[TMP136]], i32* [[N_CASTED46]], align 4
13133 // CHECK15-NEXT:    [[TMP137:%.*]] = load i32, i32* [[N_CASTED46]], align 4
13134 // CHECK15-NEXT:    [[TMP138:%.*]] = mul nuw i32 [[TMP0]], 4
13135 // CHECK15-NEXT:    [[TMP139:%.*]] = sext i32 [[TMP138]] to i64
13136 // CHECK15-NEXT:    [[TMP140:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0
13137 // CHECK15-NEXT:    [[TMP141:%.*]] = bitcast i8** [[TMP140]] to i32*
13138 // CHECK15-NEXT:    store i32 [[TMP135]], i32* [[TMP141]], align 4
13139 // CHECK15-NEXT:    [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0
13140 // CHECK15-NEXT:    [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i32*
13141 // CHECK15-NEXT:    store i32 [[TMP135]], i32* [[TMP143]], align 4
13142 // CHECK15-NEXT:    [[TMP144:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 0
13143 // CHECK15-NEXT:    store i64 4, i64* [[TMP144]], align 4
13144 // CHECK15-NEXT:    [[TMP145:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 0
13145 // CHECK15-NEXT:    store i8* null, i8** [[TMP145]], align 4
13146 // CHECK15-NEXT:    [[TMP146:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 1
13147 // CHECK15-NEXT:    [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i32*
13148 // CHECK15-NEXT:    store i32 [[TMP137]], i32* [[TMP147]], align 4
13149 // CHECK15-NEXT:    [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 1
13150 // CHECK15-NEXT:    [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i32*
13151 // CHECK15-NEXT:    store i32 [[TMP137]], i32* [[TMP149]], align 4
13152 // CHECK15-NEXT:    [[TMP150:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 1
13153 // CHECK15-NEXT:    store i64 4, i64* [[TMP150]], align 4
13154 // CHECK15-NEXT:    [[TMP151:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 1
13155 // CHECK15-NEXT:    store i8* null, i8** [[TMP151]], align 4
13156 // CHECK15-NEXT:    [[TMP152:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 2
13157 // CHECK15-NEXT:    [[TMP153:%.*]] = bitcast i8** [[TMP152]] to i32*
13158 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[TMP153]], align 4
13159 // CHECK15-NEXT:    [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 2
13160 // CHECK15-NEXT:    [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32*
13161 // CHECK15-NEXT:    store i32 [[TMP0]], i32* [[TMP155]], align 4
13162 // CHECK15-NEXT:    [[TMP156:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 2
13163 // CHECK15-NEXT:    store i64 4, i64* [[TMP156]], align 4
13164 // CHECK15-NEXT:    [[TMP157:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 2
13165 // CHECK15-NEXT:    store i8* null, i8** [[TMP157]], align 4
13166 // CHECK15-NEXT:    [[TMP158:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 3
13167 // CHECK15-NEXT:    [[TMP159:%.*]] = bitcast i8** [[TMP158]] to i32**
13168 // CHECK15-NEXT:    store i32* [[VLA]], i32** [[TMP159]], align 4
13169 // CHECK15-NEXT:    [[TMP160:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 3
13170 // CHECK15-NEXT:    [[TMP161:%.*]] = bitcast i8** [[TMP160]] to i32**
13171 // CHECK15-NEXT:    store i32* [[VLA]], i32** [[TMP161]], align 4
13172 // CHECK15-NEXT:    [[TMP162:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 3
13173 // CHECK15-NEXT:    store i64 [[TMP139]], i64* [[TMP162]], align 4
13174 // CHECK15-NEXT:    [[TMP163:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 3
13175 // CHECK15-NEXT:    store i8* null, i8** [[TMP163]], align 4
13176 // CHECK15-NEXT:    [[TMP164:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0
13177 // CHECK15-NEXT:    [[TMP165:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0
13178 // CHECK15-NEXT:    [[TMP166:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 0
13179 // CHECK15-NEXT:    [[TMP167:%.*]] = load i32, i32* [[N]], align 4
13180 // CHECK15-NEXT:    store i32 [[TMP167]], i32* [[DOTCAPTURE_EXPR_52]], align 4
13181 // CHECK15-NEXT:    [[TMP168:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_52]], align 4
13182 // CHECK15-NEXT:    [[SUB54:%.*]] = sub nsw i32 [[TMP168]], 0
13183 // CHECK15-NEXT:    [[DIV55:%.*]] = sdiv i32 [[SUB54]], 1
13184 // CHECK15-NEXT:    [[SUB56:%.*]] = sub nsw i32 [[DIV55]], 1
13185 // CHECK15-NEXT:    store i32 [[SUB56]], i32* [[DOTCAPTURE_EXPR_53]], align 4
13186 // CHECK15-NEXT:    [[TMP169:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_53]], align 4
13187 // CHECK15-NEXT:    [[ADD57:%.*]] = add nsw i32 [[TMP169]], 1
13188 // CHECK15-NEXT:    [[TMP170:%.*]] = zext i32 [[ADD57]] to i64
13189 // CHECK15-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP170]])
13190 // CHECK15-NEXT:    [[TMP171:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, i32 4, i8** [[TMP164]], i8** [[TMP165]], i64* [[TMP166]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
13191 // CHECK15-NEXT:    [[TMP172:%.*]] = icmp ne i32 [[TMP171]], 0
13192 // CHECK15-NEXT:    br i1 [[TMP172]], label [[OMP_OFFLOAD_FAILED58:%.*]], label [[OMP_OFFLOAD_CONT59:%.*]]
13193 // CHECK15:       omp_offload.failed58:
13194 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i32 [[TMP135]], i32 [[TMP137]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
13195 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT59]]
13196 // CHECK15:       omp_offload.cont59:
13197 // CHECK15-NEXT:    [[TMP173:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
13198 // CHECK15-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP173]])
13199 // CHECK15-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
13200 // CHECK15-NEXT:    [[TMP174:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
13201 // CHECK15-NEXT:    call void @llvm.stackrestore(i8* [[TMP174]])
13202 // CHECK15-NEXT:    [[TMP175:%.*]] = load i32, i32* [[RETVAL]], align 4
13203 // CHECK15-NEXT:    ret i32 [[TMP175]]
13204 //
13205 //
13206 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148
13207 // CHECK15-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
13208 // CHECK15-NEXT:  entry:
13209 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
13210 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13211 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
13212 // CHECK15-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
13213 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13214 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
13215 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13216 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13217 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
13218 // CHECK15-NEXT:    ret void
13219 //
13220 //
13221 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined.
13222 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
13223 // CHECK15-NEXT:  entry:
13224 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13225 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13226 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
13227 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13228 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
13229 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
13230 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13231 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
13232 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13233 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
13234 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13235 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13236 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13237 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13238 // CHECK15-NEXT:    [[I3:%.*]] = alloca i32, align 4
13239 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13240 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13241 // CHECK15-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
13242 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13243 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
13244 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
13245 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13246 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13247 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
13248 // CHECK15-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
13249 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13250 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
13251 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13252 // CHECK15-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
13253 // CHECK15-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
13254 // CHECK15-NEXT:    store i32 0, i32* [[I]], align 4
13255 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13256 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
13257 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13258 // CHECK15:       omp.precond.then:
13259 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
13260 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13261 // CHECK15-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
13262 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13263 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13264 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13265 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
13266 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13267 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13268 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13269 // CHECK15-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
13270 // CHECK15-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13271 // CHECK15:       cond.true:
13272 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13273 // CHECK15-NEXT:    br label [[COND_END:%.*]]
13274 // CHECK15:       cond.false:
13275 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13276 // CHECK15-NEXT:    br label [[COND_END]]
13277 // CHECK15:       cond.end:
13278 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
13279 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
13280 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13281 // CHECK15-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
13282 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
13283 // CHECK15:       omp.inner.for.cond:
13284 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13285 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13286 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
13287 // CHECK15-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13288 // CHECK15:       omp.inner.for.body:
13289 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13290 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13291 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])
13292 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
13293 // CHECK15:       omp.inner.for.inc:
13294 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13295 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
13296 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
13297 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
13298 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
13299 // CHECK15:       omp.inner.for.end:
13300 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
13301 // CHECK15:       omp.loop.exit:
13302 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13303 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
13304 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
13305 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
13306 // CHECK15:       omp.precond.end:
13307 // CHECK15-NEXT:    ret void
13308 //
13309 //
13310 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..1
13311 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
13312 // CHECK15-NEXT:  entry:
13313 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13314 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13315 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
13316 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
13317 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
13318 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13319 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
13320 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
13321 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13322 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
13323 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13324 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
13325 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
13326 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
13327 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13328 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13329 // CHECK15-NEXT:    [[I3:%.*]] = alloca i32, align 4
13330 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13331 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13332 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
13333 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
13334 // CHECK15-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
13335 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13336 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
13337 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
13338 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13339 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13340 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
13341 // CHECK15-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
13342 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13343 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
13344 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13345 // CHECK15-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
13346 // CHECK15-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
13347 // CHECK15-NEXT:    store i32 0, i32* [[I]], align 4
13348 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13349 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
13350 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13351 // CHECK15:       omp.precond.then:
13352 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
13353 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13354 // CHECK15-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
13355 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
13356 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
13357 // CHECK15-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
13358 // CHECK15-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
13359 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13360 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13361 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13362 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
13363 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13364 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13365 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13366 // CHECK15-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
13367 // CHECK15-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13368 // CHECK15:       cond.true:
13369 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13370 // CHECK15-NEXT:    br label [[COND_END:%.*]]
13371 // CHECK15:       cond.false:
13372 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13373 // CHECK15-NEXT:    br label [[COND_END]]
13374 // CHECK15:       cond.end:
13375 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
13376 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
13377 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13378 // CHECK15-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
13379 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
13380 // CHECK15:       omp.inner.for.cond:
13381 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13382 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13383 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
13384 // CHECK15-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13385 // CHECK15:       omp.inner.for.body:
13386 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13387 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
13388 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13389 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4
13390 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
13391 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
13392 // CHECK15-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
13393 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
13394 // CHECK15:       omp.body.continue:
13395 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
13396 // CHECK15:       omp.inner.for.inc:
13397 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13398 // CHECK15-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1
13399 // CHECK15-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
13400 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
13401 // CHECK15:       omp.inner.for.end:
13402 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
13403 // CHECK15:       omp.loop.exit:
13404 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13405 // CHECK15-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
13406 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
13407 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
13408 // CHECK15:       omp.precond.end:
13409 // CHECK15-NEXT:    ret void
13410 //
13411 //
13412 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153
13413 // CHECK15-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
13414 // CHECK15-NEXT:  entry:
13415 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
13416 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13417 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
13418 // CHECK15-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
13419 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13420 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
13421 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13422 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13423 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
13424 // CHECK15-NEXT:    ret void
13425 //
13426 //
13427 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..2
13428 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
13429 // CHECK15-NEXT:  entry:
13430 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13431 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13432 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
13433 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13434 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
13435 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
13436 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13437 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
13438 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13439 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
13440 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13441 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13442 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13443 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13444 // CHECK15-NEXT:    [[I3:%.*]] = alloca i32, align 4
13445 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13446 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13447 // CHECK15-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
13448 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13449 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
13450 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
13451 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13452 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13453 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
13454 // CHECK15-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
13455 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13456 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
13457 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13458 // CHECK15-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
13459 // CHECK15-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
13460 // CHECK15-NEXT:    store i32 0, i32* [[I]], align 4
13461 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13462 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
13463 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13464 // CHECK15:       omp.precond.then:
13465 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
13466 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13467 // CHECK15-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
13468 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13469 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13470 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13471 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
13472 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13473 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13474 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13475 // CHECK15-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
13476 // CHECK15-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13477 // CHECK15:       cond.true:
13478 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13479 // CHECK15-NEXT:    br label [[COND_END:%.*]]
13480 // CHECK15:       cond.false:
13481 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13482 // CHECK15-NEXT:    br label [[COND_END]]
13483 // CHECK15:       cond.end:
13484 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
13485 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
13486 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13487 // CHECK15-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
13488 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
13489 // CHECK15:       omp.inner.for.cond:
13490 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13491 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13492 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
13493 // CHECK15-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13494 // CHECK15:       omp.inner.for.body:
13495 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13496 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13497 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])
13498 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
13499 // CHECK15:       omp.inner.for.inc:
13500 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13501 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
13502 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
13503 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
13504 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
13505 // CHECK15:       omp.inner.for.end:
13506 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
13507 // CHECK15:       omp.loop.exit:
13508 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13509 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
13510 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
13511 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
13512 // CHECK15:       omp.precond.end:
13513 // CHECK15-NEXT:    ret void
13514 //
13515 //
13516 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..3
13517 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
13518 // CHECK15-NEXT:  entry:
13519 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13520 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13521 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
13522 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
13523 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
13524 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13525 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
13526 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
13527 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13528 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
13529 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13530 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
13531 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
13532 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
13533 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13534 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13535 // CHECK15-NEXT:    [[I3:%.*]] = alloca i32, align 4
13536 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13537 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13538 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
13539 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
13540 // CHECK15-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
13541 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13542 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
13543 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
13544 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13545 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13546 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
13547 // CHECK15-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
13548 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13549 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
13550 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13551 // CHECK15-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
13552 // CHECK15-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
13553 // CHECK15-NEXT:    store i32 0, i32* [[I]], align 4
13554 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13555 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
13556 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13557 // CHECK15:       omp.precond.then:
13558 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
13559 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13560 // CHECK15-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
13561 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
13562 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
13563 // CHECK15-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
13564 // CHECK15-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
13565 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13566 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13567 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13568 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
13569 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13570 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13571 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13572 // CHECK15-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
13573 // CHECK15-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13574 // CHECK15:       cond.true:
13575 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13576 // CHECK15-NEXT:    br label [[COND_END:%.*]]
13577 // CHECK15:       cond.false:
13578 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13579 // CHECK15-NEXT:    br label [[COND_END]]
13580 // CHECK15:       cond.end:
13581 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
13582 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
13583 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13584 // CHECK15-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
13585 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
13586 // CHECK15:       omp.inner.for.cond:
13587 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13588 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13589 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
13590 // CHECK15-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13591 // CHECK15:       omp.inner.for.body:
13592 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13593 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
13594 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13595 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4
13596 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
13597 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
13598 // CHECK15-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
13599 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
13600 // CHECK15:       omp.body.continue:
13601 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
13602 // CHECK15:       omp.inner.for.inc:
13603 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13604 // CHECK15-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1
13605 // CHECK15-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
13606 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
13607 // CHECK15:       omp.inner.for.end:
13608 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
13609 // CHECK15:       omp.loop.exit:
13610 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13611 // CHECK15-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
13612 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
13613 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
13614 // CHECK15:       omp.precond.end:
13615 // CHECK15-NEXT:    ret void
13616 //
13617 //
13618 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158
13619 // CHECK15-SAME: (i32 [[M:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
13620 // CHECK15-NEXT:  entry:
13621 // CHECK15-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 4
13622 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
13623 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13624 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
13625 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
13626 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
13627 // CHECK15-NEXT:    store i32 [[M]], i32* [[M_ADDR]], align 4
13628 // CHECK15-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
13629 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13630 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
13631 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13632 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13633 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4
13634 // CHECK15-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
13635 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13636 // CHECK15-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
13637 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
13638 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]])
13639 // CHECK15-NEXT:    ret void
13640 //
13641 //
13642 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..5
13643 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
13644 // CHECK15-NEXT:  entry:
13645 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13646 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13647 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
13648 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13649 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
13650 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
13651 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
13652 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13653 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13654 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
13655 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
13656 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13657 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13658 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13659 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13660 // CHECK15-NEXT:    [[I4:%.*]] = alloca i32, align 4
13661 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
13662 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13663 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13664 // CHECK15-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
13665 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13666 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
13667 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
13668 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
13669 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13670 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13671 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
13672 // CHECK15-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
13673 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13674 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
13675 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13676 // CHECK15-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
13677 // CHECK15-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
13678 // CHECK15-NEXT:    store i32 0, i32* [[I]], align 4
13679 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13680 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
13681 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13682 // CHECK15:       omp.precond.then:
13683 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
13684 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13685 // CHECK15-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
13686 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13687 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13688 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
13689 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13690 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
13691 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])
13692 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13693 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13694 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
13695 // CHECK15-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13696 // CHECK15:       cond.true:
13697 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13698 // CHECK15-NEXT:    br label [[COND_END:%.*]]
13699 // CHECK15:       cond.false:
13700 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13701 // CHECK15-NEXT:    br label [[COND_END]]
13702 // CHECK15:       cond.end:
13703 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
13704 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
13705 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13706 // CHECK15-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
13707 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
13708 // CHECK15:       omp.inner.for.cond:
13709 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13710 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13711 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP16]], 1
13712 // CHECK15-NEXT:    [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]]
13713 // CHECK15-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13714 // CHECK15:       omp.inner.for.body:
13715 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13716 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13717 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
13718 // CHECK15-NEXT:    store i32 [[TMP19]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
13719 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
13720 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP20]])
13721 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
13722 // CHECK15:       omp.inner.for.inc:
13723 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13724 // CHECK15-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
13725 // CHECK15-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
13726 // CHECK15-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
13727 // CHECK15-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13728 // CHECK15-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
13729 // CHECK15-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
13730 // CHECK15-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
13731 // CHECK15-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13732 // CHECK15-NEXT:    [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
13733 // CHECK15-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]
13734 // CHECK15-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
13735 // CHECK15-NEXT:    [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13736 // CHECK15-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13737 // CHECK15-NEXT:    [[CMP10:%.*]] = icmp sgt i32 [[TMP27]], [[TMP28]]
13738 // CHECK15-NEXT:    br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
13739 // CHECK15:       cond.true11:
13740 // CHECK15-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13741 // CHECK15-NEXT:    br label [[COND_END13:%.*]]
13742 // CHECK15:       cond.false12:
13743 // CHECK15-NEXT:    [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13744 // CHECK15-NEXT:    br label [[COND_END13]]
13745 // CHECK15:       cond.end13:
13746 // CHECK15-NEXT:    [[COND14:%.*]] = phi i32 [ [[TMP29]], [[COND_TRUE11]] ], [ [[TMP30]], [[COND_FALSE12]] ]
13747 // CHECK15-NEXT:    store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
13748 // CHECK15-NEXT:    [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13749 // CHECK15-NEXT:    store i32 [[TMP31]], i32* [[DOTOMP_IV]], align 4
13750 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
13751 // CHECK15:       omp.inner.for.end:
13752 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
13753 // CHECK15:       omp.loop.exit:
13754 // CHECK15-NEXT:    [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13755 // CHECK15-NEXT:    [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4
13756 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]])
13757 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
13758 // CHECK15:       omp.precond.end:
13759 // CHECK15-NEXT:    ret void
13760 //
13761 //
13762 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..6
13763 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
13764 // CHECK15-NEXT:  entry:
13765 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13766 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13767 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
13768 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
13769 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
13770 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13771 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
13772 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
13773 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
13774 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13775 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13776 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
13777 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
13778 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
13779 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
13780 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13781 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13782 // CHECK15-NEXT:    [[I4:%.*]] = alloca i32, align 4
13783 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13784 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13785 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
13786 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
13787 // CHECK15-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
13788 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13789 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
13790 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
13791 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
13792 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13793 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13794 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
13795 // CHECK15-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
13796 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13797 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
13798 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13799 // CHECK15-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
13800 // CHECK15-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
13801 // CHECK15-NEXT:    store i32 0, i32* [[I]], align 4
13802 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13803 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
13804 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13805 // CHECK15:       omp.precond.then:
13806 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
13807 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13808 // CHECK15-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
13809 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
13810 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
13811 // CHECK15-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
13812 // CHECK15-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
13813 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13814 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13815 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13816 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
13817 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13818 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13819 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13820 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
13821 // CHECK15-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13822 // CHECK15:       cond.true:
13823 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
13824 // CHECK15-NEXT:    br label [[COND_END:%.*]]
13825 // CHECK15:       cond.false:
13826 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13827 // CHECK15-NEXT:    br label [[COND_END]]
13828 // CHECK15:       cond.end:
13829 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
13830 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
13831 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
13832 // CHECK15-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
13833 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
13834 // CHECK15:       omp.inner.for.cond:
13835 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13836 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
13837 // CHECK15-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
13838 // CHECK15-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13839 // CHECK15:       omp.inner.for.body:
13840 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13841 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
13842 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13843 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4
13844 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I4]], align 4
13845 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
13846 // CHECK15-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
13847 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
13848 // CHECK15:       omp.body.continue:
13849 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
13850 // CHECK15:       omp.inner.for.inc:
13851 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13852 // CHECK15-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
13853 // CHECK15-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
13854 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
13855 // CHECK15:       omp.inner.for.end:
13856 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
13857 // CHECK15:       omp.loop.exit:
13858 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13859 // CHECK15-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
13860 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
13861 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
13862 // CHECK15:       omp.precond.end:
13863 // CHECK15-NEXT:    ret void
13864 //
13865 //
13866 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163
13867 // CHECK15-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
13868 // CHECK15-NEXT:  entry:
13869 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
13870 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13871 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
13872 // CHECK15-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
13873 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13874 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
13875 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13876 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13877 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
13878 // CHECK15-NEXT:    ret void
13879 //
13880 //
13881 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..8
13882 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
13883 // CHECK15-NEXT:  entry:
13884 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13885 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13886 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
13887 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13888 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
13889 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
13890 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13891 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
13892 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13893 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
13894 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13895 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13896 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13897 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13898 // CHECK15-NEXT:    [[I3:%.*]] = alloca i32, align 4
13899 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13900 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13901 // CHECK15-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
13902 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13903 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
13904 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
13905 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13906 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
13907 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
13908 // CHECK15-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
13909 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13910 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
13911 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13912 // CHECK15-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
13913 // CHECK15-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
13914 // CHECK15-NEXT:    store i32 0, i32* [[I]], align 4
13915 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
13916 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
13917 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13918 // CHECK15:       omp.precond.then:
13919 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
13920 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13921 // CHECK15-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
13922 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
13923 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
13924 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13925 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
13926 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
13927 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13928 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13929 // CHECK15-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
13930 // CHECK15-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13931 // CHECK15:       cond.true:
13932 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
13933 // CHECK15-NEXT:    br label [[COND_END:%.*]]
13934 // CHECK15:       cond.false:
13935 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13936 // CHECK15-NEXT:    br label [[COND_END]]
13937 // CHECK15:       cond.end:
13938 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
13939 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
13940 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13941 // CHECK15-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
13942 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
13943 // CHECK15:       omp.inner.for.cond:
13944 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13945 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13946 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
13947 // CHECK15-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13948 // CHECK15:       omp.inner.for.body:
13949 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
13950 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
13951 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])
13952 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
13953 // CHECK15:       omp.inner.for.inc:
13954 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
13955 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
13956 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
13957 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
13958 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
13959 // CHECK15:       omp.inner.for.end:
13960 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
13961 // CHECK15:       omp.loop.exit:
13962 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
13963 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
13964 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
13965 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
13966 // CHECK15:       omp.precond.end:
13967 // CHECK15-NEXT:    ret void
13968 //
13969 //
13970 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..9
13971 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
13972 // CHECK15-NEXT:  entry:
13973 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
13974 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
13975 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
13976 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
13977 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
13978 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13979 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
13980 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
13981 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13982 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
13983 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13984 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
13985 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
13986 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
13987 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13988 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13989 // CHECK15-NEXT:    [[I3:%.*]] = alloca i32, align 4
13990 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
13991 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
13992 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
13993 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
13994 // CHECK15-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
13995 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
13996 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
13997 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
13998 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
13999 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
14000 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
14001 // CHECK15-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
14002 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
14003 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
14004 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
14005 // CHECK15-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
14006 // CHECK15-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
14007 // CHECK15-NEXT:    store i32 0, i32* [[I]], align 4
14008 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
14009 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
14010 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
14011 // CHECK15:       omp.precond.then:
14012 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
14013 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14014 // CHECK15-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
14015 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14016 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14017 // CHECK15-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
14018 // CHECK15-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
14019 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14020 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14021 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14022 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14023 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14024 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
14025 // CHECK15-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1)
14026 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
14027 // CHECK15:       omp.dispatch.cond:
14028 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14029 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
14030 // CHECK15-NEXT:    [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
14031 // CHECK15-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
14032 // CHECK15-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
14033 // CHECK15:       omp.dispatch.body:
14034 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14035 // CHECK15-NEXT:    store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
14036 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14037 // CHECK15:       omp.inner.for.cond:
14038 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
14039 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15
14040 // CHECK15-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
14041 // CHECK15-NEXT:    br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14042 // CHECK15:       omp.inner.for.body:
14043 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
14044 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
14045 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14046 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !15
14047 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !15
14048 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP20]]
14049 // CHECK15-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15
14050 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
14051 // CHECK15:       omp.body.continue:
14052 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14053 // CHECK15:       omp.inner.for.inc:
14054 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
14055 // CHECK15-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP21]], 1
14056 // CHECK15-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
14057 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
14058 // CHECK15:       omp.inner.for.end:
14059 // CHECK15-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
14060 // CHECK15:       omp.dispatch.inc:
14061 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND]]
14062 // CHECK15:       omp.dispatch.end:
14063 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
14064 // CHECK15:       omp.precond.end:
14065 // CHECK15-NEXT:    ret void
14066 //
14067 //
14068 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168
14069 // CHECK15-SAME: (i32 [[M:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
14070 // CHECK15-NEXT:  entry:
14071 // CHECK15-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 4
14072 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
14073 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
14074 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
14075 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
14076 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
14077 // CHECK15-NEXT:    store i32 [[M]], i32* [[M_ADDR]], align 4
14078 // CHECK15-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
14079 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
14080 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
14081 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
14082 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
14083 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4
14084 // CHECK15-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
14085 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
14086 // CHECK15-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14087 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14088 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]])
14089 // CHECK15-NEXT:    ret void
14090 //
14091 //
14092 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..11
14093 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
14094 // CHECK15-NEXT:  entry:
14095 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14096 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14097 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
14098 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
14099 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
14100 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14101 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14102 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14103 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
14104 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
14105 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
14106 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14107 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14108 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14109 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14110 // CHECK15-NEXT:    [[I4:%.*]] = alloca i32, align 4
14111 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
14112 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14113 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14114 // CHECK15-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
14115 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
14116 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
14117 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14118 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
14119 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
14120 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
14121 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
14122 // CHECK15-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
14123 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14124 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
14125 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
14126 // CHECK15-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
14127 // CHECK15-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
14128 // CHECK15-NEXT:    store i32 0, i32* [[I]], align 4
14129 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14130 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
14131 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
14132 // CHECK15:       omp.precond.then:
14133 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
14134 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
14135 // CHECK15-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
14136 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14137 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14138 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14139 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
14140 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14141 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14142 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
14143 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
14144 // CHECK15-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14145 // CHECK15:       cond.true:
14146 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
14147 // CHECK15-NEXT:    br label [[COND_END:%.*]]
14148 // CHECK15:       cond.false:
14149 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14150 // CHECK15-NEXT:    br label [[COND_END]]
14151 // CHECK15:       cond.end:
14152 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
14153 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
14154 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14155 // CHECK15-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
14156 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14157 // CHECK15:       omp.inner.for.cond:
14158 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14159 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14160 // CHECK15-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
14161 // CHECK15-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14162 // CHECK15:       omp.inner.for.body:
14163 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14164 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14165 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14166 // CHECK15-NEXT:    store i32 [[TMP18]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14167 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14168 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP19]])
14169 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14170 // CHECK15:       omp.inner.for.inc:
14171 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14172 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
14173 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
14174 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
14175 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
14176 // CHECK15:       omp.inner.for.end:
14177 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
14178 // CHECK15:       omp.loop.exit:
14179 // CHECK15-NEXT:    [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14180 // CHECK15-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
14181 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
14182 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
14183 // CHECK15:       omp.precond.end:
14184 // CHECK15-NEXT:    ret void
14185 //
14186 //
14187 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..12
14188 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
14189 // CHECK15-NEXT:  entry:
14190 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14191 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14192 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
14193 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
14194 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
14195 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
14196 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
14197 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14198 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14199 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14200 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
14201 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
14202 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
14203 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
14204 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
14205 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14206 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14207 // CHECK15-NEXT:    [[I4:%.*]] = alloca i32, align 4
14208 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14209 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14210 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14211 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14212 // CHECK15-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
14213 // CHECK15-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
14214 // CHECK15-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
14215 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14216 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
14217 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
14218 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
14219 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
14220 // CHECK15-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
14221 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14222 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
14223 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
14224 // CHECK15-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
14225 // CHECK15-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
14226 // CHECK15-NEXT:    store i32 0, i32* [[I]], align 4
14227 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
14228 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
14229 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
14230 // CHECK15:       omp.precond.then:
14231 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
14232 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
14233 // CHECK15-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
14234 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14235 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14236 // CHECK15-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
14237 // CHECK15-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
14238 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14239 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14240 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14241 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14242 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14243 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14244 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
14245 // CHECK15-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 1073741859, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]])
14246 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
14247 // CHECK15:       omp.dispatch.cond:
14248 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14249 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
14250 // CHECK15-NEXT:    [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
14251 // CHECK15-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0
14252 // CHECK15-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
14253 // CHECK15:       omp.dispatch.body:
14254 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14255 // CHECK15-NEXT:    store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4
14256 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14257 // CHECK15:       omp.inner.for.cond:
14258 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
14259 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18
14260 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
14261 // CHECK15-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14262 // CHECK15:       omp.inner.for.body:
14263 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
14264 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
14265 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14266 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !18
14267 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !18
14268 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP21]]
14269 // CHECK15-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18
14270 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
14271 // CHECK15:       omp.body.continue:
14272 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14273 // CHECK15:       omp.inner.for.inc:
14274 // CHECK15-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
14275 // CHECK15-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP22]], 1
14276 // CHECK15-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
14277 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
14278 // CHECK15:       omp.inner.for.end:
14279 // CHECK15-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
14280 // CHECK15:       omp.dispatch.inc:
14281 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND]]
14282 // CHECK15:       omp.dispatch.end:
14283 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
14284 // CHECK15:       omp.precond.end:
14285 // CHECK15-NEXT:    ret void
14286 //
14287 //
14288 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
14289 // CHECK15-SAME: (i32 [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
14290 // CHECK15-NEXT:  entry:
14291 // CHECK15-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
14292 // CHECK15-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
14293 // CHECK15-NEXT:    [[M:%.*]] = alloca i32, align 4
14294 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
14295 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
14296 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
14297 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14298 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4
14299 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4
14300 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4
14301 // CHECK15-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
14302 // CHECK15-NEXT:    [[M_CASTED:%.*]] = alloca i32, align 4
14303 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 4
14304 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 4
14305 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 4
14306 // CHECK15-NEXT:    [[_TMP10:%.*]] = alloca i32, align 4
14307 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 4
14308 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 4
14309 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 4
14310 // CHECK15-NEXT:    [[_TMP16:%.*]] = alloca i32, align 4
14311 // CHECK15-NEXT:    [[M_CASTED19:%.*]] = alloca i32, align 4
14312 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [2 x i8*], align 4
14313 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS21:%.*]] = alloca [2 x i8*], align 4
14314 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [2 x i8*], align 4
14315 // CHECK15-NEXT:    [[_TMP23:%.*]] = alloca i32, align 4
14316 // CHECK15-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
14317 // CHECK15-NEXT:    store i32 10, i32* [[M]], align 4
14318 // CHECK15-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
14319 // CHECK15-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
14320 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4
14321 // CHECK15-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
14322 // CHECK15-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
14323 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4
14324 // CHECK15-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
14325 // CHECK15-NEXT:    store i8* null, i8** [[TMP4]], align 4
14326 // CHECK15-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
14327 // CHECK15-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
14328 // CHECK15-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
14329 // CHECK15-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
14330 // CHECK15-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
14331 // CHECK15-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
14332 // CHECK15:       omp_offload.failed:
14333 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]]
14334 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT]]
14335 // CHECK15:       omp_offload.cont:
14336 // CHECK15-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
14337 // CHECK15-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
14338 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4
14339 // CHECK15-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
14340 // CHECK15-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
14341 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4
14342 // CHECK15-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0
14343 // CHECK15-NEXT:    store i8* null, i8** [[TMP13]], align 4
14344 // CHECK15-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
14345 // CHECK15-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
14346 // CHECK15-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
14347 // CHECK15-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
14348 // CHECK15-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
14349 // CHECK15-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
14350 // CHECK15:       omp_offload.failed5:
14351 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121([10 x i32]* [[A]]) #[[ATTR3]]
14352 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT6]]
14353 // CHECK15:       omp_offload.cont6:
14354 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, i32* [[M]], align 4
14355 // CHECK15-NEXT:    store i32 [[TMP18]], i32* [[M_CASTED]], align 4
14356 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, i32* [[M_CASTED]], align 4
14357 // CHECK15-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
14358 // CHECK15-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32*
14359 // CHECK15-NEXT:    store i32 [[TMP19]], i32* [[TMP21]], align 4
14360 // CHECK15-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
14361 // CHECK15-NEXT:    [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32*
14362 // CHECK15-NEXT:    store i32 [[TMP19]], i32* [[TMP23]], align 4
14363 // CHECK15-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0
14364 // CHECK15-NEXT:    store i8* null, i8** [[TMP24]], align 4
14365 // CHECK15-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1
14366 // CHECK15-NEXT:    [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]**
14367 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 4
14368 // CHECK15-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1
14369 // CHECK15-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]**
14370 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 4
14371 // CHECK15-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 1
14372 // CHECK15-NEXT:    store i8* null, i8** [[TMP29]], align 4
14373 // CHECK15-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
14374 // CHECK15-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
14375 // CHECK15-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
14376 // CHECK15-NEXT:    [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
14377 // CHECK15-NEXT:    [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
14378 // CHECK15-NEXT:    br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
14379 // CHECK15:       omp_offload.failed11:
14380 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i32 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]]
14381 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT12]]
14382 // CHECK15:       omp_offload.cont12:
14383 // CHECK15-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
14384 // CHECK15-NEXT:    [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]**
14385 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 4
14386 // CHECK15-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
14387 // CHECK15-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]**
14388 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 4
14389 // CHECK15-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 0
14390 // CHECK15-NEXT:    store i8* null, i8** [[TMP38]], align 4
14391 // CHECK15-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
14392 // CHECK15-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
14393 // CHECK15-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
14394 // CHECK15-NEXT:    [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
14395 // CHECK15-NEXT:    [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0
14396 // CHECK15-NEXT:    br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
14397 // CHECK15:       omp_offload.failed17:
14398 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131([10 x i32]* [[A]]) #[[ATTR3]]
14399 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT18]]
14400 // CHECK15:       omp_offload.cont18:
14401 // CHECK15-NEXT:    [[TMP43:%.*]] = load i32, i32* [[M]], align 4
14402 // CHECK15-NEXT:    store i32 [[TMP43]], i32* [[M_CASTED19]], align 4
14403 // CHECK15-NEXT:    [[TMP44:%.*]] = load i32, i32* [[M_CASTED19]], align 4
14404 // CHECK15-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
14405 // CHECK15-NEXT:    [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32*
14406 // CHECK15-NEXT:    store i32 [[TMP44]], i32* [[TMP46]], align 4
14407 // CHECK15-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
14408 // CHECK15-NEXT:    [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32*
14409 // CHECK15-NEXT:    store i32 [[TMP44]], i32* [[TMP48]], align 4
14410 // CHECK15-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 0
14411 // CHECK15-NEXT:    store i8* null, i8** [[TMP49]], align 4
14412 // CHECK15-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1
14413 // CHECK15-NEXT:    [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]**
14414 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 4
14415 // CHECK15-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 1
14416 // CHECK15-NEXT:    [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]**
14417 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 4
14418 // CHECK15-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 1
14419 // CHECK15-NEXT:    store i8* null, i8** [[TMP54]], align 4
14420 // CHECK15-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
14421 // CHECK15-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
14422 // CHECK15-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
14423 // CHECK15-NEXT:    [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
14424 // CHECK15-NEXT:    [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0
14425 // CHECK15-NEXT:    br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]]
14426 // CHECK15:       omp_offload.failed24:
14427 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i32 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]]
14428 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT25]]
14429 // CHECK15:       omp_offload.cont25:
14430 // CHECK15-NEXT:    ret i32 0
14431 //
14432 //
14433 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
14434 // CHECK15-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14435 // CHECK15-NEXT:  entry:
14436 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14437 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14438 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14439 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
14440 // CHECK15-NEXT:    ret void
14441 //
14442 //
14443 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..14
14444 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14445 // CHECK15-NEXT:  entry:
14446 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14447 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14448 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14449 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14450 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14451 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14452 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14453 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14454 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14455 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
14456 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14457 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14458 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14459 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14460 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
14461 // CHECK15-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
14462 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14463 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14464 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14465 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
14466 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14467 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14468 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
14469 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14470 // CHECK15:       cond.true:
14471 // CHECK15-NEXT:    br label [[COND_END:%.*]]
14472 // CHECK15:       cond.false:
14473 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14474 // CHECK15-NEXT:    br label [[COND_END]]
14475 // CHECK15:       cond.end:
14476 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
14477 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
14478 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14479 // CHECK15-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
14480 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14481 // CHECK15:       omp.inner.for.cond:
14482 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14483 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14484 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
14485 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14486 // CHECK15:       omp.inner.for.body:
14487 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14488 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14489 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
14490 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14491 // CHECK15:       omp.inner.for.inc:
14492 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14493 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
14494 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
14495 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
14496 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
14497 // CHECK15:       omp.inner.for.end:
14498 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
14499 // CHECK15:       omp.loop.exit:
14500 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
14501 // CHECK15-NEXT:    ret void
14502 //
14503 //
14504 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..15
14505 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14506 // CHECK15-NEXT:  entry:
14507 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14508 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14509 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
14510 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
14511 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14512 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14513 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14514 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
14515 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
14516 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14517 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14518 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
14519 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14520 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14521 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14522 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14523 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14524 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14525 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
14526 // CHECK15-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
14527 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14528 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14529 // CHECK15-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
14530 // CHECK15-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
14531 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14532 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14533 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14534 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
14535 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14536 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14537 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
14538 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14539 // CHECK15:       cond.true:
14540 // CHECK15-NEXT:    br label [[COND_END:%.*]]
14541 // CHECK15:       cond.false:
14542 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14543 // CHECK15-NEXT:    br label [[COND_END]]
14544 // CHECK15:       cond.end:
14545 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
14546 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
14547 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14548 // CHECK15-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
14549 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14550 // CHECK15:       omp.inner.for.cond:
14551 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14552 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14553 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
14554 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14555 // CHECK15:       omp.inner.for.body:
14556 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14557 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
14558 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14559 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
14560 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
14561 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
14562 // CHECK15-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
14563 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
14564 // CHECK15:       omp.body.continue:
14565 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14566 // CHECK15:       omp.inner.for.inc:
14567 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14568 // CHECK15-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
14569 // CHECK15-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
14570 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
14571 // CHECK15:       omp.inner.for.end:
14572 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
14573 // CHECK15:       omp.loop.exit:
14574 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
14575 // CHECK15-NEXT:    ret void
14576 //
14577 //
14578 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121
14579 // CHECK15-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14580 // CHECK15-NEXT:  entry:
14581 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14582 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14583 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14584 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
14585 // CHECK15-NEXT:    ret void
14586 //
14587 //
14588 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..17
14589 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14590 // CHECK15-NEXT:  entry:
14591 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14592 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14593 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14594 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14595 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14596 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14597 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14598 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14599 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14600 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
14601 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14602 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14603 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14604 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14605 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
14606 // CHECK15-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
14607 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14608 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14609 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14610 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
14611 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14612 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14613 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
14614 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14615 // CHECK15:       cond.true:
14616 // CHECK15-NEXT:    br label [[COND_END:%.*]]
14617 // CHECK15:       cond.false:
14618 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14619 // CHECK15-NEXT:    br label [[COND_END]]
14620 // CHECK15:       cond.end:
14621 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
14622 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
14623 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14624 // CHECK15-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
14625 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14626 // CHECK15:       omp.inner.for.cond:
14627 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14628 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14629 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
14630 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14631 // CHECK15:       omp.inner.for.body:
14632 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14633 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14634 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
14635 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14636 // CHECK15:       omp.inner.for.inc:
14637 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14638 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
14639 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
14640 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
14641 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
14642 // CHECK15:       omp.inner.for.end:
14643 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
14644 // CHECK15:       omp.loop.exit:
14645 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
14646 // CHECK15-NEXT:    ret void
14647 //
14648 //
14649 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..18
14650 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14651 // CHECK15-NEXT:  entry:
14652 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14653 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14654 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
14655 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
14656 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14657 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14658 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14659 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
14660 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
14661 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14662 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14663 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
14664 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14665 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14666 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14667 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14668 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14669 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14670 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
14671 // CHECK15-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
14672 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14673 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14674 // CHECK15-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
14675 // CHECK15-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
14676 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14677 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14678 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14679 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
14680 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14681 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14682 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
14683 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14684 // CHECK15:       cond.true:
14685 // CHECK15-NEXT:    br label [[COND_END:%.*]]
14686 // CHECK15:       cond.false:
14687 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14688 // CHECK15-NEXT:    br label [[COND_END]]
14689 // CHECK15:       cond.end:
14690 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
14691 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
14692 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14693 // CHECK15-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
14694 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14695 // CHECK15:       omp.inner.for.cond:
14696 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14697 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14698 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
14699 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14700 // CHECK15:       omp.inner.for.body:
14701 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14702 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
14703 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14704 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
14705 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
14706 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
14707 // CHECK15-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
14708 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
14709 // CHECK15:       omp.body.continue:
14710 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14711 // CHECK15:       omp.inner.for.inc:
14712 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14713 // CHECK15-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
14714 // CHECK15-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
14715 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
14716 // CHECK15:       omp.inner.for.end:
14717 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
14718 // CHECK15:       omp.loop.exit:
14719 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
14720 // CHECK15-NEXT:    ret void
14721 //
14722 //
14723 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126
14724 // CHECK15-SAME: (i32 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14725 // CHECK15-NEXT:  entry:
14726 // CHECK15-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 4
14727 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14728 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
14729 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
14730 // CHECK15-NEXT:    store i32 [[M]], i32* [[M_ADDR]], align 4
14731 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14732 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14733 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4
14734 // CHECK15-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
14735 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
14736 // CHECK15-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14737 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14738 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]])
14739 // CHECK15-NEXT:    ret void
14740 //
14741 //
14742 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..21
14743 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
14744 // CHECK15-NEXT:  entry:
14745 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14746 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14747 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14748 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14749 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14750 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14751 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14752 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14753 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14754 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14755 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
14756 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
14757 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14758 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14759 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14760 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14761 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14762 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
14763 // CHECK15-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
14764 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14765 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14766 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14767 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
14768 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14769 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14770 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
14771 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14772 // CHECK15:       cond.true:
14773 // CHECK15-NEXT:    br label [[COND_END:%.*]]
14774 // CHECK15:       cond.false:
14775 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14776 // CHECK15-NEXT:    br label [[COND_END]]
14777 // CHECK15:       cond.end:
14778 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
14779 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
14780 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14781 // CHECK15-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
14782 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14783 // CHECK15:       omp.inner.for.cond:
14784 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14785 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14786 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
14787 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14788 // CHECK15:       omp.inner.for.body:
14789 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14790 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14791 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14792 // CHECK15-NEXT:    store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14793 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
14794 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]])
14795 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14796 // CHECK15:       omp.inner.for.inc:
14797 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14798 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
14799 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
14800 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
14801 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
14802 // CHECK15:       omp.inner.for.end:
14803 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
14804 // CHECK15:       omp.loop.exit:
14805 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
14806 // CHECK15-NEXT:    ret void
14807 //
14808 //
14809 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..22
14810 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
14811 // CHECK15-NEXT:  entry:
14812 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14813 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14814 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
14815 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
14816 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14817 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14818 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14819 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14820 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
14821 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
14822 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14823 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14824 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
14825 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14826 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14827 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14828 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14829 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14830 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14831 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14832 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
14833 // CHECK15-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
14834 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14835 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14836 // CHECK15-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
14837 // CHECK15-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
14838 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14839 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14840 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
14841 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14842 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
14843 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
14844 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
14845 // CHECK15:       omp.dispatch.cond:
14846 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14847 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14848 // CHECK15-NEXT:    [[CMP:%.*]] = icmp ugt i32 [[TMP6]], [[TMP7]]
14849 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14850 // CHECK15:       cond.true:
14851 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14852 // CHECK15-NEXT:    br label [[COND_END:%.*]]
14853 // CHECK15:       cond.false:
14854 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14855 // CHECK15-NEXT:    br label [[COND_END]]
14856 // CHECK15:       cond.end:
14857 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP8]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
14858 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
14859 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14860 // CHECK15-NEXT:    store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
14861 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14862 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14863 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
14864 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
14865 // CHECK15:       omp.dispatch.body:
14866 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14867 // CHECK15:       omp.inner.for.cond:
14868 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14869 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14870 // CHECK15-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
14871 // CHECK15-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14872 // CHECK15:       omp.inner.for.body:
14873 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14874 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
14875 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14876 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
14877 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I]], align 4
14878 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP16]]
14879 // CHECK15-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
14880 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
14881 // CHECK15:       omp.body.continue:
14882 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14883 // CHECK15:       omp.inner.for.inc:
14884 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14885 // CHECK15-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1
14886 // CHECK15-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
14887 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
14888 // CHECK15:       omp.inner.for.end:
14889 // CHECK15-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
14890 // CHECK15:       omp.dispatch.inc:
14891 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
14892 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
14893 // CHECK15-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
14894 // CHECK15-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
14895 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
14896 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
14897 // CHECK15-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
14898 // CHECK15-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
14899 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND]]
14900 // CHECK15:       omp.dispatch.end:
14901 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
14902 // CHECK15-NEXT:    ret void
14903 //
14904 //
14905 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131
14906 // CHECK15-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14907 // CHECK15-NEXT:  entry:
14908 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14909 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14910 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14911 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
14912 // CHECK15-NEXT:    ret void
14913 //
14914 //
14915 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..25
14916 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14917 // CHECK15-NEXT:  entry:
14918 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14919 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14920 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14921 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14922 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14923 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14924 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14925 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14926 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14927 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
14928 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14929 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14930 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14931 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14932 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
14933 // CHECK15-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
14934 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
14935 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
14936 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
14937 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
14938 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
14939 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14940 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
14941 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14942 // CHECK15:       cond.true:
14943 // CHECK15-NEXT:    br label [[COND_END:%.*]]
14944 // CHECK15:       cond.false:
14945 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14946 // CHECK15-NEXT:    br label [[COND_END]]
14947 // CHECK15:       cond.end:
14948 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
14949 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
14950 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14951 // CHECK15-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
14952 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14953 // CHECK15:       omp.inner.for.cond:
14954 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14955 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14956 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
14957 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14958 // CHECK15:       omp.inner.for.body:
14959 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
14960 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
14961 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
14962 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14963 // CHECK15:       omp.inner.for.inc:
14964 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
14965 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
14966 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
14967 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
14968 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
14969 // CHECK15:       omp.inner.for.end:
14970 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
14971 // CHECK15:       omp.loop.exit:
14972 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
14973 // CHECK15-NEXT:    ret void
14974 //
14975 //
14976 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..26
14977 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14978 // CHECK15-NEXT:  entry:
14979 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
14980 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
14981 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
14982 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
14983 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
14984 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14985 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14986 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
14987 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
14988 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14989 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14990 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
14991 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
14992 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
14993 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
14994 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
14995 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
14996 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
14997 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
14998 // CHECK15-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
14999 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
15000 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
15001 // CHECK15-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
15002 // CHECK15-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
15003 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15004 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15005 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
15006 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15007 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15008 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
15009 // CHECK15-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
15010 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
15011 // CHECK15:       omp.dispatch.cond:
15012 // CHECK15-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
15013 // CHECK15-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
15014 // CHECK15-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
15015 // CHECK15:       omp.dispatch.body:
15016 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
15017 // CHECK15-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
15018 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
15019 // CHECK15:       omp.inner.for.cond:
15020 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
15021 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21
15022 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
15023 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15024 // CHECK15:       omp.inner.for.body:
15025 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
15026 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
15027 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
15028 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21
15029 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21
15030 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP12]]
15031 // CHECK15-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21
15032 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
15033 // CHECK15:       omp.body.continue:
15034 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
15035 // CHECK15:       omp.inner.for.inc:
15036 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
15037 // CHECK15-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
15038 // CHECK15-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
15039 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
15040 // CHECK15:       omp.inner.for.end:
15041 // CHECK15-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
15042 // CHECK15:       omp.dispatch.inc:
15043 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND]]
15044 // CHECK15:       omp.dispatch.end:
15045 // CHECK15-NEXT:    ret void
15046 //
15047 //
15048 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136
15049 // CHECK15-SAME: (i32 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
15050 // CHECK15-NEXT:  entry:
15051 // CHECK15-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 4
15052 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
15053 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
15054 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
15055 // CHECK15-NEXT:    store i32 [[M]], i32* [[M_ADDR]], align 4
15056 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
15057 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
15058 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4
15059 // CHECK15-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
15060 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15061 // CHECK15-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
15062 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
15063 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]])
15064 // CHECK15-NEXT:    ret void
15065 //
15066 //
15067 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..29
15068 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
15069 // CHECK15-NEXT:  entry:
15070 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
15071 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
15072 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
15073 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
15074 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
15075 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
15076 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
15077 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
15078 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15079 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15080 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
15081 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
15082 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
15083 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
15084 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
15085 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
15086 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
15087 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
15088 // CHECK15-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
15089 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15090 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15091 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15092 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
15093 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
15094 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15095 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
15096 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15097 // CHECK15:       cond.true:
15098 // CHECK15-NEXT:    br label [[COND_END:%.*]]
15099 // CHECK15:       cond.false:
15100 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15101 // CHECK15-NEXT:    br label [[COND_END]]
15102 // CHECK15:       cond.end:
15103 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
15104 // CHECK15-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
15105 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
15106 // CHECK15-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
15107 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
15108 // CHECK15:       omp.inner.for.cond:
15109 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15110 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15111 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
15112 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15113 // CHECK15:       omp.inner.for.body:
15114 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
15115 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15116 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
15117 // CHECK15-NEXT:    store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
15118 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
15119 // CHECK15-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]])
15120 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
15121 // CHECK15:       omp.inner.for.inc:
15122 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15123 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
15124 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
15125 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
15126 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
15127 // CHECK15:       omp.inner.for.end:
15128 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
15129 // CHECK15:       omp.loop.exit:
15130 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
15131 // CHECK15-NEXT:    ret void
15132 //
15133 //
15134 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..30
15135 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
15136 // CHECK15-NEXT:  entry:
15137 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
15138 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
15139 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
15140 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
15141 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
15142 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
15143 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
15144 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
15145 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
15146 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
15147 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15148 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15149 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
15150 // CHECK15-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
15151 // CHECK15-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
15152 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
15153 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
15154 // CHECK15-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
15155 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
15156 // CHECK15-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
15157 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
15158 // CHECK15-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
15159 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
15160 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
15161 // CHECK15-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
15162 // CHECK15-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
15163 // CHECK15-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15164 // CHECK15-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15165 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
15166 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
15167 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15168 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15169 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
15170 // CHECK15-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
15171 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
15172 // CHECK15:       omp.dispatch.cond:
15173 // CHECK15-NEXT:    [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
15174 // CHECK15-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
15175 // CHECK15-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
15176 // CHECK15:       omp.dispatch.body:
15177 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
15178 // CHECK15-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
15179 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
15180 // CHECK15:       omp.inner.for.cond:
15181 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
15182 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !24
15183 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
15184 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15185 // CHECK15:       omp.inner.for.body:
15186 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
15187 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
15188 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
15189 // CHECK15-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !24
15190 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !24
15191 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP13]]
15192 // CHECK15-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !24
15193 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
15194 // CHECK15:       omp.body.continue:
15195 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
15196 // CHECK15:       omp.inner.for.inc:
15197 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
15198 // CHECK15-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP14]], 1
15199 // CHECK15-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
15200 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
15201 // CHECK15:       omp.inner.for.end:
15202 // CHECK15-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
15203 // CHECK15:       omp.dispatch.inc:
15204 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND]]
15205 // CHECK15:       omp.dispatch.end:
15206 // CHECK15-NEXT:    ret void
15207 //
15208 //
15209 // CHECK15-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
15210 // CHECK15-SAME: () #[[ATTR5:[0-9]+]] {
15211 // CHECK15-NEXT:  entry:
15212 // CHECK15-NEXT:    call void @__tgt_register_requires(i64 1)
15213 // CHECK15-NEXT:    ret void
15214 //
15215 //
15216 // CHECK16-LABEL: define {{[^@]+}}@main
15217 // CHECK16-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
15218 // CHECK16-NEXT:  entry:
15219 // CHECK16-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
15220 // CHECK16-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
15221 // CHECK16-NEXT:    [[ARGV_ADDR:%.*]] = alloca i8**, align 4
15222 // CHECK16-NEXT:    [[N:%.*]] = alloca i32, align 4
15223 // CHECK16-NEXT:    [[SAVED_STACK:%.*]] = alloca i8*, align 4
15224 // CHECK16-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i32, align 4
15225 // CHECK16-NEXT:    [[M:%.*]] = alloca i32, align 4
15226 // CHECK16-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
15227 // CHECK16-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
15228 // CHECK16-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
15229 // CHECK16-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
15230 // CHECK16-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
15231 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
15232 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
15233 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
15234 // CHECK16-NEXT:    [[N_CASTED3:%.*]] = alloca i32, align 4
15235 // CHECK16-NEXT:    [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4
15236 // CHECK16-NEXT:    [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4
15237 // CHECK16-NEXT:    [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4
15238 // CHECK16-NEXT:    [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4
15239 // CHECK16-NEXT:    [[_TMP8:%.*]] = alloca i32, align 4
15240 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
15241 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
15242 // CHECK16-NEXT:    [[M_CASTED:%.*]] = alloca i32, align 4
15243 // CHECK16-NEXT:    [[N_CASTED17:%.*]] = alloca i32, align 4
15244 // CHECK16-NEXT:    [[DOTOFFLOAD_BASEPTRS18:%.*]] = alloca [4 x i8*], align 4
15245 // CHECK16-NEXT:    [[DOTOFFLOAD_PTRS19:%.*]] = alloca [4 x i8*], align 4
15246 // CHECK16-NEXT:    [[DOTOFFLOAD_MAPPERS20:%.*]] = alloca [4 x i8*], align 4
15247 // CHECK16-NEXT:    [[DOTOFFLOAD_SIZES21:%.*]] = alloca [4 x i64], align 4
15248 // CHECK16-NEXT:    [[_TMP22:%.*]] = alloca i32, align 4
15249 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_23:%.*]] = alloca i32, align 4
15250 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4
15251 // CHECK16-NEXT:    [[N_CASTED31:%.*]] = alloca i32, align 4
15252 // CHECK16-NEXT:    [[DOTOFFLOAD_BASEPTRS32:%.*]] = alloca [3 x i8*], align 4
15253 // CHECK16-NEXT:    [[DOTOFFLOAD_PTRS33:%.*]] = alloca [3 x i8*], align 4
15254 // CHECK16-NEXT:    [[DOTOFFLOAD_MAPPERS34:%.*]] = alloca [3 x i8*], align 4
15255 // CHECK16-NEXT:    [[DOTOFFLOAD_SIZES35:%.*]] = alloca [3 x i64], align 4
15256 // CHECK16-NEXT:    [[_TMP36:%.*]] = alloca i32, align 4
15257 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_37:%.*]] = alloca i32, align 4
15258 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4
15259 // CHECK16-NEXT:    [[M_CASTED45:%.*]] = alloca i32, align 4
15260 // CHECK16-NEXT:    [[N_CASTED46:%.*]] = alloca i32, align 4
15261 // CHECK16-NEXT:    [[DOTOFFLOAD_BASEPTRS47:%.*]] = alloca [4 x i8*], align 4
15262 // CHECK16-NEXT:    [[DOTOFFLOAD_PTRS48:%.*]] = alloca [4 x i8*], align 4
15263 // CHECK16-NEXT:    [[DOTOFFLOAD_MAPPERS49:%.*]] = alloca [4 x i8*], align 4
15264 // CHECK16-NEXT:    [[DOTOFFLOAD_SIZES50:%.*]] = alloca [4 x i64], align 4
15265 // CHECK16-NEXT:    [[_TMP51:%.*]] = alloca i32, align 4
15266 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_52:%.*]] = alloca i32, align 4
15267 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_53:%.*]] = alloca i32, align 4
15268 // CHECK16-NEXT:    store i32 0, i32* [[RETVAL]], align 4
15269 // CHECK16-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
15270 // CHECK16-NEXT:    store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
15271 // CHECK16-NEXT:    store i32 100, i32* [[N]], align 4
15272 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N]], align 4
15273 // CHECK16-NEXT:    [[TMP1:%.*]] = call i8* @llvm.stacksave()
15274 // CHECK16-NEXT:    store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
15275 // CHECK16-NEXT:    [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
15276 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
15277 // CHECK16-NEXT:    store i32 10, i32* [[M]], align 4
15278 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N]], align 4
15279 // CHECK16-NEXT:    store i32 [[TMP2]], i32* [[N_CASTED]], align 4
15280 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
15281 // CHECK16-NEXT:    [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4
15282 // CHECK16-NEXT:    [[TMP5:%.*]] = sext i32 [[TMP4]] to i64
15283 // CHECK16-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
15284 // CHECK16-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32*
15285 // CHECK16-NEXT:    store i32 [[TMP3]], i32* [[TMP7]], align 4
15286 // CHECK16-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
15287 // CHECK16-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32*
15288 // CHECK16-NEXT:    store i32 [[TMP3]], i32* [[TMP9]], align 4
15289 // CHECK16-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
15290 // CHECK16-NEXT:    store i64 4, i64* [[TMP10]], align 4
15291 // CHECK16-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
15292 // CHECK16-NEXT:    store i8* null, i8** [[TMP11]], align 4
15293 // CHECK16-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
15294 // CHECK16-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
15295 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[TMP13]], align 4
15296 // CHECK16-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
15297 // CHECK16-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
15298 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[TMP15]], align 4
15299 // CHECK16-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
15300 // CHECK16-NEXT:    store i64 4, i64* [[TMP16]], align 4
15301 // CHECK16-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
15302 // CHECK16-NEXT:    store i8* null, i8** [[TMP17]], align 4
15303 // CHECK16-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
15304 // CHECK16-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
15305 // CHECK16-NEXT:    store i32* [[VLA]], i32** [[TMP19]], align 4
15306 // CHECK16-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
15307 // CHECK16-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
15308 // CHECK16-NEXT:    store i32* [[VLA]], i32** [[TMP21]], align 4
15309 // CHECK16-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
15310 // CHECK16-NEXT:    store i64 [[TMP5]], i64* [[TMP22]], align 4
15311 // CHECK16-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
15312 // CHECK16-NEXT:    store i8* null, i8** [[TMP23]], align 4
15313 // CHECK16-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
15314 // CHECK16-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
15315 // CHECK16-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
15316 // CHECK16-NEXT:    [[TMP27:%.*]] = load i32, i32* [[N]], align 4
15317 // CHECK16-NEXT:    store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
15318 // CHECK16-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15319 // CHECK16-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
15320 // CHECK16-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
15321 // CHECK16-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
15322 // CHECK16-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
15323 // CHECK16-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15324 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
15325 // CHECK16-NEXT:    [[TMP30:%.*]] = zext i32 [[ADD]] to i64
15326 // CHECK16-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]])
15327 // CHECK16-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
15328 // CHECK16-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
15329 // CHECK16-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
15330 // CHECK16:       omp_offload.failed:
15331 // CHECK16-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
15332 // CHECK16-NEXT:    br label [[OMP_OFFLOAD_CONT]]
15333 // CHECK16:       omp_offload.cont:
15334 // CHECK16-NEXT:    [[TMP33:%.*]] = load i32, i32* [[N]], align 4
15335 // CHECK16-NEXT:    store i32 [[TMP33]], i32* [[N_CASTED3]], align 4
15336 // CHECK16-NEXT:    [[TMP34:%.*]] = load i32, i32* [[N_CASTED3]], align 4
15337 // CHECK16-NEXT:    [[TMP35:%.*]] = mul nuw i32 [[TMP0]], 4
15338 // CHECK16-NEXT:    [[TMP36:%.*]] = sext i32 [[TMP35]] to i64
15339 // CHECK16-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
15340 // CHECK16-NEXT:    [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32*
15341 // CHECK16-NEXT:    store i32 [[TMP34]], i32* [[TMP38]], align 4
15342 // CHECK16-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
15343 // CHECK16-NEXT:    [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32*
15344 // CHECK16-NEXT:    store i32 [[TMP34]], i32* [[TMP40]], align 4
15345 // CHECK16-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
15346 // CHECK16-NEXT:    store i64 4, i64* [[TMP41]], align 4
15347 // CHECK16-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0
15348 // CHECK16-NEXT:    store i8* null, i8** [[TMP42]], align 4
15349 // CHECK16-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
15350 // CHECK16-NEXT:    [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i32*
15351 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[TMP44]], align 4
15352 // CHECK16-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
15353 // CHECK16-NEXT:    [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32*
15354 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[TMP46]], align 4
15355 // CHECK16-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 1
15356 // CHECK16-NEXT:    store i64 4, i64* [[TMP47]], align 4
15357 // CHECK16-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1
15358 // CHECK16-NEXT:    store i8* null, i8** [[TMP48]], align 4
15359 // CHECK16-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
15360 // CHECK16-NEXT:    [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32**
15361 // CHECK16-NEXT:    store i32* [[VLA]], i32** [[TMP50]], align 4
15362 // CHECK16-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
15363 // CHECK16-NEXT:    [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32**
15364 // CHECK16-NEXT:    store i32* [[VLA]], i32** [[TMP52]], align 4
15365 // CHECK16-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
15366 // CHECK16-NEXT:    store i64 [[TMP36]], i64* [[TMP53]], align 4
15367 // CHECK16-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2
15368 // CHECK16-NEXT:    store i8* null, i8** [[TMP54]], align 4
15369 // CHECK16-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
15370 // CHECK16-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
15371 // CHECK16-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
15372 // CHECK16-NEXT:    [[TMP58:%.*]] = load i32, i32* [[N]], align 4
15373 // CHECK16-NEXT:    store i32 [[TMP58]], i32* [[DOTCAPTURE_EXPR_9]], align 4
15374 // CHECK16-NEXT:    [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4
15375 // CHECK16-NEXT:    [[SUB11:%.*]] = sub nsw i32 [[TMP59]], 0
15376 // CHECK16-NEXT:    [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
15377 // CHECK16-NEXT:    [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
15378 // CHECK16-NEXT:    store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4
15379 // CHECK16-NEXT:    [[TMP60:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
15380 // CHECK16-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP60]], 1
15381 // CHECK16-NEXT:    [[TMP61:%.*]] = zext i32 [[ADD14]] to i64
15382 // CHECK16-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP61]])
15383 // CHECK16-NEXT:    [[TMP62:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, i32 3, i8** [[TMP55]], i8** [[TMP56]], i64* [[TMP57]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
15384 // CHECK16-NEXT:    [[TMP63:%.*]] = icmp ne i32 [[TMP62]], 0
15385 // CHECK16-NEXT:    br i1 [[TMP63]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]]
15386 // CHECK16:       omp_offload.failed15:
15387 // CHECK16-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i32 [[TMP34]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
15388 // CHECK16-NEXT:    br label [[OMP_OFFLOAD_CONT16]]
15389 // CHECK16:       omp_offload.cont16:
15390 // CHECK16-NEXT:    [[TMP64:%.*]] = load i32, i32* [[M]], align 4
15391 // CHECK16-NEXT:    store i32 [[TMP64]], i32* [[M_CASTED]], align 4
15392 // CHECK16-NEXT:    [[TMP65:%.*]] = load i32, i32* [[M_CASTED]], align 4
15393 // CHECK16-NEXT:    [[TMP66:%.*]] = load i32, i32* [[N]], align 4
15394 // CHECK16-NEXT:    store i32 [[TMP66]], i32* [[N_CASTED17]], align 4
15395 // CHECK16-NEXT:    [[TMP67:%.*]] = load i32, i32* [[N_CASTED17]], align 4
15396 // CHECK16-NEXT:    [[TMP68:%.*]] = mul nuw i32 [[TMP0]], 4
15397 // CHECK16-NEXT:    [[TMP69:%.*]] = sext i32 [[TMP68]] to i64
15398 // CHECK16-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0
15399 // CHECK16-NEXT:    [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i32*
15400 // CHECK16-NEXT:    store i32 [[TMP65]], i32* [[TMP71]], align 4
15401 // CHECK16-NEXT:    [[TMP72:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0
15402 // CHECK16-NEXT:    [[TMP73:%.*]] = bitcast i8** [[TMP72]] to i32*
15403 // CHECK16-NEXT:    store i32 [[TMP65]], i32* [[TMP73]], align 4
15404 // CHECK16-NEXT:    [[TMP74:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0
15405 // CHECK16-NEXT:    store i64 4, i64* [[TMP74]], align 4
15406 // CHECK16-NEXT:    [[TMP75:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 0
15407 // CHECK16-NEXT:    store i8* null, i8** [[TMP75]], align 4
15408 // CHECK16-NEXT:    [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 1
15409 // CHECK16-NEXT:    [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i32*
15410 // CHECK16-NEXT:    store i32 [[TMP67]], i32* [[TMP77]], align 4
15411 // CHECK16-NEXT:    [[TMP78:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 1
15412 // CHECK16-NEXT:    [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i32*
15413 // CHECK16-NEXT:    store i32 [[TMP67]], i32* [[TMP79]], align 4
15414 // CHECK16-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 1
15415 // CHECK16-NEXT:    store i64 4, i64* [[TMP80]], align 4
15416 // CHECK16-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 1
15417 // CHECK16-NEXT:    store i8* null, i8** [[TMP81]], align 4
15418 // CHECK16-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 2
15419 // CHECK16-NEXT:    [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i32*
15420 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[TMP83]], align 4
15421 // CHECK16-NEXT:    [[TMP84:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 2
15422 // CHECK16-NEXT:    [[TMP85:%.*]] = bitcast i8** [[TMP84]] to i32*
15423 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[TMP85]], align 4
15424 // CHECK16-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 2
15425 // CHECK16-NEXT:    store i64 4, i64* [[TMP86]], align 4
15426 // CHECK16-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 2
15427 // CHECK16-NEXT:    store i8* null, i8** [[TMP87]], align 4
15428 // CHECK16-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 3
15429 // CHECK16-NEXT:    [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32**
15430 // CHECK16-NEXT:    store i32* [[VLA]], i32** [[TMP89]], align 4
15431 // CHECK16-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 3
15432 // CHECK16-NEXT:    [[TMP91:%.*]] = bitcast i8** [[TMP90]] to i32**
15433 // CHECK16-NEXT:    store i32* [[VLA]], i32** [[TMP91]], align 4
15434 // CHECK16-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 3
15435 // CHECK16-NEXT:    store i64 [[TMP69]], i64* [[TMP92]], align 4
15436 // CHECK16-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 3
15437 // CHECK16-NEXT:    store i8* null, i8** [[TMP93]], align 4
15438 // CHECK16-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0
15439 // CHECK16-NEXT:    [[TMP95:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0
15440 // CHECK16-NEXT:    [[TMP96:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0
15441 // CHECK16-NEXT:    [[TMP97:%.*]] = load i32, i32* [[N]], align 4
15442 // CHECK16-NEXT:    store i32 [[TMP97]], i32* [[DOTCAPTURE_EXPR_23]], align 4
15443 // CHECK16-NEXT:    [[TMP98:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_23]], align 4
15444 // CHECK16-NEXT:    [[SUB25:%.*]] = sub nsw i32 [[TMP98]], 0
15445 // CHECK16-NEXT:    [[DIV26:%.*]] = sdiv i32 [[SUB25]], 1
15446 // CHECK16-NEXT:    [[SUB27:%.*]] = sub nsw i32 [[DIV26]], 1
15447 // CHECK16-NEXT:    store i32 [[SUB27]], i32* [[DOTCAPTURE_EXPR_24]], align 4
15448 // CHECK16-NEXT:    [[TMP99:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4
15449 // CHECK16-NEXT:    [[ADD28:%.*]] = add nsw i32 [[TMP99]], 1
15450 // CHECK16-NEXT:    [[TMP100:%.*]] = zext i32 [[ADD28]] to i64
15451 // CHECK16-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP100]])
15452 // CHECK16-NEXT:    [[TMP101:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, i32 4, i8** [[TMP94]], i8** [[TMP95]], i64* [[TMP96]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
15453 // CHECK16-NEXT:    [[TMP102:%.*]] = icmp ne i32 [[TMP101]], 0
15454 // CHECK16-NEXT:    br i1 [[TMP102]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]]
15455 // CHECK16:       omp_offload.failed29:
15456 // CHECK16-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i32 [[TMP65]], i32 [[TMP67]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
15457 // CHECK16-NEXT:    br label [[OMP_OFFLOAD_CONT30]]
15458 // CHECK16:       omp_offload.cont30:
15459 // CHECK16-NEXT:    [[TMP103:%.*]] = load i32, i32* [[N]], align 4
15460 // CHECK16-NEXT:    store i32 [[TMP103]], i32* [[N_CASTED31]], align 4
15461 // CHECK16-NEXT:    [[TMP104:%.*]] = load i32, i32* [[N_CASTED31]], align 4
15462 // CHECK16-NEXT:    [[TMP105:%.*]] = mul nuw i32 [[TMP0]], 4
15463 // CHECK16-NEXT:    [[TMP106:%.*]] = sext i32 [[TMP105]] to i64
15464 // CHECK16-NEXT:    [[TMP107:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0
15465 // CHECK16-NEXT:    [[TMP108:%.*]] = bitcast i8** [[TMP107]] to i32*
15466 // CHECK16-NEXT:    store i32 [[TMP104]], i32* [[TMP108]], align 4
15467 // CHECK16-NEXT:    [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0
15468 // CHECK16-NEXT:    [[TMP110:%.*]] = bitcast i8** [[TMP109]] to i32*
15469 // CHECK16-NEXT:    store i32 [[TMP104]], i32* [[TMP110]], align 4
15470 // CHECK16-NEXT:    [[TMP111:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 0
15471 // CHECK16-NEXT:    store i64 4, i64* [[TMP111]], align 4
15472 // CHECK16-NEXT:    [[TMP112:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 0
15473 // CHECK16-NEXT:    store i8* null, i8** [[TMP112]], align 4
15474 // CHECK16-NEXT:    [[TMP113:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 1
15475 // CHECK16-NEXT:    [[TMP114:%.*]] = bitcast i8** [[TMP113]] to i32*
15476 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[TMP114]], align 4
15477 // CHECK16-NEXT:    [[TMP115:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 1
15478 // CHECK16-NEXT:    [[TMP116:%.*]] = bitcast i8** [[TMP115]] to i32*
15479 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[TMP116]], align 4
15480 // CHECK16-NEXT:    [[TMP117:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 1
15481 // CHECK16-NEXT:    store i64 4, i64* [[TMP117]], align 4
15482 // CHECK16-NEXT:    [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 1
15483 // CHECK16-NEXT:    store i8* null, i8** [[TMP118]], align 4
15484 // CHECK16-NEXT:    [[TMP119:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 2
15485 // CHECK16-NEXT:    [[TMP120:%.*]] = bitcast i8** [[TMP119]] to i32**
15486 // CHECK16-NEXT:    store i32* [[VLA]], i32** [[TMP120]], align 4
15487 // CHECK16-NEXT:    [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 2
15488 // CHECK16-NEXT:    [[TMP122:%.*]] = bitcast i8** [[TMP121]] to i32**
15489 // CHECK16-NEXT:    store i32* [[VLA]], i32** [[TMP122]], align 4
15490 // CHECK16-NEXT:    [[TMP123:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 2
15491 // CHECK16-NEXT:    store i64 [[TMP106]], i64* [[TMP123]], align 4
15492 // CHECK16-NEXT:    [[TMP124:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 2
15493 // CHECK16-NEXT:    store i8* null, i8** [[TMP124]], align 4
15494 // CHECK16-NEXT:    [[TMP125:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0
15495 // CHECK16-NEXT:    [[TMP126:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0
15496 // CHECK16-NEXT:    [[TMP127:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 0
15497 // CHECK16-NEXT:    [[TMP128:%.*]] = load i32, i32* [[N]], align 4
15498 // CHECK16-NEXT:    store i32 [[TMP128]], i32* [[DOTCAPTURE_EXPR_37]], align 4
15499 // CHECK16-NEXT:    [[TMP129:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_37]], align 4
15500 // CHECK16-NEXT:    [[SUB39:%.*]] = sub nsw i32 [[TMP129]], 0
15501 // CHECK16-NEXT:    [[DIV40:%.*]] = sdiv i32 [[SUB39]], 1
15502 // CHECK16-NEXT:    [[SUB41:%.*]] = sub nsw i32 [[DIV40]], 1
15503 // CHECK16-NEXT:    store i32 [[SUB41]], i32* [[DOTCAPTURE_EXPR_38]], align 4
15504 // CHECK16-NEXT:    [[TMP130:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_38]], align 4
15505 // CHECK16-NEXT:    [[ADD42:%.*]] = add nsw i32 [[TMP130]], 1
15506 // CHECK16-NEXT:    [[TMP131:%.*]] = zext i32 [[ADD42]] to i64
15507 // CHECK16-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP131]])
15508 // CHECK16-NEXT:    [[TMP132:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, i32 3, i8** [[TMP125]], i8** [[TMP126]], i64* [[TMP127]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
15509 // CHECK16-NEXT:    [[TMP133:%.*]] = icmp ne i32 [[TMP132]], 0
15510 // CHECK16-NEXT:    br i1 [[TMP133]], label [[OMP_OFFLOAD_FAILED43:%.*]], label [[OMP_OFFLOAD_CONT44:%.*]]
15511 // CHECK16:       omp_offload.failed43:
15512 // CHECK16-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i32 [[TMP104]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
15513 // CHECK16-NEXT:    br label [[OMP_OFFLOAD_CONT44]]
15514 // CHECK16:       omp_offload.cont44:
15515 // CHECK16-NEXT:    [[TMP134:%.*]] = load i32, i32* [[M]], align 4
15516 // CHECK16-NEXT:    store i32 [[TMP134]], i32* [[M_CASTED45]], align 4
15517 // CHECK16-NEXT:    [[TMP135:%.*]] = load i32, i32* [[M_CASTED45]], align 4
15518 // CHECK16-NEXT:    [[TMP136:%.*]] = load i32, i32* [[N]], align 4
15519 // CHECK16-NEXT:    store i32 [[TMP136]], i32* [[N_CASTED46]], align 4
15520 // CHECK16-NEXT:    [[TMP137:%.*]] = load i32, i32* [[N_CASTED46]], align 4
15521 // CHECK16-NEXT:    [[TMP138:%.*]] = mul nuw i32 [[TMP0]], 4
15522 // CHECK16-NEXT:    [[TMP139:%.*]] = sext i32 [[TMP138]] to i64
15523 // CHECK16-NEXT:    [[TMP140:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0
15524 // CHECK16-NEXT:    [[TMP141:%.*]] = bitcast i8** [[TMP140]] to i32*
15525 // CHECK16-NEXT:    store i32 [[TMP135]], i32* [[TMP141]], align 4
15526 // CHECK16-NEXT:    [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0
15527 // CHECK16-NEXT:    [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i32*
15528 // CHECK16-NEXT:    store i32 [[TMP135]], i32* [[TMP143]], align 4
15529 // CHECK16-NEXT:    [[TMP144:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 0
15530 // CHECK16-NEXT:    store i64 4, i64* [[TMP144]], align 4
15531 // CHECK16-NEXT:    [[TMP145:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 0
15532 // CHECK16-NEXT:    store i8* null, i8** [[TMP145]], align 4
15533 // CHECK16-NEXT:    [[TMP146:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 1
15534 // CHECK16-NEXT:    [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i32*
15535 // CHECK16-NEXT:    store i32 [[TMP137]], i32* [[TMP147]], align 4
15536 // CHECK16-NEXT:    [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 1
15537 // CHECK16-NEXT:    [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i32*
15538 // CHECK16-NEXT:    store i32 [[TMP137]], i32* [[TMP149]], align 4
15539 // CHECK16-NEXT:    [[TMP150:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 1
15540 // CHECK16-NEXT:    store i64 4, i64* [[TMP150]], align 4
15541 // CHECK16-NEXT:    [[TMP151:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 1
15542 // CHECK16-NEXT:    store i8* null, i8** [[TMP151]], align 4
15543 // CHECK16-NEXT:    [[TMP152:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 2
15544 // CHECK16-NEXT:    [[TMP153:%.*]] = bitcast i8** [[TMP152]] to i32*
15545 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[TMP153]], align 4
15546 // CHECK16-NEXT:    [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 2
15547 // CHECK16-NEXT:    [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32*
15548 // CHECK16-NEXT:    store i32 [[TMP0]], i32* [[TMP155]], align 4
15549 // CHECK16-NEXT:    [[TMP156:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 2
15550 // CHECK16-NEXT:    store i64 4, i64* [[TMP156]], align 4
15551 // CHECK16-NEXT:    [[TMP157:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 2
15552 // CHECK16-NEXT:    store i8* null, i8** [[TMP157]], align 4
15553 // CHECK16-NEXT:    [[TMP158:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 3
15554 // CHECK16-NEXT:    [[TMP159:%.*]] = bitcast i8** [[TMP158]] to i32**
15555 // CHECK16-NEXT:    store i32* [[VLA]], i32** [[TMP159]], align 4
15556 // CHECK16-NEXT:    [[TMP160:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 3
15557 // CHECK16-NEXT:    [[TMP161:%.*]] = bitcast i8** [[TMP160]] to i32**
15558 // CHECK16-NEXT:    store i32* [[VLA]], i32** [[TMP161]], align 4
15559 // CHECK16-NEXT:    [[TMP162:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 3
15560 // CHECK16-NEXT:    store i64 [[TMP139]], i64* [[TMP162]], align 4
15561 // CHECK16-NEXT:    [[TMP163:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 3
15562 // CHECK16-NEXT:    store i8* null, i8** [[TMP163]], align 4
15563 // CHECK16-NEXT:    [[TMP164:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0
15564 // CHECK16-NEXT:    [[TMP165:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0
15565 // CHECK16-NEXT:    [[TMP166:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 0
15566 // CHECK16-NEXT:    [[TMP167:%.*]] = load i32, i32* [[N]], align 4
15567 // CHECK16-NEXT:    store i32 [[TMP167]], i32* [[DOTCAPTURE_EXPR_52]], align 4
15568 // CHECK16-NEXT:    [[TMP168:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_52]], align 4
15569 // CHECK16-NEXT:    [[SUB54:%.*]] = sub nsw i32 [[TMP168]], 0
15570 // CHECK16-NEXT:    [[DIV55:%.*]] = sdiv i32 [[SUB54]], 1
15571 // CHECK16-NEXT:    [[SUB56:%.*]] = sub nsw i32 [[DIV55]], 1
15572 // CHECK16-NEXT:    store i32 [[SUB56]], i32* [[DOTCAPTURE_EXPR_53]], align 4
15573 // CHECK16-NEXT:    [[TMP169:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_53]], align 4
15574 // CHECK16-NEXT:    [[ADD57:%.*]] = add nsw i32 [[TMP169]], 1
15575 // CHECK16-NEXT:    [[TMP170:%.*]] = zext i32 [[ADD57]] to i64
15576 // CHECK16-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP170]])
15577 // CHECK16-NEXT:    [[TMP171:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, i32 4, i8** [[TMP164]], i8** [[TMP165]], i64* [[TMP166]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
15578 // CHECK16-NEXT:    [[TMP172:%.*]] = icmp ne i32 [[TMP171]], 0
15579 // CHECK16-NEXT:    br i1 [[TMP172]], label [[OMP_OFFLOAD_FAILED58:%.*]], label [[OMP_OFFLOAD_CONT59:%.*]]
15580 // CHECK16:       omp_offload.failed58:
15581 // CHECK16-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i32 [[TMP135]], i32 [[TMP137]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
15582 // CHECK16-NEXT:    br label [[OMP_OFFLOAD_CONT59]]
15583 // CHECK16:       omp_offload.cont59:
15584 // CHECK16-NEXT:    [[TMP173:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
15585 // CHECK16-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP173]])
15586 // CHECK16-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
15587 // CHECK16-NEXT:    [[TMP174:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
15588 // CHECK16-NEXT:    call void @llvm.stackrestore(i8* [[TMP174]])
15589 // CHECK16-NEXT:    [[TMP175:%.*]] = load i32, i32* [[RETVAL]], align 4
15590 // CHECK16-NEXT:    ret i32 [[TMP175]]
15591 //
15592 //
15593 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148
15594 // CHECK16-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
15595 // CHECK16-NEXT:  entry:
15596 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
15597 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
15598 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
15599 // CHECK16-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
15600 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
15601 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
15602 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
15603 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
15604 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
15605 // CHECK16-NEXT:    ret void
15606 //
15607 //
15608 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined.
15609 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
15610 // CHECK16-NEXT:  entry:
15611 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
15612 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
15613 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
15614 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
15615 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
15616 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
15617 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
15618 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
15619 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
15620 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
15621 // CHECK16-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
15622 // CHECK16-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
15623 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15624 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15625 // CHECK16-NEXT:    [[I3:%.*]] = alloca i32, align 4
15626 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
15627 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
15628 // CHECK16-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
15629 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
15630 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
15631 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
15632 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
15633 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
15634 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
15635 // CHECK16-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
15636 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15637 // CHECK16-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
15638 // CHECK16-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
15639 // CHECK16-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
15640 // CHECK16-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
15641 // CHECK16-NEXT:    store i32 0, i32* [[I]], align 4
15642 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15643 // CHECK16-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
15644 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
15645 // CHECK16:       omp.precond.then:
15646 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
15647 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15648 // CHECK16-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
15649 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15650 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15651 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15652 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
15653 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
15654 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15655 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15656 // CHECK16-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
15657 // CHECK16-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15658 // CHECK16:       cond.true:
15659 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15660 // CHECK16-NEXT:    br label [[COND_END:%.*]]
15661 // CHECK16:       cond.false:
15662 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15663 // CHECK16-NEXT:    br label [[COND_END]]
15664 // CHECK16:       cond.end:
15665 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
15666 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
15667 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
15668 // CHECK16-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
15669 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
15670 // CHECK16:       omp.inner.for.cond:
15671 // CHECK16-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15672 // CHECK16-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15673 // CHECK16-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
15674 // CHECK16-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15675 // CHECK16:       omp.inner.for.body:
15676 // CHECK16-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
15677 // CHECK16-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15678 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])
15679 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
15680 // CHECK16:       omp.inner.for.inc:
15681 // CHECK16-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15682 // CHECK16-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
15683 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
15684 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
15685 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
15686 // CHECK16:       omp.inner.for.end:
15687 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
15688 // CHECK16:       omp.loop.exit:
15689 // CHECK16-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15690 // CHECK16-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
15691 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
15692 // CHECK16-NEXT:    br label [[OMP_PRECOND_END]]
15693 // CHECK16:       omp.precond.end:
15694 // CHECK16-NEXT:    ret void
15695 //
15696 //
15697 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..1
15698 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
15699 // CHECK16-NEXT:  entry:
15700 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
15701 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
15702 // CHECK16-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
15703 // CHECK16-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
15704 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
15705 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
15706 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
15707 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
15708 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
15709 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
15710 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
15711 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
15712 // CHECK16-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
15713 // CHECK16-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
15714 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15715 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15716 // CHECK16-NEXT:    [[I3:%.*]] = alloca i32, align 4
15717 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
15718 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
15719 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
15720 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
15721 // CHECK16-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
15722 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
15723 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
15724 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
15725 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
15726 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
15727 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
15728 // CHECK16-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
15729 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15730 // CHECK16-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
15731 // CHECK16-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
15732 // CHECK16-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
15733 // CHECK16-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
15734 // CHECK16-NEXT:    store i32 0, i32* [[I]], align 4
15735 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15736 // CHECK16-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
15737 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
15738 // CHECK16:       omp.precond.then:
15739 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
15740 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15741 // CHECK16-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
15742 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
15743 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
15744 // CHECK16-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
15745 // CHECK16-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
15746 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15747 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15748 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15749 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
15750 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
15751 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15752 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15753 // CHECK16-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
15754 // CHECK16-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15755 // CHECK16:       cond.true:
15756 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15757 // CHECK16-NEXT:    br label [[COND_END:%.*]]
15758 // CHECK16:       cond.false:
15759 // CHECK16-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15760 // CHECK16-NEXT:    br label [[COND_END]]
15761 // CHECK16:       cond.end:
15762 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
15763 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
15764 // CHECK16-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
15765 // CHECK16-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
15766 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
15767 // CHECK16:       omp.inner.for.cond:
15768 // CHECK16-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15769 // CHECK16-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15770 // CHECK16-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
15771 // CHECK16-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15772 // CHECK16:       omp.inner.for.body:
15773 // CHECK16-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15774 // CHECK16-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
15775 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
15776 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4
15777 // CHECK16-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
15778 // CHECK16-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
15779 // CHECK16-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
15780 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
15781 // CHECK16:       omp.body.continue:
15782 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
15783 // CHECK16:       omp.inner.for.inc:
15784 // CHECK16-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15785 // CHECK16-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1
15786 // CHECK16-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
15787 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
15788 // CHECK16:       omp.inner.for.end:
15789 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
15790 // CHECK16:       omp.loop.exit:
15791 // CHECK16-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15792 // CHECK16-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
15793 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
15794 // CHECK16-NEXT:    br label [[OMP_PRECOND_END]]
15795 // CHECK16:       omp.precond.end:
15796 // CHECK16-NEXT:    ret void
15797 //
15798 //
15799 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153
15800 // CHECK16-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
15801 // CHECK16-NEXT:  entry:
15802 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
15803 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
15804 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
15805 // CHECK16-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
15806 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
15807 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
15808 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
15809 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
15810 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
15811 // CHECK16-NEXT:    ret void
15812 //
15813 //
15814 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..2
15815 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
15816 // CHECK16-NEXT:  entry:
15817 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
15818 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
15819 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
15820 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
15821 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
15822 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
15823 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
15824 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
15825 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
15826 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
15827 // CHECK16-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
15828 // CHECK16-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
15829 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15830 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15831 // CHECK16-NEXT:    [[I3:%.*]] = alloca i32, align 4
15832 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
15833 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
15834 // CHECK16-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
15835 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
15836 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
15837 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
15838 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
15839 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
15840 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
15841 // CHECK16-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
15842 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15843 // CHECK16-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
15844 // CHECK16-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
15845 // CHECK16-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
15846 // CHECK16-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
15847 // CHECK16-NEXT:    store i32 0, i32* [[I]], align 4
15848 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15849 // CHECK16-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
15850 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
15851 // CHECK16:       omp.precond.then:
15852 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
15853 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15854 // CHECK16-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
15855 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15856 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15857 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15858 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
15859 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
15860 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15861 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15862 // CHECK16-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
15863 // CHECK16-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15864 // CHECK16:       cond.true:
15865 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15866 // CHECK16-NEXT:    br label [[COND_END:%.*]]
15867 // CHECK16:       cond.false:
15868 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15869 // CHECK16-NEXT:    br label [[COND_END]]
15870 // CHECK16:       cond.end:
15871 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
15872 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
15873 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
15874 // CHECK16-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
15875 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
15876 // CHECK16:       omp.inner.for.cond:
15877 // CHECK16-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15878 // CHECK16-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15879 // CHECK16-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
15880 // CHECK16-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15881 // CHECK16:       omp.inner.for.body:
15882 // CHECK16-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
15883 // CHECK16-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
15884 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])
15885 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
15886 // CHECK16:       omp.inner.for.inc:
15887 // CHECK16-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15888 // CHECK16-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
15889 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
15890 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
15891 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
15892 // CHECK16:       omp.inner.for.end:
15893 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
15894 // CHECK16:       omp.loop.exit:
15895 // CHECK16-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15896 // CHECK16-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
15897 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
15898 // CHECK16-NEXT:    br label [[OMP_PRECOND_END]]
15899 // CHECK16:       omp.precond.end:
15900 // CHECK16-NEXT:    ret void
15901 //
15902 //
15903 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..3
15904 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
15905 // CHECK16-NEXT:  entry:
15906 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
15907 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
15908 // CHECK16-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
15909 // CHECK16-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
15910 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
15911 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
15912 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
15913 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
15914 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
15915 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
15916 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
15917 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
15918 // CHECK16-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
15919 // CHECK16-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
15920 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
15921 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
15922 // CHECK16-NEXT:    [[I3:%.*]] = alloca i32, align 4
15923 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
15924 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
15925 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
15926 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
15927 // CHECK16-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
15928 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
15929 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
15930 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
15931 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
15932 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
15933 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
15934 // CHECK16-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
15935 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15936 // CHECK16-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
15937 // CHECK16-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
15938 // CHECK16-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
15939 // CHECK16-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
15940 // CHECK16-NEXT:    store i32 0, i32* [[I]], align 4
15941 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
15942 // CHECK16-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
15943 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
15944 // CHECK16:       omp.precond.then:
15945 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
15946 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15947 // CHECK16-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
15948 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
15949 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
15950 // CHECK16-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
15951 // CHECK16-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
15952 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
15953 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
15954 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15955 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
15956 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
15957 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15958 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15959 // CHECK16-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
15960 // CHECK16-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
15961 // CHECK16:       cond.true:
15962 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
15963 // CHECK16-NEXT:    br label [[COND_END:%.*]]
15964 // CHECK16:       cond.false:
15965 // CHECK16-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15966 // CHECK16-NEXT:    br label [[COND_END]]
15967 // CHECK16:       cond.end:
15968 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
15969 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
15970 // CHECK16-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
15971 // CHECK16-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
15972 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
15973 // CHECK16:       omp.inner.for.cond:
15974 // CHECK16-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15975 // CHECK16-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
15976 // CHECK16-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
15977 // CHECK16-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
15978 // CHECK16:       omp.inner.for.body:
15979 // CHECK16-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15980 // CHECK16-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
15981 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
15982 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4
15983 // CHECK16-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
15984 // CHECK16-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
15985 // CHECK16-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
15986 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
15987 // CHECK16:       omp.body.continue:
15988 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
15989 // CHECK16:       omp.inner.for.inc:
15990 // CHECK16-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
15991 // CHECK16-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1
15992 // CHECK16-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
15993 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
15994 // CHECK16:       omp.inner.for.end:
15995 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
15996 // CHECK16:       omp.loop.exit:
15997 // CHECK16-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
15998 // CHECK16-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
15999 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
16000 // CHECK16-NEXT:    br label [[OMP_PRECOND_END]]
16001 // CHECK16:       omp.precond.end:
16002 // CHECK16-NEXT:    ret void
16003 //
16004 //
16005 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158
16006 // CHECK16-SAME: (i32 [[M:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
16007 // CHECK16-NEXT:  entry:
16008 // CHECK16-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 4
16009 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
16010 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
16011 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
16012 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
16013 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
16014 // CHECK16-NEXT:    store i32 [[M]], i32* [[M_ADDR]], align 4
16015 // CHECK16-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
16016 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
16017 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
16018 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
16019 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
16020 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4
16021 // CHECK16-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
16022 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
16023 // CHECK16-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
16024 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
16025 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]])
16026 // CHECK16-NEXT:    ret void
16027 //
16028 //
16029 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..5
16030 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
16031 // CHECK16-NEXT:  entry:
16032 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
16033 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
16034 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
16035 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
16036 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
16037 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
16038 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
16039 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
16040 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
16041 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
16042 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
16043 // CHECK16-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
16044 // CHECK16-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
16045 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16046 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16047 // CHECK16-NEXT:    [[I4:%.*]] = alloca i32, align 4
16048 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
16049 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
16050 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
16051 // CHECK16-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
16052 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
16053 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
16054 // CHECK16-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
16055 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
16056 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
16057 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
16058 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
16059 // CHECK16-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
16060 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
16061 // CHECK16-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
16062 // CHECK16-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
16063 // CHECK16-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
16064 // CHECK16-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
16065 // CHECK16-NEXT:    store i32 0, i32* [[I]], align 4
16066 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
16067 // CHECK16-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
16068 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
16069 // CHECK16:       omp.precond.then:
16070 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
16071 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
16072 // CHECK16-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
16073 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16074 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16075 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
16076 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16077 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
16078 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])
16079 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16080 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
16081 // CHECK16-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
16082 // CHECK16-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
16083 // CHECK16:       cond.true:
16084 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
16085 // CHECK16-NEXT:    br label [[COND_END:%.*]]
16086 // CHECK16:       cond.false:
16087 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16088 // CHECK16-NEXT:    br label [[COND_END]]
16089 // CHECK16:       cond.end:
16090 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
16091 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
16092 // CHECK16-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
16093 // CHECK16-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
16094 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
16095 // CHECK16:       omp.inner.for.cond:
16096 // CHECK16-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16097 // CHECK16-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
16098 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP16]], 1
16099 // CHECK16-NEXT:    [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]]
16100 // CHECK16-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16101 // CHECK16:       omp.inner.for.body:
16102 // CHECK16-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
16103 // CHECK16-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16104 // CHECK16-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
16105 // CHECK16-NEXT:    store i32 [[TMP19]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
16106 // CHECK16-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
16107 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP20]])
16108 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
16109 // CHECK16:       omp.inner.for.inc:
16110 // CHECK16-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16111 // CHECK16-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
16112 // CHECK16-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
16113 // CHECK16-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
16114 // CHECK16-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
16115 // CHECK16-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
16116 // CHECK16-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
16117 // CHECK16-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
16118 // CHECK16-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16119 // CHECK16-NEXT:    [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
16120 // CHECK16-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]
16121 // CHECK16-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
16122 // CHECK16-NEXT:    [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16123 // CHECK16-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
16124 // CHECK16-NEXT:    [[CMP10:%.*]] = icmp sgt i32 [[TMP27]], [[TMP28]]
16125 // CHECK16-NEXT:    br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
16126 // CHECK16:       cond.true11:
16127 // CHECK16-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
16128 // CHECK16-NEXT:    br label [[COND_END13:%.*]]
16129 // CHECK16:       cond.false12:
16130 // CHECK16-NEXT:    [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16131 // CHECK16-NEXT:    br label [[COND_END13]]
16132 // CHECK16:       cond.end13:
16133 // CHECK16-NEXT:    [[COND14:%.*]] = phi i32 [ [[TMP29]], [[COND_TRUE11]] ], [ [[TMP30]], [[COND_FALSE12]] ]
16134 // CHECK16-NEXT:    store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
16135 // CHECK16-NEXT:    [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
16136 // CHECK16-NEXT:    store i32 [[TMP31]], i32* [[DOTOMP_IV]], align 4
16137 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
16138 // CHECK16:       omp.inner.for.end:
16139 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
16140 // CHECK16:       omp.loop.exit:
16141 // CHECK16-NEXT:    [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16142 // CHECK16-NEXT:    [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4
16143 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]])
16144 // CHECK16-NEXT:    br label [[OMP_PRECOND_END]]
16145 // CHECK16:       omp.precond.end:
16146 // CHECK16-NEXT:    ret void
16147 //
16148 //
16149 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..6
16150 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
16151 // CHECK16-NEXT:  entry:
16152 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
16153 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
16154 // CHECK16-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
16155 // CHECK16-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
16156 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
16157 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
16158 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
16159 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
16160 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
16161 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
16162 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
16163 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
16164 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
16165 // CHECK16-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
16166 // CHECK16-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
16167 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16168 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16169 // CHECK16-NEXT:    [[I4:%.*]] = alloca i32, align 4
16170 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
16171 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
16172 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
16173 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
16174 // CHECK16-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
16175 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
16176 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
16177 // CHECK16-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
16178 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
16179 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
16180 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
16181 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
16182 // CHECK16-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
16183 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
16184 // CHECK16-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
16185 // CHECK16-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
16186 // CHECK16-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
16187 // CHECK16-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
16188 // CHECK16-NEXT:    store i32 0, i32* [[I]], align 4
16189 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
16190 // CHECK16-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
16191 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
16192 // CHECK16:       omp.precond.then:
16193 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
16194 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
16195 // CHECK16-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
16196 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
16197 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
16198 // CHECK16-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
16199 // CHECK16-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
16200 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16201 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16202 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16203 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
16204 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
16205 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16206 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
16207 // CHECK16-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
16208 // CHECK16-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
16209 // CHECK16:       cond.true:
16210 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
16211 // CHECK16-NEXT:    br label [[COND_END:%.*]]
16212 // CHECK16:       cond.false:
16213 // CHECK16-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16214 // CHECK16-NEXT:    br label [[COND_END]]
16215 // CHECK16:       cond.end:
16216 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
16217 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
16218 // CHECK16-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
16219 // CHECK16-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
16220 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
16221 // CHECK16:       omp.inner.for.cond:
16222 // CHECK16-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16223 // CHECK16-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16224 // CHECK16-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
16225 // CHECK16-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16226 // CHECK16:       omp.inner.for.body:
16227 // CHECK16-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16228 // CHECK16-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
16229 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
16230 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4
16231 // CHECK16-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I4]], align 4
16232 // CHECK16-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
16233 // CHECK16-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
16234 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
16235 // CHECK16:       omp.body.continue:
16236 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
16237 // CHECK16:       omp.inner.for.inc:
16238 // CHECK16-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16239 // CHECK16-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
16240 // CHECK16-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
16241 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
16242 // CHECK16:       omp.inner.for.end:
16243 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
16244 // CHECK16:       omp.loop.exit:
16245 // CHECK16-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16246 // CHECK16-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
16247 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
16248 // CHECK16-NEXT:    br label [[OMP_PRECOND_END]]
16249 // CHECK16:       omp.precond.end:
16250 // CHECK16-NEXT:    ret void
16251 //
16252 //
16253 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163
16254 // CHECK16-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
16255 // CHECK16-NEXT:  entry:
16256 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
16257 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
16258 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
16259 // CHECK16-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
16260 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
16261 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
16262 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
16263 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
16264 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
16265 // CHECK16-NEXT:    ret void
16266 //
16267 //
16268 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..8
16269 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
16270 // CHECK16-NEXT:  entry:
16271 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
16272 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
16273 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
16274 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
16275 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
16276 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
16277 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
16278 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
16279 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
16280 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
16281 // CHECK16-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
16282 // CHECK16-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
16283 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16284 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16285 // CHECK16-NEXT:    [[I3:%.*]] = alloca i32, align 4
16286 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
16287 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
16288 // CHECK16-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
16289 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
16290 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
16291 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
16292 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
16293 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
16294 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
16295 // CHECK16-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
16296 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
16297 // CHECK16-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
16298 // CHECK16-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
16299 // CHECK16-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
16300 // CHECK16-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
16301 // CHECK16-NEXT:    store i32 0, i32* [[I]], align 4
16302 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
16303 // CHECK16-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
16304 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
16305 // CHECK16:       omp.precond.then:
16306 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
16307 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
16308 // CHECK16-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
16309 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16310 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16311 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16312 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
16313 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
16314 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16315 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
16316 // CHECK16-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
16317 // CHECK16-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
16318 // CHECK16:       cond.true:
16319 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
16320 // CHECK16-NEXT:    br label [[COND_END:%.*]]
16321 // CHECK16:       cond.false:
16322 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16323 // CHECK16-NEXT:    br label [[COND_END]]
16324 // CHECK16:       cond.end:
16325 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
16326 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
16327 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
16328 // CHECK16-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
16329 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
16330 // CHECK16:       omp.inner.for.cond:
16331 // CHECK16-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16332 // CHECK16-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16333 // CHECK16-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
16334 // CHECK16-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16335 // CHECK16:       omp.inner.for.body:
16336 // CHECK16-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
16337 // CHECK16-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16338 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])
16339 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
16340 // CHECK16:       omp.inner.for.inc:
16341 // CHECK16-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16342 // CHECK16-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
16343 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
16344 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
16345 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
16346 // CHECK16:       omp.inner.for.end:
16347 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
16348 // CHECK16:       omp.loop.exit:
16349 // CHECK16-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16350 // CHECK16-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
16351 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
16352 // CHECK16-NEXT:    br label [[OMP_PRECOND_END]]
16353 // CHECK16:       omp.precond.end:
16354 // CHECK16-NEXT:    ret void
16355 //
16356 //
16357 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..9
16358 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
16359 // CHECK16-NEXT:  entry:
16360 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
16361 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
16362 // CHECK16-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
16363 // CHECK16-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
16364 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
16365 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
16366 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
16367 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
16368 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
16369 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
16370 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
16371 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
16372 // CHECK16-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
16373 // CHECK16-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
16374 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16375 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16376 // CHECK16-NEXT:    [[I3:%.*]] = alloca i32, align 4
16377 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
16378 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
16379 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
16380 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
16381 // CHECK16-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
16382 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
16383 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
16384 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
16385 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
16386 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
16387 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
16388 // CHECK16-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
16389 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
16390 // CHECK16-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
16391 // CHECK16-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
16392 // CHECK16-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
16393 // CHECK16-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
16394 // CHECK16-NEXT:    store i32 0, i32* [[I]], align 4
16395 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
16396 // CHECK16-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
16397 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
16398 // CHECK16:       omp.precond.then:
16399 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
16400 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
16401 // CHECK16-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
16402 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
16403 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
16404 // CHECK16-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
16405 // CHECK16-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
16406 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16407 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16408 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
16409 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16410 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16411 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
16412 // CHECK16-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1)
16413 // CHECK16-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
16414 // CHECK16:       omp.dispatch.cond:
16415 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16416 // CHECK16-NEXT:    [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
16417 // CHECK16-NEXT:    [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
16418 // CHECK16-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
16419 // CHECK16-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
16420 // CHECK16:       omp.dispatch.body:
16421 // CHECK16-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
16422 // CHECK16-NEXT:    store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
16423 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
16424 // CHECK16:       omp.inner.for.cond:
16425 // CHECK16-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
16426 // CHECK16-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15
16427 // CHECK16-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
16428 // CHECK16-NEXT:    br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16429 // CHECK16:       omp.inner.for.body:
16430 // CHECK16-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
16431 // CHECK16-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
16432 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
16433 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !15
16434 // CHECK16-NEXT:    [[TMP20:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !15
16435 // CHECK16-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP20]]
16436 // CHECK16-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15
16437 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
16438 // CHECK16:       omp.body.continue:
16439 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
16440 // CHECK16:       omp.inner.for.inc:
16441 // CHECK16-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
16442 // CHECK16-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP21]], 1
16443 // CHECK16-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
16444 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
16445 // CHECK16:       omp.inner.for.end:
16446 // CHECK16-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
16447 // CHECK16:       omp.dispatch.inc:
16448 // CHECK16-NEXT:    br label [[OMP_DISPATCH_COND]]
16449 // CHECK16:       omp.dispatch.end:
16450 // CHECK16-NEXT:    br label [[OMP_PRECOND_END]]
16451 // CHECK16:       omp.precond.end:
16452 // CHECK16-NEXT:    ret void
16453 //
16454 //
16455 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168
16456 // CHECK16-SAME: (i32 [[M:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
16457 // CHECK16-NEXT:  entry:
16458 // CHECK16-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 4
16459 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
16460 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
16461 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
16462 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
16463 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
16464 // CHECK16-NEXT:    store i32 [[M]], i32* [[M_ADDR]], align 4
16465 // CHECK16-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
16466 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
16467 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
16468 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
16469 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
16470 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4
16471 // CHECK16-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
16472 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
16473 // CHECK16-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
16474 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
16475 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]])
16476 // CHECK16-NEXT:    ret void
16477 //
16478 //
16479 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..11
16480 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
16481 // CHECK16-NEXT:  entry:
16482 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
16483 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
16484 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
16485 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
16486 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
16487 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
16488 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
16489 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
16490 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
16491 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
16492 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
16493 // CHECK16-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
16494 // CHECK16-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
16495 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16496 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16497 // CHECK16-NEXT:    [[I4:%.*]] = alloca i32, align 4
16498 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
16499 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
16500 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
16501 // CHECK16-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
16502 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
16503 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
16504 // CHECK16-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
16505 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
16506 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
16507 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
16508 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
16509 // CHECK16-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
16510 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
16511 // CHECK16-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
16512 // CHECK16-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
16513 // CHECK16-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
16514 // CHECK16-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
16515 // CHECK16-NEXT:    store i32 0, i32* [[I]], align 4
16516 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
16517 // CHECK16-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
16518 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
16519 // CHECK16:       omp.precond.then:
16520 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
16521 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
16522 // CHECK16-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
16523 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16524 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16525 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16526 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
16527 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
16528 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16529 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
16530 // CHECK16-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
16531 // CHECK16-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
16532 // CHECK16:       cond.true:
16533 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
16534 // CHECK16-NEXT:    br label [[COND_END:%.*]]
16535 // CHECK16:       cond.false:
16536 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16537 // CHECK16-NEXT:    br label [[COND_END]]
16538 // CHECK16:       cond.end:
16539 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
16540 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
16541 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
16542 // CHECK16-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
16543 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
16544 // CHECK16:       omp.inner.for.cond:
16545 // CHECK16-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16546 // CHECK16-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16547 // CHECK16-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
16548 // CHECK16-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16549 // CHECK16:       omp.inner.for.body:
16550 // CHECK16-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
16551 // CHECK16-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16552 // CHECK16-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
16553 // CHECK16-NEXT:    store i32 [[TMP18]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
16554 // CHECK16-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
16555 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP19]])
16556 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
16557 // CHECK16:       omp.inner.for.inc:
16558 // CHECK16-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16559 // CHECK16-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
16560 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
16561 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
16562 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
16563 // CHECK16:       omp.inner.for.end:
16564 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
16565 // CHECK16:       omp.loop.exit:
16566 // CHECK16-NEXT:    [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16567 // CHECK16-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
16568 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
16569 // CHECK16-NEXT:    br label [[OMP_PRECOND_END]]
16570 // CHECK16:       omp.precond.end:
16571 // CHECK16-NEXT:    ret void
16572 //
16573 //
16574 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..12
16575 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
16576 // CHECK16-NEXT:  entry:
16577 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
16578 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
16579 // CHECK16-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
16580 // CHECK16-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
16581 // CHECK16-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
16582 // CHECK16-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
16583 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
16584 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
16585 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
16586 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
16587 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
16588 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
16589 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
16590 // CHECK16-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
16591 // CHECK16-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
16592 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16593 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16594 // CHECK16-NEXT:    [[I4:%.*]] = alloca i32, align 4
16595 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
16596 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
16597 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
16598 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
16599 // CHECK16-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
16600 // CHECK16-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
16601 // CHECK16-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
16602 // CHECK16-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
16603 // CHECK16-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
16604 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
16605 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
16606 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
16607 // CHECK16-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
16608 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
16609 // CHECK16-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
16610 // CHECK16-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
16611 // CHECK16-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
16612 // CHECK16-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
16613 // CHECK16-NEXT:    store i32 0, i32* [[I]], align 4
16614 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
16615 // CHECK16-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
16616 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
16617 // CHECK16:       omp.precond.then:
16618 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
16619 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
16620 // CHECK16-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
16621 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
16622 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
16623 // CHECK16-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
16624 // CHECK16-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
16625 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16626 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16627 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
16628 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
16629 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16630 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16631 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
16632 // CHECK16-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 1073741859, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]])
16633 // CHECK16-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
16634 // CHECK16:       omp.dispatch.cond:
16635 // CHECK16-NEXT:    [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16636 // CHECK16-NEXT:    [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
16637 // CHECK16-NEXT:    [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
16638 // CHECK16-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0
16639 // CHECK16-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
16640 // CHECK16:       omp.dispatch.body:
16641 // CHECK16-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
16642 // CHECK16-NEXT:    store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4
16643 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
16644 // CHECK16:       omp.inner.for.cond:
16645 // CHECK16-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
16646 // CHECK16-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18
16647 // CHECK16-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
16648 // CHECK16-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16649 // CHECK16:       omp.inner.for.body:
16650 // CHECK16-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
16651 // CHECK16-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
16652 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
16653 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !18
16654 // CHECK16-NEXT:    [[TMP21:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !18
16655 // CHECK16-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP21]]
16656 // CHECK16-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18
16657 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
16658 // CHECK16:       omp.body.continue:
16659 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
16660 // CHECK16:       omp.inner.for.inc:
16661 // CHECK16-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
16662 // CHECK16-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP22]], 1
16663 // CHECK16-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
16664 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
16665 // CHECK16:       omp.inner.for.end:
16666 // CHECK16-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
16667 // CHECK16:       omp.dispatch.inc:
16668 // CHECK16-NEXT:    br label [[OMP_DISPATCH_COND]]
16669 // CHECK16:       omp.dispatch.end:
16670 // CHECK16-NEXT:    br label [[OMP_PRECOND_END]]
16671 // CHECK16:       omp.precond.end:
16672 // CHECK16-NEXT:    ret void
16673 //
16674 //
16675 // CHECK16-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
16676 // CHECK16-SAME: (i32 [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
16677 // CHECK16-NEXT:  entry:
16678 // CHECK16-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
16679 // CHECK16-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
16680 // CHECK16-NEXT:    [[M:%.*]] = alloca i32, align 4
16681 // CHECK16-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
16682 // CHECK16-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
16683 // CHECK16-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
16684 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
16685 // CHECK16-NEXT:    [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4
16686 // CHECK16-NEXT:    [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4
16687 // CHECK16-NEXT:    [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4
16688 // CHECK16-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
16689 // CHECK16-NEXT:    [[M_CASTED:%.*]] = alloca i32, align 4
16690 // CHECK16-NEXT:    [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 4
16691 // CHECK16-NEXT:    [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 4
16692 // CHECK16-NEXT:    [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 4
16693 // CHECK16-NEXT:    [[_TMP10:%.*]] = alloca i32, align 4
16694 // CHECK16-NEXT:    [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 4
16695 // CHECK16-NEXT:    [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 4
16696 // CHECK16-NEXT:    [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 4
16697 // CHECK16-NEXT:    [[_TMP16:%.*]] = alloca i32, align 4
16698 // CHECK16-NEXT:    [[M_CASTED19:%.*]] = alloca i32, align 4
16699 // CHECK16-NEXT:    [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [2 x i8*], align 4
16700 // CHECK16-NEXT:    [[DOTOFFLOAD_PTRS21:%.*]] = alloca [2 x i8*], align 4
16701 // CHECK16-NEXT:    [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [2 x i8*], align 4
16702 // CHECK16-NEXT:    [[_TMP23:%.*]] = alloca i32, align 4
16703 // CHECK16-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
16704 // CHECK16-NEXT:    store i32 10, i32* [[M]], align 4
16705 // CHECK16-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
16706 // CHECK16-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
16707 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4
16708 // CHECK16-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
16709 // CHECK16-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
16710 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4
16711 // CHECK16-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
16712 // CHECK16-NEXT:    store i8* null, i8** [[TMP4]], align 4
16713 // CHECK16-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
16714 // CHECK16-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
16715 // CHECK16-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
16716 // CHECK16-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
16717 // CHECK16-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
16718 // CHECK16-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
16719 // CHECK16:       omp_offload.failed:
16720 // CHECK16-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]]
16721 // CHECK16-NEXT:    br label [[OMP_OFFLOAD_CONT]]
16722 // CHECK16:       omp_offload.cont:
16723 // CHECK16-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
16724 // CHECK16-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
16725 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4
16726 // CHECK16-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
16727 // CHECK16-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
16728 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4
16729 // CHECK16-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0
16730 // CHECK16-NEXT:    store i8* null, i8** [[TMP13]], align 4
16731 // CHECK16-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
16732 // CHECK16-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
16733 // CHECK16-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
16734 // CHECK16-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
16735 // CHECK16-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
16736 // CHECK16-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
16737 // CHECK16:       omp_offload.failed5:
16738 // CHECK16-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121([10 x i32]* [[A]]) #[[ATTR3]]
16739 // CHECK16-NEXT:    br label [[OMP_OFFLOAD_CONT6]]
16740 // CHECK16:       omp_offload.cont6:
16741 // CHECK16-NEXT:    [[TMP18:%.*]] = load i32, i32* [[M]], align 4
16742 // CHECK16-NEXT:    store i32 [[TMP18]], i32* [[M_CASTED]], align 4
16743 // CHECK16-NEXT:    [[TMP19:%.*]] = load i32, i32* [[M_CASTED]], align 4
16744 // CHECK16-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
16745 // CHECK16-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32*
16746 // CHECK16-NEXT:    store i32 [[TMP19]], i32* [[TMP21]], align 4
16747 // CHECK16-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
16748 // CHECK16-NEXT:    [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32*
16749 // CHECK16-NEXT:    store i32 [[TMP19]], i32* [[TMP23]], align 4
16750 // CHECK16-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0
16751 // CHECK16-NEXT:    store i8* null, i8** [[TMP24]], align 4
16752 // CHECK16-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1
16753 // CHECK16-NEXT:    [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]**
16754 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 4
16755 // CHECK16-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1
16756 // CHECK16-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]**
16757 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 4
16758 // CHECK16-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 1
16759 // CHECK16-NEXT:    store i8* null, i8** [[TMP29]], align 4
16760 // CHECK16-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
16761 // CHECK16-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
16762 // CHECK16-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
16763 // CHECK16-NEXT:    [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
16764 // CHECK16-NEXT:    [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
16765 // CHECK16-NEXT:    br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
16766 // CHECK16:       omp_offload.failed11:
16767 // CHECK16-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i32 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]]
16768 // CHECK16-NEXT:    br label [[OMP_OFFLOAD_CONT12]]
16769 // CHECK16:       omp_offload.cont12:
16770 // CHECK16-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
16771 // CHECK16-NEXT:    [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]**
16772 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 4
16773 // CHECK16-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
16774 // CHECK16-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]**
16775 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 4
16776 // CHECK16-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 0
16777 // CHECK16-NEXT:    store i8* null, i8** [[TMP38]], align 4
16778 // CHECK16-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
16779 // CHECK16-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
16780 // CHECK16-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
16781 // CHECK16-NEXT:    [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
16782 // CHECK16-NEXT:    [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0
16783 // CHECK16-NEXT:    br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
16784 // CHECK16:       omp_offload.failed17:
16785 // CHECK16-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131([10 x i32]* [[A]]) #[[ATTR3]]
16786 // CHECK16-NEXT:    br label [[OMP_OFFLOAD_CONT18]]
16787 // CHECK16:       omp_offload.cont18:
16788 // CHECK16-NEXT:    [[TMP43:%.*]] = load i32, i32* [[M]], align 4
16789 // CHECK16-NEXT:    store i32 [[TMP43]], i32* [[M_CASTED19]], align 4
16790 // CHECK16-NEXT:    [[TMP44:%.*]] = load i32, i32* [[M_CASTED19]], align 4
16791 // CHECK16-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
16792 // CHECK16-NEXT:    [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32*
16793 // CHECK16-NEXT:    store i32 [[TMP44]], i32* [[TMP46]], align 4
16794 // CHECK16-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
16795 // CHECK16-NEXT:    [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32*
16796 // CHECK16-NEXT:    store i32 [[TMP44]], i32* [[TMP48]], align 4
16797 // CHECK16-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 0
16798 // CHECK16-NEXT:    store i8* null, i8** [[TMP49]], align 4
16799 // CHECK16-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1
16800 // CHECK16-NEXT:    [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]**
16801 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 4
16802 // CHECK16-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 1
16803 // CHECK16-NEXT:    [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]**
16804 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 4
16805 // CHECK16-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 1
16806 // CHECK16-NEXT:    store i8* null, i8** [[TMP54]], align 4
16807 // CHECK16-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
16808 // CHECK16-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
16809 // CHECK16-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
16810 // CHECK16-NEXT:    [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
16811 // CHECK16-NEXT:    [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0
16812 // CHECK16-NEXT:    br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]]
16813 // CHECK16:       omp_offload.failed24:
16814 // CHECK16-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i32 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]]
16815 // CHECK16-NEXT:    br label [[OMP_OFFLOAD_CONT25]]
16816 // CHECK16:       omp_offload.cont25:
16817 // CHECK16-NEXT:    ret i32 0
16818 //
16819 //
16820 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
16821 // CHECK16-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
16822 // CHECK16-NEXT:  entry:
16823 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
16824 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
16825 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
16826 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
16827 // CHECK16-NEXT:    ret void
16828 //
16829 //
16830 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..14
16831 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
16832 // CHECK16-NEXT:  entry:
16833 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
16834 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
16835 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
16836 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
16837 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
16838 // CHECK16-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
16839 // CHECK16-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
16840 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16841 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16842 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
16843 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
16844 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
16845 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
16846 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
16847 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
16848 // CHECK16-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
16849 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16850 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16851 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16852 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
16853 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
16854 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16855 // CHECK16-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
16856 // CHECK16-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
16857 // CHECK16:       cond.true:
16858 // CHECK16-NEXT:    br label [[COND_END:%.*]]
16859 // CHECK16:       cond.false:
16860 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16861 // CHECK16-NEXT:    br label [[COND_END]]
16862 // CHECK16:       cond.end:
16863 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
16864 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
16865 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
16866 // CHECK16-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
16867 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
16868 // CHECK16:       omp.inner.for.cond:
16869 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16870 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16871 // CHECK16-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
16872 // CHECK16-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16873 // CHECK16:       omp.inner.for.body:
16874 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
16875 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
16876 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
16877 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
16878 // CHECK16:       omp.inner.for.inc:
16879 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16880 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
16881 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
16882 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
16883 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
16884 // CHECK16:       omp.inner.for.end:
16885 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
16886 // CHECK16:       omp.loop.exit:
16887 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
16888 // CHECK16-NEXT:    ret void
16889 //
16890 //
16891 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..15
16892 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
16893 // CHECK16-NEXT:  entry:
16894 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
16895 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
16896 // CHECK16-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
16897 // CHECK16-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
16898 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
16899 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
16900 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
16901 // CHECK16-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
16902 // CHECK16-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
16903 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16904 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16905 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
16906 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
16907 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
16908 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
16909 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
16910 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
16911 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
16912 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
16913 // CHECK16-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
16914 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
16915 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
16916 // CHECK16-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
16917 // CHECK16-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
16918 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16919 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16920 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16921 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
16922 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
16923 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16924 // CHECK16-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
16925 // CHECK16-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
16926 // CHECK16:       cond.true:
16927 // CHECK16-NEXT:    br label [[COND_END:%.*]]
16928 // CHECK16:       cond.false:
16929 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16930 // CHECK16-NEXT:    br label [[COND_END]]
16931 // CHECK16:       cond.end:
16932 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
16933 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
16934 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
16935 // CHECK16-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
16936 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
16937 // CHECK16:       omp.inner.for.cond:
16938 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16939 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
16940 // CHECK16-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
16941 // CHECK16-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
16942 // CHECK16:       omp.inner.for.body:
16943 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16944 // CHECK16-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
16945 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
16946 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
16947 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
16948 // CHECK16-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
16949 // CHECK16-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
16950 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
16951 // CHECK16:       omp.body.continue:
16952 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
16953 // CHECK16:       omp.inner.for.inc:
16954 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
16955 // CHECK16-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
16956 // CHECK16-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
16957 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
16958 // CHECK16:       omp.inner.for.end:
16959 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
16960 // CHECK16:       omp.loop.exit:
16961 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
16962 // CHECK16-NEXT:    ret void
16963 //
16964 //
16965 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121
16966 // CHECK16-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
16967 // CHECK16-NEXT:  entry:
16968 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
16969 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
16970 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
16971 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
16972 // CHECK16-NEXT:    ret void
16973 //
16974 //
16975 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..17
16976 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
16977 // CHECK16-NEXT:  entry:
16978 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
16979 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
16980 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
16981 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
16982 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
16983 // CHECK16-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
16984 // CHECK16-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
16985 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
16986 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
16987 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
16988 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
16989 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
16990 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
16991 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
16992 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
16993 // CHECK16-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
16994 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
16995 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
16996 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
16997 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
16998 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
16999 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17000 // CHECK16-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
17001 // CHECK16-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
17002 // CHECK16:       cond.true:
17003 // CHECK16-NEXT:    br label [[COND_END:%.*]]
17004 // CHECK16:       cond.false:
17005 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17006 // CHECK16-NEXT:    br label [[COND_END]]
17007 // CHECK16:       cond.end:
17008 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
17009 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
17010 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
17011 // CHECK16-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
17012 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
17013 // CHECK16:       omp.inner.for.cond:
17014 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17015 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17016 // CHECK16-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
17017 // CHECK16-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17018 // CHECK16:       omp.inner.for.body:
17019 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
17020 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17021 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
17022 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
17023 // CHECK16:       omp.inner.for.inc:
17024 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17025 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
17026 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
17027 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
17028 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
17029 // CHECK16:       omp.inner.for.end:
17030 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
17031 // CHECK16:       omp.loop.exit:
17032 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
17033 // CHECK16-NEXT:    ret void
17034 //
17035 //
17036 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..18
17037 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
17038 // CHECK16-NEXT:  entry:
17039 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
17040 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
17041 // CHECK16-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
17042 // CHECK16-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
17043 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
17044 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
17045 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
17046 // CHECK16-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
17047 // CHECK16-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
17048 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17049 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17050 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
17051 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
17052 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
17053 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
17054 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
17055 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
17056 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
17057 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
17058 // CHECK16-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
17059 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
17060 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
17061 // CHECK16-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
17062 // CHECK16-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
17063 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
17064 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
17065 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
17066 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
17067 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
17068 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17069 // CHECK16-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
17070 // CHECK16-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
17071 // CHECK16:       cond.true:
17072 // CHECK16-NEXT:    br label [[COND_END:%.*]]
17073 // CHECK16:       cond.false:
17074 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17075 // CHECK16-NEXT:    br label [[COND_END]]
17076 // CHECK16:       cond.end:
17077 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
17078 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
17079 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
17080 // CHECK16-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
17081 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
17082 // CHECK16:       omp.inner.for.cond:
17083 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17084 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17085 // CHECK16-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
17086 // CHECK16-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17087 // CHECK16:       omp.inner.for.body:
17088 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17089 // CHECK16-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
17090 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
17091 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
17092 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
17093 // CHECK16-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
17094 // CHECK16-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
17095 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
17096 // CHECK16:       omp.body.continue:
17097 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
17098 // CHECK16:       omp.inner.for.inc:
17099 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17100 // CHECK16-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
17101 // CHECK16-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
17102 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
17103 // CHECK16:       omp.inner.for.end:
17104 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
17105 // CHECK16:       omp.loop.exit:
17106 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
17107 // CHECK16-NEXT:    ret void
17108 //
17109 //
17110 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126
17111 // CHECK16-SAME: (i32 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
17112 // CHECK16-NEXT:  entry:
17113 // CHECK16-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 4
17114 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
17115 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
17116 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
17117 // CHECK16-NEXT:    store i32 [[M]], i32* [[M_ADDR]], align 4
17118 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
17119 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
17120 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4
17121 // CHECK16-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
17122 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17123 // CHECK16-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
17124 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
17125 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]])
17126 // CHECK16-NEXT:    ret void
17127 //
17128 //
17129 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..21
17130 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
17131 // CHECK16-NEXT:  entry:
17132 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
17133 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
17134 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
17135 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
17136 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
17137 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
17138 // CHECK16-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
17139 // CHECK16-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
17140 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17141 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17142 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
17143 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
17144 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
17145 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
17146 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
17147 // CHECK16-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
17148 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
17149 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
17150 // CHECK16-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
17151 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
17152 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
17153 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
17154 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
17155 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
17156 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17157 // CHECK16-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
17158 // CHECK16-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
17159 // CHECK16:       cond.true:
17160 // CHECK16-NEXT:    br label [[COND_END:%.*]]
17161 // CHECK16:       cond.false:
17162 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17163 // CHECK16-NEXT:    br label [[COND_END]]
17164 // CHECK16:       cond.end:
17165 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
17166 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
17167 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
17168 // CHECK16-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
17169 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
17170 // CHECK16:       omp.inner.for.cond:
17171 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17172 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17173 // CHECK16-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
17174 // CHECK16-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17175 // CHECK16:       omp.inner.for.body:
17176 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
17177 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17178 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
17179 // CHECK16-NEXT:    store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
17180 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
17181 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]])
17182 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
17183 // CHECK16:       omp.inner.for.inc:
17184 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17185 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
17186 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
17187 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
17188 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
17189 // CHECK16:       omp.inner.for.end:
17190 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
17191 // CHECK16:       omp.loop.exit:
17192 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
17193 // CHECK16-NEXT:    ret void
17194 //
17195 //
17196 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..22
17197 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
17198 // CHECK16-NEXT:  entry:
17199 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
17200 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
17201 // CHECK16-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
17202 // CHECK16-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
17203 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
17204 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
17205 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
17206 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
17207 // CHECK16-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
17208 // CHECK16-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
17209 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17210 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17211 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
17212 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
17213 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
17214 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
17215 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
17216 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
17217 // CHECK16-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
17218 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
17219 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
17220 // CHECK16-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
17221 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
17222 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
17223 // CHECK16-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
17224 // CHECK16-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
17225 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
17226 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
17227 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
17228 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
17229 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
17230 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
17231 // CHECK16-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
17232 // CHECK16:       omp.dispatch.cond:
17233 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17234 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
17235 // CHECK16-NEXT:    [[CMP:%.*]] = icmp ugt i32 [[TMP6]], [[TMP7]]
17236 // CHECK16-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
17237 // CHECK16:       cond.true:
17238 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
17239 // CHECK16-NEXT:    br label [[COND_END:%.*]]
17240 // CHECK16:       cond.false:
17241 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17242 // CHECK16-NEXT:    br label [[COND_END]]
17243 // CHECK16:       cond.end:
17244 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP8]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
17245 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
17246 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
17247 // CHECK16-NEXT:    store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
17248 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17249 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17250 // CHECK16-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
17251 // CHECK16-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
17252 // CHECK16:       omp.dispatch.body:
17253 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
17254 // CHECK16:       omp.inner.for.cond:
17255 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17256 // CHECK16-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17257 // CHECK16-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
17258 // CHECK16-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17259 // CHECK16:       omp.inner.for.body:
17260 // CHECK16-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17261 // CHECK16-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
17262 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
17263 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
17264 // CHECK16-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I]], align 4
17265 // CHECK16-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP16]]
17266 // CHECK16-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
17267 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
17268 // CHECK16:       omp.body.continue:
17269 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
17270 // CHECK16:       omp.inner.for.inc:
17271 // CHECK16-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17272 // CHECK16-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1
17273 // CHECK16-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
17274 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
17275 // CHECK16:       omp.inner.for.end:
17276 // CHECK16-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
17277 // CHECK16:       omp.dispatch.inc:
17278 // CHECK16-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
17279 // CHECK16-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
17280 // CHECK16-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
17281 // CHECK16-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
17282 // CHECK16-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17283 // CHECK16-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
17284 // CHECK16-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
17285 // CHECK16-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
17286 // CHECK16-NEXT:    br label [[OMP_DISPATCH_COND]]
17287 // CHECK16:       omp.dispatch.end:
17288 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
17289 // CHECK16-NEXT:    ret void
17290 //
17291 //
17292 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131
17293 // CHECK16-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
17294 // CHECK16-NEXT:  entry:
17295 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
17296 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
17297 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
17298 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
17299 // CHECK16-NEXT:    ret void
17300 //
17301 //
17302 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..25
17303 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
17304 // CHECK16-NEXT:  entry:
17305 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
17306 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
17307 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
17308 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
17309 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
17310 // CHECK16-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
17311 // CHECK16-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
17312 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17313 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17314 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
17315 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
17316 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
17317 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
17318 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
17319 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
17320 // CHECK16-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
17321 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
17322 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
17323 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
17324 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
17325 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
17326 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17327 // CHECK16-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
17328 // CHECK16-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
17329 // CHECK16:       cond.true:
17330 // CHECK16-NEXT:    br label [[COND_END:%.*]]
17331 // CHECK16:       cond.false:
17332 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17333 // CHECK16-NEXT:    br label [[COND_END]]
17334 // CHECK16:       cond.end:
17335 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
17336 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
17337 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
17338 // CHECK16-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
17339 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
17340 // CHECK16:       omp.inner.for.cond:
17341 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17342 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17343 // CHECK16-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
17344 // CHECK16-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17345 // CHECK16:       omp.inner.for.body:
17346 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
17347 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17348 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
17349 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
17350 // CHECK16:       omp.inner.for.inc:
17351 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17352 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
17353 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
17354 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
17355 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
17356 // CHECK16:       omp.inner.for.end:
17357 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
17358 // CHECK16:       omp.loop.exit:
17359 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
17360 // CHECK16-NEXT:    ret void
17361 //
17362 //
17363 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..26
17364 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
17365 // CHECK16-NEXT:  entry:
17366 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
17367 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
17368 // CHECK16-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
17369 // CHECK16-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
17370 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
17371 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
17372 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
17373 // CHECK16-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
17374 // CHECK16-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
17375 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17376 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17377 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
17378 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
17379 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
17380 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
17381 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
17382 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
17383 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
17384 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
17385 // CHECK16-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
17386 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
17387 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
17388 // CHECK16-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
17389 // CHECK16-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
17390 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
17391 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
17392 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
17393 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17394 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
17395 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
17396 // CHECK16-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
17397 // CHECK16-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
17398 // CHECK16:       omp.dispatch.cond:
17399 // CHECK16-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
17400 // CHECK16-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
17401 // CHECK16-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
17402 // CHECK16:       omp.dispatch.body:
17403 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
17404 // CHECK16-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
17405 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
17406 // CHECK16:       omp.inner.for.cond:
17407 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
17408 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21
17409 // CHECK16-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
17410 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17411 // CHECK16:       omp.inner.for.body:
17412 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
17413 // CHECK16-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
17414 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
17415 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21
17416 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21
17417 // CHECK16-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP12]]
17418 // CHECK16-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21
17419 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
17420 // CHECK16:       omp.body.continue:
17421 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
17422 // CHECK16:       omp.inner.for.inc:
17423 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
17424 // CHECK16-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
17425 // CHECK16-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
17426 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
17427 // CHECK16:       omp.inner.for.end:
17428 // CHECK16-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
17429 // CHECK16:       omp.dispatch.inc:
17430 // CHECK16-NEXT:    br label [[OMP_DISPATCH_COND]]
17431 // CHECK16:       omp.dispatch.end:
17432 // CHECK16-NEXT:    ret void
17433 //
17434 //
17435 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136
17436 // CHECK16-SAME: (i32 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
17437 // CHECK16-NEXT:  entry:
17438 // CHECK16-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 4
17439 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
17440 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
17441 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
17442 // CHECK16-NEXT:    store i32 [[M]], i32* [[M_ADDR]], align 4
17443 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
17444 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
17445 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4
17446 // CHECK16-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
17447 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17448 // CHECK16-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
17449 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
17450 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]])
17451 // CHECK16-NEXT:    ret void
17452 //
17453 //
17454 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..29
17455 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
17456 // CHECK16-NEXT:  entry:
17457 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
17458 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
17459 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
17460 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
17461 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
17462 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
17463 // CHECK16-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
17464 // CHECK16-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
17465 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17466 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17467 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
17468 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
17469 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
17470 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
17471 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
17472 // CHECK16-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
17473 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
17474 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
17475 // CHECK16-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
17476 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
17477 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
17478 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
17479 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
17480 // CHECK16-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
17481 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17482 // CHECK16-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
17483 // CHECK16-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
17484 // CHECK16:       cond.true:
17485 // CHECK16-NEXT:    br label [[COND_END:%.*]]
17486 // CHECK16:       cond.false:
17487 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17488 // CHECK16-NEXT:    br label [[COND_END]]
17489 // CHECK16:       cond.end:
17490 // CHECK16-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
17491 // CHECK16-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
17492 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
17493 // CHECK16-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
17494 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
17495 // CHECK16:       omp.inner.for.cond:
17496 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17497 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17498 // CHECK16-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
17499 // CHECK16-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17500 // CHECK16:       omp.inner.for.body:
17501 // CHECK16-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
17502 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
17503 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
17504 // CHECK16-NEXT:    store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
17505 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
17506 // CHECK16-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]])
17507 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
17508 // CHECK16:       omp.inner.for.inc:
17509 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
17510 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
17511 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
17512 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
17513 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]]
17514 // CHECK16:       omp.inner.for.end:
17515 // CHECK16-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
17516 // CHECK16:       omp.loop.exit:
17517 // CHECK16-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
17518 // CHECK16-NEXT:    ret void
17519 //
17520 //
17521 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..30
17522 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
17523 // CHECK16-NEXT:  entry:
17524 // CHECK16-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
17525 // CHECK16-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
17526 // CHECK16-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
17527 // CHECK16-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
17528 // CHECK16-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
17529 // CHECK16-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
17530 // CHECK16-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
17531 // CHECK16-NEXT:    [[TMP:%.*]] = alloca i32, align 4
17532 // CHECK16-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
17533 // CHECK16-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
17534 // CHECK16-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
17535 // CHECK16-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
17536 // CHECK16-NEXT:    [[I:%.*]] = alloca i32, align 4
17537 // CHECK16-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
17538 // CHECK16-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
17539 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
17540 // CHECK16-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
17541 // CHECK16-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
17542 // CHECK16-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
17543 // CHECK16-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
17544 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
17545 // CHECK16-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
17546 // CHECK16-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
17547 // CHECK16-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
17548 // CHECK16-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
17549 // CHECK16-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
17550 // CHECK16-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
17551 // CHECK16-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
17552 // CHECK16-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
17553 // CHECK16-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
17554 // CHECK16-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
17555 // CHECK16-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
17556 // CHECK16-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
17557 // CHECK16-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
17558 // CHECK16-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
17559 // CHECK16:       omp.dispatch.cond:
17560 // CHECK16-NEXT:    [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
17561 // CHECK16-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
17562 // CHECK16-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
17563 // CHECK16:       omp.dispatch.body:
17564 // CHECK16-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
17565 // CHECK16-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
17566 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
17567 // CHECK16:       omp.inner.for.cond:
17568 // CHECK16-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
17569 // CHECK16-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !24
17570 // CHECK16-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
17571 // CHECK16-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
17572 // CHECK16:       omp.inner.for.body:
17573 // CHECK16-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
17574 // CHECK16-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
17575 // CHECK16-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
17576 // CHECK16-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !24
17577 // CHECK16-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !24
17578 // CHECK16-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP13]]
17579 // CHECK16-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !24
17580 // CHECK16-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
17581 // CHECK16:       omp.body.continue:
17582 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
17583 // CHECK16:       omp.inner.for.inc:
17584 // CHECK16-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
17585 // CHECK16-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP14]], 1
17586 // CHECK16-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
17587 // CHECK16-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
17588 // CHECK16:       omp.inner.for.end:
17589 // CHECK16-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
17590 // CHECK16:       omp.dispatch.inc:
17591 // CHECK16-NEXT:    br label [[OMP_DISPATCH_COND]]
17592 // CHECK16:       omp.dispatch.end:
17593 // CHECK16-NEXT:    ret void
17594 //
17595 //
17596 // CHECK16-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
17597 // CHECK16-SAME: () #[[ATTR5:[0-9]+]] {
17598 // CHECK16-NEXT:  entry:
17599 // CHECK16-NEXT:    call void @__tgt_register_requires(i64 1)
17600 // CHECK16-NEXT:    ret void
17601 //
17602 //
17603 // CHECK17-LABEL: define {{[^@]+}}@main
17604 // CHECK17-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
17605 // CHECK17-NEXT:  entry:
17606 // CHECK17-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
17607 // CHECK17-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
17608 // CHECK17-NEXT:    [[ARGV_ADDR:%.*]] = alloca i8**, align 8
17609 // CHECK17-NEXT:    [[N:%.*]] = alloca i32, align 4
17610 // CHECK17-NEXT:    [[SAVED_STACK:%.*]] = alloca i8*, align 8
17611 // CHECK17-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i64, align 8
17612 // CHECK17-NEXT:    [[M:%.*]] = alloca i32, align 4
17613 // CHECK17-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
17614 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
17615 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
17616 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
17617 // CHECK17-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
17618 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
17619 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
17620 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
17621 // CHECK17-NEXT:    [[N_CASTED3:%.*]] = alloca i64, align 8
17622 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8
17623 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8
17624 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8
17625 // CHECK17-NEXT:    [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8
17626 // CHECK17-NEXT:    [[_TMP9:%.*]] = alloca i32, align 4
17627 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
17628 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
17629 // CHECK17-NEXT:    [[M_CASTED:%.*]] = alloca i64, align 8
17630 // CHECK17-NEXT:    [[N_CASTED19:%.*]] = alloca i64, align 8
17631 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [4 x i8*], align 8
17632 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS22:%.*]] = alloca [4 x i8*], align 8
17633 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [4 x i8*], align 8
17634 // CHECK17-NEXT:    [[DOTOFFLOAD_SIZES24:%.*]] = alloca [4 x i64], align 8
17635 // CHECK17-NEXT:    [[_TMP25:%.*]] = alloca i32, align 4
17636 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4
17637 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4
17638 // CHECK17-NEXT:    [[N_CASTED34:%.*]] = alloca i64, align 8
17639 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS36:%.*]] = alloca [3 x i8*], align 8
17640 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS37:%.*]] = alloca [3 x i8*], align 8
17641 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS38:%.*]] = alloca [3 x i8*], align 8
17642 // CHECK17-NEXT:    [[DOTOFFLOAD_SIZES39:%.*]] = alloca [3 x i64], align 8
17643 // CHECK17-NEXT:    [[_TMP40:%.*]] = alloca i32, align 4
17644 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4
17645 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4
17646 // CHECK17-NEXT:    [[M_CASTED49:%.*]] = alloca i64, align 8
17647 // CHECK17-NEXT:    [[N_CASTED51:%.*]] = alloca i64, align 8
17648 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS53:%.*]] = alloca [4 x i8*], align 8
17649 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS54:%.*]] = alloca [4 x i8*], align 8
17650 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS55:%.*]] = alloca [4 x i8*], align 8
17651 // CHECK17-NEXT:    [[DOTOFFLOAD_SIZES56:%.*]] = alloca [4 x i64], align 8
17652 // CHECK17-NEXT:    [[_TMP57:%.*]] = alloca i32, align 4
17653 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4
17654 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_59:%.*]] = alloca i32, align 4
17655 // CHECK17-NEXT:    store i32 0, i32* [[RETVAL]], align 4
17656 // CHECK17-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
17657 // CHECK17-NEXT:    store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
17658 // CHECK17-NEXT:    store i32 100, i32* [[N]], align 4
17659 // CHECK17-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N]], align 4
17660 // CHECK17-NEXT:    [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
17661 // CHECK17-NEXT:    [[TMP2:%.*]] = call i8* @llvm.stacksave()
17662 // CHECK17-NEXT:    store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
17663 // CHECK17-NEXT:    [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
17664 // CHECK17-NEXT:    store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
17665 // CHECK17-NEXT:    store i32 10, i32* [[M]], align 4
17666 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N]], align 4
17667 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
17668 // CHECK17-NEXT:    store i32 [[TMP3]], i32* [[CONV]], align 4
17669 // CHECK17-NEXT:    [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
17670 // CHECK17-NEXT:    [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4
17671 // CHECK17-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
17672 // CHECK17-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
17673 // CHECK17-NEXT:    store i64 [[TMP4]], i64* [[TMP7]], align 8
17674 // CHECK17-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
17675 // CHECK17-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
17676 // CHECK17-NEXT:    store i64 [[TMP4]], i64* [[TMP9]], align 8
17677 // CHECK17-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
17678 // CHECK17-NEXT:    store i64 4, i64* [[TMP10]], align 8
17679 // CHECK17-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
17680 // CHECK17-NEXT:    store i8* null, i8** [[TMP11]], align 8
17681 // CHECK17-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
17682 // CHECK17-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
17683 // CHECK17-NEXT:    store i64 [[TMP1]], i64* [[TMP13]], align 8
17684 // CHECK17-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
17685 // CHECK17-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
17686 // CHECK17-NEXT:    store i64 [[TMP1]], i64* [[TMP15]], align 8
17687 // CHECK17-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
17688 // CHECK17-NEXT:    store i64 8, i64* [[TMP16]], align 8
17689 // CHECK17-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
17690 // CHECK17-NEXT:    store i8* null, i8** [[TMP17]], align 8
17691 // CHECK17-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
17692 // CHECK17-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
17693 // CHECK17-NEXT:    store i32* [[VLA]], i32** [[TMP19]], align 8
17694 // CHECK17-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
17695 // CHECK17-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
17696 // CHECK17-NEXT:    store i32* [[VLA]], i32** [[TMP21]], align 8
17697 // CHECK17-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
17698 // CHECK17-NEXT:    store i64 [[TMP5]], i64* [[TMP22]], align 8
17699 // CHECK17-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
17700 // CHECK17-NEXT:    store i8* null, i8** [[TMP23]], align 8
17701 // CHECK17-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
17702 // CHECK17-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
17703 // CHECK17-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
17704 // CHECK17-NEXT:    [[TMP27:%.*]] = load i32, i32* [[N]], align 4
17705 // CHECK17-NEXT:    store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
17706 // CHECK17-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
17707 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
17708 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
17709 // CHECK17-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
17710 // CHECK17-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
17711 // CHECK17-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
17712 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
17713 // CHECK17-NEXT:    [[TMP30:%.*]] = zext i32 [[ADD]] to i64
17714 // CHECK17-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]])
17715 // CHECK17-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
17716 // CHECK17-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
17717 // CHECK17-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
17718 // CHECK17:       omp_offload.failed:
17719 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
17720 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT]]
17721 // CHECK17:       omp_offload.cont:
17722 // CHECK17-NEXT:    [[TMP33:%.*]] = load i32, i32* [[N]], align 4
17723 // CHECK17-NEXT:    [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32*
17724 // CHECK17-NEXT:    store i32 [[TMP33]], i32* [[CONV4]], align 4
17725 // CHECK17-NEXT:    [[TMP34:%.*]] = load i64, i64* [[N_CASTED3]], align 8
17726 // CHECK17-NEXT:    [[TMP35:%.*]] = mul nuw i64 [[TMP1]], 4
17727 // CHECK17-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
17728 // CHECK17-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64*
17729 // CHECK17-NEXT:    store i64 [[TMP34]], i64* [[TMP37]], align 8
17730 // CHECK17-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
17731 // CHECK17-NEXT:    [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64*
17732 // CHECK17-NEXT:    store i64 [[TMP34]], i64* [[TMP39]], align 8
17733 // CHECK17-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
17734 // CHECK17-NEXT:    store i64 4, i64* [[TMP40]], align 8
17735 // CHECK17-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0
17736 // CHECK17-NEXT:    store i8* null, i8** [[TMP41]], align 8
17737 // CHECK17-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1
17738 // CHECK17-NEXT:    [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i64*
17739 // CHECK17-NEXT:    store i64 [[TMP1]], i64* [[TMP43]], align 8
17740 // CHECK17-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1
17741 // CHECK17-NEXT:    [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i64*
17742 // CHECK17-NEXT:    store i64 [[TMP1]], i64* [[TMP45]], align 8
17743 // CHECK17-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 1
17744 // CHECK17-NEXT:    store i64 8, i64* [[TMP46]], align 8
17745 // CHECK17-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1
17746 // CHECK17-NEXT:    store i8* null, i8** [[TMP47]], align 8
17747 // CHECK17-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2
17748 // CHECK17-NEXT:    [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32**
17749 // CHECK17-NEXT:    store i32* [[VLA]], i32** [[TMP49]], align 8
17750 // CHECK17-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2
17751 // CHECK17-NEXT:    [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i32**
17752 // CHECK17-NEXT:    store i32* [[VLA]], i32** [[TMP51]], align 8
17753 // CHECK17-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2
17754 // CHECK17-NEXT:    store i64 [[TMP35]], i64* [[TMP52]], align 8
17755 // CHECK17-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2
17756 // CHECK17-NEXT:    store i8* null, i8** [[TMP53]], align 8
17757 // CHECK17-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
17758 // CHECK17-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
17759 // CHECK17-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
17760 // CHECK17-NEXT:    [[TMP57:%.*]] = load i32, i32* [[N]], align 4
17761 // CHECK17-NEXT:    store i32 [[TMP57]], i32* [[DOTCAPTURE_EXPR_10]], align 4
17762 // CHECK17-NEXT:    [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
17763 // CHECK17-NEXT:    [[SUB12:%.*]] = sub nsw i32 [[TMP58]], 0
17764 // CHECK17-NEXT:    [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
17765 // CHECK17-NEXT:    [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1
17766 // CHECK17-NEXT:    store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4
17767 // CHECK17-NEXT:    [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
17768 // CHECK17-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP59]], 1
17769 // CHECK17-NEXT:    [[TMP60:%.*]] = zext i32 [[ADD15]] to i64
17770 // CHECK17-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP60]])
17771 // CHECK17-NEXT:    [[TMP61:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, i32 3, i8** [[TMP54]], i8** [[TMP55]], i64* [[TMP56]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
17772 // CHECK17-NEXT:    [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0
17773 // CHECK17-NEXT:    br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
17774 // CHECK17:       omp_offload.failed16:
17775 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i64 [[TMP34]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
17776 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT17]]
17777 // CHECK17:       omp_offload.cont17:
17778 // CHECK17-NEXT:    [[TMP63:%.*]] = load i32, i32* [[M]], align 4
17779 // CHECK17-NEXT:    [[CONV18:%.*]] = bitcast i64* [[M_CASTED]] to i32*
17780 // CHECK17-NEXT:    store i32 [[TMP63]], i32* [[CONV18]], align 4
17781 // CHECK17-NEXT:    [[TMP64:%.*]] = load i64, i64* [[M_CASTED]], align 8
17782 // CHECK17-NEXT:    [[TMP65:%.*]] = load i32, i32* [[N]], align 4
17783 // CHECK17-NEXT:    [[CONV20:%.*]] = bitcast i64* [[N_CASTED19]] to i32*
17784 // CHECK17-NEXT:    store i32 [[TMP65]], i32* [[CONV20]], align 4
17785 // CHECK17-NEXT:    [[TMP66:%.*]] = load i64, i64* [[N_CASTED19]], align 8
17786 // CHECK17-NEXT:    [[TMP67:%.*]] = mul nuw i64 [[TMP1]], 4
17787 // CHECK17-NEXT:    [[TMP68:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
17788 // CHECK17-NEXT:    [[TMP69:%.*]] = bitcast i8** [[TMP68]] to i64*
17789 // CHECK17-NEXT:    store i64 [[TMP64]], i64* [[TMP69]], align 8
17790 // CHECK17-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
17791 // CHECK17-NEXT:    [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i64*
17792 // CHECK17-NEXT:    store i64 [[TMP64]], i64* [[TMP71]], align 8
17793 // CHECK17-NEXT:    [[TMP72:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0
17794 // CHECK17-NEXT:    store i64 4, i64* [[TMP72]], align 8
17795 // CHECK17-NEXT:    [[TMP73:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0
17796 // CHECK17-NEXT:    store i8* null, i8** [[TMP73]], align 8
17797 // CHECK17-NEXT:    [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1
17798 // CHECK17-NEXT:    [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i64*
17799 // CHECK17-NEXT:    store i64 [[TMP66]], i64* [[TMP75]], align 8
17800 // CHECK17-NEXT:    [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1
17801 // CHECK17-NEXT:    [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i64*
17802 // CHECK17-NEXT:    store i64 [[TMP66]], i64* [[TMP77]], align 8
17803 // CHECK17-NEXT:    [[TMP78:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 1
17804 // CHECK17-NEXT:    store i64 4, i64* [[TMP78]], align 8
17805 // CHECK17-NEXT:    [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1
17806 // CHECK17-NEXT:    store i8* null, i8** [[TMP79]], align 8
17807 // CHECK17-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 2
17808 // CHECK17-NEXT:    [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i64*
17809 // CHECK17-NEXT:    store i64 [[TMP1]], i64* [[TMP81]], align 8
17810 // CHECK17-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 2
17811 // CHECK17-NEXT:    [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i64*
17812 // CHECK17-NEXT:    store i64 [[TMP1]], i64* [[TMP83]], align 8
17813 // CHECK17-NEXT:    [[TMP84:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 2
17814 // CHECK17-NEXT:    store i64 8, i64* [[TMP84]], align 8
17815 // CHECK17-NEXT:    [[TMP85:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 2
17816 // CHECK17-NEXT:    store i8* null, i8** [[TMP85]], align 8
17817 // CHECK17-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 3
17818 // CHECK17-NEXT:    [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i32**
17819 // CHECK17-NEXT:    store i32* [[VLA]], i32** [[TMP87]], align 8
17820 // CHECK17-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 3
17821 // CHECK17-NEXT:    [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32**
17822 // CHECK17-NEXT:    store i32* [[VLA]], i32** [[TMP89]], align 8
17823 // CHECK17-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 3
17824 // CHECK17-NEXT:    store i64 [[TMP67]], i64* [[TMP90]], align 8
17825 // CHECK17-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 3
17826 // CHECK17-NEXT:    store i8* null, i8** [[TMP91]], align 8
17827 // CHECK17-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
17828 // CHECK17-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
17829 // CHECK17-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0
17830 // CHECK17-NEXT:    [[TMP95:%.*]] = load i32, i32* [[N]], align 4
17831 // CHECK17-NEXT:    store i32 [[TMP95]], i32* [[DOTCAPTURE_EXPR_26]], align 4
17832 // CHECK17-NEXT:    [[TMP96:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4
17833 // CHECK17-NEXT:    [[SUB28:%.*]] = sub nsw i32 [[TMP96]], 0
17834 // CHECK17-NEXT:    [[DIV29:%.*]] = sdiv i32 [[SUB28]], 1
17835 // CHECK17-NEXT:    [[SUB30:%.*]] = sub nsw i32 [[DIV29]], 1
17836 // CHECK17-NEXT:    store i32 [[SUB30]], i32* [[DOTCAPTURE_EXPR_27]], align 4
17837 // CHECK17-NEXT:    [[TMP97:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4
17838 // CHECK17-NEXT:    [[ADD31:%.*]] = add nsw i32 [[TMP97]], 1
17839 // CHECK17-NEXT:    [[TMP98:%.*]] = zext i32 [[ADD31]] to i64
17840 // CHECK17-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP98]])
17841 // CHECK17-NEXT:    [[TMP99:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, i32 4, i8** [[TMP92]], i8** [[TMP93]], i64* [[TMP94]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
17842 // CHECK17-NEXT:    [[TMP100:%.*]] = icmp ne i32 [[TMP99]], 0
17843 // CHECK17-NEXT:    br i1 [[TMP100]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
17844 // CHECK17:       omp_offload.failed32:
17845 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i64 [[TMP64]], i64 [[TMP66]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
17846 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT33]]
17847 // CHECK17:       omp_offload.cont33:
17848 // CHECK17-NEXT:    [[TMP101:%.*]] = load i32, i32* [[N]], align 4
17849 // CHECK17-NEXT:    [[CONV35:%.*]] = bitcast i64* [[N_CASTED34]] to i32*
17850 // CHECK17-NEXT:    store i32 [[TMP101]], i32* [[CONV35]], align 4
17851 // CHECK17-NEXT:    [[TMP102:%.*]] = load i64, i64* [[N_CASTED34]], align 8
17852 // CHECK17-NEXT:    [[TMP103:%.*]] = mul nuw i64 [[TMP1]], 4
17853 // CHECK17-NEXT:    [[TMP104:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0
17854 // CHECK17-NEXT:    [[TMP105:%.*]] = bitcast i8** [[TMP104]] to i64*
17855 // CHECK17-NEXT:    store i64 [[TMP102]], i64* [[TMP105]], align 8
17856 // CHECK17-NEXT:    [[TMP106:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0
17857 // CHECK17-NEXT:    [[TMP107:%.*]] = bitcast i8** [[TMP106]] to i64*
17858 // CHECK17-NEXT:    store i64 [[TMP102]], i64* [[TMP107]], align 8
17859 // CHECK17-NEXT:    [[TMP108:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0
17860 // CHECK17-NEXT:    store i64 4, i64* [[TMP108]], align 8
17861 // CHECK17-NEXT:    [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 0
17862 // CHECK17-NEXT:    store i8* null, i8** [[TMP109]], align 8
17863 // CHECK17-NEXT:    [[TMP110:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 1
17864 // CHECK17-NEXT:    [[TMP111:%.*]] = bitcast i8** [[TMP110]] to i64*
17865 // CHECK17-NEXT:    store i64 [[TMP1]], i64* [[TMP111]], align 8
17866 // CHECK17-NEXT:    [[TMP112:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 1
17867 // CHECK17-NEXT:    [[TMP113:%.*]] = bitcast i8** [[TMP112]] to i64*
17868 // CHECK17-NEXT:    store i64 [[TMP1]], i64* [[TMP113]], align 8
17869 // CHECK17-NEXT:    [[TMP114:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 1
17870 // CHECK17-NEXT:    store i64 8, i64* [[TMP114]], align 8
17871 // CHECK17-NEXT:    [[TMP115:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 1
17872 // CHECK17-NEXT:    store i8* null, i8** [[TMP115]], align 8
17873 // CHECK17-NEXT:    [[TMP116:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 2
17874 // CHECK17-NEXT:    [[TMP117:%.*]] = bitcast i8** [[TMP116]] to i32**
17875 // CHECK17-NEXT:    store i32* [[VLA]], i32** [[TMP117]], align 8
17876 // CHECK17-NEXT:    [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 2
17877 // CHECK17-NEXT:    [[TMP119:%.*]] = bitcast i8** [[TMP118]] to i32**
17878 // CHECK17-NEXT:    store i32* [[VLA]], i32** [[TMP119]], align 8
17879 // CHECK17-NEXT:    [[TMP120:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 2
17880 // CHECK17-NEXT:    store i64 [[TMP103]], i64* [[TMP120]], align 8
17881 // CHECK17-NEXT:    [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 2
17882 // CHECK17-NEXT:    store i8* null, i8** [[TMP121]], align 8
17883 // CHECK17-NEXT:    [[TMP122:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0
17884 // CHECK17-NEXT:    [[TMP123:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0
17885 // CHECK17-NEXT:    [[TMP124:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0
17886 // CHECK17-NEXT:    [[TMP125:%.*]] = load i32, i32* [[N]], align 4
17887 // CHECK17-NEXT:    store i32 [[TMP125]], i32* [[DOTCAPTURE_EXPR_41]], align 4
17888 // CHECK17-NEXT:    [[TMP126:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4
17889 // CHECK17-NEXT:    [[SUB43:%.*]] = sub nsw i32 [[TMP126]], 0
17890 // CHECK17-NEXT:    [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1
17891 // CHECK17-NEXT:    [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 1
17892 // CHECK17-NEXT:    store i32 [[SUB45]], i32* [[DOTCAPTURE_EXPR_42]], align 4
17893 // CHECK17-NEXT:    [[TMP127:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_42]], align 4
17894 // CHECK17-NEXT:    [[ADD46:%.*]] = add nsw i32 [[TMP127]], 1
17895 // CHECK17-NEXT:    [[TMP128:%.*]] = zext i32 [[ADD46]] to i64
17896 // CHECK17-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP128]])
17897 // CHECK17-NEXT:    [[TMP129:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, i32 3, i8** [[TMP122]], i8** [[TMP123]], i64* [[TMP124]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
17898 // CHECK17-NEXT:    [[TMP130:%.*]] = icmp ne i32 [[TMP129]], 0
17899 // CHECK17-NEXT:    br i1 [[TMP130]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]]
17900 // CHECK17:       omp_offload.failed47:
17901 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i64 [[TMP102]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
17902 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT48]]
17903 // CHECK17:       omp_offload.cont48:
17904 // CHECK17-NEXT:    [[TMP131:%.*]] = load i32, i32* [[M]], align 4
17905 // CHECK17-NEXT:    [[CONV50:%.*]] = bitcast i64* [[M_CASTED49]] to i32*
17906 // CHECK17-NEXT:    store i32 [[TMP131]], i32* [[CONV50]], align 4
17907 // CHECK17-NEXT:    [[TMP132:%.*]] = load i64, i64* [[M_CASTED49]], align 8
17908 // CHECK17-NEXT:    [[TMP133:%.*]] = load i32, i32* [[N]], align 4
17909 // CHECK17-NEXT:    [[CONV52:%.*]] = bitcast i64* [[N_CASTED51]] to i32*
17910 // CHECK17-NEXT:    store i32 [[TMP133]], i32* [[CONV52]], align 4
17911 // CHECK17-NEXT:    [[TMP134:%.*]] = load i64, i64* [[N_CASTED51]], align 8
17912 // CHECK17-NEXT:    [[TMP135:%.*]] = mul nuw i64 [[TMP1]], 4
17913 // CHECK17-NEXT:    [[TMP136:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0
17914 // CHECK17-NEXT:    [[TMP137:%.*]] = bitcast i8** [[TMP136]] to i64*
17915 // CHECK17-NEXT:    store i64 [[TMP132]], i64* [[TMP137]], align 8
17916 // CHECK17-NEXT:    [[TMP138:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0
17917 // CHECK17-NEXT:    [[TMP139:%.*]] = bitcast i8** [[TMP138]] to i64*
17918 // CHECK17-NEXT:    store i64 [[TMP132]], i64* [[TMP139]], align 8
17919 // CHECK17-NEXT:    [[TMP140:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0
17920 // CHECK17-NEXT:    store i64 4, i64* [[TMP140]], align 8
17921 // CHECK17-NEXT:    [[TMP141:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 0
17922 // CHECK17-NEXT:    store i8* null, i8** [[TMP141]], align 8
17923 // CHECK17-NEXT:    [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 1
17924 // CHECK17-NEXT:    [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i64*
17925 // CHECK17-NEXT:    store i64 [[TMP134]], i64* [[TMP143]], align 8
17926 // CHECK17-NEXT:    [[TMP144:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 1
17927 // CHECK17-NEXT:    [[TMP145:%.*]] = bitcast i8** [[TMP144]] to i64*
17928 // CHECK17-NEXT:    store i64 [[TMP134]], i64* [[TMP145]], align 8
17929 // CHECK17-NEXT:    [[TMP146:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 1
17930 // CHECK17-NEXT:    store i64 4, i64* [[TMP146]], align 8
17931 // CHECK17-NEXT:    [[TMP147:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 1
17932 // CHECK17-NEXT:    store i8* null, i8** [[TMP147]], align 8
17933 // CHECK17-NEXT:    [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 2
17934 // CHECK17-NEXT:    [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i64*
17935 // CHECK17-NEXT:    store i64 [[TMP1]], i64* [[TMP149]], align 8
17936 // CHECK17-NEXT:    [[TMP150:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 2
17937 // CHECK17-NEXT:    [[TMP151:%.*]] = bitcast i8** [[TMP150]] to i64*
17938 // CHECK17-NEXT:    store i64 [[TMP1]], i64* [[TMP151]], align 8
17939 // CHECK17-NEXT:    [[TMP152:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 2
17940 // CHECK17-NEXT:    store i64 8, i64* [[TMP152]], align 8
17941 // CHECK17-NEXT:    [[TMP153:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 2
17942 // CHECK17-NEXT:    store i8* null, i8** [[TMP153]], align 8
17943 // CHECK17-NEXT:    [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 3
17944 // CHECK17-NEXT:    [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32**
17945 // CHECK17-NEXT:    store i32* [[VLA]], i32** [[TMP155]], align 8
17946 // CHECK17-NEXT:    [[TMP156:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 3
17947 // CHECK17-NEXT:    [[TMP157:%.*]] = bitcast i8** [[TMP156]] to i32**
17948 // CHECK17-NEXT:    store i32* [[VLA]], i32** [[TMP157]], align 8
17949 // CHECK17-NEXT:    [[TMP158:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 3
17950 // CHECK17-NEXT:    store i64 [[TMP135]], i64* [[TMP158]], align 8
17951 // CHECK17-NEXT:    [[TMP159:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 3
17952 // CHECK17-NEXT:    store i8* null, i8** [[TMP159]], align 8
17953 // CHECK17-NEXT:    [[TMP160:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0
17954 // CHECK17-NEXT:    [[TMP161:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0
17955 // CHECK17-NEXT:    [[TMP162:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0
17956 // CHECK17-NEXT:    [[TMP163:%.*]] = load i32, i32* [[N]], align 4
17957 // CHECK17-NEXT:    store i32 [[TMP163]], i32* [[DOTCAPTURE_EXPR_58]], align 4
17958 // CHECK17-NEXT:    [[TMP164:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_58]], align 4
17959 // CHECK17-NEXT:    [[SUB60:%.*]] = sub nsw i32 [[TMP164]], 0
17960 // CHECK17-NEXT:    [[DIV61:%.*]] = sdiv i32 [[SUB60]], 1
17961 // CHECK17-NEXT:    [[SUB62:%.*]] = sub nsw i32 [[DIV61]], 1
17962 // CHECK17-NEXT:    store i32 [[SUB62]], i32* [[DOTCAPTURE_EXPR_59]], align 4
17963 // CHECK17-NEXT:    [[TMP165:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_59]], align 4
17964 // CHECK17-NEXT:    [[ADD63:%.*]] = add nsw i32 [[TMP165]], 1
17965 // CHECK17-NEXT:    [[TMP166:%.*]] = zext i32 [[ADD63]] to i64
17966 // CHECK17-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP166]])
17967 // CHECK17-NEXT:    [[TMP167:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, i32 4, i8** [[TMP160]], i8** [[TMP161]], i64* [[TMP162]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
17968 // CHECK17-NEXT:    [[TMP168:%.*]] = icmp ne i32 [[TMP167]], 0
17969 // CHECK17-NEXT:    br i1 [[TMP168]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]]
17970 // CHECK17:       omp_offload.failed64:
17971 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i64 [[TMP132]], i64 [[TMP134]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
17972 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT65]]
17973 // CHECK17:       omp_offload.cont65:
17974 // CHECK17-NEXT:    [[TMP169:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
17975 // CHECK17-NEXT:    [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP169]])
17976 // CHECK17-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
17977 // CHECK17-NEXT:    [[TMP170:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
17978 // CHECK17-NEXT:    call void @llvm.stackrestore(i8* [[TMP170]])
17979 // CHECK17-NEXT:    [[TMP171:%.*]] = load i32, i32* [[RETVAL]], align 4
17980 // CHECK17-NEXT:    ret i32 [[TMP171]]
17981 //
17982 //
17983 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148
17984 // CHECK17-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
17985 // CHECK17-NEXT:  entry:
17986 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
17987 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
17988 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
17989 // CHECK17-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
17990 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
17991 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
17992 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
17993 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
17994 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
17995 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
17996 // CHECK17-NEXT:    ret void
17997 //
17998 //
17999 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined.
18000 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
18001 // CHECK17-NEXT:  entry:
18002 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
18003 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
18004 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
18005 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
18006 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
18007 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
18008 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
18009 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
18010 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
18011 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
18012 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
18013 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
18014 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18015 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18016 // CHECK17-NEXT:    [[I3:%.*]] = alloca i32, align 4
18017 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
18018 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
18019 // CHECK17-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
18020 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
18021 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
18022 // CHECK17-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
18023 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
18024 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
18025 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
18026 // CHECK17-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
18027 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
18028 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
18029 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
18030 // CHECK17-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
18031 // CHECK17-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
18032 // CHECK17-NEXT:    store i32 0, i32* [[I]], align 4
18033 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
18034 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
18035 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
18036 // CHECK17:       omp.precond.then:
18037 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
18038 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18039 // CHECK17-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
18040 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18041 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18042 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18043 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
18044 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
18045 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18046 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18047 // CHECK17-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
18048 // CHECK17-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
18049 // CHECK17:       cond.true:
18050 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18051 // CHECK17-NEXT:    br label [[COND_END:%.*]]
18052 // CHECK17:       cond.false:
18053 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18054 // CHECK17-NEXT:    br label [[COND_END]]
18055 // CHECK17:       cond.end:
18056 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
18057 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
18058 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
18059 // CHECK17-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
18060 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
18061 // CHECK17:       omp.inner.for.cond:
18062 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18063 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18064 // CHECK17-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
18065 // CHECK17-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18066 // CHECK17:       omp.inner.for.body:
18067 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
18068 // CHECK17-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
18069 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18070 // CHECK17-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
18071 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])
18072 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
18073 // CHECK17:       omp.inner.for.inc:
18074 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18075 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
18076 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
18077 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
18078 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
18079 // CHECK17:       omp.inner.for.end:
18080 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
18081 // CHECK17:       omp.loop.exit:
18082 // CHECK17-NEXT:    [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18083 // CHECK17-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
18084 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
18085 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
18086 // CHECK17:       omp.precond.end:
18087 // CHECK17-NEXT:    ret void
18088 //
18089 //
18090 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..1
18091 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
18092 // CHECK17-NEXT:  entry:
18093 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
18094 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
18095 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
18096 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
18097 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
18098 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
18099 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
18100 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
18101 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
18102 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
18103 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
18104 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
18105 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
18106 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
18107 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18108 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18109 // CHECK17-NEXT:    [[I4:%.*]] = alloca i32, align 4
18110 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
18111 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
18112 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
18113 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
18114 // CHECK17-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
18115 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
18116 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
18117 // CHECK17-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
18118 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
18119 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
18120 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
18121 // CHECK17-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
18122 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
18123 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
18124 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
18125 // CHECK17-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
18126 // CHECK17-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
18127 // CHECK17-NEXT:    store i32 0, i32* [[I]], align 4
18128 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
18129 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
18130 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
18131 // CHECK17:       omp.precond.then:
18132 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
18133 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18134 // CHECK17-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
18135 // CHECK17-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
18136 // CHECK17-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
18137 // CHECK17-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
18138 // CHECK17-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
18139 // CHECK17-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
18140 // CHECK17-NEXT:    store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
18141 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18142 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18143 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18144 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
18145 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
18146 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18147 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18148 // CHECK17-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
18149 // CHECK17-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
18150 // CHECK17:       cond.true:
18151 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18152 // CHECK17-NEXT:    br label [[COND_END:%.*]]
18153 // CHECK17:       cond.false:
18154 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18155 // CHECK17-NEXT:    br label [[COND_END]]
18156 // CHECK17:       cond.end:
18157 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
18158 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
18159 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
18160 // CHECK17-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
18161 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
18162 // CHECK17:       omp.inner.for.cond:
18163 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18164 // CHECK17-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18165 // CHECK17-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
18166 // CHECK17-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18167 // CHECK17:       omp.inner.for.body:
18168 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18169 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
18170 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
18171 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4
18172 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I4]], align 4
18173 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
18174 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
18175 // CHECK17-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
18176 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
18177 // CHECK17:       omp.body.continue:
18178 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
18179 // CHECK17:       omp.inner.for.inc:
18180 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18181 // CHECK17-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
18182 // CHECK17-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
18183 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
18184 // CHECK17:       omp.inner.for.end:
18185 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
18186 // CHECK17:       omp.loop.exit:
18187 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18188 // CHECK17-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
18189 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
18190 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
18191 // CHECK17:       omp.precond.end:
18192 // CHECK17-NEXT:    ret void
18193 //
18194 //
18195 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153
18196 // CHECK17-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
18197 // CHECK17-NEXT:  entry:
18198 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
18199 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
18200 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
18201 // CHECK17-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
18202 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
18203 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
18204 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
18205 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
18206 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
18207 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
18208 // CHECK17-NEXT:    ret void
18209 //
18210 //
18211 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..2
18212 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
18213 // CHECK17-NEXT:  entry:
18214 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
18215 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
18216 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
18217 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
18218 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
18219 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
18220 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
18221 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
18222 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
18223 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
18224 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
18225 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
18226 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18227 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18228 // CHECK17-NEXT:    [[I3:%.*]] = alloca i32, align 4
18229 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
18230 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
18231 // CHECK17-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
18232 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
18233 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
18234 // CHECK17-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
18235 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
18236 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
18237 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
18238 // CHECK17-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
18239 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
18240 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
18241 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
18242 // CHECK17-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
18243 // CHECK17-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
18244 // CHECK17-NEXT:    store i32 0, i32* [[I]], align 4
18245 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
18246 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
18247 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
18248 // CHECK17:       omp.precond.then:
18249 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
18250 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18251 // CHECK17-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
18252 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18253 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18254 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18255 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
18256 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
18257 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18258 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18259 // CHECK17-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
18260 // CHECK17-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
18261 // CHECK17:       cond.true:
18262 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18263 // CHECK17-NEXT:    br label [[COND_END:%.*]]
18264 // CHECK17:       cond.false:
18265 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18266 // CHECK17-NEXT:    br label [[COND_END]]
18267 // CHECK17:       cond.end:
18268 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
18269 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
18270 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
18271 // CHECK17-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
18272 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
18273 // CHECK17:       omp.inner.for.cond:
18274 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18275 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18276 // CHECK17-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
18277 // CHECK17-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18278 // CHECK17:       omp.inner.for.body:
18279 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
18280 // CHECK17-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
18281 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18282 // CHECK17-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
18283 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])
18284 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
18285 // CHECK17:       omp.inner.for.inc:
18286 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18287 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
18288 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
18289 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
18290 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
18291 // CHECK17:       omp.inner.for.end:
18292 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
18293 // CHECK17:       omp.loop.exit:
18294 // CHECK17-NEXT:    [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18295 // CHECK17-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
18296 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
18297 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
18298 // CHECK17:       omp.precond.end:
18299 // CHECK17-NEXT:    ret void
18300 //
18301 //
18302 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..3
18303 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
18304 // CHECK17-NEXT:  entry:
18305 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
18306 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
18307 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
18308 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
18309 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
18310 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
18311 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
18312 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
18313 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
18314 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
18315 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
18316 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
18317 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
18318 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
18319 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18320 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18321 // CHECK17-NEXT:    [[I4:%.*]] = alloca i32, align 4
18322 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
18323 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
18324 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
18325 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
18326 // CHECK17-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
18327 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
18328 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
18329 // CHECK17-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
18330 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
18331 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
18332 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
18333 // CHECK17-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
18334 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
18335 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
18336 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
18337 // CHECK17-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
18338 // CHECK17-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
18339 // CHECK17-NEXT:    store i32 0, i32* [[I]], align 4
18340 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
18341 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
18342 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
18343 // CHECK17:       omp.precond.then:
18344 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
18345 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18346 // CHECK17-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
18347 // CHECK17-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
18348 // CHECK17-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
18349 // CHECK17-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
18350 // CHECK17-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
18351 // CHECK17-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
18352 // CHECK17-NEXT:    store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
18353 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18354 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18355 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18356 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
18357 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
18358 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18359 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18360 // CHECK17-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
18361 // CHECK17-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
18362 // CHECK17:       cond.true:
18363 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18364 // CHECK17-NEXT:    br label [[COND_END:%.*]]
18365 // CHECK17:       cond.false:
18366 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18367 // CHECK17-NEXT:    br label [[COND_END]]
18368 // CHECK17:       cond.end:
18369 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
18370 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
18371 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
18372 // CHECK17-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
18373 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
18374 // CHECK17:       omp.inner.for.cond:
18375 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18376 // CHECK17-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18377 // CHECK17-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
18378 // CHECK17-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18379 // CHECK17:       omp.inner.for.body:
18380 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18381 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
18382 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
18383 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4
18384 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I4]], align 4
18385 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
18386 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
18387 // CHECK17-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
18388 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
18389 // CHECK17:       omp.body.continue:
18390 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
18391 // CHECK17:       omp.inner.for.inc:
18392 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18393 // CHECK17-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
18394 // CHECK17-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
18395 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
18396 // CHECK17:       omp.inner.for.end:
18397 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
18398 // CHECK17:       omp.loop.exit:
18399 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18400 // CHECK17-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
18401 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
18402 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
18403 // CHECK17:       omp.precond.end:
18404 // CHECK17-NEXT:    ret void
18405 //
18406 //
18407 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158
18408 // CHECK17-SAME: (i64 [[M:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
18409 // CHECK17-NEXT:  entry:
18410 // CHECK17-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8
18411 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
18412 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
18413 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
18414 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
18415 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
18416 // CHECK17-NEXT:    store i64 [[M]], i64* [[M_ADDR]], align 8
18417 // CHECK17-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
18418 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
18419 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
18420 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
18421 // CHECK17-NEXT:    [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
18422 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
18423 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
18424 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
18425 // CHECK17-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
18426 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
18427 // CHECK17-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
18428 // CHECK17-NEXT:    store i32 [[TMP3]], i32* [[CONV2]], align 4
18429 // CHECK17-NEXT:    [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
18430 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]])
18431 // CHECK17-NEXT:    ret void
18432 //
18433 //
18434 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..5
18435 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
18436 // CHECK17-NEXT:  entry:
18437 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
18438 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
18439 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
18440 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
18441 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
18442 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
18443 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
18444 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
18445 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
18446 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
18447 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
18448 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
18449 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
18450 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18451 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18452 // CHECK17-NEXT:    [[I4:%.*]] = alloca i32, align 4
18453 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
18454 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
18455 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
18456 // CHECK17-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
18457 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
18458 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
18459 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
18460 // CHECK17-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
18461 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
18462 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
18463 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
18464 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
18465 // CHECK17-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
18466 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18467 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
18468 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
18469 // CHECK17-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
18470 // CHECK17-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
18471 // CHECK17-NEXT:    store i32 0, i32* [[I]], align 4
18472 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18473 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
18474 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
18475 // CHECK17:       omp.precond.then:
18476 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
18477 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
18478 // CHECK17-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
18479 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18480 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18481 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, i32* [[CONV]], align 8
18482 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18483 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
18484 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])
18485 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18486 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
18487 // CHECK17-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
18488 // CHECK17-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
18489 // CHECK17:       cond.true:
18490 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
18491 // CHECK17-NEXT:    br label [[COND_END:%.*]]
18492 // CHECK17:       cond.false:
18493 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18494 // CHECK17-NEXT:    br label [[COND_END]]
18495 // CHECK17:       cond.end:
18496 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
18497 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
18498 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
18499 // CHECK17-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
18500 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
18501 // CHECK17:       omp.inner.for.cond:
18502 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18503 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
18504 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP16]], 1
18505 // CHECK17-NEXT:    [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]]
18506 // CHECK17-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18507 // CHECK17:       omp.inner.for.body:
18508 // CHECK17-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
18509 // CHECK17-NEXT:    [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
18510 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18511 // CHECK17-NEXT:    [[TMP20:%.*]] = zext i32 [[TMP19]] to i64
18512 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32, i32* [[CONV]], align 8
18513 // CHECK17-NEXT:    [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
18514 // CHECK17-NEXT:    store i32 [[TMP21]], i32* [[CONV7]], align 4
18515 // CHECK17-NEXT:    [[TMP22:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
18516 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP22]])
18517 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
18518 // CHECK17:       omp.inner.for.inc:
18519 // CHECK17-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18520 // CHECK17-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
18521 // CHECK17-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
18522 // CHECK17-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
18523 // CHECK17-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
18524 // CHECK17-NEXT:    [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
18525 // CHECK17-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]
18526 // CHECK17-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4
18527 // CHECK17-NEXT:    [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18528 // CHECK17-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
18529 // CHECK17-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP27]], [[TMP28]]
18530 // CHECK17-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4
18531 // CHECK17-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18532 // CHECK17-NEXT:    [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
18533 // CHECK17-NEXT:    [[CMP11:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]]
18534 // CHECK17-NEXT:    br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]]
18535 // CHECK17:       cond.true12:
18536 // CHECK17-NEXT:    [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
18537 // CHECK17-NEXT:    br label [[COND_END14:%.*]]
18538 // CHECK17:       cond.false13:
18539 // CHECK17-NEXT:    [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18540 // CHECK17-NEXT:    br label [[COND_END14]]
18541 // CHECK17:       cond.end14:
18542 // CHECK17-NEXT:    [[COND15:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE12]] ], [ [[TMP32]], [[COND_FALSE13]] ]
18543 // CHECK17-NEXT:    store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4
18544 // CHECK17-NEXT:    [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
18545 // CHECK17-NEXT:    store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4
18546 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
18547 // CHECK17:       omp.inner.for.end:
18548 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
18549 // CHECK17:       omp.loop.exit:
18550 // CHECK17-NEXT:    [[TMP34:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18551 // CHECK17-NEXT:    [[TMP35:%.*]] = load i32, i32* [[TMP34]], align 4
18552 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP35]])
18553 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
18554 // CHECK17:       omp.precond.end:
18555 // CHECK17-NEXT:    ret void
18556 //
18557 //
18558 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..6
18559 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
18560 // CHECK17-NEXT:  entry:
18561 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
18562 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
18563 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
18564 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
18565 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
18566 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
18567 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
18568 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
18569 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
18570 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
18571 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
18572 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
18573 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
18574 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
18575 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
18576 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18577 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18578 // CHECK17-NEXT:    [[I6:%.*]] = alloca i32, align 4
18579 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
18580 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
18581 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
18582 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
18583 // CHECK17-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
18584 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
18585 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
18586 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
18587 // CHECK17-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
18588 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
18589 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
18590 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
18591 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
18592 // CHECK17-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
18593 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18594 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
18595 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
18596 // CHECK17-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
18597 // CHECK17-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
18598 // CHECK17-NEXT:    store i32 0, i32* [[I]], align 4
18599 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18600 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
18601 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
18602 // CHECK17:       omp.precond.then:
18603 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
18604 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
18605 // CHECK17-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
18606 // CHECK17-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
18607 // CHECK17-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
18608 // CHECK17-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
18609 // CHECK17-NEXT:    [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32
18610 // CHECK17-NEXT:    store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4
18611 // CHECK17-NEXT:    store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
18612 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18613 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18614 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18615 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
18616 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
18617 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18618 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
18619 // CHECK17-NEXT:    [[CMP7:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
18620 // CHECK17-NEXT:    br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
18621 // CHECK17:       cond.true:
18622 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
18623 // CHECK17-NEXT:    br label [[COND_END:%.*]]
18624 // CHECK17:       cond.false:
18625 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18626 // CHECK17-NEXT:    br label [[COND_END]]
18627 // CHECK17:       cond.end:
18628 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
18629 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
18630 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
18631 // CHECK17-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
18632 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
18633 // CHECK17:       omp.inner.for.cond:
18634 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18635 // CHECK17-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18636 // CHECK17-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
18637 // CHECK17-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18638 // CHECK17:       omp.inner.for.body:
18639 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18640 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
18641 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
18642 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[I6]], align 4
18643 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I6]], align 4
18644 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
18645 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
18646 // CHECK17-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
18647 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
18648 // CHECK17:       omp.body.continue:
18649 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
18650 // CHECK17:       omp.inner.for.inc:
18651 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18652 // CHECK17-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1
18653 // CHECK17-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
18654 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
18655 // CHECK17:       omp.inner.for.end:
18656 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
18657 // CHECK17:       omp.loop.exit:
18658 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18659 // CHECK17-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
18660 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
18661 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
18662 // CHECK17:       omp.precond.end:
18663 // CHECK17-NEXT:    ret void
18664 //
18665 //
18666 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163
18667 // CHECK17-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
18668 // CHECK17-NEXT:  entry:
18669 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
18670 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
18671 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
18672 // CHECK17-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
18673 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
18674 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
18675 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
18676 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
18677 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
18678 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
18679 // CHECK17-NEXT:    ret void
18680 //
18681 //
18682 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..8
18683 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
18684 // CHECK17-NEXT:  entry:
18685 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
18686 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
18687 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
18688 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
18689 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
18690 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
18691 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
18692 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
18693 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
18694 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
18695 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
18696 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
18697 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18698 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18699 // CHECK17-NEXT:    [[I3:%.*]] = alloca i32, align 4
18700 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
18701 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
18702 // CHECK17-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
18703 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
18704 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
18705 // CHECK17-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
18706 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
18707 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
18708 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
18709 // CHECK17-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
18710 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
18711 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
18712 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
18713 // CHECK17-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
18714 // CHECK17-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
18715 // CHECK17-NEXT:    store i32 0, i32* [[I]], align 4
18716 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
18717 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
18718 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
18719 // CHECK17:       omp.precond.then:
18720 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
18721 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18722 // CHECK17-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
18723 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18724 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18725 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18726 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
18727 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
18728 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18729 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18730 // CHECK17-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
18731 // CHECK17-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
18732 // CHECK17:       cond.true:
18733 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18734 // CHECK17-NEXT:    br label [[COND_END:%.*]]
18735 // CHECK17:       cond.false:
18736 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18737 // CHECK17-NEXT:    br label [[COND_END]]
18738 // CHECK17:       cond.end:
18739 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
18740 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
18741 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
18742 // CHECK17-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
18743 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
18744 // CHECK17:       omp.inner.for.cond:
18745 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18746 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18747 // CHECK17-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
18748 // CHECK17-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18749 // CHECK17:       omp.inner.for.body:
18750 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
18751 // CHECK17-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
18752 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18753 // CHECK17-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
18754 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])
18755 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
18756 // CHECK17:       omp.inner.for.inc:
18757 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18758 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
18759 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
18760 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
18761 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
18762 // CHECK17:       omp.inner.for.end:
18763 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
18764 // CHECK17:       omp.loop.exit:
18765 // CHECK17-NEXT:    [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18766 // CHECK17-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
18767 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
18768 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
18769 // CHECK17:       omp.precond.end:
18770 // CHECK17-NEXT:    ret void
18771 //
18772 //
18773 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..9
18774 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
18775 // CHECK17-NEXT:  entry:
18776 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
18777 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
18778 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
18779 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
18780 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
18781 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
18782 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
18783 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
18784 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
18785 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
18786 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
18787 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
18788 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
18789 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
18790 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18791 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18792 // CHECK17-NEXT:    [[I4:%.*]] = alloca i32, align 4
18793 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
18794 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
18795 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
18796 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
18797 // CHECK17-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
18798 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
18799 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
18800 // CHECK17-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
18801 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
18802 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
18803 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
18804 // CHECK17-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
18805 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
18806 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
18807 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
18808 // CHECK17-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
18809 // CHECK17-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
18810 // CHECK17-NEXT:    store i32 0, i32* [[I]], align 4
18811 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
18812 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
18813 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
18814 // CHECK17:       omp.precond.then:
18815 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
18816 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18817 // CHECK17-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
18818 // CHECK17-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
18819 // CHECK17-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
18820 // CHECK17-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
18821 // CHECK17-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
18822 // CHECK17-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
18823 // CHECK17-NEXT:    store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
18824 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18825 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18826 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
18827 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
18828 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18829 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
18830 // CHECK17-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1)
18831 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
18832 // CHECK17:       omp.dispatch.cond:
18833 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18834 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
18835 // CHECK17-NEXT:    [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
18836 // CHECK17-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
18837 // CHECK17-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
18838 // CHECK17:       omp.dispatch.body:
18839 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
18840 // CHECK17-NEXT:    store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
18841 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
18842 // CHECK17:       omp.inner.for.cond:
18843 // CHECK17-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
18844 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14
18845 // CHECK17-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
18846 // CHECK17-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18847 // CHECK17:       omp.inner.for.body:
18848 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
18849 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
18850 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
18851 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !14
18852 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !14
18853 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64
18854 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
18855 // CHECK17-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !14
18856 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
18857 // CHECK17:       omp.body.continue:
18858 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
18859 // CHECK17:       omp.inner.for.inc:
18860 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
18861 // CHECK17-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1
18862 // CHECK17-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
18863 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
18864 // CHECK17:       omp.inner.for.end:
18865 // CHECK17-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
18866 // CHECK17:       omp.dispatch.inc:
18867 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND]]
18868 // CHECK17:       omp.dispatch.end:
18869 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
18870 // CHECK17:       omp.precond.end:
18871 // CHECK17-NEXT:    ret void
18872 //
18873 //
18874 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168
18875 // CHECK17-SAME: (i64 [[M:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
18876 // CHECK17-NEXT:  entry:
18877 // CHECK17-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8
18878 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
18879 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
18880 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
18881 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
18882 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
18883 // CHECK17-NEXT:    store i64 [[M]], i64* [[M_ADDR]], align 8
18884 // CHECK17-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
18885 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
18886 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
18887 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
18888 // CHECK17-NEXT:    [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
18889 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
18890 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
18891 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
18892 // CHECK17-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
18893 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
18894 // CHECK17-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
18895 // CHECK17-NEXT:    store i32 [[TMP3]], i32* [[CONV2]], align 4
18896 // CHECK17-NEXT:    [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
18897 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]])
18898 // CHECK17-NEXT:    ret void
18899 //
18900 //
18901 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..11
18902 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
18903 // CHECK17-NEXT:  entry:
18904 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
18905 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
18906 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
18907 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
18908 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
18909 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
18910 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
18911 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
18912 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
18913 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
18914 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
18915 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
18916 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
18917 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
18918 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
18919 // CHECK17-NEXT:    [[I4:%.*]] = alloca i32, align 4
18920 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
18921 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
18922 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
18923 // CHECK17-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
18924 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
18925 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
18926 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
18927 // CHECK17-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
18928 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
18929 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
18930 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
18931 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
18932 // CHECK17-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
18933 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18934 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
18935 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
18936 // CHECK17-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
18937 // CHECK17-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
18938 // CHECK17-NEXT:    store i32 0, i32* [[I]], align 4
18939 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
18940 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
18941 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
18942 // CHECK17:       omp.precond.then:
18943 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
18944 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
18945 // CHECK17-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
18946 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
18947 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
18948 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18949 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
18950 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
18951 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18952 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
18953 // CHECK17-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
18954 // CHECK17-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
18955 // CHECK17:       cond.true:
18956 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
18957 // CHECK17-NEXT:    br label [[COND_END:%.*]]
18958 // CHECK17:       cond.false:
18959 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18960 // CHECK17-NEXT:    br label [[COND_END]]
18961 // CHECK17:       cond.end:
18962 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
18963 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
18964 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
18965 // CHECK17-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
18966 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
18967 // CHECK17:       omp.inner.for.cond:
18968 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18969 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18970 // CHECK17-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
18971 // CHECK17-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
18972 // CHECK17:       omp.inner.for.body:
18973 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
18974 // CHECK17-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
18975 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
18976 // CHECK17-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
18977 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32, i32* [[CONV]], align 8
18978 // CHECK17-NEXT:    [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
18979 // CHECK17-NEXT:    store i32 [[TMP20]], i32* [[CONV7]], align 4
18980 // CHECK17-NEXT:    [[TMP21:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
18981 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP21]])
18982 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
18983 // CHECK17:       omp.inner.for.inc:
18984 // CHECK17-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
18985 // CHECK17-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
18986 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
18987 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
18988 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
18989 // CHECK17:       omp.inner.for.end:
18990 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
18991 // CHECK17:       omp.loop.exit:
18992 // CHECK17-NEXT:    [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
18993 // CHECK17-NEXT:    [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4
18994 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]])
18995 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
18996 // CHECK17:       omp.precond.end:
18997 // CHECK17-NEXT:    ret void
18998 //
18999 //
19000 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..12
19001 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
19002 // CHECK17-NEXT:  entry:
19003 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
19004 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
19005 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
19006 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
19007 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
19008 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
19009 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
19010 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
19011 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
19012 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
19013 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
19014 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
19015 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
19016 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
19017 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
19018 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19019 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19020 // CHECK17-NEXT:    [[I6:%.*]] = alloca i32, align 4
19021 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
19022 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
19023 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
19024 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
19025 // CHECK17-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
19026 // CHECK17-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
19027 // CHECK17-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
19028 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
19029 // CHECK17-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
19030 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
19031 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
19032 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
19033 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
19034 // CHECK17-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
19035 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
19036 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
19037 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
19038 // CHECK17-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
19039 // CHECK17-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
19040 // CHECK17-NEXT:    store i32 0, i32* [[I]], align 4
19041 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
19042 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
19043 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
19044 // CHECK17:       omp.precond.then:
19045 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
19046 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
19047 // CHECK17-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
19048 // CHECK17-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
19049 // CHECK17-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
19050 // CHECK17-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
19051 // CHECK17-NEXT:    [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32
19052 // CHECK17-NEXT:    store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4
19053 // CHECK17-NEXT:    store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
19054 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19055 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19056 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, i32* [[CONV]], align 8
19057 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
19058 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19059 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
19060 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
19061 // CHECK17-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]])
19062 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
19063 // CHECK17:       omp.dispatch.cond:
19064 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
19065 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
19066 // CHECK17-NEXT:    [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
19067 // CHECK17-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0
19068 // CHECK17-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
19069 // CHECK17:       omp.dispatch.body:
19070 // CHECK17-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
19071 // CHECK17-NEXT:    store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4
19072 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
19073 // CHECK17:       omp.inner.for.cond:
19074 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
19075 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !17
19076 // CHECK17-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
19077 // CHECK17-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19078 // CHECK17:       omp.inner.for.body:
19079 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
19080 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
19081 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
19082 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !17
19083 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !17
19084 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64
19085 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
19086 // CHECK17-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !17
19087 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
19088 // CHECK17:       omp.body.continue:
19089 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
19090 // CHECK17:       omp.inner.for.inc:
19091 // CHECK17-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
19092 // CHECK17-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP22]], 1
19093 // CHECK17-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
19094 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
19095 // CHECK17:       omp.inner.for.end:
19096 // CHECK17-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
19097 // CHECK17:       omp.dispatch.inc:
19098 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND]]
19099 // CHECK17:       omp.dispatch.end:
19100 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
19101 // CHECK17:       omp.precond.end:
19102 // CHECK17-NEXT:    ret void
19103 //
19104 //
19105 // CHECK17-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
19106 // CHECK17-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
19107 // CHECK17-NEXT:  entry:
19108 // CHECK17-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
19109 // CHECK17-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
19110 // CHECK17-NEXT:    [[M:%.*]] = alloca i32, align 4
19111 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
19112 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
19113 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
19114 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
19115 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8
19116 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8
19117 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8
19118 // CHECK17-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
19119 // CHECK17-NEXT:    [[M_CASTED:%.*]] = alloca i64, align 8
19120 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 8
19121 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 8
19122 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 8
19123 // CHECK17-NEXT:    [[_TMP10:%.*]] = alloca i32, align 4
19124 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 8
19125 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 8
19126 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 8
19127 // CHECK17-NEXT:    [[_TMP16:%.*]] = alloca i32, align 4
19128 // CHECK17-NEXT:    [[M_CASTED19:%.*]] = alloca i64, align 8
19129 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [2 x i8*], align 8
19130 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS22:%.*]] = alloca [2 x i8*], align 8
19131 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [2 x i8*], align 8
19132 // CHECK17-NEXT:    [[_TMP24:%.*]] = alloca i32, align 4
19133 // CHECK17-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
19134 // CHECK17-NEXT:    store i32 10, i32* [[M]], align 4
19135 // CHECK17-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
19136 // CHECK17-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
19137 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8
19138 // CHECK17-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
19139 // CHECK17-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
19140 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8
19141 // CHECK17-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
19142 // CHECK17-NEXT:    store i8* null, i8** [[TMP4]], align 8
19143 // CHECK17-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
19144 // CHECK17-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
19145 // CHECK17-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
19146 // CHECK17-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
19147 // CHECK17-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
19148 // CHECK17-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
19149 // CHECK17:       omp_offload.failed:
19150 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]]
19151 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT]]
19152 // CHECK17:       omp_offload.cont:
19153 // CHECK17-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
19154 // CHECK17-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
19155 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8
19156 // CHECK17-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
19157 // CHECK17-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
19158 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8
19159 // CHECK17-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0
19160 // CHECK17-NEXT:    store i8* null, i8** [[TMP13]], align 8
19161 // CHECK17-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
19162 // CHECK17-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
19163 // CHECK17-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
19164 // CHECK17-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
19165 // CHECK17-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
19166 // CHECK17-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
19167 // CHECK17:       omp_offload.failed5:
19168 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121([10 x i32]* [[A]]) #[[ATTR3]]
19169 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT6]]
19170 // CHECK17:       omp_offload.cont6:
19171 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, i32* [[M]], align 4
19172 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[M_CASTED]] to i32*
19173 // CHECK17-NEXT:    store i32 [[TMP18]], i32* [[CONV]], align 4
19174 // CHECK17-NEXT:    [[TMP19:%.*]] = load i64, i64* [[M_CASTED]], align 8
19175 // CHECK17-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
19176 // CHECK17-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64*
19177 // CHECK17-NEXT:    store i64 [[TMP19]], i64* [[TMP21]], align 8
19178 // CHECK17-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
19179 // CHECK17-NEXT:    [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64*
19180 // CHECK17-NEXT:    store i64 [[TMP19]], i64* [[TMP23]], align 8
19181 // CHECK17-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0
19182 // CHECK17-NEXT:    store i8* null, i8** [[TMP24]], align 8
19183 // CHECK17-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1
19184 // CHECK17-NEXT:    [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]**
19185 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 8
19186 // CHECK17-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1
19187 // CHECK17-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]**
19188 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 8
19189 // CHECK17-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 1
19190 // CHECK17-NEXT:    store i8* null, i8** [[TMP29]], align 8
19191 // CHECK17-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
19192 // CHECK17-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
19193 // CHECK17-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
19194 // CHECK17-NEXT:    [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
19195 // CHECK17-NEXT:    [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
19196 // CHECK17-NEXT:    br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
19197 // CHECK17:       omp_offload.failed11:
19198 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i64 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]]
19199 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT12]]
19200 // CHECK17:       omp_offload.cont12:
19201 // CHECK17-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
19202 // CHECK17-NEXT:    [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]**
19203 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 8
19204 // CHECK17-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
19205 // CHECK17-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]**
19206 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 8
19207 // CHECK17-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i64 0, i64 0
19208 // CHECK17-NEXT:    store i8* null, i8** [[TMP38]], align 8
19209 // CHECK17-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
19210 // CHECK17-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
19211 // CHECK17-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
19212 // CHECK17-NEXT:    [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
19213 // CHECK17-NEXT:    [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0
19214 // CHECK17-NEXT:    br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
19215 // CHECK17:       omp_offload.failed17:
19216 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131([10 x i32]* [[A]]) #[[ATTR3]]
19217 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT18]]
19218 // CHECK17:       omp_offload.cont18:
19219 // CHECK17-NEXT:    [[TMP43:%.*]] = load i32, i32* [[M]], align 4
19220 // CHECK17-NEXT:    [[CONV20:%.*]] = bitcast i64* [[M_CASTED19]] to i32*
19221 // CHECK17-NEXT:    store i32 [[TMP43]], i32* [[CONV20]], align 4
19222 // CHECK17-NEXT:    [[TMP44:%.*]] = load i64, i64* [[M_CASTED19]], align 8
19223 // CHECK17-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
19224 // CHECK17-NEXT:    [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64*
19225 // CHECK17-NEXT:    store i64 [[TMP44]], i64* [[TMP46]], align 8
19226 // CHECK17-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
19227 // CHECK17-NEXT:    [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64*
19228 // CHECK17-NEXT:    store i64 [[TMP44]], i64* [[TMP48]], align 8
19229 // CHECK17-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0
19230 // CHECK17-NEXT:    store i8* null, i8** [[TMP49]], align 8
19231 // CHECK17-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1
19232 // CHECK17-NEXT:    [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]**
19233 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 8
19234 // CHECK17-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1
19235 // CHECK17-NEXT:    [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]**
19236 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 8
19237 // CHECK17-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1
19238 // CHECK17-NEXT:    store i8* null, i8** [[TMP54]], align 8
19239 // CHECK17-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
19240 // CHECK17-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
19241 // CHECK17-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
19242 // CHECK17-NEXT:    [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
19243 // CHECK17-NEXT:    [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0
19244 // CHECK17-NEXT:    br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED25:%.*]], label [[OMP_OFFLOAD_CONT26:%.*]]
19245 // CHECK17:       omp_offload.failed25:
19246 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i64 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]]
19247 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT26]]
19248 // CHECK17:       omp_offload.cont26:
19249 // CHECK17-NEXT:    ret i32 0
19250 //
19251 //
19252 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
19253 // CHECK17-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
19254 // CHECK17-NEXT:  entry:
19255 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19256 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19257 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19258 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
19259 // CHECK17-NEXT:    ret void
19260 //
19261 //
19262 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..14
19263 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
19264 // CHECK17-NEXT:  entry:
19265 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
19266 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
19267 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19268 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
19269 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
19270 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
19271 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
19272 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19273 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19274 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
19275 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
19276 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
19277 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19278 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19279 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
19280 // CHECK17-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
19281 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19282 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19283 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
19284 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
19285 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
19286 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19287 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
19288 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
19289 // CHECK17:       cond.true:
19290 // CHECK17-NEXT:    br label [[COND_END:%.*]]
19291 // CHECK17:       cond.false:
19292 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19293 // CHECK17-NEXT:    br label [[COND_END]]
19294 // CHECK17:       cond.end:
19295 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
19296 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
19297 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
19298 // CHECK17-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
19299 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
19300 // CHECK17:       omp.inner.for.cond:
19301 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19302 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19303 // CHECK17-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
19304 // CHECK17-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19305 // CHECK17:       omp.inner.for.body:
19306 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
19307 // CHECK17-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
19308 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19309 // CHECK17-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
19310 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
19311 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
19312 // CHECK17:       omp.inner.for.inc:
19313 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19314 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
19315 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
19316 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
19317 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
19318 // CHECK17:       omp.inner.for.end:
19319 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
19320 // CHECK17:       omp.loop.exit:
19321 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
19322 // CHECK17-NEXT:    ret void
19323 //
19324 //
19325 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..15
19326 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
19327 // CHECK17-NEXT:  entry:
19328 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
19329 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
19330 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
19331 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
19332 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19333 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
19334 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
19335 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
19336 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
19337 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19338 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19339 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
19340 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
19341 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
19342 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
19343 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
19344 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19345 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19346 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
19347 // CHECK17-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
19348 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
19349 // CHECK17-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
19350 // CHECK17-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
19351 // CHECK17-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
19352 // CHECK17-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
19353 // CHECK17-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
19354 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19355 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19356 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
19357 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
19358 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
19359 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19360 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
19361 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
19362 // CHECK17:       cond.true:
19363 // CHECK17-NEXT:    br label [[COND_END:%.*]]
19364 // CHECK17:       cond.false:
19365 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19366 // CHECK17-NEXT:    br label [[COND_END]]
19367 // CHECK17:       cond.end:
19368 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
19369 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
19370 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
19371 // CHECK17-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
19372 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
19373 // CHECK17:       omp.inner.for.cond:
19374 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19375 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19376 // CHECK17-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
19377 // CHECK17-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19378 // CHECK17:       omp.inner.for.body:
19379 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19380 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
19381 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
19382 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
19383 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
19384 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
19385 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
19386 // CHECK17-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
19387 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
19388 // CHECK17:       omp.body.continue:
19389 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
19390 // CHECK17:       omp.inner.for.inc:
19391 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19392 // CHECK17-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
19393 // CHECK17-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
19394 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
19395 // CHECK17:       omp.inner.for.end:
19396 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
19397 // CHECK17:       omp.loop.exit:
19398 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
19399 // CHECK17-NEXT:    ret void
19400 //
19401 //
19402 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121
19403 // CHECK17-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
19404 // CHECK17-NEXT:  entry:
19405 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19406 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19407 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19408 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
19409 // CHECK17-NEXT:    ret void
19410 //
19411 //
19412 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..17
19413 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
19414 // CHECK17-NEXT:  entry:
19415 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
19416 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
19417 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19418 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
19419 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
19420 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
19421 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
19422 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19423 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19424 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
19425 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
19426 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
19427 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19428 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19429 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
19430 // CHECK17-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
19431 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19432 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19433 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
19434 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
19435 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
19436 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19437 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
19438 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
19439 // CHECK17:       cond.true:
19440 // CHECK17-NEXT:    br label [[COND_END:%.*]]
19441 // CHECK17:       cond.false:
19442 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19443 // CHECK17-NEXT:    br label [[COND_END]]
19444 // CHECK17:       cond.end:
19445 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
19446 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
19447 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
19448 // CHECK17-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
19449 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
19450 // CHECK17:       omp.inner.for.cond:
19451 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19452 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19453 // CHECK17-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
19454 // CHECK17-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19455 // CHECK17:       omp.inner.for.body:
19456 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
19457 // CHECK17-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
19458 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19459 // CHECK17-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
19460 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
19461 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
19462 // CHECK17:       omp.inner.for.inc:
19463 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19464 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
19465 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
19466 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
19467 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
19468 // CHECK17:       omp.inner.for.end:
19469 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
19470 // CHECK17:       omp.loop.exit:
19471 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
19472 // CHECK17-NEXT:    ret void
19473 //
19474 //
19475 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..18
19476 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
19477 // CHECK17-NEXT:  entry:
19478 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
19479 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
19480 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
19481 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
19482 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19483 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
19484 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
19485 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
19486 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
19487 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19488 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19489 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
19490 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
19491 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
19492 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
19493 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
19494 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19495 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19496 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
19497 // CHECK17-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
19498 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
19499 // CHECK17-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
19500 // CHECK17-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
19501 // CHECK17-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
19502 // CHECK17-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
19503 // CHECK17-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
19504 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19505 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19506 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
19507 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
19508 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
19509 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19510 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
19511 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
19512 // CHECK17:       cond.true:
19513 // CHECK17-NEXT:    br label [[COND_END:%.*]]
19514 // CHECK17:       cond.false:
19515 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19516 // CHECK17-NEXT:    br label [[COND_END]]
19517 // CHECK17:       cond.end:
19518 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
19519 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
19520 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
19521 // CHECK17-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
19522 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
19523 // CHECK17:       omp.inner.for.cond:
19524 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19525 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19526 // CHECK17-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
19527 // CHECK17-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19528 // CHECK17:       omp.inner.for.body:
19529 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19530 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
19531 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
19532 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
19533 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
19534 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
19535 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
19536 // CHECK17-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
19537 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
19538 // CHECK17:       omp.body.continue:
19539 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
19540 // CHECK17:       omp.inner.for.inc:
19541 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19542 // CHECK17-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
19543 // CHECK17-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
19544 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
19545 // CHECK17:       omp.inner.for.end:
19546 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
19547 // CHECK17:       omp.loop.exit:
19548 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
19549 // CHECK17-NEXT:    ret void
19550 //
19551 //
19552 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126
19553 // CHECK17-SAME: (i64 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
19554 // CHECK17-NEXT:  entry:
19555 // CHECK17-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8
19556 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19557 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
19558 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
19559 // CHECK17-NEXT:    store i64 [[M]], i64* [[M_ADDR]], align 8
19560 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19561 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
19562 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19563 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
19564 // CHECK17-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
19565 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
19566 // CHECK17-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
19567 // CHECK17-NEXT:    store i32 [[TMP2]], i32* [[CONV1]], align 4
19568 // CHECK17-NEXT:    [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
19569 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]])
19570 // CHECK17-NEXT:    ret void
19571 //
19572 //
19573 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..21
19574 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
19575 // CHECK17-NEXT:  entry:
19576 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
19577 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
19578 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19579 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
19580 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
19581 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
19582 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
19583 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
19584 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19585 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19586 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
19587 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
19588 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
19589 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
19590 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19591 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
19592 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19593 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
19594 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
19595 // CHECK17-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
19596 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19597 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19598 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
19599 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
19600 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
19601 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19602 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
19603 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
19604 // CHECK17:       cond.true:
19605 // CHECK17-NEXT:    br label [[COND_END:%.*]]
19606 // CHECK17:       cond.false:
19607 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19608 // CHECK17-NEXT:    br label [[COND_END]]
19609 // CHECK17:       cond.end:
19610 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
19611 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
19612 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
19613 // CHECK17-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
19614 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
19615 // CHECK17:       omp.inner.for.cond:
19616 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19617 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19618 // CHECK17-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
19619 // CHECK17-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19620 // CHECK17:       omp.inner.for.body:
19621 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
19622 // CHECK17-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
19623 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19624 // CHECK17-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
19625 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8
19626 // CHECK17-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
19627 // CHECK17-NEXT:    store i32 [[TMP12]], i32* [[CONV2]], align 4
19628 // CHECK17-NEXT:    [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
19629 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]])
19630 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
19631 // CHECK17:       omp.inner.for.inc:
19632 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19633 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
19634 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
19635 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
19636 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
19637 // CHECK17:       omp.inner.for.end:
19638 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
19639 // CHECK17:       omp.loop.exit:
19640 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
19641 // CHECK17-NEXT:    ret void
19642 //
19643 //
19644 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..22
19645 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
19646 // CHECK17-NEXT:  entry:
19647 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
19648 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
19649 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
19650 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
19651 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19652 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
19653 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
19654 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
19655 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
19656 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
19657 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19658 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19659 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
19660 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
19661 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
19662 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
19663 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
19664 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19665 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
19666 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19667 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
19668 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
19669 // CHECK17-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
19670 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
19671 // CHECK17-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
19672 // CHECK17-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
19673 // CHECK17-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
19674 // CHECK17-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
19675 // CHECK17-NEXT:    store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
19676 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19677 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19678 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
19679 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
19680 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
19681 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
19682 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
19683 // CHECK17:       omp.dispatch.cond:
19684 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19685 // CHECK17-NEXT:    [[CONV3:%.*]] = sext i32 [[TMP6]] to i64
19686 // CHECK17-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
19687 // CHECK17-NEXT:    [[CMP:%.*]] = icmp ugt i64 [[CONV3]], [[TMP7]]
19688 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
19689 // CHECK17:       cond.true:
19690 // CHECK17-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
19691 // CHECK17-NEXT:    br label [[COND_END:%.*]]
19692 // CHECK17:       cond.false:
19693 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19694 // CHECK17-NEXT:    [[CONV4:%.*]] = sext i32 [[TMP9]] to i64
19695 // CHECK17-NEXT:    br label [[COND_END]]
19696 // CHECK17:       cond.end:
19697 // CHECK17-NEXT:    [[COND:%.*]] = phi i64 [ [[TMP8]], [[COND_TRUE]] ], [ [[CONV4]], [[COND_FALSE]] ]
19698 // CHECK17-NEXT:    [[CONV5:%.*]] = trunc i64 [[COND]] to i32
19699 // CHECK17-NEXT:    store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
19700 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
19701 // CHECK17-NEXT:    store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
19702 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19703 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19704 // CHECK17-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
19705 // CHECK17-NEXT:    br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
19706 // CHECK17:       omp.dispatch.body:
19707 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
19708 // CHECK17:       omp.inner.for.cond:
19709 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19710 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19711 // CHECK17-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
19712 // CHECK17-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19713 // CHECK17:       omp.inner.for.body:
19714 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19715 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
19716 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
19717 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
19718 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I]], align 4
19719 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
19720 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
19721 // CHECK17-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
19722 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
19723 // CHECK17:       omp.body.continue:
19724 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
19725 // CHECK17:       omp.inner.for.inc:
19726 // CHECK17-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19727 // CHECK17-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP17]], 1
19728 // CHECK17-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
19729 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
19730 // CHECK17:       omp.inner.for.end:
19731 // CHECK17-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
19732 // CHECK17:       omp.dispatch.inc:
19733 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
19734 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
19735 // CHECK17-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
19736 // CHECK17-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4
19737 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19738 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
19739 // CHECK17-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
19740 // CHECK17-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4
19741 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND]]
19742 // CHECK17:       omp.dispatch.end:
19743 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
19744 // CHECK17-NEXT:    ret void
19745 //
19746 //
19747 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131
19748 // CHECK17-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
19749 // CHECK17-NEXT:  entry:
19750 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19751 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19752 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19753 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
19754 // CHECK17-NEXT:    ret void
19755 //
19756 //
19757 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..25
19758 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
19759 // CHECK17-NEXT:  entry:
19760 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
19761 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
19762 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19763 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
19764 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
19765 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
19766 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
19767 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19768 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19769 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
19770 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
19771 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
19772 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19773 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19774 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
19775 // CHECK17-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
19776 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19777 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19778 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
19779 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
19780 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
19781 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19782 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
19783 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
19784 // CHECK17:       cond.true:
19785 // CHECK17-NEXT:    br label [[COND_END:%.*]]
19786 // CHECK17:       cond.false:
19787 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19788 // CHECK17-NEXT:    br label [[COND_END]]
19789 // CHECK17:       cond.end:
19790 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
19791 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
19792 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
19793 // CHECK17-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
19794 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
19795 // CHECK17:       omp.inner.for.cond:
19796 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19797 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19798 // CHECK17-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
19799 // CHECK17-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19800 // CHECK17:       omp.inner.for.body:
19801 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
19802 // CHECK17-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
19803 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19804 // CHECK17-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
19805 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
19806 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
19807 // CHECK17:       omp.inner.for.inc:
19808 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19809 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
19810 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
19811 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
19812 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
19813 // CHECK17:       omp.inner.for.end:
19814 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
19815 // CHECK17:       omp.loop.exit:
19816 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
19817 // CHECK17-NEXT:    ret void
19818 //
19819 //
19820 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..26
19821 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
19822 // CHECK17-NEXT:  entry:
19823 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
19824 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
19825 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
19826 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
19827 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19828 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
19829 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
19830 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
19831 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
19832 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19833 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19834 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
19835 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
19836 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
19837 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
19838 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
19839 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19840 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19841 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
19842 // CHECK17-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
19843 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
19844 // CHECK17-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
19845 // CHECK17-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
19846 // CHECK17-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
19847 // CHECK17-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
19848 // CHECK17-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
19849 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19850 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19851 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
19852 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
19853 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
19854 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
19855 // CHECK17-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
19856 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
19857 // CHECK17:       omp.dispatch.cond:
19858 // CHECK17-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
19859 // CHECK17-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
19860 // CHECK17-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
19861 // CHECK17:       omp.dispatch.body:
19862 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
19863 // CHECK17-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
19864 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
19865 // CHECK17:       omp.inner.for.cond:
19866 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20
19867 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !20
19868 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
19869 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19870 // CHECK17:       omp.inner.for.body:
19871 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20
19872 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
19873 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
19874 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !20
19875 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !20
19876 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
19877 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
19878 // CHECK17-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !20
19879 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
19880 // CHECK17:       omp.body.continue:
19881 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
19882 // CHECK17:       omp.inner.for.inc:
19883 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20
19884 // CHECK17-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
19885 // CHECK17-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20
19886 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]
19887 // CHECK17:       omp.inner.for.end:
19888 // CHECK17-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
19889 // CHECK17:       omp.dispatch.inc:
19890 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND]]
19891 // CHECK17:       omp.dispatch.end:
19892 // CHECK17-NEXT:    ret void
19893 //
19894 //
19895 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136
19896 // CHECK17-SAME: (i64 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
19897 // CHECK17-NEXT:  entry:
19898 // CHECK17-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8
19899 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19900 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
19901 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
19902 // CHECK17-NEXT:    store i64 [[M]], i64* [[M_ADDR]], align 8
19903 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19904 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
19905 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19906 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
19907 // CHECK17-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
19908 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
19909 // CHECK17-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
19910 // CHECK17-NEXT:    store i32 [[TMP2]], i32* [[CONV1]], align 4
19911 // CHECK17-NEXT:    [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
19912 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]])
19913 // CHECK17-NEXT:    ret void
19914 //
19915 //
19916 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..29
19917 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
19918 // CHECK17-NEXT:  entry:
19919 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
19920 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
19921 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19922 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
19923 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
19924 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
19925 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
19926 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
19927 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
19928 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
19929 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
19930 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
19931 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
19932 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
19933 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
19934 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
19935 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
19936 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
19937 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
19938 // CHECK17-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
19939 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
19940 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
19941 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
19942 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
19943 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
19944 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19945 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
19946 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
19947 // CHECK17:       cond.true:
19948 // CHECK17-NEXT:    br label [[COND_END:%.*]]
19949 // CHECK17:       cond.false:
19950 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19951 // CHECK17-NEXT:    br label [[COND_END]]
19952 // CHECK17:       cond.end:
19953 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
19954 // CHECK17-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
19955 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
19956 // CHECK17-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
19957 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
19958 // CHECK17:       omp.inner.for.cond:
19959 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19960 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19961 // CHECK17-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
19962 // CHECK17-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
19963 // CHECK17:       omp.inner.for.body:
19964 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
19965 // CHECK17-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
19966 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
19967 // CHECK17-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
19968 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8
19969 // CHECK17-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
19970 // CHECK17-NEXT:    store i32 [[TMP12]], i32* [[CONV2]], align 4
19971 // CHECK17-NEXT:    [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
19972 // CHECK17-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]])
19973 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
19974 // CHECK17:       omp.inner.for.inc:
19975 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
19976 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
19977 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
19978 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
19979 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
19980 // CHECK17:       omp.inner.for.end:
19981 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
19982 // CHECK17:       omp.loop.exit:
19983 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
19984 // CHECK17-NEXT:    ret void
19985 //
19986 //
19987 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..30
19988 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
19989 // CHECK17-NEXT:  entry:
19990 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
19991 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
19992 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
19993 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
19994 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
19995 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
19996 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
19997 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
19998 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
19999 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
20000 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20001 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20002 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
20003 // CHECK17-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
20004 // CHECK17-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
20005 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
20006 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
20007 // CHECK17-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
20008 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
20009 // CHECK17-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
20010 // CHECK17-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
20011 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
20012 // CHECK17-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
20013 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
20014 // CHECK17-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
20015 // CHECK17-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
20016 // CHECK17-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
20017 // CHECK17-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
20018 // CHECK17-NEXT:    store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
20019 // CHECK17-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
20020 // CHECK17-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
20021 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
20022 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
20023 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20024 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20025 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
20026 // CHECK17-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
20027 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
20028 // CHECK17:       omp.dispatch.cond:
20029 // CHECK17-NEXT:    [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
20030 // CHECK17-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
20031 // CHECK17-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
20032 // CHECK17:       omp.dispatch.body:
20033 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
20034 // CHECK17-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
20035 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
20036 // CHECK17:       omp.inner.for.cond:
20037 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
20038 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !23
20039 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
20040 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20041 // CHECK17:       omp.inner.for.body:
20042 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
20043 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
20044 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
20045 // CHECK17-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !23
20046 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !23
20047 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
20048 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
20049 // CHECK17-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !23
20050 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
20051 // CHECK17:       omp.body.continue:
20052 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
20053 // CHECK17:       omp.inner.for.inc:
20054 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
20055 // CHECK17-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1
20056 // CHECK17-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
20057 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
20058 // CHECK17:       omp.inner.for.end:
20059 // CHECK17-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
20060 // CHECK17:       omp.dispatch.inc:
20061 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND]]
20062 // CHECK17:       omp.dispatch.end:
20063 // CHECK17-NEXT:    ret void
20064 //
20065 //
20066 // CHECK17-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
20067 // CHECK17-SAME: () #[[ATTR5:[0-9]+]] {
20068 // CHECK17-NEXT:  entry:
20069 // CHECK17-NEXT:    call void @__tgt_register_requires(i64 1)
20070 // CHECK17-NEXT:    ret void
20071 //
20072 //
20073 // CHECK18-LABEL: define {{[^@]+}}@main
20074 // CHECK18-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
20075 // CHECK18-NEXT:  entry:
20076 // CHECK18-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
20077 // CHECK18-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
20078 // CHECK18-NEXT:    [[ARGV_ADDR:%.*]] = alloca i8**, align 8
20079 // CHECK18-NEXT:    [[N:%.*]] = alloca i32, align 4
20080 // CHECK18-NEXT:    [[SAVED_STACK:%.*]] = alloca i8*, align 8
20081 // CHECK18-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i64, align 8
20082 // CHECK18-NEXT:    [[M:%.*]] = alloca i32, align 4
20083 // CHECK18-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
20084 // CHECK18-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8
20085 // CHECK18-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8
20086 // CHECK18-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8
20087 // CHECK18-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
20088 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
20089 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
20090 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
20091 // CHECK18-NEXT:    [[N_CASTED3:%.*]] = alloca i64, align 8
20092 // CHECK18-NEXT:    [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8
20093 // CHECK18-NEXT:    [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8
20094 // CHECK18-NEXT:    [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8
20095 // CHECK18-NEXT:    [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8
20096 // CHECK18-NEXT:    [[_TMP9:%.*]] = alloca i32, align 4
20097 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
20098 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
20099 // CHECK18-NEXT:    [[M_CASTED:%.*]] = alloca i64, align 8
20100 // CHECK18-NEXT:    [[N_CASTED19:%.*]] = alloca i64, align 8
20101 // CHECK18-NEXT:    [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [4 x i8*], align 8
20102 // CHECK18-NEXT:    [[DOTOFFLOAD_PTRS22:%.*]] = alloca [4 x i8*], align 8
20103 // CHECK18-NEXT:    [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [4 x i8*], align 8
20104 // CHECK18-NEXT:    [[DOTOFFLOAD_SIZES24:%.*]] = alloca [4 x i64], align 8
20105 // CHECK18-NEXT:    [[_TMP25:%.*]] = alloca i32, align 4
20106 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4
20107 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4
20108 // CHECK18-NEXT:    [[N_CASTED34:%.*]] = alloca i64, align 8
20109 // CHECK18-NEXT:    [[DOTOFFLOAD_BASEPTRS36:%.*]] = alloca [3 x i8*], align 8
20110 // CHECK18-NEXT:    [[DOTOFFLOAD_PTRS37:%.*]] = alloca [3 x i8*], align 8
20111 // CHECK18-NEXT:    [[DOTOFFLOAD_MAPPERS38:%.*]] = alloca [3 x i8*], align 8
20112 // CHECK18-NEXT:    [[DOTOFFLOAD_SIZES39:%.*]] = alloca [3 x i64], align 8
20113 // CHECK18-NEXT:    [[_TMP40:%.*]] = alloca i32, align 4
20114 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4
20115 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4
20116 // CHECK18-NEXT:    [[M_CASTED49:%.*]] = alloca i64, align 8
20117 // CHECK18-NEXT:    [[N_CASTED51:%.*]] = alloca i64, align 8
20118 // CHECK18-NEXT:    [[DOTOFFLOAD_BASEPTRS53:%.*]] = alloca [4 x i8*], align 8
20119 // CHECK18-NEXT:    [[DOTOFFLOAD_PTRS54:%.*]] = alloca [4 x i8*], align 8
20120 // CHECK18-NEXT:    [[DOTOFFLOAD_MAPPERS55:%.*]] = alloca [4 x i8*], align 8
20121 // CHECK18-NEXT:    [[DOTOFFLOAD_SIZES56:%.*]] = alloca [4 x i64], align 8
20122 // CHECK18-NEXT:    [[_TMP57:%.*]] = alloca i32, align 4
20123 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4
20124 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_59:%.*]] = alloca i32, align 4
20125 // CHECK18-NEXT:    store i32 0, i32* [[RETVAL]], align 4
20126 // CHECK18-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
20127 // CHECK18-NEXT:    store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
20128 // CHECK18-NEXT:    store i32 100, i32* [[N]], align 4
20129 // CHECK18-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N]], align 4
20130 // CHECK18-NEXT:    [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
20131 // CHECK18-NEXT:    [[TMP2:%.*]] = call i8* @llvm.stacksave()
20132 // CHECK18-NEXT:    store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
20133 // CHECK18-NEXT:    [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
20134 // CHECK18-NEXT:    store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
20135 // CHECK18-NEXT:    store i32 10, i32* [[M]], align 4
20136 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N]], align 4
20137 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32*
20138 // CHECK18-NEXT:    store i32 [[TMP3]], i32* [[CONV]], align 4
20139 // CHECK18-NEXT:    [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8
20140 // CHECK18-NEXT:    [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4
20141 // CHECK18-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
20142 // CHECK18-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64*
20143 // CHECK18-NEXT:    store i64 [[TMP4]], i64* [[TMP7]], align 8
20144 // CHECK18-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
20145 // CHECK18-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64*
20146 // CHECK18-NEXT:    store i64 [[TMP4]], i64* [[TMP9]], align 8
20147 // CHECK18-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
20148 // CHECK18-NEXT:    store i64 4, i64* [[TMP10]], align 8
20149 // CHECK18-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
20150 // CHECK18-NEXT:    store i8* null, i8** [[TMP11]], align 8
20151 // CHECK18-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
20152 // CHECK18-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64*
20153 // CHECK18-NEXT:    store i64 [[TMP1]], i64* [[TMP13]], align 8
20154 // CHECK18-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
20155 // CHECK18-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64*
20156 // CHECK18-NEXT:    store i64 [[TMP1]], i64* [[TMP15]], align 8
20157 // CHECK18-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
20158 // CHECK18-NEXT:    store i64 8, i64* [[TMP16]], align 8
20159 // CHECK18-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
20160 // CHECK18-NEXT:    store i8* null, i8** [[TMP17]], align 8
20161 // CHECK18-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
20162 // CHECK18-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
20163 // CHECK18-NEXT:    store i32* [[VLA]], i32** [[TMP19]], align 8
20164 // CHECK18-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
20165 // CHECK18-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
20166 // CHECK18-NEXT:    store i32* [[VLA]], i32** [[TMP21]], align 8
20167 // CHECK18-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
20168 // CHECK18-NEXT:    store i64 [[TMP5]], i64* [[TMP22]], align 8
20169 // CHECK18-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
20170 // CHECK18-NEXT:    store i8* null, i8** [[TMP23]], align 8
20171 // CHECK18-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
20172 // CHECK18-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
20173 // CHECK18-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
20174 // CHECK18-NEXT:    [[TMP27:%.*]] = load i32, i32* [[N]], align 4
20175 // CHECK18-NEXT:    store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
20176 // CHECK18-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20177 // CHECK18-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
20178 // CHECK18-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
20179 // CHECK18-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
20180 // CHECK18-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
20181 // CHECK18-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20182 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
20183 // CHECK18-NEXT:    [[TMP30:%.*]] = zext i32 [[ADD]] to i64
20184 // CHECK18-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]])
20185 // CHECK18-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
20186 // CHECK18-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
20187 // CHECK18-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
20188 // CHECK18:       omp_offload.failed:
20189 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
20190 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT]]
20191 // CHECK18:       omp_offload.cont:
20192 // CHECK18-NEXT:    [[TMP33:%.*]] = load i32, i32* [[N]], align 4
20193 // CHECK18-NEXT:    [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32*
20194 // CHECK18-NEXT:    store i32 [[TMP33]], i32* [[CONV4]], align 4
20195 // CHECK18-NEXT:    [[TMP34:%.*]] = load i64, i64* [[N_CASTED3]], align 8
20196 // CHECK18-NEXT:    [[TMP35:%.*]] = mul nuw i64 [[TMP1]], 4
20197 // CHECK18-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
20198 // CHECK18-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64*
20199 // CHECK18-NEXT:    store i64 [[TMP34]], i64* [[TMP37]], align 8
20200 // CHECK18-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
20201 // CHECK18-NEXT:    [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64*
20202 // CHECK18-NEXT:    store i64 [[TMP34]], i64* [[TMP39]], align 8
20203 // CHECK18-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
20204 // CHECK18-NEXT:    store i64 4, i64* [[TMP40]], align 8
20205 // CHECK18-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0
20206 // CHECK18-NEXT:    store i8* null, i8** [[TMP41]], align 8
20207 // CHECK18-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1
20208 // CHECK18-NEXT:    [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i64*
20209 // CHECK18-NEXT:    store i64 [[TMP1]], i64* [[TMP43]], align 8
20210 // CHECK18-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1
20211 // CHECK18-NEXT:    [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i64*
20212 // CHECK18-NEXT:    store i64 [[TMP1]], i64* [[TMP45]], align 8
20213 // CHECK18-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 1
20214 // CHECK18-NEXT:    store i64 8, i64* [[TMP46]], align 8
20215 // CHECK18-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1
20216 // CHECK18-NEXT:    store i8* null, i8** [[TMP47]], align 8
20217 // CHECK18-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2
20218 // CHECK18-NEXT:    [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32**
20219 // CHECK18-NEXT:    store i32* [[VLA]], i32** [[TMP49]], align 8
20220 // CHECK18-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2
20221 // CHECK18-NEXT:    [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i32**
20222 // CHECK18-NEXT:    store i32* [[VLA]], i32** [[TMP51]], align 8
20223 // CHECK18-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2
20224 // CHECK18-NEXT:    store i64 [[TMP35]], i64* [[TMP52]], align 8
20225 // CHECK18-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2
20226 // CHECK18-NEXT:    store i8* null, i8** [[TMP53]], align 8
20227 // CHECK18-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0
20228 // CHECK18-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0
20229 // CHECK18-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0
20230 // CHECK18-NEXT:    [[TMP57:%.*]] = load i32, i32* [[N]], align 4
20231 // CHECK18-NEXT:    store i32 [[TMP57]], i32* [[DOTCAPTURE_EXPR_10]], align 4
20232 // CHECK18-NEXT:    [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
20233 // CHECK18-NEXT:    [[SUB12:%.*]] = sub nsw i32 [[TMP58]], 0
20234 // CHECK18-NEXT:    [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1
20235 // CHECK18-NEXT:    [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1
20236 // CHECK18-NEXT:    store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4
20237 // CHECK18-NEXT:    [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4
20238 // CHECK18-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP59]], 1
20239 // CHECK18-NEXT:    [[TMP60:%.*]] = zext i32 [[ADD15]] to i64
20240 // CHECK18-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP60]])
20241 // CHECK18-NEXT:    [[TMP61:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, i32 3, i8** [[TMP54]], i8** [[TMP55]], i64* [[TMP56]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
20242 // CHECK18-NEXT:    [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0
20243 // CHECK18-NEXT:    br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
20244 // CHECK18:       omp_offload.failed16:
20245 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i64 [[TMP34]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
20246 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT17]]
20247 // CHECK18:       omp_offload.cont17:
20248 // CHECK18-NEXT:    [[TMP63:%.*]] = load i32, i32* [[M]], align 4
20249 // CHECK18-NEXT:    [[CONV18:%.*]] = bitcast i64* [[M_CASTED]] to i32*
20250 // CHECK18-NEXT:    store i32 [[TMP63]], i32* [[CONV18]], align 4
20251 // CHECK18-NEXT:    [[TMP64:%.*]] = load i64, i64* [[M_CASTED]], align 8
20252 // CHECK18-NEXT:    [[TMP65:%.*]] = load i32, i32* [[N]], align 4
20253 // CHECK18-NEXT:    [[CONV20:%.*]] = bitcast i64* [[N_CASTED19]] to i32*
20254 // CHECK18-NEXT:    store i32 [[TMP65]], i32* [[CONV20]], align 4
20255 // CHECK18-NEXT:    [[TMP66:%.*]] = load i64, i64* [[N_CASTED19]], align 8
20256 // CHECK18-NEXT:    [[TMP67:%.*]] = mul nuw i64 [[TMP1]], 4
20257 // CHECK18-NEXT:    [[TMP68:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
20258 // CHECK18-NEXT:    [[TMP69:%.*]] = bitcast i8** [[TMP68]] to i64*
20259 // CHECK18-NEXT:    store i64 [[TMP64]], i64* [[TMP69]], align 8
20260 // CHECK18-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
20261 // CHECK18-NEXT:    [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i64*
20262 // CHECK18-NEXT:    store i64 [[TMP64]], i64* [[TMP71]], align 8
20263 // CHECK18-NEXT:    [[TMP72:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0
20264 // CHECK18-NEXT:    store i64 4, i64* [[TMP72]], align 8
20265 // CHECK18-NEXT:    [[TMP73:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0
20266 // CHECK18-NEXT:    store i8* null, i8** [[TMP73]], align 8
20267 // CHECK18-NEXT:    [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1
20268 // CHECK18-NEXT:    [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i64*
20269 // CHECK18-NEXT:    store i64 [[TMP66]], i64* [[TMP75]], align 8
20270 // CHECK18-NEXT:    [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1
20271 // CHECK18-NEXT:    [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i64*
20272 // CHECK18-NEXT:    store i64 [[TMP66]], i64* [[TMP77]], align 8
20273 // CHECK18-NEXT:    [[TMP78:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 1
20274 // CHECK18-NEXT:    store i64 4, i64* [[TMP78]], align 8
20275 // CHECK18-NEXT:    [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1
20276 // CHECK18-NEXT:    store i8* null, i8** [[TMP79]], align 8
20277 // CHECK18-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 2
20278 // CHECK18-NEXT:    [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i64*
20279 // CHECK18-NEXT:    store i64 [[TMP1]], i64* [[TMP81]], align 8
20280 // CHECK18-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 2
20281 // CHECK18-NEXT:    [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i64*
20282 // CHECK18-NEXT:    store i64 [[TMP1]], i64* [[TMP83]], align 8
20283 // CHECK18-NEXT:    [[TMP84:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 2
20284 // CHECK18-NEXT:    store i64 8, i64* [[TMP84]], align 8
20285 // CHECK18-NEXT:    [[TMP85:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 2
20286 // CHECK18-NEXT:    store i8* null, i8** [[TMP85]], align 8
20287 // CHECK18-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 3
20288 // CHECK18-NEXT:    [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i32**
20289 // CHECK18-NEXT:    store i32* [[VLA]], i32** [[TMP87]], align 8
20290 // CHECK18-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 3
20291 // CHECK18-NEXT:    [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32**
20292 // CHECK18-NEXT:    store i32* [[VLA]], i32** [[TMP89]], align 8
20293 // CHECK18-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 3
20294 // CHECK18-NEXT:    store i64 [[TMP67]], i64* [[TMP90]], align 8
20295 // CHECK18-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 3
20296 // CHECK18-NEXT:    store i8* null, i8** [[TMP91]], align 8
20297 // CHECK18-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
20298 // CHECK18-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
20299 // CHECK18-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0
20300 // CHECK18-NEXT:    [[TMP95:%.*]] = load i32, i32* [[N]], align 4
20301 // CHECK18-NEXT:    store i32 [[TMP95]], i32* [[DOTCAPTURE_EXPR_26]], align 4
20302 // CHECK18-NEXT:    [[TMP96:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4
20303 // CHECK18-NEXT:    [[SUB28:%.*]] = sub nsw i32 [[TMP96]], 0
20304 // CHECK18-NEXT:    [[DIV29:%.*]] = sdiv i32 [[SUB28]], 1
20305 // CHECK18-NEXT:    [[SUB30:%.*]] = sub nsw i32 [[DIV29]], 1
20306 // CHECK18-NEXT:    store i32 [[SUB30]], i32* [[DOTCAPTURE_EXPR_27]], align 4
20307 // CHECK18-NEXT:    [[TMP97:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4
20308 // CHECK18-NEXT:    [[ADD31:%.*]] = add nsw i32 [[TMP97]], 1
20309 // CHECK18-NEXT:    [[TMP98:%.*]] = zext i32 [[ADD31]] to i64
20310 // CHECK18-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP98]])
20311 // CHECK18-NEXT:    [[TMP99:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, i32 4, i8** [[TMP92]], i8** [[TMP93]], i64* [[TMP94]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
20312 // CHECK18-NEXT:    [[TMP100:%.*]] = icmp ne i32 [[TMP99]], 0
20313 // CHECK18-NEXT:    br i1 [[TMP100]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
20314 // CHECK18:       omp_offload.failed32:
20315 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i64 [[TMP64]], i64 [[TMP66]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
20316 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT33]]
20317 // CHECK18:       omp_offload.cont33:
20318 // CHECK18-NEXT:    [[TMP101:%.*]] = load i32, i32* [[N]], align 4
20319 // CHECK18-NEXT:    [[CONV35:%.*]] = bitcast i64* [[N_CASTED34]] to i32*
20320 // CHECK18-NEXT:    store i32 [[TMP101]], i32* [[CONV35]], align 4
20321 // CHECK18-NEXT:    [[TMP102:%.*]] = load i64, i64* [[N_CASTED34]], align 8
20322 // CHECK18-NEXT:    [[TMP103:%.*]] = mul nuw i64 [[TMP1]], 4
20323 // CHECK18-NEXT:    [[TMP104:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0
20324 // CHECK18-NEXT:    [[TMP105:%.*]] = bitcast i8** [[TMP104]] to i64*
20325 // CHECK18-NEXT:    store i64 [[TMP102]], i64* [[TMP105]], align 8
20326 // CHECK18-NEXT:    [[TMP106:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0
20327 // CHECK18-NEXT:    [[TMP107:%.*]] = bitcast i8** [[TMP106]] to i64*
20328 // CHECK18-NEXT:    store i64 [[TMP102]], i64* [[TMP107]], align 8
20329 // CHECK18-NEXT:    [[TMP108:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0
20330 // CHECK18-NEXT:    store i64 4, i64* [[TMP108]], align 8
20331 // CHECK18-NEXT:    [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 0
20332 // CHECK18-NEXT:    store i8* null, i8** [[TMP109]], align 8
20333 // CHECK18-NEXT:    [[TMP110:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 1
20334 // CHECK18-NEXT:    [[TMP111:%.*]] = bitcast i8** [[TMP110]] to i64*
20335 // CHECK18-NEXT:    store i64 [[TMP1]], i64* [[TMP111]], align 8
20336 // CHECK18-NEXT:    [[TMP112:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 1
20337 // CHECK18-NEXT:    [[TMP113:%.*]] = bitcast i8** [[TMP112]] to i64*
20338 // CHECK18-NEXT:    store i64 [[TMP1]], i64* [[TMP113]], align 8
20339 // CHECK18-NEXT:    [[TMP114:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 1
20340 // CHECK18-NEXT:    store i64 8, i64* [[TMP114]], align 8
20341 // CHECK18-NEXT:    [[TMP115:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 1
20342 // CHECK18-NEXT:    store i8* null, i8** [[TMP115]], align 8
20343 // CHECK18-NEXT:    [[TMP116:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 2
20344 // CHECK18-NEXT:    [[TMP117:%.*]] = bitcast i8** [[TMP116]] to i32**
20345 // CHECK18-NEXT:    store i32* [[VLA]], i32** [[TMP117]], align 8
20346 // CHECK18-NEXT:    [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 2
20347 // CHECK18-NEXT:    [[TMP119:%.*]] = bitcast i8** [[TMP118]] to i32**
20348 // CHECK18-NEXT:    store i32* [[VLA]], i32** [[TMP119]], align 8
20349 // CHECK18-NEXT:    [[TMP120:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 2
20350 // CHECK18-NEXT:    store i64 [[TMP103]], i64* [[TMP120]], align 8
20351 // CHECK18-NEXT:    [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 2
20352 // CHECK18-NEXT:    store i8* null, i8** [[TMP121]], align 8
20353 // CHECK18-NEXT:    [[TMP122:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0
20354 // CHECK18-NEXT:    [[TMP123:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0
20355 // CHECK18-NEXT:    [[TMP124:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0
20356 // CHECK18-NEXT:    [[TMP125:%.*]] = load i32, i32* [[N]], align 4
20357 // CHECK18-NEXT:    store i32 [[TMP125]], i32* [[DOTCAPTURE_EXPR_41]], align 4
20358 // CHECK18-NEXT:    [[TMP126:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4
20359 // CHECK18-NEXT:    [[SUB43:%.*]] = sub nsw i32 [[TMP126]], 0
20360 // CHECK18-NEXT:    [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1
20361 // CHECK18-NEXT:    [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 1
20362 // CHECK18-NEXT:    store i32 [[SUB45]], i32* [[DOTCAPTURE_EXPR_42]], align 4
20363 // CHECK18-NEXT:    [[TMP127:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_42]], align 4
20364 // CHECK18-NEXT:    [[ADD46:%.*]] = add nsw i32 [[TMP127]], 1
20365 // CHECK18-NEXT:    [[TMP128:%.*]] = zext i32 [[ADD46]] to i64
20366 // CHECK18-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP128]])
20367 // CHECK18-NEXT:    [[TMP129:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, i32 3, i8** [[TMP122]], i8** [[TMP123]], i64* [[TMP124]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
20368 // CHECK18-NEXT:    [[TMP130:%.*]] = icmp ne i32 [[TMP129]], 0
20369 // CHECK18-NEXT:    br i1 [[TMP130]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]]
20370 // CHECK18:       omp_offload.failed47:
20371 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i64 [[TMP102]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
20372 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT48]]
20373 // CHECK18:       omp_offload.cont48:
20374 // CHECK18-NEXT:    [[TMP131:%.*]] = load i32, i32* [[M]], align 4
20375 // CHECK18-NEXT:    [[CONV50:%.*]] = bitcast i64* [[M_CASTED49]] to i32*
20376 // CHECK18-NEXT:    store i32 [[TMP131]], i32* [[CONV50]], align 4
20377 // CHECK18-NEXT:    [[TMP132:%.*]] = load i64, i64* [[M_CASTED49]], align 8
20378 // CHECK18-NEXT:    [[TMP133:%.*]] = load i32, i32* [[N]], align 4
20379 // CHECK18-NEXT:    [[CONV52:%.*]] = bitcast i64* [[N_CASTED51]] to i32*
20380 // CHECK18-NEXT:    store i32 [[TMP133]], i32* [[CONV52]], align 4
20381 // CHECK18-NEXT:    [[TMP134:%.*]] = load i64, i64* [[N_CASTED51]], align 8
20382 // CHECK18-NEXT:    [[TMP135:%.*]] = mul nuw i64 [[TMP1]], 4
20383 // CHECK18-NEXT:    [[TMP136:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0
20384 // CHECK18-NEXT:    [[TMP137:%.*]] = bitcast i8** [[TMP136]] to i64*
20385 // CHECK18-NEXT:    store i64 [[TMP132]], i64* [[TMP137]], align 8
20386 // CHECK18-NEXT:    [[TMP138:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0
20387 // CHECK18-NEXT:    [[TMP139:%.*]] = bitcast i8** [[TMP138]] to i64*
20388 // CHECK18-NEXT:    store i64 [[TMP132]], i64* [[TMP139]], align 8
20389 // CHECK18-NEXT:    [[TMP140:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0
20390 // CHECK18-NEXT:    store i64 4, i64* [[TMP140]], align 8
20391 // CHECK18-NEXT:    [[TMP141:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 0
20392 // CHECK18-NEXT:    store i8* null, i8** [[TMP141]], align 8
20393 // CHECK18-NEXT:    [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 1
20394 // CHECK18-NEXT:    [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i64*
20395 // CHECK18-NEXT:    store i64 [[TMP134]], i64* [[TMP143]], align 8
20396 // CHECK18-NEXT:    [[TMP144:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 1
20397 // CHECK18-NEXT:    [[TMP145:%.*]] = bitcast i8** [[TMP144]] to i64*
20398 // CHECK18-NEXT:    store i64 [[TMP134]], i64* [[TMP145]], align 8
20399 // CHECK18-NEXT:    [[TMP146:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 1
20400 // CHECK18-NEXT:    store i64 4, i64* [[TMP146]], align 8
20401 // CHECK18-NEXT:    [[TMP147:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 1
20402 // CHECK18-NEXT:    store i8* null, i8** [[TMP147]], align 8
20403 // CHECK18-NEXT:    [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 2
20404 // CHECK18-NEXT:    [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i64*
20405 // CHECK18-NEXT:    store i64 [[TMP1]], i64* [[TMP149]], align 8
20406 // CHECK18-NEXT:    [[TMP150:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 2
20407 // CHECK18-NEXT:    [[TMP151:%.*]] = bitcast i8** [[TMP150]] to i64*
20408 // CHECK18-NEXT:    store i64 [[TMP1]], i64* [[TMP151]], align 8
20409 // CHECK18-NEXT:    [[TMP152:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 2
20410 // CHECK18-NEXT:    store i64 8, i64* [[TMP152]], align 8
20411 // CHECK18-NEXT:    [[TMP153:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 2
20412 // CHECK18-NEXT:    store i8* null, i8** [[TMP153]], align 8
20413 // CHECK18-NEXT:    [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 3
20414 // CHECK18-NEXT:    [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32**
20415 // CHECK18-NEXT:    store i32* [[VLA]], i32** [[TMP155]], align 8
20416 // CHECK18-NEXT:    [[TMP156:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 3
20417 // CHECK18-NEXT:    [[TMP157:%.*]] = bitcast i8** [[TMP156]] to i32**
20418 // CHECK18-NEXT:    store i32* [[VLA]], i32** [[TMP157]], align 8
20419 // CHECK18-NEXT:    [[TMP158:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 3
20420 // CHECK18-NEXT:    store i64 [[TMP135]], i64* [[TMP158]], align 8
20421 // CHECK18-NEXT:    [[TMP159:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 3
20422 // CHECK18-NEXT:    store i8* null, i8** [[TMP159]], align 8
20423 // CHECK18-NEXT:    [[TMP160:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0
20424 // CHECK18-NEXT:    [[TMP161:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0
20425 // CHECK18-NEXT:    [[TMP162:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0
20426 // CHECK18-NEXT:    [[TMP163:%.*]] = load i32, i32* [[N]], align 4
20427 // CHECK18-NEXT:    store i32 [[TMP163]], i32* [[DOTCAPTURE_EXPR_58]], align 4
20428 // CHECK18-NEXT:    [[TMP164:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_58]], align 4
20429 // CHECK18-NEXT:    [[SUB60:%.*]] = sub nsw i32 [[TMP164]], 0
20430 // CHECK18-NEXT:    [[DIV61:%.*]] = sdiv i32 [[SUB60]], 1
20431 // CHECK18-NEXT:    [[SUB62:%.*]] = sub nsw i32 [[DIV61]], 1
20432 // CHECK18-NEXT:    store i32 [[SUB62]], i32* [[DOTCAPTURE_EXPR_59]], align 4
20433 // CHECK18-NEXT:    [[TMP165:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_59]], align 4
20434 // CHECK18-NEXT:    [[ADD63:%.*]] = add nsw i32 [[TMP165]], 1
20435 // CHECK18-NEXT:    [[TMP166:%.*]] = zext i32 [[ADD63]] to i64
20436 // CHECK18-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP166]])
20437 // CHECK18-NEXT:    [[TMP167:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, i32 4, i8** [[TMP160]], i8** [[TMP161]], i64* [[TMP162]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
20438 // CHECK18-NEXT:    [[TMP168:%.*]] = icmp ne i32 [[TMP167]], 0
20439 // CHECK18-NEXT:    br i1 [[TMP168]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]]
20440 // CHECK18:       omp_offload.failed64:
20441 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i64 [[TMP132]], i64 [[TMP134]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]]
20442 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT65]]
20443 // CHECK18:       omp_offload.cont65:
20444 // CHECK18-NEXT:    [[TMP169:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
20445 // CHECK18-NEXT:    [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP169]])
20446 // CHECK18-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
20447 // CHECK18-NEXT:    [[TMP170:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
20448 // CHECK18-NEXT:    call void @llvm.stackrestore(i8* [[TMP170]])
20449 // CHECK18-NEXT:    [[TMP171:%.*]] = load i32, i32* [[RETVAL]], align 4
20450 // CHECK18-NEXT:    ret i32 [[TMP171]]
20451 //
20452 //
20453 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148
20454 // CHECK18-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
20455 // CHECK18-NEXT:  entry:
20456 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
20457 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
20458 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
20459 // CHECK18-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
20460 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
20461 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
20462 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
20463 // CHECK18-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
20464 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
20465 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
20466 // CHECK18-NEXT:    ret void
20467 //
20468 //
20469 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined.
20470 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
20471 // CHECK18-NEXT:  entry:
20472 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
20473 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
20474 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
20475 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
20476 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
20477 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
20478 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
20479 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
20480 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
20481 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
20482 // CHECK18-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
20483 // CHECK18-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
20484 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20485 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20486 // CHECK18-NEXT:    [[I3:%.*]] = alloca i32, align 4
20487 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
20488 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
20489 // CHECK18-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
20490 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
20491 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
20492 // CHECK18-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
20493 // CHECK18-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
20494 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
20495 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
20496 // CHECK18-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
20497 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20498 // CHECK18-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
20499 // CHECK18-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
20500 // CHECK18-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
20501 // CHECK18-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
20502 // CHECK18-NEXT:    store i32 0, i32* [[I]], align 4
20503 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20504 // CHECK18-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
20505 // CHECK18-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
20506 // CHECK18:       omp.precond.then:
20507 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
20508 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20509 // CHECK18-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
20510 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
20511 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
20512 // CHECK18-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20513 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
20514 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
20515 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20516 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20517 // CHECK18-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
20518 // CHECK18-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
20519 // CHECK18:       cond.true:
20520 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20521 // CHECK18-NEXT:    br label [[COND_END:%.*]]
20522 // CHECK18:       cond.false:
20523 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20524 // CHECK18-NEXT:    br label [[COND_END]]
20525 // CHECK18:       cond.end:
20526 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
20527 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
20528 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
20529 // CHECK18-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
20530 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
20531 // CHECK18:       omp.inner.for.cond:
20532 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20533 // CHECK18-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20534 // CHECK18-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
20535 // CHECK18-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20536 // CHECK18:       omp.inner.for.body:
20537 // CHECK18-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
20538 // CHECK18-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
20539 // CHECK18-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20540 // CHECK18-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
20541 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])
20542 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
20543 // CHECK18:       omp.inner.for.inc:
20544 // CHECK18-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20545 // CHECK18-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
20546 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
20547 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
20548 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
20549 // CHECK18:       omp.inner.for.end:
20550 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
20551 // CHECK18:       omp.loop.exit:
20552 // CHECK18-NEXT:    [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20553 // CHECK18-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
20554 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
20555 // CHECK18-NEXT:    br label [[OMP_PRECOND_END]]
20556 // CHECK18:       omp.precond.end:
20557 // CHECK18-NEXT:    ret void
20558 //
20559 //
20560 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..1
20561 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
20562 // CHECK18-NEXT:  entry:
20563 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
20564 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
20565 // CHECK18-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
20566 // CHECK18-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
20567 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
20568 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
20569 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
20570 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
20571 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
20572 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
20573 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
20574 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
20575 // CHECK18-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
20576 // CHECK18-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
20577 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20578 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20579 // CHECK18-NEXT:    [[I4:%.*]] = alloca i32, align 4
20580 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
20581 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
20582 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
20583 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
20584 // CHECK18-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
20585 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
20586 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
20587 // CHECK18-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
20588 // CHECK18-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
20589 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
20590 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
20591 // CHECK18-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
20592 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20593 // CHECK18-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
20594 // CHECK18-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
20595 // CHECK18-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
20596 // CHECK18-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
20597 // CHECK18-NEXT:    store i32 0, i32* [[I]], align 4
20598 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20599 // CHECK18-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
20600 // CHECK18-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
20601 // CHECK18:       omp.precond.then:
20602 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
20603 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20604 // CHECK18-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
20605 // CHECK18-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
20606 // CHECK18-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
20607 // CHECK18-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
20608 // CHECK18-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
20609 // CHECK18-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
20610 // CHECK18-NEXT:    store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
20611 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
20612 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
20613 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20614 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
20615 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
20616 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20617 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20618 // CHECK18-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
20619 // CHECK18-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
20620 // CHECK18:       cond.true:
20621 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20622 // CHECK18-NEXT:    br label [[COND_END:%.*]]
20623 // CHECK18:       cond.false:
20624 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20625 // CHECK18-NEXT:    br label [[COND_END]]
20626 // CHECK18:       cond.end:
20627 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
20628 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
20629 // CHECK18-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
20630 // CHECK18-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
20631 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
20632 // CHECK18:       omp.inner.for.cond:
20633 // CHECK18-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20634 // CHECK18-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20635 // CHECK18-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
20636 // CHECK18-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20637 // CHECK18:       omp.inner.for.body:
20638 // CHECK18-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20639 // CHECK18-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
20640 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
20641 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4
20642 // CHECK18-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I4]], align 4
20643 // CHECK18-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
20644 // CHECK18-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
20645 // CHECK18-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
20646 // CHECK18-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
20647 // CHECK18:       omp.body.continue:
20648 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
20649 // CHECK18:       omp.inner.for.inc:
20650 // CHECK18-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20651 // CHECK18-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
20652 // CHECK18-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
20653 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
20654 // CHECK18:       omp.inner.for.end:
20655 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
20656 // CHECK18:       omp.loop.exit:
20657 // CHECK18-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20658 // CHECK18-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
20659 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
20660 // CHECK18-NEXT:    br label [[OMP_PRECOND_END]]
20661 // CHECK18:       omp.precond.end:
20662 // CHECK18-NEXT:    ret void
20663 //
20664 //
20665 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153
20666 // CHECK18-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
20667 // CHECK18-NEXT:  entry:
20668 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
20669 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
20670 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
20671 // CHECK18-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
20672 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
20673 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
20674 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
20675 // CHECK18-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
20676 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
20677 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
20678 // CHECK18-NEXT:    ret void
20679 //
20680 //
20681 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..2
20682 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
20683 // CHECK18-NEXT:  entry:
20684 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
20685 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
20686 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
20687 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
20688 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
20689 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
20690 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
20691 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
20692 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
20693 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
20694 // CHECK18-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
20695 // CHECK18-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
20696 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20697 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20698 // CHECK18-NEXT:    [[I3:%.*]] = alloca i32, align 4
20699 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
20700 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
20701 // CHECK18-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
20702 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
20703 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
20704 // CHECK18-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
20705 // CHECK18-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
20706 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
20707 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
20708 // CHECK18-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
20709 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20710 // CHECK18-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
20711 // CHECK18-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
20712 // CHECK18-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
20713 // CHECK18-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
20714 // CHECK18-NEXT:    store i32 0, i32* [[I]], align 4
20715 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20716 // CHECK18-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
20717 // CHECK18-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
20718 // CHECK18:       omp.precond.then:
20719 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
20720 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20721 // CHECK18-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
20722 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
20723 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
20724 // CHECK18-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20725 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
20726 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
20727 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20728 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20729 // CHECK18-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
20730 // CHECK18-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
20731 // CHECK18:       cond.true:
20732 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20733 // CHECK18-NEXT:    br label [[COND_END:%.*]]
20734 // CHECK18:       cond.false:
20735 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20736 // CHECK18-NEXT:    br label [[COND_END]]
20737 // CHECK18:       cond.end:
20738 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
20739 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
20740 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
20741 // CHECK18-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
20742 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
20743 // CHECK18:       omp.inner.for.cond:
20744 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20745 // CHECK18-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20746 // CHECK18-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
20747 // CHECK18-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20748 // CHECK18:       omp.inner.for.body:
20749 // CHECK18-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
20750 // CHECK18-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
20751 // CHECK18-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20752 // CHECK18-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
20753 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])
20754 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
20755 // CHECK18:       omp.inner.for.inc:
20756 // CHECK18-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20757 // CHECK18-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
20758 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
20759 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
20760 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
20761 // CHECK18:       omp.inner.for.end:
20762 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
20763 // CHECK18:       omp.loop.exit:
20764 // CHECK18-NEXT:    [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20765 // CHECK18-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
20766 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
20767 // CHECK18-NEXT:    br label [[OMP_PRECOND_END]]
20768 // CHECK18:       omp.precond.end:
20769 // CHECK18-NEXT:    ret void
20770 //
20771 //
20772 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..3
20773 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
20774 // CHECK18-NEXT:  entry:
20775 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
20776 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
20777 // CHECK18-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
20778 // CHECK18-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
20779 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
20780 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
20781 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
20782 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
20783 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
20784 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
20785 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
20786 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
20787 // CHECK18-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
20788 // CHECK18-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
20789 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20790 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20791 // CHECK18-NEXT:    [[I4:%.*]] = alloca i32, align 4
20792 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
20793 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
20794 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
20795 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
20796 // CHECK18-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
20797 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
20798 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
20799 // CHECK18-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
20800 // CHECK18-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
20801 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
20802 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
20803 // CHECK18-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
20804 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20805 // CHECK18-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
20806 // CHECK18-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
20807 // CHECK18-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
20808 // CHECK18-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
20809 // CHECK18-NEXT:    store i32 0, i32* [[I]], align 4
20810 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20811 // CHECK18-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
20812 // CHECK18-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
20813 // CHECK18:       omp.precond.then:
20814 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
20815 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20816 // CHECK18-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
20817 // CHECK18-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
20818 // CHECK18-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
20819 // CHECK18-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
20820 // CHECK18-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
20821 // CHECK18-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
20822 // CHECK18-NEXT:    store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
20823 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
20824 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
20825 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20826 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
20827 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
20828 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20829 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20830 // CHECK18-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
20831 // CHECK18-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
20832 // CHECK18:       cond.true:
20833 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20834 // CHECK18-NEXT:    br label [[COND_END:%.*]]
20835 // CHECK18:       cond.false:
20836 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20837 // CHECK18-NEXT:    br label [[COND_END]]
20838 // CHECK18:       cond.end:
20839 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
20840 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
20841 // CHECK18-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
20842 // CHECK18-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
20843 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
20844 // CHECK18:       omp.inner.for.cond:
20845 // CHECK18-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20846 // CHECK18-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
20847 // CHECK18-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
20848 // CHECK18-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20849 // CHECK18:       omp.inner.for.body:
20850 // CHECK18-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20851 // CHECK18-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
20852 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
20853 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4
20854 // CHECK18-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I4]], align 4
20855 // CHECK18-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
20856 // CHECK18-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
20857 // CHECK18-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
20858 // CHECK18-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
20859 // CHECK18:       omp.body.continue:
20860 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
20861 // CHECK18:       omp.inner.for.inc:
20862 // CHECK18-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20863 // CHECK18-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
20864 // CHECK18-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
20865 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
20866 // CHECK18:       omp.inner.for.end:
20867 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
20868 // CHECK18:       omp.loop.exit:
20869 // CHECK18-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20870 // CHECK18-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
20871 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
20872 // CHECK18-NEXT:    br label [[OMP_PRECOND_END]]
20873 // CHECK18:       omp.precond.end:
20874 // CHECK18-NEXT:    ret void
20875 //
20876 //
20877 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158
20878 // CHECK18-SAME: (i64 [[M:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
20879 // CHECK18-NEXT:  entry:
20880 // CHECK18-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8
20881 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
20882 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
20883 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
20884 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
20885 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
20886 // CHECK18-NEXT:    store i64 [[M]], i64* [[M_ADDR]], align 8
20887 // CHECK18-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
20888 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
20889 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
20890 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
20891 // CHECK18-NEXT:    [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
20892 // CHECK18-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
20893 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
20894 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
20895 // CHECK18-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
20896 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
20897 // CHECK18-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
20898 // CHECK18-NEXT:    store i32 [[TMP3]], i32* [[CONV2]], align 4
20899 // CHECK18-NEXT:    [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
20900 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]])
20901 // CHECK18-NEXT:    ret void
20902 //
20903 //
20904 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..5
20905 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
20906 // CHECK18-NEXT:  entry:
20907 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
20908 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
20909 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
20910 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
20911 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
20912 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
20913 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
20914 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
20915 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
20916 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
20917 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
20918 // CHECK18-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
20919 // CHECK18-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
20920 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
20921 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
20922 // CHECK18-NEXT:    [[I4:%.*]] = alloca i32, align 4
20923 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
20924 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
20925 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
20926 // CHECK18-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
20927 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
20928 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
20929 // CHECK18-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
20930 // CHECK18-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
20931 // CHECK18-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
20932 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
20933 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
20934 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
20935 // CHECK18-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
20936 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20937 // CHECK18-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
20938 // CHECK18-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
20939 // CHECK18-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
20940 // CHECK18-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
20941 // CHECK18-NEXT:    store i32 0, i32* [[I]], align 4
20942 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
20943 // CHECK18-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
20944 // CHECK18-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
20945 // CHECK18:       omp.precond.then:
20946 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
20947 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
20948 // CHECK18-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
20949 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
20950 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
20951 // CHECK18-NEXT:    [[TMP7:%.*]] = load i32, i32* [[CONV]], align 8
20952 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
20953 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
20954 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])
20955 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20956 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
20957 // CHECK18-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
20958 // CHECK18-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
20959 // CHECK18:       cond.true:
20960 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
20961 // CHECK18-NEXT:    br label [[COND_END:%.*]]
20962 // CHECK18:       cond.false:
20963 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20964 // CHECK18-NEXT:    br label [[COND_END]]
20965 // CHECK18:       cond.end:
20966 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
20967 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
20968 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
20969 // CHECK18-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
20970 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
20971 // CHECK18:       omp.inner.for.cond:
20972 // CHECK18-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20973 // CHECK18-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
20974 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP16]], 1
20975 // CHECK18-NEXT:    [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]]
20976 // CHECK18-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
20977 // CHECK18:       omp.inner.for.body:
20978 // CHECK18-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
20979 // CHECK18-NEXT:    [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
20980 // CHECK18-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20981 // CHECK18-NEXT:    [[TMP20:%.*]] = zext i32 [[TMP19]] to i64
20982 // CHECK18-NEXT:    [[TMP21:%.*]] = load i32, i32* [[CONV]], align 8
20983 // CHECK18-NEXT:    [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
20984 // CHECK18-NEXT:    store i32 [[TMP21]], i32* [[CONV7]], align 4
20985 // CHECK18-NEXT:    [[TMP22:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
20986 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP22]])
20987 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
20988 // CHECK18:       omp.inner.for.inc:
20989 // CHECK18-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
20990 // CHECK18-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
20991 // CHECK18-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
20992 // CHECK18-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
20993 // CHECK18-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
20994 // CHECK18-NEXT:    [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
20995 // CHECK18-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]
20996 // CHECK18-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4
20997 // CHECK18-NEXT:    [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
20998 // CHECK18-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
20999 // CHECK18-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP27]], [[TMP28]]
21000 // CHECK18-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4
21001 // CHECK18-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21002 // CHECK18-NEXT:    [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
21003 // CHECK18-NEXT:    [[CMP11:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]]
21004 // CHECK18-NEXT:    br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]]
21005 // CHECK18:       cond.true12:
21006 // CHECK18-NEXT:    [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
21007 // CHECK18-NEXT:    br label [[COND_END14:%.*]]
21008 // CHECK18:       cond.false13:
21009 // CHECK18-NEXT:    [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21010 // CHECK18-NEXT:    br label [[COND_END14]]
21011 // CHECK18:       cond.end14:
21012 // CHECK18-NEXT:    [[COND15:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE12]] ], [ [[TMP32]], [[COND_FALSE13]] ]
21013 // CHECK18-NEXT:    store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4
21014 // CHECK18-NEXT:    [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
21015 // CHECK18-NEXT:    store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4
21016 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
21017 // CHECK18:       omp.inner.for.end:
21018 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
21019 // CHECK18:       omp.loop.exit:
21020 // CHECK18-NEXT:    [[TMP34:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
21021 // CHECK18-NEXT:    [[TMP35:%.*]] = load i32, i32* [[TMP34]], align 4
21022 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP35]])
21023 // CHECK18-NEXT:    br label [[OMP_PRECOND_END]]
21024 // CHECK18:       omp.precond.end:
21025 // CHECK18-NEXT:    ret void
21026 //
21027 //
21028 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..6
21029 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
21030 // CHECK18-NEXT:  entry:
21031 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
21032 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
21033 // CHECK18-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
21034 // CHECK18-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
21035 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
21036 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
21037 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
21038 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
21039 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
21040 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
21041 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
21042 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
21043 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
21044 // CHECK18-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
21045 // CHECK18-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
21046 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21047 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21048 // CHECK18-NEXT:    [[I6:%.*]] = alloca i32, align 4
21049 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
21050 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
21051 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
21052 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
21053 // CHECK18-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
21054 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
21055 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
21056 // CHECK18-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
21057 // CHECK18-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
21058 // CHECK18-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
21059 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
21060 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
21061 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
21062 // CHECK18-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
21063 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
21064 // CHECK18-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
21065 // CHECK18-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
21066 // CHECK18-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
21067 // CHECK18-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
21068 // CHECK18-NEXT:    store i32 0, i32* [[I]], align 4
21069 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
21070 // CHECK18-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
21071 // CHECK18-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
21072 // CHECK18:       omp.precond.then:
21073 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
21074 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
21075 // CHECK18-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
21076 // CHECK18-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
21077 // CHECK18-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
21078 // CHECK18-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
21079 // CHECK18-NEXT:    [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32
21080 // CHECK18-NEXT:    store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4
21081 // CHECK18-NEXT:    store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
21082 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
21083 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
21084 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
21085 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
21086 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
21087 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21088 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
21089 // CHECK18-NEXT:    [[CMP7:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
21090 // CHECK18-NEXT:    br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
21091 // CHECK18:       cond.true:
21092 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
21093 // CHECK18-NEXT:    br label [[COND_END:%.*]]
21094 // CHECK18:       cond.false:
21095 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21096 // CHECK18-NEXT:    br label [[COND_END]]
21097 // CHECK18:       cond.end:
21098 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
21099 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
21100 // CHECK18-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
21101 // CHECK18-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
21102 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
21103 // CHECK18:       omp.inner.for.cond:
21104 // CHECK18-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21105 // CHECK18-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21106 // CHECK18-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
21107 // CHECK18-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21108 // CHECK18:       omp.inner.for.body:
21109 // CHECK18-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21110 // CHECK18-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
21111 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
21112 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[I6]], align 4
21113 // CHECK18-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I6]], align 4
21114 // CHECK18-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
21115 // CHECK18-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
21116 // CHECK18-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
21117 // CHECK18-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
21118 // CHECK18:       omp.body.continue:
21119 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
21120 // CHECK18:       omp.inner.for.inc:
21121 // CHECK18-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21122 // CHECK18-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1
21123 // CHECK18-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4
21124 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
21125 // CHECK18:       omp.inner.for.end:
21126 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
21127 // CHECK18:       omp.loop.exit:
21128 // CHECK18-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
21129 // CHECK18-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
21130 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
21131 // CHECK18-NEXT:    br label [[OMP_PRECOND_END]]
21132 // CHECK18:       omp.precond.end:
21133 // CHECK18-NEXT:    ret void
21134 //
21135 //
21136 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163
21137 // CHECK18-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
21138 // CHECK18-NEXT:  entry:
21139 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
21140 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
21141 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
21142 // CHECK18-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
21143 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
21144 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
21145 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32*
21146 // CHECK18-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
21147 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
21148 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]])
21149 // CHECK18-NEXT:    ret void
21150 //
21151 //
21152 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..8
21153 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
21154 // CHECK18-NEXT:  entry:
21155 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
21156 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
21157 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
21158 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
21159 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
21160 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
21161 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
21162 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
21163 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
21164 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
21165 // CHECK18-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
21166 // CHECK18-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
21167 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21168 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21169 // CHECK18-NEXT:    [[I3:%.*]] = alloca i32, align 4
21170 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
21171 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
21172 // CHECK18-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
21173 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
21174 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
21175 // CHECK18-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
21176 // CHECK18-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
21177 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
21178 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
21179 // CHECK18-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
21180 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
21181 // CHECK18-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
21182 // CHECK18-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
21183 // CHECK18-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
21184 // CHECK18-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
21185 // CHECK18-NEXT:    store i32 0, i32* [[I]], align 4
21186 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
21187 // CHECK18-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
21188 // CHECK18-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
21189 // CHECK18:       omp.precond.then:
21190 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
21191 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
21192 // CHECK18-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
21193 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
21194 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
21195 // CHECK18-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
21196 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
21197 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
21198 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21199 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
21200 // CHECK18-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
21201 // CHECK18-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
21202 // CHECK18:       cond.true:
21203 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
21204 // CHECK18-NEXT:    br label [[COND_END:%.*]]
21205 // CHECK18:       cond.false:
21206 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21207 // CHECK18-NEXT:    br label [[COND_END]]
21208 // CHECK18:       cond.end:
21209 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
21210 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
21211 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
21212 // CHECK18-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
21213 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
21214 // CHECK18:       omp.inner.for.cond:
21215 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21216 // CHECK18-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21217 // CHECK18-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
21218 // CHECK18-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21219 // CHECK18:       omp.inner.for.body:
21220 // CHECK18-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
21221 // CHECK18-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
21222 // CHECK18-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21223 // CHECK18-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
21224 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]])
21225 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
21226 // CHECK18:       omp.inner.for.inc:
21227 // CHECK18-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21228 // CHECK18-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
21229 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
21230 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
21231 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
21232 // CHECK18:       omp.inner.for.end:
21233 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
21234 // CHECK18:       omp.loop.exit:
21235 // CHECK18-NEXT:    [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
21236 // CHECK18-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
21237 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
21238 // CHECK18-NEXT:    br label [[OMP_PRECOND_END]]
21239 // CHECK18:       omp.precond.end:
21240 // CHECK18-NEXT:    ret void
21241 //
21242 //
21243 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..9
21244 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
21245 // CHECK18-NEXT:  entry:
21246 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
21247 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
21248 // CHECK18-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
21249 // CHECK18-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
21250 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
21251 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
21252 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
21253 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
21254 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
21255 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
21256 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
21257 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
21258 // CHECK18-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
21259 // CHECK18-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
21260 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21261 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21262 // CHECK18-NEXT:    [[I4:%.*]] = alloca i32, align 4
21263 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
21264 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
21265 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
21266 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
21267 // CHECK18-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
21268 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
21269 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
21270 // CHECK18-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
21271 // CHECK18-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
21272 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
21273 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
21274 // CHECK18-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
21275 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
21276 // CHECK18-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
21277 // CHECK18-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
21278 // CHECK18-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
21279 // CHECK18-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
21280 // CHECK18-NEXT:    store i32 0, i32* [[I]], align 4
21281 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
21282 // CHECK18-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
21283 // CHECK18-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
21284 // CHECK18:       omp.precond.then:
21285 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
21286 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
21287 // CHECK18-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
21288 // CHECK18-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
21289 // CHECK18-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
21290 // CHECK18-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
21291 // CHECK18-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
21292 // CHECK18-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
21293 // CHECK18-NEXT:    store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4
21294 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
21295 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
21296 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
21297 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21298 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
21299 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
21300 // CHECK18-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1)
21301 // CHECK18-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
21302 // CHECK18:       omp.dispatch.cond:
21303 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
21304 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
21305 // CHECK18-NEXT:    [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
21306 // CHECK18-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
21307 // CHECK18-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
21308 // CHECK18:       omp.dispatch.body:
21309 // CHECK18-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
21310 // CHECK18-NEXT:    store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
21311 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
21312 // CHECK18:       omp.inner.for.cond:
21313 // CHECK18-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
21314 // CHECK18-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14
21315 // CHECK18-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
21316 // CHECK18-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21317 // CHECK18:       omp.inner.for.body:
21318 // CHECK18-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
21319 // CHECK18-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
21320 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
21321 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !14
21322 // CHECK18-NEXT:    [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !14
21323 // CHECK18-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64
21324 // CHECK18-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
21325 // CHECK18-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !14
21326 // CHECK18-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
21327 // CHECK18:       omp.body.continue:
21328 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
21329 // CHECK18:       omp.inner.for.inc:
21330 // CHECK18-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
21331 // CHECK18-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1
21332 // CHECK18-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14
21333 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
21334 // CHECK18:       omp.inner.for.end:
21335 // CHECK18-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
21336 // CHECK18:       omp.dispatch.inc:
21337 // CHECK18-NEXT:    br label [[OMP_DISPATCH_COND]]
21338 // CHECK18:       omp.dispatch.end:
21339 // CHECK18-NEXT:    br label [[OMP_PRECOND_END]]
21340 // CHECK18:       omp.precond.end:
21341 // CHECK18-NEXT:    ret void
21342 //
21343 //
21344 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168
21345 // CHECK18-SAME: (i64 [[M:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
21346 // CHECK18-NEXT:  entry:
21347 // CHECK18-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8
21348 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
21349 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
21350 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
21351 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
21352 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
21353 // CHECK18-NEXT:    store i64 [[M]], i64* [[M_ADDR]], align 8
21354 // CHECK18-NEXT:    store i64 [[N]], i64* [[N_ADDR]], align 8
21355 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
21356 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
21357 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
21358 // CHECK18-NEXT:    [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32*
21359 // CHECK18-NEXT:    [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
21360 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8
21361 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8
21362 // CHECK18-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
21363 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
21364 // CHECK18-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
21365 // CHECK18-NEXT:    store i32 [[TMP3]], i32* [[CONV2]], align 4
21366 // CHECK18-NEXT:    [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
21367 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]])
21368 // CHECK18-NEXT:    ret void
21369 //
21370 //
21371 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..11
21372 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
21373 // CHECK18-NEXT:  entry:
21374 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
21375 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
21376 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
21377 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
21378 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
21379 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
21380 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
21381 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
21382 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
21383 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
21384 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
21385 // CHECK18-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
21386 // CHECK18-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
21387 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21388 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21389 // CHECK18-NEXT:    [[I4:%.*]] = alloca i32, align 4
21390 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
21391 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
21392 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
21393 // CHECK18-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
21394 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
21395 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
21396 // CHECK18-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
21397 // CHECK18-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
21398 // CHECK18-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
21399 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
21400 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
21401 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
21402 // CHECK18-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
21403 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
21404 // CHECK18-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
21405 // CHECK18-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
21406 // CHECK18-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
21407 // CHECK18-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
21408 // CHECK18-NEXT:    store i32 0, i32* [[I]], align 4
21409 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
21410 // CHECK18-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
21411 // CHECK18-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
21412 // CHECK18:       omp.precond.then:
21413 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
21414 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
21415 // CHECK18-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
21416 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
21417 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
21418 // CHECK18-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
21419 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
21420 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
21421 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21422 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
21423 // CHECK18-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
21424 // CHECK18-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
21425 // CHECK18:       cond.true:
21426 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
21427 // CHECK18-NEXT:    br label [[COND_END:%.*]]
21428 // CHECK18:       cond.false:
21429 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21430 // CHECK18-NEXT:    br label [[COND_END]]
21431 // CHECK18:       cond.end:
21432 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
21433 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
21434 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
21435 // CHECK18-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
21436 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
21437 // CHECK18:       omp.inner.for.cond:
21438 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21439 // CHECK18-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21440 // CHECK18-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
21441 // CHECK18-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21442 // CHECK18:       omp.inner.for.body:
21443 // CHECK18-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
21444 // CHECK18-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
21445 // CHECK18-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21446 // CHECK18-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
21447 // CHECK18-NEXT:    [[TMP20:%.*]] = load i32, i32* [[CONV]], align 8
21448 // CHECK18-NEXT:    [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
21449 // CHECK18-NEXT:    store i32 [[TMP20]], i32* [[CONV7]], align 4
21450 // CHECK18-NEXT:    [[TMP21:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
21451 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP21]])
21452 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
21453 // CHECK18:       omp.inner.for.inc:
21454 // CHECK18-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21455 // CHECK18-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
21456 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
21457 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
21458 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
21459 // CHECK18:       omp.inner.for.end:
21460 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
21461 // CHECK18:       omp.loop.exit:
21462 // CHECK18-NEXT:    [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
21463 // CHECK18-NEXT:    [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4
21464 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]])
21465 // CHECK18-NEXT:    br label [[OMP_PRECOND_END]]
21466 // CHECK18:       omp.precond.end:
21467 // CHECK18-NEXT:    ret void
21468 //
21469 //
21470 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..12
21471 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
21472 // CHECK18-NEXT:  entry:
21473 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
21474 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
21475 // CHECK18-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
21476 // CHECK18-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
21477 // CHECK18-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 8
21478 // CHECK18-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
21479 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 8
21480 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
21481 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
21482 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
21483 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
21484 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
21485 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
21486 // CHECK18-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
21487 // CHECK18-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
21488 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21489 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21490 // CHECK18-NEXT:    [[I6:%.*]] = alloca i32, align 4
21491 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
21492 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
21493 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
21494 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
21495 // CHECK18-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 8
21496 // CHECK18-NEXT:    store i64 [[VLA]], i64* [[VLA_ADDR]], align 8
21497 // CHECK18-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 8
21498 // CHECK18-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
21499 // CHECK18-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8
21500 // CHECK18-NEXT:    [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8
21501 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8
21502 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
21503 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
21504 // CHECK18-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
21505 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
21506 // CHECK18-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
21507 // CHECK18-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
21508 // CHECK18-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
21509 // CHECK18-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
21510 // CHECK18-NEXT:    store i32 0, i32* [[I]], align 4
21511 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
21512 // CHECK18-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
21513 // CHECK18-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
21514 // CHECK18:       omp.precond.then:
21515 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
21516 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
21517 // CHECK18-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
21518 // CHECK18-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
21519 // CHECK18-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
21520 // CHECK18-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
21521 // CHECK18-NEXT:    [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32
21522 // CHECK18-NEXT:    store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4
21523 // CHECK18-NEXT:    store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
21524 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
21525 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
21526 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32, i32* [[CONV]], align 8
21527 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
21528 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21529 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
21530 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
21531 // CHECK18-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]])
21532 // CHECK18-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
21533 // CHECK18:       omp.dispatch.cond:
21534 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
21535 // CHECK18-NEXT:    [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
21536 // CHECK18-NEXT:    [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
21537 // CHECK18-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0
21538 // CHECK18-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
21539 // CHECK18:       omp.dispatch.body:
21540 // CHECK18-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
21541 // CHECK18-NEXT:    store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4
21542 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
21543 // CHECK18:       omp.inner.for.cond:
21544 // CHECK18-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
21545 // CHECK18-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !17
21546 // CHECK18-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
21547 // CHECK18-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21548 // CHECK18:       omp.inner.for.body:
21549 // CHECK18-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
21550 // CHECK18-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
21551 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
21552 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !17
21553 // CHECK18-NEXT:    [[TMP21:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !17
21554 // CHECK18-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64
21555 // CHECK18-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]]
21556 // CHECK18-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !17
21557 // CHECK18-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
21558 // CHECK18:       omp.body.continue:
21559 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
21560 // CHECK18:       omp.inner.for.inc:
21561 // CHECK18-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
21562 // CHECK18-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP22]], 1
21563 // CHECK18-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17
21564 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
21565 // CHECK18:       omp.inner.for.end:
21566 // CHECK18-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
21567 // CHECK18:       omp.dispatch.inc:
21568 // CHECK18-NEXT:    br label [[OMP_DISPATCH_COND]]
21569 // CHECK18:       omp.dispatch.end:
21570 // CHECK18-NEXT:    br label [[OMP_PRECOND_END]]
21571 // CHECK18:       omp.precond.end:
21572 // CHECK18-NEXT:    ret void
21573 //
21574 //
21575 // CHECK18-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
21576 // CHECK18-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
21577 // CHECK18-NEXT:  entry:
21578 // CHECK18-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
21579 // CHECK18-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
21580 // CHECK18-NEXT:    [[M:%.*]] = alloca i32, align 4
21581 // CHECK18-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8
21582 // CHECK18-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8
21583 // CHECK18-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8
21584 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
21585 // CHECK18-NEXT:    [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8
21586 // CHECK18-NEXT:    [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8
21587 // CHECK18-NEXT:    [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8
21588 // CHECK18-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
21589 // CHECK18-NEXT:    [[M_CASTED:%.*]] = alloca i64, align 8
21590 // CHECK18-NEXT:    [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 8
21591 // CHECK18-NEXT:    [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 8
21592 // CHECK18-NEXT:    [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 8
21593 // CHECK18-NEXT:    [[_TMP10:%.*]] = alloca i32, align 4
21594 // CHECK18-NEXT:    [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 8
21595 // CHECK18-NEXT:    [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 8
21596 // CHECK18-NEXT:    [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 8
21597 // CHECK18-NEXT:    [[_TMP16:%.*]] = alloca i32, align 4
21598 // CHECK18-NEXT:    [[M_CASTED19:%.*]] = alloca i64, align 8
21599 // CHECK18-NEXT:    [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [2 x i8*], align 8
21600 // CHECK18-NEXT:    [[DOTOFFLOAD_PTRS22:%.*]] = alloca [2 x i8*], align 8
21601 // CHECK18-NEXT:    [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [2 x i8*], align 8
21602 // CHECK18-NEXT:    [[_TMP24:%.*]] = alloca i32, align 4
21603 // CHECK18-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
21604 // CHECK18-NEXT:    store i32 10, i32* [[M]], align 4
21605 // CHECK18-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
21606 // CHECK18-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
21607 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8
21608 // CHECK18-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
21609 // CHECK18-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
21610 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8
21611 // CHECK18-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
21612 // CHECK18-NEXT:    store i8* null, i8** [[TMP4]], align 8
21613 // CHECK18-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
21614 // CHECK18-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
21615 // CHECK18-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
21616 // CHECK18-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
21617 // CHECK18-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
21618 // CHECK18-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
21619 // CHECK18:       omp_offload.failed:
21620 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]]
21621 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT]]
21622 // CHECK18:       omp_offload.cont:
21623 // CHECK18-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
21624 // CHECK18-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
21625 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8
21626 // CHECK18-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
21627 // CHECK18-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
21628 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8
21629 // CHECK18-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0
21630 // CHECK18-NEXT:    store i8* null, i8** [[TMP13]], align 8
21631 // CHECK18-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
21632 // CHECK18-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
21633 // CHECK18-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
21634 // CHECK18-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
21635 // CHECK18-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
21636 // CHECK18-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
21637 // CHECK18:       omp_offload.failed5:
21638 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121([10 x i32]* [[A]]) #[[ATTR3]]
21639 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT6]]
21640 // CHECK18:       omp_offload.cont6:
21641 // CHECK18-NEXT:    [[TMP18:%.*]] = load i32, i32* [[M]], align 4
21642 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[M_CASTED]] to i32*
21643 // CHECK18-NEXT:    store i32 [[TMP18]], i32* [[CONV]], align 4
21644 // CHECK18-NEXT:    [[TMP19:%.*]] = load i64, i64* [[M_CASTED]], align 8
21645 // CHECK18-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
21646 // CHECK18-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64*
21647 // CHECK18-NEXT:    store i64 [[TMP19]], i64* [[TMP21]], align 8
21648 // CHECK18-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
21649 // CHECK18-NEXT:    [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64*
21650 // CHECK18-NEXT:    store i64 [[TMP19]], i64* [[TMP23]], align 8
21651 // CHECK18-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0
21652 // CHECK18-NEXT:    store i8* null, i8** [[TMP24]], align 8
21653 // CHECK18-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1
21654 // CHECK18-NEXT:    [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]**
21655 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 8
21656 // CHECK18-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1
21657 // CHECK18-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]**
21658 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 8
21659 // CHECK18-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 1
21660 // CHECK18-NEXT:    store i8* null, i8** [[TMP29]], align 8
21661 // CHECK18-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
21662 // CHECK18-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
21663 // CHECK18-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
21664 // CHECK18-NEXT:    [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
21665 // CHECK18-NEXT:    [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
21666 // CHECK18-NEXT:    br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
21667 // CHECK18:       omp_offload.failed11:
21668 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i64 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]]
21669 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT12]]
21670 // CHECK18:       omp_offload.cont12:
21671 // CHECK18-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
21672 // CHECK18-NEXT:    [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]**
21673 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 8
21674 // CHECK18-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
21675 // CHECK18-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]**
21676 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 8
21677 // CHECK18-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i64 0, i64 0
21678 // CHECK18-NEXT:    store i8* null, i8** [[TMP38]], align 8
21679 // CHECK18-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
21680 // CHECK18-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
21681 // CHECK18-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
21682 // CHECK18-NEXT:    [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
21683 // CHECK18-NEXT:    [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0
21684 // CHECK18-NEXT:    br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
21685 // CHECK18:       omp_offload.failed17:
21686 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131([10 x i32]* [[A]]) #[[ATTR3]]
21687 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT18]]
21688 // CHECK18:       omp_offload.cont18:
21689 // CHECK18-NEXT:    [[TMP43:%.*]] = load i32, i32* [[M]], align 4
21690 // CHECK18-NEXT:    [[CONV20:%.*]] = bitcast i64* [[M_CASTED19]] to i32*
21691 // CHECK18-NEXT:    store i32 [[TMP43]], i32* [[CONV20]], align 4
21692 // CHECK18-NEXT:    [[TMP44:%.*]] = load i64, i64* [[M_CASTED19]], align 8
21693 // CHECK18-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
21694 // CHECK18-NEXT:    [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64*
21695 // CHECK18-NEXT:    store i64 [[TMP44]], i64* [[TMP46]], align 8
21696 // CHECK18-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
21697 // CHECK18-NEXT:    [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64*
21698 // CHECK18-NEXT:    store i64 [[TMP44]], i64* [[TMP48]], align 8
21699 // CHECK18-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0
21700 // CHECK18-NEXT:    store i8* null, i8** [[TMP49]], align 8
21701 // CHECK18-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1
21702 // CHECK18-NEXT:    [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]**
21703 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 8
21704 // CHECK18-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1
21705 // CHECK18-NEXT:    [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]**
21706 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 8
21707 // CHECK18-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1
21708 // CHECK18-NEXT:    store i8* null, i8** [[TMP54]], align 8
21709 // CHECK18-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0
21710 // CHECK18-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0
21711 // CHECK18-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
21712 // CHECK18-NEXT:    [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
21713 // CHECK18-NEXT:    [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0
21714 // CHECK18-NEXT:    br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED25:%.*]], label [[OMP_OFFLOAD_CONT26:%.*]]
21715 // CHECK18:       omp_offload.failed25:
21716 // CHECK18-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i64 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]]
21717 // CHECK18-NEXT:    br label [[OMP_OFFLOAD_CONT26]]
21718 // CHECK18:       omp_offload.cont26:
21719 // CHECK18-NEXT:    ret i32 0
21720 //
21721 //
21722 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
21723 // CHECK18-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
21724 // CHECK18-NEXT:  entry:
21725 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
21726 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
21727 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
21728 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
21729 // CHECK18-NEXT:    ret void
21730 //
21731 //
21732 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..14
21733 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
21734 // CHECK18-NEXT:  entry:
21735 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
21736 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
21737 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
21738 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
21739 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
21740 // CHECK18-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
21741 // CHECK18-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
21742 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21743 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21744 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
21745 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
21746 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
21747 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
21748 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
21749 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
21750 // CHECK18-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
21751 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
21752 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
21753 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
21754 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
21755 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
21756 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21757 // CHECK18-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
21758 // CHECK18-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
21759 // CHECK18:       cond.true:
21760 // CHECK18-NEXT:    br label [[COND_END:%.*]]
21761 // CHECK18:       cond.false:
21762 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21763 // CHECK18-NEXT:    br label [[COND_END]]
21764 // CHECK18:       cond.end:
21765 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
21766 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
21767 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
21768 // CHECK18-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
21769 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
21770 // CHECK18:       omp.inner.for.cond:
21771 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21772 // CHECK18-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21773 // CHECK18-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
21774 // CHECK18-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21775 // CHECK18:       omp.inner.for.body:
21776 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
21777 // CHECK18-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
21778 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21779 // CHECK18-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
21780 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
21781 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
21782 // CHECK18:       omp.inner.for.inc:
21783 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21784 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
21785 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
21786 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
21787 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
21788 // CHECK18:       omp.inner.for.end:
21789 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
21790 // CHECK18:       omp.loop.exit:
21791 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
21792 // CHECK18-NEXT:    ret void
21793 //
21794 //
21795 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..15
21796 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
21797 // CHECK18-NEXT:  entry:
21798 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
21799 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
21800 // CHECK18-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
21801 // CHECK18-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
21802 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
21803 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
21804 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
21805 // CHECK18-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
21806 // CHECK18-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
21807 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21808 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21809 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
21810 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
21811 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
21812 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
21813 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
21814 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
21815 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
21816 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
21817 // CHECK18-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
21818 // CHECK18-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
21819 // CHECK18-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
21820 // CHECK18-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
21821 // CHECK18-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
21822 // CHECK18-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
21823 // CHECK18-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
21824 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
21825 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
21826 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
21827 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
21828 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
21829 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21830 // CHECK18-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
21831 // CHECK18-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
21832 // CHECK18:       cond.true:
21833 // CHECK18-NEXT:    br label [[COND_END:%.*]]
21834 // CHECK18:       cond.false:
21835 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21836 // CHECK18-NEXT:    br label [[COND_END]]
21837 // CHECK18:       cond.end:
21838 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
21839 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
21840 // CHECK18-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
21841 // CHECK18-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
21842 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
21843 // CHECK18:       omp.inner.for.cond:
21844 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21845 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21846 // CHECK18-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
21847 // CHECK18-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21848 // CHECK18:       omp.inner.for.body:
21849 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21850 // CHECK18-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
21851 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
21852 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
21853 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
21854 // CHECK18-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
21855 // CHECK18-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
21856 // CHECK18-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
21857 // CHECK18-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
21858 // CHECK18:       omp.body.continue:
21859 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
21860 // CHECK18:       omp.inner.for.inc:
21861 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21862 // CHECK18-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
21863 // CHECK18-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
21864 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
21865 // CHECK18:       omp.inner.for.end:
21866 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
21867 // CHECK18:       omp.loop.exit:
21868 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
21869 // CHECK18-NEXT:    ret void
21870 //
21871 //
21872 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121
21873 // CHECK18-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
21874 // CHECK18-NEXT:  entry:
21875 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
21876 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
21877 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
21878 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
21879 // CHECK18-NEXT:    ret void
21880 //
21881 //
21882 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..17
21883 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
21884 // CHECK18-NEXT:  entry:
21885 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
21886 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
21887 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
21888 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
21889 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
21890 // CHECK18-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
21891 // CHECK18-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
21892 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21893 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21894 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
21895 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
21896 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
21897 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
21898 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
21899 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
21900 // CHECK18-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
21901 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
21902 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
21903 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
21904 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
21905 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
21906 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21907 // CHECK18-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
21908 // CHECK18-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
21909 // CHECK18:       cond.true:
21910 // CHECK18-NEXT:    br label [[COND_END:%.*]]
21911 // CHECK18:       cond.false:
21912 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21913 // CHECK18-NEXT:    br label [[COND_END]]
21914 // CHECK18:       cond.end:
21915 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
21916 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
21917 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
21918 // CHECK18-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
21919 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
21920 // CHECK18:       omp.inner.for.cond:
21921 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21922 // CHECK18-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21923 // CHECK18-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
21924 // CHECK18-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21925 // CHECK18:       omp.inner.for.body:
21926 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
21927 // CHECK18-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
21928 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
21929 // CHECK18-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
21930 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
21931 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
21932 // CHECK18:       omp.inner.for.inc:
21933 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21934 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
21935 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
21936 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
21937 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
21938 // CHECK18:       omp.inner.for.end:
21939 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
21940 // CHECK18:       omp.loop.exit:
21941 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
21942 // CHECK18-NEXT:    ret void
21943 //
21944 //
21945 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..18
21946 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
21947 // CHECK18-NEXT:  entry:
21948 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
21949 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
21950 // CHECK18-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
21951 // CHECK18-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
21952 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
21953 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
21954 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
21955 // CHECK18-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
21956 // CHECK18-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
21957 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
21958 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
21959 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
21960 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
21961 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
21962 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
21963 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
21964 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
21965 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
21966 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
21967 // CHECK18-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
21968 // CHECK18-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
21969 // CHECK18-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
21970 // CHECK18-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
21971 // CHECK18-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
21972 // CHECK18-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
21973 // CHECK18-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
21974 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
21975 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
21976 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
21977 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
21978 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
21979 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21980 // CHECK18-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
21981 // CHECK18-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
21982 // CHECK18:       cond.true:
21983 // CHECK18-NEXT:    br label [[COND_END:%.*]]
21984 // CHECK18:       cond.false:
21985 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21986 // CHECK18-NEXT:    br label [[COND_END]]
21987 // CHECK18:       cond.end:
21988 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
21989 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
21990 // CHECK18-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
21991 // CHECK18-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
21992 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
21993 // CHECK18:       omp.inner.for.cond:
21994 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
21995 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
21996 // CHECK18-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
21997 // CHECK18-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
21998 // CHECK18:       omp.inner.for.body:
21999 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
22000 // CHECK18-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
22001 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
22002 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
22003 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
22004 // CHECK18-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
22005 // CHECK18-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
22006 // CHECK18-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
22007 // CHECK18-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
22008 // CHECK18:       omp.body.continue:
22009 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
22010 // CHECK18:       omp.inner.for.inc:
22011 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
22012 // CHECK18-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
22013 // CHECK18-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
22014 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
22015 // CHECK18:       omp.inner.for.end:
22016 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
22017 // CHECK18:       omp.loop.exit:
22018 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
22019 // CHECK18-NEXT:    ret void
22020 //
22021 //
22022 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126
22023 // CHECK18-SAME: (i64 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
22024 // CHECK18-NEXT:  entry:
22025 // CHECK18-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8
22026 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
22027 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
22028 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
22029 // CHECK18-NEXT:    store i64 [[M]], i64* [[M_ADDR]], align 8
22030 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
22031 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
22032 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
22033 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
22034 // CHECK18-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
22035 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
22036 // CHECK18-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
22037 // CHECK18-NEXT:    store i32 [[TMP2]], i32* [[CONV1]], align 4
22038 // CHECK18-NEXT:    [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
22039 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]])
22040 // CHECK18-NEXT:    ret void
22041 //
22042 //
22043 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..21
22044 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
22045 // CHECK18-NEXT:  entry:
22046 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
22047 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
22048 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
22049 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
22050 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
22051 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
22052 // CHECK18-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
22053 // CHECK18-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
22054 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
22055 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
22056 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
22057 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
22058 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
22059 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
22060 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
22061 // CHECK18-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
22062 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
22063 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
22064 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
22065 // CHECK18-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
22066 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
22067 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
22068 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
22069 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
22070 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
22071 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22072 // CHECK18-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
22073 // CHECK18-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
22074 // CHECK18:       cond.true:
22075 // CHECK18-NEXT:    br label [[COND_END:%.*]]
22076 // CHECK18:       cond.false:
22077 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22078 // CHECK18-NEXT:    br label [[COND_END]]
22079 // CHECK18:       cond.end:
22080 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
22081 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
22082 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
22083 // CHECK18-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
22084 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
22085 // CHECK18:       omp.inner.for.cond:
22086 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
22087 // CHECK18-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22088 // CHECK18-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
22089 // CHECK18-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
22090 // CHECK18:       omp.inner.for.body:
22091 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
22092 // CHECK18-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
22093 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22094 // CHECK18-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
22095 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8
22096 // CHECK18-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
22097 // CHECK18-NEXT:    store i32 [[TMP12]], i32* [[CONV2]], align 4
22098 // CHECK18-NEXT:    [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
22099 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]])
22100 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
22101 // CHECK18:       omp.inner.for.inc:
22102 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
22103 // CHECK18-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
22104 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
22105 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
22106 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
22107 // CHECK18:       omp.inner.for.end:
22108 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
22109 // CHECK18:       omp.loop.exit:
22110 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
22111 // CHECK18-NEXT:    ret void
22112 //
22113 //
22114 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..22
22115 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
22116 // CHECK18-NEXT:  entry:
22117 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
22118 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
22119 // CHECK18-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
22120 // CHECK18-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
22121 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
22122 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
22123 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
22124 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
22125 // CHECK18-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
22126 // CHECK18-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
22127 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
22128 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
22129 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
22130 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
22131 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
22132 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
22133 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
22134 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
22135 // CHECK18-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
22136 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
22137 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
22138 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
22139 // CHECK18-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
22140 // CHECK18-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
22141 // CHECK18-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
22142 // CHECK18-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
22143 // CHECK18-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
22144 // CHECK18-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
22145 // CHECK18-NEXT:    store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
22146 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
22147 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
22148 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
22149 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
22150 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
22151 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
22152 // CHECK18-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
22153 // CHECK18:       omp.dispatch.cond:
22154 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
22155 // CHECK18-NEXT:    [[CONV3:%.*]] = sext i32 [[TMP6]] to i64
22156 // CHECK18-NEXT:    [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
22157 // CHECK18-NEXT:    [[CMP:%.*]] = icmp ugt i64 [[CONV3]], [[TMP7]]
22158 // CHECK18-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
22159 // CHECK18:       cond.true:
22160 // CHECK18-NEXT:    [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
22161 // CHECK18-NEXT:    br label [[COND_END:%.*]]
22162 // CHECK18:       cond.false:
22163 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
22164 // CHECK18-NEXT:    [[CONV4:%.*]] = sext i32 [[TMP9]] to i64
22165 // CHECK18-NEXT:    br label [[COND_END]]
22166 // CHECK18:       cond.end:
22167 // CHECK18-NEXT:    [[COND:%.*]] = phi i64 [ [[TMP8]], [[COND_TRUE]] ], [ [[CONV4]], [[COND_FALSE]] ]
22168 // CHECK18-NEXT:    [[CONV5:%.*]] = trunc i64 [[COND]] to i32
22169 // CHECK18-NEXT:    store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4
22170 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
22171 // CHECK18-NEXT:    store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
22172 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
22173 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
22174 // CHECK18-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
22175 // CHECK18-NEXT:    br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
22176 // CHECK18:       omp.dispatch.body:
22177 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
22178 // CHECK18:       omp.inner.for.cond:
22179 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
22180 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
22181 // CHECK18-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
22182 // CHECK18-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
22183 // CHECK18:       omp.inner.for.body:
22184 // CHECK18-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
22185 // CHECK18-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
22186 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
22187 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
22188 // CHECK18-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I]], align 4
22189 // CHECK18-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
22190 // CHECK18-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
22191 // CHECK18-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
22192 // CHECK18-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
22193 // CHECK18:       omp.body.continue:
22194 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
22195 // CHECK18:       omp.inner.for.inc:
22196 // CHECK18-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
22197 // CHECK18-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP17]], 1
22198 // CHECK18-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4
22199 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
22200 // CHECK18:       omp.inner.for.end:
22201 // CHECK18-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
22202 // CHECK18:       omp.dispatch.inc:
22203 // CHECK18-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
22204 // CHECK18-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
22205 // CHECK18-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
22206 // CHECK18-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4
22207 // CHECK18-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
22208 // CHECK18-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
22209 // CHECK18-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
22210 // CHECK18-NEXT:    store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4
22211 // CHECK18-NEXT:    br label [[OMP_DISPATCH_COND]]
22212 // CHECK18:       omp.dispatch.end:
22213 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
22214 // CHECK18-NEXT:    ret void
22215 //
22216 //
22217 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131
22218 // CHECK18-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
22219 // CHECK18-NEXT:  entry:
22220 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
22221 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
22222 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
22223 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
22224 // CHECK18-NEXT:    ret void
22225 //
22226 //
22227 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..25
22228 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
22229 // CHECK18-NEXT:  entry:
22230 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
22231 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
22232 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
22233 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
22234 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
22235 // CHECK18-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
22236 // CHECK18-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
22237 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
22238 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
22239 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
22240 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
22241 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
22242 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
22243 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
22244 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
22245 // CHECK18-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
22246 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
22247 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
22248 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
22249 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
22250 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
22251 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22252 // CHECK18-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
22253 // CHECK18-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
22254 // CHECK18:       cond.true:
22255 // CHECK18-NEXT:    br label [[COND_END:%.*]]
22256 // CHECK18:       cond.false:
22257 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22258 // CHECK18-NEXT:    br label [[COND_END]]
22259 // CHECK18:       cond.end:
22260 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
22261 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
22262 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
22263 // CHECK18-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
22264 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
22265 // CHECK18:       omp.inner.for.cond:
22266 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
22267 // CHECK18-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22268 // CHECK18-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
22269 // CHECK18-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
22270 // CHECK18:       omp.inner.for.body:
22271 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
22272 // CHECK18-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
22273 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22274 // CHECK18-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
22275 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]])
22276 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
22277 // CHECK18:       omp.inner.for.inc:
22278 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
22279 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
22280 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
22281 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
22282 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
22283 // CHECK18:       omp.inner.for.end:
22284 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
22285 // CHECK18:       omp.loop.exit:
22286 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
22287 // CHECK18-NEXT:    ret void
22288 //
22289 //
22290 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..26
22291 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
22292 // CHECK18-NEXT:  entry:
22293 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
22294 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
22295 // CHECK18-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
22296 // CHECK18-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
22297 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
22298 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
22299 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
22300 // CHECK18-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
22301 // CHECK18-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
22302 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
22303 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
22304 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
22305 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
22306 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
22307 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
22308 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
22309 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
22310 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
22311 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
22312 // CHECK18-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
22313 // CHECK18-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
22314 // CHECK18-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
22315 // CHECK18-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
22316 // CHECK18-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
22317 // CHECK18-NEXT:    store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4
22318 // CHECK18-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4
22319 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
22320 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
22321 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
22322 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
22323 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
22324 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
22325 // CHECK18-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
22326 // CHECK18-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
22327 // CHECK18:       omp.dispatch.cond:
22328 // CHECK18-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
22329 // CHECK18-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
22330 // CHECK18-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
22331 // CHECK18:       omp.dispatch.body:
22332 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
22333 // CHECK18-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
22334 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
22335 // CHECK18:       omp.inner.for.cond:
22336 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20
22337 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !20
22338 // CHECK18-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
22339 // CHECK18-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
22340 // CHECK18:       omp.inner.for.body:
22341 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20
22342 // CHECK18-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
22343 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
22344 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !20
22345 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !20
22346 // CHECK18-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
22347 // CHECK18-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
22348 // CHECK18-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !20
22349 // CHECK18-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
22350 // CHECK18:       omp.body.continue:
22351 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
22352 // CHECK18:       omp.inner.for.inc:
22353 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20
22354 // CHECK18-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
22355 // CHECK18-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20
22356 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]
22357 // CHECK18:       omp.inner.for.end:
22358 // CHECK18-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
22359 // CHECK18:       omp.dispatch.inc:
22360 // CHECK18-NEXT:    br label [[OMP_DISPATCH_COND]]
22361 // CHECK18:       omp.dispatch.end:
22362 // CHECK18-NEXT:    ret void
22363 //
22364 //
22365 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136
22366 // CHECK18-SAME: (i64 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
22367 // CHECK18-NEXT:  entry:
22368 // CHECK18-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8
22369 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
22370 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
22371 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
22372 // CHECK18-NEXT:    store i64 [[M]], i64* [[M_ADDR]], align 8
22373 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
22374 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32*
22375 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
22376 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8
22377 // CHECK18-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
22378 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
22379 // CHECK18-NEXT:    [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
22380 // CHECK18-NEXT:    store i32 [[TMP2]], i32* [[CONV1]], align 4
22381 // CHECK18-NEXT:    [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
22382 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]])
22383 // CHECK18-NEXT:    ret void
22384 //
22385 //
22386 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..29
22387 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
22388 // CHECK18-NEXT:  entry:
22389 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
22390 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
22391 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
22392 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
22393 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
22394 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
22395 // CHECK18-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
22396 // CHECK18-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
22397 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
22398 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
22399 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
22400 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
22401 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
22402 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
22403 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
22404 // CHECK18-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
22405 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
22406 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
22407 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
22408 // CHECK18-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
22409 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
22410 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
22411 // CHECK18-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
22412 // CHECK18-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
22413 // CHECK18-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
22414 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22415 // CHECK18-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
22416 // CHECK18-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
22417 // CHECK18:       cond.true:
22418 // CHECK18-NEXT:    br label [[COND_END:%.*]]
22419 // CHECK18:       cond.false:
22420 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22421 // CHECK18-NEXT:    br label [[COND_END]]
22422 // CHECK18:       cond.end:
22423 // CHECK18-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
22424 // CHECK18-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
22425 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
22426 // CHECK18-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
22427 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
22428 // CHECK18:       omp.inner.for.cond:
22429 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
22430 // CHECK18-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22431 // CHECK18-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
22432 // CHECK18-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
22433 // CHECK18:       omp.inner.for.body:
22434 // CHECK18-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
22435 // CHECK18-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
22436 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22437 // CHECK18-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
22438 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8
22439 // CHECK18-NEXT:    [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32*
22440 // CHECK18-NEXT:    store i32 [[TMP12]], i32* [[CONV2]], align 4
22441 // CHECK18-NEXT:    [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8
22442 // CHECK18-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]])
22443 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
22444 // CHECK18:       omp.inner.for.inc:
22445 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
22446 // CHECK18-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
22447 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
22448 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
22449 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]]
22450 // CHECK18:       omp.inner.for.end:
22451 // CHECK18-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
22452 // CHECK18:       omp.loop.exit:
22453 // CHECK18-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
22454 // CHECK18-NEXT:    ret void
22455 //
22456 //
22457 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..30
22458 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
22459 // CHECK18-NEXT:  entry:
22460 // CHECK18-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8
22461 // CHECK18-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8
22462 // CHECK18-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
22463 // CHECK18-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
22464 // CHECK18-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8
22465 // CHECK18-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
22466 // CHECK18-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
22467 // CHECK18-NEXT:    [[TMP:%.*]] = alloca i32, align 4
22468 // CHECK18-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
22469 // CHECK18-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
22470 // CHECK18-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
22471 // CHECK18-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
22472 // CHECK18-NEXT:    [[I:%.*]] = alloca i32, align 4
22473 // CHECK18-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8
22474 // CHECK18-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8
22475 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8
22476 // CHECK18-NEXT:    store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8
22477 // CHECK18-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8
22478 // CHECK18-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8
22479 // CHECK18-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8
22480 // CHECK18-NEXT:    [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32*
22481 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
22482 // CHECK18-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
22483 // CHECK18-NEXT:    [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8
22484 // CHECK18-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
22485 // CHECK18-NEXT:    [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8
22486 // CHECK18-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32
22487 // CHECK18-NEXT:    store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4
22488 // CHECK18-NEXT:    store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4
22489 // CHECK18-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
22490 // CHECK18-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
22491 // CHECK18-NEXT:    [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8
22492 // CHECK18-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
22493 // CHECK18-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
22494 // CHECK18-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8
22495 // CHECK18-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
22496 // CHECK18-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
22497 // CHECK18-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
22498 // CHECK18:       omp.dispatch.cond:
22499 // CHECK18-NEXT:    [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
22500 // CHECK18-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
22501 // CHECK18-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
22502 // CHECK18:       omp.dispatch.body:
22503 // CHECK18-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
22504 // CHECK18-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
22505 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
22506 // CHECK18:       omp.inner.for.cond:
22507 // CHECK18-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
22508 // CHECK18-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !23
22509 // CHECK18-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
22510 // CHECK18-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
22511 // CHECK18:       omp.inner.for.body:
22512 // CHECK18-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
22513 // CHECK18-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
22514 // CHECK18-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
22515 // CHECK18-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !23
22516 // CHECK18-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !23
22517 // CHECK18-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
22518 // CHECK18-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]]
22519 // CHECK18-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !23
22520 // CHECK18-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
22521 // CHECK18:       omp.body.continue:
22522 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
22523 // CHECK18:       omp.inner.for.inc:
22524 // CHECK18-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
22525 // CHECK18-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1
22526 // CHECK18-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23
22527 // CHECK18-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
22528 // CHECK18:       omp.inner.for.end:
22529 // CHECK18-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
22530 // CHECK18:       omp.dispatch.inc:
22531 // CHECK18-NEXT:    br label [[OMP_DISPATCH_COND]]
22532 // CHECK18:       omp.dispatch.end:
22533 // CHECK18-NEXT:    ret void
22534 //
22535 //
22536 // CHECK18-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
22537 // CHECK18-SAME: () #[[ATTR5:[0-9]+]] {
22538 // CHECK18-NEXT:  entry:
22539 // CHECK18-NEXT:    call void @__tgt_register_requires(i64 1)
22540 // CHECK18-NEXT:    ret void
22541 //
22542 //
22543 // CHECK19-LABEL: define {{[^@]+}}@main
22544 // CHECK19-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
22545 // CHECK19-NEXT:  entry:
22546 // CHECK19-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
22547 // CHECK19-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
22548 // CHECK19-NEXT:    [[ARGV_ADDR:%.*]] = alloca i8**, align 4
22549 // CHECK19-NEXT:    [[N:%.*]] = alloca i32, align 4
22550 // CHECK19-NEXT:    [[SAVED_STACK:%.*]] = alloca i8*, align 4
22551 // CHECK19-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i32, align 4
22552 // CHECK19-NEXT:    [[M:%.*]] = alloca i32, align 4
22553 // CHECK19-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
22554 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
22555 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
22556 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
22557 // CHECK19-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
22558 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
22559 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
22560 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
22561 // CHECK19-NEXT:    [[N_CASTED3:%.*]] = alloca i32, align 4
22562 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4
22563 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4
22564 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4
22565 // CHECK19-NEXT:    [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4
22566 // CHECK19-NEXT:    [[_TMP8:%.*]] = alloca i32, align 4
22567 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
22568 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
22569 // CHECK19-NEXT:    [[M_CASTED:%.*]] = alloca i32, align 4
22570 // CHECK19-NEXT:    [[N_CASTED17:%.*]] = alloca i32, align 4
22571 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS18:%.*]] = alloca [4 x i8*], align 4
22572 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS19:%.*]] = alloca [4 x i8*], align 4
22573 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS20:%.*]] = alloca [4 x i8*], align 4
22574 // CHECK19-NEXT:    [[DOTOFFLOAD_SIZES21:%.*]] = alloca [4 x i64], align 4
22575 // CHECK19-NEXT:    [[_TMP22:%.*]] = alloca i32, align 4
22576 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_23:%.*]] = alloca i32, align 4
22577 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4
22578 // CHECK19-NEXT:    [[N_CASTED31:%.*]] = alloca i32, align 4
22579 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS32:%.*]] = alloca [3 x i8*], align 4
22580 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS33:%.*]] = alloca [3 x i8*], align 4
22581 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS34:%.*]] = alloca [3 x i8*], align 4
22582 // CHECK19-NEXT:    [[DOTOFFLOAD_SIZES35:%.*]] = alloca [3 x i64], align 4
22583 // CHECK19-NEXT:    [[_TMP36:%.*]] = alloca i32, align 4
22584 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_37:%.*]] = alloca i32, align 4
22585 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4
22586 // CHECK19-NEXT:    [[M_CASTED45:%.*]] = alloca i32, align 4
22587 // CHECK19-NEXT:    [[N_CASTED46:%.*]] = alloca i32, align 4
22588 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS47:%.*]] = alloca [4 x i8*], align 4
22589 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS48:%.*]] = alloca [4 x i8*], align 4
22590 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS49:%.*]] = alloca [4 x i8*], align 4
22591 // CHECK19-NEXT:    [[DOTOFFLOAD_SIZES50:%.*]] = alloca [4 x i64], align 4
22592 // CHECK19-NEXT:    [[_TMP51:%.*]] = alloca i32, align 4
22593 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_52:%.*]] = alloca i32, align 4
22594 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_53:%.*]] = alloca i32, align 4
22595 // CHECK19-NEXT:    store i32 0, i32* [[RETVAL]], align 4
22596 // CHECK19-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
22597 // CHECK19-NEXT:    store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
22598 // CHECK19-NEXT:    store i32 100, i32* [[N]], align 4
22599 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N]], align 4
22600 // CHECK19-NEXT:    [[TMP1:%.*]] = call i8* @llvm.stacksave()
22601 // CHECK19-NEXT:    store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
22602 // CHECK19-NEXT:    [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
22603 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
22604 // CHECK19-NEXT:    store i32 10, i32* [[M]], align 4
22605 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N]], align 4
22606 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[N_CASTED]], align 4
22607 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
22608 // CHECK19-NEXT:    [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4
22609 // CHECK19-NEXT:    [[TMP5:%.*]] = sext i32 [[TMP4]] to i64
22610 // CHECK19-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
22611 // CHECK19-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32*
22612 // CHECK19-NEXT:    store i32 [[TMP3]], i32* [[TMP7]], align 4
22613 // CHECK19-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
22614 // CHECK19-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32*
22615 // CHECK19-NEXT:    store i32 [[TMP3]], i32* [[TMP9]], align 4
22616 // CHECK19-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
22617 // CHECK19-NEXT:    store i64 4, i64* [[TMP10]], align 4
22618 // CHECK19-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
22619 // CHECK19-NEXT:    store i8* null, i8** [[TMP11]], align 4
22620 // CHECK19-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
22621 // CHECK19-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
22622 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[TMP13]], align 4
22623 // CHECK19-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
22624 // CHECK19-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
22625 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[TMP15]], align 4
22626 // CHECK19-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
22627 // CHECK19-NEXT:    store i64 4, i64* [[TMP16]], align 4
22628 // CHECK19-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
22629 // CHECK19-NEXT:    store i8* null, i8** [[TMP17]], align 4
22630 // CHECK19-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
22631 // CHECK19-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
22632 // CHECK19-NEXT:    store i32* [[VLA]], i32** [[TMP19]], align 4
22633 // CHECK19-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
22634 // CHECK19-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
22635 // CHECK19-NEXT:    store i32* [[VLA]], i32** [[TMP21]], align 4
22636 // CHECK19-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
22637 // CHECK19-NEXT:    store i64 [[TMP5]], i64* [[TMP22]], align 4
22638 // CHECK19-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
22639 // CHECK19-NEXT:    store i8* null, i8** [[TMP23]], align 4
22640 // CHECK19-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
22641 // CHECK19-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
22642 // CHECK19-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
22643 // CHECK19-NEXT:    [[TMP27:%.*]] = load i32, i32* [[N]], align 4
22644 // CHECK19-NEXT:    store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
22645 // CHECK19-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
22646 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
22647 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
22648 // CHECK19-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
22649 // CHECK19-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
22650 // CHECK19-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22651 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
22652 // CHECK19-NEXT:    [[TMP30:%.*]] = zext i32 [[ADD]] to i64
22653 // CHECK19-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]])
22654 // CHECK19-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
22655 // CHECK19-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
22656 // CHECK19-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
22657 // CHECK19:       omp_offload.failed:
22658 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
22659 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT]]
22660 // CHECK19:       omp_offload.cont:
22661 // CHECK19-NEXT:    [[TMP33:%.*]] = load i32, i32* [[N]], align 4
22662 // CHECK19-NEXT:    store i32 [[TMP33]], i32* [[N_CASTED3]], align 4
22663 // CHECK19-NEXT:    [[TMP34:%.*]] = load i32, i32* [[N_CASTED3]], align 4
22664 // CHECK19-NEXT:    [[TMP35:%.*]] = mul nuw i32 [[TMP0]], 4
22665 // CHECK19-NEXT:    [[TMP36:%.*]] = sext i32 [[TMP35]] to i64
22666 // CHECK19-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
22667 // CHECK19-NEXT:    [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32*
22668 // CHECK19-NEXT:    store i32 [[TMP34]], i32* [[TMP38]], align 4
22669 // CHECK19-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
22670 // CHECK19-NEXT:    [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32*
22671 // CHECK19-NEXT:    store i32 [[TMP34]], i32* [[TMP40]], align 4
22672 // CHECK19-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
22673 // CHECK19-NEXT:    store i64 4, i64* [[TMP41]], align 4
22674 // CHECK19-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0
22675 // CHECK19-NEXT:    store i8* null, i8** [[TMP42]], align 4
22676 // CHECK19-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
22677 // CHECK19-NEXT:    [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i32*
22678 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[TMP44]], align 4
22679 // CHECK19-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
22680 // CHECK19-NEXT:    [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32*
22681 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[TMP46]], align 4
22682 // CHECK19-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 1
22683 // CHECK19-NEXT:    store i64 4, i64* [[TMP47]], align 4
22684 // CHECK19-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1
22685 // CHECK19-NEXT:    store i8* null, i8** [[TMP48]], align 4
22686 // CHECK19-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
22687 // CHECK19-NEXT:    [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32**
22688 // CHECK19-NEXT:    store i32* [[VLA]], i32** [[TMP50]], align 4
22689 // CHECK19-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
22690 // CHECK19-NEXT:    [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32**
22691 // CHECK19-NEXT:    store i32* [[VLA]], i32** [[TMP52]], align 4
22692 // CHECK19-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
22693 // CHECK19-NEXT:    store i64 [[TMP36]], i64* [[TMP53]], align 4
22694 // CHECK19-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2
22695 // CHECK19-NEXT:    store i8* null, i8** [[TMP54]], align 4
22696 // CHECK19-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
22697 // CHECK19-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
22698 // CHECK19-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
22699 // CHECK19-NEXT:    [[TMP58:%.*]] = load i32, i32* [[N]], align 4
22700 // CHECK19-NEXT:    store i32 [[TMP58]], i32* [[DOTCAPTURE_EXPR_9]], align 4
22701 // CHECK19-NEXT:    [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4
22702 // CHECK19-NEXT:    [[SUB11:%.*]] = sub nsw i32 [[TMP59]], 0
22703 // CHECK19-NEXT:    [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
22704 // CHECK19-NEXT:    [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
22705 // CHECK19-NEXT:    store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4
22706 // CHECK19-NEXT:    [[TMP60:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
22707 // CHECK19-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP60]], 1
22708 // CHECK19-NEXT:    [[TMP61:%.*]] = zext i32 [[ADD14]] to i64
22709 // CHECK19-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP61]])
22710 // CHECK19-NEXT:    [[TMP62:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, i32 3, i8** [[TMP55]], i8** [[TMP56]], i64* [[TMP57]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
22711 // CHECK19-NEXT:    [[TMP63:%.*]] = icmp ne i32 [[TMP62]], 0
22712 // CHECK19-NEXT:    br i1 [[TMP63]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]]
22713 // CHECK19:       omp_offload.failed15:
22714 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i32 [[TMP34]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
22715 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT16]]
22716 // CHECK19:       omp_offload.cont16:
22717 // CHECK19-NEXT:    [[TMP64:%.*]] = load i32, i32* [[M]], align 4
22718 // CHECK19-NEXT:    store i32 [[TMP64]], i32* [[M_CASTED]], align 4
22719 // CHECK19-NEXT:    [[TMP65:%.*]] = load i32, i32* [[M_CASTED]], align 4
22720 // CHECK19-NEXT:    [[TMP66:%.*]] = load i32, i32* [[N]], align 4
22721 // CHECK19-NEXT:    store i32 [[TMP66]], i32* [[N_CASTED17]], align 4
22722 // CHECK19-NEXT:    [[TMP67:%.*]] = load i32, i32* [[N_CASTED17]], align 4
22723 // CHECK19-NEXT:    [[TMP68:%.*]] = mul nuw i32 [[TMP0]], 4
22724 // CHECK19-NEXT:    [[TMP69:%.*]] = sext i32 [[TMP68]] to i64
22725 // CHECK19-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0
22726 // CHECK19-NEXT:    [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i32*
22727 // CHECK19-NEXT:    store i32 [[TMP65]], i32* [[TMP71]], align 4
22728 // CHECK19-NEXT:    [[TMP72:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0
22729 // CHECK19-NEXT:    [[TMP73:%.*]] = bitcast i8** [[TMP72]] to i32*
22730 // CHECK19-NEXT:    store i32 [[TMP65]], i32* [[TMP73]], align 4
22731 // CHECK19-NEXT:    [[TMP74:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0
22732 // CHECK19-NEXT:    store i64 4, i64* [[TMP74]], align 4
22733 // CHECK19-NEXT:    [[TMP75:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 0
22734 // CHECK19-NEXT:    store i8* null, i8** [[TMP75]], align 4
22735 // CHECK19-NEXT:    [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 1
22736 // CHECK19-NEXT:    [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i32*
22737 // CHECK19-NEXT:    store i32 [[TMP67]], i32* [[TMP77]], align 4
22738 // CHECK19-NEXT:    [[TMP78:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 1
22739 // CHECK19-NEXT:    [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i32*
22740 // CHECK19-NEXT:    store i32 [[TMP67]], i32* [[TMP79]], align 4
22741 // CHECK19-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 1
22742 // CHECK19-NEXT:    store i64 4, i64* [[TMP80]], align 4
22743 // CHECK19-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 1
22744 // CHECK19-NEXT:    store i8* null, i8** [[TMP81]], align 4
22745 // CHECK19-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 2
22746 // CHECK19-NEXT:    [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i32*
22747 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[TMP83]], align 4
22748 // CHECK19-NEXT:    [[TMP84:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 2
22749 // CHECK19-NEXT:    [[TMP85:%.*]] = bitcast i8** [[TMP84]] to i32*
22750 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[TMP85]], align 4
22751 // CHECK19-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 2
22752 // CHECK19-NEXT:    store i64 4, i64* [[TMP86]], align 4
22753 // CHECK19-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 2
22754 // CHECK19-NEXT:    store i8* null, i8** [[TMP87]], align 4
22755 // CHECK19-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 3
22756 // CHECK19-NEXT:    [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32**
22757 // CHECK19-NEXT:    store i32* [[VLA]], i32** [[TMP89]], align 4
22758 // CHECK19-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 3
22759 // CHECK19-NEXT:    [[TMP91:%.*]] = bitcast i8** [[TMP90]] to i32**
22760 // CHECK19-NEXT:    store i32* [[VLA]], i32** [[TMP91]], align 4
22761 // CHECK19-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 3
22762 // CHECK19-NEXT:    store i64 [[TMP69]], i64* [[TMP92]], align 4
22763 // CHECK19-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 3
22764 // CHECK19-NEXT:    store i8* null, i8** [[TMP93]], align 4
22765 // CHECK19-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0
22766 // CHECK19-NEXT:    [[TMP95:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0
22767 // CHECK19-NEXT:    [[TMP96:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0
22768 // CHECK19-NEXT:    [[TMP97:%.*]] = load i32, i32* [[N]], align 4
22769 // CHECK19-NEXT:    store i32 [[TMP97]], i32* [[DOTCAPTURE_EXPR_23]], align 4
22770 // CHECK19-NEXT:    [[TMP98:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_23]], align 4
22771 // CHECK19-NEXT:    [[SUB25:%.*]] = sub nsw i32 [[TMP98]], 0
22772 // CHECK19-NEXT:    [[DIV26:%.*]] = sdiv i32 [[SUB25]], 1
22773 // CHECK19-NEXT:    [[SUB27:%.*]] = sub nsw i32 [[DIV26]], 1
22774 // CHECK19-NEXT:    store i32 [[SUB27]], i32* [[DOTCAPTURE_EXPR_24]], align 4
22775 // CHECK19-NEXT:    [[TMP99:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4
22776 // CHECK19-NEXT:    [[ADD28:%.*]] = add nsw i32 [[TMP99]], 1
22777 // CHECK19-NEXT:    [[TMP100:%.*]] = zext i32 [[ADD28]] to i64
22778 // CHECK19-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP100]])
22779 // CHECK19-NEXT:    [[TMP101:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, i32 4, i8** [[TMP94]], i8** [[TMP95]], i64* [[TMP96]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
22780 // CHECK19-NEXT:    [[TMP102:%.*]] = icmp ne i32 [[TMP101]], 0
22781 // CHECK19-NEXT:    br i1 [[TMP102]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]]
22782 // CHECK19:       omp_offload.failed29:
22783 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i32 [[TMP65]], i32 [[TMP67]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
22784 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT30]]
22785 // CHECK19:       omp_offload.cont30:
22786 // CHECK19-NEXT:    [[TMP103:%.*]] = load i32, i32* [[N]], align 4
22787 // CHECK19-NEXT:    store i32 [[TMP103]], i32* [[N_CASTED31]], align 4
22788 // CHECK19-NEXT:    [[TMP104:%.*]] = load i32, i32* [[N_CASTED31]], align 4
22789 // CHECK19-NEXT:    [[TMP105:%.*]] = mul nuw i32 [[TMP0]], 4
22790 // CHECK19-NEXT:    [[TMP106:%.*]] = sext i32 [[TMP105]] to i64
22791 // CHECK19-NEXT:    [[TMP107:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0
22792 // CHECK19-NEXT:    [[TMP108:%.*]] = bitcast i8** [[TMP107]] to i32*
22793 // CHECK19-NEXT:    store i32 [[TMP104]], i32* [[TMP108]], align 4
22794 // CHECK19-NEXT:    [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0
22795 // CHECK19-NEXT:    [[TMP110:%.*]] = bitcast i8** [[TMP109]] to i32*
22796 // CHECK19-NEXT:    store i32 [[TMP104]], i32* [[TMP110]], align 4
22797 // CHECK19-NEXT:    [[TMP111:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 0
22798 // CHECK19-NEXT:    store i64 4, i64* [[TMP111]], align 4
22799 // CHECK19-NEXT:    [[TMP112:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 0
22800 // CHECK19-NEXT:    store i8* null, i8** [[TMP112]], align 4
22801 // CHECK19-NEXT:    [[TMP113:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 1
22802 // CHECK19-NEXT:    [[TMP114:%.*]] = bitcast i8** [[TMP113]] to i32*
22803 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[TMP114]], align 4
22804 // CHECK19-NEXT:    [[TMP115:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 1
22805 // CHECK19-NEXT:    [[TMP116:%.*]] = bitcast i8** [[TMP115]] to i32*
22806 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[TMP116]], align 4
22807 // CHECK19-NEXT:    [[TMP117:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 1
22808 // CHECK19-NEXT:    store i64 4, i64* [[TMP117]], align 4
22809 // CHECK19-NEXT:    [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 1
22810 // CHECK19-NEXT:    store i8* null, i8** [[TMP118]], align 4
22811 // CHECK19-NEXT:    [[TMP119:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 2
22812 // CHECK19-NEXT:    [[TMP120:%.*]] = bitcast i8** [[TMP119]] to i32**
22813 // CHECK19-NEXT:    store i32* [[VLA]], i32** [[TMP120]], align 4
22814 // CHECK19-NEXT:    [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 2
22815 // CHECK19-NEXT:    [[TMP122:%.*]] = bitcast i8** [[TMP121]] to i32**
22816 // CHECK19-NEXT:    store i32* [[VLA]], i32** [[TMP122]], align 4
22817 // CHECK19-NEXT:    [[TMP123:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 2
22818 // CHECK19-NEXT:    store i64 [[TMP106]], i64* [[TMP123]], align 4
22819 // CHECK19-NEXT:    [[TMP124:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 2
22820 // CHECK19-NEXT:    store i8* null, i8** [[TMP124]], align 4
22821 // CHECK19-NEXT:    [[TMP125:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0
22822 // CHECK19-NEXT:    [[TMP126:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0
22823 // CHECK19-NEXT:    [[TMP127:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 0
22824 // CHECK19-NEXT:    [[TMP128:%.*]] = load i32, i32* [[N]], align 4
22825 // CHECK19-NEXT:    store i32 [[TMP128]], i32* [[DOTCAPTURE_EXPR_37]], align 4
22826 // CHECK19-NEXT:    [[TMP129:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_37]], align 4
22827 // CHECK19-NEXT:    [[SUB39:%.*]] = sub nsw i32 [[TMP129]], 0
22828 // CHECK19-NEXT:    [[DIV40:%.*]] = sdiv i32 [[SUB39]], 1
22829 // CHECK19-NEXT:    [[SUB41:%.*]] = sub nsw i32 [[DIV40]], 1
22830 // CHECK19-NEXT:    store i32 [[SUB41]], i32* [[DOTCAPTURE_EXPR_38]], align 4
22831 // CHECK19-NEXT:    [[TMP130:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_38]], align 4
22832 // CHECK19-NEXT:    [[ADD42:%.*]] = add nsw i32 [[TMP130]], 1
22833 // CHECK19-NEXT:    [[TMP131:%.*]] = zext i32 [[ADD42]] to i64
22834 // CHECK19-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP131]])
22835 // CHECK19-NEXT:    [[TMP132:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, i32 3, i8** [[TMP125]], i8** [[TMP126]], i64* [[TMP127]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
22836 // CHECK19-NEXT:    [[TMP133:%.*]] = icmp ne i32 [[TMP132]], 0
22837 // CHECK19-NEXT:    br i1 [[TMP133]], label [[OMP_OFFLOAD_FAILED43:%.*]], label [[OMP_OFFLOAD_CONT44:%.*]]
22838 // CHECK19:       omp_offload.failed43:
22839 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i32 [[TMP104]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
22840 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT44]]
22841 // CHECK19:       omp_offload.cont44:
22842 // CHECK19-NEXT:    [[TMP134:%.*]] = load i32, i32* [[M]], align 4
22843 // CHECK19-NEXT:    store i32 [[TMP134]], i32* [[M_CASTED45]], align 4
22844 // CHECK19-NEXT:    [[TMP135:%.*]] = load i32, i32* [[M_CASTED45]], align 4
22845 // CHECK19-NEXT:    [[TMP136:%.*]] = load i32, i32* [[N]], align 4
22846 // CHECK19-NEXT:    store i32 [[TMP136]], i32* [[N_CASTED46]], align 4
22847 // CHECK19-NEXT:    [[TMP137:%.*]] = load i32, i32* [[N_CASTED46]], align 4
22848 // CHECK19-NEXT:    [[TMP138:%.*]] = mul nuw i32 [[TMP0]], 4
22849 // CHECK19-NEXT:    [[TMP139:%.*]] = sext i32 [[TMP138]] to i64
22850 // CHECK19-NEXT:    [[TMP140:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0
22851 // CHECK19-NEXT:    [[TMP141:%.*]] = bitcast i8** [[TMP140]] to i32*
22852 // CHECK19-NEXT:    store i32 [[TMP135]], i32* [[TMP141]], align 4
22853 // CHECK19-NEXT:    [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0
22854 // CHECK19-NEXT:    [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i32*
22855 // CHECK19-NEXT:    store i32 [[TMP135]], i32* [[TMP143]], align 4
22856 // CHECK19-NEXT:    [[TMP144:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 0
22857 // CHECK19-NEXT:    store i64 4, i64* [[TMP144]], align 4
22858 // CHECK19-NEXT:    [[TMP145:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 0
22859 // CHECK19-NEXT:    store i8* null, i8** [[TMP145]], align 4
22860 // CHECK19-NEXT:    [[TMP146:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 1
22861 // CHECK19-NEXT:    [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i32*
22862 // CHECK19-NEXT:    store i32 [[TMP137]], i32* [[TMP147]], align 4
22863 // CHECK19-NEXT:    [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 1
22864 // CHECK19-NEXT:    [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i32*
22865 // CHECK19-NEXT:    store i32 [[TMP137]], i32* [[TMP149]], align 4
22866 // CHECK19-NEXT:    [[TMP150:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 1
22867 // CHECK19-NEXT:    store i64 4, i64* [[TMP150]], align 4
22868 // CHECK19-NEXT:    [[TMP151:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 1
22869 // CHECK19-NEXT:    store i8* null, i8** [[TMP151]], align 4
22870 // CHECK19-NEXT:    [[TMP152:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 2
22871 // CHECK19-NEXT:    [[TMP153:%.*]] = bitcast i8** [[TMP152]] to i32*
22872 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[TMP153]], align 4
22873 // CHECK19-NEXT:    [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 2
22874 // CHECK19-NEXT:    [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32*
22875 // CHECK19-NEXT:    store i32 [[TMP0]], i32* [[TMP155]], align 4
22876 // CHECK19-NEXT:    [[TMP156:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 2
22877 // CHECK19-NEXT:    store i64 4, i64* [[TMP156]], align 4
22878 // CHECK19-NEXT:    [[TMP157:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 2
22879 // CHECK19-NEXT:    store i8* null, i8** [[TMP157]], align 4
22880 // CHECK19-NEXT:    [[TMP158:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 3
22881 // CHECK19-NEXT:    [[TMP159:%.*]] = bitcast i8** [[TMP158]] to i32**
22882 // CHECK19-NEXT:    store i32* [[VLA]], i32** [[TMP159]], align 4
22883 // CHECK19-NEXT:    [[TMP160:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 3
22884 // CHECK19-NEXT:    [[TMP161:%.*]] = bitcast i8** [[TMP160]] to i32**
22885 // CHECK19-NEXT:    store i32* [[VLA]], i32** [[TMP161]], align 4
22886 // CHECK19-NEXT:    [[TMP162:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 3
22887 // CHECK19-NEXT:    store i64 [[TMP139]], i64* [[TMP162]], align 4
22888 // CHECK19-NEXT:    [[TMP163:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 3
22889 // CHECK19-NEXT:    store i8* null, i8** [[TMP163]], align 4
22890 // CHECK19-NEXT:    [[TMP164:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0
22891 // CHECK19-NEXT:    [[TMP165:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0
22892 // CHECK19-NEXT:    [[TMP166:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 0
22893 // CHECK19-NEXT:    [[TMP167:%.*]] = load i32, i32* [[N]], align 4
22894 // CHECK19-NEXT:    store i32 [[TMP167]], i32* [[DOTCAPTURE_EXPR_52]], align 4
22895 // CHECK19-NEXT:    [[TMP168:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_52]], align 4
22896 // CHECK19-NEXT:    [[SUB54:%.*]] = sub nsw i32 [[TMP168]], 0
22897 // CHECK19-NEXT:    [[DIV55:%.*]] = sdiv i32 [[SUB54]], 1
22898 // CHECK19-NEXT:    [[SUB56:%.*]] = sub nsw i32 [[DIV55]], 1
22899 // CHECK19-NEXT:    store i32 [[SUB56]], i32* [[DOTCAPTURE_EXPR_53]], align 4
22900 // CHECK19-NEXT:    [[TMP169:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_53]], align 4
22901 // CHECK19-NEXT:    [[ADD57:%.*]] = add nsw i32 [[TMP169]], 1
22902 // CHECK19-NEXT:    [[TMP170:%.*]] = zext i32 [[ADD57]] to i64
22903 // CHECK19-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP170]])
22904 // CHECK19-NEXT:    [[TMP171:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, i32 4, i8** [[TMP164]], i8** [[TMP165]], i64* [[TMP166]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
22905 // CHECK19-NEXT:    [[TMP172:%.*]] = icmp ne i32 [[TMP171]], 0
22906 // CHECK19-NEXT:    br i1 [[TMP172]], label [[OMP_OFFLOAD_FAILED58:%.*]], label [[OMP_OFFLOAD_CONT59:%.*]]
22907 // CHECK19:       omp_offload.failed58:
22908 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i32 [[TMP135]], i32 [[TMP137]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
22909 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT59]]
22910 // CHECK19:       omp_offload.cont59:
22911 // CHECK19-NEXT:    [[TMP173:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
22912 // CHECK19-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP173]])
22913 // CHECK19-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
22914 // CHECK19-NEXT:    [[TMP174:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
22915 // CHECK19-NEXT:    call void @llvm.stackrestore(i8* [[TMP174]])
22916 // CHECK19-NEXT:    [[TMP175:%.*]] = load i32, i32* [[RETVAL]], align 4
22917 // CHECK19-NEXT:    ret i32 [[TMP175]]
22918 //
22919 //
22920 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148
22921 // CHECK19-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
22922 // CHECK19-NEXT:  entry:
22923 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
22924 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
22925 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
22926 // CHECK19-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
22927 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
22928 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
22929 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
22930 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
22931 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
22932 // CHECK19-NEXT:    ret void
22933 //
22934 //
22935 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined.
22936 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
22937 // CHECK19-NEXT:  entry:
22938 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
22939 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
22940 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
22941 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
22942 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
22943 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
22944 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
22945 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
22946 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
22947 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
22948 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
22949 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
22950 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
22951 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
22952 // CHECK19-NEXT:    [[I3:%.*]] = alloca i32, align 4
22953 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
22954 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
22955 // CHECK19-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
22956 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
22957 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
22958 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
22959 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
22960 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
22961 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
22962 // CHECK19-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
22963 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
22964 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
22965 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
22966 // CHECK19-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
22967 // CHECK19-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
22968 // CHECK19-NEXT:    store i32 0, i32* [[I]], align 4
22969 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
22970 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
22971 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
22972 // CHECK19:       omp.precond.then:
22973 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
22974 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22975 // CHECK19-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
22976 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
22977 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
22978 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
22979 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
22980 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
22981 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22982 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22983 // CHECK19-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
22984 // CHECK19-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
22985 // CHECK19:       cond.true:
22986 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
22987 // CHECK19-NEXT:    br label [[COND_END:%.*]]
22988 // CHECK19:       cond.false:
22989 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
22990 // CHECK19-NEXT:    br label [[COND_END]]
22991 // CHECK19:       cond.end:
22992 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
22993 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
22994 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
22995 // CHECK19-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
22996 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
22997 // CHECK19:       omp.inner.for.cond:
22998 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
22999 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23000 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
23001 // CHECK19-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23002 // CHECK19:       omp.inner.for.body:
23003 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
23004 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23005 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])
23006 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
23007 // CHECK19:       omp.inner.for.inc:
23008 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23009 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
23010 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
23011 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
23012 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
23013 // CHECK19:       omp.inner.for.end:
23014 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
23015 // CHECK19:       omp.loop.exit:
23016 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23017 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
23018 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
23019 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
23020 // CHECK19:       omp.precond.end:
23021 // CHECK19-NEXT:    ret void
23022 //
23023 //
23024 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..1
23025 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
23026 // CHECK19-NEXT:  entry:
23027 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
23028 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
23029 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
23030 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
23031 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
23032 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
23033 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
23034 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
23035 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
23036 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
23037 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
23038 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
23039 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
23040 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
23041 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23042 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23043 // CHECK19-NEXT:    [[I3:%.*]] = alloca i32, align 4
23044 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
23045 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
23046 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
23047 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
23048 // CHECK19-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
23049 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
23050 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
23051 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
23052 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
23053 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
23054 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
23055 // CHECK19-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
23056 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
23057 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
23058 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
23059 // CHECK19-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
23060 // CHECK19-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
23061 // CHECK19-NEXT:    store i32 0, i32* [[I]], align 4
23062 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
23063 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
23064 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
23065 // CHECK19:       omp.precond.then:
23066 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
23067 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23068 // CHECK19-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
23069 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
23070 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
23071 // CHECK19-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
23072 // CHECK19-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
23073 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
23074 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
23075 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23076 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
23077 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
23078 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
23079 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23080 // CHECK19-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
23081 // CHECK19-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
23082 // CHECK19:       cond.true:
23083 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23084 // CHECK19-NEXT:    br label [[COND_END:%.*]]
23085 // CHECK19:       cond.false:
23086 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
23087 // CHECK19-NEXT:    br label [[COND_END]]
23088 // CHECK19:       cond.end:
23089 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
23090 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
23091 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
23092 // CHECK19-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
23093 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
23094 // CHECK19:       omp.inner.for.cond:
23095 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23096 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
23097 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
23098 // CHECK19-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23099 // CHECK19:       omp.inner.for.body:
23100 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23101 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
23102 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
23103 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4
23104 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
23105 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
23106 // CHECK19-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
23107 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
23108 // CHECK19:       omp.body.continue:
23109 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
23110 // CHECK19:       omp.inner.for.inc:
23111 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23112 // CHECK19-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1
23113 // CHECK19-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
23114 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
23115 // CHECK19:       omp.inner.for.end:
23116 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
23117 // CHECK19:       omp.loop.exit:
23118 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23119 // CHECK19-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
23120 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
23121 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
23122 // CHECK19:       omp.precond.end:
23123 // CHECK19-NEXT:    ret void
23124 //
23125 //
23126 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153
23127 // CHECK19-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
23128 // CHECK19-NEXT:  entry:
23129 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
23130 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
23131 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
23132 // CHECK19-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
23133 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
23134 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
23135 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
23136 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
23137 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
23138 // CHECK19-NEXT:    ret void
23139 //
23140 //
23141 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..2
23142 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
23143 // CHECK19-NEXT:  entry:
23144 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
23145 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
23146 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
23147 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
23148 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
23149 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
23150 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
23151 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
23152 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
23153 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
23154 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
23155 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
23156 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23157 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23158 // CHECK19-NEXT:    [[I3:%.*]] = alloca i32, align 4
23159 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
23160 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
23161 // CHECK19-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
23162 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
23163 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
23164 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
23165 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
23166 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
23167 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
23168 // CHECK19-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
23169 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
23170 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
23171 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
23172 // CHECK19-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
23173 // CHECK19-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
23174 // CHECK19-NEXT:    store i32 0, i32* [[I]], align 4
23175 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
23176 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
23177 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
23178 // CHECK19:       omp.precond.then:
23179 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
23180 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23181 // CHECK19-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
23182 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
23183 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
23184 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23185 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
23186 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
23187 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23188 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23189 // CHECK19-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
23190 // CHECK19-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
23191 // CHECK19:       cond.true:
23192 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23193 // CHECK19-NEXT:    br label [[COND_END:%.*]]
23194 // CHECK19:       cond.false:
23195 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23196 // CHECK19-NEXT:    br label [[COND_END]]
23197 // CHECK19:       cond.end:
23198 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
23199 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
23200 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
23201 // CHECK19-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
23202 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
23203 // CHECK19:       omp.inner.for.cond:
23204 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23205 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23206 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
23207 // CHECK19-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23208 // CHECK19:       omp.inner.for.body:
23209 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
23210 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23211 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])
23212 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
23213 // CHECK19:       omp.inner.for.inc:
23214 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23215 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
23216 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
23217 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
23218 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
23219 // CHECK19:       omp.inner.for.end:
23220 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
23221 // CHECK19:       omp.loop.exit:
23222 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23223 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
23224 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
23225 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
23226 // CHECK19:       omp.precond.end:
23227 // CHECK19-NEXT:    ret void
23228 //
23229 //
23230 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..3
23231 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
23232 // CHECK19-NEXT:  entry:
23233 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
23234 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
23235 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
23236 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
23237 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
23238 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
23239 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
23240 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
23241 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
23242 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
23243 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
23244 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
23245 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
23246 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
23247 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23248 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23249 // CHECK19-NEXT:    [[I3:%.*]] = alloca i32, align 4
23250 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
23251 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
23252 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
23253 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
23254 // CHECK19-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
23255 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
23256 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
23257 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
23258 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
23259 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
23260 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
23261 // CHECK19-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
23262 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
23263 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
23264 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
23265 // CHECK19-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
23266 // CHECK19-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
23267 // CHECK19-NEXT:    store i32 0, i32* [[I]], align 4
23268 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
23269 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
23270 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
23271 // CHECK19:       omp.precond.then:
23272 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
23273 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23274 // CHECK19-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
23275 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
23276 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
23277 // CHECK19-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
23278 // CHECK19-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
23279 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
23280 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
23281 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23282 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
23283 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
23284 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
23285 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23286 // CHECK19-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
23287 // CHECK19-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
23288 // CHECK19:       cond.true:
23289 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23290 // CHECK19-NEXT:    br label [[COND_END:%.*]]
23291 // CHECK19:       cond.false:
23292 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
23293 // CHECK19-NEXT:    br label [[COND_END]]
23294 // CHECK19:       cond.end:
23295 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
23296 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
23297 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
23298 // CHECK19-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
23299 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
23300 // CHECK19:       omp.inner.for.cond:
23301 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23302 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
23303 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
23304 // CHECK19-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23305 // CHECK19:       omp.inner.for.body:
23306 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23307 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
23308 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
23309 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4
23310 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
23311 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
23312 // CHECK19-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
23313 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
23314 // CHECK19:       omp.body.continue:
23315 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
23316 // CHECK19:       omp.inner.for.inc:
23317 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23318 // CHECK19-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1
23319 // CHECK19-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
23320 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
23321 // CHECK19:       omp.inner.for.end:
23322 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
23323 // CHECK19:       omp.loop.exit:
23324 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23325 // CHECK19-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
23326 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
23327 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
23328 // CHECK19:       omp.precond.end:
23329 // CHECK19-NEXT:    ret void
23330 //
23331 //
23332 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158
23333 // CHECK19-SAME: (i32 [[M:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
23334 // CHECK19-NEXT:  entry:
23335 // CHECK19-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 4
23336 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
23337 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
23338 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
23339 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
23340 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
23341 // CHECK19-NEXT:    store i32 [[M]], i32* [[M_ADDR]], align 4
23342 // CHECK19-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
23343 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
23344 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
23345 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
23346 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
23347 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4
23348 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
23349 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
23350 // CHECK19-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
23351 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
23352 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]])
23353 // CHECK19-NEXT:    ret void
23354 //
23355 //
23356 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..5
23357 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
23358 // CHECK19-NEXT:  entry:
23359 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
23360 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
23361 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
23362 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
23363 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
23364 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
23365 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
23366 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
23367 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
23368 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
23369 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
23370 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
23371 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
23372 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23373 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23374 // CHECK19-NEXT:    [[I4:%.*]] = alloca i32, align 4
23375 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
23376 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
23377 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
23378 // CHECK19-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
23379 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
23380 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
23381 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
23382 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
23383 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
23384 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
23385 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
23386 // CHECK19-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
23387 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23388 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
23389 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
23390 // CHECK19-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
23391 // CHECK19-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
23392 // CHECK19-NEXT:    store i32 0, i32* [[I]], align 4
23393 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23394 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
23395 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
23396 // CHECK19:       omp.precond.then:
23397 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
23398 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
23399 // CHECK19-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
23400 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
23401 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
23402 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
23403 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23404 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
23405 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])
23406 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23407 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
23408 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
23409 // CHECK19-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
23410 // CHECK19:       cond.true:
23411 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
23412 // CHECK19-NEXT:    br label [[COND_END:%.*]]
23413 // CHECK19:       cond.false:
23414 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23415 // CHECK19-NEXT:    br label [[COND_END]]
23416 // CHECK19:       cond.end:
23417 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
23418 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
23419 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
23420 // CHECK19-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
23421 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
23422 // CHECK19:       omp.inner.for.cond:
23423 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23424 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
23425 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP16]], 1
23426 // CHECK19-NEXT:    [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]]
23427 // CHECK19-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23428 // CHECK19:       omp.inner.for.body:
23429 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
23430 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23431 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
23432 // CHECK19-NEXT:    store i32 [[TMP19]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
23433 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
23434 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP20]])
23435 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
23436 // CHECK19:       omp.inner.for.inc:
23437 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23438 // CHECK19-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
23439 // CHECK19-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
23440 // CHECK19-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
23441 // CHECK19-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
23442 // CHECK19-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
23443 // CHECK19-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
23444 // CHECK19-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
23445 // CHECK19-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23446 // CHECK19-NEXT:    [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
23447 // CHECK19-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]
23448 // CHECK19-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
23449 // CHECK19-NEXT:    [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23450 // CHECK19-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
23451 // CHECK19-NEXT:    [[CMP10:%.*]] = icmp sgt i32 [[TMP27]], [[TMP28]]
23452 // CHECK19-NEXT:    br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
23453 // CHECK19:       cond.true11:
23454 // CHECK19-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
23455 // CHECK19-NEXT:    br label [[COND_END13:%.*]]
23456 // CHECK19:       cond.false12:
23457 // CHECK19-NEXT:    [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23458 // CHECK19-NEXT:    br label [[COND_END13]]
23459 // CHECK19:       cond.end13:
23460 // CHECK19-NEXT:    [[COND14:%.*]] = phi i32 [ [[TMP29]], [[COND_TRUE11]] ], [ [[TMP30]], [[COND_FALSE12]] ]
23461 // CHECK19-NEXT:    store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
23462 // CHECK19-NEXT:    [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
23463 // CHECK19-NEXT:    store i32 [[TMP31]], i32* [[DOTOMP_IV]], align 4
23464 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
23465 // CHECK19:       omp.inner.for.end:
23466 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
23467 // CHECK19:       omp.loop.exit:
23468 // CHECK19-NEXT:    [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23469 // CHECK19-NEXT:    [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4
23470 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]])
23471 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
23472 // CHECK19:       omp.precond.end:
23473 // CHECK19-NEXT:    ret void
23474 //
23475 //
23476 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..6
23477 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
23478 // CHECK19-NEXT:  entry:
23479 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
23480 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
23481 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
23482 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
23483 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
23484 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
23485 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
23486 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
23487 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
23488 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
23489 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
23490 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
23491 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
23492 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
23493 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
23494 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23495 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23496 // CHECK19-NEXT:    [[I4:%.*]] = alloca i32, align 4
23497 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
23498 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
23499 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
23500 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
23501 // CHECK19-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
23502 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
23503 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
23504 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
23505 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
23506 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
23507 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
23508 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
23509 // CHECK19-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
23510 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23511 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
23512 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
23513 // CHECK19-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
23514 // CHECK19-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
23515 // CHECK19-NEXT:    store i32 0, i32* [[I]], align 4
23516 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23517 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
23518 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
23519 // CHECK19:       omp.precond.then:
23520 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
23521 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
23522 // CHECK19-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
23523 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
23524 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
23525 // CHECK19-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
23526 // CHECK19-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
23527 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
23528 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
23529 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23530 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
23531 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
23532 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
23533 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
23534 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
23535 // CHECK19-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
23536 // CHECK19:       cond.true:
23537 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
23538 // CHECK19-NEXT:    br label [[COND_END:%.*]]
23539 // CHECK19:       cond.false:
23540 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
23541 // CHECK19-NEXT:    br label [[COND_END]]
23542 // CHECK19:       cond.end:
23543 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
23544 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
23545 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
23546 // CHECK19-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
23547 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
23548 // CHECK19:       omp.inner.for.cond:
23549 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23550 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
23551 // CHECK19-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
23552 // CHECK19-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23553 // CHECK19:       omp.inner.for.body:
23554 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23555 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
23556 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
23557 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4
23558 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I4]], align 4
23559 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
23560 // CHECK19-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
23561 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
23562 // CHECK19:       omp.body.continue:
23563 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
23564 // CHECK19:       omp.inner.for.inc:
23565 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23566 // CHECK19-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
23567 // CHECK19-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
23568 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
23569 // CHECK19:       omp.inner.for.end:
23570 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
23571 // CHECK19:       omp.loop.exit:
23572 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23573 // CHECK19-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
23574 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
23575 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
23576 // CHECK19:       omp.precond.end:
23577 // CHECK19-NEXT:    ret void
23578 //
23579 //
23580 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163
23581 // CHECK19-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
23582 // CHECK19-NEXT:  entry:
23583 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
23584 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
23585 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
23586 // CHECK19-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
23587 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
23588 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
23589 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
23590 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
23591 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
23592 // CHECK19-NEXT:    ret void
23593 //
23594 //
23595 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..8
23596 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
23597 // CHECK19-NEXT:  entry:
23598 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
23599 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
23600 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
23601 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
23602 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
23603 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
23604 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
23605 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
23606 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
23607 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
23608 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
23609 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
23610 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23611 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23612 // CHECK19-NEXT:    [[I3:%.*]] = alloca i32, align 4
23613 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
23614 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
23615 // CHECK19-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
23616 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
23617 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
23618 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
23619 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
23620 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
23621 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
23622 // CHECK19-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
23623 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
23624 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
23625 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
23626 // CHECK19-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
23627 // CHECK19-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
23628 // CHECK19-NEXT:    store i32 0, i32* [[I]], align 4
23629 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
23630 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
23631 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
23632 // CHECK19:       omp.precond.then:
23633 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
23634 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23635 // CHECK19-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
23636 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
23637 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
23638 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23639 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
23640 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
23641 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23642 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23643 // CHECK19-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
23644 // CHECK19-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
23645 // CHECK19:       cond.true:
23646 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23647 // CHECK19-NEXT:    br label [[COND_END:%.*]]
23648 // CHECK19:       cond.false:
23649 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23650 // CHECK19-NEXT:    br label [[COND_END]]
23651 // CHECK19:       cond.end:
23652 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
23653 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
23654 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
23655 // CHECK19-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
23656 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
23657 // CHECK19:       omp.inner.for.cond:
23658 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23659 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23660 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
23661 // CHECK19-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23662 // CHECK19:       omp.inner.for.body:
23663 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
23664 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23665 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])
23666 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
23667 // CHECK19:       omp.inner.for.inc:
23668 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23669 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
23670 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
23671 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
23672 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
23673 // CHECK19:       omp.inner.for.end:
23674 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
23675 // CHECK19:       omp.loop.exit:
23676 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23677 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
23678 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
23679 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
23680 // CHECK19:       omp.precond.end:
23681 // CHECK19-NEXT:    ret void
23682 //
23683 //
23684 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..9
23685 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
23686 // CHECK19-NEXT:  entry:
23687 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
23688 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
23689 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
23690 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
23691 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
23692 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
23693 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
23694 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
23695 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
23696 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
23697 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
23698 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
23699 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
23700 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
23701 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23702 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23703 // CHECK19-NEXT:    [[I3:%.*]] = alloca i32, align 4
23704 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
23705 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
23706 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
23707 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
23708 // CHECK19-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
23709 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
23710 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
23711 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
23712 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
23713 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
23714 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
23715 // CHECK19-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
23716 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
23717 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
23718 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
23719 // CHECK19-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
23720 // CHECK19-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
23721 // CHECK19-NEXT:    store i32 0, i32* [[I]], align 4
23722 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
23723 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
23724 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
23725 // CHECK19:       omp.precond.then:
23726 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
23727 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23728 // CHECK19-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
23729 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
23730 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
23731 // CHECK19-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
23732 // CHECK19-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
23733 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
23734 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
23735 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
23736 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
23737 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23738 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
23739 // CHECK19-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1)
23740 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
23741 // CHECK19:       omp.dispatch.cond:
23742 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23743 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
23744 // CHECK19-NEXT:    [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
23745 // CHECK19-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
23746 // CHECK19-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
23747 // CHECK19:       omp.dispatch.body:
23748 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
23749 // CHECK19-NEXT:    store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
23750 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
23751 // CHECK19:       omp.inner.for.cond:
23752 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
23753 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15
23754 // CHECK19-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
23755 // CHECK19-NEXT:    br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23756 // CHECK19:       omp.inner.for.body:
23757 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
23758 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
23759 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
23760 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !15
23761 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !15
23762 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP20]]
23763 // CHECK19-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15
23764 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
23765 // CHECK19:       omp.body.continue:
23766 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
23767 // CHECK19:       omp.inner.for.inc:
23768 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
23769 // CHECK19-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP21]], 1
23770 // CHECK19-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
23771 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
23772 // CHECK19:       omp.inner.for.end:
23773 // CHECK19-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
23774 // CHECK19:       omp.dispatch.inc:
23775 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND]]
23776 // CHECK19:       omp.dispatch.end:
23777 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
23778 // CHECK19:       omp.precond.end:
23779 // CHECK19-NEXT:    ret void
23780 //
23781 //
23782 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168
23783 // CHECK19-SAME: (i32 [[M:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
23784 // CHECK19-NEXT:  entry:
23785 // CHECK19-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 4
23786 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
23787 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
23788 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
23789 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
23790 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
23791 // CHECK19-NEXT:    store i32 [[M]], i32* [[M_ADDR]], align 4
23792 // CHECK19-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
23793 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
23794 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
23795 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
23796 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
23797 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4
23798 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
23799 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
23800 // CHECK19-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
23801 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
23802 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]])
23803 // CHECK19-NEXT:    ret void
23804 //
23805 //
23806 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..11
23807 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
23808 // CHECK19-NEXT:  entry:
23809 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
23810 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
23811 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
23812 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
23813 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
23814 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
23815 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
23816 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
23817 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
23818 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
23819 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
23820 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
23821 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
23822 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23823 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23824 // CHECK19-NEXT:    [[I4:%.*]] = alloca i32, align 4
23825 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
23826 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
23827 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
23828 // CHECK19-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
23829 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
23830 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
23831 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
23832 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
23833 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
23834 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
23835 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
23836 // CHECK19-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
23837 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23838 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
23839 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
23840 // CHECK19-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
23841 // CHECK19-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
23842 // CHECK19-NEXT:    store i32 0, i32* [[I]], align 4
23843 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23844 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
23845 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
23846 // CHECK19:       omp.precond.then:
23847 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
23848 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
23849 // CHECK19-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
23850 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
23851 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
23852 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23853 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
23854 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
23855 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23856 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
23857 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
23858 // CHECK19-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
23859 // CHECK19:       cond.true:
23860 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
23861 // CHECK19-NEXT:    br label [[COND_END:%.*]]
23862 // CHECK19:       cond.false:
23863 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23864 // CHECK19-NEXT:    br label [[COND_END]]
23865 // CHECK19:       cond.end:
23866 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
23867 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
23868 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
23869 // CHECK19-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
23870 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
23871 // CHECK19:       omp.inner.for.cond:
23872 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23873 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23874 // CHECK19-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
23875 // CHECK19-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23876 // CHECK19:       omp.inner.for.body:
23877 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
23878 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
23879 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
23880 // CHECK19-NEXT:    store i32 [[TMP18]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
23881 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
23882 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP19]])
23883 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
23884 // CHECK19:       omp.inner.for.inc:
23885 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
23886 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
23887 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
23888 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
23889 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
23890 // CHECK19:       omp.inner.for.end:
23891 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
23892 // CHECK19:       omp.loop.exit:
23893 // CHECK19-NEXT:    [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23894 // CHECK19-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
23895 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
23896 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
23897 // CHECK19:       omp.precond.end:
23898 // CHECK19-NEXT:    ret void
23899 //
23900 //
23901 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..12
23902 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
23903 // CHECK19-NEXT:  entry:
23904 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
23905 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
23906 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
23907 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
23908 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
23909 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
23910 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
23911 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
23912 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
23913 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
23914 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
23915 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
23916 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
23917 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
23918 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
23919 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
23920 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
23921 // CHECK19-NEXT:    [[I4:%.*]] = alloca i32, align 4
23922 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
23923 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
23924 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
23925 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
23926 // CHECK19-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
23927 // CHECK19-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
23928 // CHECK19-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
23929 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
23930 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
23931 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
23932 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
23933 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
23934 // CHECK19-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
23935 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23936 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
23937 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
23938 // CHECK19-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
23939 // CHECK19-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
23940 // CHECK19-NEXT:    store i32 0, i32* [[I]], align 4
23941 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
23942 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
23943 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
23944 // CHECK19:       omp.precond.then:
23945 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
23946 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
23947 // CHECK19-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
23948 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
23949 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
23950 // CHECK19-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
23951 // CHECK19-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
23952 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
23953 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
23954 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
23955 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
23956 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
23957 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23958 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
23959 // CHECK19-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]])
23960 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
23961 // CHECK19:       omp.dispatch.cond:
23962 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
23963 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
23964 // CHECK19-NEXT:    [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
23965 // CHECK19-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0
23966 // CHECK19-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
23967 // CHECK19:       omp.dispatch.body:
23968 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
23969 // CHECK19-NEXT:    store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4
23970 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
23971 // CHECK19:       omp.inner.for.cond:
23972 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
23973 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18
23974 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
23975 // CHECK19-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
23976 // CHECK19:       omp.inner.for.body:
23977 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
23978 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
23979 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
23980 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !18
23981 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !18
23982 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP21]]
23983 // CHECK19-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18
23984 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
23985 // CHECK19:       omp.body.continue:
23986 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
23987 // CHECK19:       omp.inner.for.inc:
23988 // CHECK19-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
23989 // CHECK19-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP22]], 1
23990 // CHECK19-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
23991 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
23992 // CHECK19:       omp.inner.for.end:
23993 // CHECK19-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
23994 // CHECK19:       omp.dispatch.inc:
23995 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND]]
23996 // CHECK19:       omp.dispatch.end:
23997 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
23998 // CHECK19:       omp.precond.end:
23999 // CHECK19-NEXT:    ret void
24000 //
24001 //
24002 // CHECK19-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
24003 // CHECK19-SAME: (i32 [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
24004 // CHECK19-NEXT:  entry:
24005 // CHECK19-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
24006 // CHECK19-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
24007 // CHECK19-NEXT:    [[M:%.*]] = alloca i32, align 4
24008 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
24009 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
24010 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
24011 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
24012 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4
24013 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4
24014 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4
24015 // CHECK19-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
24016 // CHECK19-NEXT:    [[M_CASTED:%.*]] = alloca i32, align 4
24017 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 4
24018 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 4
24019 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 4
24020 // CHECK19-NEXT:    [[_TMP10:%.*]] = alloca i32, align 4
24021 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 4
24022 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 4
24023 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 4
24024 // CHECK19-NEXT:    [[_TMP16:%.*]] = alloca i32, align 4
24025 // CHECK19-NEXT:    [[M_CASTED19:%.*]] = alloca i32, align 4
24026 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [2 x i8*], align 4
24027 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS21:%.*]] = alloca [2 x i8*], align 4
24028 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [2 x i8*], align 4
24029 // CHECK19-NEXT:    [[_TMP23:%.*]] = alloca i32, align 4
24030 // CHECK19-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
24031 // CHECK19-NEXT:    store i32 10, i32* [[M]], align 4
24032 // CHECK19-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
24033 // CHECK19-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
24034 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4
24035 // CHECK19-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
24036 // CHECK19-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
24037 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4
24038 // CHECK19-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
24039 // CHECK19-NEXT:    store i8* null, i8** [[TMP4]], align 4
24040 // CHECK19-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
24041 // CHECK19-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
24042 // CHECK19-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
24043 // CHECK19-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
24044 // CHECK19-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
24045 // CHECK19-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
24046 // CHECK19:       omp_offload.failed:
24047 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]]
24048 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT]]
24049 // CHECK19:       omp_offload.cont:
24050 // CHECK19-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
24051 // CHECK19-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
24052 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4
24053 // CHECK19-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
24054 // CHECK19-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
24055 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4
24056 // CHECK19-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0
24057 // CHECK19-NEXT:    store i8* null, i8** [[TMP13]], align 4
24058 // CHECK19-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
24059 // CHECK19-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
24060 // CHECK19-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
24061 // CHECK19-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
24062 // CHECK19-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
24063 // CHECK19-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
24064 // CHECK19:       omp_offload.failed5:
24065 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121([10 x i32]* [[A]]) #[[ATTR3]]
24066 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT6]]
24067 // CHECK19:       omp_offload.cont6:
24068 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, i32* [[M]], align 4
24069 // CHECK19-NEXT:    store i32 [[TMP18]], i32* [[M_CASTED]], align 4
24070 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, i32* [[M_CASTED]], align 4
24071 // CHECK19-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
24072 // CHECK19-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32*
24073 // CHECK19-NEXT:    store i32 [[TMP19]], i32* [[TMP21]], align 4
24074 // CHECK19-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
24075 // CHECK19-NEXT:    [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32*
24076 // CHECK19-NEXT:    store i32 [[TMP19]], i32* [[TMP23]], align 4
24077 // CHECK19-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0
24078 // CHECK19-NEXT:    store i8* null, i8** [[TMP24]], align 4
24079 // CHECK19-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1
24080 // CHECK19-NEXT:    [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]**
24081 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 4
24082 // CHECK19-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1
24083 // CHECK19-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]**
24084 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 4
24085 // CHECK19-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 1
24086 // CHECK19-NEXT:    store i8* null, i8** [[TMP29]], align 4
24087 // CHECK19-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
24088 // CHECK19-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
24089 // CHECK19-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
24090 // CHECK19-NEXT:    [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
24091 // CHECK19-NEXT:    [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
24092 // CHECK19-NEXT:    br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
24093 // CHECK19:       omp_offload.failed11:
24094 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i32 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]]
24095 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT12]]
24096 // CHECK19:       omp_offload.cont12:
24097 // CHECK19-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
24098 // CHECK19-NEXT:    [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]**
24099 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 4
24100 // CHECK19-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
24101 // CHECK19-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]**
24102 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 4
24103 // CHECK19-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 0
24104 // CHECK19-NEXT:    store i8* null, i8** [[TMP38]], align 4
24105 // CHECK19-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
24106 // CHECK19-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
24107 // CHECK19-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
24108 // CHECK19-NEXT:    [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
24109 // CHECK19-NEXT:    [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0
24110 // CHECK19-NEXT:    br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
24111 // CHECK19:       omp_offload.failed17:
24112 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131([10 x i32]* [[A]]) #[[ATTR3]]
24113 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT18]]
24114 // CHECK19:       omp_offload.cont18:
24115 // CHECK19-NEXT:    [[TMP43:%.*]] = load i32, i32* [[M]], align 4
24116 // CHECK19-NEXT:    store i32 [[TMP43]], i32* [[M_CASTED19]], align 4
24117 // CHECK19-NEXT:    [[TMP44:%.*]] = load i32, i32* [[M_CASTED19]], align 4
24118 // CHECK19-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
24119 // CHECK19-NEXT:    [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32*
24120 // CHECK19-NEXT:    store i32 [[TMP44]], i32* [[TMP46]], align 4
24121 // CHECK19-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
24122 // CHECK19-NEXT:    [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32*
24123 // CHECK19-NEXT:    store i32 [[TMP44]], i32* [[TMP48]], align 4
24124 // CHECK19-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 0
24125 // CHECK19-NEXT:    store i8* null, i8** [[TMP49]], align 4
24126 // CHECK19-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1
24127 // CHECK19-NEXT:    [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]**
24128 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 4
24129 // CHECK19-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 1
24130 // CHECK19-NEXT:    [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]**
24131 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 4
24132 // CHECK19-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 1
24133 // CHECK19-NEXT:    store i8* null, i8** [[TMP54]], align 4
24134 // CHECK19-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
24135 // CHECK19-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
24136 // CHECK19-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
24137 // CHECK19-NEXT:    [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
24138 // CHECK19-NEXT:    [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0
24139 // CHECK19-NEXT:    br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]]
24140 // CHECK19:       omp_offload.failed24:
24141 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i32 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]]
24142 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT25]]
24143 // CHECK19:       omp_offload.cont25:
24144 // CHECK19-NEXT:    ret i32 0
24145 //
24146 //
24147 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
24148 // CHECK19-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
24149 // CHECK19-NEXT:  entry:
24150 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24151 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24152 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24153 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
24154 // CHECK19-NEXT:    ret void
24155 //
24156 //
24157 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..14
24158 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
24159 // CHECK19-NEXT:  entry:
24160 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
24161 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
24162 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24163 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
24164 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
24165 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
24166 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
24167 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24168 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24169 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
24170 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
24171 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
24172 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24173 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24174 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
24175 // CHECK19-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
24176 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
24177 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
24178 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
24179 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
24180 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
24181 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24182 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
24183 // CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
24184 // CHECK19:       cond.true:
24185 // CHECK19-NEXT:    br label [[COND_END:%.*]]
24186 // CHECK19:       cond.false:
24187 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24188 // CHECK19-NEXT:    br label [[COND_END]]
24189 // CHECK19:       cond.end:
24190 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
24191 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
24192 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
24193 // CHECK19-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
24194 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
24195 // CHECK19:       omp.inner.for.cond:
24196 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24197 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24198 // CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
24199 // CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24200 // CHECK19:       omp.inner.for.body:
24201 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
24202 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24203 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
24204 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
24205 // CHECK19:       omp.inner.for.inc:
24206 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24207 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
24208 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
24209 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
24210 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
24211 // CHECK19:       omp.inner.for.end:
24212 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
24213 // CHECK19:       omp.loop.exit:
24214 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
24215 // CHECK19-NEXT:    ret void
24216 //
24217 //
24218 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..15
24219 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
24220 // CHECK19-NEXT:  entry:
24221 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
24222 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
24223 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
24224 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
24225 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24226 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
24227 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
24228 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
24229 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
24230 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24231 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24232 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
24233 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
24234 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
24235 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
24236 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24237 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24238 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24239 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
24240 // CHECK19-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
24241 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
24242 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24243 // CHECK19-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
24244 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
24245 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
24246 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
24247 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
24248 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
24249 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
24250 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
24251 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
24252 // CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
24253 // CHECK19:       cond.true:
24254 // CHECK19-NEXT:    br label [[COND_END:%.*]]
24255 // CHECK19:       cond.false:
24256 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
24257 // CHECK19-NEXT:    br label [[COND_END]]
24258 // CHECK19:       cond.end:
24259 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
24260 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
24261 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
24262 // CHECK19-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
24263 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
24264 // CHECK19:       omp.inner.for.cond:
24265 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24266 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
24267 // CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
24268 // CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24269 // CHECK19:       omp.inner.for.body:
24270 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24271 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
24272 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
24273 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
24274 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
24275 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
24276 // CHECK19-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
24277 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
24278 // CHECK19:       omp.body.continue:
24279 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
24280 // CHECK19:       omp.inner.for.inc:
24281 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24282 // CHECK19-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
24283 // CHECK19-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
24284 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
24285 // CHECK19:       omp.inner.for.end:
24286 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
24287 // CHECK19:       omp.loop.exit:
24288 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
24289 // CHECK19-NEXT:    ret void
24290 //
24291 //
24292 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121
24293 // CHECK19-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
24294 // CHECK19-NEXT:  entry:
24295 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24296 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24297 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24298 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
24299 // CHECK19-NEXT:    ret void
24300 //
24301 //
24302 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..17
24303 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
24304 // CHECK19-NEXT:  entry:
24305 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
24306 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
24307 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24308 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
24309 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
24310 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
24311 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
24312 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24313 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24314 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
24315 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
24316 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
24317 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24318 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24319 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
24320 // CHECK19-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
24321 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
24322 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
24323 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
24324 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
24325 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
24326 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24327 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
24328 // CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
24329 // CHECK19:       cond.true:
24330 // CHECK19-NEXT:    br label [[COND_END:%.*]]
24331 // CHECK19:       cond.false:
24332 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24333 // CHECK19-NEXT:    br label [[COND_END]]
24334 // CHECK19:       cond.end:
24335 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
24336 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
24337 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
24338 // CHECK19-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
24339 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
24340 // CHECK19:       omp.inner.for.cond:
24341 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24342 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24343 // CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
24344 // CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24345 // CHECK19:       omp.inner.for.body:
24346 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
24347 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24348 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
24349 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
24350 // CHECK19:       omp.inner.for.inc:
24351 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24352 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
24353 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
24354 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
24355 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
24356 // CHECK19:       omp.inner.for.end:
24357 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
24358 // CHECK19:       omp.loop.exit:
24359 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
24360 // CHECK19-NEXT:    ret void
24361 //
24362 //
24363 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..18
24364 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
24365 // CHECK19-NEXT:  entry:
24366 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
24367 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
24368 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
24369 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
24370 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24371 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
24372 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
24373 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
24374 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
24375 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24376 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24377 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
24378 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
24379 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
24380 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
24381 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24382 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24383 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24384 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
24385 // CHECK19-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
24386 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
24387 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24388 // CHECK19-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
24389 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
24390 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
24391 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
24392 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
24393 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
24394 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
24395 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
24396 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
24397 // CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
24398 // CHECK19:       cond.true:
24399 // CHECK19-NEXT:    br label [[COND_END:%.*]]
24400 // CHECK19:       cond.false:
24401 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
24402 // CHECK19-NEXT:    br label [[COND_END]]
24403 // CHECK19:       cond.end:
24404 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
24405 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
24406 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
24407 // CHECK19-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
24408 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
24409 // CHECK19:       omp.inner.for.cond:
24410 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24411 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
24412 // CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
24413 // CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24414 // CHECK19:       omp.inner.for.body:
24415 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24416 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
24417 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
24418 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
24419 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
24420 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
24421 // CHECK19-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
24422 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
24423 // CHECK19:       omp.body.continue:
24424 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
24425 // CHECK19:       omp.inner.for.inc:
24426 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24427 // CHECK19-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
24428 // CHECK19-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
24429 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
24430 // CHECK19:       omp.inner.for.end:
24431 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
24432 // CHECK19:       omp.loop.exit:
24433 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
24434 // CHECK19-NEXT:    ret void
24435 //
24436 //
24437 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126
24438 // CHECK19-SAME: (i32 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
24439 // CHECK19-NEXT:  entry:
24440 // CHECK19-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 4
24441 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24442 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
24443 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
24444 // CHECK19-NEXT:    store i32 [[M]], i32* [[M_ADDR]], align 4
24445 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24446 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24447 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4
24448 // CHECK19-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
24449 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
24450 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
24451 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
24452 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]])
24453 // CHECK19-NEXT:    ret void
24454 //
24455 //
24456 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..21
24457 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
24458 // CHECK19-NEXT:  entry:
24459 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
24460 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
24461 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24462 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
24463 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
24464 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
24465 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
24466 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
24467 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24468 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24469 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
24470 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
24471 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
24472 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
24473 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24474 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
24475 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24476 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
24477 // CHECK19-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
24478 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
24479 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
24480 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
24481 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
24482 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
24483 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24484 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
24485 // CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
24486 // CHECK19:       cond.true:
24487 // CHECK19-NEXT:    br label [[COND_END:%.*]]
24488 // CHECK19:       cond.false:
24489 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24490 // CHECK19-NEXT:    br label [[COND_END]]
24491 // CHECK19:       cond.end:
24492 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
24493 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
24494 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
24495 // CHECK19-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
24496 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
24497 // CHECK19:       omp.inner.for.cond:
24498 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24499 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24500 // CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
24501 // CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24502 // CHECK19:       omp.inner.for.body:
24503 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
24504 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24505 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
24506 // CHECK19-NEXT:    store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
24507 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
24508 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]])
24509 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
24510 // CHECK19:       omp.inner.for.inc:
24511 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24512 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
24513 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
24514 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
24515 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
24516 // CHECK19:       omp.inner.for.end:
24517 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
24518 // CHECK19:       omp.loop.exit:
24519 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
24520 // CHECK19-NEXT:    ret void
24521 //
24522 //
24523 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..22
24524 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
24525 // CHECK19-NEXT:  entry:
24526 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
24527 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
24528 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
24529 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
24530 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24531 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
24532 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
24533 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
24534 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
24535 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
24536 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24537 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24538 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
24539 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
24540 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
24541 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
24542 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24543 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24544 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
24545 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24546 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
24547 // CHECK19-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
24548 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
24549 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24550 // CHECK19-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
24551 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
24552 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
24553 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
24554 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
24555 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
24556 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
24557 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
24558 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
24559 // CHECK19:       omp.dispatch.cond:
24560 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
24561 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24562 // CHECK19-NEXT:    [[CMP:%.*]] = icmp ugt i32 [[TMP6]], [[TMP7]]
24563 // CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
24564 // CHECK19:       cond.true:
24565 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24566 // CHECK19-NEXT:    br label [[COND_END:%.*]]
24567 // CHECK19:       cond.false:
24568 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
24569 // CHECK19-NEXT:    br label [[COND_END]]
24570 // CHECK19:       cond.end:
24571 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP8]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
24572 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
24573 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
24574 // CHECK19-NEXT:    store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
24575 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24576 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
24577 // CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
24578 // CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
24579 // CHECK19:       omp.dispatch.body:
24580 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
24581 // CHECK19:       omp.inner.for.cond:
24582 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24583 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
24584 // CHECK19-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
24585 // CHECK19-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24586 // CHECK19:       omp.inner.for.body:
24587 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24588 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
24589 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
24590 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
24591 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I]], align 4
24592 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP16]]
24593 // CHECK19-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
24594 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
24595 // CHECK19:       omp.body.continue:
24596 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
24597 // CHECK19:       omp.inner.for.inc:
24598 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24599 // CHECK19-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1
24600 // CHECK19-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
24601 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
24602 // CHECK19:       omp.inner.for.end:
24603 // CHECK19-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
24604 // CHECK19:       omp.dispatch.inc:
24605 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
24606 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
24607 // CHECK19-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
24608 // CHECK19-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
24609 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
24610 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
24611 // CHECK19-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
24612 // CHECK19-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
24613 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND]]
24614 // CHECK19:       omp.dispatch.end:
24615 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
24616 // CHECK19-NEXT:    ret void
24617 //
24618 //
24619 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131
24620 // CHECK19-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
24621 // CHECK19-NEXT:  entry:
24622 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24623 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24624 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24625 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
24626 // CHECK19-NEXT:    ret void
24627 //
24628 //
24629 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..25
24630 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
24631 // CHECK19-NEXT:  entry:
24632 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
24633 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
24634 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24635 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
24636 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
24637 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
24638 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
24639 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24640 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24641 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
24642 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
24643 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
24644 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24645 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24646 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
24647 // CHECK19-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
24648 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
24649 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
24650 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
24651 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
24652 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
24653 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24654 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
24655 // CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
24656 // CHECK19:       cond.true:
24657 // CHECK19-NEXT:    br label [[COND_END:%.*]]
24658 // CHECK19:       cond.false:
24659 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24660 // CHECK19-NEXT:    br label [[COND_END]]
24661 // CHECK19:       cond.end:
24662 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
24663 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
24664 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
24665 // CHECK19-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
24666 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
24667 // CHECK19:       omp.inner.for.cond:
24668 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24669 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24670 // CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
24671 // CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24672 // CHECK19:       omp.inner.for.body:
24673 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
24674 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24675 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
24676 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
24677 // CHECK19:       omp.inner.for.inc:
24678 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24679 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
24680 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
24681 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
24682 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
24683 // CHECK19:       omp.inner.for.end:
24684 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
24685 // CHECK19:       omp.loop.exit:
24686 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
24687 // CHECK19-NEXT:    ret void
24688 //
24689 //
24690 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..26
24691 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
24692 // CHECK19-NEXT:  entry:
24693 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
24694 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
24695 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
24696 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
24697 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24698 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
24699 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
24700 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
24701 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
24702 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24703 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24704 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
24705 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
24706 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
24707 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
24708 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24709 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24710 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24711 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
24712 // CHECK19-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
24713 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
24714 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24715 // CHECK19-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
24716 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
24717 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
24718 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
24719 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
24720 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
24721 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
24722 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
24723 // CHECK19-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
24724 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
24725 // CHECK19:       omp.dispatch.cond:
24726 // CHECK19-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
24727 // CHECK19-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
24728 // CHECK19-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
24729 // CHECK19:       omp.dispatch.body:
24730 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
24731 // CHECK19-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
24732 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
24733 // CHECK19:       omp.inner.for.cond:
24734 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
24735 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21
24736 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
24737 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24738 // CHECK19:       omp.inner.for.body:
24739 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
24740 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
24741 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
24742 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21
24743 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21
24744 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP12]]
24745 // CHECK19-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21
24746 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
24747 // CHECK19:       omp.body.continue:
24748 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
24749 // CHECK19:       omp.inner.for.inc:
24750 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
24751 // CHECK19-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
24752 // CHECK19-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
24753 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
24754 // CHECK19:       omp.inner.for.end:
24755 // CHECK19-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
24756 // CHECK19:       omp.dispatch.inc:
24757 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND]]
24758 // CHECK19:       omp.dispatch.end:
24759 // CHECK19-NEXT:    ret void
24760 //
24761 //
24762 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136
24763 // CHECK19-SAME: (i32 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
24764 // CHECK19-NEXT:  entry:
24765 // CHECK19-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 4
24766 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24767 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
24768 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
24769 // CHECK19-NEXT:    store i32 [[M]], i32* [[M_ADDR]], align 4
24770 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24771 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24772 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4
24773 // CHECK19-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
24774 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
24775 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
24776 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
24777 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]])
24778 // CHECK19-NEXT:    ret void
24779 //
24780 //
24781 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..29
24782 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
24783 // CHECK19-NEXT:  entry:
24784 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
24785 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
24786 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24787 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
24788 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
24789 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
24790 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
24791 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
24792 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24793 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24794 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
24795 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
24796 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
24797 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
24798 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24799 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
24800 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24801 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
24802 // CHECK19-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
24803 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
24804 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
24805 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
24806 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
24807 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
24808 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24809 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
24810 // CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
24811 // CHECK19:       cond.true:
24812 // CHECK19-NEXT:    br label [[COND_END:%.*]]
24813 // CHECK19:       cond.false:
24814 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24815 // CHECK19-NEXT:    br label [[COND_END]]
24816 // CHECK19:       cond.end:
24817 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
24818 // CHECK19-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
24819 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
24820 // CHECK19-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
24821 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
24822 // CHECK19:       omp.inner.for.cond:
24823 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24824 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24825 // CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
24826 // CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24827 // CHECK19:       omp.inner.for.body:
24828 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
24829 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
24830 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
24831 // CHECK19-NEXT:    store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
24832 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
24833 // CHECK19-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]])
24834 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
24835 // CHECK19:       omp.inner.for.inc:
24836 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
24837 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
24838 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
24839 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
24840 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
24841 // CHECK19:       omp.inner.for.end:
24842 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
24843 // CHECK19:       omp.loop.exit:
24844 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
24845 // CHECK19-NEXT:    ret void
24846 //
24847 //
24848 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..30
24849 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
24850 // CHECK19-NEXT:  entry:
24851 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
24852 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
24853 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
24854 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
24855 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
24856 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
24857 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
24858 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
24859 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
24860 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
24861 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
24862 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
24863 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
24864 // CHECK19-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
24865 // CHECK19-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
24866 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
24867 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24868 // CHECK19-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
24869 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
24870 // CHECK19-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
24871 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
24872 // CHECK19-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
24873 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
24874 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
24875 // CHECK19-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
24876 // CHECK19-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
24877 // CHECK19-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
24878 // CHECK19-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
24879 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
24880 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
24881 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
24882 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
24883 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
24884 // CHECK19-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
24885 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
24886 // CHECK19:       omp.dispatch.cond:
24887 // CHECK19-NEXT:    [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
24888 // CHECK19-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
24889 // CHECK19-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
24890 // CHECK19:       omp.dispatch.body:
24891 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
24892 // CHECK19-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
24893 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
24894 // CHECK19:       omp.inner.for.cond:
24895 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
24896 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !24
24897 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
24898 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
24899 // CHECK19:       omp.inner.for.body:
24900 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
24901 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
24902 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
24903 // CHECK19-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !24
24904 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !24
24905 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP13]]
24906 // CHECK19-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !24
24907 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
24908 // CHECK19:       omp.body.continue:
24909 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
24910 // CHECK19:       omp.inner.for.inc:
24911 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
24912 // CHECK19-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP14]], 1
24913 // CHECK19-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
24914 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
24915 // CHECK19:       omp.inner.for.end:
24916 // CHECK19-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
24917 // CHECK19:       omp.dispatch.inc:
24918 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND]]
24919 // CHECK19:       omp.dispatch.end:
24920 // CHECK19-NEXT:    ret void
24921 //
24922 //
24923 // CHECK19-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
24924 // CHECK19-SAME: () #[[ATTR5:[0-9]+]] {
24925 // CHECK19-NEXT:  entry:
24926 // CHECK19-NEXT:    call void @__tgt_register_requires(i64 1)
24927 // CHECK19-NEXT:    ret void
24928 //
24929 //
24930 // CHECK20-LABEL: define {{[^@]+}}@main
24931 // CHECK20-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
24932 // CHECK20-NEXT:  entry:
24933 // CHECK20-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
24934 // CHECK20-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
24935 // CHECK20-NEXT:    [[ARGV_ADDR:%.*]] = alloca i8**, align 4
24936 // CHECK20-NEXT:    [[N:%.*]] = alloca i32, align 4
24937 // CHECK20-NEXT:    [[SAVED_STACK:%.*]] = alloca i8*, align 4
24938 // CHECK20-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i32, align 4
24939 // CHECK20-NEXT:    [[M:%.*]] = alloca i32, align 4
24940 // CHECK20-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
24941 // CHECK20-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4
24942 // CHECK20-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4
24943 // CHECK20-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4
24944 // CHECK20-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
24945 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
24946 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
24947 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
24948 // CHECK20-NEXT:    [[N_CASTED3:%.*]] = alloca i32, align 4
24949 // CHECK20-NEXT:    [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4
24950 // CHECK20-NEXT:    [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4
24951 // CHECK20-NEXT:    [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4
24952 // CHECK20-NEXT:    [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4
24953 // CHECK20-NEXT:    [[_TMP8:%.*]] = alloca i32, align 4
24954 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
24955 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
24956 // CHECK20-NEXT:    [[M_CASTED:%.*]] = alloca i32, align 4
24957 // CHECK20-NEXT:    [[N_CASTED17:%.*]] = alloca i32, align 4
24958 // CHECK20-NEXT:    [[DOTOFFLOAD_BASEPTRS18:%.*]] = alloca [4 x i8*], align 4
24959 // CHECK20-NEXT:    [[DOTOFFLOAD_PTRS19:%.*]] = alloca [4 x i8*], align 4
24960 // CHECK20-NEXT:    [[DOTOFFLOAD_MAPPERS20:%.*]] = alloca [4 x i8*], align 4
24961 // CHECK20-NEXT:    [[DOTOFFLOAD_SIZES21:%.*]] = alloca [4 x i64], align 4
24962 // CHECK20-NEXT:    [[_TMP22:%.*]] = alloca i32, align 4
24963 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_23:%.*]] = alloca i32, align 4
24964 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4
24965 // CHECK20-NEXT:    [[N_CASTED31:%.*]] = alloca i32, align 4
24966 // CHECK20-NEXT:    [[DOTOFFLOAD_BASEPTRS32:%.*]] = alloca [3 x i8*], align 4
24967 // CHECK20-NEXT:    [[DOTOFFLOAD_PTRS33:%.*]] = alloca [3 x i8*], align 4
24968 // CHECK20-NEXT:    [[DOTOFFLOAD_MAPPERS34:%.*]] = alloca [3 x i8*], align 4
24969 // CHECK20-NEXT:    [[DOTOFFLOAD_SIZES35:%.*]] = alloca [3 x i64], align 4
24970 // CHECK20-NEXT:    [[_TMP36:%.*]] = alloca i32, align 4
24971 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_37:%.*]] = alloca i32, align 4
24972 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4
24973 // CHECK20-NEXT:    [[M_CASTED45:%.*]] = alloca i32, align 4
24974 // CHECK20-NEXT:    [[N_CASTED46:%.*]] = alloca i32, align 4
24975 // CHECK20-NEXT:    [[DOTOFFLOAD_BASEPTRS47:%.*]] = alloca [4 x i8*], align 4
24976 // CHECK20-NEXT:    [[DOTOFFLOAD_PTRS48:%.*]] = alloca [4 x i8*], align 4
24977 // CHECK20-NEXT:    [[DOTOFFLOAD_MAPPERS49:%.*]] = alloca [4 x i8*], align 4
24978 // CHECK20-NEXT:    [[DOTOFFLOAD_SIZES50:%.*]] = alloca [4 x i64], align 4
24979 // CHECK20-NEXT:    [[_TMP51:%.*]] = alloca i32, align 4
24980 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_52:%.*]] = alloca i32, align 4
24981 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_53:%.*]] = alloca i32, align 4
24982 // CHECK20-NEXT:    store i32 0, i32* [[RETVAL]], align 4
24983 // CHECK20-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
24984 // CHECK20-NEXT:    store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
24985 // CHECK20-NEXT:    store i32 100, i32* [[N]], align 4
24986 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N]], align 4
24987 // CHECK20-NEXT:    [[TMP1:%.*]] = call i8* @llvm.stacksave()
24988 // CHECK20-NEXT:    store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
24989 // CHECK20-NEXT:    [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
24990 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
24991 // CHECK20-NEXT:    store i32 10, i32* [[M]], align 4
24992 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[N]], align 4
24993 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[N_CASTED]], align 4
24994 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4
24995 // CHECK20-NEXT:    [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4
24996 // CHECK20-NEXT:    [[TMP5:%.*]] = sext i32 [[TMP4]] to i64
24997 // CHECK20-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
24998 // CHECK20-NEXT:    [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32*
24999 // CHECK20-NEXT:    store i32 [[TMP3]], i32* [[TMP7]], align 4
25000 // CHECK20-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
25001 // CHECK20-NEXT:    [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32*
25002 // CHECK20-NEXT:    store i32 [[TMP3]], i32* [[TMP9]], align 4
25003 // CHECK20-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
25004 // CHECK20-NEXT:    store i64 4, i64* [[TMP10]], align 4
25005 // CHECK20-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
25006 // CHECK20-NEXT:    store i8* null, i8** [[TMP11]], align 4
25007 // CHECK20-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
25008 // CHECK20-NEXT:    [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32*
25009 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[TMP13]], align 4
25010 // CHECK20-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1
25011 // CHECK20-NEXT:    [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32*
25012 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[TMP15]], align 4
25013 // CHECK20-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1
25014 // CHECK20-NEXT:    store i64 4, i64* [[TMP16]], align 4
25015 // CHECK20-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
25016 // CHECK20-NEXT:    store i8* null, i8** [[TMP17]], align 4
25017 // CHECK20-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
25018 // CHECK20-NEXT:    [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32**
25019 // CHECK20-NEXT:    store i32* [[VLA]], i32** [[TMP19]], align 4
25020 // CHECK20-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2
25021 // CHECK20-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32**
25022 // CHECK20-NEXT:    store i32* [[VLA]], i32** [[TMP21]], align 4
25023 // CHECK20-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2
25024 // CHECK20-NEXT:    store i64 [[TMP5]], i64* [[TMP22]], align 4
25025 // CHECK20-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
25026 // CHECK20-NEXT:    store i8* null, i8** [[TMP23]], align 4
25027 // CHECK20-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
25028 // CHECK20-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
25029 // CHECK20-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0
25030 // CHECK20-NEXT:    [[TMP27:%.*]] = load i32, i32* [[N]], align 4
25031 // CHECK20-NEXT:    store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4
25032 // CHECK20-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25033 // CHECK20-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0
25034 // CHECK20-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
25035 // CHECK20-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
25036 // CHECK20-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
25037 // CHECK20-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25038 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP29]], 1
25039 // CHECK20-NEXT:    [[TMP30:%.*]] = zext i32 [[ADD]] to i64
25040 // CHECK20-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]])
25041 // CHECK20-NEXT:    [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
25042 // CHECK20-NEXT:    [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
25043 // CHECK20-NEXT:    br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
25044 // CHECK20:       omp_offload.failed:
25045 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]]
25046 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT]]
25047 // CHECK20:       omp_offload.cont:
25048 // CHECK20-NEXT:    [[TMP33:%.*]] = load i32, i32* [[N]], align 4
25049 // CHECK20-NEXT:    store i32 [[TMP33]], i32* [[N_CASTED3]], align 4
25050 // CHECK20-NEXT:    [[TMP34:%.*]] = load i32, i32* [[N_CASTED3]], align 4
25051 // CHECK20-NEXT:    [[TMP35:%.*]] = mul nuw i32 [[TMP0]], 4
25052 // CHECK20-NEXT:    [[TMP36:%.*]] = sext i32 [[TMP35]] to i64
25053 // CHECK20-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
25054 // CHECK20-NEXT:    [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32*
25055 // CHECK20-NEXT:    store i32 [[TMP34]], i32* [[TMP38]], align 4
25056 // CHECK20-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
25057 // CHECK20-NEXT:    [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32*
25058 // CHECK20-NEXT:    store i32 [[TMP34]], i32* [[TMP40]], align 4
25059 // CHECK20-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
25060 // CHECK20-NEXT:    store i64 4, i64* [[TMP41]], align 4
25061 // CHECK20-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0
25062 // CHECK20-NEXT:    store i8* null, i8** [[TMP42]], align 4
25063 // CHECK20-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
25064 // CHECK20-NEXT:    [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i32*
25065 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[TMP44]], align 4
25066 // CHECK20-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
25067 // CHECK20-NEXT:    [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32*
25068 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[TMP46]], align 4
25069 // CHECK20-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 1
25070 // CHECK20-NEXT:    store i64 4, i64* [[TMP47]], align 4
25071 // CHECK20-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1
25072 // CHECK20-NEXT:    store i8* null, i8** [[TMP48]], align 4
25073 // CHECK20-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
25074 // CHECK20-NEXT:    [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32**
25075 // CHECK20-NEXT:    store i32* [[VLA]], i32** [[TMP50]], align 4
25076 // CHECK20-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
25077 // CHECK20-NEXT:    [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32**
25078 // CHECK20-NEXT:    store i32* [[VLA]], i32** [[TMP52]], align 4
25079 // CHECK20-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
25080 // CHECK20-NEXT:    store i64 [[TMP36]], i64* [[TMP53]], align 4
25081 // CHECK20-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2
25082 // CHECK20-NEXT:    store i8* null, i8** [[TMP54]], align 4
25083 // CHECK20-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
25084 // CHECK20-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
25085 // CHECK20-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
25086 // CHECK20-NEXT:    [[TMP58:%.*]] = load i32, i32* [[N]], align 4
25087 // CHECK20-NEXT:    store i32 [[TMP58]], i32* [[DOTCAPTURE_EXPR_9]], align 4
25088 // CHECK20-NEXT:    [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4
25089 // CHECK20-NEXT:    [[SUB11:%.*]] = sub nsw i32 [[TMP59]], 0
25090 // CHECK20-NEXT:    [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
25091 // CHECK20-NEXT:    [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
25092 // CHECK20-NEXT:    store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4
25093 // CHECK20-NEXT:    [[TMP60:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4
25094 // CHECK20-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP60]], 1
25095 // CHECK20-NEXT:    [[TMP61:%.*]] = zext i32 [[ADD14]] to i64
25096 // CHECK20-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP61]])
25097 // CHECK20-NEXT:    [[TMP62:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, i32 3, i8** [[TMP55]], i8** [[TMP56]], i64* [[TMP57]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
25098 // CHECK20-NEXT:    [[TMP63:%.*]] = icmp ne i32 [[TMP62]], 0
25099 // CHECK20-NEXT:    br i1 [[TMP63]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]]
25100 // CHECK20:       omp_offload.failed15:
25101 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i32 [[TMP34]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
25102 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT16]]
25103 // CHECK20:       omp_offload.cont16:
25104 // CHECK20-NEXT:    [[TMP64:%.*]] = load i32, i32* [[M]], align 4
25105 // CHECK20-NEXT:    store i32 [[TMP64]], i32* [[M_CASTED]], align 4
25106 // CHECK20-NEXT:    [[TMP65:%.*]] = load i32, i32* [[M_CASTED]], align 4
25107 // CHECK20-NEXT:    [[TMP66:%.*]] = load i32, i32* [[N]], align 4
25108 // CHECK20-NEXT:    store i32 [[TMP66]], i32* [[N_CASTED17]], align 4
25109 // CHECK20-NEXT:    [[TMP67:%.*]] = load i32, i32* [[N_CASTED17]], align 4
25110 // CHECK20-NEXT:    [[TMP68:%.*]] = mul nuw i32 [[TMP0]], 4
25111 // CHECK20-NEXT:    [[TMP69:%.*]] = sext i32 [[TMP68]] to i64
25112 // CHECK20-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0
25113 // CHECK20-NEXT:    [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i32*
25114 // CHECK20-NEXT:    store i32 [[TMP65]], i32* [[TMP71]], align 4
25115 // CHECK20-NEXT:    [[TMP72:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0
25116 // CHECK20-NEXT:    [[TMP73:%.*]] = bitcast i8** [[TMP72]] to i32*
25117 // CHECK20-NEXT:    store i32 [[TMP65]], i32* [[TMP73]], align 4
25118 // CHECK20-NEXT:    [[TMP74:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0
25119 // CHECK20-NEXT:    store i64 4, i64* [[TMP74]], align 4
25120 // CHECK20-NEXT:    [[TMP75:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 0
25121 // CHECK20-NEXT:    store i8* null, i8** [[TMP75]], align 4
25122 // CHECK20-NEXT:    [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 1
25123 // CHECK20-NEXT:    [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i32*
25124 // CHECK20-NEXT:    store i32 [[TMP67]], i32* [[TMP77]], align 4
25125 // CHECK20-NEXT:    [[TMP78:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 1
25126 // CHECK20-NEXT:    [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i32*
25127 // CHECK20-NEXT:    store i32 [[TMP67]], i32* [[TMP79]], align 4
25128 // CHECK20-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 1
25129 // CHECK20-NEXT:    store i64 4, i64* [[TMP80]], align 4
25130 // CHECK20-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 1
25131 // CHECK20-NEXT:    store i8* null, i8** [[TMP81]], align 4
25132 // CHECK20-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 2
25133 // CHECK20-NEXT:    [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i32*
25134 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[TMP83]], align 4
25135 // CHECK20-NEXT:    [[TMP84:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 2
25136 // CHECK20-NEXT:    [[TMP85:%.*]] = bitcast i8** [[TMP84]] to i32*
25137 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[TMP85]], align 4
25138 // CHECK20-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 2
25139 // CHECK20-NEXT:    store i64 4, i64* [[TMP86]], align 4
25140 // CHECK20-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 2
25141 // CHECK20-NEXT:    store i8* null, i8** [[TMP87]], align 4
25142 // CHECK20-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 3
25143 // CHECK20-NEXT:    [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32**
25144 // CHECK20-NEXT:    store i32* [[VLA]], i32** [[TMP89]], align 4
25145 // CHECK20-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 3
25146 // CHECK20-NEXT:    [[TMP91:%.*]] = bitcast i8** [[TMP90]] to i32**
25147 // CHECK20-NEXT:    store i32* [[VLA]], i32** [[TMP91]], align 4
25148 // CHECK20-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 3
25149 // CHECK20-NEXT:    store i64 [[TMP69]], i64* [[TMP92]], align 4
25150 // CHECK20-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 3
25151 // CHECK20-NEXT:    store i8* null, i8** [[TMP93]], align 4
25152 // CHECK20-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0
25153 // CHECK20-NEXT:    [[TMP95:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0
25154 // CHECK20-NEXT:    [[TMP96:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0
25155 // CHECK20-NEXT:    [[TMP97:%.*]] = load i32, i32* [[N]], align 4
25156 // CHECK20-NEXT:    store i32 [[TMP97]], i32* [[DOTCAPTURE_EXPR_23]], align 4
25157 // CHECK20-NEXT:    [[TMP98:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_23]], align 4
25158 // CHECK20-NEXT:    [[SUB25:%.*]] = sub nsw i32 [[TMP98]], 0
25159 // CHECK20-NEXT:    [[DIV26:%.*]] = sdiv i32 [[SUB25]], 1
25160 // CHECK20-NEXT:    [[SUB27:%.*]] = sub nsw i32 [[DIV26]], 1
25161 // CHECK20-NEXT:    store i32 [[SUB27]], i32* [[DOTCAPTURE_EXPR_24]], align 4
25162 // CHECK20-NEXT:    [[TMP99:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4
25163 // CHECK20-NEXT:    [[ADD28:%.*]] = add nsw i32 [[TMP99]], 1
25164 // CHECK20-NEXT:    [[TMP100:%.*]] = zext i32 [[ADD28]] to i64
25165 // CHECK20-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP100]])
25166 // CHECK20-NEXT:    [[TMP101:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, i32 4, i8** [[TMP94]], i8** [[TMP95]], i64* [[TMP96]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
25167 // CHECK20-NEXT:    [[TMP102:%.*]] = icmp ne i32 [[TMP101]], 0
25168 // CHECK20-NEXT:    br i1 [[TMP102]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]]
25169 // CHECK20:       omp_offload.failed29:
25170 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i32 [[TMP65]], i32 [[TMP67]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
25171 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT30]]
25172 // CHECK20:       omp_offload.cont30:
25173 // CHECK20-NEXT:    [[TMP103:%.*]] = load i32, i32* [[N]], align 4
25174 // CHECK20-NEXT:    store i32 [[TMP103]], i32* [[N_CASTED31]], align 4
25175 // CHECK20-NEXT:    [[TMP104:%.*]] = load i32, i32* [[N_CASTED31]], align 4
25176 // CHECK20-NEXT:    [[TMP105:%.*]] = mul nuw i32 [[TMP0]], 4
25177 // CHECK20-NEXT:    [[TMP106:%.*]] = sext i32 [[TMP105]] to i64
25178 // CHECK20-NEXT:    [[TMP107:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0
25179 // CHECK20-NEXT:    [[TMP108:%.*]] = bitcast i8** [[TMP107]] to i32*
25180 // CHECK20-NEXT:    store i32 [[TMP104]], i32* [[TMP108]], align 4
25181 // CHECK20-NEXT:    [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0
25182 // CHECK20-NEXT:    [[TMP110:%.*]] = bitcast i8** [[TMP109]] to i32*
25183 // CHECK20-NEXT:    store i32 [[TMP104]], i32* [[TMP110]], align 4
25184 // CHECK20-NEXT:    [[TMP111:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 0
25185 // CHECK20-NEXT:    store i64 4, i64* [[TMP111]], align 4
25186 // CHECK20-NEXT:    [[TMP112:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 0
25187 // CHECK20-NEXT:    store i8* null, i8** [[TMP112]], align 4
25188 // CHECK20-NEXT:    [[TMP113:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 1
25189 // CHECK20-NEXT:    [[TMP114:%.*]] = bitcast i8** [[TMP113]] to i32*
25190 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[TMP114]], align 4
25191 // CHECK20-NEXT:    [[TMP115:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 1
25192 // CHECK20-NEXT:    [[TMP116:%.*]] = bitcast i8** [[TMP115]] to i32*
25193 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[TMP116]], align 4
25194 // CHECK20-NEXT:    [[TMP117:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 1
25195 // CHECK20-NEXT:    store i64 4, i64* [[TMP117]], align 4
25196 // CHECK20-NEXT:    [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 1
25197 // CHECK20-NEXT:    store i8* null, i8** [[TMP118]], align 4
25198 // CHECK20-NEXT:    [[TMP119:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 2
25199 // CHECK20-NEXT:    [[TMP120:%.*]] = bitcast i8** [[TMP119]] to i32**
25200 // CHECK20-NEXT:    store i32* [[VLA]], i32** [[TMP120]], align 4
25201 // CHECK20-NEXT:    [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 2
25202 // CHECK20-NEXT:    [[TMP122:%.*]] = bitcast i8** [[TMP121]] to i32**
25203 // CHECK20-NEXT:    store i32* [[VLA]], i32** [[TMP122]], align 4
25204 // CHECK20-NEXT:    [[TMP123:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 2
25205 // CHECK20-NEXT:    store i64 [[TMP106]], i64* [[TMP123]], align 4
25206 // CHECK20-NEXT:    [[TMP124:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 2
25207 // CHECK20-NEXT:    store i8* null, i8** [[TMP124]], align 4
25208 // CHECK20-NEXT:    [[TMP125:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0
25209 // CHECK20-NEXT:    [[TMP126:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0
25210 // CHECK20-NEXT:    [[TMP127:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 0
25211 // CHECK20-NEXT:    [[TMP128:%.*]] = load i32, i32* [[N]], align 4
25212 // CHECK20-NEXT:    store i32 [[TMP128]], i32* [[DOTCAPTURE_EXPR_37]], align 4
25213 // CHECK20-NEXT:    [[TMP129:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_37]], align 4
25214 // CHECK20-NEXT:    [[SUB39:%.*]] = sub nsw i32 [[TMP129]], 0
25215 // CHECK20-NEXT:    [[DIV40:%.*]] = sdiv i32 [[SUB39]], 1
25216 // CHECK20-NEXT:    [[SUB41:%.*]] = sub nsw i32 [[DIV40]], 1
25217 // CHECK20-NEXT:    store i32 [[SUB41]], i32* [[DOTCAPTURE_EXPR_38]], align 4
25218 // CHECK20-NEXT:    [[TMP130:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_38]], align 4
25219 // CHECK20-NEXT:    [[ADD42:%.*]] = add nsw i32 [[TMP130]], 1
25220 // CHECK20-NEXT:    [[TMP131:%.*]] = zext i32 [[ADD42]] to i64
25221 // CHECK20-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP131]])
25222 // CHECK20-NEXT:    [[TMP132:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, i32 3, i8** [[TMP125]], i8** [[TMP126]], i64* [[TMP127]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
25223 // CHECK20-NEXT:    [[TMP133:%.*]] = icmp ne i32 [[TMP132]], 0
25224 // CHECK20-NEXT:    br i1 [[TMP133]], label [[OMP_OFFLOAD_FAILED43:%.*]], label [[OMP_OFFLOAD_CONT44:%.*]]
25225 // CHECK20:       omp_offload.failed43:
25226 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i32 [[TMP104]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
25227 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT44]]
25228 // CHECK20:       omp_offload.cont44:
25229 // CHECK20-NEXT:    [[TMP134:%.*]] = load i32, i32* [[M]], align 4
25230 // CHECK20-NEXT:    store i32 [[TMP134]], i32* [[M_CASTED45]], align 4
25231 // CHECK20-NEXT:    [[TMP135:%.*]] = load i32, i32* [[M_CASTED45]], align 4
25232 // CHECK20-NEXT:    [[TMP136:%.*]] = load i32, i32* [[N]], align 4
25233 // CHECK20-NEXT:    store i32 [[TMP136]], i32* [[N_CASTED46]], align 4
25234 // CHECK20-NEXT:    [[TMP137:%.*]] = load i32, i32* [[N_CASTED46]], align 4
25235 // CHECK20-NEXT:    [[TMP138:%.*]] = mul nuw i32 [[TMP0]], 4
25236 // CHECK20-NEXT:    [[TMP139:%.*]] = sext i32 [[TMP138]] to i64
25237 // CHECK20-NEXT:    [[TMP140:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0
25238 // CHECK20-NEXT:    [[TMP141:%.*]] = bitcast i8** [[TMP140]] to i32*
25239 // CHECK20-NEXT:    store i32 [[TMP135]], i32* [[TMP141]], align 4
25240 // CHECK20-NEXT:    [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0
25241 // CHECK20-NEXT:    [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i32*
25242 // CHECK20-NEXT:    store i32 [[TMP135]], i32* [[TMP143]], align 4
25243 // CHECK20-NEXT:    [[TMP144:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 0
25244 // CHECK20-NEXT:    store i64 4, i64* [[TMP144]], align 4
25245 // CHECK20-NEXT:    [[TMP145:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 0
25246 // CHECK20-NEXT:    store i8* null, i8** [[TMP145]], align 4
25247 // CHECK20-NEXT:    [[TMP146:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 1
25248 // CHECK20-NEXT:    [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i32*
25249 // CHECK20-NEXT:    store i32 [[TMP137]], i32* [[TMP147]], align 4
25250 // CHECK20-NEXT:    [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 1
25251 // CHECK20-NEXT:    [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i32*
25252 // CHECK20-NEXT:    store i32 [[TMP137]], i32* [[TMP149]], align 4
25253 // CHECK20-NEXT:    [[TMP150:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 1
25254 // CHECK20-NEXT:    store i64 4, i64* [[TMP150]], align 4
25255 // CHECK20-NEXT:    [[TMP151:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 1
25256 // CHECK20-NEXT:    store i8* null, i8** [[TMP151]], align 4
25257 // CHECK20-NEXT:    [[TMP152:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 2
25258 // CHECK20-NEXT:    [[TMP153:%.*]] = bitcast i8** [[TMP152]] to i32*
25259 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[TMP153]], align 4
25260 // CHECK20-NEXT:    [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 2
25261 // CHECK20-NEXT:    [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32*
25262 // CHECK20-NEXT:    store i32 [[TMP0]], i32* [[TMP155]], align 4
25263 // CHECK20-NEXT:    [[TMP156:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 2
25264 // CHECK20-NEXT:    store i64 4, i64* [[TMP156]], align 4
25265 // CHECK20-NEXT:    [[TMP157:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 2
25266 // CHECK20-NEXT:    store i8* null, i8** [[TMP157]], align 4
25267 // CHECK20-NEXT:    [[TMP158:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 3
25268 // CHECK20-NEXT:    [[TMP159:%.*]] = bitcast i8** [[TMP158]] to i32**
25269 // CHECK20-NEXT:    store i32* [[VLA]], i32** [[TMP159]], align 4
25270 // CHECK20-NEXT:    [[TMP160:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 3
25271 // CHECK20-NEXT:    [[TMP161:%.*]] = bitcast i8** [[TMP160]] to i32**
25272 // CHECK20-NEXT:    store i32* [[VLA]], i32** [[TMP161]], align 4
25273 // CHECK20-NEXT:    [[TMP162:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 3
25274 // CHECK20-NEXT:    store i64 [[TMP139]], i64* [[TMP162]], align 4
25275 // CHECK20-NEXT:    [[TMP163:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 3
25276 // CHECK20-NEXT:    store i8* null, i8** [[TMP163]], align 4
25277 // CHECK20-NEXT:    [[TMP164:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0
25278 // CHECK20-NEXT:    [[TMP165:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0
25279 // CHECK20-NEXT:    [[TMP166:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 0
25280 // CHECK20-NEXT:    [[TMP167:%.*]] = load i32, i32* [[N]], align 4
25281 // CHECK20-NEXT:    store i32 [[TMP167]], i32* [[DOTCAPTURE_EXPR_52]], align 4
25282 // CHECK20-NEXT:    [[TMP168:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_52]], align 4
25283 // CHECK20-NEXT:    [[SUB54:%.*]] = sub nsw i32 [[TMP168]], 0
25284 // CHECK20-NEXT:    [[DIV55:%.*]] = sdiv i32 [[SUB54]], 1
25285 // CHECK20-NEXT:    [[SUB56:%.*]] = sub nsw i32 [[DIV55]], 1
25286 // CHECK20-NEXT:    store i32 [[SUB56]], i32* [[DOTCAPTURE_EXPR_53]], align 4
25287 // CHECK20-NEXT:    [[TMP169:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_53]], align 4
25288 // CHECK20-NEXT:    [[ADD57:%.*]] = add nsw i32 [[TMP169]], 1
25289 // CHECK20-NEXT:    [[TMP170:%.*]] = zext i32 [[ADD57]] to i64
25290 // CHECK20-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP170]])
25291 // CHECK20-NEXT:    [[TMP171:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, i32 4, i8** [[TMP164]], i8** [[TMP165]], i64* [[TMP166]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
25292 // CHECK20-NEXT:    [[TMP172:%.*]] = icmp ne i32 [[TMP171]], 0
25293 // CHECK20-NEXT:    br i1 [[TMP172]], label [[OMP_OFFLOAD_FAILED58:%.*]], label [[OMP_OFFLOAD_CONT59:%.*]]
25294 // CHECK20:       omp_offload.failed58:
25295 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i32 [[TMP135]], i32 [[TMP137]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]]
25296 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT59]]
25297 // CHECK20:       omp_offload.cont59:
25298 // CHECK20-NEXT:    [[TMP173:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
25299 // CHECK20-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP173]])
25300 // CHECK20-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
25301 // CHECK20-NEXT:    [[TMP174:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
25302 // CHECK20-NEXT:    call void @llvm.stackrestore(i8* [[TMP174]])
25303 // CHECK20-NEXT:    [[TMP175:%.*]] = load i32, i32* [[RETVAL]], align 4
25304 // CHECK20-NEXT:    ret i32 [[TMP175]]
25305 //
25306 //
25307 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148
25308 // CHECK20-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
25309 // CHECK20-NEXT:  entry:
25310 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
25311 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
25312 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
25313 // CHECK20-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
25314 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25315 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
25316 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25317 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25318 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
25319 // CHECK20-NEXT:    ret void
25320 //
25321 //
25322 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined.
25323 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
25324 // CHECK20-NEXT:  entry:
25325 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
25326 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
25327 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
25328 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
25329 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
25330 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
25331 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
25332 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
25333 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
25334 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
25335 // CHECK20-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
25336 // CHECK20-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
25337 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25338 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25339 // CHECK20-NEXT:    [[I3:%.*]] = alloca i32, align 4
25340 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
25341 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
25342 // CHECK20-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
25343 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25344 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
25345 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
25346 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25347 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25348 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
25349 // CHECK20-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
25350 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25351 // CHECK20-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
25352 // CHECK20-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
25353 // CHECK20-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
25354 // CHECK20-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
25355 // CHECK20-NEXT:    store i32 0, i32* [[I]], align 4
25356 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25357 // CHECK20-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
25358 // CHECK20-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
25359 // CHECK20:       omp.precond.then:
25360 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
25361 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25362 // CHECK20-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
25363 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
25364 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
25365 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25366 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
25367 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
25368 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25369 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25370 // CHECK20-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
25371 // CHECK20-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
25372 // CHECK20:       cond.true:
25373 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25374 // CHECK20-NEXT:    br label [[COND_END:%.*]]
25375 // CHECK20:       cond.false:
25376 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25377 // CHECK20-NEXT:    br label [[COND_END]]
25378 // CHECK20:       cond.end:
25379 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
25380 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
25381 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
25382 // CHECK20-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
25383 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
25384 // CHECK20:       omp.inner.for.cond:
25385 // CHECK20-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25386 // CHECK20-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25387 // CHECK20-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
25388 // CHECK20-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25389 // CHECK20:       omp.inner.for.body:
25390 // CHECK20-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
25391 // CHECK20-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25392 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])
25393 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
25394 // CHECK20:       omp.inner.for.inc:
25395 // CHECK20-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25396 // CHECK20-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
25397 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
25398 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
25399 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
25400 // CHECK20:       omp.inner.for.end:
25401 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
25402 // CHECK20:       omp.loop.exit:
25403 // CHECK20-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25404 // CHECK20-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
25405 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
25406 // CHECK20-NEXT:    br label [[OMP_PRECOND_END]]
25407 // CHECK20:       omp.precond.end:
25408 // CHECK20-NEXT:    ret void
25409 //
25410 //
25411 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..1
25412 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
25413 // CHECK20-NEXT:  entry:
25414 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
25415 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
25416 // CHECK20-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
25417 // CHECK20-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
25418 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
25419 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
25420 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
25421 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
25422 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
25423 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
25424 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
25425 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
25426 // CHECK20-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
25427 // CHECK20-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
25428 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25429 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25430 // CHECK20-NEXT:    [[I3:%.*]] = alloca i32, align 4
25431 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
25432 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
25433 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
25434 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
25435 // CHECK20-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
25436 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25437 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
25438 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
25439 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25440 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25441 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
25442 // CHECK20-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
25443 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25444 // CHECK20-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
25445 // CHECK20-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
25446 // CHECK20-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
25447 // CHECK20-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
25448 // CHECK20-NEXT:    store i32 0, i32* [[I]], align 4
25449 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25450 // CHECK20-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
25451 // CHECK20-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
25452 // CHECK20:       omp.precond.then:
25453 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
25454 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25455 // CHECK20-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
25456 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
25457 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
25458 // CHECK20-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
25459 // CHECK20-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
25460 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
25461 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
25462 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25463 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
25464 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
25465 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
25466 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25467 // CHECK20-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
25468 // CHECK20-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
25469 // CHECK20:       cond.true:
25470 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25471 // CHECK20-NEXT:    br label [[COND_END:%.*]]
25472 // CHECK20:       cond.false:
25473 // CHECK20-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
25474 // CHECK20-NEXT:    br label [[COND_END]]
25475 // CHECK20:       cond.end:
25476 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
25477 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
25478 // CHECK20-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
25479 // CHECK20-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
25480 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
25481 // CHECK20:       omp.inner.for.cond:
25482 // CHECK20-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25483 // CHECK20-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
25484 // CHECK20-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
25485 // CHECK20-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25486 // CHECK20:       omp.inner.for.body:
25487 // CHECK20-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25488 // CHECK20-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
25489 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
25490 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4
25491 // CHECK20-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
25492 // CHECK20-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
25493 // CHECK20-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
25494 // CHECK20-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
25495 // CHECK20:       omp.body.continue:
25496 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
25497 // CHECK20:       omp.inner.for.inc:
25498 // CHECK20-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25499 // CHECK20-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1
25500 // CHECK20-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
25501 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
25502 // CHECK20:       omp.inner.for.end:
25503 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
25504 // CHECK20:       omp.loop.exit:
25505 // CHECK20-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25506 // CHECK20-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
25507 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
25508 // CHECK20-NEXT:    br label [[OMP_PRECOND_END]]
25509 // CHECK20:       omp.precond.end:
25510 // CHECK20-NEXT:    ret void
25511 //
25512 //
25513 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153
25514 // CHECK20-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
25515 // CHECK20-NEXT:  entry:
25516 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
25517 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
25518 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
25519 // CHECK20-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
25520 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25521 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
25522 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25523 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25524 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
25525 // CHECK20-NEXT:    ret void
25526 //
25527 //
25528 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..2
25529 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
25530 // CHECK20-NEXT:  entry:
25531 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
25532 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
25533 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
25534 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
25535 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
25536 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
25537 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
25538 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
25539 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
25540 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
25541 // CHECK20-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
25542 // CHECK20-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
25543 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25544 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25545 // CHECK20-NEXT:    [[I3:%.*]] = alloca i32, align 4
25546 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
25547 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
25548 // CHECK20-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
25549 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25550 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
25551 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
25552 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25553 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25554 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
25555 // CHECK20-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
25556 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25557 // CHECK20-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
25558 // CHECK20-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
25559 // CHECK20-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
25560 // CHECK20-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
25561 // CHECK20-NEXT:    store i32 0, i32* [[I]], align 4
25562 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25563 // CHECK20-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
25564 // CHECK20-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
25565 // CHECK20:       omp.precond.then:
25566 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
25567 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25568 // CHECK20-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
25569 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
25570 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
25571 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25572 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
25573 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
25574 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25575 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25576 // CHECK20-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
25577 // CHECK20-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
25578 // CHECK20:       cond.true:
25579 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25580 // CHECK20-NEXT:    br label [[COND_END:%.*]]
25581 // CHECK20:       cond.false:
25582 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25583 // CHECK20-NEXT:    br label [[COND_END]]
25584 // CHECK20:       cond.end:
25585 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
25586 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
25587 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
25588 // CHECK20-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
25589 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
25590 // CHECK20:       omp.inner.for.cond:
25591 // CHECK20-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25592 // CHECK20-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25593 // CHECK20-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
25594 // CHECK20-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25595 // CHECK20:       omp.inner.for.body:
25596 // CHECK20-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
25597 // CHECK20-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25598 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])
25599 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
25600 // CHECK20:       omp.inner.for.inc:
25601 // CHECK20-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25602 // CHECK20-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
25603 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
25604 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
25605 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
25606 // CHECK20:       omp.inner.for.end:
25607 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
25608 // CHECK20:       omp.loop.exit:
25609 // CHECK20-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25610 // CHECK20-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
25611 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
25612 // CHECK20-NEXT:    br label [[OMP_PRECOND_END]]
25613 // CHECK20:       omp.precond.end:
25614 // CHECK20-NEXT:    ret void
25615 //
25616 //
25617 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..3
25618 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
25619 // CHECK20-NEXT:  entry:
25620 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
25621 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
25622 // CHECK20-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
25623 // CHECK20-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
25624 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
25625 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
25626 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
25627 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
25628 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
25629 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
25630 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
25631 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
25632 // CHECK20-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
25633 // CHECK20-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
25634 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25635 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25636 // CHECK20-NEXT:    [[I3:%.*]] = alloca i32, align 4
25637 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
25638 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
25639 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
25640 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
25641 // CHECK20-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
25642 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25643 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
25644 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
25645 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25646 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25647 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
25648 // CHECK20-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
25649 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25650 // CHECK20-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
25651 // CHECK20-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
25652 // CHECK20-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
25653 // CHECK20-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
25654 // CHECK20-NEXT:    store i32 0, i32* [[I]], align 4
25655 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25656 // CHECK20-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
25657 // CHECK20-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
25658 // CHECK20:       omp.precond.then:
25659 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
25660 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25661 // CHECK20-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
25662 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
25663 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
25664 // CHECK20-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
25665 // CHECK20-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
25666 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
25667 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
25668 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25669 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
25670 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
25671 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
25672 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25673 // CHECK20-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
25674 // CHECK20-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
25675 // CHECK20:       cond.true:
25676 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25677 // CHECK20-NEXT:    br label [[COND_END:%.*]]
25678 // CHECK20:       cond.false:
25679 // CHECK20-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
25680 // CHECK20-NEXT:    br label [[COND_END]]
25681 // CHECK20:       cond.end:
25682 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
25683 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
25684 // CHECK20-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
25685 // CHECK20-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
25686 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
25687 // CHECK20:       omp.inner.for.cond:
25688 // CHECK20-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25689 // CHECK20-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
25690 // CHECK20-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
25691 // CHECK20-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25692 // CHECK20:       omp.inner.for.body:
25693 // CHECK20-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25694 // CHECK20-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
25695 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
25696 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4
25697 // CHECK20-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I3]], align 4
25698 // CHECK20-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
25699 // CHECK20-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
25700 // CHECK20-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
25701 // CHECK20:       omp.body.continue:
25702 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
25703 // CHECK20:       omp.inner.for.inc:
25704 // CHECK20-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25705 // CHECK20-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1
25706 // CHECK20-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4
25707 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
25708 // CHECK20:       omp.inner.for.end:
25709 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
25710 // CHECK20:       omp.loop.exit:
25711 // CHECK20-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25712 // CHECK20-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
25713 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
25714 // CHECK20-NEXT:    br label [[OMP_PRECOND_END]]
25715 // CHECK20:       omp.precond.end:
25716 // CHECK20-NEXT:    ret void
25717 //
25718 //
25719 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158
25720 // CHECK20-SAME: (i32 [[M:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
25721 // CHECK20-NEXT:  entry:
25722 // CHECK20-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 4
25723 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
25724 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
25725 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
25726 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
25727 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
25728 // CHECK20-NEXT:    store i32 [[M]], i32* [[M_ADDR]], align 4
25729 // CHECK20-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
25730 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25731 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
25732 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25733 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25734 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4
25735 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
25736 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
25737 // CHECK20-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
25738 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
25739 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]])
25740 // CHECK20-NEXT:    ret void
25741 //
25742 //
25743 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..5
25744 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
25745 // CHECK20-NEXT:  entry:
25746 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
25747 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
25748 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
25749 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
25750 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
25751 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
25752 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
25753 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
25754 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
25755 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
25756 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
25757 // CHECK20-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
25758 // CHECK20-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
25759 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25760 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25761 // CHECK20-NEXT:    [[I4:%.*]] = alloca i32, align 4
25762 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
25763 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
25764 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
25765 // CHECK20-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
25766 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25767 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
25768 // CHECK20-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
25769 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
25770 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25771 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25772 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
25773 // CHECK20-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
25774 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25775 // CHECK20-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
25776 // CHECK20-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
25777 // CHECK20-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
25778 // CHECK20-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
25779 // CHECK20-NEXT:    store i32 0, i32* [[I]], align 4
25780 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25781 // CHECK20-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
25782 // CHECK20-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
25783 // CHECK20:       omp.precond.then:
25784 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
25785 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
25786 // CHECK20-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
25787 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
25788 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
25789 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
25790 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25791 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4
25792 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])
25793 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25794 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
25795 // CHECK20-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
25796 // CHECK20-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
25797 // CHECK20:       cond.true:
25798 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
25799 // CHECK20-NEXT:    br label [[COND_END:%.*]]
25800 // CHECK20:       cond.false:
25801 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25802 // CHECK20-NEXT:    br label [[COND_END]]
25803 // CHECK20:       cond.end:
25804 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
25805 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
25806 // CHECK20-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
25807 // CHECK20-NEXT:    store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4
25808 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
25809 // CHECK20:       omp.inner.for.cond:
25810 // CHECK20-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25811 // CHECK20-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
25812 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP16]], 1
25813 // CHECK20-NEXT:    [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]]
25814 // CHECK20-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25815 // CHECK20:       omp.inner.for.body:
25816 // CHECK20-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
25817 // CHECK20-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25818 // CHECK20-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
25819 // CHECK20-NEXT:    store i32 [[TMP19]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
25820 // CHECK20-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
25821 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP20]])
25822 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
25823 // CHECK20:       omp.inner.for.inc:
25824 // CHECK20-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25825 // CHECK20-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
25826 // CHECK20-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
25827 // CHECK20-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
25828 // CHECK20-NEXT:    [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
25829 // CHECK20-NEXT:    [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
25830 // CHECK20-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
25831 // CHECK20-NEXT:    store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4
25832 // CHECK20-NEXT:    [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25833 // CHECK20-NEXT:    [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
25834 // CHECK20-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]
25835 // CHECK20-NEXT:    store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4
25836 // CHECK20-NEXT:    [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25837 // CHECK20-NEXT:    [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
25838 // CHECK20-NEXT:    [[CMP10:%.*]] = icmp sgt i32 [[TMP27]], [[TMP28]]
25839 // CHECK20-NEXT:    br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
25840 // CHECK20:       cond.true11:
25841 // CHECK20-NEXT:    [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
25842 // CHECK20-NEXT:    br label [[COND_END13:%.*]]
25843 // CHECK20:       cond.false12:
25844 // CHECK20-NEXT:    [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
25845 // CHECK20-NEXT:    br label [[COND_END13]]
25846 // CHECK20:       cond.end13:
25847 // CHECK20-NEXT:    [[COND14:%.*]] = phi i32 [ [[TMP29]], [[COND_TRUE11]] ], [ [[TMP30]], [[COND_FALSE12]] ]
25848 // CHECK20-NEXT:    store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4
25849 // CHECK20-NEXT:    [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
25850 // CHECK20-NEXT:    store i32 [[TMP31]], i32* [[DOTOMP_IV]], align 4
25851 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
25852 // CHECK20:       omp.inner.for.end:
25853 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
25854 // CHECK20:       omp.loop.exit:
25855 // CHECK20-NEXT:    [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25856 // CHECK20-NEXT:    [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4
25857 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]])
25858 // CHECK20-NEXT:    br label [[OMP_PRECOND_END]]
25859 // CHECK20:       omp.precond.end:
25860 // CHECK20-NEXT:    ret void
25861 //
25862 //
25863 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..6
25864 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
25865 // CHECK20-NEXT:  entry:
25866 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
25867 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
25868 // CHECK20-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
25869 // CHECK20-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
25870 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
25871 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
25872 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
25873 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
25874 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
25875 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
25876 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
25877 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
25878 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
25879 // CHECK20-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
25880 // CHECK20-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
25881 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25882 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25883 // CHECK20-NEXT:    [[I4:%.*]] = alloca i32, align 4
25884 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
25885 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
25886 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
25887 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
25888 // CHECK20-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
25889 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25890 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
25891 // CHECK20-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
25892 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
25893 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25894 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25895 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
25896 // CHECK20-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
25897 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25898 // CHECK20-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
25899 // CHECK20-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
25900 // CHECK20-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
25901 // CHECK20-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
25902 // CHECK20-NEXT:    store i32 0, i32* [[I]], align 4
25903 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
25904 // CHECK20-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
25905 // CHECK20-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
25906 // CHECK20:       omp.precond.then:
25907 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
25908 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
25909 // CHECK20-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
25910 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
25911 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
25912 // CHECK20-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
25913 // CHECK20-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
25914 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
25915 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
25916 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25917 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4
25918 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
25919 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
25920 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
25921 // CHECK20-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
25922 // CHECK20-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
25923 // CHECK20:       cond.true:
25924 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
25925 // CHECK20-NEXT:    br label [[COND_END:%.*]]
25926 // CHECK20:       cond.false:
25927 // CHECK20-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
25928 // CHECK20-NEXT:    br label [[COND_END]]
25929 // CHECK20:       cond.end:
25930 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
25931 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
25932 // CHECK20-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
25933 // CHECK20-NEXT:    store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4
25934 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
25935 // CHECK20:       omp.inner.for.cond:
25936 // CHECK20-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25937 // CHECK20-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
25938 // CHECK20-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
25939 // CHECK20-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
25940 // CHECK20:       omp.inner.for.body:
25941 // CHECK20-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25942 // CHECK20-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
25943 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
25944 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4
25945 // CHECK20-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I4]], align 4
25946 // CHECK20-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]]
25947 // CHECK20-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
25948 // CHECK20-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
25949 // CHECK20:       omp.body.continue:
25950 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
25951 // CHECK20:       omp.inner.for.inc:
25952 // CHECK20-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
25953 // CHECK20-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
25954 // CHECK20-NEXT:    store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4
25955 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
25956 // CHECK20:       omp.inner.for.end:
25957 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
25958 // CHECK20:       omp.loop.exit:
25959 // CHECK20-NEXT:    [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
25960 // CHECK20-NEXT:    [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
25961 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]])
25962 // CHECK20-NEXT:    br label [[OMP_PRECOND_END]]
25963 // CHECK20:       omp.precond.end:
25964 // CHECK20-NEXT:    ret void
25965 //
25966 //
25967 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163
25968 // CHECK20-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
25969 // CHECK20-NEXT:  entry:
25970 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
25971 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
25972 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
25973 // CHECK20-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
25974 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
25975 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
25976 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
25977 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
25978 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]])
25979 // CHECK20-NEXT:    ret void
25980 //
25981 //
25982 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..8
25983 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
25984 // CHECK20-NEXT:  entry:
25985 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
25986 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
25987 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
25988 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
25989 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
25990 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
25991 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
25992 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
25993 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
25994 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
25995 // CHECK20-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
25996 // CHECK20-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
25997 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
25998 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
25999 // CHECK20-NEXT:    [[I3:%.*]] = alloca i32, align 4
26000 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
26001 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
26002 // CHECK20-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
26003 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
26004 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
26005 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
26006 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
26007 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
26008 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
26009 // CHECK20-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
26010 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
26011 // CHECK20-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
26012 // CHECK20-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
26013 // CHECK20-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
26014 // CHECK20-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
26015 // CHECK20-NEXT:    store i32 0, i32* [[I]], align 4
26016 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
26017 // CHECK20-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
26018 // CHECK20-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
26019 // CHECK20:       omp.precond.then:
26020 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
26021 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
26022 // CHECK20-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
26023 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
26024 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
26025 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26026 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
26027 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
26028 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26029 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
26030 // CHECK20-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
26031 // CHECK20-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
26032 // CHECK20:       cond.true:
26033 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
26034 // CHECK20-NEXT:    br label [[COND_END:%.*]]
26035 // CHECK20:       cond.false:
26036 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26037 // CHECK20-NEXT:    br label [[COND_END]]
26038 // CHECK20:       cond.end:
26039 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
26040 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
26041 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
26042 // CHECK20-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
26043 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
26044 // CHECK20:       omp.inner.for.cond:
26045 // CHECK20-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26046 // CHECK20-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26047 // CHECK20-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
26048 // CHECK20-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26049 // CHECK20:       omp.inner.for.body:
26050 // CHECK20-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
26051 // CHECK20-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26052 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]])
26053 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
26054 // CHECK20:       omp.inner.for.inc:
26055 // CHECK20-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26056 // CHECK20-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
26057 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
26058 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
26059 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
26060 // CHECK20:       omp.inner.for.end:
26061 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
26062 // CHECK20:       omp.loop.exit:
26063 // CHECK20-NEXT:    [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26064 // CHECK20-NEXT:    [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4
26065 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]])
26066 // CHECK20-NEXT:    br label [[OMP_PRECOND_END]]
26067 // CHECK20:       omp.precond.end:
26068 // CHECK20-NEXT:    ret void
26069 //
26070 //
26071 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..9
26072 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
26073 // CHECK20-NEXT:  entry:
26074 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
26075 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
26076 // CHECK20-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
26077 // CHECK20-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
26078 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
26079 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
26080 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
26081 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
26082 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
26083 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
26084 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
26085 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
26086 // CHECK20-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
26087 // CHECK20-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
26088 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26089 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26090 // CHECK20-NEXT:    [[I3:%.*]] = alloca i32, align 4
26091 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
26092 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
26093 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
26094 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26095 // CHECK20-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
26096 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
26097 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
26098 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
26099 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
26100 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
26101 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
26102 // CHECK20-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4
26103 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
26104 // CHECK20-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
26105 // CHECK20-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
26106 // CHECK20-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
26107 // CHECK20-NEXT:    store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4
26108 // CHECK20-NEXT:    store i32 0, i32* [[I]], align 4
26109 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
26110 // CHECK20-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
26111 // CHECK20-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
26112 // CHECK20:       omp.precond.then:
26113 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
26114 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
26115 // CHECK20-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
26116 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
26117 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26118 // CHECK20-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
26119 // CHECK20-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
26120 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
26121 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
26122 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
26123 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26124 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26125 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4
26126 // CHECK20-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1)
26127 // CHECK20-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
26128 // CHECK20:       omp.dispatch.cond:
26129 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26130 // CHECK20-NEXT:    [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4
26131 // CHECK20-NEXT:    [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
26132 // CHECK20-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
26133 // CHECK20-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
26134 // CHECK20:       omp.dispatch.body:
26135 // CHECK20-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
26136 // CHECK20-NEXT:    store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4
26137 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
26138 // CHECK20:       omp.inner.for.cond:
26139 // CHECK20-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
26140 // CHECK20-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15
26141 // CHECK20-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
26142 // CHECK20-NEXT:    br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26143 // CHECK20:       omp.inner.for.body:
26144 // CHECK20-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
26145 // CHECK20-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
26146 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
26147 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !15
26148 // CHECK20-NEXT:    [[TMP20:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !15
26149 // CHECK20-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP20]]
26150 // CHECK20-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15
26151 // CHECK20-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
26152 // CHECK20:       omp.body.continue:
26153 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
26154 // CHECK20:       omp.inner.for.inc:
26155 // CHECK20-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
26156 // CHECK20-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP21]], 1
26157 // CHECK20-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15
26158 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
26159 // CHECK20:       omp.inner.for.end:
26160 // CHECK20-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
26161 // CHECK20:       omp.dispatch.inc:
26162 // CHECK20-NEXT:    br label [[OMP_DISPATCH_COND]]
26163 // CHECK20:       omp.dispatch.end:
26164 // CHECK20-NEXT:    br label [[OMP_PRECOND_END]]
26165 // CHECK20:       omp.precond.end:
26166 // CHECK20-NEXT:    ret void
26167 //
26168 //
26169 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168
26170 // CHECK20-SAME: (i32 [[M:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
26171 // CHECK20-NEXT:  entry:
26172 // CHECK20-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 4
26173 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
26174 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
26175 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
26176 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
26177 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
26178 // CHECK20-NEXT:    store i32 [[M]], i32* [[M_ADDR]], align 4
26179 // CHECK20-NEXT:    store i32 [[N]], i32* [[N_ADDR]], align 4
26180 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
26181 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
26182 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
26183 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4
26184 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4
26185 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4
26186 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
26187 // CHECK20-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
26188 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
26189 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]])
26190 // CHECK20-NEXT:    ret void
26191 //
26192 //
26193 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..11
26194 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
26195 // CHECK20-NEXT:  entry:
26196 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
26197 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
26198 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
26199 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
26200 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
26201 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
26202 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
26203 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
26204 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
26205 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
26206 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
26207 // CHECK20-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
26208 // CHECK20-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
26209 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26210 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26211 // CHECK20-NEXT:    [[I4:%.*]] = alloca i32, align 4
26212 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
26213 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
26214 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
26215 // CHECK20-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
26216 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
26217 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
26218 // CHECK20-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
26219 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
26220 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
26221 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
26222 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
26223 // CHECK20-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
26224 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
26225 // CHECK20-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
26226 // CHECK20-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
26227 // CHECK20-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
26228 // CHECK20-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
26229 // CHECK20-NEXT:    store i32 0, i32* [[I]], align 4
26230 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
26231 // CHECK20-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
26232 // CHECK20-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
26233 // CHECK20:       omp.precond.then:
26234 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
26235 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
26236 // CHECK20-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4
26237 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
26238 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
26239 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26240 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4
26241 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
26242 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26243 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
26244 // CHECK20-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
26245 // CHECK20-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
26246 // CHECK20:       cond.true:
26247 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
26248 // CHECK20-NEXT:    br label [[COND_END:%.*]]
26249 // CHECK20:       cond.false:
26250 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26251 // CHECK20-NEXT:    br label [[COND_END]]
26252 // CHECK20:       cond.end:
26253 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
26254 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
26255 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
26256 // CHECK20-NEXT:    store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4
26257 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
26258 // CHECK20:       omp.inner.for.cond:
26259 // CHECK20-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26260 // CHECK20-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26261 // CHECK20-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
26262 // CHECK20-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26263 // CHECK20:       omp.inner.for.body:
26264 // CHECK20-NEXT:    [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
26265 // CHECK20-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26266 // CHECK20-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
26267 // CHECK20-NEXT:    store i32 [[TMP18]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
26268 // CHECK20-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
26269 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP19]])
26270 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
26271 // CHECK20:       omp.inner.for.inc:
26272 // CHECK20-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26273 // CHECK20-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
26274 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
26275 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
26276 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
26277 // CHECK20:       omp.inner.for.end:
26278 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
26279 // CHECK20:       omp.loop.exit:
26280 // CHECK20-NEXT:    [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26281 // CHECK20-NEXT:    [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4
26282 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]])
26283 // CHECK20-NEXT:    br label [[OMP_PRECOND_END]]
26284 // CHECK20:       omp.precond.end:
26285 // CHECK20-NEXT:    ret void
26286 //
26287 //
26288 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..12
26289 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
26290 // CHECK20-NEXT:  entry:
26291 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
26292 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
26293 // CHECK20-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
26294 // CHECK20-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
26295 // CHECK20-NEXT:    [[N_ADDR:%.*]] = alloca i32*, align 4
26296 // CHECK20-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
26297 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca i32*, align 4
26298 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
26299 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
26300 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
26301 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
26302 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
26303 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
26304 // CHECK20-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
26305 // CHECK20-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
26306 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26307 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26308 // CHECK20-NEXT:    [[I4:%.*]] = alloca i32, align 4
26309 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
26310 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
26311 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
26312 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26313 // CHECK20-NEXT:    store i32* [[N]], i32** [[N_ADDR]], align 4
26314 // CHECK20-NEXT:    store i32 [[VLA]], i32* [[VLA_ADDR]], align 4
26315 // CHECK20-NEXT:    store i32* [[A]], i32** [[A_ADDR]], align 4
26316 // CHECK20-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
26317 // CHECK20-NEXT:    [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4
26318 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4
26319 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4
26320 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4
26321 // CHECK20-NEXT:    store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4
26322 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
26323 // CHECK20-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
26324 // CHECK20-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
26325 // CHECK20-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
26326 // CHECK20-NEXT:    store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4
26327 // CHECK20-NEXT:    store i32 0, i32* [[I]], align 4
26328 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4
26329 // CHECK20-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
26330 // CHECK20-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
26331 // CHECK20:       omp.precond.then:
26332 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
26333 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4
26334 // CHECK20-NEXT:    store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4
26335 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
26336 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26337 // CHECK20-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4
26338 // CHECK20-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4
26339 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
26340 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
26341 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
26342 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
26343 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26344 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26345 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4
26346 // CHECK20-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]])
26347 // CHECK20-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
26348 // CHECK20:       omp.dispatch.cond:
26349 // CHECK20-NEXT:    [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26350 // CHECK20-NEXT:    [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
26351 // CHECK20-NEXT:    [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
26352 // CHECK20-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0
26353 // CHECK20-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
26354 // CHECK20:       omp.dispatch.body:
26355 // CHECK20-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
26356 // CHECK20-NEXT:    store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4
26357 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
26358 // CHECK20:       omp.inner.for.cond:
26359 // CHECK20-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
26360 // CHECK20-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18
26361 // CHECK20-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
26362 // CHECK20-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26363 // CHECK20:       omp.inner.for.body:
26364 // CHECK20-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
26365 // CHECK20-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
26366 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
26367 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !18
26368 // CHECK20-NEXT:    [[TMP21:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !18
26369 // CHECK20-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP21]]
26370 // CHECK20-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18
26371 // CHECK20-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
26372 // CHECK20:       omp.body.continue:
26373 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
26374 // CHECK20:       omp.inner.for.inc:
26375 // CHECK20-NEXT:    [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
26376 // CHECK20-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP22]], 1
26377 // CHECK20-NEXT:    store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18
26378 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
26379 // CHECK20:       omp.inner.for.end:
26380 // CHECK20-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
26381 // CHECK20:       omp.dispatch.inc:
26382 // CHECK20-NEXT:    br label [[OMP_DISPATCH_COND]]
26383 // CHECK20:       omp.dispatch.end:
26384 // CHECK20-NEXT:    br label [[OMP_PRECOND_END]]
26385 // CHECK20:       omp.precond.end:
26386 // CHECK20-NEXT:    ret void
26387 //
26388 //
26389 // CHECK20-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
26390 // CHECK20-SAME: (i32 [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat {
26391 // CHECK20-NEXT:  entry:
26392 // CHECK20-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
26393 // CHECK20-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
26394 // CHECK20-NEXT:    [[M:%.*]] = alloca i32, align 4
26395 // CHECK20-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4
26396 // CHECK20-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4
26397 // CHECK20-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4
26398 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
26399 // CHECK20-NEXT:    [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4
26400 // CHECK20-NEXT:    [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4
26401 // CHECK20-NEXT:    [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4
26402 // CHECK20-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
26403 // CHECK20-NEXT:    [[M_CASTED:%.*]] = alloca i32, align 4
26404 // CHECK20-NEXT:    [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 4
26405 // CHECK20-NEXT:    [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 4
26406 // CHECK20-NEXT:    [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 4
26407 // CHECK20-NEXT:    [[_TMP10:%.*]] = alloca i32, align 4
26408 // CHECK20-NEXT:    [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 4
26409 // CHECK20-NEXT:    [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 4
26410 // CHECK20-NEXT:    [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 4
26411 // CHECK20-NEXT:    [[_TMP16:%.*]] = alloca i32, align 4
26412 // CHECK20-NEXT:    [[M_CASTED19:%.*]] = alloca i32, align 4
26413 // CHECK20-NEXT:    [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [2 x i8*], align 4
26414 // CHECK20-NEXT:    [[DOTOFFLOAD_PTRS21:%.*]] = alloca [2 x i8*], align 4
26415 // CHECK20-NEXT:    [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [2 x i8*], align 4
26416 // CHECK20-NEXT:    [[_TMP23:%.*]] = alloca i32, align 4
26417 // CHECK20-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
26418 // CHECK20-NEXT:    store i32 10, i32* [[M]], align 4
26419 // CHECK20-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
26420 // CHECK20-NEXT:    [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]**
26421 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4
26422 // CHECK20-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
26423 // CHECK20-NEXT:    [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]**
26424 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4
26425 // CHECK20-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
26426 // CHECK20-NEXT:    store i8* null, i8** [[TMP4]], align 4
26427 // CHECK20-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
26428 // CHECK20-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0
26429 // CHECK20-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
26430 // CHECK20-NEXT:    [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
26431 // CHECK20-NEXT:    [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0
26432 // CHECK20-NEXT:    br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
26433 // CHECK20:       omp_offload.failed:
26434 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]]
26435 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT]]
26436 // CHECK20:       omp_offload.cont:
26437 // CHECK20-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
26438 // CHECK20-NEXT:    [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]**
26439 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4
26440 // CHECK20-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
26441 // CHECK20-NEXT:    [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]**
26442 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4
26443 // CHECK20-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0
26444 // CHECK20-NEXT:    store i8* null, i8** [[TMP13]], align 4
26445 // CHECK20-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
26446 // CHECK20-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
26447 // CHECK20-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
26448 // CHECK20-NEXT:    [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
26449 // CHECK20-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
26450 // CHECK20-NEXT:    br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]]
26451 // CHECK20:       omp_offload.failed5:
26452 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121([10 x i32]* [[A]]) #[[ATTR3]]
26453 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT6]]
26454 // CHECK20:       omp_offload.cont6:
26455 // CHECK20-NEXT:    [[TMP18:%.*]] = load i32, i32* [[M]], align 4
26456 // CHECK20-NEXT:    store i32 [[TMP18]], i32* [[M_CASTED]], align 4
26457 // CHECK20-NEXT:    [[TMP19:%.*]] = load i32, i32* [[M_CASTED]], align 4
26458 // CHECK20-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
26459 // CHECK20-NEXT:    [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32*
26460 // CHECK20-NEXT:    store i32 [[TMP19]], i32* [[TMP21]], align 4
26461 // CHECK20-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
26462 // CHECK20-NEXT:    [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32*
26463 // CHECK20-NEXT:    store i32 [[TMP19]], i32* [[TMP23]], align 4
26464 // CHECK20-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0
26465 // CHECK20-NEXT:    store i8* null, i8** [[TMP24]], align 4
26466 // CHECK20-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1
26467 // CHECK20-NEXT:    [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]**
26468 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 4
26469 // CHECK20-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1
26470 // CHECK20-NEXT:    [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]**
26471 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 4
26472 // CHECK20-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 1
26473 // CHECK20-NEXT:    store i8* null, i8** [[TMP29]], align 4
26474 // CHECK20-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0
26475 // CHECK20-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0
26476 // CHECK20-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
26477 // CHECK20-NEXT:    [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
26478 // CHECK20-NEXT:    [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
26479 // CHECK20-NEXT:    br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]]
26480 // CHECK20:       omp_offload.failed11:
26481 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i32 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]]
26482 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT12]]
26483 // CHECK20:       omp_offload.cont12:
26484 // CHECK20-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
26485 // CHECK20-NEXT:    [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]**
26486 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 4
26487 // CHECK20-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
26488 // CHECK20-NEXT:    [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]**
26489 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 4
26490 // CHECK20-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 0
26491 // CHECK20-NEXT:    store i8* null, i8** [[TMP38]], align 4
26492 // CHECK20-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0
26493 // CHECK20-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0
26494 // CHECK20-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
26495 // CHECK20-NEXT:    [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
26496 // CHECK20-NEXT:    [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0
26497 // CHECK20-NEXT:    br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]]
26498 // CHECK20:       omp_offload.failed17:
26499 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131([10 x i32]* [[A]]) #[[ATTR3]]
26500 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT18]]
26501 // CHECK20:       omp_offload.cont18:
26502 // CHECK20-NEXT:    [[TMP43:%.*]] = load i32, i32* [[M]], align 4
26503 // CHECK20-NEXT:    store i32 [[TMP43]], i32* [[M_CASTED19]], align 4
26504 // CHECK20-NEXT:    [[TMP44:%.*]] = load i32, i32* [[M_CASTED19]], align 4
26505 // CHECK20-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
26506 // CHECK20-NEXT:    [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32*
26507 // CHECK20-NEXT:    store i32 [[TMP44]], i32* [[TMP46]], align 4
26508 // CHECK20-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
26509 // CHECK20-NEXT:    [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32*
26510 // CHECK20-NEXT:    store i32 [[TMP44]], i32* [[TMP48]], align 4
26511 // CHECK20-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 0
26512 // CHECK20-NEXT:    store i8* null, i8** [[TMP49]], align 4
26513 // CHECK20-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1
26514 // CHECK20-NEXT:    [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]**
26515 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 4
26516 // CHECK20-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 1
26517 // CHECK20-NEXT:    [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]**
26518 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 4
26519 // CHECK20-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 1
26520 // CHECK20-NEXT:    store i8* null, i8** [[TMP54]], align 4
26521 // CHECK20-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
26522 // CHECK20-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
26523 // CHECK20-NEXT:    call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10)
26524 // CHECK20-NEXT:    [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0)
26525 // CHECK20-NEXT:    [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0
26526 // CHECK20-NEXT:    br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]]
26527 // CHECK20:       omp_offload.failed24:
26528 // CHECK20-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i32 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]]
26529 // CHECK20-NEXT:    br label [[OMP_OFFLOAD_CONT25]]
26530 // CHECK20:       omp_offload.cont25:
26531 // CHECK20-NEXT:    ret i32 0
26532 //
26533 //
26534 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
26535 // CHECK20-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
26536 // CHECK20-NEXT:  entry:
26537 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26538 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26539 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26540 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
26541 // CHECK20-NEXT:    ret void
26542 //
26543 //
26544 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..14
26545 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
26546 // CHECK20-NEXT:  entry:
26547 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
26548 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
26549 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26550 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
26551 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
26552 // CHECK20-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
26553 // CHECK20-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
26554 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26555 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26556 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
26557 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
26558 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
26559 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26560 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26561 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
26562 // CHECK20-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
26563 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
26564 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
26565 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26566 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
26567 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
26568 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26569 // CHECK20-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
26570 // CHECK20-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
26571 // CHECK20:       cond.true:
26572 // CHECK20-NEXT:    br label [[COND_END:%.*]]
26573 // CHECK20:       cond.false:
26574 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26575 // CHECK20-NEXT:    br label [[COND_END]]
26576 // CHECK20:       cond.end:
26577 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
26578 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
26579 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
26580 // CHECK20-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
26581 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
26582 // CHECK20:       omp.inner.for.cond:
26583 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26584 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26585 // CHECK20-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
26586 // CHECK20-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26587 // CHECK20:       omp.inner.for.body:
26588 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
26589 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26590 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
26591 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
26592 // CHECK20:       omp.inner.for.inc:
26593 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26594 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
26595 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
26596 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
26597 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
26598 // CHECK20:       omp.inner.for.end:
26599 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
26600 // CHECK20:       omp.loop.exit:
26601 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
26602 // CHECK20-NEXT:    ret void
26603 //
26604 //
26605 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..15
26606 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
26607 // CHECK20-NEXT:  entry:
26608 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
26609 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
26610 // CHECK20-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
26611 // CHECK20-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
26612 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26613 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
26614 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
26615 // CHECK20-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
26616 // CHECK20-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
26617 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26618 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26619 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
26620 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
26621 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
26622 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
26623 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26624 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26625 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26626 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
26627 // CHECK20-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
26628 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
26629 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26630 // CHECK20-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
26631 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
26632 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
26633 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
26634 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26635 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
26636 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
26637 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26638 // CHECK20-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
26639 // CHECK20-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
26640 // CHECK20:       cond.true:
26641 // CHECK20-NEXT:    br label [[COND_END:%.*]]
26642 // CHECK20:       cond.false:
26643 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26644 // CHECK20-NEXT:    br label [[COND_END]]
26645 // CHECK20:       cond.end:
26646 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
26647 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
26648 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
26649 // CHECK20-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
26650 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
26651 // CHECK20:       omp.inner.for.cond:
26652 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26653 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26654 // CHECK20-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
26655 // CHECK20-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26656 // CHECK20:       omp.inner.for.body:
26657 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26658 // CHECK20-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
26659 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
26660 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
26661 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
26662 // CHECK20-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
26663 // CHECK20-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
26664 // CHECK20-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
26665 // CHECK20:       omp.body.continue:
26666 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
26667 // CHECK20:       omp.inner.for.inc:
26668 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26669 // CHECK20-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
26670 // CHECK20-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
26671 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
26672 // CHECK20:       omp.inner.for.end:
26673 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
26674 // CHECK20:       omp.loop.exit:
26675 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
26676 // CHECK20-NEXT:    ret void
26677 //
26678 //
26679 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121
26680 // CHECK20-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
26681 // CHECK20-NEXT:  entry:
26682 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26683 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26684 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26685 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
26686 // CHECK20-NEXT:    ret void
26687 //
26688 //
26689 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..17
26690 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
26691 // CHECK20-NEXT:  entry:
26692 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
26693 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
26694 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26695 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
26696 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
26697 // CHECK20-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
26698 // CHECK20-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
26699 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26700 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26701 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
26702 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
26703 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
26704 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26705 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26706 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
26707 // CHECK20-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
26708 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
26709 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
26710 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26711 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
26712 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
26713 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26714 // CHECK20-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
26715 // CHECK20-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
26716 // CHECK20:       cond.true:
26717 // CHECK20-NEXT:    br label [[COND_END:%.*]]
26718 // CHECK20:       cond.false:
26719 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26720 // CHECK20-NEXT:    br label [[COND_END]]
26721 // CHECK20:       cond.end:
26722 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
26723 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
26724 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
26725 // CHECK20-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
26726 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
26727 // CHECK20:       omp.inner.for.cond:
26728 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26729 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26730 // CHECK20-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
26731 // CHECK20-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26732 // CHECK20:       omp.inner.for.body:
26733 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
26734 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26735 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
26736 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
26737 // CHECK20:       omp.inner.for.inc:
26738 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26739 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
26740 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
26741 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
26742 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
26743 // CHECK20:       omp.inner.for.end:
26744 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
26745 // CHECK20:       omp.loop.exit:
26746 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
26747 // CHECK20-NEXT:    ret void
26748 //
26749 //
26750 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..18
26751 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
26752 // CHECK20-NEXT:  entry:
26753 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
26754 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
26755 // CHECK20-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
26756 // CHECK20-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
26757 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26758 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
26759 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
26760 // CHECK20-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
26761 // CHECK20-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
26762 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26763 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26764 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
26765 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
26766 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
26767 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
26768 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26769 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26770 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26771 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
26772 // CHECK20-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
26773 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
26774 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26775 // CHECK20-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
26776 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
26777 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
26778 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
26779 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26780 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4
26781 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
26782 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26783 // CHECK20-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
26784 // CHECK20-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
26785 // CHECK20:       cond.true:
26786 // CHECK20-NEXT:    br label [[COND_END:%.*]]
26787 // CHECK20:       cond.false:
26788 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26789 // CHECK20-NEXT:    br label [[COND_END]]
26790 // CHECK20:       cond.end:
26791 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
26792 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
26793 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
26794 // CHECK20-NEXT:    store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4
26795 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
26796 // CHECK20:       omp.inner.for.cond:
26797 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26798 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26799 // CHECK20-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
26800 // CHECK20-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26801 // CHECK20:       omp.inner.for.body:
26802 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26803 // CHECK20-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
26804 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
26805 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
26806 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I]], align 4
26807 // CHECK20-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]]
26808 // CHECK20-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
26809 // CHECK20-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
26810 // CHECK20:       omp.body.continue:
26811 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
26812 // CHECK20:       omp.inner.for.inc:
26813 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26814 // CHECK20-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
26815 // CHECK20-NEXT:    store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4
26816 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
26817 // CHECK20:       omp.inner.for.end:
26818 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
26819 // CHECK20:       omp.loop.exit:
26820 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]])
26821 // CHECK20-NEXT:    ret void
26822 //
26823 //
26824 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126
26825 // CHECK20-SAME: (i32 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
26826 // CHECK20-NEXT:  entry:
26827 // CHECK20-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 4
26828 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26829 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
26830 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
26831 // CHECK20-NEXT:    store i32 [[M]], i32* [[M_ADDR]], align 4
26832 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26833 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26834 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4
26835 // CHECK20-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
26836 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
26837 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
26838 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
26839 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]])
26840 // CHECK20-NEXT:    ret void
26841 //
26842 //
26843 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..21
26844 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
26845 // CHECK20-NEXT:  entry:
26846 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
26847 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
26848 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26849 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
26850 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
26851 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
26852 // CHECK20-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
26853 // CHECK20-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
26854 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26855 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26856 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
26857 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
26858 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
26859 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
26860 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26861 // CHECK20-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
26862 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26863 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
26864 // CHECK20-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
26865 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
26866 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
26867 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26868 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
26869 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
26870 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26871 // CHECK20-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
26872 // CHECK20-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
26873 // CHECK20:       cond.true:
26874 // CHECK20-NEXT:    br label [[COND_END:%.*]]
26875 // CHECK20:       cond.false:
26876 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26877 // CHECK20-NEXT:    br label [[COND_END]]
26878 // CHECK20:       cond.end:
26879 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
26880 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
26881 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
26882 // CHECK20-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
26883 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
26884 // CHECK20:       omp.inner.for.cond:
26885 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26886 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26887 // CHECK20-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
26888 // CHECK20-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26889 // CHECK20:       omp.inner.for.body:
26890 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
26891 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
26892 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
26893 // CHECK20-NEXT:    store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
26894 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
26895 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]])
26896 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
26897 // CHECK20:       omp.inner.for.inc:
26898 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26899 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
26900 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
26901 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
26902 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
26903 // CHECK20:       omp.inner.for.end:
26904 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
26905 // CHECK20:       omp.loop.exit:
26906 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
26907 // CHECK20-NEXT:    ret void
26908 //
26909 //
26910 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..22
26911 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
26912 // CHECK20-NEXT:  entry:
26913 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
26914 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
26915 // CHECK20-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
26916 // CHECK20-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
26917 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
26918 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
26919 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
26920 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
26921 // CHECK20-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
26922 // CHECK20-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
26923 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
26924 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
26925 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
26926 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
26927 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
26928 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
26929 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26930 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
26931 // CHECK20-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
26932 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
26933 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
26934 // CHECK20-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
26935 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
26936 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26937 // CHECK20-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
26938 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
26939 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
26940 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
26941 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
26942 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
26943 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4
26944 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
26945 // CHECK20-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
26946 // CHECK20:       omp.dispatch.cond:
26947 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26948 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26949 // CHECK20-NEXT:    [[CMP:%.*]] = icmp ugt i32 [[TMP6]], [[TMP7]]
26950 // CHECK20-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
26951 // CHECK20:       cond.true:
26952 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
26953 // CHECK20-NEXT:    br label [[COND_END:%.*]]
26954 // CHECK20:       cond.false:
26955 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26956 // CHECK20-NEXT:    br label [[COND_END]]
26957 // CHECK20:       cond.end:
26958 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP8]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
26959 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_UB]], align 4
26960 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
26961 // CHECK20-NEXT:    store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4
26962 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26963 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26964 // CHECK20-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
26965 // CHECK20-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
26966 // CHECK20:       omp.dispatch.body:
26967 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
26968 // CHECK20:       omp.inner.for.cond:
26969 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26970 // CHECK20-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26971 // CHECK20-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
26972 // CHECK20-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
26973 // CHECK20:       omp.inner.for.body:
26974 // CHECK20-NEXT:    [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26975 // CHECK20-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
26976 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
26977 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[I]], align 4
26978 // CHECK20-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I]], align 4
26979 // CHECK20-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP16]]
26980 // CHECK20-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
26981 // CHECK20-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
26982 // CHECK20:       omp.body.continue:
26983 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
26984 // CHECK20:       omp.inner.for.inc:
26985 // CHECK20-NEXT:    [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
26986 // CHECK20-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1
26987 // CHECK20-NEXT:    store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4
26988 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
26989 // CHECK20:       omp.inner.for.end:
26990 // CHECK20-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
26991 // CHECK20:       omp.dispatch.inc:
26992 // CHECK20-NEXT:    [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
26993 // CHECK20-NEXT:    [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
26994 // CHECK20-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
26995 // CHECK20-NEXT:    store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4
26996 // CHECK20-NEXT:    [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
26997 // CHECK20-NEXT:    [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
26998 // CHECK20-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
26999 // CHECK20-NEXT:    store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4
27000 // CHECK20-NEXT:    br label [[OMP_DISPATCH_COND]]
27001 // CHECK20:       omp.dispatch.end:
27002 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]])
27003 // CHECK20-NEXT:    ret void
27004 //
27005 //
27006 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131
27007 // CHECK20-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
27008 // CHECK20-NEXT:  entry:
27009 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
27010 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
27011 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
27012 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]])
27013 // CHECK20-NEXT:    ret void
27014 //
27015 //
27016 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..25
27017 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
27018 // CHECK20-NEXT:  entry:
27019 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
27020 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
27021 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
27022 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
27023 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
27024 // CHECK20-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
27025 // CHECK20-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
27026 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
27027 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
27028 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
27029 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
27030 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
27031 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
27032 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
27033 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
27034 // CHECK20-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
27035 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
27036 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
27037 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
27038 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
27039 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
27040 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
27041 // CHECK20-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
27042 // CHECK20-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
27043 // CHECK20:       cond.true:
27044 // CHECK20-NEXT:    br label [[COND_END:%.*]]
27045 // CHECK20:       cond.false:
27046 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
27047 // CHECK20-NEXT:    br label [[COND_END]]
27048 // CHECK20:       cond.end:
27049 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
27050 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
27051 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
27052 // CHECK20-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
27053 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
27054 // CHECK20:       omp.inner.for.cond:
27055 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
27056 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
27057 // CHECK20-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
27058 // CHECK20-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
27059 // CHECK20:       omp.inner.for.body:
27060 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
27061 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
27062 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]])
27063 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
27064 // CHECK20:       omp.inner.for.inc:
27065 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
27066 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
27067 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
27068 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
27069 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
27070 // CHECK20:       omp.inner.for.end:
27071 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
27072 // CHECK20:       omp.loop.exit:
27073 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
27074 // CHECK20-NEXT:    ret void
27075 //
27076 //
27077 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..26
27078 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
27079 // CHECK20-NEXT:  entry:
27080 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
27081 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
27082 // CHECK20-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
27083 // CHECK20-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
27084 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
27085 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
27086 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
27087 // CHECK20-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
27088 // CHECK20-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
27089 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
27090 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
27091 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
27092 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
27093 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
27094 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
27095 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
27096 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
27097 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
27098 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
27099 // CHECK20-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
27100 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
27101 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
27102 // CHECK20-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
27103 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
27104 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
27105 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
27106 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
27107 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
27108 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
27109 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4
27110 // CHECK20-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
27111 // CHECK20-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
27112 // CHECK20:       omp.dispatch.cond:
27113 // CHECK20-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
27114 // CHECK20-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
27115 // CHECK20-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
27116 // CHECK20:       omp.dispatch.body:
27117 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
27118 // CHECK20-NEXT:    store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4
27119 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
27120 // CHECK20:       omp.inner.for.cond:
27121 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
27122 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21
27123 // CHECK20-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
27124 // CHECK20-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
27125 // CHECK20:       omp.inner.for.body:
27126 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
27127 // CHECK20-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
27128 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
27129 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21
27130 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21
27131 // CHECK20-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP12]]
27132 // CHECK20-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21
27133 // CHECK20-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
27134 // CHECK20:       omp.body.continue:
27135 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
27136 // CHECK20:       omp.inner.for.inc:
27137 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
27138 // CHECK20-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
27139 // CHECK20-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21
27140 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
27141 // CHECK20:       omp.inner.for.end:
27142 // CHECK20-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
27143 // CHECK20:       omp.dispatch.inc:
27144 // CHECK20-NEXT:    br label [[OMP_DISPATCH_COND]]
27145 // CHECK20:       omp.dispatch.end:
27146 // CHECK20-NEXT:    ret void
27147 //
27148 //
27149 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136
27150 // CHECK20-SAME: (i32 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
27151 // CHECK20-NEXT:  entry:
27152 // CHECK20-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 4
27153 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
27154 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
27155 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
27156 // CHECK20-NEXT:    store i32 [[M]], i32* [[M_ADDR]], align 4
27157 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
27158 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
27159 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4
27160 // CHECK20-NEXT:    store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4
27161 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4
27162 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
27163 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
27164 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]])
27165 // CHECK20-NEXT:    ret void
27166 //
27167 //
27168 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..29
27169 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
27170 // CHECK20-NEXT:  entry:
27171 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
27172 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
27173 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
27174 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
27175 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
27176 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
27177 // CHECK20-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
27178 // CHECK20-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
27179 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
27180 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
27181 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
27182 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
27183 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
27184 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
27185 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
27186 // CHECK20-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
27187 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
27188 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_COMB_LB]], align 4
27189 // CHECK20-NEXT:    store i32 9, i32* [[DOTOMP_COMB_UB]], align 4
27190 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
27191 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
27192 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
27193 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
27194 // CHECK20-NEXT:    call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1)
27195 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
27196 // CHECK20-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
27197 // CHECK20-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
27198 // CHECK20:       cond.true:
27199 // CHECK20-NEXT:    br label [[COND_END:%.*]]
27200 // CHECK20:       cond.false:
27201 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
27202 // CHECK20-NEXT:    br label [[COND_END]]
27203 // CHECK20:       cond.end:
27204 // CHECK20-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
27205 // CHECK20-NEXT:    store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4
27206 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
27207 // CHECK20-NEXT:    store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4
27208 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
27209 // CHECK20:       omp.inner.for.cond:
27210 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
27211 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
27212 // CHECK20-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
27213 // CHECK20-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
27214 // CHECK20:       omp.inner.for.body:
27215 // CHECK20-NEXT:    [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4
27216 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4
27217 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
27218 // CHECK20-NEXT:    store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
27219 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4
27220 // CHECK20-NEXT:    call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]])
27221 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
27222 // CHECK20:       omp.inner.for.inc:
27223 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4
27224 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4
27225 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
27226 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4
27227 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]]
27228 // CHECK20:       omp.inner.for.end:
27229 // CHECK20-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
27230 // CHECK20:       omp.loop.exit:
27231 // CHECK20-NEXT:    call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]])
27232 // CHECK20-NEXT:    ret void
27233 //
27234 //
27235 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..30
27236 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
27237 // CHECK20-NEXT:  entry:
27238 // CHECK20-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4
27239 // CHECK20-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4
27240 // CHECK20-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
27241 // CHECK20-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
27242 // CHECK20-NEXT:    [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4
27243 // CHECK20-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
27244 // CHECK20-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
27245 // CHECK20-NEXT:    [[TMP:%.*]] = alloca i32, align 4
27246 // CHECK20-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
27247 // CHECK20-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
27248 // CHECK20-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
27249 // CHECK20-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
27250 // CHECK20-NEXT:    [[I:%.*]] = alloca i32, align 4
27251 // CHECK20-NEXT:    store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4
27252 // CHECK20-NEXT:    store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4
27253 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4
27254 // CHECK20-NEXT:    store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4
27255 // CHECK20-NEXT:    store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4
27256 // CHECK20-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
27257 // CHECK20-NEXT:    [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4
27258 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_LB]], align 4
27259 // CHECK20-NEXT:    store i32 9, i32* [[DOTOMP_UB]], align 4
27260 // CHECK20-NEXT:    [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4
27261 // CHECK20-NEXT:    [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4
27262 // CHECK20-NEXT:    store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4
27263 // CHECK20-NEXT:    store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4
27264 // CHECK20-NEXT:    store i32 1, i32* [[DOTOMP_STRIDE]], align 4
27265 // CHECK20-NEXT:    store i32 0, i32* [[DOTOMP_IS_LAST]], align 4
27266 // CHECK20-NEXT:    [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4
27267 // CHECK20-NEXT:    [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
27268 // CHECK20-NEXT:    [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4
27269 // CHECK20-NEXT:    [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4
27270 // CHECK20-NEXT:    [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4
27271 // CHECK20-NEXT:    call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
27272 // CHECK20-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
27273 // CHECK20:       omp.dispatch.cond:
27274 // CHECK20-NEXT:    [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]])
27275 // CHECK20-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
27276 // CHECK20-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
27277 // CHECK20:       omp.dispatch.body:
27278 // CHECK20-NEXT:    [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4
27279 // CHECK20-NEXT:    store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4
27280 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
27281 // CHECK20:       omp.inner.for.cond:
27282 // CHECK20-NEXT:    [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
27283 // CHECK20-NEXT:    [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !24
27284 // CHECK20-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
27285 // CHECK20-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
27286 // CHECK20:       omp.inner.for.body:
27287 // CHECK20-NEXT:    [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
27288 // CHECK20-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
27289 // CHECK20-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
27290 // CHECK20-NEXT:    store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !24
27291 // CHECK20-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !24
27292 // CHECK20-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP13]]
27293 // CHECK20-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !24
27294 // CHECK20-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
27295 // CHECK20:       omp.body.continue:
27296 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
27297 // CHECK20:       omp.inner.for.inc:
27298 // CHECK20-NEXT:    [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
27299 // CHECK20-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP14]], 1
27300 // CHECK20-NEXT:    store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24
27301 // CHECK20-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
27302 // CHECK20:       omp.inner.for.end:
27303 // CHECK20-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
27304 // CHECK20:       omp.dispatch.inc:
27305 // CHECK20-NEXT:    br label [[OMP_DISPATCH_COND]]
27306 // CHECK20:       omp.dispatch.end:
27307 // CHECK20-NEXT:    ret void
27308 //
27309 //
27310 // CHECK20-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
27311 // CHECK20-SAME: () #[[ATTR5:[0-9]+]] {
27312 // CHECK20-NEXT:  entry:
27313 // CHECK20-NEXT:    call void @__tgt_register_requires(i64 1)
27314 // CHECK20-NEXT:    ret void
27315 //
27316 //
27317 // CHECK21-LABEL: define {{[^@]+}}@main
27318 // CHECK21-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
27319 // CHECK21-NEXT:  entry:
27320 // CHECK21-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
27321 // CHECK21-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
27322 // CHECK21-NEXT:    [[ARGV_ADDR:%.*]] = alloca i8**, align 8
27323 // CHECK21-NEXT:    [[N:%.*]] = alloca i32, align 4
27324 // CHECK21-NEXT:    [[SAVED_STACK:%.*]] = alloca i8*, align 8
27325 // CHECK21-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i64, align 8
27326 // CHECK21-NEXT:    [[M:%.*]] = alloca i32, align 4
27327 // CHECK21-NEXT:    [[I:%.*]] = alloca i32, align 4
27328 // CHECK21-NEXT:    [[I1:%.*]] = alloca i32, align 4
27329 // CHECK21-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
27330 // CHECK21-NEXT:    [[I10:%.*]] = alloca i32, align 4
27331 // CHECK21-NEXT:    [[I19:%.*]] = alloca i32, align 4
27332 // CHECK21-NEXT:    [[DOTCAPTURE_EXPR_28:%.*]] = alloca i32, align 4
27333 // CHECK21-NEXT:    [[I29:%.*]] = alloca i32, align 4
27334 // CHECK21-NEXT:    store i32 0, i32* [[RETVAL]], align 4
27335 // CHECK21-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
27336 // CHECK21-NEXT:    store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
27337 // CHECK21-NEXT:    store i32 100, i32* [[N]], align 4
27338 // CHECK21-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N]], align 4
27339 // CHECK21-NEXT:    [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
27340 // CHECK21-NEXT:    [[TMP2:%.*]] = call i8* @llvm.stacksave()
27341 // CHECK21-NEXT:    store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
27342 // CHECK21-NEXT:    [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
27343 // CHECK21-NEXT:    store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
27344 // CHECK21-NEXT:    store i32 10, i32* [[M]], align 4
27345 // CHECK21-NEXT:    store i32 0, i32* [[I]], align 4
27346 // CHECK21-NEXT:    br label [[FOR_COND:%.*]]
27347 // CHECK21:       for.cond:
27348 // CHECK21-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I]], align 4
27349 // CHECK21-NEXT:    [[TMP4:%.*]] = load i32, i32* [[N]], align 4
27350 // CHECK21-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP3]], [[TMP4]]
27351 // CHECK21-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
27352 // CHECK21:       for.body:
27353 // CHECK21-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I]], align 4
27354 // CHECK21-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP5]] to i64
27355 // CHECK21-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM]]
27356 // CHECK21-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
27357 // CHECK21-NEXT:    br label [[FOR_INC:%.*]]
27358 // CHECK21:       for.inc:
27359 // CHECK21-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I]], align 4
27360 // CHECK21-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP6]], 1
27361 // CHECK21-NEXT:    store i32 [[INC]], i32* [[I]], align 4
27362 // CHECK21-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
27363 // CHECK21:       for.end:
27364 // CHECK21-NEXT:    store i32 0, i32* [[I1]], align 4
27365 // CHECK21-NEXT:    br label [[FOR_COND2:%.*]]
27366 // CHECK21:       for.cond2:
27367 // CHECK21-NEXT:    [[TMP7:%.*]] = load i32, i32* [[I1]], align 4
27368 // CHECK21-NEXT:    [[TMP8:%.*]] = load i32, i32* [[N]], align 4
27369 // CHECK21-NEXT:    [[CMP3:%.*]] = icmp slt i32 [[TMP7]], [[TMP8]]
27370 // CHECK21-NEXT:    br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END9:%.*]]
27371 // CHECK21:       for.body4:
27372 // CHECK21-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I1]], align 4
27373 // CHECK21-NEXT:    [[IDXPROM5:%.*]] = sext i32 [[TMP9]] to i64
27374 // CHECK21-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM5]]
27375 // CHECK21-NEXT:    store i32 0, i32* [[ARRAYIDX6]], align 4
27376 // CHECK21-NEXT:    br label [[FOR_INC7:%.*]]
27377 // CHECK21:       for.inc7:
27378 // CHECK21-NEXT:    [[TMP10:%.*]] = load i32, i32* [[I1]], align 4
27379 // CHECK21-NEXT:    [[INC8:%.*]] = add nsw i32 [[TMP10]], 1
27380 // CHECK21-NEXT:    store i32 [[INC8]], i32* [[I1]], align 4
27381 // CHECK21-NEXT:    br label [[FOR_COND2]], !llvm.loop [[LOOP4:![0-9]+]]
27382 // CHECK21:       for.end9:
27383 // CHECK21-NEXT:    [[TMP11:%.*]] = load i32, i32* [[M]], align 4
27384 // CHECK21-NEXT:    store i32 [[TMP11]], i32* [[DOTCAPTURE_EXPR_]], align 4
27385 // CHECK21-NEXT:    store i32 0, i32* [[I10]], align 4
27386 // CHECK21-NEXT:    br label [[FOR_COND11:%.*]]
27387 // CHECK21:       for.cond11:
27388 // CHECK21-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I10]], align 4
27389 // CHECK21-NEXT:    [[TMP13:%.*]] = load i32, i32* [[N]], align 4
27390 // CHECK21-NEXT:    [[CMP12:%.*]] = icmp slt i32 [[TMP12]], [[TMP13]]
27391 // CHECK21-NEXT:    br i1 [[CMP12]], label [[FOR_BODY13:%.*]], label [[FOR_END18:%.*]]
27392 // CHECK21:       for.body13:
27393 // CHECK21-NEXT:    [[TMP14:%.*]] = load i32, i32* [[I10]], align 4
27394 // CHECK21-NEXT:    [[IDXPROM14:%.*]] = sext i32 [[TMP14]] to i64
27395 // CHECK21-NEXT:    [[ARRAYIDX15:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM14]]
27396 // CHECK21-NEXT:    store i32 0, i32* [[ARRAYIDX15]], align 4
27397 // CHECK21-NEXT:    br label [[FOR_INC16:%.*]]
27398 // CHECK21:       for.inc16:
27399 // CHECK21-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I10]], align 4
27400 // CHECK21-NEXT:    [[INC17:%.*]] = add nsw i32 [[TMP15]], 1
27401 // CHECK21-NEXT:    store i32 [[INC17]], i32* [[I10]], align 4
27402 // CHECK21-NEXT:    br label [[FOR_COND11]], !llvm.loop [[LOOP5:![0-9]+]]
27403 // CHECK21:       for.end18:
27404 // CHECK21-NEXT:    store i32 0, i32* [[I19]], align 4
27405 // CHECK21-NEXT:    br label [[FOR_COND20:%.*]]
27406 // CHECK21:       for.cond20:
27407 // CHECK21-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I19]], align 4
27408 // CHECK21-NEXT:    [[TMP17:%.*]] = load i32, i32* [[N]], align 4
27409 // CHECK21-NEXT:    [[CMP21:%.*]] = icmp slt i32 [[TMP16]], [[TMP17]]
27410 // CHECK21-NEXT:    br i1 [[CMP21]], label [[FOR_BODY22:%.*]], label [[FOR_END27:%.*]]
27411 // CHECK21:       for.body22:
27412 // CHECK21-NEXT:    [[TMP18:%.*]] = load i32, i32* [[I19]], align 4
27413 // CHECK21-NEXT:    [[IDXPROM23:%.*]] = sext i32 [[TMP18]] to i64
27414 // CHECK21-NEXT:    [[ARRAYIDX24:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM23]]
27415 // CHECK21-NEXT:    store i32 0, i32* [[ARRAYIDX24]], align 4
27416 // CHECK21-NEXT:    br label [[FOR_INC25:%.*]]
27417 // CHECK21:       for.inc25:
27418 // CHECK21-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I19]], align 4
27419 // CHECK21-NEXT:    [[INC26:%.*]] = add nsw i32 [[TMP19]], 1
27420 // CHECK21-NEXT:    store i32 [[INC26]], i32* [[I19]], align 4
27421 // CHECK21-NEXT:    br label [[FOR_COND20]], !llvm.loop [[LOOP6:![0-9]+]]
27422 // CHECK21:       for.end27:
27423 // CHECK21-NEXT:    [[TMP20:%.*]] = load i32, i32* [[M]], align 4
27424 // CHECK21-NEXT:    store i32 [[TMP20]], i32* [[DOTCAPTURE_EXPR_28]], align 4
27425 // CHECK21-NEXT:    store i32 0, i32* [[I29]], align 4
27426 // CHECK21-NEXT:    br label [[FOR_COND30:%.*]]
27427 // CHECK21:       for.cond30:
27428 // CHECK21-NEXT:    [[TMP21:%.*]] = load i32, i32* [[I29]], align 4
27429 // CHECK21-NEXT:    [[TMP22:%.*]] = load i32, i32* [[N]], align 4
27430 // CHECK21-NEXT:    [[CMP31:%.*]] = icmp slt i32 [[TMP21]], [[TMP22]]
27431 // CHECK21-NEXT:    br i1 [[CMP31]], label [[FOR_BODY32:%.*]], label [[FOR_END37:%.*]]
27432 // CHECK21:       for.body32:
27433 // CHECK21-NEXT:    [[TMP23:%.*]] = load i32, i32* [[I29]], align 4
27434 // CHECK21-NEXT:    [[IDXPROM33:%.*]] = sext i32 [[TMP23]] to i64
27435 // CHECK21-NEXT:    [[ARRAYIDX34:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM33]]
27436 // CHECK21-NEXT:    store i32 0, i32* [[ARRAYIDX34]], align 4
27437 // CHECK21-NEXT:    br label [[FOR_INC35:%.*]]
27438 // CHECK21:       for.inc35:
27439 // CHECK21-NEXT:    [[TMP24:%.*]] = load i32, i32* [[I29]], align 4
27440 // CHECK21-NEXT:    [[INC36:%.*]] = add nsw i32 [[TMP24]], 1
27441 // CHECK21-NEXT:    store i32 [[INC36]], i32* [[I29]], align 4
27442 // CHECK21-NEXT:    br label [[FOR_COND30]], !llvm.loop [[LOOP7:![0-9]+]]
27443 // CHECK21:       for.end37:
27444 // CHECK21-NEXT:    [[TMP25:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
27445 // CHECK21-NEXT:    [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP25]])
27446 // CHECK21-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
27447 // CHECK21-NEXT:    [[TMP26:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
27448 // CHECK21-NEXT:    call void @llvm.stackrestore(i8* [[TMP26]])
27449 // CHECK21-NEXT:    [[TMP27:%.*]] = load i32, i32* [[RETVAL]], align 4
27450 // CHECK21-NEXT:    ret i32 [[TMP27]]
27451 //
27452 //
27453 // CHECK21-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
27454 // CHECK21-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {
27455 // CHECK21-NEXT:  entry:
27456 // CHECK21-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
27457 // CHECK21-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
27458 // CHECK21-NEXT:    [[M:%.*]] = alloca i32, align 4
27459 // CHECK21-NEXT:    [[I:%.*]] = alloca i32, align 4
27460 // CHECK21-NEXT:    [[I1:%.*]] = alloca i32, align 4
27461 // CHECK21-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
27462 // CHECK21-NEXT:    [[I10:%.*]] = alloca i32, align 4
27463 // CHECK21-NEXT:    [[I19:%.*]] = alloca i32, align 4
27464 // CHECK21-NEXT:    [[DOTCAPTURE_EXPR_28:%.*]] = alloca i32, align 4
27465 // CHECK21-NEXT:    [[I29:%.*]] = alloca i32, align 4
27466 // CHECK21-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
27467 // CHECK21-NEXT:    store i32 10, i32* [[M]], align 4
27468 // CHECK21-NEXT:    store i32 0, i32* [[I]], align 4
27469 // CHECK21-NEXT:    br label [[FOR_COND:%.*]]
27470 // CHECK21:       for.cond:
27471 // CHECK21-NEXT:    [[TMP0:%.*]] = load i32, i32* [[I]], align 4
27472 // CHECK21-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP0]], 10
27473 // CHECK21-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
27474 // CHECK21:       for.body:
27475 // CHECK21-NEXT:    [[TMP1:%.*]] = load i32, i32* [[I]], align 4
27476 // CHECK21-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP1]] to i64
27477 // CHECK21-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
27478 // CHECK21-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
27479 // CHECK21-NEXT:    br label [[FOR_INC:%.*]]
27480 // CHECK21:       for.inc:
27481 // CHECK21-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I]], align 4
27482 // CHECK21-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP2]], 1
27483 // CHECK21-NEXT:    store i32 [[INC]], i32* [[I]], align 4
27484 // CHECK21-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
27485 // CHECK21:       for.end:
27486 // CHECK21-NEXT:    store i32 0, i32* [[I1]], align 4
27487 // CHECK21-NEXT:    br label [[FOR_COND2:%.*]]
27488 // CHECK21:       for.cond2:
27489 // CHECK21-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I1]], align 4
27490 // CHECK21-NEXT:    [[CMP3:%.*]] = icmp slt i32 [[TMP3]], 10
27491 // CHECK21-NEXT:    br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END9:%.*]]
27492 // CHECK21:       for.body4:
27493 // CHECK21-NEXT:    [[TMP4:%.*]] = load i32, i32* [[I1]], align 4
27494 // CHECK21-NEXT:    [[IDXPROM5:%.*]] = sext i32 [[TMP4]] to i64
27495 // CHECK21-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM5]]
27496 // CHECK21-NEXT:    store i32 0, i32* [[ARRAYIDX6]], align 4
27497 // CHECK21-NEXT:    br label [[FOR_INC7:%.*]]
27498 // CHECK21:       for.inc7:
27499 // CHECK21-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I1]], align 4
27500 // CHECK21-NEXT:    [[INC8:%.*]] = add nsw i32 [[TMP5]], 1
27501 // CHECK21-NEXT:    store i32 [[INC8]], i32* [[I1]], align 4
27502 // CHECK21-NEXT:    br label [[FOR_COND2]], !llvm.loop [[LOOP9:![0-9]+]]
27503 // CHECK21:       for.end9:
27504 // CHECK21-NEXT:    [[TMP6:%.*]] = load i32, i32* [[M]], align 4
27505 // CHECK21-NEXT:    store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_]], align 4
27506 // CHECK21-NEXT:    store i32 0, i32* [[I10]], align 4
27507 // CHECK21-NEXT:    br label [[FOR_COND11:%.*]]
27508 // CHECK21:       for.cond11:
27509 // CHECK21-NEXT:    [[TMP7:%.*]] = load i32, i32* [[I10]], align 4
27510 // CHECK21-NEXT:    [[CMP12:%.*]] = icmp slt i32 [[TMP7]], 10
27511 // CHECK21-NEXT:    br i1 [[CMP12]], label [[FOR_BODY13:%.*]], label [[FOR_END18:%.*]]
27512 // CHECK21:       for.body13:
27513 // CHECK21-NEXT:    [[TMP8:%.*]] = load i32, i32* [[I10]], align 4
27514 // CHECK21-NEXT:    [[IDXPROM14:%.*]] = sext i32 [[TMP8]] to i64
27515 // CHECK21-NEXT:    [[ARRAYIDX15:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM14]]
27516 // CHECK21-NEXT:    store i32 0, i32* [[ARRAYIDX15]], align 4
27517 // CHECK21-NEXT:    br label [[FOR_INC16:%.*]]
27518 // CHECK21:       for.inc16:
27519 // CHECK21-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I10]], align 4
27520 // CHECK21-NEXT:    [[INC17:%.*]] = add nsw i32 [[TMP9]], 1
27521 // CHECK21-NEXT:    store i32 [[INC17]], i32* [[I10]], align 4
27522 // CHECK21-NEXT:    br label [[FOR_COND11]], !llvm.loop [[LOOP10:![0-9]+]]
27523 // CHECK21:       for.end18:
27524 // CHECK21-NEXT:    store i32 0, i32* [[I19]], align 4
27525 // CHECK21-NEXT:    br label [[FOR_COND20:%.*]]
27526 // CHECK21:       for.cond20:
27527 // CHECK21-NEXT:    [[TMP10:%.*]] = load i32, i32* [[I19]], align 4
27528 // CHECK21-NEXT:    [[CMP21:%.*]] = icmp slt i32 [[TMP10]], 10
27529 // CHECK21-NEXT:    br i1 [[CMP21]], label [[FOR_BODY22:%.*]], label [[FOR_END27:%.*]]
27530 // CHECK21:       for.body22:
27531 // CHECK21-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I19]], align 4
27532 // CHECK21-NEXT:    [[IDXPROM23:%.*]] = sext i32 [[TMP11]] to i64
27533 // CHECK21-NEXT:    [[ARRAYIDX24:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM23]]
27534 // CHECK21-NEXT:    store i32 0, i32* [[ARRAYIDX24]], align 4
27535 // CHECK21-NEXT:    br label [[FOR_INC25:%.*]]
27536 // CHECK21:       for.inc25:
27537 // CHECK21-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I19]], align 4
27538 // CHECK21-NEXT:    [[INC26:%.*]] = add nsw i32 [[TMP12]], 1
27539 // CHECK21-NEXT:    store i32 [[INC26]], i32* [[I19]], align 4
27540 // CHECK21-NEXT:    br label [[FOR_COND20]], !llvm.loop [[LOOP11:![0-9]+]]
27541 // CHECK21:       for.end27:
27542 // CHECK21-NEXT:    [[TMP13:%.*]] = load i32, i32* [[M]], align 4
27543 // CHECK21-NEXT:    store i32 [[TMP13]], i32* [[DOTCAPTURE_EXPR_28]], align 4
27544 // CHECK21-NEXT:    store i32 0, i32* [[I29]], align 4
27545 // CHECK21-NEXT:    br label [[FOR_COND30:%.*]]
27546 // CHECK21:       for.cond30:
27547 // CHECK21-NEXT:    [[TMP14:%.*]] = load i32, i32* [[I29]], align 4
27548 // CHECK21-NEXT:    [[CMP31:%.*]] = icmp slt i32 [[TMP14]], 10
27549 // CHECK21-NEXT:    br i1 [[CMP31]], label [[FOR_BODY32:%.*]], label [[FOR_END37:%.*]]
27550 // CHECK21:       for.body32:
27551 // CHECK21-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I29]], align 4
27552 // CHECK21-NEXT:    [[IDXPROM33:%.*]] = sext i32 [[TMP15]] to i64
27553 // CHECK21-NEXT:    [[ARRAYIDX34:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM33]]
27554 // CHECK21-NEXT:    store i32 0, i32* [[ARRAYIDX34]], align 4
27555 // CHECK21-NEXT:    br label [[FOR_INC35:%.*]]
27556 // CHECK21:       for.inc35:
27557 // CHECK21-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I29]], align 4
27558 // CHECK21-NEXT:    [[INC36:%.*]] = add nsw i32 [[TMP16]], 1
27559 // CHECK21-NEXT:    store i32 [[INC36]], i32* [[I29]], align 4
27560 // CHECK21-NEXT:    br label [[FOR_COND30]], !llvm.loop [[LOOP12:![0-9]+]]
27561 // CHECK21:       for.end37:
27562 // CHECK21-NEXT:    ret i32 0
27563 //
27564 //
27565 // CHECK22-LABEL: define {{[^@]+}}@main
27566 // CHECK22-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
27567 // CHECK22-NEXT:  entry:
27568 // CHECK22-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
27569 // CHECK22-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
27570 // CHECK22-NEXT:    [[ARGV_ADDR:%.*]] = alloca i8**, align 8
27571 // CHECK22-NEXT:    [[N:%.*]] = alloca i32, align 4
27572 // CHECK22-NEXT:    [[SAVED_STACK:%.*]] = alloca i8*, align 8
27573 // CHECK22-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i64, align 8
27574 // CHECK22-NEXT:    [[M:%.*]] = alloca i32, align 4
27575 // CHECK22-NEXT:    [[I:%.*]] = alloca i32, align 4
27576 // CHECK22-NEXT:    [[I1:%.*]] = alloca i32, align 4
27577 // CHECK22-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
27578 // CHECK22-NEXT:    [[I10:%.*]] = alloca i32, align 4
27579 // CHECK22-NEXT:    [[I19:%.*]] = alloca i32, align 4
27580 // CHECK22-NEXT:    [[DOTCAPTURE_EXPR_28:%.*]] = alloca i32, align 4
27581 // CHECK22-NEXT:    [[I29:%.*]] = alloca i32, align 4
27582 // CHECK22-NEXT:    store i32 0, i32* [[RETVAL]], align 4
27583 // CHECK22-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
27584 // CHECK22-NEXT:    store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8
27585 // CHECK22-NEXT:    store i32 100, i32* [[N]], align 4
27586 // CHECK22-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N]], align 4
27587 // CHECK22-NEXT:    [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
27588 // CHECK22-NEXT:    [[TMP2:%.*]] = call i8* @llvm.stacksave()
27589 // CHECK22-NEXT:    store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8
27590 // CHECK22-NEXT:    [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
27591 // CHECK22-NEXT:    store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8
27592 // CHECK22-NEXT:    store i32 10, i32* [[M]], align 4
27593 // CHECK22-NEXT:    store i32 0, i32* [[I]], align 4
27594 // CHECK22-NEXT:    br label [[FOR_COND:%.*]]
27595 // CHECK22:       for.cond:
27596 // CHECK22-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I]], align 4
27597 // CHECK22-NEXT:    [[TMP4:%.*]] = load i32, i32* [[N]], align 4
27598 // CHECK22-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP3]], [[TMP4]]
27599 // CHECK22-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
27600 // CHECK22:       for.body:
27601 // CHECK22-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I]], align 4
27602 // CHECK22-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP5]] to i64
27603 // CHECK22-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM]]
27604 // CHECK22-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
27605 // CHECK22-NEXT:    br label [[FOR_INC:%.*]]
27606 // CHECK22:       for.inc:
27607 // CHECK22-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I]], align 4
27608 // CHECK22-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP6]], 1
27609 // CHECK22-NEXT:    store i32 [[INC]], i32* [[I]], align 4
27610 // CHECK22-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
27611 // CHECK22:       for.end:
27612 // CHECK22-NEXT:    store i32 0, i32* [[I1]], align 4
27613 // CHECK22-NEXT:    br label [[FOR_COND2:%.*]]
27614 // CHECK22:       for.cond2:
27615 // CHECK22-NEXT:    [[TMP7:%.*]] = load i32, i32* [[I1]], align 4
27616 // CHECK22-NEXT:    [[TMP8:%.*]] = load i32, i32* [[N]], align 4
27617 // CHECK22-NEXT:    [[CMP3:%.*]] = icmp slt i32 [[TMP7]], [[TMP8]]
27618 // CHECK22-NEXT:    br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END9:%.*]]
27619 // CHECK22:       for.body4:
27620 // CHECK22-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I1]], align 4
27621 // CHECK22-NEXT:    [[IDXPROM5:%.*]] = sext i32 [[TMP9]] to i64
27622 // CHECK22-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM5]]
27623 // CHECK22-NEXT:    store i32 0, i32* [[ARRAYIDX6]], align 4
27624 // CHECK22-NEXT:    br label [[FOR_INC7:%.*]]
27625 // CHECK22:       for.inc7:
27626 // CHECK22-NEXT:    [[TMP10:%.*]] = load i32, i32* [[I1]], align 4
27627 // CHECK22-NEXT:    [[INC8:%.*]] = add nsw i32 [[TMP10]], 1
27628 // CHECK22-NEXT:    store i32 [[INC8]], i32* [[I1]], align 4
27629 // CHECK22-NEXT:    br label [[FOR_COND2]], !llvm.loop [[LOOP4:![0-9]+]]
27630 // CHECK22:       for.end9:
27631 // CHECK22-NEXT:    [[TMP11:%.*]] = load i32, i32* [[M]], align 4
27632 // CHECK22-NEXT:    store i32 [[TMP11]], i32* [[DOTCAPTURE_EXPR_]], align 4
27633 // CHECK22-NEXT:    store i32 0, i32* [[I10]], align 4
27634 // CHECK22-NEXT:    br label [[FOR_COND11:%.*]]
27635 // CHECK22:       for.cond11:
27636 // CHECK22-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I10]], align 4
27637 // CHECK22-NEXT:    [[TMP13:%.*]] = load i32, i32* [[N]], align 4
27638 // CHECK22-NEXT:    [[CMP12:%.*]] = icmp slt i32 [[TMP12]], [[TMP13]]
27639 // CHECK22-NEXT:    br i1 [[CMP12]], label [[FOR_BODY13:%.*]], label [[FOR_END18:%.*]]
27640 // CHECK22:       for.body13:
27641 // CHECK22-NEXT:    [[TMP14:%.*]] = load i32, i32* [[I10]], align 4
27642 // CHECK22-NEXT:    [[IDXPROM14:%.*]] = sext i32 [[TMP14]] to i64
27643 // CHECK22-NEXT:    [[ARRAYIDX15:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM14]]
27644 // CHECK22-NEXT:    store i32 0, i32* [[ARRAYIDX15]], align 4
27645 // CHECK22-NEXT:    br label [[FOR_INC16:%.*]]
27646 // CHECK22:       for.inc16:
27647 // CHECK22-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I10]], align 4
27648 // CHECK22-NEXT:    [[INC17:%.*]] = add nsw i32 [[TMP15]], 1
27649 // CHECK22-NEXT:    store i32 [[INC17]], i32* [[I10]], align 4
27650 // CHECK22-NEXT:    br label [[FOR_COND11]], !llvm.loop [[LOOP5:![0-9]+]]
27651 // CHECK22:       for.end18:
27652 // CHECK22-NEXT:    store i32 0, i32* [[I19]], align 4
27653 // CHECK22-NEXT:    br label [[FOR_COND20:%.*]]
27654 // CHECK22:       for.cond20:
27655 // CHECK22-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I19]], align 4
27656 // CHECK22-NEXT:    [[TMP17:%.*]] = load i32, i32* [[N]], align 4
27657 // CHECK22-NEXT:    [[CMP21:%.*]] = icmp slt i32 [[TMP16]], [[TMP17]]
27658 // CHECK22-NEXT:    br i1 [[CMP21]], label [[FOR_BODY22:%.*]], label [[FOR_END27:%.*]]
27659 // CHECK22:       for.body22:
27660 // CHECK22-NEXT:    [[TMP18:%.*]] = load i32, i32* [[I19]], align 4
27661 // CHECK22-NEXT:    [[IDXPROM23:%.*]] = sext i32 [[TMP18]] to i64
27662 // CHECK22-NEXT:    [[ARRAYIDX24:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM23]]
27663 // CHECK22-NEXT:    store i32 0, i32* [[ARRAYIDX24]], align 4
27664 // CHECK22-NEXT:    br label [[FOR_INC25:%.*]]
27665 // CHECK22:       for.inc25:
27666 // CHECK22-NEXT:    [[TMP19:%.*]] = load i32, i32* [[I19]], align 4
27667 // CHECK22-NEXT:    [[INC26:%.*]] = add nsw i32 [[TMP19]], 1
27668 // CHECK22-NEXT:    store i32 [[INC26]], i32* [[I19]], align 4
27669 // CHECK22-NEXT:    br label [[FOR_COND20]], !llvm.loop [[LOOP6:![0-9]+]]
27670 // CHECK22:       for.end27:
27671 // CHECK22-NEXT:    [[TMP20:%.*]] = load i32, i32* [[M]], align 4
27672 // CHECK22-NEXT:    store i32 [[TMP20]], i32* [[DOTCAPTURE_EXPR_28]], align 4
27673 // CHECK22-NEXT:    store i32 0, i32* [[I29]], align 4
27674 // CHECK22-NEXT:    br label [[FOR_COND30:%.*]]
27675 // CHECK22:       for.cond30:
27676 // CHECK22-NEXT:    [[TMP21:%.*]] = load i32, i32* [[I29]], align 4
27677 // CHECK22-NEXT:    [[TMP22:%.*]] = load i32, i32* [[N]], align 4
27678 // CHECK22-NEXT:    [[CMP31:%.*]] = icmp slt i32 [[TMP21]], [[TMP22]]
27679 // CHECK22-NEXT:    br i1 [[CMP31]], label [[FOR_BODY32:%.*]], label [[FOR_END37:%.*]]
27680 // CHECK22:       for.body32:
27681 // CHECK22-NEXT:    [[TMP23:%.*]] = load i32, i32* [[I29]], align 4
27682 // CHECK22-NEXT:    [[IDXPROM33:%.*]] = sext i32 [[TMP23]] to i64
27683 // CHECK22-NEXT:    [[ARRAYIDX34:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i64 [[IDXPROM33]]
27684 // CHECK22-NEXT:    store i32 0, i32* [[ARRAYIDX34]], align 4
27685 // CHECK22-NEXT:    br label [[FOR_INC35:%.*]]
27686 // CHECK22:       for.inc35:
27687 // CHECK22-NEXT:    [[TMP24:%.*]] = load i32, i32* [[I29]], align 4
27688 // CHECK22-NEXT:    [[INC36:%.*]] = add nsw i32 [[TMP24]], 1
27689 // CHECK22-NEXT:    store i32 [[INC36]], i32* [[I29]], align 4
27690 // CHECK22-NEXT:    br label [[FOR_COND30]], !llvm.loop [[LOOP7:![0-9]+]]
27691 // CHECK22:       for.end37:
27692 // CHECK22-NEXT:    [[TMP25:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
27693 // CHECK22-NEXT:    [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP25]])
27694 // CHECK22-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
27695 // CHECK22-NEXT:    [[TMP26:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8
27696 // CHECK22-NEXT:    call void @llvm.stackrestore(i8* [[TMP26]])
27697 // CHECK22-NEXT:    [[TMP27:%.*]] = load i32, i32* [[RETVAL]], align 4
27698 // CHECK22-NEXT:    ret i32 [[TMP27]]
27699 //
27700 //
27701 // CHECK22-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
27702 // CHECK22-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {
27703 // CHECK22-NEXT:  entry:
27704 // CHECK22-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
27705 // CHECK22-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
27706 // CHECK22-NEXT:    [[M:%.*]] = alloca i32, align 4
27707 // CHECK22-NEXT:    [[I:%.*]] = alloca i32, align 4
27708 // CHECK22-NEXT:    [[I1:%.*]] = alloca i32, align 4
27709 // CHECK22-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
27710 // CHECK22-NEXT:    [[I10:%.*]] = alloca i32, align 4
27711 // CHECK22-NEXT:    [[I19:%.*]] = alloca i32, align 4
27712 // CHECK22-NEXT:    [[DOTCAPTURE_EXPR_28:%.*]] = alloca i32, align 4
27713 // CHECK22-NEXT:    [[I29:%.*]] = alloca i32, align 4
27714 // CHECK22-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
27715 // CHECK22-NEXT:    store i32 10, i32* [[M]], align 4
27716 // CHECK22-NEXT:    store i32 0, i32* [[I]], align 4
27717 // CHECK22-NEXT:    br label [[FOR_COND:%.*]]
27718 // CHECK22:       for.cond:
27719 // CHECK22-NEXT:    [[TMP0:%.*]] = load i32, i32* [[I]], align 4
27720 // CHECK22-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP0]], 10
27721 // CHECK22-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
27722 // CHECK22:       for.body:
27723 // CHECK22-NEXT:    [[TMP1:%.*]] = load i32, i32* [[I]], align 4
27724 // CHECK22-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP1]] to i64
27725 // CHECK22-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM]]
27726 // CHECK22-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
27727 // CHECK22-NEXT:    br label [[FOR_INC:%.*]]
27728 // CHECK22:       for.inc:
27729 // CHECK22-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I]], align 4
27730 // CHECK22-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP2]], 1
27731 // CHECK22-NEXT:    store i32 [[INC]], i32* [[I]], align 4
27732 // CHECK22-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
27733 // CHECK22:       for.end:
27734 // CHECK22-NEXT:    store i32 0, i32* [[I1]], align 4
27735 // CHECK22-NEXT:    br label [[FOR_COND2:%.*]]
27736 // CHECK22:       for.cond2:
27737 // CHECK22-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I1]], align 4
27738 // CHECK22-NEXT:    [[CMP3:%.*]] = icmp slt i32 [[TMP3]], 10
27739 // CHECK22-NEXT:    br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END9:%.*]]
27740 // CHECK22:       for.body4:
27741 // CHECK22-NEXT:    [[TMP4:%.*]] = load i32, i32* [[I1]], align 4
27742 // CHECK22-NEXT:    [[IDXPROM5:%.*]] = sext i32 [[TMP4]] to i64
27743 // CHECK22-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM5]]
27744 // CHECK22-NEXT:    store i32 0, i32* [[ARRAYIDX6]], align 4
27745 // CHECK22-NEXT:    br label [[FOR_INC7:%.*]]
27746 // CHECK22:       for.inc7:
27747 // CHECK22-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I1]], align 4
27748 // CHECK22-NEXT:    [[INC8:%.*]] = add nsw i32 [[TMP5]], 1
27749 // CHECK22-NEXT:    store i32 [[INC8]], i32* [[I1]], align 4
27750 // CHECK22-NEXT:    br label [[FOR_COND2]], !llvm.loop [[LOOP9:![0-9]+]]
27751 // CHECK22:       for.end9:
27752 // CHECK22-NEXT:    [[TMP6:%.*]] = load i32, i32* [[M]], align 4
27753 // CHECK22-NEXT:    store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_]], align 4
27754 // CHECK22-NEXT:    store i32 0, i32* [[I10]], align 4
27755 // CHECK22-NEXT:    br label [[FOR_COND11:%.*]]
27756 // CHECK22:       for.cond11:
27757 // CHECK22-NEXT:    [[TMP7:%.*]] = load i32, i32* [[I10]], align 4
27758 // CHECK22-NEXT:    [[CMP12:%.*]] = icmp slt i32 [[TMP7]], 10
27759 // CHECK22-NEXT:    br i1 [[CMP12]], label [[FOR_BODY13:%.*]], label [[FOR_END18:%.*]]
27760 // CHECK22:       for.body13:
27761 // CHECK22-NEXT:    [[TMP8:%.*]] = load i32, i32* [[I10]], align 4
27762 // CHECK22-NEXT:    [[IDXPROM14:%.*]] = sext i32 [[TMP8]] to i64
27763 // CHECK22-NEXT:    [[ARRAYIDX15:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM14]]
27764 // CHECK22-NEXT:    store i32 0, i32* [[ARRAYIDX15]], align 4
27765 // CHECK22-NEXT:    br label [[FOR_INC16:%.*]]
27766 // CHECK22:       for.inc16:
27767 // CHECK22-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I10]], align 4
27768 // CHECK22-NEXT:    [[INC17:%.*]] = add nsw i32 [[TMP9]], 1
27769 // CHECK22-NEXT:    store i32 [[INC17]], i32* [[I10]], align 4
27770 // CHECK22-NEXT:    br label [[FOR_COND11]], !llvm.loop [[LOOP10:![0-9]+]]
27771 // CHECK22:       for.end18:
27772 // CHECK22-NEXT:    store i32 0, i32* [[I19]], align 4
27773 // CHECK22-NEXT:    br label [[FOR_COND20:%.*]]
27774 // CHECK22:       for.cond20:
27775 // CHECK22-NEXT:    [[TMP10:%.*]] = load i32, i32* [[I19]], align 4
27776 // CHECK22-NEXT:    [[CMP21:%.*]] = icmp slt i32 [[TMP10]], 10
27777 // CHECK22-NEXT:    br i1 [[CMP21]], label [[FOR_BODY22:%.*]], label [[FOR_END27:%.*]]
27778 // CHECK22:       for.body22:
27779 // CHECK22-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I19]], align 4
27780 // CHECK22-NEXT:    [[IDXPROM23:%.*]] = sext i32 [[TMP11]] to i64
27781 // CHECK22-NEXT:    [[ARRAYIDX24:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM23]]
27782 // CHECK22-NEXT:    store i32 0, i32* [[ARRAYIDX24]], align 4
27783 // CHECK22-NEXT:    br label [[FOR_INC25:%.*]]
27784 // CHECK22:       for.inc25:
27785 // CHECK22-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I19]], align 4
27786 // CHECK22-NEXT:    [[INC26:%.*]] = add nsw i32 [[TMP12]], 1
27787 // CHECK22-NEXT:    store i32 [[INC26]], i32* [[I19]], align 4
27788 // CHECK22-NEXT:    br label [[FOR_COND20]], !llvm.loop [[LOOP11:![0-9]+]]
27789 // CHECK22:       for.end27:
27790 // CHECK22-NEXT:    [[TMP13:%.*]] = load i32, i32* [[M]], align 4
27791 // CHECK22-NEXT:    store i32 [[TMP13]], i32* [[DOTCAPTURE_EXPR_28]], align 4
27792 // CHECK22-NEXT:    store i32 0, i32* [[I29]], align 4
27793 // CHECK22-NEXT:    br label [[FOR_COND30:%.*]]
27794 // CHECK22:       for.cond30:
27795 // CHECK22-NEXT:    [[TMP14:%.*]] = load i32, i32* [[I29]], align 4
27796 // CHECK22-NEXT:    [[CMP31:%.*]] = icmp slt i32 [[TMP14]], 10
27797 // CHECK22-NEXT:    br i1 [[CMP31]], label [[FOR_BODY32:%.*]], label [[FOR_END37:%.*]]
27798 // CHECK22:       for.body32:
27799 // CHECK22-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I29]], align 4
27800 // CHECK22-NEXT:    [[IDXPROM33:%.*]] = sext i32 [[TMP15]] to i64
27801 // CHECK22-NEXT:    [[ARRAYIDX34:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i64 0, i64 [[IDXPROM33]]
27802 // CHECK22-NEXT:    store i32 0, i32* [[ARRAYIDX34]], align 4
27803 // CHECK22-NEXT:    br label [[FOR_INC35:%.*]]
27804 // CHECK22:       for.inc35:
27805 // CHECK22-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I29]], align 4
27806 // CHECK22-NEXT:    [[INC36:%.*]] = add nsw i32 [[TMP16]], 1
27807 // CHECK22-NEXT:    store i32 [[INC36]], i32* [[I29]], align 4
27808 // CHECK22-NEXT:    br label [[FOR_COND30]], !llvm.loop [[LOOP12:![0-9]+]]
27809 // CHECK22:       for.end37:
27810 // CHECK22-NEXT:    ret i32 0
27811 //
27812 //
27813 // CHECK23-LABEL: define {{[^@]+}}@main
27814 // CHECK23-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
27815 // CHECK23-NEXT:  entry:
27816 // CHECK23-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
27817 // CHECK23-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
27818 // CHECK23-NEXT:    [[ARGV_ADDR:%.*]] = alloca i8**, align 4
27819 // CHECK23-NEXT:    [[N:%.*]] = alloca i32, align 4
27820 // CHECK23-NEXT:    [[SAVED_STACK:%.*]] = alloca i8*, align 4
27821 // CHECK23-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i32, align 4
27822 // CHECK23-NEXT:    [[M:%.*]] = alloca i32, align 4
27823 // CHECK23-NEXT:    [[I:%.*]] = alloca i32, align 4
27824 // CHECK23-NEXT:    [[I1:%.*]] = alloca i32, align 4
27825 // CHECK23-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
27826 // CHECK23-NEXT:    [[I9:%.*]] = alloca i32, align 4
27827 // CHECK23-NEXT:    [[I17:%.*]] = alloca i32, align 4
27828 // CHECK23-NEXT:    [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4
27829 // CHECK23-NEXT:    [[I26:%.*]] = alloca i32, align 4
27830 // CHECK23-NEXT:    store i32 0, i32* [[RETVAL]], align 4
27831 // CHECK23-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
27832 // CHECK23-NEXT:    store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
27833 // CHECK23-NEXT:    store i32 100, i32* [[N]], align 4
27834 // CHECK23-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N]], align 4
27835 // CHECK23-NEXT:    [[TMP1:%.*]] = call i8* @llvm.stacksave()
27836 // CHECK23-NEXT:    store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
27837 // CHECK23-NEXT:    [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
27838 // CHECK23-NEXT:    store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
27839 // CHECK23-NEXT:    store i32 10, i32* [[M]], align 4
27840 // CHECK23-NEXT:    store i32 0, i32* [[I]], align 4
27841 // CHECK23-NEXT:    br label [[FOR_COND:%.*]]
27842 // CHECK23:       for.cond:
27843 // CHECK23-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I]], align 4
27844 // CHECK23-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N]], align 4
27845 // CHECK23-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP2]], [[TMP3]]
27846 // CHECK23-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
27847 // CHECK23:       for.body:
27848 // CHECK23-NEXT:    [[TMP4:%.*]] = load i32, i32* [[I]], align 4
27849 // CHECK23-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP4]]
27850 // CHECK23-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
27851 // CHECK23-NEXT:    br label [[FOR_INC:%.*]]
27852 // CHECK23:       for.inc:
27853 // CHECK23-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I]], align 4
27854 // CHECK23-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP5]], 1
27855 // CHECK23-NEXT:    store i32 [[INC]], i32* [[I]], align 4
27856 // CHECK23-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
27857 // CHECK23:       for.end:
27858 // CHECK23-NEXT:    store i32 0, i32* [[I1]], align 4
27859 // CHECK23-NEXT:    br label [[FOR_COND2:%.*]]
27860 // CHECK23:       for.cond2:
27861 // CHECK23-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I1]], align 4
27862 // CHECK23-NEXT:    [[TMP7:%.*]] = load i32, i32* [[N]], align 4
27863 // CHECK23-NEXT:    [[CMP3:%.*]] = icmp slt i32 [[TMP6]], [[TMP7]]
27864 // CHECK23-NEXT:    br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END8:%.*]]
27865 // CHECK23:       for.body4:
27866 // CHECK23-NEXT:    [[TMP8:%.*]] = load i32, i32* [[I1]], align 4
27867 // CHECK23-NEXT:    [[ARRAYIDX5:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP8]]
27868 // CHECK23-NEXT:    store i32 0, i32* [[ARRAYIDX5]], align 4
27869 // CHECK23-NEXT:    br label [[FOR_INC6:%.*]]
27870 // CHECK23:       for.inc6:
27871 // CHECK23-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I1]], align 4
27872 // CHECK23-NEXT:    [[INC7:%.*]] = add nsw i32 [[TMP9]], 1
27873 // CHECK23-NEXT:    store i32 [[INC7]], i32* [[I1]], align 4
27874 // CHECK23-NEXT:    br label [[FOR_COND2]], !llvm.loop [[LOOP5:![0-9]+]]
27875 // CHECK23:       for.end8:
27876 // CHECK23-NEXT:    [[TMP10:%.*]] = load i32, i32* [[M]], align 4
27877 // CHECK23-NEXT:    store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR_]], align 4
27878 // CHECK23-NEXT:    store i32 0, i32* [[I9]], align 4
27879 // CHECK23-NEXT:    br label [[FOR_COND10:%.*]]
27880 // CHECK23:       for.cond10:
27881 // CHECK23-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I9]], align 4
27882 // CHECK23-NEXT:    [[TMP12:%.*]] = load i32, i32* [[N]], align 4
27883 // CHECK23-NEXT:    [[CMP11:%.*]] = icmp slt i32 [[TMP11]], [[TMP12]]
27884 // CHECK23-NEXT:    br i1 [[CMP11]], label [[FOR_BODY12:%.*]], label [[FOR_END16:%.*]]
27885 // CHECK23:       for.body12:
27886 // CHECK23-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I9]], align 4
27887 // CHECK23-NEXT:    [[ARRAYIDX13:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP13]]
27888 // CHECK23-NEXT:    store i32 0, i32* [[ARRAYIDX13]], align 4
27889 // CHECK23-NEXT:    br label [[FOR_INC14:%.*]]
27890 // CHECK23:       for.inc14:
27891 // CHECK23-NEXT:    [[TMP14:%.*]] = load i32, i32* [[I9]], align 4
27892 // CHECK23-NEXT:    [[INC15:%.*]] = add nsw i32 [[TMP14]], 1
27893 // CHECK23-NEXT:    store i32 [[INC15]], i32* [[I9]], align 4
27894 // CHECK23-NEXT:    br label [[FOR_COND10]], !llvm.loop [[LOOP6:![0-9]+]]
27895 // CHECK23:       for.end16:
27896 // CHECK23-NEXT:    store i32 0, i32* [[I17]], align 4
27897 // CHECK23-NEXT:    br label [[FOR_COND18:%.*]]
27898 // CHECK23:       for.cond18:
27899 // CHECK23-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I17]], align 4
27900 // CHECK23-NEXT:    [[TMP16:%.*]] = load i32, i32* [[N]], align 4
27901 // CHECK23-NEXT:    [[CMP19:%.*]] = icmp slt i32 [[TMP15]], [[TMP16]]
27902 // CHECK23-NEXT:    br i1 [[CMP19]], label [[FOR_BODY20:%.*]], label [[FOR_END24:%.*]]
27903 // CHECK23:       for.body20:
27904 // CHECK23-NEXT:    [[TMP17:%.*]] = load i32, i32* [[I17]], align 4
27905 // CHECK23-NEXT:    [[ARRAYIDX21:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP17]]
27906 // CHECK23-NEXT:    store i32 0, i32* [[ARRAYIDX21]], align 4
27907 // CHECK23-NEXT:    br label [[FOR_INC22:%.*]]
27908 // CHECK23:       for.inc22:
27909 // CHECK23-NEXT:    [[TMP18:%.*]] = load i32, i32* [[I17]], align 4
27910 // CHECK23-NEXT:    [[INC23:%.*]] = add nsw i32 [[TMP18]], 1
27911 // CHECK23-NEXT:    store i32 [[INC23]], i32* [[I17]], align 4
27912 // CHECK23-NEXT:    br label [[FOR_COND18]], !llvm.loop [[LOOP7:![0-9]+]]
27913 // CHECK23:       for.end24:
27914 // CHECK23-NEXT:    [[TMP19:%.*]] = load i32, i32* [[M]], align 4
27915 // CHECK23-NEXT:    store i32 [[TMP19]], i32* [[DOTCAPTURE_EXPR_25]], align 4
27916 // CHECK23-NEXT:    store i32 0, i32* [[I26]], align 4
27917 // CHECK23-NEXT:    br label [[FOR_COND27:%.*]]
27918 // CHECK23:       for.cond27:
27919 // CHECK23-NEXT:    [[TMP20:%.*]] = load i32, i32* [[I26]], align 4
27920 // CHECK23-NEXT:    [[TMP21:%.*]] = load i32, i32* [[N]], align 4
27921 // CHECK23-NEXT:    [[CMP28:%.*]] = icmp slt i32 [[TMP20]], [[TMP21]]
27922 // CHECK23-NEXT:    br i1 [[CMP28]], label [[FOR_BODY29:%.*]], label [[FOR_END33:%.*]]
27923 // CHECK23:       for.body29:
27924 // CHECK23-NEXT:    [[TMP22:%.*]] = load i32, i32* [[I26]], align 4
27925 // CHECK23-NEXT:    [[ARRAYIDX30:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP22]]
27926 // CHECK23-NEXT:    store i32 0, i32* [[ARRAYIDX30]], align 4
27927 // CHECK23-NEXT:    br label [[FOR_INC31:%.*]]
27928 // CHECK23:       for.inc31:
27929 // CHECK23-NEXT:    [[TMP23:%.*]] = load i32, i32* [[I26]], align 4
27930 // CHECK23-NEXT:    [[INC32:%.*]] = add nsw i32 [[TMP23]], 1
27931 // CHECK23-NEXT:    store i32 [[INC32]], i32* [[I26]], align 4
27932 // CHECK23-NEXT:    br label [[FOR_COND27]], !llvm.loop [[LOOP8:![0-9]+]]
27933 // CHECK23:       for.end33:
27934 // CHECK23-NEXT:    [[TMP24:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
27935 // CHECK23-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP24]])
27936 // CHECK23-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
27937 // CHECK23-NEXT:    [[TMP25:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
27938 // CHECK23-NEXT:    call void @llvm.stackrestore(i8* [[TMP25]])
27939 // CHECK23-NEXT:    [[TMP26:%.*]] = load i32, i32* [[RETVAL]], align 4
27940 // CHECK23-NEXT:    ret i32 [[TMP26]]
27941 //
27942 //
27943 // CHECK23-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
27944 // CHECK23-SAME: (i32 [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {
27945 // CHECK23-NEXT:  entry:
27946 // CHECK23-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
27947 // CHECK23-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
27948 // CHECK23-NEXT:    [[M:%.*]] = alloca i32, align 4
27949 // CHECK23-NEXT:    [[I:%.*]] = alloca i32, align 4
27950 // CHECK23-NEXT:    [[I1:%.*]] = alloca i32, align 4
27951 // CHECK23-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
27952 // CHECK23-NEXT:    [[I9:%.*]] = alloca i32, align 4
27953 // CHECK23-NEXT:    [[I17:%.*]] = alloca i32, align 4
27954 // CHECK23-NEXT:    [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4
27955 // CHECK23-NEXT:    [[I26:%.*]] = alloca i32, align 4
27956 // CHECK23-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
27957 // CHECK23-NEXT:    store i32 10, i32* [[M]], align 4
27958 // CHECK23-NEXT:    store i32 0, i32* [[I]], align 4
27959 // CHECK23-NEXT:    br label [[FOR_COND:%.*]]
27960 // CHECK23:       for.cond:
27961 // CHECK23-NEXT:    [[TMP0:%.*]] = load i32, i32* [[I]], align 4
27962 // CHECK23-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP0]], 10
27963 // CHECK23-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
27964 // CHECK23:       for.body:
27965 // CHECK23-NEXT:    [[TMP1:%.*]] = load i32, i32* [[I]], align 4
27966 // CHECK23-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP1]]
27967 // CHECK23-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
27968 // CHECK23-NEXT:    br label [[FOR_INC:%.*]]
27969 // CHECK23:       for.inc:
27970 // CHECK23-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I]], align 4
27971 // CHECK23-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP2]], 1
27972 // CHECK23-NEXT:    store i32 [[INC]], i32* [[I]], align 4
27973 // CHECK23-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
27974 // CHECK23:       for.end:
27975 // CHECK23-NEXT:    store i32 0, i32* [[I1]], align 4
27976 // CHECK23-NEXT:    br label [[FOR_COND2:%.*]]
27977 // CHECK23:       for.cond2:
27978 // CHECK23-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I1]], align 4
27979 // CHECK23-NEXT:    [[CMP3:%.*]] = icmp slt i32 [[TMP3]], 10
27980 // CHECK23-NEXT:    br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END8:%.*]]
27981 // CHECK23:       for.body4:
27982 // CHECK23-NEXT:    [[TMP4:%.*]] = load i32, i32* [[I1]], align 4
27983 // CHECK23-NEXT:    [[ARRAYIDX5:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP4]]
27984 // CHECK23-NEXT:    store i32 0, i32* [[ARRAYIDX5]], align 4
27985 // CHECK23-NEXT:    br label [[FOR_INC6:%.*]]
27986 // CHECK23:       for.inc6:
27987 // CHECK23-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I1]], align 4
27988 // CHECK23-NEXT:    [[INC7:%.*]] = add nsw i32 [[TMP5]], 1
27989 // CHECK23-NEXT:    store i32 [[INC7]], i32* [[I1]], align 4
27990 // CHECK23-NEXT:    br label [[FOR_COND2]], !llvm.loop [[LOOP10:![0-9]+]]
27991 // CHECK23:       for.end8:
27992 // CHECK23-NEXT:    [[TMP6:%.*]] = load i32, i32* [[M]], align 4
27993 // CHECK23-NEXT:    store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_]], align 4
27994 // CHECK23-NEXT:    store i32 0, i32* [[I9]], align 4
27995 // CHECK23-NEXT:    br label [[FOR_COND10:%.*]]
27996 // CHECK23:       for.cond10:
27997 // CHECK23-NEXT:    [[TMP7:%.*]] = load i32, i32* [[I9]], align 4
27998 // CHECK23-NEXT:    [[CMP11:%.*]] = icmp slt i32 [[TMP7]], 10
27999 // CHECK23-NEXT:    br i1 [[CMP11]], label [[FOR_BODY12:%.*]], label [[FOR_END16:%.*]]
28000 // CHECK23:       for.body12:
28001 // CHECK23-NEXT:    [[TMP8:%.*]] = load i32, i32* [[I9]], align 4
28002 // CHECK23-NEXT:    [[ARRAYIDX13:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP8]]
28003 // CHECK23-NEXT:    store i32 0, i32* [[ARRAYIDX13]], align 4
28004 // CHECK23-NEXT:    br label [[FOR_INC14:%.*]]
28005 // CHECK23:       for.inc14:
28006 // CHECK23-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I9]], align 4
28007 // CHECK23-NEXT:    [[INC15:%.*]] = add nsw i32 [[TMP9]], 1
28008 // CHECK23-NEXT:    store i32 [[INC15]], i32* [[I9]], align 4
28009 // CHECK23-NEXT:    br label [[FOR_COND10]], !llvm.loop [[LOOP11:![0-9]+]]
28010 // CHECK23:       for.end16:
28011 // CHECK23-NEXT:    store i32 0, i32* [[I17]], align 4
28012 // CHECK23-NEXT:    br label [[FOR_COND18:%.*]]
28013 // CHECK23:       for.cond18:
28014 // CHECK23-NEXT:    [[TMP10:%.*]] = load i32, i32* [[I17]], align 4
28015 // CHECK23-NEXT:    [[CMP19:%.*]] = icmp slt i32 [[TMP10]], 10
28016 // CHECK23-NEXT:    br i1 [[CMP19]], label [[FOR_BODY20:%.*]], label [[FOR_END24:%.*]]
28017 // CHECK23:       for.body20:
28018 // CHECK23-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I17]], align 4
28019 // CHECK23-NEXT:    [[ARRAYIDX21:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP11]]
28020 // CHECK23-NEXT:    store i32 0, i32* [[ARRAYIDX21]], align 4
28021 // CHECK23-NEXT:    br label [[FOR_INC22:%.*]]
28022 // CHECK23:       for.inc22:
28023 // CHECK23-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I17]], align 4
28024 // CHECK23-NEXT:    [[INC23:%.*]] = add nsw i32 [[TMP12]], 1
28025 // CHECK23-NEXT:    store i32 [[INC23]], i32* [[I17]], align 4
28026 // CHECK23-NEXT:    br label [[FOR_COND18]], !llvm.loop [[LOOP12:![0-9]+]]
28027 // CHECK23:       for.end24:
28028 // CHECK23-NEXT:    [[TMP13:%.*]] = load i32, i32* [[M]], align 4
28029 // CHECK23-NEXT:    store i32 [[TMP13]], i32* [[DOTCAPTURE_EXPR_25]], align 4
28030 // CHECK23-NEXT:    store i32 0, i32* [[I26]], align 4
28031 // CHECK23-NEXT:    br label [[FOR_COND27:%.*]]
28032 // CHECK23:       for.cond27:
28033 // CHECK23-NEXT:    [[TMP14:%.*]] = load i32, i32* [[I26]], align 4
28034 // CHECK23-NEXT:    [[CMP28:%.*]] = icmp slt i32 [[TMP14]], 10
28035 // CHECK23-NEXT:    br i1 [[CMP28]], label [[FOR_BODY29:%.*]], label [[FOR_END33:%.*]]
28036 // CHECK23:       for.body29:
28037 // CHECK23-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I26]], align 4
28038 // CHECK23-NEXT:    [[ARRAYIDX30:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP15]]
28039 // CHECK23-NEXT:    store i32 0, i32* [[ARRAYIDX30]], align 4
28040 // CHECK23-NEXT:    br label [[FOR_INC31:%.*]]
28041 // CHECK23:       for.inc31:
28042 // CHECK23-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I26]], align 4
28043 // CHECK23-NEXT:    [[INC32:%.*]] = add nsw i32 [[TMP16]], 1
28044 // CHECK23-NEXT:    store i32 [[INC32]], i32* [[I26]], align 4
28045 // CHECK23-NEXT:    br label [[FOR_COND27]], !llvm.loop [[LOOP13:![0-9]+]]
28046 // CHECK23:       for.end33:
28047 // CHECK23-NEXT:    ret i32 0
28048 //
28049 //
28050 // CHECK24-LABEL: define {{[^@]+}}@main
28051 // CHECK24-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
28052 // CHECK24-NEXT:  entry:
28053 // CHECK24-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
28054 // CHECK24-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
28055 // CHECK24-NEXT:    [[ARGV_ADDR:%.*]] = alloca i8**, align 4
28056 // CHECK24-NEXT:    [[N:%.*]] = alloca i32, align 4
28057 // CHECK24-NEXT:    [[SAVED_STACK:%.*]] = alloca i8*, align 4
28058 // CHECK24-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i32, align 4
28059 // CHECK24-NEXT:    [[M:%.*]] = alloca i32, align 4
28060 // CHECK24-NEXT:    [[I:%.*]] = alloca i32, align 4
28061 // CHECK24-NEXT:    [[I1:%.*]] = alloca i32, align 4
28062 // CHECK24-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
28063 // CHECK24-NEXT:    [[I9:%.*]] = alloca i32, align 4
28064 // CHECK24-NEXT:    [[I17:%.*]] = alloca i32, align 4
28065 // CHECK24-NEXT:    [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4
28066 // CHECK24-NEXT:    [[I26:%.*]] = alloca i32, align 4
28067 // CHECK24-NEXT:    store i32 0, i32* [[RETVAL]], align 4
28068 // CHECK24-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
28069 // CHECK24-NEXT:    store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4
28070 // CHECK24-NEXT:    store i32 100, i32* [[N]], align 4
28071 // CHECK24-NEXT:    [[TMP0:%.*]] = load i32, i32* [[N]], align 4
28072 // CHECK24-NEXT:    [[TMP1:%.*]] = call i8* @llvm.stacksave()
28073 // CHECK24-NEXT:    store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4
28074 // CHECK24-NEXT:    [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
28075 // CHECK24-NEXT:    store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4
28076 // CHECK24-NEXT:    store i32 10, i32* [[M]], align 4
28077 // CHECK24-NEXT:    store i32 0, i32* [[I]], align 4
28078 // CHECK24-NEXT:    br label [[FOR_COND:%.*]]
28079 // CHECK24:       for.cond:
28080 // CHECK24-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I]], align 4
28081 // CHECK24-NEXT:    [[TMP3:%.*]] = load i32, i32* [[N]], align 4
28082 // CHECK24-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP2]], [[TMP3]]
28083 // CHECK24-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
28084 // CHECK24:       for.body:
28085 // CHECK24-NEXT:    [[TMP4:%.*]] = load i32, i32* [[I]], align 4
28086 // CHECK24-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP4]]
28087 // CHECK24-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
28088 // CHECK24-NEXT:    br label [[FOR_INC:%.*]]
28089 // CHECK24:       for.inc:
28090 // CHECK24-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I]], align 4
28091 // CHECK24-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP5]], 1
28092 // CHECK24-NEXT:    store i32 [[INC]], i32* [[I]], align 4
28093 // CHECK24-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
28094 // CHECK24:       for.end:
28095 // CHECK24-NEXT:    store i32 0, i32* [[I1]], align 4
28096 // CHECK24-NEXT:    br label [[FOR_COND2:%.*]]
28097 // CHECK24:       for.cond2:
28098 // CHECK24-NEXT:    [[TMP6:%.*]] = load i32, i32* [[I1]], align 4
28099 // CHECK24-NEXT:    [[TMP7:%.*]] = load i32, i32* [[N]], align 4
28100 // CHECK24-NEXT:    [[CMP3:%.*]] = icmp slt i32 [[TMP6]], [[TMP7]]
28101 // CHECK24-NEXT:    br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END8:%.*]]
28102 // CHECK24:       for.body4:
28103 // CHECK24-NEXT:    [[TMP8:%.*]] = load i32, i32* [[I1]], align 4
28104 // CHECK24-NEXT:    [[ARRAYIDX5:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP8]]
28105 // CHECK24-NEXT:    store i32 0, i32* [[ARRAYIDX5]], align 4
28106 // CHECK24-NEXT:    br label [[FOR_INC6:%.*]]
28107 // CHECK24:       for.inc6:
28108 // CHECK24-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I1]], align 4
28109 // CHECK24-NEXT:    [[INC7:%.*]] = add nsw i32 [[TMP9]], 1
28110 // CHECK24-NEXT:    store i32 [[INC7]], i32* [[I1]], align 4
28111 // CHECK24-NEXT:    br label [[FOR_COND2]], !llvm.loop [[LOOP5:![0-9]+]]
28112 // CHECK24:       for.end8:
28113 // CHECK24-NEXT:    [[TMP10:%.*]] = load i32, i32* [[M]], align 4
28114 // CHECK24-NEXT:    store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR_]], align 4
28115 // CHECK24-NEXT:    store i32 0, i32* [[I9]], align 4
28116 // CHECK24-NEXT:    br label [[FOR_COND10:%.*]]
28117 // CHECK24:       for.cond10:
28118 // CHECK24-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I9]], align 4
28119 // CHECK24-NEXT:    [[TMP12:%.*]] = load i32, i32* [[N]], align 4
28120 // CHECK24-NEXT:    [[CMP11:%.*]] = icmp slt i32 [[TMP11]], [[TMP12]]
28121 // CHECK24-NEXT:    br i1 [[CMP11]], label [[FOR_BODY12:%.*]], label [[FOR_END16:%.*]]
28122 // CHECK24:       for.body12:
28123 // CHECK24-NEXT:    [[TMP13:%.*]] = load i32, i32* [[I9]], align 4
28124 // CHECK24-NEXT:    [[ARRAYIDX13:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP13]]
28125 // CHECK24-NEXT:    store i32 0, i32* [[ARRAYIDX13]], align 4
28126 // CHECK24-NEXT:    br label [[FOR_INC14:%.*]]
28127 // CHECK24:       for.inc14:
28128 // CHECK24-NEXT:    [[TMP14:%.*]] = load i32, i32* [[I9]], align 4
28129 // CHECK24-NEXT:    [[INC15:%.*]] = add nsw i32 [[TMP14]], 1
28130 // CHECK24-NEXT:    store i32 [[INC15]], i32* [[I9]], align 4
28131 // CHECK24-NEXT:    br label [[FOR_COND10]], !llvm.loop [[LOOP6:![0-9]+]]
28132 // CHECK24:       for.end16:
28133 // CHECK24-NEXT:    store i32 0, i32* [[I17]], align 4
28134 // CHECK24-NEXT:    br label [[FOR_COND18:%.*]]
28135 // CHECK24:       for.cond18:
28136 // CHECK24-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I17]], align 4
28137 // CHECK24-NEXT:    [[TMP16:%.*]] = load i32, i32* [[N]], align 4
28138 // CHECK24-NEXT:    [[CMP19:%.*]] = icmp slt i32 [[TMP15]], [[TMP16]]
28139 // CHECK24-NEXT:    br i1 [[CMP19]], label [[FOR_BODY20:%.*]], label [[FOR_END24:%.*]]
28140 // CHECK24:       for.body20:
28141 // CHECK24-NEXT:    [[TMP17:%.*]] = load i32, i32* [[I17]], align 4
28142 // CHECK24-NEXT:    [[ARRAYIDX21:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP17]]
28143 // CHECK24-NEXT:    store i32 0, i32* [[ARRAYIDX21]], align 4
28144 // CHECK24-NEXT:    br label [[FOR_INC22:%.*]]
28145 // CHECK24:       for.inc22:
28146 // CHECK24-NEXT:    [[TMP18:%.*]] = load i32, i32* [[I17]], align 4
28147 // CHECK24-NEXT:    [[INC23:%.*]] = add nsw i32 [[TMP18]], 1
28148 // CHECK24-NEXT:    store i32 [[INC23]], i32* [[I17]], align 4
28149 // CHECK24-NEXT:    br label [[FOR_COND18]], !llvm.loop [[LOOP7:![0-9]+]]
28150 // CHECK24:       for.end24:
28151 // CHECK24-NEXT:    [[TMP19:%.*]] = load i32, i32* [[M]], align 4
28152 // CHECK24-NEXT:    store i32 [[TMP19]], i32* [[DOTCAPTURE_EXPR_25]], align 4
28153 // CHECK24-NEXT:    store i32 0, i32* [[I26]], align 4
28154 // CHECK24-NEXT:    br label [[FOR_COND27:%.*]]
28155 // CHECK24:       for.cond27:
28156 // CHECK24-NEXT:    [[TMP20:%.*]] = load i32, i32* [[I26]], align 4
28157 // CHECK24-NEXT:    [[TMP21:%.*]] = load i32, i32* [[N]], align 4
28158 // CHECK24-NEXT:    [[CMP28:%.*]] = icmp slt i32 [[TMP20]], [[TMP21]]
28159 // CHECK24-NEXT:    br i1 [[CMP28]], label [[FOR_BODY29:%.*]], label [[FOR_END33:%.*]]
28160 // CHECK24:       for.body29:
28161 // CHECK24-NEXT:    [[TMP22:%.*]] = load i32, i32* [[I26]], align 4
28162 // CHECK24-NEXT:    [[ARRAYIDX30:%.*]] = getelementptr inbounds i32, i32* [[VLA]], i32 [[TMP22]]
28163 // CHECK24-NEXT:    store i32 0, i32* [[ARRAYIDX30]], align 4
28164 // CHECK24-NEXT:    br label [[FOR_INC31:%.*]]
28165 // CHECK24:       for.inc31:
28166 // CHECK24-NEXT:    [[TMP23:%.*]] = load i32, i32* [[I26]], align 4
28167 // CHECK24-NEXT:    [[INC32:%.*]] = add nsw i32 [[TMP23]], 1
28168 // CHECK24-NEXT:    store i32 [[INC32]], i32* [[I26]], align 4
28169 // CHECK24-NEXT:    br label [[FOR_COND27]], !llvm.loop [[LOOP8:![0-9]+]]
28170 // CHECK24:       for.end33:
28171 // CHECK24-NEXT:    [[TMP24:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4
28172 // CHECK24-NEXT:    [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP24]])
28173 // CHECK24-NEXT:    store i32 [[CALL]], i32* [[RETVAL]], align 4
28174 // CHECK24-NEXT:    [[TMP25:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4
28175 // CHECK24-NEXT:    call void @llvm.stackrestore(i8* [[TMP25]])
28176 // CHECK24-NEXT:    [[TMP26:%.*]] = load i32, i32* [[RETVAL]], align 4
28177 // CHECK24-NEXT:    ret i32 [[TMP26]]
28178 //
28179 //
28180 // CHECK24-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
28181 // CHECK24-SAME: (i32 [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {
28182 // CHECK24-NEXT:  entry:
28183 // CHECK24-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
28184 // CHECK24-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
28185 // CHECK24-NEXT:    [[M:%.*]] = alloca i32, align 4
28186 // CHECK24-NEXT:    [[I:%.*]] = alloca i32, align 4
28187 // CHECK24-NEXT:    [[I1:%.*]] = alloca i32, align 4
28188 // CHECK24-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
28189 // CHECK24-NEXT:    [[I9:%.*]] = alloca i32, align 4
28190 // CHECK24-NEXT:    [[I17:%.*]] = alloca i32, align 4
28191 // CHECK24-NEXT:    [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4
28192 // CHECK24-NEXT:    [[I26:%.*]] = alloca i32, align 4
28193 // CHECK24-NEXT:    store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4
28194 // CHECK24-NEXT:    store i32 10, i32* [[M]], align 4
28195 // CHECK24-NEXT:    store i32 0, i32* [[I]], align 4
28196 // CHECK24-NEXT:    br label [[FOR_COND:%.*]]
28197 // CHECK24:       for.cond:
28198 // CHECK24-NEXT:    [[TMP0:%.*]] = load i32, i32* [[I]], align 4
28199 // CHECK24-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP0]], 10
28200 // CHECK24-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
28201 // CHECK24:       for.body:
28202 // CHECK24-NEXT:    [[TMP1:%.*]] = load i32, i32* [[I]], align 4
28203 // CHECK24-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP1]]
28204 // CHECK24-NEXT:    store i32 0, i32* [[ARRAYIDX]], align 4
28205 // CHECK24-NEXT:    br label [[FOR_INC:%.*]]
28206 // CHECK24:       for.inc:
28207 // CHECK24-NEXT:    [[TMP2:%.*]] = load i32, i32* [[I]], align 4
28208 // CHECK24-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP2]], 1
28209 // CHECK24-NEXT:    store i32 [[INC]], i32* [[I]], align 4
28210 // CHECK24-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
28211 // CHECK24:       for.end:
28212 // CHECK24-NEXT:    store i32 0, i32* [[I1]], align 4
28213 // CHECK24-NEXT:    br label [[FOR_COND2:%.*]]
28214 // CHECK24:       for.cond2:
28215 // CHECK24-NEXT:    [[TMP3:%.*]] = load i32, i32* [[I1]], align 4
28216 // CHECK24-NEXT:    [[CMP3:%.*]] = icmp slt i32 [[TMP3]], 10
28217 // CHECK24-NEXT:    br i1 [[CMP3]], label [[FOR_BODY4:%.*]], label [[FOR_END8:%.*]]
28218 // CHECK24:       for.body4:
28219 // CHECK24-NEXT:    [[TMP4:%.*]] = load i32, i32* [[I1]], align 4
28220 // CHECK24-NEXT:    [[ARRAYIDX5:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP4]]
28221 // CHECK24-NEXT:    store i32 0, i32* [[ARRAYIDX5]], align 4
28222 // CHECK24-NEXT:    br label [[FOR_INC6:%.*]]
28223 // CHECK24:       for.inc6:
28224 // CHECK24-NEXT:    [[TMP5:%.*]] = load i32, i32* [[I1]], align 4
28225 // CHECK24-NEXT:    [[INC7:%.*]] = add nsw i32 [[TMP5]], 1
28226 // CHECK24-NEXT:    store i32 [[INC7]], i32* [[I1]], align 4
28227 // CHECK24-NEXT:    br label [[FOR_COND2]], !llvm.loop [[LOOP10:![0-9]+]]
28228 // CHECK24:       for.end8:
28229 // CHECK24-NEXT:    [[TMP6:%.*]] = load i32, i32* [[M]], align 4
28230 // CHECK24-NEXT:    store i32 [[TMP6]], i32* [[DOTCAPTURE_EXPR_]], align 4
28231 // CHECK24-NEXT:    store i32 0, i32* [[I9]], align 4
28232 // CHECK24-NEXT:    br label [[FOR_COND10:%.*]]
28233 // CHECK24:       for.cond10:
28234 // CHECK24-NEXT:    [[TMP7:%.*]] = load i32, i32* [[I9]], align 4
28235 // CHECK24-NEXT:    [[CMP11:%.*]] = icmp slt i32 [[TMP7]], 10
28236 // CHECK24-NEXT:    br i1 [[CMP11]], label [[FOR_BODY12:%.*]], label [[FOR_END16:%.*]]
28237 // CHECK24:       for.body12:
28238 // CHECK24-NEXT:    [[TMP8:%.*]] = load i32, i32* [[I9]], align 4
28239 // CHECK24-NEXT:    [[ARRAYIDX13:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP8]]
28240 // CHECK24-NEXT:    store i32 0, i32* [[ARRAYIDX13]], align 4
28241 // CHECK24-NEXT:    br label [[FOR_INC14:%.*]]
28242 // CHECK24:       for.inc14:
28243 // CHECK24-NEXT:    [[TMP9:%.*]] = load i32, i32* [[I9]], align 4
28244 // CHECK24-NEXT:    [[INC15:%.*]] = add nsw i32 [[TMP9]], 1
28245 // CHECK24-NEXT:    store i32 [[INC15]], i32* [[I9]], align 4
28246 // CHECK24-NEXT:    br label [[FOR_COND10]], !llvm.loop [[LOOP11:![0-9]+]]
28247 // CHECK24:       for.end16:
28248 // CHECK24-NEXT:    store i32 0, i32* [[I17]], align 4
28249 // CHECK24-NEXT:    br label [[FOR_COND18:%.*]]
28250 // CHECK24:       for.cond18:
28251 // CHECK24-NEXT:    [[TMP10:%.*]] = load i32, i32* [[I17]], align 4
28252 // CHECK24-NEXT:    [[CMP19:%.*]] = icmp slt i32 [[TMP10]], 10
28253 // CHECK24-NEXT:    br i1 [[CMP19]], label [[FOR_BODY20:%.*]], label [[FOR_END24:%.*]]
28254 // CHECK24:       for.body20:
28255 // CHECK24-NEXT:    [[TMP11:%.*]] = load i32, i32* [[I17]], align 4
28256 // CHECK24-NEXT:    [[ARRAYIDX21:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP11]]
28257 // CHECK24-NEXT:    store i32 0, i32* [[ARRAYIDX21]], align 4
28258 // CHECK24-NEXT:    br label [[FOR_INC22:%.*]]
28259 // CHECK24:       for.inc22:
28260 // CHECK24-NEXT:    [[TMP12:%.*]] = load i32, i32* [[I17]], align 4
28261 // CHECK24-NEXT:    [[INC23:%.*]] = add nsw i32 [[TMP12]], 1
28262 // CHECK24-NEXT:    store i32 [[INC23]], i32* [[I17]], align 4
28263 // CHECK24-NEXT:    br label [[FOR_COND18]], !llvm.loop [[LOOP12:![0-9]+]]
28264 // CHECK24:       for.end24:
28265 // CHECK24-NEXT:    [[TMP13:%.*]] = load i32, i32* [[M]], align 4
28266 // CHECK24-NEXT:    store i32 [[TMP13]], i32* [[DOTCAPTURE_EXPR_25]], align 4
28267 // CHECK24-NEXT:    store i32 0, i32* [[I26]], align 4
28268 // CHECK24-NEXT:    br label [[FOR_COND27:%.*]]
28269 // CHECK24:       for.cond27:
28270 // CHECK24-NEXT:    [[TMP14:%.*]] = load i32, i32* [[I26]], align 4
28271 // CHECK24-NEXT:    [[CMP28:%.*]] = icmp slt i32 [[TMP14]], 10
28272 // CHECK24-NEXT:    br i1 [[CMP28]], label [[FOR_BODY29:%.*]], label [[FOR_END33:%.*]]
28273 // CHECK24:       for.body29:
28274 // CHECK24-NEXT:    [[TMP15:%.*]] = load i32, i32* [[I26]], align 4
28275 // CHECK24-NEXT:    [[ARRAYIDX30:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[A]], i32 0, i32 [[TMP15]]
28276 // CHECK24-NEXT:    store i32 0, i32* [[ARRAYIDX30]], align 4
28277 // CHECK24-NEXT:    br label [[FOR_INC31:%.*]]
28278 // CHECK24:       for.inc31:
28279 // CHECK24-NEXT:    [[TMP16:%.*]] = load i32, i32* [[I26]], align 4
28280 // CHECK24-NEXT:    [[INC32:%.*]] = add nsw i32 [[TMP16]], 1
28281 // CHECK24-NEXT:    store i32 [[INC32]], i32* [[I26]], align 4
28282 // CHECK24-NEXT:    br label [[FOR_COND27]], !llvm.loop [[LOOP13:![0-9]+]]
28283 // CHECK24:       for.end33:
28284 // CHECK24-NEXT:    ret i32 0
28285 //
28286