1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // expected-no-diagnostics 3 #ifndef HEADER 4 #define HEADER 5 6 // Test host codegen. 7 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 8 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 9 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1 10 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 11 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 12 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3 13 14 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5 15 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 16 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5 17 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7 18 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 19 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK7 20 21 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 22 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 23 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 24 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 25 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 26 // RUN: %clang_cc1 -no-opaque-pointers -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 27 #ifdef CK1 28 29 template <typename T, int X, long long Y> 30 struct SS{ 31 T a[X]; 32 float b; 33 int foo(void) { 34 35 #pragma omp target 36 #pragma omp teams distribute parallel for 37 for(int i = 0; i < X; i++) { 38 a[i] = (T)0; 39 } 40 #pragma omp target 41 #pragma omp teams distribute parallel for schedule(static) 42 for(int i = 0; i < X; i++) { 43 a[i] = (T)0; 44 } 45 #pragma omp target 46 #pragma omp teams distribute parallel for schedule(static, X/2) 47 for(int i = 0; i < X; i++) { 48 a[i] = (T)0; 49 } 50 51 #pragma omp target 52 #pragma omp teams distribute parallel for schedule(dynamic) 53 for(int i = 0; i < X; i++) { 54 a[i] = (T)0; 55 } 56 57 #pragma omp target 58 #pragma omp teams distribute parallel for schedule(dynamic, X/2) 59 for(int i = 0; i < X; i++) { 60 a[i] = (T)0; 61 } 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 return a[0]; 79 } 80 }; 81 82 int teams_template_struct(void) { 83 SS<int, 123, 456> V; 84 return V.foo(); 85 86 } 87 #endif // CK1 88 89 // Test host codegen. 90 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13 91 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 92 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK13 93 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15 94 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 95 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15 96 97 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK17 98 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 99 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK17 100 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK19 101 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 102 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK19 103 104 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 105 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 106 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 107 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 108 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 109 // RUN: %clang_cc1 -no-opaque-pointers -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 110 #ifdef CK2 111 112 template <typename T, int n> 113 int tmain(T argc) { 114 T a[n]; 115 int m = 10; 116 #pragma omp target 117 #pragma omp teams distribute parallel for 118 for(int i = 0; i < n; i++) { 119 a[i] = (T)0; 120 } 121 #pragma omp target 122 #pragma omp teams distribute parallel for schedule(static) 123 for(int i = 0; i < n; i++) { 124 a[i] = (T)0; 125 } 126 #pragma omp target 127 #pragma omp teams distribute parallel for schedule(static, m) 128 for(int i = 0; i < n; i++) { 129 a[i] = (T)0; 130 } 131 #pragma omp target 132 #pragma omp teams distribute parallel for schedule(dynamic) 133 for(int i = 0; i < n; i++) { 134 a[i] = (T)0; 135 } 136 #pragma omp target 137 #pragma omp teams distribute parallel for schedule(dynamic, m) 138 for(int i = 0; i < n; i++) { 139 a[i] = (T)0; 140 } 141 return 0; 142 } 143 144 int main (int argc, char **argv) { 145 int n = 100; 146 int a[n]; 147 int m = 10; 148 #pragma omp target 149 #pragma omp teams distribute parallel for 150 for(int i = 0; i < n; i++) { 151 a[i] = 0; 152 } 153 #pragma omp target 154 #pragma omp teams distribute parallel for dist_schedule(static) 155 for(int i = 0; i < n; i++) { 156 a[i] = 0; 157 } 158 #pragma omp target 159 #pragma omp teams distribute parallel for dist_schedule(static, m) 160 for(int i = 0; i < n; i++) { 161 a[i] = 0; 162 } 163 #pragma omp target 164 #pragma omp teams distribute parallel for schedule(dynamic) 165 for(int i = 0; i < n; i++) { 166 a[i] = 0; 167 } 168 #pragma omp target 169 #pragma omp teams distribute parallel for schedule(dynamic, m) 170 for(int i = 0; i < n; i++) { 171 a[i] = 0; 172 } 173 return tmain<int, 10>(argc); 174 } 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 #endif // CK2 210 #endif // #ifndef HEADER 211 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv 212 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 213 // CHECK1-NEXT: entry: 214 // CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 215 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 216 // CHECK1-NEXT: ret i32 [[CALL]] 217 // 218 // 219 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 220 // CHECK1-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 221 // CHECK1-NEXT: entry: 222 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 223 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 224 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 225 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 226 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 227 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8 228 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8 229 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8 230 // CHECK1-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 231 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8 232 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8 233 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8 234 // CHECK1-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 235 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 8 236 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 8 237 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 8 238 // CHECK1-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 239 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 8 240 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 8 241 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 8 242 // CHECK1-NEXT: [[_TMP27:%.*]] = alloca i32, align 4 243 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 244 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 245 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 246 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 247 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 248 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 249 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 250 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 251 // CHECK1-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8 252 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 253 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8 254 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 255 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 256 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123) 257 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 258 // CHECK1-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 259 // CHECK1-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 260 // CHECK1: omp_offload.failed: 261 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 262 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 263 // CHECK1: omp_offload.cont: 264 // CHECK1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 265 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 266 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** 267 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8 268 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 269 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** 270 // CHECK1-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8 271 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0 272 // CHECK1-NEXT: store i8* null, i8** [[TMP13]], align 8 273 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 274 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 275 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 276 // CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 277 // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 278 // CHECK1-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 279 // CHECK1: omp_offload.failed7: 280 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]] 281 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT8]] 282 // CHECK1: omp_offload.cont8: 283 // CHECK1-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 284 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 285 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 286 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8 287 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 288 // CHECK1-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 289 // CHECK1-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8 290 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0 291 // CHECK1-NEXT: store i8* null, i8** [[TMP22]], align 8 292 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 293 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 294 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 295 // CHECK1-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 296 // CHECK1-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 297 // CHECK1-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 298 // CHECK1: omp_offload.failed14: 299 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(%struct.SS* [[THIS1]]) #[[ATTR2]] 300 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT15]] 301 // CHECK1: omp_offload.cont15: 302 // CHECK1-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 303 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 304 // CHECK1-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS** 305 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 8 306 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 307 // CHECK1-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]** 308 // CHECK1-NEXT: store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 8 309 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i64 0, i64 0 310 // CHECK1-NEXT: store i8* null, i8** [[TMP31]], align 8 311 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 312 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 313 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 314 // CHECK1-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 315 // CHECK1-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 316 // CHECK1-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]] 317 // CHECK1: omp_offload.failed21: 318 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(%struct.SS* [[THIS1]]) #[[ATTR2]] 319 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT22]] 320 // CHECK1: omp_offload.cont22: 321 // CHECK1-NEXT: [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 322 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 323 // CHECK1-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS** 324 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 8 325 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 326 // CHECK1-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]** 327 // CHECK1-NEXT: store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 8 328 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 0 329 // CHECK1-NEXT: store i8* null, i8** [[TMP40]], align 8 330 // CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 331 // CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 332 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 333 // CHECK1-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 334 // CHECK1-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 335 // CHECK1-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]] 336 // CHECK1: omp_offload.failed28: 337 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(%struct.SS* [[THIS1]]) #[[ATTR2]] 338 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT29]] 339 // CHECK1: omp_offload.cont29: 340 // CHECK1-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 341 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 0 342 // CHECK1-NEXT: [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 343 // CHECK1-NEXT: ret i32 [[TMP45]] 344 // 345 // 346 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35 347 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 348 // CHECK1-NEXT: entry: 349 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 350 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 351 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 352 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 353 // CHECK1-NEXT: ret void 354 // 355 // 356 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 357 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 358 // CHECK1-NEXT: entry: 359 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 360 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 361 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 362 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 363 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 364 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 365 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 366 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 367 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 368 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 369 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 370 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 371 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 372 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 373 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 374 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 375 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 376 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 377 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 378 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 379 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 380 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 381 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 382 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 383 // CHECK1: cond.true: 384 // CHECK1-NEXT: br label [[COND_END:%.*]] 385 // CHECK1: cond.false: 386 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 387 // CHECK1-NEXT: br label [[COND_END]] 388 // CHECK1: cond.end: 389 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 390 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 391 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 392 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 393 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 394 // CHECK1: omp.inner.for.cond: 395 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 396 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 397 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 398 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 399 // CHECK1: omp.inner.for.body: 400 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 401 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 402 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 403 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 404 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 405 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 406 // CHECK1: omp.inner.for.inc: 407 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 408 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 409 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 410 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 411 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 412 // CHECK1: omp.inner.for.end: 413 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 414 // CHECK1: omp.loop.exit: 415 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 416 // CHECK1-NEXT: ret void 417 // 418 // 419 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 420 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 421 // CHECK1-NEXT: entry: 422 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 423 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 424 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 425 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 426 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 427 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 428 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 429 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 430 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 431 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 432 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 433 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 434 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 435 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 436 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 437 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 438 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 439 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 440 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 441 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 442 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 443 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 444 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 445 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 446 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 447 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 448 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 449 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 450 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 451 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 452 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 453 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 454 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 455 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 456 // CHECK1: cond.true: 457 // CHECK1-NEXT: br label [[COND_END:%.*]] 458 // CHECK1: cond.false: 459 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 460 // CHECK1-NEXT: br label [[COND_END]] 461 // CHECK1: cond.end: 462 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 463 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 464 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 465 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 466 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 467 // CHECK1: omp.inner.for.cond: 468 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 469 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 470 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 471 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 472 // CHECK1: omp.inner.for.body: 473 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 474 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 475 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 476 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 477 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 478 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 479 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 480 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 481 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 482 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 483 // CHECK1: omp.body.continue: 484 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 485 // CHECK1: omp.inner.for.inc: 486 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 487 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 488 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 489 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 490 // CHECK1: omp.inner.for.end: 491 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 492 // CHECK1: omp.loop.exit: 493 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 494 // CHECK1-NEXT: ret void 495 // 496 // 497 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40 498 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 499 // CHECK1-NEXT: entry: 500 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 501 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 502 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 503 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 504 // CHECK1-NEXT: ret void 505 // 506 // 507 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2 508 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 509 // CHECK1-NEXT: entry: 510 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 511 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 512 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 513 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 514 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 515 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 516 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 517 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 518 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 519 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 520 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 521 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 522 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 523 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 524 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 525 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 526 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 527 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 528 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 529 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 530 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 531 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 532 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 533 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 534 // CHECK1: cond.true: 535 // CHECK1-NEXT: br label [[COND_END:%.*]] 536 // CHECK1: cond.false: 537 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 538 // CHECK1-NEXT: br label [[COND_END]] 539 // CHECK1: cond.end: 540 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 541 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 542 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 543 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 544 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 545 // CHECK1: omp.inner.for.cond: 546 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 547 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 548 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 549 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 550 // CHECK1: omp.inner.for.body: 551 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 552 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 553 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 554 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 555 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 556 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 557 // CHECK1: omp.inner.for.inc: 558 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 559 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 560 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 561 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 562 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 563 // CHECK1: omp.inner.for.end: 564 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 565 // CHECK1: omp.loop.exit: 566 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 567 // CHECK1-NEXT: ret void 568 // 569 // 570 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 571 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 572 // CHECK1-NEXT: entry: 573 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 574 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 575 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 576 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 577 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 578 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 579 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 580 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 581 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 582 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 583 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 584 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 585 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 586 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 587 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 588 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 589 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 590 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 591 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 592 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 593 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 594 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 595 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 596 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 597 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 598 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 599 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 600 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 601 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 602 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 603 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 604 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 605 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 606 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 607 // CHECK1: cond.true: 608 // CHECK1-NEXT: br label [[COND_END:%.*]] 609 // CHECK1: cond.false: 610 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 611 // CHECK1-NEXT: br label [[COND_END]] 612 // CHECK1: cond.end: 613 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 614 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 615 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 616 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 617 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 618 // CHECK1: omp.inner.for.cond: 619 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 620 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 621 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 622 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 623 // CHECK1: omp.inner.for.body: 624 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 625 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 626 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 627 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 628 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 629 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 630 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 631 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 632 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 633 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 634 // CHECK1: omp.body.continue: 635 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 636 // CHECK1: omp.inner.for.inc: 637 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 638 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 639 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 640 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 641 // CHECK1: omp.inner.for.end: 642 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 643 // CHECK1: omp.loop.exit: 644 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 645 // CHECK1-NEXT: ret void 646 // 647 // 648 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45 649 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 650 // CHECK1-NEXT: entry: 651 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 652 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 653 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 654 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 655 // CHECK1-NEXT: ret void 656 // 657 // 658 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6 659 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 660 // CHECK1-NEXT: entry: 661 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 662 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 663 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 664 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 665 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 666 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 667 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 668 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 669 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 670 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 671 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 672 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 673 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 674 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 675 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 676 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 677 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 678 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 679 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 680 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 681 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 682 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 683 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 684 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 685 // CHECK1: cond.true: 686 // CHECK1-NEXT: br label [[COND_END:%.*]] 687 // CHECK1: cond.false: 688 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 689 // CHECK1-NEXT: br label [[COND_END]] 690 // CHECK1: cond.end: 691 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 692 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 693 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 694 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 695 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 696 // CHECK1: omp.inner.for.cond: 697 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 698 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 699 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 700 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 701 // CHECK1: omp.inner.for.body: 702 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 703 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 704 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 705 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 706 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 707 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 708 // CHECK1: omp.inner.for.inc: 709 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 710 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 711 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 712 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 713 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 714 // CHECK1: omp.inner.for.end: 715 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 716 // CHECK1: omp.loop.exit: 717 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 718 // CHECK1-NEXT: ret void 719 // 720 // 721 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7 722 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 723 // CHECK1-NEXT: entry: 724 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 725 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 726 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 727 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 728 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 729 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 730 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 731 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 732 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 733 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 734 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 735 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 736 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 737 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 738 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 739 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 740 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 741 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 742 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 743 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 744 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 745 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 746 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 747 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 748 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 749 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 750 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 751 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 752 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 753 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 754 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 755 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 756 // CHECK1: omp.dispatch.cond: 757 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 758 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 759 // CHECK1-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32 760 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]] 761 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 762 // CHECK1: cond.true: 763 // CHECK1-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 764 // CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 765 // CHECK1-NEXT: br label [[COND_END:%.*]] 766 // CHECK1: cond.false: 767 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 768 // CHECK1-NEXT: br label [[COND_END]] 769 // CHECK1: cond.end: 770 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 771 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 772 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 773 // CHECK1-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 774 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 775 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 776 // CHECK1-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 777 // CHECK1-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 778 // CHECK1: omp.dispatch.body: 779 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 780 // CHECK1: omp.inner.for.cond: 781 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 782 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 783 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 784 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 785 // CHECK1: omp.inner.for.body: 786 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 787 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 788 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 789 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 790 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 791 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 792 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64 793 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 794 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 795 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 796 // CHECK1: omp.body.continue: 797 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 798 // CHECK1: omp.inner.for.inc: 799 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 800 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1 801 // CHECK1-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 802 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 803 // CHECK1: omp.inner.for.end: 804 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 805 // CHECK1: omp.dispatch.inc: 806 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 807 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 808 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 809 // CHECK1-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4 810 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 811 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 812 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 813 // CHECK1-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4 814 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] 815 // CHECK1: omp.dispatch.end: 816 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 817 // CHECK1-NEXT: ret void 818 // 819 // 820 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51 821 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 822 // CHECK1-NEXT: entry: 823 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 824 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 825 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 826 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 827 // CHECK1-NEXT: ret void 828 // 829 // 830 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10 831 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 832 // CHECK1-NEXT: entry: 833 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 834 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 835 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 836 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 837 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 838 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 839 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 840 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 841 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 842 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 843 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 844 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 845 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 846 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 847 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 848 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 849 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 850 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 851 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 852 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 853 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 854 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 855 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 856 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 857 // CHECK1: cond.true: 858 // CHECK1-NEXT: br label [[COND_END:%.*]] 859 // CHECK1: cond.false: 860 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 861 // CHECK1-NEXT: br label [[COND_END]] 862 // CHECK1: cond.end: 863 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 864 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 865 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 866 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 867 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 868 // CHECK1: omp.inner.for.cond: 869 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 870 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 871 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 872 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 873 // CHECK1: omp.inner.for.body: 874 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 875 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 876 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 877 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 878 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 879 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 880 // CHECK1: omp.inner.for.inc: 881 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 882 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 883 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 884 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 885 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 886 // CHECK1: omp.inner.for.end: 887 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 888 // CHECK1: omp.loop.exit: 889 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 890 // CHECK1-NEXT: ret void 891 // 892 // 893 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11 894 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 895 // CHECK1-NEXT: entry: 896 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 897 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 898 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 899 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 900 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 901 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 902 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 903 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 904 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 905 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 906 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 907 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 908 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 909 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 910 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 911 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 912 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 913 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 914 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 915 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 916 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 917 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 918 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 919 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 920 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 921 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 922 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 923 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 924 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 925 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 926 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 927 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 928 // CHECK1-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 929 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 930 // CHECK1: omp.dispatch.cond: 931 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 932 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 933 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 934 // CHECK1: omp.dispatch.body: 935 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 936 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 937 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 938 // CHECK1: omp.inner.for.cond: 939 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 940 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10 941 // CHECK1-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 942 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 943 // CHECK1: omp.inner.for.body: 944 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 945 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 946 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 947 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !10 948 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 949 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !10 950 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 951 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 952 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !10 953 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 954 // CHECK1: omp.body.continue: 955 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 956 // CHECK1: omp.inner.for.inc: 957 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 958 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 959 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 960 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]] 961 // CHECK1: omp.inner.for.end: 962 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 963 // CHECK1: omp.dispatch.inc: 964 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] 965 // CHECK1: omp.dispatch.end: 966 // CHECK1-NEXT: ret void 967 // 968 // 969 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57 970 // CHECK1-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 971 // CHECK1-NEXT: entry: 972 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 973 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 974 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 975 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 976 // CHECK1-NEXT: ret void 977 // 978 // 979 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..14 980 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 981 // CHECK1-NEXT: entry: 982 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 983 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 984 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 985 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 986 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 987 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 988 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 989 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 990 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 991 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 992 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 993 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 994 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 995 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 996 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 997 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 998 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 999 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1000 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1001 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1002 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1003 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1004 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1005 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1006 // CHECK1: cond.true: 1007 // CHECK1-NEXT: br label [[COND_END:%.*]] 1008 // CHECK1: cond.false: 1009 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1010 // CHECK1-NEXT: br label [[COND_END]] 1011 // CHECK1: cond.end: 1012 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1013 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1014 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1015 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1016 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1017 // CHECK1: omp.inner.for.cond: 1018 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1019 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1020 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1021 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1022 // CHECK1: omp.inner.for.body: 1023 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1024 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 1025 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1026 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 1027 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 1028 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1029 // CHECK1: omp.inner.for.inc: 1030 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1031 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1032 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1033 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1034 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1035 // CHECK1: omp.inner.for.end: 1036 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1037 // CHECK1: omp.loop.exit: 1038 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1039 // CHECK1-NEXT: ret void 1040 // 1041 // 1042 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..15 1043 // CHECK1-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1044 // CHECK1-NEXT: entry: 1045 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1046 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1047 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1048 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1049 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1050 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1051 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1052 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1053 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1054 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1055 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1056 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1057 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1058 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1059 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1060 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1061 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1062 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1063 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1064 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 1065 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1066 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 1067 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1068 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 1069 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1070 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1071 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1072 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1073 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1074 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1075 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1076 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 1077 // CHECK1-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61) 1078 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 1079 // CHECK1: omp.dispatch.cond: 1080 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 1081 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 1082 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 1083 // CHECK1: omp.dispatch.body: 1084 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1085 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 1086 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1087 // CHECK1: omp.inner.for.cond: 1088 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 1089 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13 1090 // CHECK1-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 1091 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1092 // CHECK1: omp.inner.for.body: 1093 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 1094 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 1095 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1096 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13 1097 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 1098 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13 1099 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 1100 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 1101 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13 1102 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1103 // CHECK1: omp.body.continue: 1104 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1105 // CHECK1: omp.inner.for.inc: 1106 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 1107 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 1108 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 1109 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 1110 // CHECK1: omp.inner.for.end: 1111 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 1112 // CHECK1: omp.dispatch.inc: 1113 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] 1114 // CHECK1: omp.dispatch.end: 1115 // CHECK1-NEXT: ret void 1116 // 1117 // 1118 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1119 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] { 1120 // CHECK1-NEXT: entry: 1121 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 1122 // CHECK1-NEXT: ret void 1123 // 1124 // 1125 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv 1126 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 1127 // CHECK3-NEXT: entry: 1128 // CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 1129 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 1130 // CHECK3-NEXT: ret i32 [[CALL]] 1131 // 1132 // 1133 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 1134 // CHECK3-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 1135 // CHECK3-NEXT: entry: 1136 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1137 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 1138 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 1139 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 1140 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1141 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4 1142 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4 1143 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4 1144 // CHECK3-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 1145 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4 1146 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4 1147 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4 1148 // CHECK3-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 1149 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 4 1150 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 4 1151 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 4 1152 // CHECK3-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 1153 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 4 1154 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 4 1155 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 4 1156 // CHECK3-NEXT: [[_TMP27:%.*]] = alloca i32, align 4 1157 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1158 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1159 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 1160 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1161 // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 1162 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4 1163 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1164 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 1165 // CHECK3-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4 1166 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1167 // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 4 1168 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1169 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1170 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123) 1171 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1172 // CHECK3-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 1173 // CHECK3-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1174 // CHECK3: omp_offload.failed: 1175 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 1176 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 1177 // CHECK3: omp_offload.cont: 1178 // CHECK3-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1179 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 1180 // CHECK3-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** 1181 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4 1182 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 1183 // CHECK3-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** 1184 // CHECK3-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4 1185 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0 1186 // CHECK3-NEXT: store i8* null, i8** [[TMP13]], align 4 1187 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 1188 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 1189 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 1190 // CHECK3-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1191 // CHECK3-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 1192 // CHECK3-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 1193 // CHECK3: omp_offload.failed7: 1194 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]] 1195 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT8]] 1196 // CHECK3: omp_offload.cont8: 1197 // CHECK3-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1198 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 1199 // CHECK3-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 1200 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4 1201 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 1202 // CHECK3-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 1203 // CHECK3-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4 1204 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0 1205 // CHECK3-NEXT: store i8* null, i8** [[TMP22]], align 4 1206 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 1207 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 1208 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 1209 // CHECK3-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1210 // CHECK3-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 1211 // CHECK3-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 1212 // CHECK3: omp_offload.failed14: 1213 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(%struct.SS* [[THIS1]]) #[[ATTR2]] 1214 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT15]] 1215 // CHECK3: omp_offload.cont15: 1216 // CHECK3-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1217 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 1218 // CHECK3-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS** 1219 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 4 1220 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 1221 // CHECK3-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]** 1222 // CHECK3-NEXT: store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 4 1223 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 0 1224 // CHECK3-NEXT: store i8* null, i8** [[TMP31]], align 4 1225 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 1226 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 1227 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 1228 // CHECK3-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1229 // CHECK3-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 1230 // CHECK3-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]] 1231 // CHECK3: omp_offload.failed21: 1232 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(%struct.SS* [[THIS1]]) #[[ATTR2]] 1233 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT22]] 1234 // CHECK3: omp_offload.cont22: 1235 // CHECK3-NEXT: [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1236 // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 1237 // CHECK3-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS** 1238 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 4 1239 // CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 1240 // CHECK3-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]** 1241 // CHECK3-NEXT: store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 4 1242 // CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 0 1243 // CHECK3-NEXT: store i8* null, i8** [[TMP40]], align 4 1244 // CHECK3-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 1245 // CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 1246 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 1247 // CHECK3-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1248 // CHECK3-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 1249 // CHECK3-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]] 1250 // CHECK3: omp_offload.failed28: 1251 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(%struct.SS* [[THIS1]]) #[[ATTR2]] 1252 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT29]] 1253 // CHECK3: omp_offload.cont29: 1254 // CHECK3-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1255 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i32 0, i32 0 1256 // CHECK3-NEXT: [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 1257 // CHECK3-NEXT: ret i32 [[TMP45]] 1258 // 1259 // 1260 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35 1261 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 1262 // CHECK3-NEXT: entry: 1263 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1264 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1265 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1266 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 1267 // CHECK3-NEXT: ret void 1268 // 1269 // 1270 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 1271 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1272 // CHECK3-NEXT: entry: 1273 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1274 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1275 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1276 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1277 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1278 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1279 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1280 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1281 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1282 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1283 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1284 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1285 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1286 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1287 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1288 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 1289 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1290 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1291 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1292 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1293 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1294 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1295 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1296 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1297 // CHECK3: cond.true: 1298 // CHECK3-NEXT: br label [[COND_END:%.*]] 1299 // CHECK3: cond.false: 1300 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1301 // CHECK3-NEXT: br label [[COND_END]] 1302 // CHECK3: cond.end: 1303 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1304 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1305 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1306 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1307 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1308 // CHECK3: omp.inner.for.cond: 1309 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1310 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1311 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1312 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1313 // CHECK3: omp.inner.for.body: 1314 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1315 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1316 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 1317 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1318 // CHECK3: omp.inner.for.inc: 1319 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1320 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1321 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 1322 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1323 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1324 // CHECK3: omp.inner.for.end: 1325 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1326 // CHECK3: omp.loop.exit: 1327 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1328 // CHECK3-NEXT: ret void 1329 // 1330 // 1331 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 1332 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1333 // CHECK3-NEXT: entry: 1334 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1335 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1336 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1337 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1338 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1339 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1340 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1341 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1342 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1343 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1344 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1345 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1346 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1347 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1348 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1349 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1350 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1351 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1352 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1353 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 1354 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1355 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1356 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 1357 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 1358 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1359 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1360 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1361 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1362 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1363 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1364 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 1365 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1366 // CHECK3: cond.true: 1367 // CHECK3-NEXT: br label [[COND_END:%.*]] 1368 // CHECK3: cond.false: 1369 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1370 // CHECK3-NEXT: br label [[COND_END]] 1371 // CHECK3: cond.end: 1372 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 1373 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1374 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1375 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 1376 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1377 // CHECK3: omp.inner.for.cond: 1378 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1379 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1380 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1381 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1382 // CHECK3: omp.inner.for.body: 1383 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1384 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 1385 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1386 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1387 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 1388 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 1389 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]] 1390 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1391 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1392 // CHECK3: omp.body.continue: 1393 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1394 // CHECK3: omp.inner.for.inc: 1395 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1396 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 1397 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 1398 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1399 // CHECK3: omp.inner.for.end: 1400 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1401 // CHECK3: omp.loop.exit: 1402 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 1403 // CHECK3-NEXT: ret void 1404 // 1405 // 1406 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40 1407 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1408 // CHECK3-NEXT: entry: 1409 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1410 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1411 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1412 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 1413 // CHECK3-NEXT: ret void 1414 // 1415 // 1416 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2 1417 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1418 // CHECK3-NEXT: entry: 1419 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1420 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1421 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1422 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1423 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1424 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1425 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1426 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1427 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1428 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1429 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1430 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1431 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1432 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1433 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1434 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 1435 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1436 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1437 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1438 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1439 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1440 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1441 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1442 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1443 // CHECK3: cond.true: 1444 // CHECK3-NEXT: br label [[COND_END:%.*]] 1445 // CHECK3: cond.false: 1446 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1447 // CHECK3-NEXT: br label [[COND_END]] 1448 // CHECK3: cond.end: 1449 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1450 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1451 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1452 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1453 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1454 // CHECK3: omp.inner.for.cond: 1455 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1456 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1457 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1458 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1459 // CHECK3: omp.inner.for.body: 1460 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1461 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1462 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 1463 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1464 // CHECK3: omp.inner.for.inc: 1465 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1466 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1467 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 1468 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1469 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1470 // CHECK3: omp.inner.for.end: 1471 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1472 // CHECK3: omp.loop.exit: 1473 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1474 // CHECK3-NEXT: ret void 1475 // 1476 // 1477 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3 1478 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1479 // CHECK3-NEXT: entry: 1480 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1481 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1482 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1483 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1484 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1485 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1486 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1487 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1488 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1489 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1490 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1491 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1492 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1493 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1494 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1495 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1496 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1497 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1498 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1499 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 1500 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1501 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1502 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 1503 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 1504 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1505 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1506 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1507 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1508 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1509 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1510 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 1511 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1512 // CHECK3: cond.true: 1513 // CHECK3-NEXT: br label [[COND_END:%.*]] 1514 // CHECK3: cond.false: 1515 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1516 // CHECK3-NEXT: br label [[COND_END]] 1517 // CHECK3: cond.end: 1518 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 1519 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1520 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1521 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 1522 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1523 // CHECK3: omp.inner.for.cond: 1524 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1525 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1526 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1527 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1528 // CHECK3: omp.inner.for.body: 1529 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1530 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 1531 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1532 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1533 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 1534 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 1535 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]] 1536 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1537 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1538 // CHECK3: omp.body.continue: 1539 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1540 // CHECK3: omp.inner.for.inc: 1541 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1542 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 1543 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 1544 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1545 // CHECK3: omp.inner.for.end: 1546 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1547 // CHECK3: omp.loop.exit: 1548 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 1549 // CHECK3-NEXT: ret void 1550 // 1551 // 1552 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45 1553 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1554 // CHECK3-NEXT: entry: 1555 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1556 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1557 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1558 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 1559 // CHECK3-NEXT: ret void 1560 // 1561 // 1562 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..6 1563 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1564 // CHECK3-NEXT: entry: 1565 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1566 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1567 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1568 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1569 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1570 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1571 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1572 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1573 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1574 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1575 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1576 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1577 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1578 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1579 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1580 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 1581 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1582 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1583 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1584 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1585 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1586 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1587 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1588 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1589 // CHECK3: cond.true: 1590 // CHECK3-NEXT: br label [[COND_END:%.*]] 1591 // CHECK3: cond.false: 1592 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1593 // CHECK3-NEXT: br label [[COND_END]] 1594 // CHECK3: cond.end: 1595 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1596 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1597 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1598 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1599 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1600 // CHECK3: omp.inner.for.cond: 1601 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1602 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1603 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1604 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1605 // CHECK3: omp.inner.for.body: 1606 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1607 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1608 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 1609 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1610 // CHECK3: omp.inner.for.inc: 1611 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1612 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1613 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 1614 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1615 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1616 // CHECK3: omp.inner.for.end: 1617 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1618 // CHECK3: omp.loop.exit: 1619 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1620 // CHECK3-NEXT: ret void 1621 // 1622 // 1623 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..7 1624 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1625 // CHECK3-NEXT: entry: 1626 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1627 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1628 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1629 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1630 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1631 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1632 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1633 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1634 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1635 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1636 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1637 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1638 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1639 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1640 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1641 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1642 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1643 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1644 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1645 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 1646 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1647 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1648 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 1649 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 1650 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1651 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1652 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1653 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1654 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 1655 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 1656 // CHECK3: omp.dispatch.cond: 1657 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1658 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1659 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]] 1660 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1661 // CHECK3: cond.true: 1662 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1663 // CHECK3-NEXT: br label [[COND_END:%.*]] 1664 // CHECK3: cond.false: 1665 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1666 // CHECK3-NEXT: br label [[COND_END]] 1667 // CHECK3: cond.end: 1668 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 1669 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1670 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1671 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 1672 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1673 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1674 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 1675 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 1676 // CHECK3: omp.dispatch.body: 1677 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1678 // CHECK3: omp.inner.for.cond: 1679 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1680 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1681 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 1682 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1683 // CHECK3: omp.inner.for.body: 1684 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1685 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 1686 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1687 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1688 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 1689 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 1690 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP15]] 1691 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1692 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1693 // CHECK3: omp.body.continue: 1694 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1695 // CHECK3: omp.inner.for.inc: 1696 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1697 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1 1698 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1699 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1700 // CHECK3: omp.inner.for.end: 1701 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 1702 // CHECK3: omp.dispatch.inc: 1703 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1704 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1705 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 1706 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 1707 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1708 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1709 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 1710 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 1711 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] 1712 // CHECK3: omp.dispatch.end: 1713 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 1714 // CHECK3-NEXT: ret void 1715 // 1716 // 1717 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51 1718 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1719 // CHECK3-NEXT: entry: 1720 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1721 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1722 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1723 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 1724 // CHECK3-NEXT: ret void 1725 // 1726 // 1727 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..10 1728 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1729 // CHECK3-NEXT: entry: 1730 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1731 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1732 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1733 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1734 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1735 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1736 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1737 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1738 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1739 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1740 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1741 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1742 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1743 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1744 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1745 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 1746 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1747 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1748 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1749 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1750 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1751 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1752 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1753 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1754 // CHECK3: cond.true: 1755 // CHECK3-NEXT: br label [[COND_END:%.*]] 1756 // CHECK3: cond.false: 1757 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1758 // CHECK3-NEXT: br label [[COND_END]] 1759 // CHECK3: cond.end: 1760 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1761 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1762 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1763 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1764 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1765 // CHECK3: omp.inner.for.cond: 1766 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1767 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1768 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1769 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1770 // CHECK3: omp.inner.for.body: 1771 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1772 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1773 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 1774 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1775 // CHECK3: omp.inner.for.inc: 1776 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1777 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1778 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 1779 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1780 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1781 // CHECK3: omp.inner.for.end: 1782 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1783 // CHECK3: omp.loop.exit: 1784 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1785 // CHECK3-NEXT: ret void 1786 // 1787 // 1788 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..11 1789 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1790 // CHECK3-NEXT: entry: 1791 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1792 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1793 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1794 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1795 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1796 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1797 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1798 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1799 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1800 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1801 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1802 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1803 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1804 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1805 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1806 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1807 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1808 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1809 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1810 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 1811 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1812 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1813 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 1814 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 1815 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1816 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1817 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1818 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1819 // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1820 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 1821 // CHECK3-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 1822 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 1823 // CHECK3: omp.dispatch.cond: 1824 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 1825 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 1826 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 1827 // CHECK3: omp.dispatch.body: 1828 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1829 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 1830 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1831 // CHECK3: omp.inner.for.cond: 1832 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 1833 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11 1834 // CHECK3-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 1835 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1836 // CHECK3: omp.inner.for.body: 1837 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 1838 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 1839 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1840 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !11 1841 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 1842 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11 1843 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]] 1844 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !11 1845 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1846 // CHECK3: omp.body.continue: 1847 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1848 // CHECK3: omp.inner.for.inc: 1849 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 1850 // CHECK3-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 1851 // CHECK3-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 1852 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]] 1853 // CHECK3: omp.inner.for.end: 1854 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 1855 // CHECK3: omp.dispatch.inc: 1856 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] 1857 // CHECK3: omp.dispatch.end: 1858 // CHECK3-NEXT: ret void 1859 // 1860 // 1861 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57 1862 // CHECK3-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1863 // CHECK3-NEXT: entry: 1864 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1865 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1866 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1867 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 1868 // CHECK3-NEXT: ret void 1869 // 1870 // 1871 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..14 1872 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1873 // CHECK3-NEXT: entry: 1874 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1875 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1876 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1877 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1878 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1879 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1880 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1881 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1882 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1883 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1884 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1885 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1886 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1887 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1888 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1889 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 1890 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1891 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1892 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1893 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1894 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1895 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1896 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1897 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1898 // CHECK3: cond.true: 1899 // CHECK3-NEXT: br label [[COND_END:%.*]] 1900 // CHECK3: cond.false: 1901 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1902 // CHECK3-NEXT: br label [[COND_END]] 1903 // CHECK3: cond.end: 1904 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1905 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1906 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1907 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1908 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1909 // CHECK3: omp.inner.for.cond: 1910 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1911 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1912 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1913 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1914 // CHECK3: omp.inner.for.body: 1915 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1916 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1917 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 1918 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1919 // CHECK3: omp.inner.for.inc: 1920 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1921 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1922 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 1923 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1924 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1925 // CHECK3: omp.inner.for.end: 1926 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1927 // CHECK3: omp.loop.exit: 1928 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1929 // CHECK3-NEXT: ret void 1930 // 1931 // 1932 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..15 1933 // CHECK3-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 1934 // CHECK3-NEXT: entry: 1935 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1936 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1937 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1938 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1939 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 1940 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1941 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1942 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1943 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1944 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1945 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1946 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1947 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1948 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1949 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1950 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1951 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 1952 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 1953 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1954 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 1955 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1956 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1957 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 1958 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 1959 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1960 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1961 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1962 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1963 // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1964 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 1965 // CHECK3-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61) 1966 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 1967 // CHECK3: omp.dispatch.cond: 1968 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 1969 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 1970 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 1971 // CHECK3: omp.dispatch.body: 1972 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1973 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 1974 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1975 // CHECK3: omp.inner.for.cond: 1976 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 1977 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14 1978 // CHECK3-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 1979 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1980 // CHECK3: omp.inner.for.body: 1981 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 1982 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 1983 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1984 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14 1985 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 1986 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !14 1987 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]] 1988 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !14 1989 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1990 // CHECK3: omp.body.continue: 1991 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1992 // CHECK3: omp.inner.for.inc: 1993 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 1994 // CHECK3-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 1995 // CHECK3-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 1996 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] 1997 // CHECK3: omp.inner.for.end: 1998 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 1999 // CHECK3: omp.dispatch.inc: 2000 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] 2001 // CHECK3: omp.dispatch.end: 2002 // CHECK3-NEXT: ret void 2003 // 2004 // 2005 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2006 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] { 2007 // CHECK3-NEXT: entry: 2008 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 2009 // CHECK3-NEXT: ret void 2010 // 2011 // 2012 // CHECK5-LABEL: define {{[^@]+}}@_Z21teams_template_structv 2013 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { 2014 // CHECK5-NEXT: entry: 2015 // CHECK5-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 2016 // CHECK5-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 2017 // CHECK5-NEXT: ret i32 [[CALL]] 2018 // 2019 // 2020 // CHECK5-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 2021 // CHECK5-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 2022 // CHECK5-NEXT: entry: 2023 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2024 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 2025 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 2026 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 2027 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2028 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8 2029 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8 2030 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8 2031 // CHECK5-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 2032 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8 2033 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8 2034 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8 2035 // CHECK5-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 2036 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 8 2037 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 8 2038 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 8 2039 // CHECK5-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 2040 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 8 2041 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 8 2042 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 8 2043 // CHECK5-NEXT: [[_TMP27:%.*]] = alloca i32, align 4 2044 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2045 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2046 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 2047 // CHECK5-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2048 // CHECK5-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 2049 // CHECK5-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 2050 // CHECK5-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2051 // CHECK5-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 2052 // CHECK5-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8 2053 // CHECK5-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 2054 // CHECK5-NEXT: store i8* null, i8** [[TMP4]], align 8 2055 // CHECK5-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2056 // CHECK5-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2057 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123) 2058 // CHECK5-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2059 // CHECK5-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 2060 // CHECK5-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2061 // CHECK5: omp_offload.failed: 2062 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 2063 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT]] 2064 // CHECK5: omp_offload.cont: 2065 // CHECK5-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 2066 // CHECK5-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 2067 // CHECK5-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** 2068 // CHECK5-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8 2069 // CHECK5-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 2070 // CHECK5-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** 2071 // CHECK5-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8 2072 // CHECK5-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0 2073 // CHECK5-NEXT: store i8* null, i8** [[TMP13]], align 8 2074 // CHECK5-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 2075 // CHECK5-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 2076 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 2077 // CHECK5-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2078 // CHECK5-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 2079 // CHECK5-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 2080 // CHECK5: omp_offload.failed7: 2081 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]] 2082 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT8]] 2083 // CHECK5: omp_offload.cont8: 2084 // CHECK5-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 2085 // CHECK5-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 2086 // CHECK5-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 2087 // CHECK5-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8 2088 // CHECK5-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 2089 // CHECK5-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 2090 // CHECK5-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8 2091 // CHECK5-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0 2092 // CHECK5-NEXT: store i8* null, i8** [[TMP22]], align 8 2093 // CHECK5-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 2094 // CHECK5-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 2095 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 2096 // CHECK5-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2097 // CHECK5-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 2098 // CHECK5-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 2099 // CHECK5: omp_offload.failed14: 2100 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(%struct.SS* [[THIS1]]) #[[ATTR2]] 2101 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT15]] 2102 // CHECK5: omp_offload.cont15: 2103 // CHECK5-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 2104 // CHECK5-NEXT: [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 2105 // CHECK5-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS** 2106 // CHECK5-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 8 2107 // CHECK5-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 2108 // CHECK5-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]** 2109 // CHECK5-NEXT: store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 8 2110 // CHECK5-NEXT: [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i64 0, i64 0 2111 // CHECK5-NEXT: store i8* null, i8** [[TMP31]], align 8 2112 // CHECK5-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 2113 // CHECK5-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 2114 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 2115 // CHECK5-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2116 // CHECK5-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 2117 // CHECK5-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]] 2118 // CHECK5: omp_offload.failed21: 2119 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(%struct.SS* [[THIS1]]) #[[ATTR2]] 2120 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT22]] 2121 // CHECK5: omp_offload.cont22: 2122 // CHECK5-NEXT: [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 2123 // CHECK5-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 2124 // CHECK5-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS** 2125 // CHECK5-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 8 2126 // CHECK5-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 2127 // CHECK5-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]** 2128 // CHECK5-NEXT: store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 8 2129 // CHECK5-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 0 2130 // CHECK5-NEXT: store i8* null, i8** [[TMP40]], align 8 2131 // CHECK5-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 2132 // CHECK5-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 2133 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 2134 // CHECK5-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2135 // CHECK5-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 2136 // CHECK5-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]] 2137 // CHECK5: omp_offload.failed28: 2138 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(%struct.SS* [[THIS1]]) #[[ATTR2]] 2139 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT29]] 2140 // CHECK5: omp_offload.cont29: 2141 // CHECK5-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 2142 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 0 2143 // CHECK5-NEXT: [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 2144 // CHECK5-NEXT: ret i32 [[TMP45]] 2145 // 2146 // 2147 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35 2148 // CHECK5-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 2149 // CHECK5-NEXT: entry: 2150 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2151 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2152 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2153 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 2154 // CHECK5-NEXT: ret void 2155 // 2156 // 2157 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined. 2158 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 2159 // CHECK5-NEXT: entry: 2160 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2161 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2162 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2163 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2164 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2165 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2166 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2167 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2168 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2169 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 2170 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2171 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2172 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2173 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2174 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2175 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 2176 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2177 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2178 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2179 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2180 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2181 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2182 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 2183 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2184 // CHECK5: cond.true: 2185 // CHECK5-NEXT: br label [[COND_END:%.*]] 2186 // CHECK5: cond.false: 2187 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2188 // CHECK5-NEXT: br label [[COND_END]] 2189 // CHECK5: cond.end: 2190 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2191 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2192 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2193 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2194 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2195 // CHECK5: omp.inner.for.cond: 2196 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2197 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2198 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2199 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2200 // CHECK5: omp.inner.for.body: 2201 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2202 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 2203 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2204 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 2205 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 2206 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2207 // CHECK5: omp.inner.for.inc: 2208 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2209 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2210 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 2211 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2212 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 2213 // CHECK5: omp.inner.for.end: 2214 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2215 // CHECK5: omp.loop.exit: 2216 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2217 // CHECK5-NEXT: ret void 2218 // 2219 // 2220 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..1 2221 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 2222 // CHECK5-NEXT: entry: 2223 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2224 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2225 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2226 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2227 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2228 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2229 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2230 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2231 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2232 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2233 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2234 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 2235 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2236 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2237 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2238 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2239 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2240 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2241 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2242 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 2243 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2244 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 2245 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2246 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 2247 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2248 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 2249 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2250 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2251 // CHECK5-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2252 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 2253 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2254 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2255 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 2256 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2257 // CHECK5: cond.true: 2258 // CHECK5-NEXT: br label [[COND_END:%.*]] 2259 // CHECK5: cond.false: 2260 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2261 // CHECK5-NEXT: br label [[COND_END]] 2262 // CHECK5: cond.end: 2263 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 2264 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2265 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2266 // CHECK5-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 2267 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2268 // CHECK5: omp.inner.for.cond: 2269 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2270 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2271 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 2272 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2273 // CHECK5: omp.inner.for.body: 2274 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2275 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 2276 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2277 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2278 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 2279 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 2280 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 2281 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 2282 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2283 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2284 // CHECK5: omp.body.continue: 2285 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2286 // CHECK5: omp.inner.for.inc: 2287 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2288 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 2289 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 2290 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 2291 // CHECK5: omp.inner.for.end: 2292 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2293 // CHECK5: omp.loop.exit: 2294 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 2295 // CHECK5-NEXT: ret void 2296 // 2297 // 2298 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40 2299 // CHECK5-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 2300 // CHECK5-NEXT: entry: 2301 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2302 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2303 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2304 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 2305 // CHECK5-NEXT: ret void 2306 // 2307 // 2308 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..2 2309 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 2310 // CHECK5-NEXT: entry: 2311 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2312 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2313 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2314 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2315 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2316 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2317 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2318 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2319 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2320 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 2321 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2322 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2323 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2324 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2325 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2326 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 2327 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2328 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2329 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2330 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2331 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2332 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2333 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 2334 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2335 // CHECK5: cond.true: 2336 // CHECK5-NEXT: br label [[COND_END:%.*]] 2337 // CHECK5: cond.false: 2338 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2339 // CHECK5-NEXT: br label [[COND_END]] 2340 // CHECK5: cond.end: 2341 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2342 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2343 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2344 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2345 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2346 // CHECK5: omp.inner.for.cond: 2347 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2348 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2349 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2350 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2351 // CHECK5: omp.inner.for.body: 2352 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2353 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 2354 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2355 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 2356 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 2357 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2358 // CHECK5: omp.inner.for.inc: 2359 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2360 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2361 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 2362 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2363 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 2364 // CHECK5: omp.inner.for.end: 2365 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2366 // CHECK5: omp.loop.exit: 2367 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2368 // CHECK5-NEXT: ret void 2369 // 2370 // 2371 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..3 2372 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 2373 // CHECK5-NEXT: entry: 2374 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2375 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2376 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2377 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2378 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2379 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2380 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2381 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2382 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2383 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2384 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2385 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 2386 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2387 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2388 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2389 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2390 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2391 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2392 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2393 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 2394 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2395 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 2396 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2397 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 2398 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2399 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 2400 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2401 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2402 // CHECK5-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2403 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 2404 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2405 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2406 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 2407 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2408 // CHECK5: cond.true: 2409 // CHECK5-NEXT: br label [[COND_END:%.*]] 2410 // CHECK5: cond.false: 2411 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2412 // CHECK5-NEXT: br label [[COND_END]] 2413 // CHECK5: cond.end: 2414 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 2415 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2416 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2417 // CHECK5-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 2418 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2419 // CHECK5: omp.inner.for.cond: 2420 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2421 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2422 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 2423 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2424 // CHECK5: omp.inner.for.body: 2425 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2426 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 2427 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2428 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2429 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 2430 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 2431 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 2432 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 2433 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2434 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2435 // CHECK5: omp.body.continue: 2436 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2437 // CHECK5: omp.inner.for.inc: 2438 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2439 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 2440 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 2441 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 2442 // CHECK5: omp.inner.for.end: 2443 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2444 // CHECK5: omp.loop.exit: 2445 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 2446 // CHECK5-NEXT: ret void 2447 // 2448 // 2449 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45 2450 // CHECK5-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 2451 // CHECK5-NEXT: entry: 2452 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2453 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2454 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2455 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 2456 // CHECK5-NEXT: ret void 2457 // 2458 // 2459 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..6 2460 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 2461 // CHECK5-NEXT: entry: 2462 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2463 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2464 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2465 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2466 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2467 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2468 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2469 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2470 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2471 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 2472 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2473 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2474 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2475 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2476 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2477 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 2478 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2479 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2480 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2481 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2482 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2483 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2484 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 2485 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2486 // CHECK5: cond.true: 2487 // CHECK5-NEXT: br label [[COND_END:%.*]] 2488 // CHECK5: cond.false: 2489 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2490 // CHECK5-NEXT: br label [[COND_END]] 2491 // CHECK5: cond.end: 2492 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2493 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2494 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2495 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2496 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2497 // CHECK5: omp.inner.for.cond: 2498 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2499 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2500 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2501 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2502 // CHECK5: omp.inner.for.body: 2503 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2504 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 2505 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2506 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 2507 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 2508 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2509 // CHECK5: omp.inner.for.inc: 2510 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2511 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2512 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 2513 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2514 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 2515 // CHECK5: omp.inner.for.end: 2516 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2517 // CHECK5: omp.loop.exit: 2518 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2519 // CHECK5-NEXT: ret void 2520 // 2521 // 2522 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..7 2523 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 2524 // CHECK5-NEXT: entry: 2525 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2526 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2527 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2528 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2529 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2530 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2531 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2532 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2533 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2534 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2535 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2536 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 2537 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2538 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2539 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2540 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2541 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2542 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2543 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2544 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 2545 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2546 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 2547 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2548 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 2549 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2550 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 2551 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2552 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2553 // CHECK5-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2554 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 2555 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 2556 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2557 // CHECK5: omp.dispatch.cond: 2558 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2559 // CHECK5-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2560 // CHECK5-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32 2561 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]] 2562 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2563 // CHECK5: cond.true: 2564 // CHECK5-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2565 // CHECK5-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 2566 // CHECK5-NEXT: br label [[COND_END:%.*]] 2567 // CHECK5: cond.false: 2568 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2569 // CHECK5-NEXT: br label [[COND_END]] 2570 // CHECK5: cond.end: 2571 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 2572 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2573 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2574 // CHECK5-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 2575 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2576 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2577 // CHECK5-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 2578 // CHECK5-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2579 // CHECK5: omp.dispatch.body: 2580 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2581 // CHECK5: omp.inner.for.cond: 2582 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2583 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2584 // CHECK5-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 2585 // CHECK5-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2586 // CHECK5: omp.inner.for.body: 2587 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2588 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 2589 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2590 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2591 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 2592 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 2593 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64 2594 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 2595 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2596 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2597 // CHECK5: omp.body.continue: 2598 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2599 // CHECK5: omp.inner.for.inc: 2600 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2601 // CHECK5-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1 2602 // CHECK5-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 2603 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 2604 // CHECK5: omp.inner.for.end: 2605 // CHECK5-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2606 // CHECK5: omp.dispatch.inc: 2607 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2608 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2609 // CHECK5-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 2610 // CHECK5-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4 2611 // CHECK5-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2612 // CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2613 // CHECK5-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 2614 // CHECK5-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4 2615 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND]] 2616 // CHECK5: omp.dispatch.end: 2617 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 2618 // CHECK5-NEXT: ret void 2619 // 2620 // 2621 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51 2622 // CHECK5-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 2623 // CHECK5-NEXT: entry: 2624 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2625 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2626 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2627 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 2628 // CHECK5-NEXT: ret void 2629 // 2630 // 2631 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..10 2632 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 2633 // CHECK5-NEXT: entry: 2634 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2635 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2636 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2637 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2638 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2639 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2640 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2641 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2642 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2643 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 2644 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2645 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2646 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2647 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2648 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2649 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 2650 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2651 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2652 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2653 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2654 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2655 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2656 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 2657 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2658 // CHECK5: cond.true: 2659 // CHECK5-NEXT: br label [[COND_END:%.*]] 2660 // CHECK5: cond.false: 2661 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2662 // CHECK5-NEXT: br label [[COND_END]] 2663 // CHECK5: cond.end: 2664 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2665 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2666 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2667 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2668 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2669 // CHECK5: omp.inner.for.cond: 2670 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2671 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2672 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2673 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2674 // CHECK5: omp.inner.for.body: 2675 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2676 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 2677 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2678 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 2679 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 2680 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2681 // CHECK5: omp.inner.for.inc: 2682 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2683 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2684 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 2685 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2686 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 2687 // CHECK5: omp.inner.for.end: 2688 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2689 // CHECK5: omp.loop.exit: 2690 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2691 // CHECK5-NEXT: ret void 2692 // 2693 // 2694 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..11 2695 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 2696 // CHECK5-NEXT: entry: 2697 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2698 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2699 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2700 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2701 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2702 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2703 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2704 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2705 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2706 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2707 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2708 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 2709 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2710 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2711 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2712 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2713 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2714 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2715 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2716 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 2717 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2718 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 2719 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2720 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 2721 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2722 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 2723 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2724 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2725 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2726 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2727 // CHECK5-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2728 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 2729 // CHECK5-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 2730 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2731 // CHECK5: omp.dispatch.cond: 2732 // CHECK5-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 2733 // CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 2734 // CHECK5-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2735 // CHECK5: omp.dispatch.body: 2736 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2737 // CHECK5-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 2738 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2739 // CHECK5: omp.inner.for.cond: 2740 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 2741 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10 2742 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 2743 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2744 // CHECK5: omp.inner.for.body: 2745 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 2746 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 2747 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2748 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !10 2749 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 2750 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !10 2751 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 2752 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 2753 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !10 2754 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2755 // CHECK5: omp.body.continue: 2756 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2757 // CHECK5: omp.inner.for.inc: 2758 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 2759 // CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 2760 // CHECK5-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 2761 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]] 2762 // CHECK5: omp.inner.for.end: 2763 // CHECK5-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2764 // CHECK5: omp.dispatch.inc: 2765 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND]] 2766 // CHECK5: omp.dispatch.end: 2767 // CHECK5-NEXT: ret void 2768 // 2769 // 2770 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57 2771 // CHECK5-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 2772 // CHECK5-NEXT: entry: 2773 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2774 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2775 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2776 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 2777 // CHECK5-NEXT: ret void 2778 // 2779 // 2780 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..14 2781 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 2782 // CHECK5-NEXT: entry: 2783 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2784 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2785 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2786 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2787 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2788 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2789 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2790 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2791 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2792 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 2793 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2794 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2795 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2796 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2797 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2798 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 2799 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2800 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2801 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2802 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2803 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2804 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2805 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 2806 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2807 // CHECK5: cond.true: 2808 // CHECK5-NEXT: br label [[COND_END:%.*]] 2809 // CHECK5: cond.false: 2810 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2811 // CHECK5-NEXT: br label [[COND_END]] 2812 // CHECK5: cond.end: 2813 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2814 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2815 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2816 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2817 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2818 // CHECK5: omp.inner.for.cond: 2819 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2820 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2821 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2822 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2823 // CHECK5: omp.inner.for.body: 2824 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2825 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 2826 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2827 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 2828 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 2829 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2830 // CHECK5: omp.inner.for.inc: 2831 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2832 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2833 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 2834 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2835 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 2836 // CHECK5: omp.inner.for.end: 2837 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2838 // CHECK5: omp.loop.exit: 2839 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2840 // CHECK5-NEXT: ret void 2841 // 2842 // 2843 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..15 2844 // CHECK5-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 2845 // CHECK5-NEXT: entry: 2846 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2847 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2848 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2849 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2850 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 2851 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2852 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 2853 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2854 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2855 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2856 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2857 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 2858 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2859 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2860 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2861 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2862 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 2863 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 2864 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2865 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 2866 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2867 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 2868 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2869 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 2870 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2871 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 2872 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2873 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2874 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2875 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2876 // CHECK5-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2877 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 2878 // CHECK5-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61) 2879 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2880 // CHECK5: omp.dispatch.cond: 2881 // CHECK5-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 2882 // CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 2883 // CHECK5-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2884 // CHECK5: omp.dispatch.body: 2885 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2886 // CHECK5-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 2887 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2888 // CHECK5: omp.inner.for.cond: 2889 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 2890 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13 2891 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 2892 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2893 // CHECK5: omp.inner.for.body: 2894 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 2895 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 2896 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2897 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13 2898 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 2899 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13 2900 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 2901 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 2902 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13 2903 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2904 // CHECK5: omp.body.continue: 2905 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2906 // CHECK5: omp.inner.for.inc: 2907 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 2908 // CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 2909 // CHECK5-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 2910 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 2911 // CHECK5: omp.inner.for.end: 2912 // CHECK5-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2913 // CHECK5: omp.dispatch.inc: 2914 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND]] 2915 // CHECK5: omp.dispatch.end: 2916 // CHECK5-NEXT: ret void 2917 // 2918 // 2919 // CHECK5-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2920 // CHECK5-SAME: () #[[ATTR3:[0-9]+]] { 2921 // CHECK5-NEXT: entry: 2922 // CHECK5-NEXT: call void @__tgt_register_requires(i64 1) 2923 // CHECK5-NEXT: ret void 2924 // 2925 // 2926 // CHECK7-LABEL: define {{[^@]+}}@_Z21teams_template_structv 2927 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { 2928 // CHECK7-NEXT: entry: 2929 // CHECK7-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 2930 // CHECK7-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* noundef nonnull align 4 dereferenceable(496) [[V]]) 2931 // CHECK7-NEXT: ret i32 [[CALL]] 2932 // 2933 // 2934 // CHECK7-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 2935 // CHECK7-SAME: (%struct.SS* noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 2936 // CHECK7-NEXT: entry: 2937 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2938 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 2939 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 2940 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 2941 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 2942 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4 2943 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4 2944 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4 2945 // CHECK7-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 2946 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4 2947 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4 2948 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4 2949 // CHECK7-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 2950 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 4 2951 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 4 2952 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 4 2953 // CHECK7-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 2954 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 4 2955 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 4 2956 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 4 2957 // CHECK7-NEXT: [[_TMP27:%.*]] = alloca i32, align 4 2958 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2959 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2960 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 2961 // CHECK7-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2962 // CHECK7-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 2963 // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4 2964 // CHECK7-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2965 // CHECK7-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 2966 // CHECK7-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4 2967 // CHECK7-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2968 // CHECK7-NEXT: store i8* null, i8** [[TMP4]], align 4 2969 // CHECK7-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2970 // CHECK7-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2971 // CHECK7-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123) 2972 // CHECK7-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2973 // CHECK7-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 2974 // CHECK7-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2975 // CHECK7: omp_offload.failed: 2976 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 2977 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT]] 2978 // CHECK7: omp_offload.cont: 2979 // CHECK7-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 2980 // CHECK7-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 2981 // CHECK7-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** 2982 // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4 2983 // CHECK7-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 2984 // CHECK7-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** 2985 // CHECK7-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4 2986 // CHECK7-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0 2987 // CHECK7-NEXT: store i8* null, i8** [[TMP13]], align 4 2988 // CHECK7-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 2989 // CHECK7-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 2990 // CHECK7-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 2991 // CHECK7-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2992 // CHECK7-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 2993 // CHECK7-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 2994 // CHECK7: omp_offload.failed7: 2995 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]] 2996 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT8]] 2997 // CHECK7: omp_offload.cont8: 2998 // CHECK7-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 2999 // CHECK7-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 3000 // CHECK7-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 3001 // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4 3002 // CHECK7-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 3003 // CHECK7-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 3004 // CHECK7-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4 3005 // CHECK7-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0 3006 // CHECK7-NEXT: store i8* null, i8** [[TMP22]], align 4 3007 // CHECK7-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 3008 // CHECK7-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 3009 // CHECK7-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 3010 // CHECK7-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3011 // CHECK7-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 3012 // CHECK7-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 3013 // CHECK7: omp_offload.failed14: 3014 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(%struct.SS* [[THIS1]]) #[[ATTR2]] 3015 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT15]] 3016 // CHECK7: omp_offload.cont15: 3017 // CHECK7-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 3018 // CHECK7-NEXT: [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 3019 // CHECK7-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS** 3020 // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 4 3021 // CHECK7-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 3022 // CHECK7-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]** 3023 // CHECK7-NEXT: store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 4 3024 // CHECK7-NEXT: [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 0 3025 // CHECK7-NEXT: store i8* null, i8** [[TMP31]], align 4 3026 // CHECK7-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 3027 // CHECK7-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 3028 // CHECK7-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 3029 // CHECK7-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3030 // CHECK7-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 3031 // CHECK7-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]] 3032 // CHECK7: omp_offload.failed21: 3033 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(%struct.SS* [[THIS1]]) #[[ATTR2]] 3034 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT22]] 3035 // CHECK7: omp_offload.cont22: 3036 // CHECK7-NEXT: [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 3037 // CHECK7-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 3038 // CHECK7-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS** 3039 // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 4 3040 // CHECK7-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 3041 // CHECK7-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]** 3042 // CHECK7-NEXT: store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 4 3043 // CHECK7-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 0 3044 // CHECK7-NEXT: store i8* null, i8** [[TMP40]], align 4 3045 // CHECK7-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 3046 // CHECK7-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 3047 // CHECK7-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 3048 // CHECK7-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3049 // CHECK7-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 3050 // CHECK7-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]] 3051 // CHECK7: omp_offload.failed28: 3052 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(%struct.SS* [[THIS1]]) #[[ATTR2]] 3053 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT29]] 3054 // CHECK7: omp_offload.cont29: 3055 // CHECK7-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 3056 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i32 0, i32 0 3057 // CHECK7-NEXT: [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 3058 // CHECK7-NEXT: ret i32 [[TMP45]] 3059 // 3060 // 3061 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35 3062 // CHECK7-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 3063 // CHECK7-NEXT: entry: 3064 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3065 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3066 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3067 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 3068 // CHECK7-NEXT: ret void 3069 // 3070 // 3071 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined. 3072 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 3073 // CHECK7-NEXT: entry: 3074 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3075 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3076 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3077 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3078 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 3079 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3080 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3081 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3082 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3083 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 3084 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3085 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3086 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3087 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3088 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3089 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 3090 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3091 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3092 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3093 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3094 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3095 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3096 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 3097 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3098 // CHECK7: cond.true: 3099 // CHECK7-NEXT: br label [[COND_END:%.*]] 3100 // CHECK7: cond.false: 3101 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3102 // CHECK7-NEXT: br label [[COND_END]] 3103 // CHECK7: cond.end: 3104 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3105 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3106 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3107 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3108 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3109 // CHECK7: omp.inner.for.cond: 3110 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3111 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3112 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3113 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3114 // CHECK7: omp.inner.for.body: 3115 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3116 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3117 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 3118 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3119 // CHECK7: omp.inner.for.inc: 3120 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3121 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3122 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 3123 // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3124 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]] 3125 // CHECK7: omp.inner.for.end: 3126 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3127 // CHECK7: omp.loop.exit: 3128 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3129 // CHECK7-NEXT: ret void 3130 // 3131 // 3132 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..1 3133 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 3134 // CHECK7-NEXT: entry: 3135 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3136 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3137 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3138 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3139 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3140 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3141 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 3142 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3143 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3144 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3145 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3146 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 3147 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3148 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3149 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3150 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3151 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3152 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3153 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3154 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 3155 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3156 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3157 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 3158 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 3159 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3160 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3161 // CHECK7-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3162 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 3163 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3164 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3165 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 3166 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3167 // CHECK7: cond.true: 3168 // CHECK7-NEXT: br label [[COND_END:%.*]] 3169 // CHECK7: cond.false: 3170 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3171 // CHECK7-NEXT: br label [[COND_END]] 3172 // CHECK7: cond.end: 3173 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 3174 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3175 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3176 // CHECK7-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 3177 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3178 // CHECK7: omp.inner.for.cond: 3179 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3180 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3181 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 3182 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3183 // CHECK7: omp.inner.for.body: 3184 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3185 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 3186 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3187 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3188 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 3189 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 3190 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]] 3191 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3192 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3193 // CHECK7: omp.body.continue: 3194 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3195 // CHECK7: omp.inner.for.inc: 3196 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3197 // CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 3198 // CHECK7-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 3199 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]] 3200 // CHECK7: omp.inner.for.end: 3201 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3202 // CHECK7: omp.loop.exit: 3203 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 3204 // CHECK7-NEXT: ret void 3205 // 3206 // 3207 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40 3208 // CHECK7-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 3209 // CHECK7-NEXT: entry: 3210 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3211 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3212 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3213 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 3214 // CHECK7-NEXT: ret void 3215 // 3216 // 3217 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..2 3218 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 3219 // CHECK7-NEXT: entry: 3220 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3221 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3222 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3223 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3224 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 3225 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3226 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3227 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3228 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3229 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 3230 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3231 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3232 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3233 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3234 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3235 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 3236 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3237 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3238 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3239 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3240 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3241 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3242 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 3243 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3244 // CHECK7: cond.true: 3245 // CHECK7-NEXT: br label [[COND_END:%.*]] 3246 // CHECK7: cond.false: 3247 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3248 // CHECK7-NEXT: br label [[COND_END]] 3249 // CHECK7: cond.end: 3250 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3251 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3252 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3253 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3254 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3255 // CHECK7: omp.inner.for.cond: 3256 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3257 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3258 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3259 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3260 // CHECK7: omp.inner.for.body: 3261 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3262 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3263 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 3264 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3265 // CHECK7: omp.inner.for.inc: 3266 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3267 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3268 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 3269 // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3270 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]] 3271 // CHECK7: omp.inner.for.end: 3272 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3273 // CHECK7: omp.loop.exit: 3274 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3275 // CHECK7-NEXT: ret void 3276 // 3277 // 3278 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..3 3279 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 3280 // CHECK7-NEXT: entry: 3281 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3282 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3283 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3284 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3285 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3286 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3287 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 3288 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3289 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3290 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3291 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3292 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 3293 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3294 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3295 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3296 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3297 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3298 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3299 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3300 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 3301 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3302 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3303 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 3304 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 3305 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3306 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3307 // CHECK7-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3308 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 3309 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3310 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3311 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 3312 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3313 // CHECK7: cond.true: 3314 // CHECK7-NEXT: br label [[COND_END:%.*]] 3315 // CHECK7: cond.false: 3316 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3317 // CHECK7-NEXT: br label [[COND_END]] 3318 // CHECK7: cond.end: 3319 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 3320 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3321 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3322 // CHECK7-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 3323 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3324 // CHECK7: omp.inner.for.cond: 3325 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3326 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3327 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 3328 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3329 // CHECK7: omp.inner.for.body: 3330 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3331 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 3332 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3333 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3334 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 3335 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 3336 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]] 3337 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3338 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3339 // CHECK7: omp.body.continue: 3340 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3341 // CHECK7: omp.inner.for.inc: 3342 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3343 // CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 3344 // CHECK7-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 3345 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]] 3346 // CHECK7: omp.inner.for.end: 3347 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3348 // CHECK7: omp.loop.exit: 3349 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 3350 // CHECK7-NEXT: ret void 3351 // 3352 // 3353 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45 3354 // CHECK7-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 3355 // CHECK7-NEXT: entry: 3356 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3357 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3358 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3359 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 3360 // CHECK7-NEXT: ret void 3361 // 3362 // 3363 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..6 3364 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 3365 // CHECK7-NEXT: entry: 3366 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3367 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3368 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3369 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3370 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 3371 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3372 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3373 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3374 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3375 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 3376 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3377 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3378 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3379 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3380 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3381 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 3382 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3383 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3384 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3385 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3386 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3387 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3388 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 3389 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3390 // CHECK7: cond.true: 3391 // CHECK7-NEXT: br label [[COND_END:%.*]] 3392 // CHECK7: cond.false: 3393 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3394 // CHECK7-NEXT: br label [[COND_END]] 3395 // CHECK7: cond.end: 3396 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3397 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3398 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3399 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3400 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3401 // CHECK7: omp.inner.for.cond: 3402 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3403 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3404 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3405 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3406 // CHECK7: omp.inner.for.body: 3407 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3408 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3409 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 3410 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3411 // CHECK7: omp.inner.for.inc: 3412 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3413 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3414 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 3415 // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3416 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]] 3417 // CHECK7: omp.inner.for.end: 3418 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3419 // CHECK7: omp.loop.exit: 3420 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3421 // CHECK7-NEXT: ret void 3422 // 3423 // 3424 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..7 3425 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 3426 // CHECK7-NEXT: entry: 3427 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3428 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3429 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3430 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3431 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3432 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3433 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 3434 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3435 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3436 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3437 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3438 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 3439 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3440 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3441 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3442 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3443 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3444 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3445 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3446 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 3447 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3448 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3449 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 3450 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 3451 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3452 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3453 // CHECK7-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3454 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 3455 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 3456 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 3457 // CHECK7: omp.dispatch.cond: 3458 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3459 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3460 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]] 3461 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3462 // CHECK7: cond.true: 3463 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3464 // CHECK7-NEXT: br label [[COND_END:%.*]] 3465 // CHECK7: cond.false: 3466 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3467 // CHECK7-NEXT: br label [[COND_END]] 3468 // CHECK7: cond.end: 3469 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 3470 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3471 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3472 // CHECK7-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 3473 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3474 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3475 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 3476 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 3477 // CHECK7: omp.dispatch.body: 3478 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3479 // CHECK7: omp.inner.for.cond: 3480 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3481 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3482 // CHECK7-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 3483 // CHECK7-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3484 // CHECK7: omp.inner.for.body: 3485 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3486 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 3487 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3488 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3489 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 3490 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 3491 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP15]] 3492 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3493 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3494 // CHECK7: omp.body.continue: 3495 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3496 // CHECK7: omp.inner.for.inc: 3497 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3498 // CHECK7-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1 3499 // CHECK7-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 3500 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]] 3501 // CHECK7: omp.inner.for.end: 3502 // CHECK7-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 3503 // CHECK7: omp.dispatch.inc: 3504 // CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3505 // CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3506 // CHECK7-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 3507 // CHECK7-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 3508 // CHECK7-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3509 // CHECK7-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3510 // CHECK7-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 3511 // CHECK7-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 3512 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND]] 3513 // CHECK7: omp.dispatch.end: 3514 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 3515 // CHECK7-NEXT: ret void 3516 // 3517 // 3518 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51 3519 // CHECK7-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 3520 // CHECK7-NEXT: entry: 3521 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3522 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3523 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3524 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 3525 // CHECK7-NEXT: ret void 3526 // 3527 // 3528 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..10 3529 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 3530 // CHECK7-NEXT: entry: 3531 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3532 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3533 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3534 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3535 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 3536 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3537 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3538 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3539 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3540 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 3541 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3542 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3543 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3544 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3545 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3546 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 3547 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3548 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3549 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3550 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3551 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3552 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3553 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 3554 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3555 // CHECK7: cond.true: 3556 // CHECK7-NEXT: br label [[COND_END:%.*]] 3557 // CHECK7: cond.false: 3558 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3559 // CHECK7-NEXT: br label [[COND_END]] 3560 // CHECK7: cond.end: 3561 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3562 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3563 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3564 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3565 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3566 // CHECK7: omp.inner.for.cond: 3567 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3568 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3569 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3570 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3571 // CHECK7: omp.inner.for.body: 3572 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3573 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3574 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 3575 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3576 // CHECK7: omp.inner.for.inc: 3577 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3578 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3579 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 3580 // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3581 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]] 3582 // CHECK7: omp.inner.for.end: 3583 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3584 // CHECK7: omp.loop.exit: 3585 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3586 // CHECK7-NEXT: ret void 3587 // 3588 // 3589 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..11 3590 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 3591 // CHECK7-NEXT: entry: 3592 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3593 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3594 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3595 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3596 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3597 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3598 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 3599 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3600 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3601 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3602 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3603 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 3604 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3605 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3606 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3607 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3608 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3609 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3610 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3611 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 3612 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3613 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3614 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 3615 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 3616 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3617 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3618 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3619 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3620 // CHECK7-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3621 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 3622 // CHECK7-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 3623 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 3624 // CHECK7: omp.dispatch.cond: 3625 // CHECK7-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 3626 // CHECK7-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 3627 // CHECK7-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 3628 // CHECK7: omp.dispatch.body: 3629 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3630 // CHECK7-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 3631 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3632 // CHECK7: omp.inner.for.cond: 3633 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 3634 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !11 3635 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 3636 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3637 // CHECK7: omp.inner.for.body: 3638 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 3639 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 3640 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3641 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !11 3642 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 3643 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !11 3644 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]] 3645 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !11 3646 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3647 // CHECK7: omp.body.continue: 3648 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3649 // CHECK7: omp.inner.for.inc: 3650 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 3651 // CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 3652 // CHECK7-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !11 3653 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]] 3654 // CHECK7: omp.inner.for.end: 3655 // CHECK7-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 3656 // CHECK7: omp.dispatch.inc: 3657 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND]] 3658 // CHECK7: omp.dispatch.end: 3659 // CHECK7-NEXT: ret void 3660 // 3661 // 3662 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57 3663 // CHECK7-SAME: (%struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 3664 // CHECK7-NEXT: entry: 3665 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3666 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3667 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3668 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 3669 // CHECK7-NEXT: ret void 3670 // 3671 // 3672 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..14 3673 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 3674 // CHECK7-NEXT: entry: 3675 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3676 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3677 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3678 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3679 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 3680 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3681 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3682 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3683 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3684 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 3685 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3686 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3687 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3688 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3689 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3690 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 3691 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3692 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3693 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3694 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3695 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3696 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3697 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 3698 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3699 // CHECK7: cond.true: 3700 // CHECK7-NEXT: br label [[COND_END:%.*]] 3701 // CHECK7: cond.false: 3702 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3703 // CHECK7-NEXT: br label [[COND_END]] 3704 // CHECK7: cond.end: 3705 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3706 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3707 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3708 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3709 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3710 // CHECK7: omp.inner.for.cond: 3711 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3712 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3713 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3714 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3715 // CHECK7: omp.inner.for.body: 3716 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3717 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3718 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 3719 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3720 // CHECK7: omp.inner.for.inc: 3721 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3722 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3723 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 3724 // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3725 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]] 3726 // CHECK7: omp.inner.for.end: 3727 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3728 // CHECK7: omp.loop.exit: 3729 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3730 // CHECK7-NEXT: ret void 3731 // 3732 // 3733 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..15 3734 // CHECK7-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], %struct.SS* noundef [[THIS:%.*]]) #[[ATTR1]] { 3735 // CHECK7-NEXT: entry: 3736 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3737 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3738 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3739 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3740 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3741 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3742 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 3743 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3744 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3745 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3746 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3747 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 3748 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3749 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3750 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3751 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3752 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3753 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3754 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3755 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 3756 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3757 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3758 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 3759 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 3760 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3761 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3762 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3763 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3764 // CHECK7-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3765 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 3766 // CHECK7-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61) 3767 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 3768 // CHECK7: omp.dispatch.cond: 3769 // CHECK7-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 3770 // CHECK7-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 3771 // CHECK7-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 3772 // CHECK7: omp.dispatch.body: 3773 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3774 // CHECK7-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 3775 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3776 // CHECK7: omp.inner.for.cond: 3777 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 3778 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14 3779 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 3780 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3781 // CHECK7: omp.inner.for.body: 3782 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 3783 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 3784 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3785 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !14 3786 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 3787 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !14 3788 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]] 3789 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !14 3790 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3791 // CHECK7: omp.body.continue: 3792 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3793 // CHECK7: omp.inner.for.inc: 3794 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 3795 // CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 3796 // CHECK7-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 3797 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] 3798 // CHECK7: omp.inner.for.end: 3799 // CHECK7-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 3800 // CHECK7: omp.dispatch.inc: 3801 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND]] 3802 // CHECK7: omp.dispatch.end: 3803 // CHECK7-NEXT: ret void 3804 // 3805 // 3806 // CHECK7-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3807 // CHECK7-SAME: () #[[ATTR3:[0-9]+]] { 3808 // CHECK7-NEXT: entry: 3809 // CHECK7-NEXT: call void @__tgt_register_requires(i64 1) 3810 // CHECK7-NEXT: ret void 3811 // 3812 // 3813 // CHECK13-LABEL: define {{[^@]+}}@main 3814 // CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 3815 // CHECK13-NEXT: entry: 3816 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3817 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 3818 // CHECK13-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 3819 // CHECK13-NEXT: [[N:%.*]] = alloca i32, align 4 3820 // CHECK13-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 3821 // CHECK13-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 3822 // CHECK13-NEXT: [[M:%.*]] = alloca i32, align 4 3823 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 3824 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 3825 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 3826 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 3827 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 3828 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 3829 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 3830 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 3831 // CHECK13-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8 3832 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8 3833 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8 3834 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8 3835 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8 3836 // CHECK13-NEXT: [[_TMP9:%.*]] = alloca i32, align 4 3837 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 3838 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4 3839 // CHECK13-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 3840 // CHECK13-NEXT: [[N_CASTED19:%.*]] = alloca i64, align 8 3841 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [4 x i8*], align 8 3842 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS22:%.*]] = alloca [4 x i8*], align 8 3843 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [4 x i8*], align 8 3844 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES24:%.*]] = alloca [4 x i64], align 8 3845 // CHECK13-NEXT: [[_TMP25:%.*]] = alloca i32, align 4 3846 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4 3847 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4 3848 // CHECK13-NEXT: [[N_CASTED34:%.*]] = alloca i64, align 8 3849 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS36:%.*]] = alloca [3 x i8*], align 8 3850 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS37:%.*]] = alloca [3 x i8*], align 8 3851 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS38:%.*]] = alloca [3 x i8*], align 8 3852 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES39:%.*]] = alloca [3 x i64], align 8 3853 // CHECK13-NEXT: [[_TMP40:%.*]] = alloca i32, align 4 3854 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4 3855 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4 3856 // CHECK13-NEXT: [[M_CASTED49:%.*]] = alloca i64, align 8 3857 // CHECK13-NEXT: [[N_CASTED51:%.*]] = alloca i64, align 8 3858 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS53:%.*]] = alloca [4 x i8*], align 8 3859 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS54:%.*]] = alloca [4 x i8*], align 8 3860 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS55:%.*]] = alloca [4 x i8*], align 8 3861 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES56:%.*]] = alloca [4 x i64], align 8 3862 // CHECK13-NEXT: [[_TMP57:%.*]] = alloca i32, align 4 3863 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4 3864 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_59:%.*]] = alloca i32, align 4 3865 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4 3866 // CHECK13-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 3867 // CHECK13-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 3868 // CHECK13-NEXT: store i32 100, i32* [[N]], align 4 3869 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 3870 // CHECK13-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 3871 // CHECK13-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 3872 // CHECK13-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 3873 // CHECK13-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 3874 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 3875 // CHECK13-NEXT: store i32 10, i32* [[M]], align 4 3876 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 3877 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 3878 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 3879 // CHECK13-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 3880 // CHECK13-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 3881 // CHECK13-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 3882 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP6]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes to i8*), i64 24, i1 false) 3883 // CHECK13-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3884 // CHECK13-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 3885 // CHECK13-NEXT: store i64 [[TMP4]], i64* [[TMP8]], align 8 3886 // CHECK13-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3887 // CHECK13-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 3888 // CHECK13-NEXT: store i64 [[TMP4]], i64* [[TMP10]], align 8 3889 // CHECK13-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 3890 // CHECK13-NEXT: store i8* null, i8** [[TMP11]], align 8 3891 // CHECK13-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 3892 // CHECK13-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 3893 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8 3894 // CHECK13-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 3895 // CHECK13-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 3896 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8 3897 // CHECK13-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 3898 // CHECK13-NEXT: store i8* null, i8** [[TMP16]], align 8 3899 // CHECK13-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 3900 // CHECK13-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 3901 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 8 3902 // CHECK13-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 3903 // CHECK13-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 3904 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 8 3905 // CHECK13-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 3906 // CHECK13-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 8 3907 // CHECK13-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 3908 // CHECK13-NEXT: store i8* null, i8** [[TMP22]], align 8 3909 // CHECK13-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3910 // CHECK13-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3911 // CHECK13-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 3912 // CHECK13-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 3913 // CHECK13-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 3914 // CHECK13-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 3915 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 3916 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 3917 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 3918 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 3919 // CHECK13-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 3920 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 3921 // CHECK13-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 3922 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP29]]) 3923 // CHECK13-NEXT: [[TMP30:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, i32 3, i8** [[TMP23]], i8** [[TMP24]], i64* [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3924 // CHECK13-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 3925 // CHECK13-NEXT: br i1 [[TMP31]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3926 // CHECK13: omp_offload.failed: 3927 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 3928 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]] 3929 // CHECK13: omp_offload.cont: 3930 // CHECK13-NEXT: [[TMP32:%.*]] = load i32, i32* [[N]], align 4 3931 // CHECK13-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32* 3932 // CHECK13-NEXT: store i32 [[TMP32]], i32* [[CONV4]], align 4 3933 // CHECK13-NEXT: [[TMP33:%.*]] = load i64, i64* [[N_CASTED3]], align 8 3934 // CHECK13-NEXT: [[TMP34:%.*]] = mul nuw i64 [[TMP1]], 4 3935 // CHECK13-NEXT: [[TMP35:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES8]] to i8* 3936 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP35]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.4 to i8*), i64 24, i1 false) 3937 // CHECK13-NEXT: [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 3938 // CHECK13-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64* 3939 // CHECK13-NEXT: store i64 [[TMP33]], i64* [[TMP37]], align 8 3940 // CHECK13-NEXT: [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 3941 // CHECK13-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64* 3942 // CHECK13-NEXT: store i64 [[TMP33]], i64* [[TMP39]], align 8 3943 // CHECK13-NEXT: [[TMP40:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0 3944 // CHECK13-NEXT: store i8* null, i8** [[TMP40]], align 8 3945 // CHECK13-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 3946 // CHECK13-NEXT: [[TMP42:%.*]] = bitcast i8** [[TMP41]] to i64* 3947 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP42]], align 8 3948 // CHECK13-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 3949 // CHECK13-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i64* 3950 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP44]], align 8 3951 // CHECK13-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1 3952 // CHECK13-NEXT: store i8* null, i8** [[TMP45]], align 8 3953 // CHECK13-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2 3954 // CHECK13-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to i32** 3955 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP47]], align 8 3956 // CHECK13-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2 3957 // CHECK13-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32** 3958 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP49]], align 8 3959 // CHECK13-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2 3960 // CHECK13-NEXT: store i64 [[TMP34]], i64* [[TMP50]], align 8 3961 // CHECK13-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2 3962 // CHECK13-NEXT: store i8* null, i8** [[TMP51]], align 8 3963 // CHECK13-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 3964 // CHECK13-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 3965 // CHECK13-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0 3966 // CHECK13-NEXT: [[TMP55:%.*]] = load i32, i32* [[N]], align 4 3967 // CHECK13-NEXT: store i32 [[TMP55]], i32* [[DOTCAPTURE_EXPR_10]], align 4 3968 // CHECK13-NEXT: [[TMP56:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 3969 // CHECK13-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP56]], 0 3970 // CHECK13-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1 3971 // CHECK13-NEXT: [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1 3972 // CHECK13-NEXT: store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4 3973 // CHECK13-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 3974 // CHECK13-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP57]], 1 3975 // CHECK13-NEXT: [[TMP58:%.*]] = zext i32 [[ADD15]] to i64 3976 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP58]]) 3977 // CHECK13-NEXT: [[TMP59:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, i32 3, i8** [[TMP52]], i8** [[TMP53]], i64* [[TMP54]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3978 // CHECK13-NEXT: [[TMP60:%.*]] = icmp ne i32 [[TMP59]], 0 3979 // CHECK13-NEXT: br i1 [[TMP60]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 3980 // CHECK13: omp_offload.failed16: 3981 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i64 [[TMP33]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 3982 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT17]] 3983 // CHECK13: omp_offload.cont17: 3984 // CHECK13-NEXT: [[TMP61:%.*]] = load i32, i32* [[M]], align 4 3985 // CHECK13-NEXT: [[CONV18:%.*]] = bitcast i64* [[M_CASTED]] to i32* 3986 // CHECK13-NEXT: store i32 [[TMP61]], i32* [[CONV18]], align 4 3987 // CHECK13-NEXT: [[TMP62:%.*]] = load i64, i64* [[M_CASTED]], align 8 3988 // CHECK13-NEXT: [[TMP63:%.*]] = load i32, i32* [[N]], align 4 3989 // CHECK13-NEXT: [[CONV20:%.*]] = bitcast i64* [[N_CASTED19]] to i32* 3990 // CHECK13-NEXT: store i32 [[TMP63]], i32* [[CONV20]], align 4 3991 // CHECK13-NEXT: [[TMP64:%.*]] = load i64, i64* [[N_CASTED19]], align 8 3992 // CHECK13-NEXT: [[TMP65:%.*]] = mul nuw i64 [[TMP1]], 4 3993 // CHECK13-NEXT: [[TMP66:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES24]] to i8* 3994 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP66]], i8* align 8 bitcast ([4 x i64]* @.offload_sizes.8 to i8*), i64 32, i1 false) 3995 // CHECK13-NEXT: [[TMP67:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 3996 // CHECK13-NEXT: [[TMP68:%.*]] = bitcast i8** [[TMP67]] to i64* 3997 // CHECK13-NEXT: store i64 [[TMP62]], i64* [[TMP68]], align 8 3998 // CHECK13-NEXT: [[TMP69:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 3999 // CHECK13-NEXT: [[TMP70:%.*]] = bitcast i8** [[TMP69]] to i64* 4000 // CHECK13-NEXT: store i64 [[TMP62]], i64* [[TMP70]], align 8 4001 // CHECK13-NEXT: [[TMP71:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0 4002 // CHECK13-NEXT: store i8* null, i8** [[TMP71]], align 8 4003 // CHECK13-NEXT: [[TMP72:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1 4004 // CHECK13-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to i64* 4005 // CHECK13-NEXT: store i64 [[TMP64]], i64* [[TMP73]], align 8 4006 // CHECK13-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1 4007 // CHECK13-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i64* 4008 // CHECK13-NEXT: store i64 [[TMP64]], i64* [[TMP75]], align 8 4009 // CHECK13-NEXT: [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1 4010 // CHECK13-NEXT: store i8* null, i8** [[TMP76]], align 8 4011 // CHECK13-NEXT: [[TMP77:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 2 4012 // CHECK13-NEXT: [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i64* 4013 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP78]], align 8 4014 // CHECK13-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 2 4015 // CHECK13-NEXT: [[TMP80:%.*]] = bitcast i8** [[TMP79]] to i64* 4016 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP80]], align 8 4017 // CHECK13-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 2 4018 // CHECK13-NEXT: store i8* null, i8** [[TMP81]], align 8 4019 // CHECK13-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 3 4020 // CHECK13-NEXT: [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i32** 4021 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP83]], align 8 4022 // CHECK13-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 3 4023 // CHECK13-NEXT: [[TMP85:%.*]] = bitcast i8** [[TMP84]] to i32** 4024 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP85]], align 8 4025 // CHECK13-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 3 4026 // CHECK13-NEXT: store i64 [[TMP65]], i64* [[TMP86]], align 8 4027 // CHECK13-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 3 4028 // CHECK13-NEXT: store i8* null, i8** [[TMP87]], align 8 4029 // CHECK13-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 4030 // CHECK13-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 4031 // CHECK13-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0 4032 // CHECK13-NEXT: [[TMP91:%.*]] = load i32, i32* [[N]], align 4 4033 // CHECK13-NEXT: store i32 [[TMP91]], i32* [[DOTCAPTURE_EXPR_26]], align 4 4034 // CHECK13-NEXT: [[TMP92:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 4035 // CHECK13-NEXT: [[SUB28:%.*]] = sub nsw i32 [[TMP92]], 0 4036 // CHECK13-NEXT: [[DIV29:%.*]] = sdiv i32 [[SUB28]], 1 4037 // CHECK13-NEXT: [[SUB30:%.*]] = sub nsw i32 [[DIV29]], 1 4038 // CHECK13-NEXT: store i32 [[SUB30]], i32* [[DOTCAPTURE_EXPR_27]], align 4 4039 // CHECK13-NEXT: [[TMP93:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 4040 // CHECK13-NEXT: [[ADD31:%.*]] = add nsw i32 [[TMP93]], 1 4041 // CHECK13-NEXT: [[TMP94:%.*]] = zext i32 [[ADD31]] to i64 4042 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP94]]) 4043 // CHECK13-NEXT: [[TMP95:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, i32 4, i8** [[TMP88]], i8** [[TMP89]], i64* [[TMP90]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4044 // CHECK13-NEXT: [[TMP96:%.*]] = icmp ne i32 [[TMP95]], 0 4045 // CHECK13-NEXT: br i1 [[TMP96]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]] 4046 // CHECK13: omp_offload.failed32: 4047 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i64 [[TMP62]], i64 [[TMP64]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 4048 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT33]] 4049 // CHECK13: omp_offload.cont33: 4050 // CHECK13-NEXT: [[TMP97:%.*]] = load i32, i32* [[N]], align 4 4051 // CHECK13-NEXT: [[CONV35:%.*]] = bitcast i64* [[N_CASTED34]] to i32* 4052 // CHECK13-NEXT: store i32 [[TMP97]], i32* [[CONV35]], align 4 4053 // CHECK13-NEXT: [[TMP98:%.*]] = load i64, i64* [[N_CASTED34]], align 8 4054 // CHECK13-NEXT: [[TMP99:%.*]] = mul nuw i64 [[TMP1]], 4 4055 // CHECK13-NEXT: [[TMP100:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES39]] to i8* 4056 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP100]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.12 to i8*), i64 24, i1 false) 4057 // CHECK13-NEXT: [[TMP101:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0 4058 // CHECK13-NEXT: [[TMP102:%.*]] = bitcast i8** [[TMP101]] to i64* 4059 // CHECK13-NEXT: store i64 [[TMP98]], i64* [[TMP102]], align 8 4060 // CHECK13-NEXT: [[TMP103:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0 4061 // CHECK13-NEXT: [[TMP104:%.*]] = bitcast i8** [[TMP103]] to i64* 4062 // CHECK13-NEXT: store i64 [[TMP98]], i64* [[TMP104]], align 8 4063 // CHECK13-NEXT: [[TMP105:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 0 4064 // CHECK13-NEXT: store i8* null, i8** [[TMP105]], align 8 4065 // CHECK13-NEXT: [[TMP106:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 1 4066 // CHECK13-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to i64* 4067 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP107]], align 8 4068 // CHECK13-NEXT: [[TMP108:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 1 4069 // CHECK13-NEXT: [[TMP109:%.*]] = bitcast i8** [[TMP108]] to i64* 4070 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP109]], align 8 4071 // CHECK13-NEXT: [[TMP110:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 1 4072 // CHECK13-NEXT: store i8* null, i8** [[TMP110]], align 8 4073 // CHECK13-NEXT: [[TMP111:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 2 4074 // CHECK13-NEXT: [[TMP112:%.*]] = bitcast i8** [[TMP111]] to i32** 4075 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP112]], align 8 4076 // CHECK13-NEXT: [[TMP113:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 2 4077 // CHECK13-NEXT: [[TMP114:%.*]] = bitcast i8** [[TMP113]] to i32** 4078 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP114]], align 8 4079 // CHECK13-NEXT: [[TMP115:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 2 4080 // CHECK13-NEXT: store i64 [[TMP99]], i64* [[TMP115]], align 8 4081 // CHECK13-NEXT: [[TMP116:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 2 4082 // CHECK13-NEXT: store i8* null, i8** [[TMP116]], align 8 4083 // CHECK13-NEXT: [[TMP117:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0 4084 // CHECK13-NEXT: [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0 4085 // CHECK13-NEXT: [[TMP119:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0 4086 // CHECK13-NEXT: [[TMP120:%.*]] = load i32, i32* [[N]], align 4 4087 // CHECK13-NEXT: store i32 [[TMP120]], i32* [[DOTCAPTURE_EXPR_41]], align 4 4088 // CHECK13-NEXT: [[TMP121:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4 4089 // CHECK13-NEXT: [[SUB43:%.*]] = sub nsw i32 [[TMP121]], 0 4090 // CHECK13-NEXT: [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1 4091 // CHECK13-NEXT: [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 1 4092 // CHECK13-NEXT: store i32 [[SUB45]], i32* [[DOTCAPTURE_EXPR_42]], align 4 4093 // CHECK13-NEXT: [[TMP122:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_42]], align 4 4094 // CHECK13-NEXT: [[ADD46:%.*]] = add nsw i32 [[TMP122]], 1 4095 // CHECK13-NEXT: [[TMP123:%.*]] = zext i32 [[ADD46]] to i64 4096 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP123]]) 4097 // CHECK13-NEXT: [[TMP124:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, i32 3, i8** [[TMP117]], i8** [[TMP118]], i64* [[TMP119]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4098 // CHECK13-NEXT: [[TMP125:%.*]] = icmp ne i32 [[TMP124]], 0 4099 // CHECK13-NEXT: br i1 [[TMP125]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]] 4100 // CHECK13: omp_offload.failed47: 4101 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i64 [[TMP98]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 4102 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT48]] 4103 // CHECK13: omp_offload.cont48: 4104 // CHECK13-NEXT: [[TMP126:%.*]] = load i32, i32* [[M]], align 4 4105 // CHECK13-NEXT: [[CONV50:%.*]] = bitcast i64* [[M_CASTED49]] to i32* 4106 // CHECK13-NEXT: store i32 [[TMP126]], i32* [[CONV50]], align 4 4107 // CHECK13-NEXT: [[TMP127:%.*]] = load i64, i64* [[M_CASTED49]], align 8 4108 // CHECK13-NEXT: [[TMP128:%.*]] = load i32, i32* [[N]], align 4 4109 // CHECK13-NEXT: [[CONV52:%.*]] = bitcast i64* [[N_CASTED51]] to i32* 4110 // CHECK13-NEXT: store i32 [[TMP128]], i32* [[CONV52]], align 4 4111 // CHECK13-NEXT: [[TMP129:%.*]] = load i64, i64* [[N_CASTED51]], align 8 4112 // CHECK13-NEXT: [[TMP130:%.*]] = mul nuw i64 [[TMP1]], 4 4113 // CHECK13-NEXT: [[TMP131:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES56]] to i8* 4114 // CHECK13-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP131]], i8* align 8 bitcast ([4 x i64]* @.offload_sizes.16 to i8*), i64 32, i1 false) 4115 // CHECK13-NEXT: [[TMP132:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0 4116 // CHECK13-NEXT: [[TMP133:%.*]] = bitcast i8** [[TMP132]] to i64* 4117 // CHECK13-NEXT: store i64 [[TMP127]], i64* [[TMP133]], align 8 4118 // CHECK13-NEXT: [[TMP134:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0 4119 // CHECK13-NEXT: [[TMP135:%.*]] = bitcast i8** [[TMP134]] to i64* 4120 // CHECK13-NEXT: store i64 [[TMP127]], i64* [[TMP135]], align 8 4121 // CHECK13-NEXT: [[TMP136:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 0 4122 // CHECK13-NEXT: store i8* null, i8** [[TMP136]], align 8 4123 // CHECK13-NEXT: [[TMP137:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 1 4124 // CHECK13-NEXT: [[TMP138:%.*]] = bitcast i8** [[TMP137]] to i64* 4125 // CHECK13-NEXT: store i64 [[TMP129]], i64* [[TMP138]], align 8 4126 // CHECK13-NEXT: [[TMP139:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 1 4127 // CHECK13-NEXT: [[TMP140:%.*]] = bitcast i8** [[TMP139]] to i64* 4128 // CHECK13-NEXT: store i64 [[TMP129]], i64* [[TMP140]], align 8 4129 // CHECK13-NEXT: [[TMP141:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 1 4130 // CHECK13-NEXT: store i8* null, i8** [[TMP141]], align 8 4131 // CHECK13-NEXT: [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 2 4132 // CHECK13-NEXT: [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i64* 4133 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP143]], align 8 4134 // CHECK13-NEXT: [[TMP144:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 2 4135 // CHECK13-NEXT: [[TMP145:%.*]] = bitcast i8** [[TMP144]] to i64* 4136 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP145]], align 8 4137 // CHECK13-NEXT: [[TMP146:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 2 4138 // CHECK13-NEXT: store i8* null, i8** [[TMP146]], align 8 4139 // CHECK13-NEXT: [[TMP147:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 3 4140 // CHECK13-NEXT: [[TMP148:%.*]] = bitcast i8** [[TMP147]] to i32** 4141 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP148]], align 8 4142 // CHECK13-NEXT: [[TMP149:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 3 4143 // CHECK13-NEXT: [[TMP150:%.*]] = bitcast i8** [[TMP149]] to i32** 4144 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP150]], align 8 4145 // CHECK13-NEXT: [[TMP151:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 3 4146 // CHECK13-NEXT: store i64 [[TMP130]], i64* [[TMP151]], align 8 4147 // CHECK13-NEXT: [[TMP152:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 3 4148 // CHECK13-NEXT: store i8* null, i8** [[TMP152]], align 8 4149 // CHECK13-NEXT: [[TMP153:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0 4150 // CHECK13-NEXT: [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0 4151 // CHECK13-NEXT: [[TMP155:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0 4152 // CHECK13-NEXT: [[TMP156:%.*]] = load i32, i32* [[N]], align 4 4153 // CHECK13-NEXT: store i32 [[TMP156]], i32* [[DOTCAPTURE_EXPR_58]], align 4 4154 // CHECK13-NEXT: [[TMP157:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_58]], align 4 4155 // CHECK13-NEXT: [[SUB60:%.*]] = sub nsw i32 [[TMP157]], 0 4156 // CHECK13-NEXT: [[DIV61:%.*]] = sdiv i32 [[SUB60]], 1 4157 // CHECK13-NEXT: [[SUB62:%.*]] = sub nsw i32 [[DIV61]], 1 4158 // CHECK13-NEXT: store i32 [[SUB62]], i32* [[DOTCAPTURE_EXPR_59]], align 4 4159 // CHECK13-NEXT: [[TMP158:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_59]], align 4 4160 // CHECK13-NEXT: [[ADD63:%.*]] = add nsw i32 [[TMP158]], 1 4161 // CHECK13-NEXT: [[TMP159:%.*]] = zext i32 [[ADD63]] to i64 4162 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP159]]) 4163 // CHECK13-NEXT: [[TMP160:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, i32 4, i8** [[TMP153]], i8** [[TMP154]], i64* [[TMP155]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4164 // CHECK13-NEXT: [[TMP161:%.*]] = icmp ne i32 [[TMP160]], 0 4165 // CHECK13-NEXT: br i1 [[TMP161]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]] 4166 // CHECK13: omp_offload.failed64: 4167 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i64 [[TMP127]], i64 [[TMP129]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 4168 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT65]] 4169 // CHECK13: omp_offload.cont65: 4170 // CHECK13-NEXT: [[TMP162:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 4171 // CHECK13-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP162]]) 4172 // CHECK13-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 4173 // CHECK13-NEXT: [[TMP163:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 4174 // CHECK13-NEXT: call void @llvm.stackrestore(i8* [[TMP163]]) 4175 // CHECK13-NEXT: [[TMP164:%.*]] = load i32, i32* [[RETVAL]], align 4 4176 // CHECK13-NEXT: ret i32 [[TMP164]] 4177 // 4178 // 4179 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148 4180 // CHECK13-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 4181 // CHECK13-NEXT: entry: 4182 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 4183 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 4184 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 4185 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 4186 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 4187 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 4188 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 4189 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 4190 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 4191 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 4192 // CHECK13-NEXT: ret void 4193 // 4194 // 4195 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined. 4196 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 4197 // CHECK13-NEXT: entry: 4198 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4199 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4200 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 4201 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 4202 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 4203 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4204 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 4205 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4206 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4207 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 4208 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4209 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4210 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4211 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4212 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4 4213 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4214 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4215 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 4216 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 4217 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 4218 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 4219 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 4220 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 4221 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 4222 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 4223 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4224 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 4225 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4226 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4227 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4228 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 4229 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4230 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 4231 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4232 // CHECK13: omp.precond.then: 4233 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4234 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4235 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 4236 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4237 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4238 // CHECK13-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4239 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 4240 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4241 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4242 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4243 // CHECK13-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 4244 // CHECK13-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4245 // CHECK13: cond.true: 4246 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4247 // CHECK13-NEXT: br label [[COND_END:%.*]] 4248 // CHECK13: cond.false: 4249 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4250 // CHECK13-NEXT: br label [[COND_END]] 4251 // CHECK13: cond.end: 4252 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 4253 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4254 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4255 // CHECK13-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 4256 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4257 // CHECK13: omp.inner.for.cond: 4258 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4259 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4260 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 4261 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4262 // CHECK13: omp.inner.for.body: 4263 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4264 // CHECK13-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 4265 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4266 // CHECK13-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 4267 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 4268 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4269 // CHECK13: omp.inner.for.inc: 4270 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4271 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4272 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 4273 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4274 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 4275 // CHECK13: omp.inner.for.end: 4276 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4277 // CHECK13: omp.loop.exit: 4278 // CHECK13-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4279 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 4280 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 4281 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 4282 // CHECK13: omp.precond.end: 4283 // CHECK13-NEXT: ret void 4284 // 4285 // 4286 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..1 4287 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 4288 // CHECK13-NEXT: entry: 4289 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4290 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4291 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4292 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4293 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 4294 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 4295 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 4296 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4297 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 4298 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4299 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4300 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 4301 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4302 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4303 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4304 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4305 // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4 4306 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4307 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4308 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4309 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4310 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 4311 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 4312 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 4313 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 4314 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 4315 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 4316 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 4317 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 4318 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4319 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 4320 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4321 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4322 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4323 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 4324 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4325 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 4326 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4327 // CHECK13: omp.precond.then: 4328 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4329 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4330 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 4331 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4332 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 4333 // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4334 // CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 4335 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 4336 // CHECK13-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 4337 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4338 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4339 // CHECK13-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4340 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 4341 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4342 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4343 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4344 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 4345 // CHECK13-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4346 // CHECK13: cond.true: 4347 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4348 // CHECK13-NEXT: br label [[COND_END:%.*]] 4349 // CHECK13: cond.false: 4350 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4351 // CHECK13-NEXT: br label [[COND_END]] 4352 // CHECK13: cond.end: 4353 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 4354 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4355 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4356 // CHECK13-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 4357 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4358 // CHECK13: omp.inner.for.cond: 4359 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4360 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4361 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 4362 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4363 // CHECK13: omp.inner.for.body: 4364 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4365 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 4366 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4367 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 4368 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4 4369 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 4370 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 4371 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4372 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4373 // CHECK13: omp.body.continue: 4374 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4375 // CHECK13: omp.inner.for.inc: 4376 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4377 // CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 4378 // CHECK13-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 4379 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 4380 // CHECK13: omp.inner.for.end: 4381 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4382 // CHECK13: omp.loop.exit: 4383 // CHECK13-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4384 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 4385 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 4386 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 4387 // CHECK13: omp.precond.end: 4388 // CHECK13-NEXT: ret void 4389 // 4390 // 4391 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153 4392 // CHECK13-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 4393 // CHECK13-NEXT: entry: 4394 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 4395 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 4396 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 4397 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 4398 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 4399 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 4400 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 4401 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 4402 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 4403 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 4404 // CHECK13-NEXT: ret void 4405 // 4406 // 4407 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..2 4408 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 4409 // CHECK13-NEXT: entry: 4410 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4411 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4412 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 4413 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 4414 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 4415 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4416 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 4417 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4418 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4419 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 4420 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4421 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4422 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4423 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4424 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4 4425 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4426 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4427 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 4428 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 4429 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 4430 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 4431 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 4432 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 4433 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 4434 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 4435 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4436 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 4437 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4438 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4439 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4440 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 4441 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4442 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 4443 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4444 // CHECK13: omp.precond.then: 4445 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4446 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4447 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 4448 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4449 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4450 // CHECK13-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4451 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 4452 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4453 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4454 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4455 // CHECK13-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 4456 // CHECK13-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4457 // CHECK13: cond.true: 4458 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4459 // CHECK13-NEXT: br label [[COND_END:%.*]] 4460 // CHECK13: cond.false: 4461 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4462 // CHECK13-NEXT: br label [[COND_END]] 4463 // CHECK13: cond.end: 4464 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 4465 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4466 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4467 // CHECK13-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 4468 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4469 // CHECK13: omp.inner.for.cond: 4470 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4471 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4472 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 4473 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4474 // CHECK13: omp.inner.for.body: 4475 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4476 // CHECK13-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 4477 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4478 // CHECK13-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 4479 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 4480 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4481 // CHECK13: omp.inner.for.inc: 4482 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4483 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4484 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 4485 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4486 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 4487 // CHECK13: omp.inner.for.end: 4488 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4489 // CHECK13: omp.loop.exit: 4490 // CHECK13-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4491 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 4492 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 4493 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 4494 // CHECK13: omp.precond.end: 4495 // CHECK13-NEXT: ret void 4496 // 4497 // 4498 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..3 4499 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 4500 // CHECK13-NEXT: entry: 4501 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4502 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4503 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4504 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4505 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 4506 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 4507 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 4508 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4509 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 4510 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4511 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4512 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 4513 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4514 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4515 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4516 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4517 // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4 4518 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4519 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4520 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4521 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4522 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 4523 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 4524 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 4525 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 4526 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 4527 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 4528 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 4529 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 4530 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4531 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 4532 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4533 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4534 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4535 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 4536 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4537 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 4538 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4539 // CHECK13: omp.precond.then: 4540 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4541 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4542 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 4543 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4544 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 4545 // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4546 // CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 4547 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 4548 // CHECK13-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 4549 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4550 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4551 // CHECK13-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4552 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 4553 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4554 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4555 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4556 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 4557 // CHECK13-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4558 // CHECK13: cond.true: 4559 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4560 // CHECK13-NEXT: br label [[COND_END:%.*]] 4561 // CHECK13: cond.false: 4562 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4563 // CHECK13-NEXT: br label [[COND_END]] 4564 // CHECK13: cond.end: 4565 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 4566 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4567 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4568 // CHECK13-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 4569 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4570 // CHECK13: omp.inner.for.cond: 4571 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4572 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4573 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 4574 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4575 // CHECK13: omp.inner.for.body: 4576 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4577 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 4578 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4579 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 4580 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4 4581 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 4582 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 4583 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4584 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4585 // CHECK13: omp.body.continue: 4586 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4587 // CHECK13: omp.inner.for.inc: 4588 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4589 // CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 4590 // CHECK13-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 4591 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 4592 // CHECK13: omp.inner.for.end: 4593 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4594 // CHECK13: omp.loop.exit: 4595 // CHECK13-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4596 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 4597 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 4598 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 4599 // CHECK13: omp.precond.end: 4600 // CHECK13-NEXT: ret void 4601 // 4602 // 4603 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158 4604 // CHECK13-SAME: (i64 noundef [[M:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 4605 // CHECK13-NEXT: entry: 4606 // CHECK13-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 4607 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 4608 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 4609 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 4610 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4611 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 4612 // CHECK13-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 4613 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 4614 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 4615 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 4616 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* 4617 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 4618 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 4619 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 4620 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 4621 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 4622 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4623 // CHECK13-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 4624 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4 4625 // CHECK13-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 4626 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]]) 4627 // CHECK13-NEXT: ret void 4628 // 4629 // 4630 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..6 4631 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 4632 // CHECK13-NEXT: entry: 4633 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4634 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4635 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 4636 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 4637 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 4638 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 4639 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4640 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 4641 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4642 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 4643 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 4644 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4645 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4646 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4647 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4648 // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4 4649 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 4650 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4651 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4652 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 4653 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 4654 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 4655 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 4656 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 4657 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 4658 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 4659 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 4660 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 4661 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4662 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4663 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 4664 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4665 // CHECK13-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 4666 // CHECK13-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 4667 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 4668 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4669 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 4670 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4671 // CHECK13: omp.precond.then: 4672 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4673 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 4674 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 4675 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4676 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4677 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[CONV]], align 4 4678 // CHECK13-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4679 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 4680 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]]) 4681 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4682 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 4683 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 4684 // CHECK13-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4685 // CHECK13: cond.true: 4686 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 4687 // CHECK13-NEXT: br label [[COND_END:%.*]] 4688 // CHECK13: cond.false: 4689 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4690 // CHECK13-NEXT: br label [[COND_END]] 4691 // CHECK13: cond.end: 4692 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 4693 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4694 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4695 // CHECK13-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 4696 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4697 // CHECK13: omp.inner.for.cond: 4698 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4699 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 4700 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1 4701 // CHECK13-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]] 4702 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4703 // CHECK13: omp.inner.for.body: 4704 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4705 // CHECK13-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 4706 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4707 // CHECK13-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 4708 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV]], align 4 4709 // CHECK13-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 4710 // CHECK13-NEXT: store i32 [[TMP21]], i32* [[CONV7]], align 4 4711 // CHECK13-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 4712 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP22]]) 4713 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4714 // CHECK13: omp.inner.for.inc: 4715 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4716 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4717 // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 4718 // CHECK13-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 4719 // CHECK13-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4720 // CHECK13-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4721 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 4722 // CHECK13-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4 4723 // CHECK13-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4724 // CHECK13-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4725 // CHECK13-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP27]], [[TMP28]] 4726 // CHECK13-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4 4727 // CHECK13-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4728 // CHECK13-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 4729 // CHECK13-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]] 4730 // CHECK13-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]] 4731 // CHECK13: cond.true12: 4732 // CHECK13-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 4733 // CHECK13-NEXT: br label [[COND_END14:%.*]] 4734 // CHECK13: cond.false13: 4735 // CHECK13-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4736 // CHECK13-NEXT: br label [[COND_END14]] 4737 // CHECK13: cond.end14: 4738 // CHECK13-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE12]] ], [ [[TMP32]], [[COND_FALSE13]] ] 4739 // CHECK13-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4 4740 // CHECK13-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4741 // CHECK13-NEXT: store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4 4742 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 4743 // CHECK13: omp.inner.for.end: 4744 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4745 // CHECK13: omp.loop.exit: 4746 // CHECK13-NEXT: [[TMP34:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4747 // CHECK13-NEXT: [[TMP35:%.*]] = load i32, i32* [[TMP34]], align 4 4748 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP35]]) 4749 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 4750 // CHECK13: omp.precond.end: 4751 // CHECK13-NEXT: ret void 4752 // 4753 // 4754 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..7 4755 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 4756 // CHECK13-NEXT: entry: 4757 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4758 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4759 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4760 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4761 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 4762 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 4763 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 4764 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 4765 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4766 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 4767 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4768 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 4769 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 4770 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4771 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4772 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4773 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4774 // CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 4 4775 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4776 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4777 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4778 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4779 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 4780 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 4781 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 4782 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 4783 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 4784 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 4785 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 4786 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 4787 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 4788 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4789 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4790 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 4791 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4792 // CHECK13-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 4793 // CHECK13-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 4794 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 4795 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4796 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 4797 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4798 // CHECK13: omp.precond.then: 4799 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4800 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 4801 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 4802 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4803 // CHECK13-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32 4804 // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4805 // CHECK13-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32 4806 // CHECK13-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 4807 // CHECK13-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 4808 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4809 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4810 // CHECK13-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4811 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 4812 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4813 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4814 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 4815 // CHECK13-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 4816 // CHECK13-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4817 // CHECK13: cond.true: 4818 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 4819 // CHECK13-NEXT: br label [[COND_END:%.*]] 4820 // CHECK13: cond.false: 4821 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4822 // CHECK13-NEXT: br label [[COND_END]] 4823 // CHECK13: cond.end: 4824 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 4825 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4826 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4827 // CHECK13-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 4828 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4829 // CHECK13: omp.inner.for.cond: 4830 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4831 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4832 // CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 4833 // CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4834 // CHECK13: omp.inner.for.body: 4835 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4836 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 4837 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4838 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I6]], align 4 4839 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4 4840 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 4841 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 4842 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4843 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4844 // CHECK13: omp.body.continue: 4845 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4846 // CHECK13: omp.inner.for.inc: 4847 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4848 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1 4849 // CHECK13-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 4850 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 4851 // CHECK13: omp.inner.for.end: 4852 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4853 // CHECK13: omp.loop.exit: 4854 // CHECK13-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4855 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 4856 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 4857 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 4858 // CHECK13: omp.precond.end: 4859 // CHECK13-NEXT: ret void 4860 // 4861 // 4862 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163 4863 // CHECK13-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 4864 // CHECK13-NEXT: entry: 4865 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 4866 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 4867 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 4868 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 4869 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 4870 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 4871 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 4872 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 4873 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 4874 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 4875 // CHECK13-NEXT: ret void 4876 // 4877 // 4878 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..10 4879 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 4880 // CHECK13-NEXT: entry: 4881 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4882 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4883 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 4884 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 4885 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 4886 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4887 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 4888 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4889 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4890 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 4891 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4892 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4893 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4894 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4895 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4 4896 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4897 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4898 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 4899 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 4900 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 4901 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 4902 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 4903 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 4904 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 4905 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 4906 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4907 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 4908 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 4909 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 4910 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 4911 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 4912 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 4913 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 4914 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 4915 // CHECK13: omp.precond.then: 4916 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4917 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4918 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 4919 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4920 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4921 // CHECK13-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4922 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 4923 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4924 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4925 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4926 // CHECK13-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 4927 // CHECK13-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4928 // CHECK13: cond.true: 4929 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 4930 // CHECK13-NEXT: br label [[COND_END:%.*]] 4931 // CHECK13: cond.false: 4932 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4933 // CHECK13-NEXT: br label [[COND_END]] 4934 // CHECK13: cond.end: 4935 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 4936 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4937 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4938 // CHECK13-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 4939 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4940 // CHECK13: omp.inner.for.cond: 4941 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4942 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4943 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 4944 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4945 // CHECK13: omp.inner.for.body: 4946 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4947 // CHECK13-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 4948 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4949 // CHECK13-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 4950 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 4951 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4952 // CHECK13: omp.inner.for.inc: 4953 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4954 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4955 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 4956 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4957 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 4958 // CHECK13: omp.inner.for.end: 4959 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4960 // CHECK13: omp.loop.exit: 4961 // CHECK13-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4962 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 4963 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 4964 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 4965 // CHECK13: omp.precond.end: 4966 // CHECK13-NEXT: ret void 4967 // 4968 // 4969 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..11 4970 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 4971 // CHECK13-NEXT: entry: 4972 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4973 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4974 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4975 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4976 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 4977 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 4978 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 4979 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4980 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 4981 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 4982 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 4983 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 4984 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4985 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4986 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4987 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4988 // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4 4989 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4990 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4991 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4992 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4993 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 4994 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 4995 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 4996 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 4997 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 4998 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 4999 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 5000 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 5001 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5002 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 5003 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5004 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 5005 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 5006 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 5007 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5008 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 5009 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5010 // CHECK13: omp.precond.then: 5011 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5012 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5013 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 5014 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5015 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 5016 // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5017 // CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 5018 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 5019 // CHECK13-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 5020 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5021 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5022 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5023 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5024 // CHECK13-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5025 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 5026 // CHECK13-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1) 5027 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 5028 // CHECK13: omp.dispatch.cond: 5029 // CHECK13-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5030 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 5031 // CHECK13-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 5032 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 5033 // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 5034 // CHECK13: omp.dispatch.body: 5035 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5036 // CHECK13-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 5037 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5038 // CHECK13: omp.inner.for.cond: 5039 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 5040 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15 5041 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 5042 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5043 // CHECK13: omp.inner.for.body: 5044 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 5045 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 5046 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5047 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !15 5048 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !15 5049 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64 5050 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 5051 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15 5052 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5053 // CHECK13: omp.body.continue: 5054 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5055 // CHECK13: omp.inner.for.inc: 5056 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 5057 // CHECK13-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1 5058 // CHECK13-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 5059 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 5060 // CHECK13: omp.inner.for.end: 5061 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 5062 // CHECK13: omp.dispatch.inc: 5063 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]] 5064 // CHECK13: omp.dispatch.end: 5065 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 5066 // CHECK13: omp.precond.end: 5067 // CHECK13-NEXT: ret void 5068 // 5069 // 5070 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168 5071 // CHECK13-SAME: (i64 noundef [[M:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 5072 // CHECK13-NEXT: entry: 5073 // CHECK13-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 5074 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 5075 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 5076 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 5077 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5078 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 5079 // CHECK13-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 5080 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 5081 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 5082 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 5083 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* 5084 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 5085 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 5086 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 5087 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 5088 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 5089 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5090 // CHECK13-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 5091 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4 5092 // CHECK13-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 5093 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]]) 5094 // CHECK13-NEXT: ret void 5095 // 5096 // 5097 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..14 5098 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 5099 // CHECK13-NEXT: entry: 5100 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5101 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5102 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 5103 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 5104 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 5105 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 5106 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5107 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 5108 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5109 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 5110 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 5111 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5112 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5113 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5114 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5115 // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4 5116 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 5117 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5118 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5119 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 5120 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 5121 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 5122 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 5123 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 5124 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 5125 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 5126 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 5127 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 5128 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 5129 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5130 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 5131 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5132 // CHECK13-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 5133 // CHECK13-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 5134 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 5135 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5136 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 5137 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5138 // CHECK13: omp.precond.then: 5139 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 5140 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 5141 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 5142 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5143 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5144 // CHECK13-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5145 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 5146 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5147 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5148 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 5149 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 5150 // CHECK13-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5151 // CHECK13: cond.true: 5152 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 5153 // CHECK13-NEXT: br label [[COND_END:%.*]] 5154 // CHECK13: cond.false: 5155 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5156 // CHECK13-NEXT: br label [[COND_END]] 5157 // CHECK13: cond.end: 5158 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 5159 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5160 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5161 // CHECK13-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 5162 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5163 // CHECK13: omp.inner.for.cond: 5164 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5165 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5166 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 5167 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5168 // CHECK13: omp.inner.for.body: 5169 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5170 // CHECK13-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 5171 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5172 // CHECK13-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 5173 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV]], align 4 5174 // CHECK13-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 5175 // CHECK13-NEXT: store i32 [[TMP20]], i32* [[CONV7]], align 4 5176 // CHECK13-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 5177 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP21]]) 5178 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5179 // CHECK13: omp.inner.for.inc: 5180 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5181 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5182 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 5183 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 5184 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 5185 // CHECK13: omp.inner.for.end: 5186 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5187 // CHECK13: omp.loop.exit: 5188 // CHECK13-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5189 // CHECK13-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 5190 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) 5191 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 5192 // CHECK13: omp.precond.end: 5193 // CHECK13-NEXT: ret void 5194 // 5195 // 5196 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..15 5197 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 5198 // CHECK13-NEXT: entry: 5199 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5200 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5201 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5202 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5203 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 5204 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 5205 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 5206 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 5207 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5208 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 5209 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 5210 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 5211 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 5212 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5213 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5214 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5215 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5216 // CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 4 5217 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5218 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5219 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5220 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5221 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 5222 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 5223 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 5224 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 5225 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 5226 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 5227 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 5228 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 5229 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 5230 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 5231 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5232 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 5233 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 5234 // CHECK13-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 5235 // CHECK13-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 5236 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 5237 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 5238 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 5239 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 5240 // CHECK13: omp.precond.then: 5241 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5242 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 5243 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 5244 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5245 // CHECK13-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32 5246 // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5247 // CHECK13-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32 5248 // CHECK13-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 5249 // CHECK13-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 5250 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5251 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5252 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 4 5253 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5254 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5255 // CHECK13-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5256 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 5257 // CHECK13-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 1073741859, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]]) 5258 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 5259 // CHECK13: omp.dispatch.cond: 5260 // CHECK13-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5261 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 5262 // CHECK13-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 5263 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 5264 // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 5265 // CHECK13: omp.dispatch.body: 5266 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5267 // CHECK13-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 5268 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5269 // CHECK13: omp.inner.for.cond: 5270 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 5271 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18 5272 // CHECK13-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 5273 // CHECK13-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5274 // CHECK13: omp.inner.for.body: 5275 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 5276 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 5277 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5278 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !18 5279 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !18 5280 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 5281 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 5282 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18 5283 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5284 // CHECK13: omp.body.continue: 5285 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5286 // CHECK13: omp.inner.for.inc: 5287 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 5288 // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], 1 5289 // CHECK13-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 5290 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]] 5291 // CHECK13: omp.inner.for.end: 5292 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 5293 // CHECK13: omp.dispatch.inc: 5294 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]] 5295 // CHECK13: omp.dispatch.end: 5296 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 5297 // CHECK13: omp.precond.end: 5298 // CHECK13-NEXT: ret void 5299 // 5300 // 5301 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 5302 // CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 5303 // CHECK13-NEXT: entry: 5304 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 5305 // CHECK13-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 5306 // CHECK13-NEXT: [[M:%.*]] = alloca i32, align 4 5307 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 5308 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 5309 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 5310 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 5311 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8 5312 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8 5313 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8 5314 // CHECK13-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 5315 // CHECK13-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 5316 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 8 5317 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 8 5318 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 8 5319 // CHECK13-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 5320 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 8 5321 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 8 5322 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 8 5323 // CHECK13-NEXT: [[_TMP16:%.*]] = alloca i32, align 4 5324 // CHECK13-NEXT: [[M_CASTED19:%.*]] = alloca i64, align 8 5325 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [2 x i8*], align 8 5326 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS22:%.*]] = alloca [2 x i8*], align 8 5327 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [2 x i8*], align 8 5328 // CHECK13-NEXT: [[_TMP24:%.*]] = alloca i32, align 4 5329 // CHECK13-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 5330 // CHECK13-NEXT: store i32 10, i32* [[M]], align 4 5331 // CHECK13-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 5332 // CHECK13-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 5333 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8 5334 // CHECK13-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 5335 // CHECK13-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 5336 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8 5337 // CHECK13-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 5338 // CHECK13-NEXT: store i8* null, i8** [[TMP4]], align 8 5339 // CHECK13-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 5340 // CHECK13-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 5341 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 5342 // CHECK13-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.20, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.21, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 5343 // CHECK13-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 5344 // CHECK13-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 5345 // CHECK13: omp_offload.failed: 5346 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]] 5347 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]] 5348 // CHECK13: omp_offload.cont: 5349 // CHECK13-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 5350 // CHECK13-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** 5351 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8 5352 // CHECK13-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 5353 // CHECK13-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** 5354 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8 5355 // CHECK13-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0 5356 // CHECK13-NEXT: store i8* null, i8** [[TMP13]], align 8 5357 // CHECK13-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 5358 // CHECK13-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 5359 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 5360 // CHECK13-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.24, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.25, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 5361 // CHECK13-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 5362 // CHECK13-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 5363 // CHECK13: omp_offload.failed5: 5364 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121([10 x i32]* [[A]]) #[[ATTR3]] 5365 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT6]] 5366 // CHECK13: omp_offload.cont6: 5367 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[M]], align 4 5368 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[M_CASTED]] to i32* 5369 // CHECK13-NEXT: store i32 [[TMP18]], i32* [[CONV]], align 4 5370 // CHECK13-NEXT: [[TMP19:%.*]] = load i64, i64* [[M_CASTED]], align 8 5371 // CHECK13-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 5372 // CHECK13-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64* 5373 // CHECK13-NEXT: store i64 [[TMP19]], i64* [[TMP21]], align 8 5374 // CHECK13-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 5375 // CHECK13-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64* 5376 // CHECK13-NEXT: store i64 [[TMP19]], i64* [[TMP23]], align 8 5377 // CHECK13-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0 5378 // CHECK13-NEXT: store i8* null, i8** [[TMP24]], align 8 5379 // CHECK13-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1 5380 // CHECK13-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]** 5381 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 8 5382 // CHECK13-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1 5383 // CHECK13-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]** 5384 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 8 5385 // CHECK13-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 1 5386 // CHECK13-NEXT: store i8* null, i8** [[TMP29]], align 8 5387 // CHECK13-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 5388 // CHECK13-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 5389 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 5390 // CHECK13-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.28, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.29, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 5391 // CHECK13-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 5392 // CHECK13-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] 5393 // CHECK13: omp_offload.failed11: 5394 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i64 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]] 5395 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT12]] 5396 // CHECK13: omp_offload.cont12: 5397 // CHECK13-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 5398 // CHECK13-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]** 5399 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 8 5400 // CHECK13-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 5401 // CHECK13-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]** 5402 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 8 5403 // CHECK13-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i64 0, i64 0 5404 // CHECK13-NEXT: store i8* null, i8** [[TMP38]], align 8 5405 // CHECK13-NEXT: [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 5406 // CHECK13-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 5407 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 5408 // CHECK13-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.32, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.33, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 5409 // CHECK13-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0 5410 // CHECK13-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]] 5411 // CHECK13: omp_offload.failed17: 5412 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131([10 x i32]* [[A]]) #[[ATTR3]] 5413 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT18]] 5414 // CHECK13: omp_offload.cont18: 5415 // CHECK13-NEXT: [[TMP43:%.*]] = load i32, i32* [[M]], align 4 5416 // CHECK13-NEXT: [[CONV20:%.*]] = bitcast i64* [[M_CASTED19]] to i32* 5417 // CHECK13-NEXT: store i32 [[TMP43]], i32* [[CONV20]], align 4 5418 // CHECK13-NEXT: [[TMP44:%.*]] = load i64, i64* [[M_CASTED19]], align 8 5419 // CHECK13-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 5420 // CHECK13-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64* 5421 // CHECK13-NEXT: store i64 [[TMP44]], i64* [[TMP46]], align 8 5422 // CHECK13-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 5423 // CHECK13-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64* 5424 // CHECK13-NEXT: store i64 [[TMP44]], i64* [[TMP48]], align 8 5425 // CHECK13-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0 5426 // CHECK13-NEXT: store i8* null, i8** [[TMP49]], align 8 5427 // CHECK13-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1 5428 // CHECK13-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]** 5429 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 8 5430 // CHECK13-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1 5431 // CHECK13-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]** 5432 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 8 5433 // CHECK13-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1 5434 // CHECK13-NEXT: store i8* null, i8** [[TMP54]], align 8 5435 // CHECK13-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 5436 // CHECK13-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 5437 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 5438 // CHECK13-NEXT: [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.36, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.37, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 5439 // CHECK13-NEXT: [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0 5440 // CHECK13-NEXT: br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED25:%.*]], label [[OMP_OFFLOAD_CONT26:%.*]] 5441 // CHECK13: omp_offload.failed25: 5442 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i64 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]] 5443 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT26]] 5444 // CHECK13: omp_offload.cont26: 5445 // CHECK13-NEXT: ret i32 0 5446 // 5447 // 5448 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116 5449 // CHECK13-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 5450 // CHECK13-NEXT: entry: 5451 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 5452 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 5453 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 5454 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 5455 // CHECK13-NEXT: ret void 5456 // 5457 // 5458 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..18 5459 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 5460 // CHECK13-NEXT: entry: 5461 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5462 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5463 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 5464 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5465 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 5466 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5467 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5468 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5469 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5470 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 5471 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5472 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5473 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 5474 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 5475 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 5476 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 5477 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5478 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5479 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5480 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 5481 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5482 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5483 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 5484 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5485 // CHECK13: cond.true: 5486 // CHECK13-NEXT: br label [[COND_END:%.*]] 5487 // CHECK13: cond.false: 5488 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5489 // CHECK13-NEXT: br label [[COND_END]] 5490 // CHECK13: cond.end: 5491 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 5492 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5493 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5494 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 5495 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5496 // CHECK13: omp.inner.for.cond: 5497 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5498 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5499 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5500 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5501 // CHECK13: omp.inner.for.body: 5502 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5503 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 5504 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5505 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 5506 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..19 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]) 5507 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5508 // CHECK13: omp.inner.for.inc: 5509 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5510 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5511 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 5512 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 5513 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 5514 // CHECK13: omp.inner.for.end: 5515 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5516 // CHECK13: omp.loop.exit: 5517 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 5518 // CHECK13-NEXT: ret void 5519 // 5520 // 5521 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..19 5522 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 5523 // CHECK13-NEXT: entry: 5524 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5525 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5526 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5527 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5528 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 5529 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5530 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 5531 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5532 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5533 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5534 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5535 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 5536 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5537 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5538 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5539 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5540 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 5541 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 5542 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5543 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 5544 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5545 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 5546 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5547 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 5548 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 5549 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 5550 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5551 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5552 // CHECK13-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5553 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 5554 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5555 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5556 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 5557 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5558 // CHECK13: cond.true: 5559 // CHECK13-NEXT: br label [[COND_END:%.*]] 5560 // CHECK13: cond.false: 5561 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5562 // CHECK13-NEXT: br label [[COND_END]] 5563 // CHECK13: cond.end: 5564 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 5565 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5566 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5567 // CHECK13-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 5568 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5569 // CHECK13: omp.inner.for.cond: 5570 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5571 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5572 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 5573 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5574 // CHECK13: omp.inner.for.body: 5575 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5576 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 5577 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5578 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4 5579 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 5580 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 5581 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 5582 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 5583 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5584 // CHECK13: omp.body.continue: 5585 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5586 // CHECK13: omp.inner.for.inc: 5587 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5588 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 5589 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 5590 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 5591 // CHECK13: omp.inner.for.end: 5592 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5593 // CHECK13: omp.loop.exit: 5594 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 5595 // CHECK13-NEXT: ret void 5596 // 5597 // 5598 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121 5599 // CHECK13-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 5600 // CHECK13-NEXT: entry: 5601 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 5602 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 5603 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 5604 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..22 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 5605 // CHECK13-NEXT: ret void 5606 // 5607 // 5608 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..22 5609 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 5610 // CHECK13-NEXT: entry: 5611 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5612 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5613 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 5614 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5615 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 5616 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5617 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5618 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5619 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5620 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 5621 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5622 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5623 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 5624 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 5625 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 5626 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 5627 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5628 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5629 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5630 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 5631 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5632 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5633 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 5634 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5635 // CHECK13: cond.true: 5636 // CHECK13-NEXT: br label [[COND_END:%.*]] 5637 // CHECK13: cond.false: 5638 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5639 // CHECK13-NEXT: br label [[COND_END]] 5640 // CHECK13: cond.end: 5641 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 5642 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5643 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5644 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 5645 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5646 // CHECK13: omp.inner.for.cond: 5647 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5648 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5649 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5650 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5651 // CHECK13: omp.inner.for.body: 5652 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5653 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 5654 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5655 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 5656 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..23 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]) 5657 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5658 // CHECK13: omp.inner.for.inc: 5659 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5660 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5661 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 5662 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 5663 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 5664 // CHECK13: omp.inner.for.end: 5665 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5666 // CHECK13: omp.loop.exit: 5667 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 5668 // CHECK13-NEXT: ret void 5669 // 5670 // 5671 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..23 5672 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 5673 // CHECK13-NEXT: entry: 5674 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5675 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5676 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5677 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5678 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 5679 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5680 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 5681 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5682 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5683 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5684 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5685 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 5686 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5687 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5688 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5689 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5690 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 5691 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 5692 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5693 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 5694 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5695 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 5696 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5697 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 5698 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 5699 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 5700 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5701 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5702 // CHECK13-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5703 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 5704 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5705 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5706 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 5707 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5708 // CHECK13: cond.true: 5709 // CHECK13-NEXT: br label [[COND_END:%.*]] 5710 // CHECK13: cond.false: 5711 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5712 // CHECK13-NEXT: br label [[COND_END]] 5713 // CHECK13: cond.end: 5714 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 5715 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5716 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5717 // CHECK13-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 5718 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5719 // CHECK13: omp.inner.for.cond: 5720 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5721 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5722 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 5723 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5724 // CHECK13: omp.inner.for.body: 5725 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5726 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 5727 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5728 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4 5729 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 5730 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 5731 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 5732 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 5733 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5734 // CHECK13: omp.body.continue: 5735 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5736 // CHECK13: omp.inner.for.inc: 5737 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5738 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 5739 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 5740 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 5741 // CHECK13: omp.inner.for.end: 5742 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5743 // CHECK13: omp.loop.exit: 5744 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 5745 // CHECK13-NEXT: ret void 5746 // 5747 // 5748 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126 5749 // CHECK13-SAME: (i64 noundef [[M:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 5750 // CHECK13-NEXT: entry: 5751 // CHECK13-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 5752 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 5753 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 5754 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 5755 // CHECK13-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 5756 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 5757 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* 5758 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 5759 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 5760 // CHECK13-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 5761 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 5762 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 5763 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 5764 // CHECK13-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 5765 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..26 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]]) 5766 // CHECK13-NEXT: ret void 5767 // 5768 // 5769 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..26 5770 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 5771 // CHECK13-NEXT: entry: 5772 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5773 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5774 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 5775 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 5776 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5777 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 5778 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5779 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5780 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5781 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5782 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 5783 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 5784 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5785 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5786 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 5787 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 5788 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 5789 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 5790 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 5791 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 5792 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5793 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5794 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5795 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 5796 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5797 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5798 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 5799 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5800 // CHECK13: cond.true: 5801 // CHECK13-NEXT: br label [[COND_END:%.*]] 5802 // CHECK13: cond.false: 5803 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5804 // CHECK13-NEXT: br label [[COND_END]] 5805 // CHECK13: cond.end: 5806 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 5807 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5808 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5809 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 5810 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5811 // CHECK13: omp.inner.for.cond: 5812 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5813 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5814 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5815 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5816 // CHECK13: omp.inner.for.body: 5817 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5818 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 5819 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5820 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 5821 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 4 5822 // CHECK13-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 5823 // CHECK13-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4 5824 // CHECK13-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 5825 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..27 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]]) 5826 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5827 // CHECK13: omp.inner.for.inc: 5828 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5829 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5830 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 5831 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 5832 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 5833 // CHECK13: omp.inner.for.end: 5834 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5835 // CHECK13: omp.loop.exit: 5836 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 5837 // CHECK13-NEXT: ret void 5838 // 5839 // 5840 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..27 5841 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 5842 // CHECK13-NEXT: entry: 5843 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5844 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5845 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5846 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5847 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 5848 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 5849 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5850 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 5851 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5852 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5853 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5854 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5855 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 5856 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5857 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5858 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5859 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5860 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 5861 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 5862 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 5863 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 5864 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5865 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 5866 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5867 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 5868 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5869 // CHECK13-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 5870 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4 5871 // CHECK13-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 5872 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5873 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5874 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4 5875 // CHECK13-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5876 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 5877 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]]) 5878 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 5879 // CHECK13: omp.dispatch.cond: 5880 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5881 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5882 // CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 5883 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]] 5884 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5885 // CHECK13: cond.true: 5886 // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5887 // CHECK13-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 5888 // CHECK13-NEXT: br label [[COND_END:%.*]] 5889 // CHECK13: cond.false: 5890 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5891 // CHECK13-NEXT: br label [[COND_END]] 5892 // CHECK13: cond.end: 5893 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 5894 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5895 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5896 // CHECK13-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 5897 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5898 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5899 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 5900 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 5901 // CHECK13: omp.dispatch.body: 5902 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5903 // CHECK13: omp.inner.for.cond: 5904 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5905 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5906 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 5907 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5908 // CHECK13: omp.inner.for.body: 5909 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5910 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 5911 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5912 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4 5913 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4 5914 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 5915 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 5916 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 5917 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5918 // CHECK13: omp.body.continue: 5919 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5920 // CHECK13: omp.inner.for.inc: 5921 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5922 // CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1 5923 // CHECK13-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 5924 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 5925 // CHECK13: omp.inner.for.end: 5926 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 5927 // CHECK13: omp.dispatch.inc: 5928 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5929 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5930 // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 5931 // CHECK13-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 5932 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5933 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5934 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 5935 // CHECK13-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 5936 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]] 5937 // CHECK13: omp.dispatch.end: 5938 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 5939 // CHECK13-NEXT: ret void 5940 // 5941 // 5942 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131 5943 // CHECK13-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 5944 // CHECK13-NEXT: entry: 5945 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 5946 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 5947 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 5948 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..30 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 5949 // CHECK13-NEXT: ret void 5950 // 5951 // 5952 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..30 5953 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 5954 // CHECK13-NEXT: entry: 5955 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5956 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5957 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 5958 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5959 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 5960 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5961 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5962 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5963 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5964 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 5965 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5966 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5967 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 5968 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 5969 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 5970 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 5971 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5972 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5973 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5974 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 5975 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5976 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5977 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 5978 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5979 // CHECK13: cond.true: 5980 // CHECK13-NEXT: br label [[COND_END:%.*]] 5981 // CHECK13: cond.false: 5982 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5983 // CHECK13-NEXT: br label [[COND_END]] 5984 // CHECK13: cond.end: 5985 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 5986 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5987 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5988 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 5989 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5990 // CHECK13: omp.inner.for.cond: 5991 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5992 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5993 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5994 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5995 // CHECK13: omp.inner.for.body: 5996 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5997 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 5998 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5999 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 6000 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..31 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]) 6001 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6002 // CHECK13: omp.inner.for.inc: 6003 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6004 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6005 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 6006 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 6007 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 6008 // CHECK13: omp.inner.for.end: 6009 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6010 // CHECK13: omp.loop.exit: 6011 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 6012 // CHECK13-NEXT: ret void 6013 // 6014 // 6015 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..31 6016 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 6017 // CHECK13-NEXT: entry: 6018 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6019 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6020 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 6021 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 6022 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 6023 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6024 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 6025 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6026 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6027 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6028 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6029 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 6030 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6031 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6032 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6033 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6034 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 6035 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 6036 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6037 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 6038 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6039 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 6040 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6041 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 6042 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 6043 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 6044 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6045 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6046 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6047 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6048 // CHECK13-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6049 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 6050 // CHECK13-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 6051 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 6052 // CHECK13: omp.dispatch.cond: 6053 // CHECK13-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 6054 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 6055 // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 6056 // CHECK13: omp.dispatch.body: 6057 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6058 // CHECK13-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 6059 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6060 // CHECK13: omp.inner.for.cond: 6061 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 6062 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21 6063 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 6064 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6065 // CHECK13: omp.inner.for.body: 6066 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 6067 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 6068 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6069 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21 6070 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21 6071 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 6072 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 6073 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21 6074 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6075 // CHECK13: omp.body.continue: 6076 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6077 // CHECK13: omp.inner.for.inc: 6078 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 6079 // CHECK13-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 6080 // CHECK13-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 6081 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]] 6082 // CHECK13: omp.inner.for.end: 6083 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 6084 // CHECK13: omp.dispatch.inc: 6085 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]] 6086 // CHECK13: omp.dispatch.end: 6087 // CHECK13-NEXT: ret void 6088 // 6089 // 6090 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136 6091 // CHECK13-SAME: (i64 noundef [[M:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 6092 // CHECK13-NEXT: entry: 6093 // CHECK13-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 6094 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 6095 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 6096 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 6097 // CHECK13-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 6098 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 6099 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* 6100 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 6101 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 6102 // CHECK13-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 6103 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6104 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 6105 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 6106 // CHECK13-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 6107 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..34 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]]) 6108 // CHECK13-NEXT: ret void 6109 // 6110 // 6111 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..34 6112 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 6113 // CHECK13-NEXT: entry: 6114 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6115 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6116 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 6117 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 6118 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6119 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 6120 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6121 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6122 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6123 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6124 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 6125 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 6126 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6127 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6128 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 6129 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 6130 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 6131 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 6132 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6133 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 6134 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6135 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6136 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6137 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 6138 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6139 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6140 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 6141 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6142 // CHECK13: cond.true: 6143 // CHECK13-NEXT: br label [[COND_END:%.*]] 6144 // CHECK13: cond.false: 6145 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6146 // CHECK13-NEXT: br label [[COND_END]] 6147 // CHECK13: cond.end: 6148 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 6149 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 6150 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6151 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 6152 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6153 // CHECK13: omp.inner.for.cond: 6154 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6155 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6156 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 6157 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6158 // CHECK13: omp.inner.for.body: 6159 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6160 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 6161 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6162 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 6163 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 4 6164 // CHECK13-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 6165 // CHECK13-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4 6166 // CHECK13-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 6167 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..35 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]]) 6168 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6169 // CHECK13: omp.inner.for.inc: 6170 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6171 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6172 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 6173 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 6174 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 6175 // CHECK13: omp.inner.for.end: 6176 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6177 // CHECK13: omp.loop.exit: 6178 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 6179 // CHECK13-NEXT: ret void 6180 // 6181 // 6182 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..35 6183 // CHECK13-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 6184 // CHECK13-NEXT: entry: 6185 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 6186 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 6187 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 6188 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 6189 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 6190 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 6191 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6192 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 6193 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6194 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6195 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6196 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6197 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 6198 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 6199 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 6200 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6201 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6202 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 6203 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 6204 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 6205 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 6206 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6207 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 6208 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 6209 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 6210 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 6211 // CHECK13-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 6212 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4 6213 // CHECK13-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 6214 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6215 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6216 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4 6217 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6218 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6219 // CHECK13-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 6220 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 6221 // CHECK13-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]]) 6222 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 6223 // CHECK13: omp.dispatch.cond: 6224 // CHECK13-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 6225 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0 6226 // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 6227 // CHECK13: omp.dispatch.body: 6228 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6229 // CHECK13-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 6230 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6231 // CHECK13: omp.inner.for.cond: 6232 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 6233 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !24 6234 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 6235 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6236 // CHECK13: omp.inner.for.body: 6237 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 6238 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 6239 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6240 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !24 6241 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !24 6242 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 6243 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 6244 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !24 6245 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6246 // CHECK13: omp.body.continue: 6247 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6248 // CHECK13: omp.inner.for.inc: 6249 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 6250 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1 6251 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 6252 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]] 6253 // CHECK13: omp.inner.for.end: 6254 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 6255 // CHECK13: omp.dispatch.inc: 6256 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]] 6257 // CHECK13: omp.dispatch.end: 6258 // CHECK13-NEXT: ret void 6259 // 6260 // 6261 // CHECK13-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 6262 // CHECK13-SAME: () #[[ATTR6:[0-9]+]] { 6263 // CHECK13-NEXT: entry: 6264 // CHECK13-NEXT: call void @__tgt_register_requires(i64 1) 6265 // CHECK13-NEXT: ret void 6266 // 6267 // 6268 // CHECK15-LABEL: define {{[^@]+}}@main 6269 // CHECK15-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 6270 // CHECK15-NEXT: entry: 6271 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 6272 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 6273 // CHECK15-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 6274 // CHECK15-NEXT: [[N:%.*]] = alloca i32, align 4 6275 // CHECK15-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 6276 // CHECK15-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 6277 // CHECK15-NEXT: [[M:%.*]] = alloca i32, align 4 6278 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 6279 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 6280 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 6281 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 6282 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4 6283 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 6284 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 6285 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 6286 // CHECK15-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4 6287 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4 6288 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4 6289 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4 6290 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4 6291 // CHECK15-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 6292 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 6293 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 6294 // CHECK15-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4 6295 // CHECK15-NEXT: [[N_CASTED17:%.*]] = alloca i32, align 4 6296 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS18:%.*]] = alloca [4 x i8*], align 4 6297 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS19:%.*]] = alloca [4 x i8*], align 4 6298 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS20:%.*]] = alloca [4 x i8*], align 4 6299 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES21:%.*]] = alloca [4 x i64], align 4 6300 // CHECK15-NEXT: [[_TMP22:%.*]] = alloca i32, align 4 6301 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_23:%.*]] = alloca i32, align 4 6302 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4 6303 // CHECK15-NEXT: [[N_CASTED31:%.*]] = alloca i32, align 4 6304 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS32:%.*]] = alloca [3 x i8*], align 4 6305 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS33:%.*]] = alloca [3 x i8*], align 4 6306 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS34:%.*]] = alloca [3 x i8*], align 4 6307 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES35:%.*]] = alloca [3 x i64], align 4 6308 // CHECK15-NEXT: [[_TMP36:%.*]] = alloca i32, align 4 6309 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_37:%.*]] = alloca i32, align 4 6310 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4 6311 // CHECK15-NEXT: [[M_CASTED45:%.*]] = alloca i32, align 4 6312 // CHECK15-NEXT: [[N_CASTED46:%.*]] = alloca i32, align 4 6313 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS47:%.*]] = alloca [4 x i8*], align 4 6314 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS48:%.*]] = alloca [4 x i8*], align 4 6315 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS49:%.*]] = alloca [4 x i8*], align 4 6316 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES50:%.*]] = alloca [4 x i64], align 4 6317 // CHECK15-NEXT: [[_TMP51:%.*]] = alloca i32, align 4 6318 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_52:%.*]] = alloca i32, align 4 6319 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_53:%.*]] = alloca i32, align 4 6320 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4 6321 // CHECK15-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 6322 // CHECK15-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 6323 // CHECK15-NEXT: store i32 100, i32* [[N]], align 4 6324 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 6325 // CHECK15-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 6326 // CHECK15-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 6327 // CHECK15-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 6328 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 6329 // CHECK15-NEXT: store i32 10, i32* [[M]], align 4 6330 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 6331 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 6332 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 6333 // CHECK15-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4 6334 // CHECK15-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64 6335 // CHECK15-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 6336 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes to i8*), i32 24, i1 false) 6337 // CHECK15-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 6338 // CHECK15-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 6339 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4 6340 // CHECK15-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 6341 // CHECK15-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 6342 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 6343 // CHECK15-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 6344 // CHECK15-NEXT: store i8* null, i8** [[TMP11]], align 4 6345 // CHECK15-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 6346 // CHECK15-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 6347 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4 6348 // CHECK15-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 6349 // CHECK15-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 6350 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4 6351 // CHECK15-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 6352 // CHECK15-NEXT: store i8* null, i8** [[TMP16]], align 4 6353 // CHECK15-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 6354 // CHECK15-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 6355 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 4 6356 // CHECK15-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 6357 // CHECK15-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 6358 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 4 6359 // CHECK15-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 6360 // CHECK15-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 4 6361 // CHECK15-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 6362 // CHECK15-NEXT: store i8* null, i8** [[TMP22]], align 4 6363 // CHECK15-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 6364 // CHECK15-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 6365 // CHECK15-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 6366 // CHECK15-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 6367 // CHECK15-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 6368 // CHECK15-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6369 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 6370 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 6371 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 6372 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 6373 // CHECK15-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6374 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 6375 // CHECK15-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 6376 // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP29]]) 6377 // CHECK15-NEXT: [[TMP30:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, i32 3, i8** [[TMP23]], i8** [[TMP24]], i64* [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 6378 // CHECK15-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 6379 // CHECK15-NEXT: br i1 [[TMP31]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 6380 // CHECK15: omp_offload.failed: 6381 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 6382 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT]] 6383 // CHECK15: omp_offload.cont: 6384 // CHECK15-NEXT: [[TMP32:%.*]] = load i32, i32* [[N]], align 4 6385 // CHECK15-NEXT: store i32 [[TMP32]], i32* [[N_CASTED3]], align 4 6386 // CHECK15-NEXT: [[TMP33:%.*]] = load i32, i32* [[N_CASTED3]], align 4 6387 // CHECK15-NEXT: [[TMP34:%.*]] = mul nuw i32 [[TMP0]], 4 6388 // CHECK15-NEXT: [[TMP35:%.*]] = sext i32 [[TMP34]] to i64 6389 // CHECK15-NEXT: [[TMP36:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES7]] to i8* 6390 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP36]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.4 to i8*), i32 24, i1 false) 6391 // CHECK15-NEXT: [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 6392 // CHECK15-NEXT: [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32* 6393 // CHECK15-NEXT: store i32 [[TMP33]], i32* [[TMP38]], align 4 6394 // CHECK15-NEXT: [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 6395 // CHECK15-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32* 6396 // CHECK15-NEXT: store i32 [[TMP33]], i32* [[TMP40]], align 4 6397 // CHECK15-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0 6398 // CHECK15-NEXT: store i8* null, i8** [[TMP41]], align 4 6399 // CHECK15-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 6400 // CHECK15-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i32* 6401 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP43]], align 4 6402 // CHECK15-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 6403 // CHECK15-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i32* 6404 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP45]], align 4 6405 // CHECK15-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1 6406 // CHECK15-NEXT: store i8* null, i8** [[TMP46]], align 4 6407 // CHECK15-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 6408 // CHECK15-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32** 6409 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP48]], align 4 6410 // CHECK15-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 6411 // CHECK15-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32** 6412 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP50]], align 4 6413 // CHECK15-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2 6414 // CHECK15-NEXT: store i64 [[TMP35]], i64* [[TMP51]], align 4 6415 // CHECK15-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2 6416 // CHECK15-NEXT: store i8* null, i8** [[TMP52]], align 4 6417 // CHECK15-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 6418 // CHECK15-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 6419 // CHECK15-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0 6420 // CHECK15-NEXT: [[TMP56:%.*]] = load i32, i32* [[N]], align 4 6421 // CHECK15-NEXT: store i32 [[TMP56]], i32* [[DOTCAPTURE_EXPR_9]], align 4 6422 // CHECK15-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4 6423 // CHECK15-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP57]], 0 6424 // CHECK15-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 6425 // CHECK15-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 6426 // CHECK15-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4 6427 // CHECK15-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 6428 // CHECK15-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP58]], 1 6429 // CHECK15-NEXT: [[TMP59:%.*]] = zext i32 [[ADD14]] to i64 6430 // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP59]]) 6431 // CHECK15-NEXT: [[TMP60:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, i32 3, i8** [[TMP53]], i8** [[TMP54]], i64* [[TMP55]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 6432 // CHECK15-NEXT: [[TMP61:%.*]] = icmp ne i32 [[TMP60]], 0 6433 // CHECK15-NEXT: br i1 [[TMP61]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]] 6434 // CHECK15: omp_offload.failed15: 6435 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i32 [[TMP33]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 6436 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT16]] 6437 // CHECK15: omp_offload.cont16: 6438 // CHECK15-NEXT: [[TMP62:%.*]] = load i32, i32* [[M]], align 4 6439 // CHECK15-NEXT: store i32 [[TMP62]], i32* [[M_CASTED]], align 4 6440 // CHECK15-NEXT: [[TMP63:%.*]] = load i32, i32* [[M_CASTED]], align 4 6441 // CHECK15-NEXT: [[TMP64:%.*]] = load i32, i32* [[N]], align 4 6442 // CHECK15-NEXT: store i32 [[TMP64]], i32* [[N_CASTED17]], align 4 6443 // CHECK15-NEXT: [[TMP65:%.*]] = load i32, i32* [[N_CASTED17]], align 4 6444 // CHECK15-NEXT: [[TMP66:%.*]] = mul nuw i32 [[TMP0]], 4 6445 // CHECK15-NEXT: [[TMP67:%.*]] = sext i32 [[TMP66]] to i64 6446 // CHECK15-NEXT: [[TMP68:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES21]] to i8* 6447 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP68]], i8* align 4 bitcast ([4 x i64]* @.offload_sizes.8 to i8*), i32 32, i1 false) 6448 // CHECK15-NEXT: [[TMP69:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0 6449 // CHECK15-NEXT: [[TMP70:%.*]] = bitcast i8** [[TMP69]] to i32* 6450 // CHECK15-NEXT: store i32 [[TMP63]], i32* [[TMP70]], align 4 6451 // CHECK15-NEXT: [[TMP71:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0 6452 // CHECK15-NEXT: [[TMP72:%.*]] = bitcast i8** [[TMP71]] to i32* 6453 // CHECK15-NEXT: store i32 [[TMP63]], i32* [[TMP72]], align 4 6454 // CHECK15-NEXT: [[TMP73:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 0 6455 // CHECK15-NEXT: store i8* null, i8** [[TMP73]], align 4 6456 // CHECK15-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 1 6457 // CHECK15-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i32* 6458 // CHECK15-NEXT: store i32 [[TMP65]], i32* [[TMP75]], align 4 6459 // CHECK15-NEXT: [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 1 6460 // CHECK15-NEXT: [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i32* 6461 // CHECK15-NEXT: store i32 [[TMP65]], i32* [[TMP77]], align 4 6462 // CHECK15-NEXT: [[TMP78:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 1 6463 // CHECK15-NEXT: store i8* null, i8** [[TMP78]], align 4 6464 // CHECK15-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 2 6465 // CHECK15-NEXT: [[TMP80:%.*]] = bitcast i8** [[TMP79]] to i32* 6466 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP80]], align 4 6467 // CHECK15-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 2 6468 // CHECK15-NEXT: [[TMP82:%.*]] = bitcast i8** [[TMP81]] to i32* 6469 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP82]], align 4 6470 // CHECK15-NEXT: [[TMP83:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 2 6471 // CHECK15-NEXT: store i8* null, i8** [[TMP83]], align 4 6472 // CHECK15-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 3 6473 // CHECK15-NEXT: [[TMP85:%.*]] = bitcast i8** [[TMP84]] to i32** 6474 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP85]], align 4 6475 // CHECK15-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 3 6476 // CHECK15-NEXT: [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i32** 6477 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP87]], align 4 6478 // CHECK15-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 3 6479 // CHECK15-NEXT: store i64 [[TMP67]], i64* [[TMP88]], align 4 6480 // CHECK15-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 3 6481 // CHECK15-NEXT: store i8* null, i8** [[TMP89]], align 4 6482 // CHECK15-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0 6483 // CHECK15-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0 6484 // CHECK15-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0 6485 // CHECK15-NEXT: [[TMP93:%.*]] = load i32, i32* [[N]], align 4 6486 // CHECK15-NEXT: store i32 [[TMP93]], i32* [[DOTCAPTURE_EXPR_23]], align 4 6487 // CHECK15-NEXT: [[TMP94:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_23]], align 4 6488 // CHECK15-NEXT: [[SUB25:%.*]] = sub nsw i32 [[TMP94]], 0 6489 // CHECK15-NEXT: [[DIV26:%.*]] = sdiv i32 [[SUB25]], 1 6490 // CHECK15-NEXT: [[SUB27:%.*]] = sub nsw i32 [[DIV26]], 1 6491 // CHECK15-NEXT: store i32 [[SUB27]], i32* [[DOTCAPTURE_EXPR_24]], align 4 6492 // CHECK15-NEXT: [[TMP95:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4 6493 // CHECK15-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP95]], 1 6494 // CHECK15-NEXT: [[TMP96:%.*]] = zext i32 [[ADD28]] to i64 6495 // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP96]]) 6496 // CHECK15-NEXT: [[TMP97:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, i32 4, i8** [[TMP90]], i8** [[TMP91]], i64* [[TMP92]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 6497 // CHECK15-NEXT: [[TMP98:%.*]] = icmp ne i32 [[TMP97]], 0 6498 // CHECK15-NEXT: br i1 [[TMP98]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]] 6499 // CHECK15: omp_offload.failed29: 6500 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i32 [[TMP63]], i32 [[TMP65]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 6501 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT30]] 6502 // CHECK15: omp_offload.cont30: 6503 // CHECK15-NEXT: [[TMP99:%.*]] = load i32, i32* [[N]], align 4 6504 // CHECK15-NEXT: store i32 [[TMP99]], i32* [[N_CASTED31]], align 4 6505 // CHECK15-NEXT: [[TMP100:%.*]] = load i32, i32* [[N_CASTED31]], align 4 6506 // CHECK15-NEXT: [[TMP101:%.*]] = mul nuw i32 [[TMP0]], 4 6507 // CHECK15-NEXT: [[TMP102:%.*]] = sext i32 [[TMP101]] to i64 6508 // CHECK15-NEXT: [[TMP103:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES35]] to i8* 6509 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP103]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.12 to i8*), i32 24, i1 false) 6510 // CHECK15-NEXT: [[TMP104:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0 6511 // CHECK15-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to i32* 6512 // CHECK15-NEXT: store i32 [[TMP100]], i32* [[TMP105]], align 4 6513 // CHECK15-NEXT: [[TMP106:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0 6514 // CHECK15-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to i32* 6515 // CHECK15-NEXT: store i32 [[TMP100]], i32* [[TMP107]], align 4 6516 // CHECK15-NEXT: [[TMP108:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 0 6517 // CHECK15-NEXT: store i8* null, i8** [[TMP108]], align 4 6518 // CHECK15-NEXT: [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 1 6519 // CHECK15-NEXT: [[TMP110:%.*]] = bitcast i8** [[TMP109]] to i32* 6520 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP110]], align 4 6521 // CHECK15-NEXT: [[TMP111:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 1 6522 // CHECK15-NEXT: [[TMP112:%.*]] = bitcast i8** [[TMP111]] to i32* 6523 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP112]], align 4 6524 // CHECK15-NEXT: [[TMP113:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 1 6525 // CHECK15-NEXT: store i8* null, i8** [[TMP113]], align 4 6526 // CHECK15-NEXT: [[TMP114:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 2 6527 // CHECK15-NEXT: [[TMP115:%.*]] = bitcast i8** [[TMP114]] to i32** 6528 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP115]], align 4 6529 // CHECK15-NEXT: [[TMP116:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 2 6530 // CHECK15-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to i32** 6531 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP117]], align 4 6532 // CHECK15-NEXT: [[TMP118:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 2 6533 // CHECK15-NEXT: store i64 [[TMP102]], i64* [[TMP118]], align 4 6534 // CHECK15-NEXT: [[TMP119:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 2 6535 // CHECK15-NEXT: store i8* null, i8** [[TMP119]], align 4 6536 // CHECK15-NEXT: [[TMP120:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0 6537 // CHECK15-NEXT: [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0 6538 // CHECK15-NEXT: [[TMP122:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 0 6539 // CHECK15-NEXT: [[TMP123:%.*]] = load i32, i32* [[N]], align 4 6540 // CHECK15-NEXT: store i32 [[TMP123]], i32* [[DOTCAPTURE_EXPR_37]], align 4 6541 // CHECK15-NEXT: [[TMP124:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_37]], align 4 6542 // CHECK15-NEXT: [[SUB39:%.*]] = sub nsw i32 [[TMP124]], 0 6543 // CHECK15-NEXT: [[DIV40:%.*]] = sdiv i32 [[SUB39]], 1 6544 // CHECK15-NEXT: [[SUB41:%.*]] = sub nsw i32 [[DIV40]], 1 6545 // CHECK15-NEXT: store i32 [[SUB41]], i32* [[DOTCAPTURE_EXPR_38]], align 4 6546 // CHECK15-NEXT: [[TMP125:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_38]], align 4 6547 // CHECK15-NEXT: [[ADD42:%.*]] = add nsw i32 [[TMP125]], 1 6548 // CHECK15-NEXT: [[TMP126:%.*]] = zext i32 [[ADD42]] to i64 6549 // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP126]]) 6550 // CHECK15-NEXT: [[TMP127:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, i32 3, i8** [[TMP120]], i8** [[TMP121]], i64* [[TMP122]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 6551 // CHECK15-NEXT: [[TMP128:%.*]] = icmp ne i32 [[TMP127]], 0 6552 // CHECK15-NEXT: br i1 [[TMP128]], label [[OMP_OFFLOAD_FAILED43:%.*]], label [[OMP_OFFLOAD_CONT44:%.*]] 6553 // CHECK15: omp_offload.failed43: 6554 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i32 [[TMP100]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 6555 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT44]] 6556 // CHECK15: omp_offload.cont44: 6557 // CHECK15-NEXT: [[TMP129:%.*]] = load i32, i32* [[M]], align 4 6558 // CHECK15-NEXT: store i32 [[TMP129]], i32* [[M_CASTED45]], align 4 6559 // CHECK15-NEXT: [[TMP130:%.*]] = load i32, i32* [[M_CASTED45]], align 4 6560 // CHECK15-NEXT: [[TMP131:%.*]] = load i32, i32* [[N]], align 4 6561 // CHECK15-NEXT: store i32 [[TMP131]], i32* [[N_CASTED46]], align 4 6562 // CHECK15-NEXT: [[TMP132:%.*]] = load i32, i32* [[N_CASTED46]], align 4 6563 // CHECK15-NEXT: [[TMP133:%.*]] = mul nuw i32 [[TMP0]], 4 6564 // CHECK15-NEXT: [[TMP134:%.*]] = sext i32 [[TMP133]] to i64 6565 // CHECK15-NEXT: [[TMP135:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES50]] to i8* 6566 // CHECK15-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP135]], i8* align 4 bitcast ([4 x i64]* @.offload_sizes.16 to i8*), i32 32, i1 false) 6567 // CHECK15-NEXT: [[TMP136:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0 6568 // CHECK15-NEXT: [[TMP137:%.*]] = bitcast i8** [[TMP136]] to i32* 6569 // CHECK15-NEXT: store i32 [[TMP130]], i32* [[TMP137]], align 4 6570 // CHECK15-NEXT: [[TMP138:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0 6571 // CHECK15-NEXT: [[TMP139:%.*]] = bitcast i8** [[TMP138]] to i32* 6572 // CHECK15-NEXT: store i32 [[TMP130]], i32* [[TMP139]], align 4 6573 // CHECK15-NEXT: [[TMP140:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 0 6574 // CHECK15-NEXT: store i8* null, i8** [[TMP140]], align 4 6575 // CHECK15-NEXT: [[TMP141:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 1 6576 // CHECK15-NEXT: [[TMP142:%.*]] = bitcast i8** [[TMP141]] to i32* 6577 // CHECK15-NEXT: store i32 [[TMP132]], i32* [[TMP142]], align 4 6578 // CHECK15-NEXT: [[TMP143:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 1 6579 // CHECK15-NEXT: [[TMP144:%.*]] = bitcast i8** [[TMP143]] to i32* 6580 // CHECK15-NEXT: store i32 [[TMP132]], i32* [[TMP144]], align 4 6581 // CHECK15-NEXT: [[TMP145:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 1 6582 // CHECK15-NEXT: store i8* null, i8** [[TMP145]], align 4 6583 // CHECK15-NEXT: [[TMP146:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 2 6584 // CHECK15-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i32* 6585 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP147]], align 4 6586 // CHECK15-NEXT: [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 2 6587 // CHECK15-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i32* 6588 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP149]], align 4 6589 // CHECK15-NEXT: [[TMP150:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 2 6590 // CHECK15-NEXT: store i8* null, i8** [[TMP150]], align 4 6591 // CHECK15-NEXT: [[TMP151:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 3 6592 // CHECK15-NEXT: [[TMP152:%.*]] = bitcast i8** [[TMP151]] to i32** 6593 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP152]], align 4 6594 // CHECK15-NEXT: [[TMP153:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 3 6595 // CHECK15-NEXT: [[TMP154:%.*]] = bitcast i8** [[TMP153]] to i32** 6596 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP154]], align 4 6597 // CHECK15-NEXT: [[TMP155:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 3 6598 // CHECK15-NEXT: store i64 [[TMP134]], i64* [[TMP155]], align 4 6599 // CHECK15-NEXT: [[TMP156:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 3 6600 // CHECK15-NEXT: store i8* null, i8** [[TMP156]], align 4 6601 // CHECK15-NEXT: [[TMP157:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0 6602 // CHECK15-NEXT: [[TMP158:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0 6603 // CHECK15-NEXT: [[TMP159:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 0 6604 // CHECK15-NEXT: [[TMP160:%.*]] = load i32, i32* [[N]], align 4 6605 // CHECK15-NEXT: store i32 [[TMP160]], i32* [[DOTCAPTURE_EXPR_52]], align 4 6606 // CHECK15-NEXT: [[TMP161:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_52]], align 4 6607 // CHECK15-NEXT: [[SUB54:%.*]] = sub nsw i32 [[TMP161]], 0 6608 // CHECK15-NEXT: [[DIV55:%.*]] = sdiv i32 [[SUB54]], 1 6609 // CHECK15-NEXT: [[SUB56:%.*]] = sub nsw i32 [[DIV55]], 1 6610 // CHECK15-NEXT: store i32 [[SUB56]], i32* [[DOTCAPTURE_EXPR_53]], align 4 6611 // CHECK15-NEXT: [[TMP162:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_53]], align 4 6612 // CHECK15-NEXT: [[ADD57:%.*]] = add nsw i32 [[TMP162]], 1 6613 // CHECK15-NEXT: [[TMP163:%.*]] = zext i32 [[ADD57]] to i64 6614 // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP163]]) 6615 // CHECK15-NEXT: [[TMP164:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, i32 4, i8** [[TMP157]], i8** [[TMP158]], i64* [[TMP159]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 6616 // CHECK15-NEXT: [[TMP165:%.*]] = icmp ne i32 [[TMP164]], 0 6617 // CHECK15-NEXT: br i1 [[TMP165]], label [[OMP_OFFLOAD_FAILED58:%.*]], label [[OMP_OFFLOAD_CONT59:%.*]] 6618 // CHECK15: omp_offload.failed58: 6619 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i32 [[TMP130]], i32 [[TMP132]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 6620 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT59]] 6621 // CHECK15: omp_offload.cont59: 6622 // CHECK15-NEXT: [[TMP166:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 6623 // CHECK15-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP166]]) 6624 // CHECK15-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 6625 // CHECK15-NEXT: [[TMP167:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 6626 // CHECK15-NEXT: call void @llvm.stackrestore(i8* [[TMP167]]) 6627 // CHECK15-NEXT: [[TMP168:%.*]] = load i32, i32* [[RETVAL]], align 4 6628 // CHECK15-NEXT: ret i32 [[TMP168]] 6629 // 6630 // 6631 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148 6632 // CHECK15-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 6633 // CHECK15-NEXT: entry: 6634 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 6635 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 6636 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 6637 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 6638 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 6639 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 6640 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 6641 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 6642 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 6643 // CHECK15-NEXT: ret void 6644 // 6645 // 6646 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined. 6647 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 6648 // CHECK15-NEXT: entry: 6649 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6650 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6651 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 6652 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 6653 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 6654 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6655 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 6656 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 6657 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 6658 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 6659 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6660 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6661 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6662 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6663 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 6664 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6665 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6666 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 6667 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 6668 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 6669 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 6670 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 6671 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 6672 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 6673 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 6674 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6675 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 6676 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 6677 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 6678 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 6679 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 6680 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6681 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 6682 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 6683 // CHECK15: omp.precond.then: 6684 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6685 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6686 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 6687 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6688 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6689 // CHECK15-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6690 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 6691 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6692 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6693 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6694 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 6695 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6696 // CHECK15: cond.true: 6697 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6698 // CHECK15-NEXT: br label [[COND_END:%.*]] 6699 // CHECK15: cond.false: 6700 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6701 // CHECK15-NEXT: br label [[COND_END]] 6702 // CHECK15: cond.end: 6703 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 6704 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 6705 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6706 // CHECK15-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 6707 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6708 // CHECK15: omp.inner.for.cond: 6709 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6710 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6711 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 6712 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6713 // CHECK15: omp.inner.for.body: 6714 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6715 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6716 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 6717 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6718 // CHECK15: omp.inner.for.inc: 6719 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6720 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6721 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 6722 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 6723 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 6724 // CHECK15: omp.inner.for.end: 6725 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6726 // CHECK15: omp.loop.exit: 6727 // CHECK15-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6728 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 6729 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 6730 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 6731 // CHECK15: omp.precond.end: 6732 // CHECK15-NEXT: ret void 6733 // 6734 // 6735 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..1 6736 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 6737 // CHECK15-NEXT: entry: 6738 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6739 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6740 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 6741 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 6742 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 6743 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 6744 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 6745 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6746 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 6747 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 6748 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 6749 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 6750 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6751 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6752 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6753 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6754 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 6755 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6756 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6757 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6758 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6759 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 6760 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 6761 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 6762 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 6763 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 6764 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 6765 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 6766 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 6767 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6768 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 6769 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 6770 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 6771 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 6772 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 6773 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6774 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 6775 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 6776 // CHECK15: omp.precond.then: 6777 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6778 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6779 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 6780 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6781 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6782 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 6783 // CHECK15-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 6784 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6785 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6786 // CHECK15-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6787 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 6788 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6789 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6790 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6791 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 6792 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6793 // CHECK15: cond.true: 6794 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6795 // CHECK15-NEXT: br label [[COND_END:%.*]] 6796 // CHECK15: cond.false: 6797 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6798 // CHECK15-NEXT: br label [[COND_END]] 6799 // CHECK15: cond.end: 6800 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 6801 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 6802 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6803 // CHECK15-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 6804 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6805 // CHECK15: omp.inner.for.cond: 6806 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6807 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6808 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 6809 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6810 // CHECK15: omp.inner.for.body: 6811 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6812 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 6813 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6814 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 6815 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4 6816 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]] 6817 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 6818 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6819 // CHECK15: omp.body.continue: 6820 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6821 // CHECK15: omp.inner.for.inc: 6822 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6823 // CHECK15-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1 6824 // CHECK15-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 6825 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 6826 // CHECK15: omp.inner.for.end: 6827 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6828 // CHECK15: omp.loop.exit: 6829 // CHECK15-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6830 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 6831 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 6832 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 6833 // CHECK15: omp.precond.end: 6834 // CHECK15-NEXT: ret void 6835 // 6836 // 6837 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153 6838 // CHECK15-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 6839 // CHECK15-NEXT: entry: 6840 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 6841 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 6842 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 6843 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 6844 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 6845 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 6846 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 6847 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 6848 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 6849 // CHECK15-NEXT: ret void 6850 // 6851 // 6852 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..2 6853 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 6854 // CHECK15-NEXT: entry: 6855 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6856 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6857 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 6858 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 6859 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 6860 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6861 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 6862 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 6863 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 6864 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 6865 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6866 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6867 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6868 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6869 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 6870 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6871 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6872 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 6873 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 6874 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 6875 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 6876 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 6877 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 6878 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 6879 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 6880 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6881 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 6882 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 6883 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 6884 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 6885 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 6886 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6887 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 6888 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 6889 // CHECK15: omp.precond.then: 6890 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6891 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6892 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 6893 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6894 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6895 // CHECK15-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6896 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 6897 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6898 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6899 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6900 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 6901 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6902 // CHECK15: cond.true: 6903 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6904 // CHECK15-NEXT: br label [[COND_END:%.*]] 6905 // CHECK15: cond.false: 6906 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6907 // CHECK15-NEXT: br label [[COND_END]] 6908 // CHECK15: cond.end: 6909 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 6910 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 6911 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6912 // CHECK15-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 6913 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6914 // CHECK15: omp.inner.for.cond: 6915 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6916 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6917 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 6918 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6919 // CHECK15: omp.inner.for.body: 6920 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6921 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6922 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 6923 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6924 // CHECK15: omp.inner.for.inc: 6925 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6926 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6927 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 6928 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 6929 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 6930 // CHECK15: omp.inner.for.end: 6931 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6932 // CHECK15: omp.loop.exit: 6933 // CHECK15-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6934 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 6935 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 6936 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 6937 // CHECK15: omp.precond.end: 6938 // CHECK15-NEXT: ret void 6939 // 6940 // 6941 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..3 6942 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 6943 // CHECK15-NEXT: entry: 6944 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6945 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6946 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 6947 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 6948 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 6949 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 6950 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 6951 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6952 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 6953 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 6954 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 6955 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 6956 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6957 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6958 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6959 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6960 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 6961 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6962 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6963 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6964 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6965 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 6966 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 6967 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 6968 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 6969 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 6970 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 6971 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 6972 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 6973 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6974 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 6975 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 6976 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 6977 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 6978 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 6979 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 6980 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 6981 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 6982 // CHECK15: omp.precond.then: 6983 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6984 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6985 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 6986 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6987 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6988 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 6989 // CHECK15-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 6990 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6991 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6992 // CHECK15-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6993 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 6994 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6995 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6996 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 6997 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 6998 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6999 // CHECK15: cond.true: 7000 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7001 // CHECK15-NEXT: br label [[COND_END:%.*]] 7002 // CHECK15: cond.false: 7003 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7004 // CHECK15-NEXT: br label [[COND_END]] 7005 // CHECK15: cond.end: 7006 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 7007 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 7008 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7009 // CHECK15-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 7010 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7011 // CHECK15: omp.inner.for.cond: 7012 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7013 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7014 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 7015 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7016 // CHECK15: omp.inner.for.body: 7017 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7018 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 7019 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7020 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 7021 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4 7022 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]] 7023 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 7024 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7025 // CHECK15: omp.body.continue: 7026 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7027 // CHECK15: omp.inner.for.inc: 7028 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7029 // CHECK15-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1 7030 // CHECK15-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 7031 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 7032 // CHECK15: omp.inner.for.end: 7033 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7034 // CHECK15: omp.loop.exit: 7035 // CHECK15-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 7036 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 7037 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 7038 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 7039 // CHECK15: omp.precond.end: 7040 // CHECK15-NEXT: ret void 7041 // 7042 // 7043 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158 7044 // CHECK15-SAME: (i32 noundef [[M:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 7045 // CHECK15-NEXT: entry: 7046 // CHECK15-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 7047 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 7048 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 7049 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 7050 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 7051 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 7052 // CHECK15-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 7053 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 7054 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 7055 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 7056 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 7057 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 7058 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4 7059 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 7060 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7061 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 7062 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 7063 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]]) 7064 // CHECK15-NEXT: ret void 7065 // 7066 // 7067 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..6 7068 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 7069 // CHECK15-NEXT: entry: 7070 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 7071 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 7072 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 7073 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 7074 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 7075 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 7076 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7077 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 7078 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 7079 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 7080 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 7081 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7082 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7083 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7084 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7085 // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4 7086 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 7087 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 7088 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 7089 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 7090 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 7091 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 7092 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 7093 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 7094 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 7095 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 7096 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 7097 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 7098 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7099 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 7100 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 7101 // CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 7102 // CHECK15-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 7103 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 7104 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7105 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 7106 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 7107 // CHECK15: omp.precond.then: 7108 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 7109 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 7110 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 7111 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7112 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7113 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 7114 // CHECK15-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 7115 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 7116 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]]) 7117 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7118 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 7119 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 7120 // CHECK15-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7121 // CHECK15: cond.true: 7122 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 7123 // CHECK15-NEXT: br label [[COND_END:%.*]] 7124 // CHECK15: cond.false: 7125 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7126 // CHECK15-NEXT: br label [[COND_END]] 7127 // CHECK15: cond.end: 7128 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 7129 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 7130 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7131 // CHECK15-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 7132 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7133 // CHECK15: omp.inner.for.cond: 7134 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7135 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 7136 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1 7137 // CHECK15-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]] 7138 // CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7139 // CHECK15: omp.inner.for.body: 7140 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7141 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7142 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 7143 // CHECK15-NEXT: store i32 [[TMP19]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 7144 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 7145 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP20]]) 7146 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7147 // CHECK15: omp.inner.for.inc: 7148 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7149 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7150 // CHECK15-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 7151 // CHECK15-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 7152 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7153 // CHECK15-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7154 // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 7155 // CHECK15-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4 7156 // CHECK15-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7157 // CHECK15-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7158 // CHECK15-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 7159 // CHECK15-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4 7160 // CHECK15-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7161 // CHECK15-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 7162 // CHECK15-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP27]], [[TMP28]] 7163 // CHECK15-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]] 7164 // CHECK15: cond.true11: 7165 // CHECK15-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 7166 // CHECK15-NEXT: br label [[COND_END13:%.*]] 7167 // CHECK15: cond.false12: 7168 // CHECK15-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7169 // CHECK15-NEXT: br label [[COND_END13]] 7170 // CHECK15: cond.end13: 7171 // CHECK15-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP29]], [[COND_TRUE11]] ], [ [[TMP30]], [[COND_FALSE12]] ] 7172 // CHECK15-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4 7173 // CHECK15-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7174 // CHECK15-NEXT: store i32 [[TMP31]], i32* [[DOTOMP_IV]], align 4 7175 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 7176 // CHECK15: omp.inner.for.end: 7177 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7178 // CHECK15: omp.loop.exit: 7179 // CHECK15-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 7180 // CHECK15-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4 7181 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]]) 7182 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 7183 // CHECK15: omp.precond.end: 7184 // CHECK15-NEXT: ret void 7185 // 7186 // 7187 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..7 7188 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 7189 // CHECK15-NEXT: entry: 7190 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 7191 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 7192 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 7193 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 7194 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 7195 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 7196 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 7197 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 7198 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7199 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 7200 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 7201 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 7202 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 7203 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7204 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7205 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7206 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7207 // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4 7208 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 7209 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 7210 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 7211 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 7212 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 7213 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 7214 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 7215 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 7216 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 7217 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 7218 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 7219 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 7220 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 7221 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7222 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 7223 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 7224 // CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 7225 // CHECK15-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 7226 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 7227 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7228 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 7229 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 7230 // CHECK15: omp.precond.then: 7231 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7232 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 7233 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 7234 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 7235 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 7236 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 7237 // CHECK15-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 7238 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7239 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7240 // CHECK15-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 7241 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 7242 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7243 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7244 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 7245 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 7246 // CHECK15-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7247 // CHECK15: cond.true: 7248 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 7249 // CHECK15-NEXT: br label [[COND_END:%.*]] 7250 // CHECK15: cond.false: 7251 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7252 // CHECK15-NEXT: br label [[COND_END]] 7253 // CHECK15: cond.end: 7254 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 7255 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 7256 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7257 // CHECK15-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 7258 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7259 // CHECK15: omp.inner.for.cond: 7260 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7261 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7262 // CHECK15-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 7263 // CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7264 // CHECK15: omp.inner.for.body: 7265 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7266 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 7267 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7268 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 7269 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4 7270 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]] 7271 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 7272 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7273 // CHECK15: omp.body.continue: 7274 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7275 // CHECK15: omp.inner.for.inc: 7276 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7277 // CHECK15-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 7278 // CHECK15-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 7279 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 7280 // CHECK15: omp.inner.for.end: 7281 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7282 // CHECK15: omp.loop.exit: 7283 // CHECK15-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 7284 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 7285 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 7286 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 7287 // CHECK15: omp.precond.end: 7288 // CHECK15-NEXT: ret void 7289 // 7290 // 7291 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163 7292 // CHECK15-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 7293 // CHECK15-NEXT: entry: 7294 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 7295 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 7296 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 7297 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 7298 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 7299 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 7300 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 7301 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 7302 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 7303 // CHECK15-NEXT: ret void 7304 // 7305 // 7306 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..10 7307 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 7308 // CHECK15-NEXT: entry: 7309 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 7310 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 7311 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 7312 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 7313 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 7314 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7315 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 7316 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 7317 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 7318 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 7319 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7320 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7321 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7322 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7323 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 7324 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 7325 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 7326 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 7327 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 7328 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 7329 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 7330 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 7331 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 7332 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 7333 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 7334 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7335 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 7336 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 7337 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 7338 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 7339 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 7340 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7341 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 7342 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 7343 // CHECK15: omp.precond.then: 7344 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 7345 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7346 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 7347 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7348 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7349 // CHECK15-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 7350 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 7351 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7352 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7353 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7354 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 7355 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7356 // CHECK15: cond.true: 7357 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7358 // CHECK15-NEXT: br label [[COND_END:%.*]] 7359 // CHECK15: cond.false: 7360 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7361 // CHECK15-NEXT: br label [[COND_END]] 7362 // CHECK15: cond.end: 7363 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 7364 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 7365 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7366 // CHECK15-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 7367 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7368 // CHECK15: omp.inner.for.cond: 7369 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7370 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7371 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 7372 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7373 // CHECK15: omp.inner.for.body: 7374 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7375 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7376 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 7377 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7378 // CHECK15: omp.inner.for.inc: 7379 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7380 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7381 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 7382 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 7383 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 7384 // CHECK15: omp.inner.for.end: 7385 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7386 // CHECK15: omp.loop.exit: 7387 // CHECK15-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 7388 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 7389 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 7390 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 7391 // CHECK15: omp.precond.end: 7392 // CHECK15-NEXT: ret void 7393 // 7394 // 7395 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..11 7396 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 7397 // CHECK15-NEXT: entry: 7398 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 7399 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 7400 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 7401 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 7402 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 7403 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 7404 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 7405 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7406 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 7407 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 7408 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 7409 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 7410 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7411 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7412 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7413 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7414 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 7415 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 7416 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 7417 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 7418 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 7419 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 7420 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 7421 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 7422 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 7423 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 7424 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 7425 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 7426 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 7427 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7428 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 7429 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 7430 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 7431 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 7432 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 7433 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7434 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 7435 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 7436 // CHECK15: omp.precond.then: 7437 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7438 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7439 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 7440 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 7441 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 7442 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 7443 // CHECK15-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 7444 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7445 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7446 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7447 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7448 // CHECK15-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 7449 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 7450 // CHECK15-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1) 7451 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 7452 // CHECK15: omp.dispatch.cond: 7453 // CHECK15-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 7454 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 7455 // CHECK15-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 7456 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 7457 // CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 7458 // CHECK15: omp.dispatch.body: 7459 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7460 // CHECK15-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 7461 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7462 // CHECK15: omp.inner.for.cond: 7463 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 7464 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16 7465 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 7466 // CHECK15-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7467 // CHECK15: omp.inner.for.body: 7468 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 7469 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 7470 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7471 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !16 7472 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !16 7473 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP20]] 7474 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !16 7475 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7476 // CHECK15: omp.body.continue: 7477 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7478 // CHECK15: omp.inner.for.inc: 7479 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 7480 // CHECK15-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP21]], 1 7481 // CHECK15-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 7482 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]] 7483 // CHECK15: omp.inner.for.end: 7484 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 7485 // CHECK15: omp.dispatch.inc: 7486 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]] 7487 // CHECK15: omp.dispatch.end: 7488 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 7489 // CHECK15: omp.precond.end: 7490 // CHECK15-NEXT: ret void 7491 // 7492 // 7493 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168 7494 // CHECK15-SAME: (i32 noundef [[M:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 7495 // CHECK15-NEXT: entry: 7496 // CHECK15-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 7497 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 7498 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 7499 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 7500 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 7501 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 7502 // CHECK15-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 7503 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 7504 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 7505 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 7506 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 7507 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 7508 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4 7509 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 7510 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7511 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 7512 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 7513 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]]) 7514 // CHECK15-NEXT: ret void 7515 // 7516 // 7517 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..14 7518 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 7519 // CHECK15-NEXT: entry: 7520 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 7521 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 7522 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 7523 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 7524 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 7525 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 7526 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7527 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 7528 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 7529 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 7530 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 7531 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7532 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7533 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7534 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7535 // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4 7536 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 7537 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 7538 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 7539 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 7540 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 7541 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 7542 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 7543 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 7544 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 7545 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 7546 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 7547 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 7548 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7549 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 7550 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 7551 // CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 7552 // CHECK15-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 7553 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 7554 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7555 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 7556 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 7557 // CHECK15: omp.precond.then: 7558 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 7559 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 7560 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 7561 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7562 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7563 // CHECK15-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 7564 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 7565 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7566 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7567 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 7568 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 7569 // CHECK15-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7570 // CHECK15: cond.true: 7571 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 7572 // CHECK15-NEXT: br label [[COND_END:%.*]] 7573 // CHECK15: cond.false: 7574 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7575 // CHECK15-NEXT: br label [[COND_END]] 7576 // CHECK15: cond.end: 7577 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 7578 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 7579 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7580 // CHECK15-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 7581 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7582 // CHECK15: omp.inner.for.cond: 7583 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7584 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7585 // CHECK15-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 7586 // CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7587 // CHECK15: omp.inner.for.body: 7588 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7589 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7590 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 7591 // CHECK15-NEXT: store i32 [[TMP18]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 7592 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 7593 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP19]]) 7594 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7595 // CHECK15: omp.inner.for.inc: 7596 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7597 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7598 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 7599 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 7600 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 7601 // CHECK15: omp.inner.for.end: 7602 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7603 // CHECK15: omp.loop.exit: 7604 // CHECK15-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 7605 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 7606 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 7607 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 7608 // CHECK15: omp.precond.end: 7609 // CHECK15-NEXT: ret void 7610 // 7611 // 7612 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..15 7613 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 7614 // CHECK15-NEXT: entry: 7615 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 7616 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 7617 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 7618 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 7619 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 7620 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 7621 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 7622 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 7623 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7624 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 7625 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 7626 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 7627 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 7628 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7629 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7630 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7631 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7632 // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4 7633 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 7634 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 7635 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 7636 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 7637 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 7638 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 7639 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 7640 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 7641 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 7642 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 7643 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 7644 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 7645 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 7646 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7647 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 7648 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 7649 // CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 7650 // CHECK15-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 7651 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 7652 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7653 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 7654 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 7655 // CHECK15: omp.precond.then: 7656 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7657 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 7658 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 7659 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 7660 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 7661 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 7662 // CHECK15-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 7663 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7664 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7665 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 7666 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7667 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7668 // CHECK15-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 7669 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 7670 // CHECK15-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 1073741859, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]]) 7671 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 7672 // CHECK15: omp.dispatch.cond: 7673 // CHECK15-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 7674 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 7675 // CHECK15-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 7676 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 7677 // CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 7678 // CHECK15: omp.dispatch.body: 7679 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7680 // CHECK15-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 7681 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7682 // CHECK15: omp.inner.for.cond: 7683 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 7684 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !19 7685 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 7686 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7687 // CHECK15: omp.inner.for.body: 7688 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 7689 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 7690 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7691 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !19 7692 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !19 7693 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP21]] 7694 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !19 7695 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7696 // CHECK15: omp.body.continue: 7697 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7698 // CHECK15: omp.inner.for.inc: 7699 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 7700 // CHECK15-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP22]], 1 7701 // CHECK15-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 7702 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]] 7703 // CHECK15: omp.inner.for.end: 7704 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 7705 // CHECK15: omp.dispatch.inc: 7706 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]] 7707 // CHECK15: omp.dispatch.end: 7708 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 7709 // CHECK15: omp.precond.end: 7710 // CHECK15-NEXT: ret void 7711 // 7712 // 7713 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 7714 // CHECK15-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 7715 // CHECK15-NEXT: entry: 7716 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 7717 // CHECK15-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 7718 // CHECK15-NEXT: [[M:%.*]] = alloca i32, align 4 7719 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 7720 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 7721 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 7722 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 7723 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4 7724 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4 7725 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4 7726 // CHECK15-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 7727 // CHECK15-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4 7728 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 4 7729 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 4 7730 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 4 7731 // CHECK15-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 7732 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 4 7733 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 4 7734 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 4 7735 // CHECK15-NEXT: [[_TMP16:%.*]] = alloca i32, align 4 7736 // CHECK15-NEXT: [[M_CASTED19:%.*]] = alloca i32, align 4 7737 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [2 x i8*], align 4 7738 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [2 x i8*], align 4 7739 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [2 x i8*], align 4 7740 // CHECK15-NEXT: [[_TMP23:%.*]] = alloca i32, align 4 7741 // CHECK15-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 7742 // CHECK15-NEXT: store i32 10, i32* [[M]], align 4 7743 // CHECK15-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 7744 // CHECK15-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 7745 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4 7746 // CHECK15-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 7747 // CHECK15-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 7748 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4 7749 // CHECK15-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 7750 // CHECK15-NEXT: store i8* null, i8** [[TMP4]], align 4 7751 // CHECK15-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 7752 // CHECK15-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 7753 // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 7754 // CHECK15-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.20, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.21, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 7755 // CHECK15-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 7756 // CHECK15-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 7757 // CHECK15: omp_offload.failed: 7758 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]] 7759 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT]] 7760 // CHECK15: omp_offload.cont: 7761 // CHECK15-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 7762 // CHECK15-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** 7763 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4 7764 // CHECK15-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 7765 // CHECK15-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** 7766 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4 7767 // CHECK15-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0 7768 // CHECK15-NEXT: store i8* null, i8** [[TMP13]], align 4 7769 // CHECK15-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 7770 // CHECK15-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 7771 // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 7772 // CHECK15-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.24, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.25, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 7773 // CHECK15-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 7774 // CHECK15-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 7775 // CHECK15: omp_offload.failed5: 7776 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121([10 x i32]* [[A]]) #[[ATTR3]] 7777 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT6]] 7778 // CHECK15: omp_offload.cont6: 7779 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[M]], align 4 7780 // CHECK15-NEXT: store i32 [[TMP18]], i32* [[M_CASTED]], align 4 7781 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[M_CASTED]], align 4 7782 // CHECK15-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 7783 // CHECK15-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32* 7784 // CHECK15-NEXT: store i32 [[TMP19]], i32* [[TMP21]], align 4 7785 // CHECK15-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 7786 // CHECK15-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32* 7787 // CHECK15-NEXT: store i32 [[TMP19]], i32* [[TMP23]], align 4 7788 // CHECK15-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0 7789 // CHECK15-NEXT: store i8* null, i8** [[TMP24]], align 4 7790 // CHECK15-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1 7791 // CHECK15-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]** 7792 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 4 7793 // CHECK15-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1 7794 // CHECK15-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]** 7795 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 4 7796 // CHECK15-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 1 7797 // CHECK15-NEXT: store i8* null, i8** [[TMP29]], align 4 7798 // CHECK15-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 7799 // CHECK15-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 7800 // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 7801 // CHECK15-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.28, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.29, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 7802 // CHECK15-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 7803 // CHECK15-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] 7804 // CHECK15: omp_offload.failed11: 7805 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i32 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]] 7806 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT12]] 7807 // CHECK15: omp_offload.cont12: 7808 // CHECK15-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 7809 // CHECK15-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]** 7810 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 4 7811 // CHECK15-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 7812 // CHECK15-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]** 7813 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 4 7814 // CHECK15-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 0 7815 // CHECK15-NEXT: store i8* null, i8** [[TMP38]], align 4 7816 // CHECK15-NEXT: [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 7817 // CHECK15-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 7818 // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 7819 // CHECK15-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.32, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.33, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 7820 // CHECK15-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0 7821 // CHECK15-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]] 7822 // CHECK15: omp_offload.failed17: 7823 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131([10 x i32]* [[A]]) #[[ATTR3]] 7824 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT18]] 7825 // CHECK15: omp_offload.cont18: 7826 // CHECK15-NEXT: [[TMP43:%.*]] = load i32, i32* [[M]], align 4 7827 // CHECK15-NEXT: store i32 [[TMP43]], i32* [[M_CASTED19]], align 4 7828 // CHECK15-NEXT: [[TMP44:%.*]] = load i32, i32* [[M_CASTED19]], align 4 7829 // CHECK15-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 7830 // CHECK15-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32* 7831 // CHECK15-NEXT: store i32 [[TMP44]], i32* [[TMP46]], align 4 7832 // CHECK15-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 7833 // CHECK15-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32* 7834 // CHECK15-NEXT: store i32 [[TMP44]], i32* [[TMP48]], align 4 7835 // CHECK15-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 0 7836 // CHECK15-NEXT: store i8* null, i8** [[TMP49]], align 4 7837 // CHECK15-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1 7838 // CHECK15-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]** 7839 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 4 7840 // CHECK15-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 1 7841 // CHECK15-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]** 7842 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 4 7843 // CHECK15-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 1 7844 // CHECK15-NEXT: store i8* null, i8** [[TMP54]], align 4 7845 // CHECK15-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 7846 // CHECK15-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 7847 // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 7848 // CHECK15-NEXT: [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.36, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.37, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 7849 // CHECK15-NEXT: [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0 7850 // CHECK15-NEXT: br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]] 7851 // CHECK15: omp_offload.failed24: 7852 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i32 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]] 7853 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT25]] 7854 // CHECK15: omp_offload.cont25: 7855 // CHECK15-NEXT: ret i32 0 7856 // 7857 // 7858 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116 7859 // CHECK15-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 7860 // CHECK15-NEXT: entry: 7861 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 7862 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 7863 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 7864 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 7865 // CHECK15-NEXT: ret void 7866 // 7867 // 7868 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..18 7869 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 7870 // CHECK15-NEXT: entry: 7871 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 7872 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 7873 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 7874 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7875 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 7876 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7877 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7878 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7879 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7880 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 7881 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 7882 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 7883 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 7884 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 7885 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 7886 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 7887 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7888 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7889 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 7890 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 7891 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7892 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7893 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 7894 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7895 // CHECK15: cond.true: 7896 // CHECK15-NEXT: br label [[COND_END:%.*]] 7897 // CHECK15: cond.false: 7898 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7899 // CHECK15-NEXT: br label [[COND_END]] 7900 // CHECK15: cond.end: 7901 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 7902 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 7903 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7904 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 7905 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7906 // CHECK15: omp.inner.for.cond: 7907 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7908 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7909 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 7910 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7911 // CHECK15: omp.inner.for.body: 7912 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7913 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7914 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..19 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]) 7915 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7916 // CHECK15: omp.inner.for.inc: 7917 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7918 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7919 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 7920 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 7921 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 7922 // CHECK15: omp.inner.for.end: 7923 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7924 // CHECK15: omp.loop.exit: 7925 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 7926 // CHECK15-NEXT: ret void 7927 // 7928 // 7929 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..19 7930 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 7931 // CHECK15-NEXT: entry: 7932 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 7933 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 7934 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 7935 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 7936 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 7937 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7938 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 7939 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7940 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7941 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7942 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7943 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 7944 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 7945 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 7946 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 7947 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 7948 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 7949 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 7950 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7951 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 7952 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 7953 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 7954 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 7955 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 7956 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7957 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7958 // CHECK15-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 7959 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 7960 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7961 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7962 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 7963 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7964 // CHECK15: cond.true: 7965 // CHECK15-NEXT: br label [[COND_END:%.*]] 7966 // CHECK15: cond.false: 7967 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7968 // CHECK15-NEXT: br label [[COND_END]] 7969 // CHECK15: cond.end: 7970 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 7971 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 7972 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7973 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 7974 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7975 // CHECK15: omp.inner.for.cond: 7976 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7977 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7978 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 7979 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7980 // CHECK15: omp.inner.for.body: 7981 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7982 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 7983 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7984 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4 7985 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 7986 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]] 7987 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 7988 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7989 // CHECK15: omp.body.continue: 7990 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7991 // CHECK15: omp.inner.for.inc: 7992 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7993 // CHECK15-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 7994 // CHECK15-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 7995 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 7996 // CHECK15: omp.inner.for.end: 7997 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7998 // CHECK15: omp.loop.exit: 7999 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 8000 // CHECK15-NEXT: ret void 8001 // 8002 // 8003 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121 8004 // CHECK15-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 8005 // CHECK15-NEXT: entry: 8006 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 8007 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 8008 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 8009 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..22 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 8010 // CHECK15-NEXT: ret void 8011 // 8012 // 8013 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..22 8014 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 8015 // CHECK15-NEXT: entry: 8016 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 8017 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 8018 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 8019 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8020 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 8021 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8022 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8023 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8024 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8025 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 8026 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 8027 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 8028 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 8029 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 8030 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 8031 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 8032 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8033 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8034 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 8035 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 8036 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8037 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8038 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 8039 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8040 // CHECK15: cond.true: 8041 // CHECK15-NEXT: br label [[COND_END:%.*]] 8042 // CHECK15: cond.false: 8043 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8044 // CHECK15-NEXT: br label [[COND_END]] 8045 // CHECK15: cond.end: 8046 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 8047 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 8048 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8049 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 8050 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8051 // CHECK15: omp.inner.for.cond: 8052 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8053 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8054 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 8055 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8056 // CHECK15: omp.inner.for.body: 8057 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8058 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8059 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..23 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]) 8060 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8061 // CHECK15: omp.inner.for.inc: 8062 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8063 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8064 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 8065 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 8066 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 8067 // CHECK15: omp.inner.for.end: 8068 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8069 // CHECK15: omp.loop.exit: 8070 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 8071 // CHECK15-NEXT: ret void 8072 // 8073 // 8074 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..23 8075 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 8076 // CHECK15-NEXT: entry: 8077 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 8078 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 8079 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 8080 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 8081 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 8082 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8083 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 8084 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8085 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8086 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8087 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8088 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 8089 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 8090 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 8091 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 8092 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 8093 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 8094 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 8095 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 8096 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 8097 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 8098 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 8099 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 8100 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 8101 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8102 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8103 // CHECK15-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 8104 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 8105 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8106 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8107 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 8108 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8109 // CHECK15: cond.true: 8110 // CHECK15-NEXT: br label [[COND_END:%.*]] 8111 // CHECK15: cond.false: 8112 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8113 // CHECK15-NEXT: br label [[COND_END]] 8114 // CHECK15: cond.end: 8115 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 8116 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 8117 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8118 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 8119 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8120 // CHECK15: omp.inner.for.cond: 8121 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8122 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8123 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 8124 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8125 // CHECK15: omp.inner.for.body: 8126 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8127 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 8128 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8129 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4 8130 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 8131 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]] 8132 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 8133 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8134 // CHECK15: omp.body.continue: 8135 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8136 // CHECK15: omp.inner.for.inc: 8137 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8138 // CHECK15-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 8139 // CHECK15-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 8140 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 8141 // CHECK15: omp.inner.for.end: 8142 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8143 // CHECK15: omp.loop.exit: 8144 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 8145 // CHECK15-NEXT: ret void 8146 // 8147 // 8148 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126 8149 // CHECK15-SAME: (i32 noundef [[M:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 8150 // CHECK15-NEXT: entry: 8151 // CHECK15-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 8152 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 8153 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 8154 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 8155 // CHECK15-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 8156 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 8157 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 8158 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4 8159 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 8160 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8161 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 8162 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 8163 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..26 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]]) 8164 // CHECK15-NEXT: ret void 8165 // 8166 // 8167 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..26 8168 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 8169 // CHECK15-NEXT: entry: 8170 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 8171 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 8172 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 8173 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 8174 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8175 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 8176 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8177 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8178 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8179 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8180 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 8181 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 8182 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 8183 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 8184 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 8185 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 8186 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 8187 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 8188 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 8189 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8190 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8191 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 8192 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 8193 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8194 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8195 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 8196 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8197 // CHECK15: cond.true: 8198 // CHECK15-NEXT: br label [[COND_END:%.*]] 8199 // CHECK15: cond.false: 8200 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8201 // CHECK15-NEXT: br label [[COND_END]] 8202 // CHECK15: cond.end: 8203 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 8204 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 8205 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8206 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 8207 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8208 // CHECK15: omp.inner.for.cond: 8209 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8210 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8211 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 8212 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8213 // CHECK15: omp.inner.for.body: 8214 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8215 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8216 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 8217 // CHECK15-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 8218 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 8219 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..27 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]]) 8220 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8221 // CHECK15: omp.inner.for.inc: 8222 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8223 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8224 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 8225 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 8226 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 8227 // CHECK15: omp.inner.for.end: 8228 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8229 // CHECK15: omp.loop.exit: 8230 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 8231 // CHECK15-NEXT: ret void 8232 // 8233 // 8234 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..27 8235 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 8236 // CHECK15-NEXT: entry: 8237 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 8238 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 8239 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 8240 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 8241 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 8242 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 8243 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8244 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 8245 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8246 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8247 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8248 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8249 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 8250 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 8251 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 8252 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 8253 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 8254 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 8255 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 8256 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 8257 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 8258 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 8259 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 8260 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 8261 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 8262 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 8263 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8264 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8265 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 8266 // CHECK15-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 8267 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 8268 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]]) 8269 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 8270 // CHECK15: omp.dispatch.cond: 8271 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8272 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 8273 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]] 8274 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8275 // CHECK15: cond.true: 8276 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 8277 // CHECK15-NEXT: br label [[COND_END:%.*]] 8278 // CHECK15: cond.false: 8279 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8280 // CHECK15-NEXT: br label [[COND_END]] 8281 // CHECK15: cond.end: 8282 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP8]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 8283 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 8284 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8285 // CHECK15-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 8286 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8287 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8288 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 8289 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 8290 // CHECK15: omp.dispatch.body: 8291 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8292 // CHECK15: omp.inner.for.cond: 8293 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8294 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8295 // CHECK15-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 8296 // CHECK15-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8297 // CHECK15: omp.inner.for.body: 8298 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8299 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 8300 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8301 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4 8302 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4 8303 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP16]] 8304 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 8305 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8306 // CHECK15: omp.body.continue: 8307 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8308 // CHECK15: omp.inner.for.inc: 8309 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8310 // CHECK15-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1 8311 // CHECK15-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 8312 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 8313 // CHECK15: omp.inner.for.end: 8314 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 8315 // CHECK15: omp.dispatch.inc: 8316 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8317 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8318 // CHECK15-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 8319 // CHECK15-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 8320 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8321 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8322 // CHECK15-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 8323 // CHECK15-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 8324 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]] 8325 // CHECK15: omp.dispatch.end: 8326 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 8327 // CHECK15-NEXT: ret void 8328 // 8329 // 8330 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131 8331 // CHECK15-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 8332 // CHECK15-NEXT: entry: 8333 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 8334 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 8335 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 8336 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..30 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 8337 // CHECK15-NEXT: ret void 8338 // 8339 // 8340 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..30 8341 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 8342 // CHECK15-NEXT: entry: 8343 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 8344 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 8345 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 8346 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8347 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 8348 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8349 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8350 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8351 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8352 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 8353 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 8354 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 8355 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 8356 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 8357 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 8358 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 8359 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8360 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8361 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 8362 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 8363 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8364 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8365 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 8366 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8367 // CHECK15: cond.true: 8368 // CHECK15-NEXT: br label [[COND_END:%.*]] 8369 // CHECK15: cond.false: 8370 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8371 // CHECK15-NEXT: br label [[COND_END]] 8372 // CHECK15: cond.end: 8373 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 8374 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 8375 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8376 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 8377 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8378 // CHECK15: omp.inner.for.cond: 8379 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8380 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8381 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 8382 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8383 // CHECK15: omp.inner.for.body: 8384 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8385 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8386 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..31 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]) 8387 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8388 // CHECK15: omp.inner.for.inc: 8389 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8390 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8391 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 8392 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 8393 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 8394 // CHECK15: omp.inner.for.end: 8395 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8396 // CHECK15: omp.loop.exit: 8397 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 8398 // CHECK15-NEXT: ret void 8399 // 8400 // 8401 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..31 8402 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 8403 // CHECK15-NEXT: entry: 8404 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 8405 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 8406 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 8407 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 8408 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 8409 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8410 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 8411 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8412 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8413 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8414 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8415 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 8416 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 8417 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 8418 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 8419 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 8420 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 8421 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 8422 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 8423 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 8424 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 8425 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 8426 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 8427 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 8428 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8429 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8430 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8431 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8432 // CHECK15-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 8433 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 8434 // CHECK15-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 8435 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 8436 // CHECK15: omp.dispatch.cond: 8437 // CHECK15-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 8438 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 8439 // CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 8440 // CHECK15: omp.dispatch.body: 8441 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8442 // CHECK15-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 8443 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8444 // CHECK15: omp.inner.for.cond: 8445 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 8446 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22 8447 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 8448 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8449 // CHECK15: omp.inner.for.body: 8450 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 8451 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 8452 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8453 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22 8454 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !22 8455 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP12]] 8456 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !22 8457 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8458 // CHECK15: omp.body.continue: 8459 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8460 // CHECK15: omp.inner.for.inc: 8461 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 8462 // CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 8463 // CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 8464 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]] 8465 // CHECK15: omp.inner.for.end: 8466 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 8467 // CHECK15: omp.dispatch.inc: 8468 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]] 8469 // CHECK15: omp.dispatch.end: 8470 // CHECK15-NEXT: ret void 8471 // 8472 // 8473 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136 8474 // CHECK15-SAME: (i32 noundef [[M:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 8475 // CHECK15-NEXT: entry: 8476 // CHECK15-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 8477 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 8478 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 8479 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 8480 // CHECK15-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 8481 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 8482 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 8483 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4 8484 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 8485 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8486 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 8487 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 8488 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..34 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]]) 8489 // CHECK15-NEXT: ret void 8490 // 8491 // 8492 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..34 8493 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 8494 // CHECK15-NEXT: entry: 8495 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 8496 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 8497 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 8498 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 8499 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8500 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 8501 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8502 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8503 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8504 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8505 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 8506 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 8507 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 8508 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 8509 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 8510 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 8511 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 8512 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 8513 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 8514 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8515 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8516 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 8517 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 8518 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8519 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8520 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 8521 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8522 // CHECK15: cond.true: 8523 // CHECK15-NEXT: br label [[COND_END:%.*]] 8524 // CHECK15: cond.false: 8525 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8526 // CHECK15-NEXT: br label [[COND_END]] 8527 // CHECK15: cond.end: 8528 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 8529 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 8530 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8531 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 8532 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8533 // CHECK15: omp.inner.for.cond: 8534 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8535 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8536 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 8537 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8538 // CHECK15: omp.inner.for.body: 8539 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8540 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8541 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 8542 // CHECK15-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 8543 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 8544 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..35 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]]) 8545 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8546 // CHECK15: omp.inner.for.inc: 8547 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8548 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8549 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 8550 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 8551 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 8552 // CHECK15: omp.inner.for.end: 8553 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8554 // CHECK15: omp.loop.exit: 8555 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 8556 // CHECK15-NEXT: ret void 8557 // 8558 // 8559 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..35 8560 // CHECK15-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 8561 // CHECK15-NEXT: entry: 8562 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 8563 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 8564 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 8565 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 8566 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 8567 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 8568 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8569 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 8570 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8571 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8572 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8573 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8574 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 8575 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 8576 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 8577 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 8578 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 8579 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 8580 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 8581 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 8582 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 8583 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 8584 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 8585 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 8586 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 8587 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 8588 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8589 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8590 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 8591 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8592 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8593 // CHECK15-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 8594 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 8595 // CHECK15-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]]) 8596 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 8597 // CHECK15: omp.dispatch.cond: 8598 // CHECK15-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 8599 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0 8600 // CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 8601 // CHECK15: omp.dispatch.body: 8602 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8603 // CHECK15-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 8604 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8605 // CHECK15: omp.inner.for.cond: 8606 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 8607 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25 8608 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 8609 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8610 // CHECK15: omp.inner.for.body: 8611 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 8612 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 8613 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8614 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !25 8615 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !25 8616 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP13]] 8617 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !25 8618 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8619 // CHECK15: omp.body.continue: 8620 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8621 // CHECK15: omp.inner.for.inc: 8622 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 8623 // CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP14]], 1 8624 // CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 8625 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]] 8626 // CHECK15: omp.inner.for.end: 8627 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 8628 // CHECK15: omp.dispatch.inc: 8629 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]] 8630 // CHECK15: omp.dispatch.end: 8631 // CHECK15-NEXT: ret void 8632 // 8633 // 8634 // CHECK15-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 8635 // CHECK15-SAME: () #[[ATTR6:[0-9]+]] { 8636 // CHECK15-NEXT: entry: 8637 // CHECK15-NEXT: call void @__tgt_register_requires(i64 1) 8638 // CHECK15-NEXT: ret void 8639 // 8640 // 8641 // CHECK17-LABEL: define {{[^@]+}}@main 8642 // CHECK17-SAME: (i32 noundef signext [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 8643 // CHECK17-NEXT: entry: 8644 // CHECK17-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 8645 // CHECK17-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 8646 // CHECK17-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 8647 // CHECK17-NEXT: [[N:%.*]] = alloca i32, align 4 8648 // CHECK17-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 8649 // CHECK17-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 8650 // CHECK17-NEXT: [[M:%.*]] = alloca i32, align 4 8651 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 8652 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 8653 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 8654 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 8655 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 8656 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 8657 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 8658 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8659 // CHECK17-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8 8660 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8 8661 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8 8662 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8 8663 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8 8664 // CHECK17-NEXT: [[_TMP9:%.*]] = alloca i32, align 4 8665 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 8666 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4 8667 // CHECK17-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 8668 // CHECK17-NEXT: [[N_CASTED19:%.*]] = alloca i64, align 8 8669 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [4 x i8*], align 8 8670 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS22:%.*]] = alloca [4 x i8*], align 8 8671 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [4 x i8*], align 8 8672 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES24:%.*]] = alloca [4 x i64], align 8 8673 // CHECK17-NEXT: [[_TMP25:%.*]] = alloca i32, align 4 8674 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4 8675 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4 8676 // CHECK17-NEXT: [[N_CASTED34:%.*]] = alloca i64, align 8 8677 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS36:%.*]] = alloca [3 x i8*], align 8 8678 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS37:%.*]] = alloca [3 x i8*], align 8 8679 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS38:%.*]] = alloca [3 x i8*], align 8 8680 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES39:%.*]] = alloca [3 x i64], align 8 8681 // CHECK17-NEXT: [[_TMP40:%.*]] = alloca i32, align 4 8682 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4 8683 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4 8684 // CHECK17-NEXT: [[M_CASTED49:%.*]] = alloca i64, align 8 8685 // CHECK17-NEXT: [[N_CASTED51:%.*]] = alloca i64, align 8 8686 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS53:%.*]] = alloca [4 x i8*], align 8 8687 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS54:%.*]] = alloca [4 x i8*], align 8 8688 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS55:%.*]] = alloca [4 x i8*], align 8 8689 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES56:%.*]] = alloca [4 x i64], align 8 8690 // CHECK17-NEXT: [[_TMP57:%.*]] = alloca i32, align 4 8691 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4 8692 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_59:%.*]] = alloca i32, align 4 8693 // CHECK17-NEXT: store i32 0, i32* [[RETVAL]], align 4 8694 // CHECK17-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 8695 // CHECK17-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 8696 // CHECK17-NEXT: store i32 100, i32* [[N]], align 4 8697 // CHECK17-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 8698 // CHECK17-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 8699 // CHECK17-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 8700 // CHECK17-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 8701 // CHECK17-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 8702 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 8703 // CHECK17-NEXT: store i32 10, i32* [[M]], align 4 8704 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 8705 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 8706 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 8707 // CHECK17-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 8708 // CHECK17-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 8709 // CHECK17-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 8710 // CHECK17-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP6]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes to i8*), i64 24, i1 false) 8711 // CHECK17-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 8712 // CHECK17-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i64* 8713 // CHECK17-NEXT: store i64 [[TMP4]], i64* [[TMP8]], align 8 8714 // CHECK17-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 8715 // CHECK17-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i64* 8716 // CHECK17-NEXT: store i64 [[TMP4]], i64* [[TMP10]], align 8 8717 // CHECK17-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 8718 // CHECK17-NEXT: store i8* null, i8** [[TMP11]], align 8 8719 // CHECK17-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 8720 // CHECK17-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 8721 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8 8722 // CHECK17-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 8723 // CHECK17-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 8724 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8 8725 // CHECK17-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 8726 // CHECK17-NEXT: store i8* null, i8** [[TMP16]], align 8 8727 // CHECK17-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 8728 // CHECK17-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 8729 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 8 8730 // CHECK17-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 8731 // CHECK17-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 8732 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 8 8733 // CHECK17-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 8734 // CHECK17-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 8 8735 // CHECK17-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 8736 // CHECK17-NEXT: store i8* null, i8** [[TMP22]], align 8 8737 // CHECK17-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 8738 // CHECK17-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 8739 // CHECK17-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 8740 // CHECK17-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 8741 // CHECK17-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 8742 // CHECK17-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8743 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 8744 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8745 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 8746 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 8747 // CHECK17-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8748 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 8749 // CHECK17-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 8750 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP29]]) 8751 // CHECK17-NEXT: [[TMP30:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, i32 3, i8** [[TMP23]], i8** [[TMP24]], i64* [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 8752 // CHECK17-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 8753 // CHECK17-NEXT: br i1 [[TMP31]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 8754 // CHECK17: omp_offload.failed: 8755 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 8756 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]] 8757 // CHECK17: omp_offload.cont: 8758 // CHECK17-NEXT: [[TMP32:%.*]] = load i32, i32* [[N]], align 4 8759 // CHECK17-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32* 8760 // CHECK17-NEXT: store i32 [[TMP32]], i32* [[CONV4]], align 4 8761 // CHECK17-NEXT: [[TMP33:%.*]] = load i64, i64* [[N_CASTED3]], align 8 8762 // CHECK17-NEXT: [[TMP34:%.*]] = mul nuw i64 [[TMP1]], 4 8763 // CHECK17-NEXT: [[TMP35:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES8]] to i8* 8764 // CHECK17-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP35]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.4 to i8*), i64 24, i1 false) 8765 // CHECK17-NEXT: [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 8766 // CHECK17-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64* 8767 // CHECK17-NEXT: store i64 [[TMP33]], i64* [[TMP37]], align 8 8768 // CHECK17-NEXT: [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 8769 // CHECK17-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64* 8770 // CHECK17-NEXT: store i64 [[TMP33]], i64* [[TMP39]], align 8 8771 // CHECK17-NEXT: [[TMP40:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0 8772 // CHECK17-NEXT: store i8* null, i8** [[TMP40]], align 8 8773 // CHECK17-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 8774 // CHECK17-NEXT: [[TMP42:%.*]] = bitcast i8** [[TMP41]] to i64* 8775 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP42]], align 8 8776 // CHECK17-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 8777 // CHECK17-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i64* 8778 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP44]], align 8 8779 // CHECK17-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1 8780 // CHECK17-NEXT: store i8* null, i8** [[TMP45]], align 8 8781 // CHECK17-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2 8782 // CHECK17-NEXT: [[TMP47:%.*]] = bitcast i8** [[TMP46]] to i32** 8783 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP47]], align 8 8784 // CHECK17-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2 8785 // CHECK17-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32** 8786 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP49]], align 8 8787 // CHECK17-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2 8788 // CHECK17-NEXT: store i64 [[TMP34]], i64* [[TMP50]], align 8 8789 // CHECK17-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2 8790 // CHECK17-NEXT: store i8* null, i8** [[TMP51]], align 8 8791 // CHECK17-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 8792 // CHECK17-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 8793 // CHECK17-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0 8794 // CHECK17-NEXT: [[TMP55:%.*]] = load i32, i32* [[N]], align 4 8795 // CHECK17-NEXT: store i32 [[TMP55]], i32* [[DOTCAPTURE_EXPR_10]], align 4 8796 // CHECK17-NEXT: [[TMP56:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 8797 // CHECK17-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP56]], 0 8798 // CHECK17-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1 8799 // CHECK17-NEXT: [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1 8800 // CHECK17-NEXT: store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4 8801 // CHECK17-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 8802 // CHECK17-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP57]], 1 8803 // CHECK17-NEXT: [[TMP58:%.*]] = zext i32 [[ADD15]] to i64 8804 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP58]]) 8805 // CHECK17-NEXT: [[TMP59:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, i32 3, i8** [[TMP52]], i8** [[TMP53]], i64* [[TMP54]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 8806 // CHECK17-NEXT: [[TMP60:%.*]] = icmp ne i32 [[TMP59]], 0 8807 // CHECK17-NEXT: br i1 [[TMP60]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 8808 // CHECK17: omp_offload.failed16: 8809 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i64 [[TMP33]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 8810 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT17]] 8811 // CHECK17: omp_offload.cont17: 8812 // CHECK17-NEXT: [[TMP61:%.*]] = load i32, i32* [[M]], align 4 8813 // CHECK17-NEXT: [[CONV18:%.*]] = bitcast i64* [[M_CASTED]] to i32* 8814 // CHECK17-NEXT: store i32 [[TMP61]], i32* [[CONV18]], align 4 8815 // CHECK17-NEXT: [[TMP62:%.*]] = load i64, i64* [[M_CASTED]], align 8 8816 // CHECK17-NEXT: [[TMP63:%.*]] = load i32, i32* [[N]], align 4 8817 // CHECK17-NEXT: [[CONV20:%.*]] = bitcast i64* [[N_CASTED19]] to i32* 8818 // CHECK17-NEXT: store i32 [[TMP63]], i32* [[CONV20]], align 4 8819 // CHECK17-NEXT: [[TMP64:%.*]] = load i64, i64* [[N_CASTED19]], align 8 8820 // CHECK17-NEXT: [[TMP65:%.*]] = mul nuw i64 [[TMP1]], 4 8821 // CHECK17-NEXT: [[TMP66:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES24]] to i8* 8822 // CHECK17-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP66]], i8* align 8 bitcast ([4 x i64]* @.offload_sizes.8 to i8*), i64 32, i1 false) 8823 // CHECK17-NEXT: [[TMP67:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 8824 // CHECK17-NEXT: [[TMP68:%.*]] = bitcast i8** [[TMP67]] to i64* 8825 // CHECK17-NEXT: store i64 [[TMP62]], i64* [[TMP68]], align 8 8826 // CHECK17-NEXT: [[TMP69:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 8827 // CHECK17-NEXT: [[TMP70:%.*]] = bitcast i8** [[TMP69]] to i64* 8828 // CHECK17-NEXT: store i64 [[TMP62]], i64* [[TMP70]], align 8 8829 // CHECK17-NEXT: [[TMP71:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0 8830 // CHECK17-NEXT: store i8* null, i8** [[TMP71]], align 8 8831 // CHECK17-NEXT: [[TMP72:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1 8832 // CHECK17-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to i64* 8833 // CHECK17-NEXT: store i64 [[TMP64]], i64* [[TMP73]], align 8 8834 // CHECK17-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1 8835 // CHECK17-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i64* 8836 // CHECK17-NEXT: store i64 [[TMP64]], i64* [[TMP75]], align 8 8837 // CHECK17-NEXT: [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1 8838 // CHECK17-NEXT: store i8* null, i8** [[TMP76]], align 8 8839 // CHECK17-NEXT: [[TMP77:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 2 8840 // CHECK17-NEXT: [[TMP78:%.*]] = bitcast i8** [[TMP77]] to i64* 8841 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP78]], align 8 8842 // CHECK17-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 2 8843 // CHECK17-NEXT: [[TMP80:%.*]] = bitcast i8** [[TMP79]] to i64* 8844 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP80]], align 8 8845 // CHECK17-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 2 8846 // CHECK17-NEXT: store i8* null, i8** [[TMP81]], align 8 8847 // CHECK17-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 3 8848 // CHECK17-NEXT: [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i32** 8849 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP83]], align 8 8850 // CHECK17-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 3 8851 // CHECK17-NEXT: [[TMP85:%.*]] = bitcast i8** [[TMP84]] to i32** 8852 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP85]], align 8 8853 // CHECK17-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 3 8854 // CHECK17-NEXT: store i64 [[TMP65]], i64* [[TMP86]], align 8 8855 // CHECK17-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 3 8856 // CHECK17-NEXT: store i8* null, i8** [[TMP87]], align 8 8857 // CHECK17-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 8858 // CHECK17-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 8859 // CHECK17-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0 8860 // CHECK17-NEXT: [[TMP91:%.*]] = load i32, i32* [[N]], align 4 8861 // CHECK17-NEXT: store i32 [[TMP91]], i32* [[DOTCAPTURE_EXPR_26]], align 4 8862 // CHECK17-NEXT: [[TMP92:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 8863 // CHECK17-NEXT: [[SUB28:%.*]] = sub nsw i32 [[TMP92]], 0 8864 // CHECK17-NEXT: [[DIV29:%.*]] = sdiv i32 [[SUB28]], 1 8865 // CHECK17-NEXT: [[SUB30:%.*]] = sub nsw i32 [[DIV29]], 1 8866 // CHECK17-NEXT: store i32 [[SUB30]], i32* [[DOTCAPTURE_EXPR_27]], align 4 8867 // CHECK17-NEXT: [[TMP93:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 8868 // CHECK17-NEXT: [[ADD31:%.*]] = add nsw i32 [[TMP93]], 1 8869 // CHECK17-NEXT: [[TMP94:%.*]] = zext i32 [[ADD31]] to i64 8870 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP94]]) 8871 // CHECK17-NEXT: [[TMP95:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, i32 4, i8** [[TMP88]], i8** [[TMP89]], i64* [[TMP90]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 8872 // CHECK17-NEXT: [[TMP96:%.*]] = icmp ne i32 [[TMP95]], 0 8873 // CHECK17-NEXT: br i1 [[TMP96]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]] 8874 // CHECK17: omp_offload.failed32: 8875 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i64 [[TMP62]], i64 [[TMP64]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 8876 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT33]] 8877 // CHECK17: omp_offload.cont33: 8878 // CHECK17-NEXT: [[TMP97:%.*]] = load i32, i32* [[N]], align 4 8879 // CHECK17-NEXT: [[CONV35:%.*]] = bitcast i64* [[N_CASTED34]] to i32* 8880 // CHECK17-NEXT: store i32 [[TMP97]], i32* [[CONV35]], align 4 8881 // CHECK17-NEXT: [[TMP98:%.*]] = load i64, i64* [[N_CASTED34]], align 8 8882 // CHECK17-NEXT: [[TMP99:%.*]] = mul nuw i64 [[TMP1]], 4 8883 // CHECK17-NEXT: [[TMP100:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES39]] to i8* 8884 // CHECK17-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP100]], i8* align 8 bitcast ([3 x i64]* @.offload_sizes.12 to i8*), i64 24, i1 false) 8885 // CHECK17-NEXT: [[TMP101:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0 8886 // CHECK17-NEXT: [[TMP102:%.*]] = bitcast i8** [[TMP101]] to i64* 8887 // CHECK17-NEXT: store i64 [[TMP98]], i64* [[TMP102]], align 8 8888 // CHECK17-NEXT: [[TMP103:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0 8889 // CHECK17-NEXT: [[TMP104:%.*]] = bitcast i8** [[TMP103]] to i64* 8890 // CHECK17-NEXT: store i64 [[TMP98]], i64* [[TMP104]], align 8 8891 // CHECK17-NEXT: [[TMP105:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 0 8892 // CHECK17-NEXT: store i8* null, i8** [[TMP105]], align 8 8893 // CHECK17-NEXT: [[TMP106:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 1 8894 // CHECK17-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to i64* 8895 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP107]], align 8 8896 // CHECK17-NEXT: [[TMP108:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 1 8897 // CHECK17-NEXT: [[TMP109:%.*]] = bitcast i8** [[TMP108]] to i64* 8898 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP109]], align 8 8899 // CHECK17-NEXT: [[TMP110:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 1 8900 // CHECK17-NEXT: store i8* null, i8** [[TMP110]], align 8 8901 // CHECK17-NEXT: [[TMP111:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 2 8902 // CHECK17-NEXT: [[TMP112:%.*]] = bitcast i8** [[TMP111]] to i32** 8903 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP112]], align 8 8904 // CHECK17-NEXT: [[TMP113:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 2 8905 // CHECK17-NEXT: [[TMP114:%.*]] = bitcast i8** [[TMP113]] to i32** 8906 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP114]], align 8 8907 // CHECK17-NEXT: [[TMP115:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 2 8908 // CHECK17-NEXT: store i64 [[TMP99]], i64* [[TMP115]], align 8 8909 // CHECK17-NEXT: [[TMP116:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 2 8910 // CHECK17-NEXT: store i8* null, i8** [[TMP116]], align 8 8911 // CHECK17-NEXT: [[TMP117:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0 8912 // CHECK17-NEXT: [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0 8913 // CHECK17-NEXT: [[TMP119:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0 8914 // CHECK17-NEXT: [[TMP120:%.*]] = load i32, i32* [[N]], align 4 8915 // CHECK17-NEXT: store i32 [[TMP120]], i32* [[DOTCAPTURE_EXPR_41]], align 4 8916 // CHECK17-NEXT: [[TMP121:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4 8917 // CHECK17-NEXT: [[SUB43:%.*]] = sub nsw i32 [[TMP121]], 0 8918 // CHECK17-NEXT: [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1 8919 // CHECK17-NEXT: [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 1 8920 // CHECK17-NEXT: store i32 [[SUB45]], i32* [[DOTCAPTURE_EXPR_42]], align 4 8921 // CHECK17-NEXT: [[TMP122:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_42]], align 4 8922 // CHECK17-NEXT: [[ADD46:%.*]] = add nsw i32 [[TMP122]], 1 8923 // CHECK17-NEXT: [[TMP123:%.*]] = zext i32 [[ADD46]] to i64 8924 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP123]]) 8925 // CHECK17-NEXT: [[TMP124:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, i32 3, i8** [[TMP117]], i8** [[TMP118]], i64* [[TMP119]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 8926 // CHECK17-NEXT: [[TMP125:%.*]] = icmp ne i32 [[TMP124]], 0 8927 // CHECK17-NEXT: br i1 [[TMP125]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]] 8928 // CHECK17: omp_offload.failed47: 8929 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i64 [[TMP98]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 8930 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT48]] 8931 // CHECK17: omp_offload.cont48: 8932 // CHECK17-NEXT: [[TMP126:%.*]] = load i32, i32* [[M]], align 4 8933 // CHECK17-NEXT: [[CONV50:%.*]] = bitcast i64* [[M_CASTED49]] to i32* 8934 // CHECK17-NEXT: store i32 [[TMP126]], i32* [[CONV50]], align 4 8935 // CHECK17-NEXT: [[TMP127:%.*]] = load i64, i64* [[M_CASTED49]], align 8 8936 // CHECK17-NEXT: [[TMP128:%.*]] = load i32, i32* [[N]], align 4 8937 // CHECK17-NEXT: [[CONV52:%.*]] = bitcast i64* [[N_CASTED51]] to i32* 8938 // CHECK17-NEXT: store i32 [[TMP128]], i32* [[CONV52]], align 4 8939 // CHECK17-NEXT: [[TMP129:%.*]] = load i64, i64* [[N_CASTED51]], align 8 8940 // CHECK17-NEXT: [[TMP130:%.*]] = mul nuw i64 [[TMP1]], 4 8941 // CHECK17-NEXT: [[TMP131:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES56]] to i8* 8942 // CHECK17-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP131]], i8* align 8 bitcast ([4 x i64]* @.offload_sizes.16 to i8*), i64 32, i1 false) 8943 // CHECK17-NEXT: [[TMP132:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0 8944 // CHECK17-NEXT: [[TMP133:%.*]] = bitcast i8** [[TMP132]] to i64* 8945 // CHECK17-NEXT: store i64 [[TMP127]], i64* [[TMP133]], align 8 8946 // CHECK17-NEXT: [[TMP134:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0 8947 // CHECK17-NEXT: [[TMP135:%.*]] = bitcast i8** [[TMP134]] to i64* 8948 // CHECK17-NEXT: store i64 [[TMP127]], i64* [[TMP135]], align 8 8949 // CHECK17-NEXT: [[TMP136:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 0 8950 // CHECK17-NEXT: store i8* null, i8** [[TMP136]], align 8 8951 // CHECK17-NEXT: [[TMP137:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 1 8952 // CHECK17-NEXT: [[TMP138:%.*]] = bitcast i8** [[TMP137]] to i64* 8953 // CHECK17-NEXT: store i64 [[TMP129]], i64* [[TMP138]], align 8 8954 // CHECK17-NEXT: [[TMP139:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 1 8955 // CHECK17-NEXT: [[TMP140:%.*]] = bitcast i8** [[TMP139]] to i64* 8956 // CHECK17-NEXT: store i64 [[TMP129]], i64* [[TMP140]], align 8 8957 // CHECK17-NEXT: [[TMP141:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 1 8958 // CHECK17-NEXT: store i8* null, i8** [[TMP141]], align 8 8959 // CHECK17-NEXT: [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 2 8960 // CHECK17-NEXT: [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i64* 8961 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP143]], align 8 8962 // CHECK17-NEXT: [[TMP144:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 2 8963 // CHECK17-NEXT: [[TMP145:%.*]] = bitcast i8** [[TMP144]] to i64* 8964 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP145]], align 8 8965 // CHECK17-NEXT: [[TMP146:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 2 8966 // CHECK17-NEXT: store i8* null, i8** [[TMP146]], align 8 8967 // CHECK17-NEXT: [[TMP147:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 3 8968 // CHECK17-NEXT: [[TMP148:%.*]] = bitcast i8** [[TMP147]] to i32** 8969 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP148]], align 8 8970 // CHECK17-NEXT: [[TMP149:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 3 8971 // CHECK17-NEXT: [[TMP150:%.*]] = bitcast i8** [[TMP149]] to i32** 8972 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP150]], align 8 8973 // CHECK17-NEXT: [[TMP151:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 3 8974 // CHECK17-NEXT: store i64 [[TMP130]], i64* [[TMP151]], align 8 8975 // CHECK17-NEXT: [[TMP152:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 3 8976 // CHECK17-NEXT: store i8* null, i8** [[TMP152]], align 8 8977 // CHECK17-NEXT: [[TMP153:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0 8978 // CHECK17-NEXT: [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0 8979 // CHECK17-NEXT: [[TMP155:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0 8980 // CHECK17-NEXT: [[TMP156:%.*]] = load i32, i32* [[N]], align 4 8981 // CHECK17-NEXT: store i32 [[TMP156]], i32* [[DOTCAPTURE_EXPR_58]], align 4 8982 // CHECK17-NEXT: [[TMP157:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_58]], align 4 8983 // CHECK17-NEXT: [[SUB60:%.*]] = sub nsw i32 [[TMP157]], 0 8984 // CHECK17-NEXT: [[DIV61:%.*]] = sdiv i32 [[SUB60]], 1 8985 // CHECK17-NEXT: [[SUB62:%.*]] = sub nsw i32 [[DIV61]], 1 8986 // CHECK17-NEXT: store i32 [[SUB62]], i32* [[DOTCAPTURE_EXPR_59]], align 4 8987 // CHECK17-NEXT: [[TMP158:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_59]], align 4 8988 // CHECK17-NEXT: [[ADD63:%.*]] = add nsw i32 [[TMP158]], 1 8989 // CHECK17-NEXT: [[TMP159:%.*]] = zext i32 [[ADD63]] to i64 8990 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP159]]) 8991 // CHECK17-NEXT: [[TMP160:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, i32 4, i8** [[TMP153]], i8** [[TMP154]], i64* [[TMP155]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 8992 // CHECK17-NEXT: [[TMP161:%.*]] = icmp ne i32 [[TMP160]], 0 8993 // CHECK17-NEXT: br i1 [[TMP161]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]] 8994 // CHECK17: omp_offload.failed64: 8995 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i64 [[TMP127]], i64 [[TMP129]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 8996 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT65]] 8997 // CHECK17: omp_offload.cont65: 8998 // CHECK17-NEXT: [[TMP162:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 8999 // CHECK17-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP162]]) 9000 // CHECK17-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 9001 // CHECK17-NEXT: [[TMP163:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 9002 // CHECK17-NEXT: call void @llvm.stackrestore(i8* [[TMP163]]) 9003 // CHECK17-NEXT: [[TMP164:%.*]] = load i32, i32* [[RETVAL]], align 4 9004 // CHECK17-NEXT: ret i32 [[TMP164]] 9005 // 9006 // 9007 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148 9008 // CHECK17-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 9009 // CHECK17-NEXT: entry: 9010 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 9011 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 9012 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 9013 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 9014 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 9015 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 9016 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 9017 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 9018 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 9019 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 9020 // CHECK17-NEXT: ret void 9021 // 9022 // 9023 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined. 9024 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 9025 // CHECK17-NEXT: entry: 9026 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9027 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9028 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 9029 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 9030 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 9031 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9032 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 9033 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 9034 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 9035 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 9036 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9037 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9038 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9039 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9040 // CHECK17-NEXT: [[I3:%.*]] = alloca i32, align 4 9041 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9042 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9043 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 9044 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 9045 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 9046 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 9047 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 9048 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 9049 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 9050 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 9051 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9052 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 9053 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 9054 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 9055 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 9056 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4 9057 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9058 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 9059 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 9060 // CHECK17: omp.precond.then: 9061 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 9062 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9063 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 9064 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9065 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9066 // CHECK17-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9067 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 9068 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9069 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9070 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9071 // CHECK17-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 9072 // CHECK17-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9073 // CHECK17: cond.true: 9074 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9075 // CHECK17-NEXT: br label [[COND_END:%.*]] 9076 // CHECK17: cond.false: 9077 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9078 // CHECK17-NEXT: br label [[COND_END]] 9079 // CHECK17: cond.end: 9080 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 9081 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 9082 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9083 // CHECK17-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 9084 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9085 // CHECK17: omp.inner.for.cond: 9086 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9087 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9088 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 9089 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9090 // CHECK17: omp.inner.for.body: 9091 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9092 // CHECK17-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 9093 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9094 // CHECK17-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 9095 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 9096 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9097 // CHECK17: omp.inner.for.inc: 9098 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9099 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9100 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 9101 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 9102 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 9103 // CHECK17: omp.inner.for.end: 9104 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9105 // CHECK17: omp.loop.exit: 9106 // CHECK17-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9107 // CHECK17-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 9108 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 9109 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 9110 // CHECK17: omp.precond.end: 9111 // CHECK17-NEXT: ret void 9112 // 9113 // 9114 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..1 9115 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 9116 // CHECK17-NEXT: entry: 9117 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9118 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9119 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 9120 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 9121 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 9122 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 9123 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 9124 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9125 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 9126 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 9127 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 9128 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 9129 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9130 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9131 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9132 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9133 // CHECK17-NEXT: [[I4:%.*]] = alloca i32, align 4 9134 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9135 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9136 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9137 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9138 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 9139 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 9140 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 9141 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 9142 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 9143 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 9144 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 9145 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 9146 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9147 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 9148 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 9149 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 9150 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 9151 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4 9152 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9153 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 9154 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 9155 // CHECK17: omp.precond.then: 9156 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 9157 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9158 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 9159 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9160 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 9161 // CHECK17-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9162 // CHECK17-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 9163 // CHECK17-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 9164 // CHECK17-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 9165 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9166 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9167 // CHECK17-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9168 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 9169 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9170 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9171 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9172 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 9173 // CHECK17-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9174 // CHECK17: cond.true: 9175 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9176 // CHECK17-NEXT: br label [[COND_END:%.*]] 9177 // CHECK17: cond.false: 9178 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9179 // CHECK17-NEXT: br label [[COND_END]] 9180 // CHECK17: cond.end: 9181 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 9182 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 9183 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9184 // CHECK17-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 9185 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9186 // CHECK17: omp.inner.for.cond: 9187 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9188 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9189 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 9190 // CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9191 // CHECK17: omp.inner.for.body: 9192 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9193 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 9194 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9195 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 9196 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4 9197 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 9198 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 9199 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 9200 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9201 // CHECK17: omp.body.continue: 9202 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9203 // CHECK17: omp.inner.for.inc: 9204 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9205 // CHECK17-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 9206 // CHECK17-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 9207 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 9208 // CHECK17: omp.inner.for.end: 9209 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9210 // CHECK17: omp.loop.exit: 9211 // CHECK17-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9212 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 9213 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 9214 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 9215 // CHECK17: omp.precond.end: 9216 // CHECK17-NEXT: ret void 9217 // 9218 // 9219 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153 9220 // CHECK17-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 9221 // CHECK17-NEXT: entry: 9222 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 9223 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 9224 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 9225 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 9226 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 9227 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 9228 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 9229 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 9230 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 9231 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 9232 // CHECK17-NEXT: ret void 9233 // 9234 // 9235 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..2 9236 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 9237 // CHECK17-NEXT: entry: 9238 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9239 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9240 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 9241 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 9242 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 9243 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9244 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 9245 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 9246 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 9247 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 9248 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9249 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9250 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9251 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9252 // CHECK17-NEXT: [[I3:%.*]] = alloca i32, align 4 9253 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9254 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9255 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 9256 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 9257 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 9258 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 9259 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 9260 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 9261 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 9262 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 9263 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9264 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 9265 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 9266 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 9267 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 9268 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4 9269 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9270 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 9271 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 9272 // CHECK17: omp.precond.then: 9273 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 9274 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9275 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 9276 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9277 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9278 // CHECK17-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9279 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 9280 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9281 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9282 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9283 // CHECK17-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 9284 // CHECK17-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9285 // CHECK17: cond.true: 9286 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9287 // CHECK17-NEXT: br label [[COND_END:%.*]] 9288 // CHECK17: cond.false: 9289 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9290 // CHECK17-NEXT: br label [[COND_END]] 9291 // CHECK17: cond.end: 9292 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 9293 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 9294 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9295 // CHECK17-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 9296 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9297 // CHECK17: omp.inner.for.cond: 9298 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9299 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9300 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 9301 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9302 // CHECK17: omp.inner.for.body: 9303 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9304 // CHECK17-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 9305 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9306 // CHECK17-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 9307 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 9308 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9309 // CHECK17: omp.inner.for.inc: 9310 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9311 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9312 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 9313 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 9314 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 9315 // CHECK17: omp.inner.for.end: 9316 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9317 // CHECK17: omp.loop.exit: 9318 // CHECK17-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9319 // CHECK17-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 9320 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 9321 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 9322 // CHECK17: omp.precond.end: 9323 // CHECK17-NEXT: ret void 9324 // 9325 // 9326 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..3 9327 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 9328 // CHECK17-NEXT: entry: 9329 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9330 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9331 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 9332 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 9333 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 9334 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 9335 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 9336 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9337 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 9338 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 9339 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 9340 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 9341 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9342 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9343 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9344 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9345 // CHECK17-NEXT: [[I4:%.*]] = alloca i32, align 4 9346 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9347 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9348 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9349 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9350 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 9351 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 9352 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 9353 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 9354 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 9355 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 9356 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 9357 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 9358 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9359 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 9360 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 9361 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 9362 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 9363 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4 9364 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9365 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 9366 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 9367 // CHECK17: omp.precond.then: 9368 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 9369 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9370 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 9371 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9372 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 9373 // CHECK17-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9374 // CHECK17-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 9375 // CHECK17-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 9376 // CHECK17-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 9377 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9378 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9379 // CHECK17-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9380 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 9381 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9382 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9383 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9384 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 9385 // CHECK17-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9386 // CHECK17: cond.true: 9387 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9388 // CHECK17-NEXT: br label [[COND_END:%.*]] 9389 // CHECK17: cond.false: 9390 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9391 // CHECK17-NEXT: br label [[COND_END]] 9392 // CHECK17: cond.end: 9393 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 9394 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 9395 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9396 // CHECK17-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 9397 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9398 // CHECK17: omp.inner.for.cond: 9399 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9400 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9401 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 9402 // CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9403 // CHECK17: omp.inner.for.body: 9404 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9405 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 9406 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9407 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 9408 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4 9409 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 9410 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 9411 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 9412 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9413 // CHECK17: omp.body.continue: 9414 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9415 // CHECK17: omp.inner.for.inc: 9416 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9417 // CHECK17-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 9418 // CHECK17-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 9419 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 9420 // CHECK17: omp.inner.for.end: 9421 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9422 // CHECK17: omp.loop.exit: 9423 // CHECK17-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9424 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 9425 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 9426 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 9427 // CHECK17: omp.precond.end: 9428 // CHECK17-NEXT: ret void 9429 // 9430 // 9431 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158 9432 // CHECK17-SAME: (i64 noundef [[M:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 9433 // CHECK17-NEXT: entry: 9434 // CHECK17-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 9435 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 9436 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 9437 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 9438 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 9439 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 9440 // CHECK17-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 9441 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 9442 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 9443 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 9444 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* 9445 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 9446 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 9447 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 9448 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 9449 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 9450 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9451 // CHECK17-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 9452 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4 9453 // CHECK17-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 9454 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]]) 9455 // CHECK17-NEXT: ret void 9456 // 9457 // 9458 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..6 9459 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 9460 // CHECK17-NEXT: entry: 9461 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9462 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9463 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 9464 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 9465 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 9466 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 9467 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9468 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 9469 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 9470 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 9471 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 9472 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9473 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9474 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9475 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9476 // CHECK17-NEXT: [[I4:%.*]] = alloca i32, align 4 9477 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 9478 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9479 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9480 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 9481 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 9482 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 9483 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 9484 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 9485 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 9486 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 9487 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 9488 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 9489 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 9490 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9491 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 9492 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 9493 // CHECK17-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 9494 // CHECK17-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 9495 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4 9496 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9497 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 9498 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 9499 // CHECK17: omp.precond.then: 9500 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 9501 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 9502 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 9503 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9504 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9505 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[CONV]], align 4 9506 // CHECK17-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9507 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 9508 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]]) 9509 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9510 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 9511 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 9512 // CHECK17-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9513 // CHECK17: cond.true: 9514 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 9515 // CHECK17-NEXT: br label [[COND_END:%.*]] 9516 // CHECK17: cond.false: 9517 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9518 // CHECK17-NEXT: br label [[COND_END]] 9519 // CHECK17: cond.end: 9520 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 9521 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 9522 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9523 // CHECK17-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 9524 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9525 // CHECK17: omp.inner.for.cond: 9526 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9527 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 9528 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1 9529 // CHECK17-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]] 9530 // CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9531 // CHECK17: omp.inner.for.body: 9532 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9533 // CHECK17-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 9534 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9535 // CHECK17-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 9536 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV]], align 4 9537 // CHECK17-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 9538 // CHECK17-NEXT: store i32 [[TMP21]], i32* [[CONV7]], align 4 9539 // CHECK17-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 9540 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP22]]) 9541 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9542 // CHECK17: omp.inner.for.inc: 9543 // CHECK17-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9544 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9545 // CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 9546 // CHECK17-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 9547 // CHECK17-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9548 // CHECK17-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9549 // CHECK17-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 9550 // CHECK17-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4 9551 // CHECK17-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9552 // CHECK17-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9553 // CHECK17-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP27]], [[TMP28]] 9554 // CHECK17-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4 9555 // CHECK17-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9556 // CHECK17-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 9557 // CHECK17-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]] 9558 // CHECK17-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]] 9559 // CHECK17: cond.true12: 9560 // CHECK17-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 9561 // CHECK17-NEXT: br label [[COND_END14:%.*]] 9562 // CHECK17: cond.false13: 9563 // CHECK17-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9564 // CHECK17-NEXT: br label [[COND_END14]] 9565 // CHECK17: cond.end14: 9566 // CHECK17-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE12]] ], [ [[TMP32]], [[COND_FALSE13]] ] 9567 // CHECK17-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4 9568 // CHECK17-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9569 // CHECK17-NEXT: store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4 9570 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 9571 // CHECK17: omp.inner.for.end: 9572 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9573 // CHECK17: omp.loop.exit: 9574 // CHECK17-NEXT: [[TMP34:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9575 // CHECK17-NEXT: [[TMP35:%.*]] = load i32, i32* [[TMP34]], align 4 9576 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP35]]) 9577 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 9578 // CHECK17: omp.precond.end: 9579 // CHECK17-NEXT: ret void 9580 // 9581 // 9582 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..7 9583 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 9584 // CHECK17-NEXT: entry: 9585 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9586 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9587 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 9588 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 9589 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 9590 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 9591 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 9592 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 9593 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9594 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 9595 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 9596 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 9597 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 9598 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9599 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9600 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9601 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9602 // CHECK17-NEXT: [[I6:%.*]] = alloca i32, align 4 9603 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9604 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9605 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9606 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9607 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 9608 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 9609 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 9610 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 9611 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 9612 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 9613 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 9614 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 9615 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 9616 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 9617 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9618 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 9619 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 9620 // CHECK17-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 9621 // CHECK17-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 9622 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4 9623 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9624 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 9625 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 9626 // CHECK17: omp.precond.then: 9627 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 9628 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 9629 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 9630 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9631 // CHECK17-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32 9632 // CHECK17-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9633 // CHECK17-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32 9634 // CHECK17-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 9635 // CHECK17-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 9636 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9637 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9638 // CHECK17-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9639 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 9640 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9641 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9642 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 9643 // CHECK17-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 9644 // CHECK17-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9645 // CHECK17: cond.true: 9646 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 9647 // CHECK17-NEXT: br label [[COND_END:%.*]] 9648 // CHECK17: cond.false: 9649 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9650 // CHECK17-NEXT: br label [[COND_END]] 9651 // CHECK17: cond.end: 9652 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 9653 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 9654 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9655 // CHECK17-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 9656 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9657 // CHECK17: omp.inner.for.cond: 9658 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9659 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9660 // CHECK17-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 9661 // CHECK17-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9662 // CHECK17: omp.inner.for.body: 9663 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9664 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 9665 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9666 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I6]], align 4 9667 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4 9668 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 9669 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 9670 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 9671 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9672 // CHECK17: omp.body.continue: 9673 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9674 // CHECK17: omp.inner.for.inc: 9675 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9676 // CHECK17-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1 9677 // CHECK17-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 9678 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 9679 // CHECK17: omp.inner.for.end: 9680 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9681 // CHECK17: omp.loop.exit: 9682 // CHECK17-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9683 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 9684 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 9685 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 9686 // CHECK17: omp.precond.end: 9687 // CHECK17-NEXT: ret void 9688 // 9689 // 9690 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163 9691 // CHECK17-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 9692 // CHECK17-NEXT: entry: 9693 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 9694 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 9695 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 9696 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 9697 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 9698 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 9699 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 9700 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 9701 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 9702 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 9703 // CHECK17-NEXT: ret void 9704 // 9705 // 9706 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..10 9707 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 9708 // CHECK17-NEXT: entry: 9709 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9710 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9711 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 9712 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 9713 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 9714 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9715 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 9716 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 9717 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 9718 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 9719 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9720 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9721 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9722 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9723 // CHECK17-NEXT: [[I3:%.*]] = alloca i32, align 4 9724 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9725 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9726 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 9727 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 9728 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 9729 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 9730 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 9731 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 9732 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 9733 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 9734 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9735 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 9736 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 9737 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 9738 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 9739 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4 9740 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9741 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 9742 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 9743 // CHECK17: omp.precond.then: 9744 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 9745 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9746 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 9747 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9748 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9749 // CHECK17-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9750 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 9751 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9752 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9753 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9754 // CHECK17-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 9755 // CHECK17-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9756 // CHECK17: cond.true: 9757 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9758 // CHECK17-NEXT: br label [[COND_END:%.*]] 9759 // CHECK17: cond.false: 9760 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9761 // CHECK17-NEXT: br label [[COND_END]] 9762 // CHECK17: cond.end: 9763 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 9764 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 9765 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9766 // CHECK17-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 9767 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9768 // CHECK17: omp.inner.for.cond: 9769 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9770 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9771 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 9772 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9773 // CHECK17: omp.inner.for.body: 9774 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9775 // CHECK17-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 9776 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9777 // CHECK17-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 9778 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 9779 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9780 // CHECK17: omp.inner.for.inc: 9781 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9782 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9783 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 9784 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 9785 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 9786 // CHECK17: omp.inner.for.end: 9787 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9788 // CHECK17: omp.loop.exit: 9789 // CHECK17-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9790 // CHECK17-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 9791 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 9792 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 9793 // CHECK17: omp.precond.end: 9794 // CHECK17-NEXT: ret void 9795 // 9796 // 9797 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..11 9798 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 9799 // CHECK17-NEXT: entry: 9800 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9801 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9802 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 9803 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 9804 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 9805 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 9806 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 9807 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9808 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 9809 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 9810 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 9811 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 9812 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9813 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9814 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9815 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9816 // CHECK17-NEXT: [[I4:%.*]] = alloca i32, align 4 9817 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9818 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9819 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9820 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9821 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 9822 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 9823 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 9824 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 9825 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 9826 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 9827 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 9828 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 9829 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9830 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 9831 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 9832 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 9833 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 9834 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4 9835 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9836 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 9837 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 9838 // CHECK17: omp.precond.then: 9839 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 9840 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9841 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 9842 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9843 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 9844 // CHECK17-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9845 // CHECK17-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 9846 // CHECK17-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 9847 // CHECK17-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 9848 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9849 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9850 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9851 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9852 // CHECK17-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9853 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 9854 // CHECK17-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1) 9855 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 9856 // CHECK17: omp.dispatch.cond: 9857 // CHECK17-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9858 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 9859 // CHECK17-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 9860 // CHECK17-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 9861 // CHECK17-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 9862 // CHECK17: omp.dispatch.body: 9863 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9864 // CHECK17-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 9865 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9866 // CHECK17: omp.inner.for.cond: 9867 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 9868 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15 9869 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 9870 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9871 // CHECK17: omp.inner.for.body: 9872 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 9873 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 9874 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9875 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !15 9876 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !15 9877 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64 9878 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 9879 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15 9880 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9881 // CHECK17: omp.body.continue: 9882 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9883 // CHECK17: omp.inner.for.inc: 9884 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 9885 // CHECK17-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1 9886 // CHECK17-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 9887 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 9888 // CHECK17: omp.inner.for.end: 9889 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 9890 // CHECK17: omp.dispatch.inc: 9891 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]] 9892 // CHECK17: omp.dispatch.end: 9893 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 9894 // CHECK17: omp.precond.end: 9895 // CHECK17-NEXT: ret void 9896 // 9897 // 9898 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168 9899 // CHECK17-SAME: (i64 noundef [[M:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 9900 // CHECK17-NEXT: entry: 9901 // CHECK17-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 9902 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 9903 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 9904 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 9905 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 9906 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 9907 // CHECK17-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 9908 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 9909 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 9910 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 9911 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* 9912 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 9913 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 9914 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 9915 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 4 9916 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 9917 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9918 // CHECK17-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 9919 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4 9920 // CHECK17-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 9921 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]]) 9922 // CHECK17-NEXT: ret void 9923 // 9924 // 9925 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..14 9926 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 9927 // CHECK17-NEXT: entry: 9928 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9929 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9930 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 9931 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 9932 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 9933 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 9934 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9935 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 9936 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 9937 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 9938 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 9939 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9940 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9941 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9942 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9943 // CHECK17-NEXT: [[I4:%.*]] = alloca i32, align 4 9944 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 9945 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9946 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9947 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 9948 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 9949 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 9950 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 9951 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 9952 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 9953 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 9954 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 9955 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 9956 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 9957 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9958 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 9959 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 9960 // CHECK17-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 9961 // CHECK17-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 9962 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4 9963 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9964 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 9965 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 9966 // CHECK17: omp.precond.then: 9967 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 9968 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 9969 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 9970 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9971 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9972 // CHECK17-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9973 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 9974 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9975 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9976 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 9977 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 9978 // CHECK17-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9979 // CHECK17: cond.true: 9980 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 9981 // CHECK17-NEXT: br label [[COND_END:%.*]] 9982 // CHECK17: cond.false: 9983 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9984 // CHECK17-NEXT: br label [[COND_END]] 9985 // CHECK17: cond.end: 9986 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 9987 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 9988 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9989 // CHECK17-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 9990 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9991 // CHECK17: omp.inner.for.cond: 9992 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9993 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9994 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 9995 // CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9996 // CHECK17: omp.inner.for.body: 9997 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9998 // CHECK17-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 9999 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10000 // CHECK17-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 10001 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV]], align 4 10002 // CHECK17-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 10003 // CHECK17-NEXT: store i32 [[TMP20]], i32* [[CONV7]], align 4 10004 // CHECK17-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 10005 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP21]]) 10006 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10007 // CHECK17: omp.inner.for.inc: 10008 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10009 // CHECK17-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 10010 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 10011 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 10012 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 10013 // CHECK17: omp.inner.for.end: 10014 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10015 // CHECK17: omp.loop.exit: 10016 // CHECK17-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10017 // CHECK17-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 10018 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) 10019 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 10020 // CHECK17: omp.precond.end: 10021 // CHECK17-NEXT: ret void 10022 // 10023 // 10024 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..15 10025 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 10026 // CHECK17-NEXT: entry: 10027 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10028 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10029 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 10030 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 10031 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 10032 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 10033 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 10034 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 10035 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10036 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 10037 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10038 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 10039 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 10040 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10041 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10042 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10043 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10044 // CHECK17-NEXT: [[I6:%.*]] = alloca i32, align 4 10045 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10046 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10047 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10048 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10049 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 10050 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 10051 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 10052 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 10053 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 10054 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 10055 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 10056 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 10057 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 10058 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 10059 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10060 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 10061 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10062 // CHECK17-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 10063 // CHECK17-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 10064 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4 10065 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10066 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 10067 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 10068 // CHECK17: omp.precond.then: 10069 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 10070 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 10071 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 10072 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10073 // CHECK17-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32 10074 // CHECK17-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10075 // CHECK17-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32 10076 // CHECK17-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 10077 // CHECK17-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 10078 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10079 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10080 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 4 10081 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 10082 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10083 // CHECK17-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10084 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 10085 // CHECK17-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]]) 10086 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 10087 // CHECK17: omp.dispatch.cond: 10088 // CHECK17-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10089 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 10090 // CHECK17-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 10091 // CHECK17-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 10092 // CHECK17-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 10093 // CHECK17: omp.dispatch.body: 10094 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 10095 // CHECK17-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 10096 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10097 // CHECK17: omp.inner.for.cond: 10098 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 10099 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18 10100 // CHECK17-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 10101 // CHECK17-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10102 // CHECK17: omp.inner.for.body: 10103 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 10104 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 10105 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10106 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !18 10107 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !18 10108 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 10109 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 10110 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18 10111 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10112 // CHECK17: omp.body.continue: 10113 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10114 // CHECK17: omp.inner.for.inc: 10115 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 10116 // CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], 1 10117 // CHECK17-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 10118 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]] 10119 // CHECK17: omp.inner.for.end: 10120 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 10121 // CHECK17: omp.dispatch.inc: 10122 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]] 10123 // CHECK17: omp.dispatch.end: 10124 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 10125 // CHECK17: omp.precond.end: 10126 // CHECK17-NEXT: ret void 10127 // 10128 // 10129 // CHECK17-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 10130 // CHECK17-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 10131 // CHECK17-NEXT: entry: 10132 // CHECK17-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 10133 // CHECK17-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 10134 // CHECK17-NEXT: [[M:%.*]] = alloca i32, align 4 10135 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 10136 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 10137 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 10138 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 10139 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8 10140 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8 10141 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8 10142 // CHECK17-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 10143 // CHECK17-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 10144 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 8 10145 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 8 10146 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 8 10147 // CHECK17-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 10148 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 8 10149 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 8 10150 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 8 10151 // CHECK17-NEXT: [[_TMP16:%.*]] = alloca i32, align 4 10152 // CHECK17-NEXT: [[M_CASTED19:%.*]] = alloca i64, align 8 10153 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [2 x i8*], align 8 10154 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS22:%.*]] = alloca [2 x i8*], align 8 10155 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [2 x i8*], align 8 10156 // CHECK17-NEXT: [[_TMP24:%.*]] = alloca i32, align 4 10157 // CHECK17-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 10158 // CHECK17-NEXT: store i32 10, i32* [[M]], align 4 10159 // CHECK17-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 10160 // CHECK17-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 10161 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8 10162 // CHECK17-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 10163 // CHECK17-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 10164 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8 10165 // CHECK17-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 10166 // CHECK17-NEXT: store i8* null, i8** [[TMP4]], align 8 10167 // CHECK17-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 10168 // CHECK17-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 10169 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 10170 // CHECK17-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.20, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.21, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 10171 // CHECK17-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 10172 // CHECK17-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 10173 // CHECK17: omp_offload.failed: 10174 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]] 10175 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]] 10176 // CHECK17: omp_offload.cont: 10177 // CHECK17-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 10178 // CHECK17-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** 10179 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8 10180 // CHECK17-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 10181 // CHECK17-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** 10182 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8 10183 // CHECK17-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0 10184 // CHECK17-NEXT: store i8* null, i8** [[TMP13]], align 8 10185 // CHECK17-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 10186 // CHECK17-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 10187 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 10188 // CHECK17-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.24, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.25, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 10189 // CHECK17-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 10190 // CHECK17-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 10191 // CHECK17: omp_offload.failed5: 10192 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121([10 x i32]* [[A]]) #[[ATTR3]] 10193 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT6]] 10194 // CHECK17: omp_offload.cont6: 10195 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[M]], align 4 10196 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[M_CASTED]] to i32* 10197 // CHECK17-NEXT: store i32 [[TMP18]], i32* [[CONV]], align 4 10198 // CHECK17-NEXT: [[TMP19:%.*]] = load i64, i64* [[M_CASTED]], align 8 10199 // CHECK17-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 10200 // CHECK17-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64* 10201 // CHECK17-NEXT: store i64 [[TMP19]], i64* [[TMP21]], align 8 10202 // CHECK17-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 10203 // CHECK17-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64* 10204 // CHECK17-NEXT: store i64 [[TMP19]], i64* [[TMP23]], align 8 10205 // CHECK17-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0 10206 // CHECK17-NEXT: store i8* null, i8** [[TMP24]], align 8 10207 // CHECK17-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1 10208 // CHECK17-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]** 10209 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 8 10210 // CHECK17-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1 10211 // CHECK17-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]** 10212 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 8 10213 // CHECK17-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 1 10214 // CHECK17-NEXT: store i8* null, i8** [[TMP29]], align 8 10215 // CHECK17-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 10216 // CHECK17-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 10217 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 10218 // CHECK17-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.28, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.29, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 10219 // CHECK17-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 10220 // CHECK17-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] 10221 // CHECK17: omp_offload.failed11: 10222 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i64 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]] 10223 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT12]] 10224 // CHECK17: omp_offload.cont12: 10225 // CHECK17-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 10226 // CHECK17-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]** 10227 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 8 10228 // CHECK17-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 10229 // CHECK17-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]** 10230 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 8 10231 // CHECK17-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i64 0, i64 0 10232 // CHECK17-NEXT: store i8* null, i8** [[TMP38]], align 8 10233 // CHECK17-NEXT: [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 10234 // CHECK17-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 10235 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 10236 // CHECK17-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.32, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.33, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 10237 // CHECK17-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0 10238 // CHECK17-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]] 10239 // CHECK17: omp_offload.failed17: 10240 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131([10 x i32]* [[A]]) #[[ATTR3]] 10241 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT18]] 10242 // CHECK17: omp_offload.cont18: 10243 // CHECK17-NEXT: [[TMP43:%.*]] = load i32, i32* [[M]], align 4 10244 // CHECK17-NEXT: [[CONV20:%.*]] = bitcast i64* [[M_CASTED19]] to i32* 10245 // CHECK17-NEXT: store i32 [[TMP43]], i32* [[CONV20]], align 4 10246 // CHECK17-NEXT: [[TMP44:%.*]] = load i64, i64* [[M_CASTED19]], align 8 10247 // CHECK17-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 10248 // CHECK17-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64* 10249 // CHECK17-NEXT: store i64 [[TMP44]], i64* [[TMP46]], align 8 10250 // CHECK17-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 10251 // CHECK17-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64* 10252 // CHECK17-NEXT: store i64 [[TMP44]], i64* [[TMP48]], align 8 10253 // CHECK17-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0 10254 // CHECK17-NEXT: store i8* null, i8** [[TMP49]], align 8 10255 // CHECK17-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1 10256 // CHECK17-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]** 10257 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 8 10258 // CHECK17-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1 10259 // CHECK17-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]** 10260 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 8 10261 // CHECK17-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1 10262 // CHECK17-NEXT: store i8* null, i8** [[TMP54]], align 8 10263 // CHECK17-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 10264 // CHECK17-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 10265 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 10266 // CHECK17-NEXT: [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.36, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.37, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 10267 // CHECK17-NEXT: [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0 10268 // CHECK17-NEXT: br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED25:%.*]], label [[OMP_OFFLOAD_CONT26:%.*]] 10269 // CHECK17: omp_offload.failed25: 10270 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i64 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]] 10271 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT26]] 10272 // CHECK17: omp_offload.cont26: 10273 // CHECK17-NEXT: ret i32 0 10274 // 10275 // 10276 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116 10277 // CHECK17-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 10278 // CHECK17-NEXT: entry: 10279 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 10280 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 10281 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 10282 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 10283 // CHECK17-NEXT: ret void 10284 // 10285 // 10286 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..18 10287 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 10288 // CHECK17-NEXT: entry: 10289 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10290 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10291 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 10292 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10293 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 10294 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 10295 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 10296 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10297 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10298 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 10299 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10300 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10301 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 10302 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 10303 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 10304 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 10305 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10306 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10307 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10308 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 10309 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10310 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10311 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 10312 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10313 // CHECK17: cond.true: 10314 // CHECK17-NEXT: br label [[COND_END:%.*]] 10315 // CHECK17: cond.false: 10316 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10317 // CHECK17-NEXT: br label [[COND_END]] 10318 // CHECK17: cond.end: 10319 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 10320 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 10321 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10322 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 10323 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10324 // CHECK17: omp.inner.for.cond: 10325 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10326 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10327 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 10328 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10329 // CHECK17: omp.inner.for.body: 10330 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10331 // CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 10332 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10333 // CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 10334 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..19 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]) 10335 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10336 // CHECK17: omp.inner.for.inc: 10337 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10338 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 10339 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 10340 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 10341 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 10342 // CHECK17: omp.inner.for.end: 10343 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10344 // CHECK17: omp.loop.exit: 10345 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 10346 // CHECK17-NEXT: ret void 10347 // 10348 // 10349 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..19 10350 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 10351 // CHECK17-NEXT: entry: 10352 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10353 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10354 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 10355 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 10356 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 10357 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10358 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 10359 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10360 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10361 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10362 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10363 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 10364 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10365 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10366 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10367 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10368 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 10369 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 10370 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 10371 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 10372 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10373 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 10374 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10375 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 10376 // CHECK17-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 10377 // CHECK17-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 10378 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10379 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10380 // CHECK17-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10381 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 10382 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10383 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10384 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 10385 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10386 // CHECK17: cond.true: 10387 // CHECK17-NEXT: br label [[COND_END:%.*]] 10388 // CHECK17: cond.false: 10389 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10390 // CHECK17-NEXT: br label [[COND_END]] 10391 // CHECK17: cond.end: 10392 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 10393 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 10394 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 10395 // CHECK17-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 10396 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10397 // CHECK17: omp.inner.for.cond: 10398 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10399 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10400 // CHECK17-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 10401 // CHECK17-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10402 // CHECK17: omp.inner.for.body: 10403 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10404 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 10405 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10406 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4 10407 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 10408 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 10409 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 10410 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 10411 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10412 // CHECK17: omp.body.continue: 10413 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10414 // CHECK17: omp.inner.for.inc: 10415 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10416 // CHECK17-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 10417 // CHECK17-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 10418 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 10419 // CHECK17: omp.inner.for.end: 10420 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10421 // CHECK17: omp.loop.exit: 10422 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 10423 // CHECK17-NEXT: ret void 10424 // 10425 // 10426 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121 10427 // CHECK17-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 10428 // CHECK17-NEXT: entry: 10429 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 10430 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 10431 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 10432 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..22 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 10433 // CHECK17-NEXT: ret void 10434 // 10435 // 10436 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..22 10437 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 10438 // CHECK17-NEXT: entry: 10439 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10440 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10441 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 10442 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10443 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 10444 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 10445 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 10446 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10447 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10448 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 10449 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10450 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10451 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 10452 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 10453 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 10454 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 10455 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10456 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10457 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10458 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 10459 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10460 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10461 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 10462 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10463 // CHECK17: cond.true: 10464 // CHECK17-NEXT: br label [[COND_END:%.*]] 10465 // CHECK17: cond.false: 10466 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10467 // CHECK17-NEXT: br label [[COND_END]] 10468 // CHECK17: cond.end: 10469 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 10470 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 10471 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10472 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 10473 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10474 // CHECK17: omp.inner.for.cond: 10475 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10476 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10477 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 10478 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10479 // CHECK17: omp.inner.for.body: 10480 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10481 // CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 10482 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10483 // CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 10484 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..23 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]) 10485 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10486 // CHECK17: omp.inner.for.inc: 10487 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10488 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 10489 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 10490 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 10491 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 10492 // CHECK17: omp.inner.for.end: 10493 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10494 // CHECK17: omp.loop.exit: 10495 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 10496 // CHECK17-NEXT: ret void 10497 // 10498 // 10499 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..23 10500 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 10501 // CHECK17-NEXT: entry: 10502 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10503 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10504 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 10505 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 10506 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 10507 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10508 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 10509 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10510 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10511 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10512 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10513 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 10514 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10515 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10516 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10517 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10518 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 10519 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 10520 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 10521 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 10522 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10523 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 10524 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10525 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 10526 // CHECK17-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 10527 // CHECK17-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 10528 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10529 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10530 // CHECK17-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10531 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 10532 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10533 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10534 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 10535 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10536 // CHECK17: cond.true: 10537 // CHECK17-NEXT: br label [[COND_END:%.*]] 10538 // CHECK17: cond.false: 10539 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10540 // CHECK17-NEXT: br label [[COND_END]] 10541 // CHECK17: cond.end: 10542 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 10543 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 10544 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 10545 // CHECK17-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 10546 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10547 // CHECK17: omp.inner.for.cond: 10548 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10549 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10550 // CHECK17-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 10551 // CHECK17-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10552 // CHECK17: omp.inner.for.body: 10553 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10554 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 10555 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10556 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4 10557 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 10558 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 10559 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 10560 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 10561 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10562 // CHECK17: omp.body.continue: 10563 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10564 // CHECK17: omp.inner.for.inc: 10565 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10566 // CHECK17-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 10567 // CHECK17-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 10568 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 10569 // CHECK17: omp.inner.for.end: 10570 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10571 // CHECK17: omp.loop.exit: 10572 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 10573 // CHECK17-NEXT: ret void 10574 // 10575 // 10576 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126 10577 // CHECK17-SAME: (i64 noundef [[M:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 10578 // CHECK17-NEXT: entry: 10579 // CHECK17-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 10580 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 10581 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 10582 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 10583 // CHECK17-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 10584 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 10585 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* 10586 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 10587 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 10588 // CHECK17-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 10589 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10590 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 10591 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 10592 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 10593 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..26 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]]) 10594 // CHECK17-NEXT: ret void 10595 // 10596 // 10597 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..26 10598 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 10599 // CHECK17-NEXT: entry: 10600 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10601 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10602 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 10603 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 10604 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10605 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 10606 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 10607 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 10608 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10609 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10610 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 10611 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 10612 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10613 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10614 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 10615 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 10616 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 10617 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 10618 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 10619 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 10620 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10621 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10622 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10623 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 10624 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10625 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10626 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 10627 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10628 // CHECK17: cond.true: 10629 // CHECK17-NEXT: br label [[COND_END:%.*]] 10630 // CHECK17: cond.false: 10631 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10632 // CHECK17-NEXT: br label [[COND_END]] 10633 // CHECK17: cond.end: 10634 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 10635 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 10636 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10637 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 10638 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10639 // CHECK17: omp.inner.for.cond: 10640 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10641 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10642 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 10643 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10644 // CHECK17: omp.inner.for.body: 10645 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10646 // CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 10647 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10648 // CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 10649 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 4 10650 // CHECK17-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 10651 // CHECK17-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4 10652 // CHECK17-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 10653 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..27 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]]) 10654 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10655 // CHECK17: omp.inner.for.inc: 10656 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10657 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 10658 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 10659 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 10660 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 10661 // CHECK17: omp.inner.for.end: 10662 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10663 // CHECK17: omp.loop.exit: 10664 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 10665 // CHECK17-NEXT: ret void 10666 // 10667 // 10668 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..27 10669 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 10670 // CHECK17-NEXT: entry: 10671 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10672 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10673 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 10674 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 10675 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 10676 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 10677 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10678 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 10679 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10680 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10681 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10682 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10683 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 10684 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10685 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10686 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10687 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10688 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 10689 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 10690 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 10691 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 10692 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 10693 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 10694 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10695 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 10696 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10697 // CHECK17-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 10698 // CHECK17-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4 10699 // CHECK17-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 10700 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10701 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10702 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4 10703 // CHECK17-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10704 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 10705 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]]) 10706 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 10707 // CHECK17: omp.dispatch.cond: 10708 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10709 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10710 // CHECK17-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 10711 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]] 10712 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10713 // CHECK17: cond.true: 10714 // CHECK17-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10715 // CHECK17-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 10716 // CHECK17-NEXT: br label [[COND_END:%.*]] 10717 // CHECK17: cond.false: 10718 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10719 // CHECK17-NEXT: br label [[COND_END]] 10720 // CHECK17: cond.end: 10721 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 10722 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 10723 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 10724 // CHECK17-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 10725 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10726 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10727 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 10728 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 10729 // CHECK17: omp.dispatch.body: 10730 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10731 // CHECK17: omp.inner.for.cond: 10732 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10733 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10734 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 10735 // CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10736 // CHECK17: omp.inner.for.body: 10737 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10738 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 10739 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10740 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4 10741 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4 10742 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 10743 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 10744 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 10745 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10746 // CHECK17: omp.body.continue: 10747 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10748 // CHECK17: omp.inner.for.inc: 10749 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10750 // CHECK17-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1 10751 // CHECK17-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 10752 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 10753 // CHECK17: omp.inner.for.end: 10754 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 10755 // CHECK17: omp.dispatch.inc: 10756 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 10757 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 10758 // CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 10759 // CHECK17-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 10760 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10761 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 10762 // CHECK17-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 10763 // CHECK17-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 10764 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]] 10765 // CHECK17: omp.dispatch.end: 10766 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 10767 // CHECK17-NEXT: ret void 10768 // 10769 // 10770 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131 10771 // CHECK17-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 10772 // CHECK17-NEXT: entry: 10773 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 10774 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 10775 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 10776 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..30 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 10777 // CHECK17-NEXT: ret void 10778 // 10779 // 10780 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..30 10781 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 10782 // CHECK17-NEXT: entry: 10783 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10784 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10785 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 10786 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10787 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 10788 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 10789 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 10790 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10791 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10792 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 10793 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10794 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10795 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 10796 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 10797 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 10798 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 10799 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10800 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10801 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10802 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 10803 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10804 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10805 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 10806 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10807 // CHECK17: cond.true: 10808 // CHECK17-NEXT: br label [[COND_END:%.*]] 10809 // CHECK17: cond.false: 10810 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10811 // CHECK17-NEXT: br label [[COND_END]] 10812 // CHECK17: cond.end: 10813 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 10814 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 10815 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10816 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 10817 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10818 // CHECK17: omp.inner.for.cond: 10819 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10820 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10821 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 10822 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10823 // CHECK17: omp.inner.for.body: 10824 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10825 // CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 10826 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10827 // CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 10828 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..31 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]) 10829 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10830 // CHECK17: omp.inner.for.inc: 10831 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10832 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 10833 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 10834 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 10835 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 10836 // CHECK17: omp.inner.for.end: 10837 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10838 // CHECK17: omp.loop.exit: 10839 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 10840 // CHECK17-NEXT: ret void 10841 // 10842 // 10843 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..31 10844 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 10845 // CHECK17-NEXT: entry: 10846 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10847 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10848 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 10849 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 10850 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 10851 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10852 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 10853 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10854 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10855 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10856 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10857 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 10858 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10859 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10860 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10861 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10862 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 10863 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 10864 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 10865 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 10866 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10867 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 10868 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10869 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 10870 // CHECK17-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 10871 // CHECK17-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 10872 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10873 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10874 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 10875 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10876 // CHECK17-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10877 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 10878 // CHECK17-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 10879 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 10880 // CHECK17: omp.dispatch.cond: 10881 // CHECK17-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 10882 // CHECK17-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 10883 // CHECK17-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 10884 // CHECK17: omp.dispatch.body: 10885 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 10886 // CHECK17-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 10887 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10888 // CHECK17: omp.inner.for.cond: 10889 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 10890 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21 10891 // CHECK17-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 10892 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10893 // CHECK17: omp.inner.for.body: 10894 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 10895 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 10896 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10897 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21 10898 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21 10899 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 10900 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 10901 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21 10902 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10903 // CHECK17: omp.body.continue: 10904 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10905 // CHECK17: omp.inner.for.inc: 10906 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 10907 // CHECK17-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 10908 // CHECK17-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 10909 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]] 10910 // CHECK17: omp.inner.for.end: 10911 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 10912 // CHECK17: omp.dispatch.inc: 10913 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]] 10914 // CHECK17: omp.dispatch.end: 10915 // CHECK17-NEXT: ret void 10916 // 10917 // 10918 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136 10919 // CHECK17-SAME: (i64 noundef [[M:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 10920 // CHECK17-NEXT: entry: 10921 // CHECK17-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 10922 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 10923 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 10924 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 10925 // CHECK17-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 10926 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 10927 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* 10928 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 10929 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 4 10930 // CHECK17-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 10931 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10932 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 10933 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 10934 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 10935 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..34 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]]) 10936 // CHECK17-NEXT: ret void 10937 // 10938 // 10939 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..34 10940 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 10941 // CHECK17-NEXT: entry: 10942 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10943 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10944 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 10945 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 10946 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10947 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 10948 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 10949 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 10950 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10951 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10952 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 10953 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 10954 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10955 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10956 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 10957 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 10958 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 10959 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 10960 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 10961 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 10962 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10963 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10964 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10965 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 10966 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10967 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10968 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 10969 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10970 // CHECK17: cond.true: 10971 // CHECK17-NEXT: br label [[COND_END:%.*]] 10972 // CHECK17: cond.false: 10973 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10974 // CHECK17-NEXT: br label [[COND_END]] 10975 // CHECK17: cond.end: 10976 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 10977 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 10978 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10979 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 10980 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10981 // CHECK17: omp.inner.for.cond: 10982 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10983 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10984 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 10985 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10986 // CHECK17: omp.inner.for.body: 10987 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10988 // CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 10989 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10990 // CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 10991 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 4 10992 // CHECK17-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 10993 // CHECK17-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4 10994 // CHECK17-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 10995 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..35 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]]) 10996 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10997 // CHECK17: omp.inner.for.inc: 10998 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10999 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 11000 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 11001 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 11002 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 11003 // CHECK17: omp.inner.for.end: 11004 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11005 // CHECK17: omp.loop.exit: 11006 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 11007 // CHECK17-NEXT: ret void 11008 // 11009 // 11010 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..35 11011 // CHECK17-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 11012 // CHECK17-NEXT: entry: 11013 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11014 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11015 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 11016 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 11017 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 11018 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 11019 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11020 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 11021 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 11022 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 11023 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11024 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11025 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 11026 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11027 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11028 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 11029 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11030 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 11031 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 11032 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 11033 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 11034 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 11035 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 11036 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 11037 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 11038 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11039 // CHECK17-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 11040 // CHECK17-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4 11041 // CHECK17-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 11042 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11043 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11044 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 4 11045 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 11046 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11047 // CHECK17-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11048 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 11049 // CHECK17-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]]) 11050 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 11051 // CHECK17: omp.dispatch.cond: 11052 // CHECK17-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 11053 // CHECK17-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0 11054 // CHECK17-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 11055 // CHECK17: omp.dispatch.body: 11056 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 11057 // CHECK17-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 11058 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11059 // CHECK17: omp.inner.for.cond: 11060 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 11061 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !24 11062 // CHECK17-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 11063 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11064 // CHECK17: omp.inner.for.body: 11065 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 11066 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 11067 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 11068 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !24 11069 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !24 11070 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 11071 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 11072 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !24 11073 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 11074 // CHECK17: omp.body.continue: 11075 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11076 // CHECK17: omp.inner.for.inc: 11077 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 11078 // CHECK17-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1 11079 // CHECK17-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 11080 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]] 11081 // CHECK17: omp.inner.for.end: 11082 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 11083 // CHECK17: omp.dispatch.inc: 11084 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]] 11085 // CHECK17: omp.dispatch.end: 11086 // CHECK17-NEXT: ret void 11087 // 11088 // 11089 // CHECK17-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 11090 // CHECK17-SAME: () #[[ATTR6:[0-9]+]] { 11091 // CHECK17-NEXT: entry: 11092 // CHECK17-NEXT: call void @__tgt_register_requires(i64 1) 11093 // CHECK17-NEXT: ret void 11094 // 11095 // 11096 // CHECK19-LABEL: define {{[^@]+}}@main 11097 // CHECK19-SAME: (i32 noundef [[ARGC:%.*]], i8** noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 11098 // CHECK19-NEXT: entry: 11099 // CHECK19-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 11100 // CHECK19-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 11101 // CHECK19-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 11102 // CHECK19-NEXT: [[N:%.*]] = alloca i32, align 4 11103 // CHECK19-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 11104 // CHECK19-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 11105 // CHECK19-NEXT: [[M:%.*]] = alloca i32, align 4 11106 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 11107 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 11108 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 11109 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 11110 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4 11111 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 11112 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 11113 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11114 // CHECK19-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4 11115 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4 11116 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4 11117 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4 11118 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4 11119 // CHECK19-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 11120 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 11121 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 11122 // CHECK19-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4 11123 // CHECK19-NEXT: [[N_CASTED17:%.*]] = alloca i32, align 4 11124 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS18:%.*]] = alloca [4 x i8*], align 4 11125 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS19:%.*]] = alloca [4 x i8*], align 4 11126 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS20:%.*]] = alloca [4 x i8*], align 4 11127 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES21:%.*]] = alloca [4 x i64], align 4 11128 // CHECK19-NEXT: [[_TMP22:%.*]] = alloca i32, align 4 11129 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_23:%.*]] = alloca i32, align 4 11130 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4 11131 // CHECK19-NEXT: [[N_CASTED31:%.*]] = alloca i32, align 4 11132 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS32:%.*]] = alloca [3 x i8*], align 4 11133 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS33:%.*]] = alloca [3 x i8*], align 4 11134 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS34:%.*]] = alloca [3 x i8*], align 4 11135 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES35:%.*]] = alloca [3 x i64], align 4 11136 // CHECK19-NEXT: [[_TMP36:%.*]] = alloca i32, align 4 11137 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_37:%.*]] = alloca i32, align 4 11138 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4 11139 // CHECK19-NEXT: [[M_CASTED45:%.*]] = alloca i32, align 4 11140 // CHECK19-NEXT: [[N_CASTED46:%.*]] = alloca i32, align 4 11141 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS47:%.*]] = alloca [4 x i8*], align 4 11142 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS48:%.*]] = alloca [4 x i8*], align 4 11143 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS49:%.*]] = alloca [4 x i8*], align 4 11144 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES50:%.*]] = alloca [4 x i64], align 4 11145 // CHECK19-NEXT: [[_TMP51:%.*]] = alloca i32, align 4 11146 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_52:%.*]] = alloca i32, align 4 11147 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_53:%.*]] = alloca i32, align 4 11148 // CHECK19-NEXT: store i32 0, i32* [[RETVAL]], align 4 11149 // CHECK19-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 11150 // CHECK19-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 11151 // CHECK19-NEXT: store i32 100, i32* [[N]], align 4 11152 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 11153 // CHECK19-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 11154 // CHECK19-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 11155 // CHECK19-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 11156 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 11157 // CHECK19-NEXT: store i32 10, i32* [[M]], align 4 11158 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 11159 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 11160 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 11161 // CHECK19-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4 11162 // CHECK19-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64 11163 // CHECK19-NEXT: [[TMP6:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES]] to i8* 11164 // CHECK19-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP6]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes to i8*), i32 24, i1 false) 11165 // CHECK19-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 11166 // CHECK19-NEXT: [[TMP8:%.*]] = bitcast i8** [[TMP7]] to i32* 11167 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[TMP8]], align 4 11168 // CHECK19-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 11169 // CHECK19-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to i32* 11170 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[TMP10]], align 4 11171 // CHECK19-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 11172 // CHECK19-NEXT: store i8* null, i8** [[TMP11]], align 4 11173 // CHECK19-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 11174 // CHECK19-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 11175 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4 11176 // CHECK19-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 11177 // CHECK19-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 11178 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4 11179 // CHECK19-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 11180 // CHECK19-NEXT: store i8* null, i8** [[TMP16]], align 4 11181 // CHECK19-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 11182 // CHECK19-NEXT: [[TMP18:%.*]] = bitcast i8** [[TMP17]] to i32** 11183 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP18]], align 4 11184 // CHECK19-NEXT: [[TMP19:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 11185 // CHECK19-NEXT: [[TMP20:%.*]] = bitcast i8** [[TMP19]] to i32** 11186 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP20]], align 4 11187 // CHECK19-NEXT: [[TMP21:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 11188 // CHECK19-NEXT: store i64 [[TMP5]], i64* [[TMP21]], align 4 11189 // CHECK19-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 11190 // CHECK19-NEXT: store i8* null, i8** [[TMP22]], align 4 11191 // CHECK19-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 11192 // CHECK19-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 11193 // CHECK19-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 11194 // CHECK19-NEXT: [[TMP26:%.*]] = load i32, i32* [[N]], align 4 11195 // CHECK19-NEXT: store i32 [[TMP26]], i32* [[DOTCAPTURE_EXPR_]], align 4 11196 // CHECK19-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11197 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP27]], 0 11198 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11199 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 11200 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 11201 // CHECK19-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11202 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP28]], 1 11203 // CHECK19-NEXT: [[TMP29:%.*]] = zext i32 [[ADD]] to i64 11204 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP29]]) 11205 // CHECK19-NEXT: [[TMP30:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, i32 3, i8** [[TMP23]], i8** [[TMP24]], i64* [[TMP25]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 11206 // CHECK19-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0 11207 // CHECK19-NEXT: br i1 [[TMP31]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 11208 // CHECK19: omp_offload.failed: 11209 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 11210 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]] 11211 // CHECK19: omp_offload.cont: 11212 // CHECK19-NEXT: [[TMP32:%.*]] = load i32, i32* [[N]], align 4 11213 // CHECK19-NEXT: store i32 [[TMP32]], i32* [[N_CASTED3]], align 4 11214 // CHECK19-NEXT: [[TMP33:%.*]] = load i32, i32* [[N_CASTED3]], align 4 11215 // CHECK19-NEXT: [[TMP34:%.*]] = mul nuw i32 [[TMP0]], 4 11216 // CHECK19-NEXT: [[TMP35:%.*]] = sext i32 [[TMP34]] to i64 11217 // CHECK19-NEXT: [[TMP36:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES7]] to i8* 11218 // CHECK19-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP36]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.4 to i8*), i32 24, i1 false) 11219 // CHECK19-NEXT: [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 11220 // CHECK19-NEXT: [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32* 11221 // CHECK19-NEXT: store i32 [[TMP33]], i32* [[TMP38]], align 4 11222 // CHECK19-NEXT: [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 11223 // CHECK19-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32* 11224 // CHECK19-NEXT: store i32 [[TMP33]], i32* [[TMP40]], align 4 11225 // CHECK19-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0 11226 // CHECK19-NEXT: store i8* null, i8** [[TMP41]], align 4 11227 // CHECK19-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 11228 // CHECK19-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i32* 11229 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP43]], align 4 11230 // CHECK19-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 11231 // CHECK19-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i32* 11232 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP45]], align 4 11233 // CHECK19-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1 11234 // CHECK19-NEXT: store i8* null, i8** [[TMP46]], align 4 11235 // CHECK19-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 11236 // CHECK19-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32** 11237 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP48]], align 4 11238 // CHECK19-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 11239 // CHECK19-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32** 11240 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP50]], align 4 11241 // CHECK19-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2 11242 // CHECK19-NEXT: store i64 [[TMP35]], i64* [[TMP51]], align 4 11243 // CHECK19-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2 11244 // CHECK19-NEXT: store i8* null, i8** [[TMP52]], align 4 11245 // CHECK19-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 11246 // CHECK19-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 11247 // CHECK19-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0 11248 // CHECK19-NEXT: [[TMP56:%.*]] = load i32, i32* [[N]], align 4 11249 // CHECK19-NEXT: store i32 [[TMP56]], i32* [[DOTCAPTURE_EXPR_9]], align 4 11250 // CHECK19-NEXT: [[TMP57:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4 11251 // CHECK19-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP57]], 0 11252 // CHECK19-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 11253 // CHECK19-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 11254 // CHECK19-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4 11255 // CHECK19-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 11256 // CHECK19-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP58]], 1 11257 // CHECK19-NEXT: [[TMP59:%.*]] = zext i32 [[ADD14]] to i64 11258 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP59]]) 11259 // CHECK19-NEXT: [[TMP60:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, i32 3, i8** [[TMP53]], i8** [[TMP54]], i64* [[TMP55]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 11260 // CHECK19-NEXT: [[TMP61:%.*]] = icmp ne i32 [[TMP60]], 0 11261 // CHECK19-NEXT: br i1 [[TMP61]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]] 11262 // CHECK19: omp_offload.failed15: 11263 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i32 [[TMP33]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 11264 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT16]] 11265 // CHECK19: omp_offload.cont16: 11266 // CHECK19-NEXT: [[TMP62:%.*]] = load i32, i32* [[M]], align 4 11267 // CHECK19-NEXT: store i32 [[TMP62]], i32* [[M_CASTED]], align 4 11268 // CHECK19-NEXT: [[TMP63:%.*]] = load i32, i32* [[M_CASTED]], align 4 11269 // CHECK19-NEXT: [[TMP64:%.*]] = load i32, i32* [[N]], align 4 11270 // CHECK19-NEXT: store i32 [[TMP64]], i32* [[N_CASTED17]], align 4 11271 // CHECK19-NEXT: [[TMP65:%.*]] = load i32, i32* [[N_CASTED17]], align 4 11272 // CHECK19-NEXT: [[TMP66:%.*]] = mul nuw i32 [[TMP0]], 4 11273 // CHECK19-NEXT: [[TMP67:%.*]] = sext i32 [[TMP66]] to i64 11274 // CHECK19-NEXT: [[TMP68:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES21]] to i8* 11275 // CHECK19-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP68]], i8* align 4 bitcast ([4 x i64]* @.offload_sizes.8 to i8*), i32 32, i1 false) 11276 // CHECK19-NEXT: [[TMP69:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0 11277 // CHECK19-NEXT: [[TMP70:%.*]] = bitcast i8** [[TMP69]] to i32* 11278 // CHECK19-NEXT: store i32 [[TMP63]], i32* [[TMP70]], align 4 11279 // CHECK19-NEXT: [[TMP71:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0 11280 // CHECK19-NEXT: [[TMP72:%.*]] = bitcast i8** [[TMP71]] to i32* 11281 // CHECK19-NEXT: store i32 [[TMP63]], i32* [[TMP72]], align 4 11282 // CHECK19-NEXT: [[TMP73:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 0 11283 // CHECK19-NEXT: store i8* null, i8** [[TMP73]], align 4 11284 // CHECK19-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 1 11285 // CHECK19-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i32* 11286 // CHECK19-NEXT: store i32 [[TMP65]], i32* [[TMP75]], align 4 11287 // CHECK19-NEXT: [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 1 11288 // CHECK19-NEXT: [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i32* 11289 // CHECK19-NEXT: store i32 [[TMP65]], i32* [[TMP77]], align 4 11290 // CHECK19-NEXT: [[TMP78:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 1 11291 // CHECK19-NEXT: store i8* null, i8** [[TMP78]], align 4 11292 // CHECK19-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 2 11293 // CHECK19-NEXT: [[TMP80:%.*]] = bitcast i8** [[TMP79]] to i32* 11294 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP80]], align 4 11295 // CHECK19-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 2 11296 // CHECK19-NEXT: [[TMP82:%.*]] = bitcast i8** [[TMP81]] to i32* 11297 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP82]], align 4 11298 // CHECK19-NEXT: [[TMP83:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 2 11299 // CHECK19-NEXT: store i8* null, i8** [[TMP83]], align 4 11300 // CHECK19-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 3 11301 // CHECK19-NEXT: [[TMP85:%.*]] = bitcast i8** [[TMP84]] to i32** 11302 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP85]], align 4 11303 // CHECK19-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 3 11304 // CHECK19-NEXT: [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i32** 11305 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP87]], align 4 11306 // CHECK19-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 3 11307 // CHECK19-NEXT: store i64 [[TMP67]], i64* [[TMP88]], align 4 11308 // CHECK19-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 3 11309 // CHECK19-NEXT: store i8* null, i8** [[TMP89]], align 4 11310 // CHECK19-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0 11311 // CHECK19-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0 11312 // CHECK19-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0 11313 // CHECK19-NEXT: [[TMP93:%.*]] = load i32, i32* [[N]], align 4 11314 // CHECK19-NEXT: store i32 [[TMP93]], i32* [[DOTCAPTURE_EXPR_23]], align 4 11315 // CHECK19-NEXT: [[TMP94:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_23]], align 4 11316 // CHECK19-NEXT: [[SUB25:%.*]] = sub nsw i32 [[TMP94]], 0 11317 // CHECK19-NEXT: [[DIV26:%.*]] = sdiv i32 [[SUB25]], 1 11318 // CHECK19-NEXT: [[SUB27:%.*]] = sub nsw i32 [[DIV26]], 1 11319 // CHECK19-NEXT: store i32 [[SUB27]], i32* [[DOTCAPTURE_EXPR_24]], align 4 11320 // CHECK19-NEXT: [[TMP95:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4 11321 // CHECK19-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP95]], 1 11322 // CHECK19-NEXT: [[TMP96:%.*]] = zext i32 [[ADD28]] to i64 11323 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP96]]) 11324 // CHECK19-NEXT: [[TMP97:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, i32 4, i8** [[TMP90]], i8** [[TMP91]], i64* [[TMP92]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 11325 // CHECK19-NEXT: [[TMP98:%.*]] = icmp ne i32 [[TMP97]], 0 11326 // CHECK19-NEXT: br i1 [[TMP98]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]] 11327 // CHECK19: omp_offload.failed29: 11328 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i32 [[TMP63]], i32 [[TMP65]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 11329 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT30]] 11330 // CHECK19: omp_offload.cont30: 11331 // CHECK19-NEXT: [[TMP99:%.*]] = load i32, i32* [[N]], align 4 11332 // CHECK19-NEXT: store i32 [[TMP99]], i32* [[N_CASTED31]], align 4 11333 // CHECK19-NEXT: [[TMP100:%.*]] = load i32, i32* [[N_CASTED31]], align 4 11334 // CHECK19-NEXT: [[TMP101:%.*]] = mul nuw i32 [[TMP0]], 4 11335 // CHECK19-NEXT: [[TMP102:%.*]] = sext i32 [[TMP101]] to i64 11336 // CHECK19-NEXT: [[TMP103:%.*]] = bitcast [3 x i64]* [[DOTOFFLOAD_SIZES35]] to i8* 11337 // CHECK19-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP103]], i8* align 4 bitcast ([3 x i64]* @.offload_sizes.12 to i8*), i32 24, i1 false) 11338 // CHECK19-NEXT: [[TMP104:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0 11339 // CHECK19-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to i32* 11340 // CHECK19-NEXT: store i32 [[TMP100]], i32* [[TMP105]], align 4 11341 // CHECK19-NEXT: [[TMP106:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0 11342 // CHECK19-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to i32* 11343 // CHECK19-NEXT: store i32 [[TMP100]], i32* [[TMP107]], align 4 11344 // CHECK19-NEXT: [[TMP108:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 0 11345 // CHECK19-NEXT: store i8* null, i8** [[TMP108]], align 4 11346 // CHECK19-NEXT: [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 1 11347 // CHECK19-NEXT: [[TMP110:%.*]] = bitcast i8** [[TMP109]] to i32* 11348 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP110]], align 4 11349 // CHECK19-NEXT: [[TMP111:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 1 11350 // CHECK19-NEXT: [[TMP112:%.*]] = bitcast i8** [[TMP111]] to i32* 11351 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP112]], align 4 11352 // CHECK19-NEXT: [[TMP113:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 1 11353 // CHECK19-NEXT: store i8* null, i8** [[TMP113]], align 4 11354 // CHECK19-NEXT: [[TMP114:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 2 11355 // CHECK19-NEXT: [[TMP115:%.*]] = bitcast i8** [[TMP114]] to i32** 11356 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP115]], align 4 11357 // CHECK19-NEXT: [[TMP116:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 2 11358 // CHECK19-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to i32** 11359 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP117]], align 4 11360 // CHECK19-NEXT: [[TMP118:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 2 11361 // CHECK19-NEXT: store i64 [[TMP102]], i64* [[TMP118]], align 4 11362 // CHECK19-NEXT: [[TMP119:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 2 11363 // CHECK19-NEXT: store i8* null, i8** [[TMP119]], align 4 11364 // CHECK19-NEXT: [[TMP120:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0 11365 // CHECK19-NEXT: [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0 11366 // CHECK19-NEXT: [[TMP122:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 0 11367 // CHECK19-NEXT: [[TMP123:%.*]] = load i32, i32* [[N]], align 4 11368 // CHECK19-NEXT: store i32 [[TMP123]], i32* [[DOTCAPTURE_EXPR_37]], align 4 11369 // CHECK19-NEXT: [[TMP124:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_37]], align 4 11370 // CHECK19-NEXT: [[SUB39:%.*]] = sub nsw i32 [[TMP124]], 0 11371 // CHECK19-NEXT: [[DIV40:%.*]] = sdiv i32 [[SUB39]], 1 11372 // CHECK19-NEXT: [[SUB41:%.*]] = sub nsw i32 [[DIV40]], 1 11373 // CHECK19-NEXT: store i32 [[SUB41]], i32* [[DOTCAPTURE_EXPR_38]], align 4 11374 // CHECK19-NEXT: [[TMP125:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_38]], align 4 11375 // CHECK19-NEXT: [[ADD42:%.*]] = add nsw i32 [[TMP125]], 1 11376 // CHECK19-NEXT: [[TMP126:%.*]] = zext i32 [[ADD42]] to i64 11377 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP126]]) 11378 // CHECK19-NEXT: [[TMP127:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, i32 3, i8** [[TMP120]], i8** [[TMP121]], i64* [[TMP122]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 11379 // CHECK19-NEXT: [[TMP128:%.*]] = icmp ne i32 [[TMP127]], 0 11380 // CHECK19-NEXT: br i1 [[TMP128]], label [[OMP_OFFLOAD_FAILED43:%.*]], label [[OMP_OFFLOAD_CONT44:%.*]] 11381 // CHECK19: omp_offload.failed43: 11382 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i32 [[TMP100]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 11383 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT44]] 11384 // CHECK19: omp_offload.cont44: 11385 // CHECK19-NEXT: [[TMP129:%.*]] = load i32, i32* [[M]], align 4 11386 // CHECK19-NEXT: store i32 [[TMP129]], i32* [[M_CASTED45]], align 4 11387 // CHECK19-NEXT: [[TMP130:%.*]] = load i32, i32* [[M_CASTED45]], align 4 11388 // CHECK19-NEXT: [[TMP131:%.*]] = load i32, i32* [[N]], align 4 11389 // CHECK19-NEXT: store i32 [[TMP131]], i32* [[N_CASTED46]], align 4 11390 // CHECK19-NEXT: [[TMP132:%.*]] = load i32, i32* [[N_CASTED46]], align 4 11391 // CHECK19-NEXT: [[TMP133:%.*]] = mul nuw i32 [[TMP0]], 4 11392 // CHECK19-NEXT: [[TMP134:%.*]] = sext i32 [[TMP133]] to i64 11393 // CHECK19-NEXT: [[TMP135:%.*]] = bitcast [4 x i64]* [[DOTOFFLOAD_SIZES50]] to i8* 11394 // CHECK19-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP135]], i8* align 4 bitcast ([4 x i64]* @.offload_sizes.16 to i8*), i32 32, i1 false) 11395 // CHECK19-NEXT: [[TMP136:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0 11396 // CHECK19-NEXT: [[TMP137:%.*]] = bitcast i8** [[TMP136]] to i32* 11397 // CHECK19-NEXT: store i32 [[TMP130]], i32* [[TMP137]], align 4 11398 // CHECK19-NEXT: [[TMP138:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0 11399 // CHECK19-NEXT: [[TMP139:%.*]] = bitcast i8** [[TMP138]] to i32* 11400 // CHECK19-NEXT: store i32 [[TMP130]], i32* [[TMP139]], align 4 11401 // CHECK19-NEXT: [[TMP140:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 0 11402 // CHECK19-NEXT: store i8* null, i8** [[TMP140]], align 4 11403 // CHECK19-NEXT: [[TMP141:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 1 11404 // CHECK19-NEXT: [[TMP142:%.*]] = bitcast i8** [[TMP141]] to i32* 11405 // CHECK19-NEXT: store i32 [[TMP132]], i32* [[TMP142]], align 4 11406 // CHECK19-NEXT: [[TMP143:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 1 11407 // CHECK19-NEXT: [[TMP144:%.*]] = bitcast i8** [[TMP143]] to i32* 11408 // CHECK19-NEXT: store i32 [[TMP132]], i32* [[TMP144]], align 4 11409 // CHECK19-NEXT: [[TMP145:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 1 11410 // CHECK19-NEXT: store i8* null, i8** [[TMP145]], align 4 11411 // CHECK19-NEXT: [[TMP146:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 2 11412 // CHECK19-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i32* 11413 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP147]], align 4 11414 // CHECK19-NEXT: [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 2 11415 // CHECK19-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i32* 11416 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP149]], align 4 11417 // CHECK19-NEXT: [[TMP150:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 2 11418 // CHECK19-NEXT: store i8* null, i8** [[TMP150]], align 4 11419 // CHECK19-NEXT: [[TMP151:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 3 11420 // CHECK19-NEXT: [[TMP152:%.*]] = bitcast i8** [[TMP151]] to i32** 11421 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP152]], align 4 11422 // CHECK19-NEXT: [[TMP153:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 3 11423 // CHECK19-NEXT: [[TMP154:%.*]] = bitcast i8** [[TMP153]] to i32** 11424 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP154]], align 4 11425 // CHECK19-NEXT: [[TMP155:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 3 11426 // CHECK19-NEXT: store i64 [[TMP134]], i64* [[TMP155]], align 4 11427 // CHECK19-NEXT: [[TMP156:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 3 11428 // CHECK19-NEXT: store i8* null, i8** [[TMP156]], align 4 11429 // CHECK19-NEXT: [[TMP157:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0 11430 // CHECK19-NEXT: [[TMP158:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0 11431 // CHECK19-NEXT: [[TMP159:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 0 11432 // CHECK19-NEXT: [[TMP160:%.*]] = load i32, i32* [[N]], align 4 11433 // CHECK19-NEXT: store i32 [[TMP160]], i32* [[DOTCAPTURE_EXPR_52]], align 4 11434 // CHECK19-NEXT: [[TMP161:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_52]], align 4 11435 // CHECK19-NEXT: [[SUB54:%.*]] = sub nsw i32 [[TMP161]], 0 11436 // CHECK19-NEXT: [[DIV55:%.*]] = sdiv i32 [[SUB54]], 1 11437 // CHECK19-NEXT: [[SUB56:%.*]] = sub nsw i32 [[DIV55]], 1 11438 // CHECK19-NEXT: store i32 [[SUB56]], i32* [[DOTCAPTURE_EXPR_53]], align 4 11439 // CHECK19-NEXT: [[TMP162:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_53]], align 4 11440 // CHECK19-NEXT: [[ADD57:%.*]] = add nsw i32 [[TMP162]], 1 11441 // CHECK19-NEXT: [[TMP163:%.*]] = zext i32 [[ADD57]] to i64 11442 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP163]]) 11443 // CHECK19-NEXT: [[TMP164:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, i32 4, i8** [[TMP157]], i8** [[TMP158]], i64* [[TMP159]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 11444 // CHECK19-NEXT: [[TMP165:%.*]] = icmp ne i32 [[TMP164]], 0 11445 // CHECK19-NEXT: br i1 [[TMP165]], label [[OMP_OFFLOAD_FAILED58:%.*]], label [[OMP_OFFLOAD_CONT59:%.*]] 11446 // CHECK19: omp_offload.failed58: 11447 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i32 [[TMP130]], i32 [[TMP132]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 11448 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT59]] 11449 // CHECK19: omp_offload.cont59: 11450 // CHECK19-NEXT: [[TMP166:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 11451 // CHECK19-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP166]]) 11452 // CHECK19-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 11453 // CHECK19-NEXT: [[TMP167:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 11454 // CHECK19-NEXT: call void @llvm.stackrestore(i8* [[TMP167]]) 11455 // CHECK19-NEXT: [[TMP168:%.*]] = load i32, i32* [[RETVAL]], align 4 11456 // CHECK19-NEXT: ret i32 [[TMP168]] 11457 // 11458 // 11459 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148 11460 // CHECK19-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 11461 // CHECK19-NEXT: entry: 11462 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 11463 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 11464 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 11465 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 11466 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 11467 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 11468 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 11469 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 11470 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 11471 // CHECK19-NEXT: ret void 11472 // 11473 // 11474 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined. 11475 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 11476 // CHECK19-NEXT: entry: 11477 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 11478 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 11479 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 11480 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 11481 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 11482 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11483 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 11484 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 11485 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11486 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 11487 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 11488 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 11489 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11490 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11491 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4 11492 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 11493 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 11494 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 11495 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 11496 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 11497 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 11498 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 11499 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 11500 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 11501 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 11502 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11503 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 11504 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11505 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 11506 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 11507 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4 11508 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11509 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 11510 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11511 // CHECK19: omp.precond.then: 11512 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 11513 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11514 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 11515 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11516 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11517 // CHECK19-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 11518 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 11519 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 11520 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11521 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11522 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 11523 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11524 // CHECK19: cond.true: 11525 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11526 // CHECK19-NEXT: br label [[COND_END:%.*]] 11527 // CHECK19: cond.false: 11528 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11529 // CHECK19-NEXT: br label [[COND_END]] 11530 // CHECK19: cond.end: 11531 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 11532 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 11533 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11534 // CHECK19-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 11535 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11536 // CHECK19: omp.inner.for.cond: 11537 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11538 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11539 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 11540 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11541 // CHECK19: omp.inner.for.body: 11542 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11543 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11544 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 11545 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11546 // CHECK19: omp.inner.for.inc: 11547 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11548 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 11549 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 11550 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 11551 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 11552 // CHECK19: omp.inner.for.end: 11553 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11554 // CHECK19: omp.loop.exit: 11555 // CHECK19-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 11556 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 11557 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 11558 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 11559 // CHECK19: omp.precond.end: 11560 // CHECK19-NEXT: ret void 11561 // 11562 // 11563 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..1 11564 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 11565 // CHECK19-NEXT: entry: 11566 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 11567 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 11568 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 11569 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 11570 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 11571 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 11572 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 11573 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11574 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 11575 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 11576 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11577 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 11578 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 11579 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 11580 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11581 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11582 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4 11583 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 11584 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 11585 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 11586 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 11587 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 11588 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 11589 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 11590 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 11591 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 11592 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 11593 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 11594 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 11595 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11596 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 11597 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11598 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 11599 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 11600 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4 11601 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11602 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 11603 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11604 // CHECK19: omp.precond.then: 11605 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 11606 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11607 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 11608 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 11609 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 11610 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 11611 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 11612 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11613 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11614 // CHECK19-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 11615 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 11616 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 11617 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11618 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11619 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 11620 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11621 // CHECK19: cond.true: 11622 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11623 // CHECK19-NEXT: br label [[COND_END:%.*]] 11624 // CHECK19: cond.false: 11625 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11626 // CHECK19-NEXT: br label [[COND_END]] 11627 // CHECK19: cond.end: 11628 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 11629 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 11630 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 11631 // CHECK19-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 11632 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11633 // CHECK19: omp.inner.for.cond: 11634 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11635 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11636 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 11637 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11638 // CHECK19: omp.inner.for.body: 11639 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11640 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 11641 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 11642 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 11643 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4 11644 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]] 11645 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 11646 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 11647 // CHECK19: omp.body.continue: 11648 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11649 // CHECK19: omp.inner.for.inc: 11650 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11651 // CHECK19-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1 11652 // CHECK19-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 11653 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 11654 // CHECK19: omp.inner.for.end: 11655 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11656 // CHECK19: omp.loop.exit: 11657 // CHECK19-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 11658 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 11659 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 11660 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 11661 // CHECK19: omp.precond.end: 11662 // CHECK19-NEXT: ret void 11663 // 11664 // 11665 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153 11666 // CHECK19-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 11667 // CHECK19-NEXT: entry: 11668 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 11669 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 11670 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 11671 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 11672 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 11673 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 11674 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 11675 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 11676 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 11677 // CHECK19-NEXT: ret void 11678 // 11679 // 11680 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..2 11681 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 11682 // CHECK19-NEXT: entry: 11683 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 11684 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 11685 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 11686 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 11687 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 11688 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11689 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 11690 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 11691 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11692 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 11693 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 11694 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 11695 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11696 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11697 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4 11698 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 11699 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 11700 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 11701 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 11702 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 11703 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 11704 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 11705 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 11706 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 11707 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 11708 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11709 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 11710 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11711 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 11712 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 11713 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4 11714 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11715 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 11716 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11717 // CHECK19: omp.precond.then: 11718 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 11719 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11720 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 11721 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11722 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11723 // CHECK19-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 11724 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 11725 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 11726 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11727 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11728 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 11729 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11730 // CHECK19: cond.true: 11731 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11732 // CHECK19-NEXT: br label [[COND_END:%.*]] 11733 // CHECK19: cond.false: 11734 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11735 // CHECK19-NEXT: br label [[COND_END]] 11736 // CHECK19: cond.end: 11737 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 11738 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 11739 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11740 // CHECK19-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 11741 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11742 // CHECK19: omp.inner.for.cond: 11743 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11744 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11745 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 11746 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11747 // CHECK19: omp.inner.for.body: 11748 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11749 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11750 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 11751 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11752 // CHECK19: omp.inner.for.inc: 11753 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11754 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 11755 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 11756 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 11757 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 11758 // CHECK19: omp.inner.for.end: 11759 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11760 // CHECK19: omp.loop.exit: 11761 // CHECK19-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 11762 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 11763 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 11764 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 11765 // CHECK19: omp.precond.end: 11766 // CHECK19-NEXT: ret void 11767 // 11768 // 11769 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..3 11770 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 11771 // CHECK19-NEXT: entry: 11772 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 11773 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 11774 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 11775 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 11776 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 11777 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 11778 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 11779 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11780 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 11781 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 11782 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11783 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 11784 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 11785 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 11786 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11787 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11788 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4 11789 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 11790 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 11791 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 11792 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 11793 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 11794 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 11795 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 11796 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 11797 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 11798 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 11799 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 11800 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 11801 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11802 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 11803 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11804 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 11805 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 11806 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4 11807 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11808 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 11809 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11810 // CHECK19: omp.precond.then: 11811 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 11812 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11813 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 11814 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 11815 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 11816 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 11817 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 11818 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11819 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11820 // CHECK19-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 11821 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 11822 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 11823 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11824 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11825 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 11826 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11827 // CHECK19: cond.true: 11828 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11829 // CHECK19-NEXT: br label [[COND_END:%.*]] 11830 // CHECK19: cond.false: 11831 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11832 // CHECK19-NEXT: br label [[COND_END]] 11833 // CHECK19: cond.end: 11834 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 11835 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 11836 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 11837 // CHECK19-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 11838 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11839 // CHECK19: omp.inner.for.cond: 11840 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11841 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11842 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 11843 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11844 // CHECK19: omp.inner.for.body: 11845 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11846 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 11847 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 11848 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 11849 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4 11850 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]] 11851 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 11852 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 11853 // CHECK19: omp.body.continue: 11854 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11855 // CHECK19: omp.inner.for.inc: 11856 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11857 // CHECK19-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1 11858 // CHECK19-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 11859 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 11860 // CHECK19: omp.inner.for.end: 11861 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11862 // CHECK19: omp.loop.exit: 11863 // CHECK19-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 11864 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 11865 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 11866 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 11867 // CHECK19: omp.precond.end: 11868 // CHECK19-NEXT: ret void 11869 // 11870 // 11871 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158 11872 // CHECK19-SAME: (i32 noundef [[M:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 11873 // CHECK19-NEXT: entry: 11874 // CHECK19-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 11875 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 11876 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 11877 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 11878 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 11879 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 11880 // CHECK19-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 11881 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 11882 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 11883 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 11884 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 11885 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 11886 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4 11887 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 11888 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11889 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 11890 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 11891 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]]) 11892 // CHECK19-NEXT: ret void 11893 // 11894 // 11895 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..6 11896 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 11897 // CHECK19-NEXT: entry: 11898 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 11899 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 11900 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 11901 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 11902 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 11903 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 11904 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11905 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 11906 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11907 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 11908 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 11909 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 11910 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 11911 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11912 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11913 // CHECK19-NEXT: [[I4:%.*]] = alloca i32, align 4 11914 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 11915 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 11916 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 11917 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 11918 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 11919 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 11920 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 11921 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 11922 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 11923 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 11924 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 11925 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 11926 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11927 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 11928 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11929 // CHECK19-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 11930 // CHECK19-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 11931 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4 11932 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11933 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 11934 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11935 // CHECK19: omp.precond.then: 11936 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 11937 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 11938 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 11939 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11940 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11941 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 11942 // CHECK19-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 11943 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 11944 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]]) 11945 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11946 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 11947 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 11948 // CHECK19-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11949 // CHECK19: cond.true: 11950 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 11951 // CHECK19-NEXT: br label [[COND_END:%.*]] 11952 // CHECK19: cond.false: 11953 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11954 // CHECK19-NEXT: br label [[COND_END]] 11955 // CHECK19: cond.end: 11956 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 11957 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 11958 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11959 // CHECK19-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 11960 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11961 // CHECK19: omp.inner.for.cond: 11962 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11963 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 11964 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1 11965 // CHECK19-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]] 11966 // CHECK19-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11967 // CHECK19: omp.inner.for.body: 11968 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11969 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11970 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 11971 // CHECK19-NEXT: store i32 [[TMP19]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 11972 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 11973 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP20]]) 11974 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11975 // CHECK19: omp.inner.for.inc: 11976 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11977 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 11978 // CHECK19-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 11979 // CHECK19-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 11980 // CHECK19-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11981 // CHECK19-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 11982 // CHECK19-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 11983 // CHECK19-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4 11984 // CHECK19-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11985 // CHECK19-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 11986 // CHECK19-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 11987 // CHECK19-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4 11988 // CHECK19-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11989 // CHECK19-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 11990 // CHECK19-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP27]], [[TMP28]] 11991 // CHECK19-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]] 11992 // CHECK19: cond.true11: 11993 // CHECK19-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 11994 // CHECK19-NEXT: br label [[COND_END13:%.*]] 11995 // CHECK19: cond.false12: 11996 // CHECK19-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11997 // CHECK19-NEXT: br label [[COND_END13]] 11998 // CHECK19: cond.end13: 11999 // CHECK19-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP29]], [[COND_TRUE11]] ], [ [[TMP30]], [[COND_FALSE12]] ] 12000 // CHECK19-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4 12001 // CHECK19-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 12002 // CHECK19-NEXT: store i32 [[TMP31]], i32* [[DOTOMP_IV]], align 4 12003 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 12004 // CHECK19: omp.inner.for.end: 12005 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12006 // CHECK19: omp.loop.exit: 12007 // CHECK19-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12008 // CHECK19-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4 12009 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]]) 12010 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 12011 // CHECK19: omp.precond.end: 12012 // CHECK19-NEXT: ret void 12013 // 12014 // 12015 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..7 12016 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 12017 // CHECK19-NEXT: entry: 12018 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 12019 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 12020 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 12021 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 12022 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 12023 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 12024 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 12025 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 12026 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12027 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 12028 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 12029 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 12030 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 12031 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 12032 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 12033 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12034 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12035 // CHECK19-NEXT: [[I4:%.*]] = alloca i32, align 4 12036 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 12037 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 12038 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 12039 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 12040 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 12041 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 12042 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 12043 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 12044 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 12045 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 12046 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 12047 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 12048 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 12049 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12050 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 12051 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 12052 // CHECK19-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 12053 // CHECK19-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 12054 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4 12055 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12056 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 12057 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 12058 // CHECK19: omp.precond.then: 12059 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 12060 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 12061 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 12062 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 12063 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 12064 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 12065 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 12066 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12067 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 12068 // CHECK19-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12069 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 12070 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 12071 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12072 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 12073 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 12074 // CHECK19-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12075 // CHECK19: cond.true: 12076 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 12077 // CHECK19-NEXT: br label [[COND_END:%.*]] 12078 // CHECK19: cond.false: 12079 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12080 // CHECK19-NEXT: br label [[COND_END]] 12081 // CHECK19: cond.end: 12082 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 12083 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 12084 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 12085 // CHECK19-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 12086 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12087 // CHECK19: omp.inner.for.cond: 12088 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12089 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12090 // CHECK19-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 12091 // CHECK19-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12092 // CHECK19: omp.inner.for.body: 12093 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12094 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 12095 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 12096 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 12097 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4 12098 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]] 12099 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 12100 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 12101 // CHECK19: omp.body.continue: 12102 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12103 // CHECK19: omp.inner.for.inc: 12104 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12105 // CHECK19-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 12106 // CHECK19-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 12107 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 12108 // CHECK19: omp.inner.for.end: 12109 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12110 // CHECK19: omp.loop.exit: 12111 // CHECK19-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12112 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 12113 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 12114 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 12115 // CHECK19: omp.precond.end: 12116 // CHECK19-NEXT: ret void 12117 // 12118 // 12119 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163 12120 // CHECK19-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 12121 // CHECK19-NEXT: entry: 12122 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 12123 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 12124 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 12125 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 12126 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 12127 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 12128 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 12129 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 12130 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 12131 // CHECK19-NEXT: ret void 12132 // 12133 // 12134 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..10 12135 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 12136 // CHECK19-NEXT: entry: 12137 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 12138 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 12139 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 12140 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 12141 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 12142 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12143 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 12144 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 12145 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 12146 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 12147 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 12148 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 12149 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12150 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12151 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4 12152 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 12153 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 12154 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 12155 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 12156 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 12157 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 12158 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 12159 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 12160 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 12161 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 12162 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 12163 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 12164 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 12165 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 12166 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 12167 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4 12168 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 12169 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 12170 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 12171 // CHECK19: omp.precond.then: 12172 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 12173 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12174 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 12175 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12176 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 12177 // CHECK19-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12178 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 12179 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 12180 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12181 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12182 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 12183 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12184 // CHECK19: cond.true: 12185 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12186 // CHECK19-NEXT: br label [[COND_END:%.*]] 12187 // CHECK19: cond.false: 12188 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12189 // CHECK19-NEXT: br label [[COND_END]] 12190 // CHECK19: cond.end: 12191 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 12192 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 12193 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 12194 // CHECK19-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 12195 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12196 // CHECK19: omp.inner.for.cond: 12197 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12198 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12199 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 12200 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12201 // CHECK19: omp.inner.for.body: 12202 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 12203 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12204 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 12205 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12206 // CHECK19: omp.inner.for.inc: 12207 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12208 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 12209 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 12210 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 12211 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 12212 // CHECK19: omp.inner.for.end: 12213 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12214 // CHECK19: omp.loop.exit: 12215 // CHECK19-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12216 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 12217 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 12218 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 12219 // CHECK19: omp.precond.end: 12220 // CHECK19-NEXT: ret void 12221 // 12222 // 12223 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..11 12224 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 12225 // CHECK19-NEXT: entry: 12226 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 12227 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 12228 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 12229 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 12230 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 12231 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 12232 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 12233 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12234 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 12235 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 12236 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 12237 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 12238 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 12239 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 12240 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12241 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12242 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4 12243 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 12244 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 12245 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 12246 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 12247 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 12248 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 12249 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 12250 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 12251 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 12252 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 12253 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 12254 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 12255 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 12256 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 12257 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 12258 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 12259 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 12260 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4 12261 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 12262 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 12263 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 12264 // CHECK19: omp.precond.then: 12265 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 12266 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12267 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 12268 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 12269 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 12270 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 12271 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 12272 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12273 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 12274 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 12275 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12276 // CHECK19-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12277 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 12278 // CHECK19-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1) 12279 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 12280 // CHECK19: omp.dispatch.cond: 12281 // CHECK19-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12282 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 12283 // CHECK19-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 12284 // CHECK19-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 12285 // CHECK19-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 12286 // CHECK19: omp.dispatch.body: 12287 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 12288 // CHECK19-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 12289 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12290 // CHECK19: omp.inner.for.cond: 12291 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 12292 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !16 12293 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 12294 // CHECK19-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12295 // CHECK19: omp.inner.for.body: 12296 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 12297 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 12298 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 12299 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !16 12300 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !16 12301 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP20]] 12302 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !16 12303 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 12304 // CHECK19: omp.body.continue: 12305 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12306 // CHECK19: omp.inner.for.inc: 12307 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 12308 // CHECK19-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP21]], 1 12309 // CHECK19-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !16 12310 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]] 12311 // CHECK19: omp.inner.for.end: 12312 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 12313 // CHECK19: omp.dispatch.inc: 12314 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]] 12315 // CHECK19: omp.dispatch.end: 12316 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 12317 // CHECK19: omp.precond.end: 12318 // CHECK19-NEXT: ret void 12319 // 12320 // 12321 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168 12322 // CHECK19-SAME: (i32 noundef [[M:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 12323 // CHECK19-NEXT: entry: 12324 // CHECK19-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 12325 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 12326 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 12327 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 12328 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 12329 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 12330 // CHECK19-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 12331 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 12332 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 12333 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 12334 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 12335 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 12336 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4 12337 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 12338 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 12339 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 12340 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 12341 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..14 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]]) 12342 // CHECK19-NEXT: ret void 12343 // 12344 // 12345 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..14 12346 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 12347 // CHECK19-NEXT: entry: 12348 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 12349 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 12350 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 12351 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 12352 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 12353 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 12354 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12355 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 12356 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 12357 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 12358 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 12359 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 12360 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 12361 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12362 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12363 // CHECK19-NEXT: [[I4:%.*]] = alloca i32, align 4 12364 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 12365 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 12366 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 12367 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 12368 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 12369 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 12370 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 12371 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 12372 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 12373 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 12374 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 12375 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 12376 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12377 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 12378 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 12379 // CHECK19-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 12380 // CHECK19-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 12381 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4 12382 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12383 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 12384 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 12385 // CHECK19: omp.precond.then: 12386 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 12387 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 12388 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 12389 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12390 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 12391 // CHECK19-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12392 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 12393 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 12394 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12395 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 12396 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 12397 // CHECK19-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12398 // CHECK19: cond.true: 12399 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 12400 // CHECK19-NEXT: br label [[COND_END:%.*]] 12401 // CHECK19: cond.false: 12402 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12403 // CHECK19-NEXT: br label [[COND_END]] 12404 // CHECK19: cond.end: 12405 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 12406 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 12407 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 12408 // CHECK19-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 12409 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12410 // CHECK19: omp.inner.for.cond: 12411 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12412 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12413 // CHECK19-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 12414 // CHECK19-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12415 // CHECK19: omp.inner.for.body: 12416 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 12417 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12418 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 12419 // CHECK19-NEXT: store i32 [[TMP18]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 12420 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 12421 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP19]]) 12422 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12423 // CHECK19: omp.inner.for.inc: 12424 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12425 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 12426 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 12427 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 12428 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 12429 // CHECK19: omp.inner.for.end: 12430 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12431 // CHECK19: omp.loop.exit: 12432 // CHECK19-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12433 // CHECK19-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 12434 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 12435 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 12436 // CHECK19: omp.precond.end: 12437 // CHECK19-NEXT: ret void 12438 // 12439 // 12440 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..15 12441 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], i32* noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 12442 // CHECK19-NEXT: entry: 12443 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 12444 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 12445 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 12446 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 12447 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 12448 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 12449 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 12450 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 12451 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12452 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 12453 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 12454 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 12455 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 12456 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 12457 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 12458 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12459 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12460 // CHECK19-NEXT: [[I4:%.*]] = alloca i32, align 4 12461 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 12462 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 12463 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 12464 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 12465 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 12466 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 12467 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 12468 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 12469 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 12470 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 12471 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 12472 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 12473 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 12474 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12475 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 12476 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 12477 // CHECK19-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 12478 // CHECK19-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 12479 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4 12480 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12481 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 12482 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 12483 // CHECK19: omp.precond.then: 12484 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 12485 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 12486 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 12487 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 12488 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 12489 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 12490 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 12491 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12492 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 12493 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 12494 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 12495 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12496 // CHECK19-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12497 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 12498 // CHECK19-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]]) 12499 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 12500 // CHECK19: omp.dispatch.cond: 12501 // CHECK19-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12502 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 12503 // CHECK19-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 12504 // CHECK19-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 12505 // CHECK19-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 12506 // CHECK19: omp.dispatch.body: 12507 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 12508 // CHECK19-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 12509 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12510 // CHECK19: omp.inner.for.cond: 12511 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 12512 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !19 12513 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 12514 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12515 // CHECK19: omp.inner.for.body: 12516 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 12517 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 12518 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 12519 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !19 12520 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !19 12521 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP21]] 12522 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !19 12523 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 12524 // CHECK19: omp.body.continue: 12525 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12526 // CHECK19: omp.inner.for.inc: 12527 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 12528 // CHECK19-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP22]], 1 12529 // CHECK19-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !19 12530 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]] 12531 // CHECK19: omp.inner.for.end: 12532 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 12533 // CHECK19: omp.dispatch.inc: 12534 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]] 12535 // CHECK19: omp.dispatch.end: 12536 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 12537 // CHECK19: omp.precond.end: 12538 // CHECK19-NEXT: ret void 12539 // 12540 // 12541 // CHECK19-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 12542 // CHECK19-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat { 12543 // CHECK19-NEXT: entry: 12544 // CHECK19-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 12545 // CHECK19-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 12546 // CHECK19-NEXT: [[M:%.*]] = alloca i32, align 4 12547 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 12548 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 12549 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 12550 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 12551 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4 12552 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4 12553 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4 12554 // CHECK19-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 12555 // CHECK19-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4 12556 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 4 12557 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 4 12558 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 4 12559 // CHECK19-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 12560 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 4 12561 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 4 12562 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 4 12563 // CHECK19-NEXT: [[_TMP16:%.*]] = alloca i32, align 4 12564 // CHECK19-NEXT: [[M_CASTED19:%.*]] = alloca i32, align 4 12565 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [2 x i8*], align 4 12566 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [2 x i8*], align 4 12567 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [2 x i8*], align 4 12568 // CHECK19-NEXT: [[_TMP23:%.*]] = alloca i32, align 4 12569 // CHECK19-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 12570 // CHECK19-NEXT: store i32 10, i32* [[M]], align 4 12571 // CHECK19-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 12572 // CHECK19-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 12573 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4 12574 // CHECK19-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 12575 // CHECK19-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 12576 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4 12577 // CHECK19-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 12578 // CHECK19-NEXT: store i8* null, i8** [[TMP4]], align 4 12579 // CHECK19-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 12580 // CHECK19-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 12581 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 12582 // CHECK19-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.20, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.21, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 12583 // CHECK19-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 12584 // CHECK19-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 12585 // CHECK19: omp_offload.failed: 12586 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]] 12587 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]] 12588 // CHECK19: omp_offload.cont: 12589 // CHECK19-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 12590 // CHECK19-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** 12591 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4 12592 // CHECK19-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 12593 // CHECK19-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** 12594 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4 12595 // CHECK19-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0 12596 // CHECK19-NEXT: store i8* null, i8** [[TMP13]], align 4 12597 // CHECK19-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 12598 // CHECK19-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 12599 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 12600 // CHECK19-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.24, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.25, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 12601 // CHECK19-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 12602 // CHECK19-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 12603 // CHECK19: omp_offload.failed5: 12604 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121([10 x i32]* [[A]]) #[[ATTR3]] 12605 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT6]] 12606 // CHECK19: omp_offload.cont6: 12607 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[M]], align 4 12608 // CHECK19-NEXT: store i32 [[TMP18]], i32* [[M_CASTED]], align 4 12609 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[M_CASTED]], align 4 12610 // CHECK19-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 12611 // CHECK19-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32* 12612 // CHECK19-NEXT: store i32 [[TMP19]], i32* [[TMP21]], align 4 12613 // CHECK19-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 12614 // CHECK19-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32* 12615 // CHECK19-NEXT: store i32 [[TMP19]], i32* [[TMP23]], align 4 12616 // CHECK19-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0 12617 // CHECK19-NEXT: store i8* null, i8** [[TMP24]], align 4 12618 // CHECK19-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1 12619 // CHECK19-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]** 12620 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 4 12621 // CHECK19-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1 12622 // CHECK19-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]** 12623 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 4 12624 // CHECK19-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 1 12625 // CHECK19-NEXT: store i8* null, i8** [[TMP29]], align 4 12626 // CHECK19-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 12627 // CHECK19-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 12628 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 12629 // CHECK19-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.28, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.29, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 12630 // CHECK19-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 12631 // CHECK19-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] 12632 // CHECK19: omp_offload.failed11: 12633 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i32 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]] 12634 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT12]] 12635 // CHECK19: omp_offload.cont12: 12636 // CHECK19-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 12637 // CHECK19-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]** 12638 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 4 12639 // CHECK19-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 12640 // CHECK19-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]** 12641 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 4 12642 // CHECK19-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 0 12643 // CHECK19-NEXT: store i8* null, i8** [[TMP38]], align 4 12644 // CHECK19-NEXT: [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 12645 // CHECK19-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 12646 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 12647 // CHECK19-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.32, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.33, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 12648 // CHECK19-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0 12649 // CHECK19-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]] 12650 // CHECK19: omp_offload.failed17: 12651 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131([10 x i32]* [[A]]) #[[ATTR3]] 12652 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT18]] 12653 // CHECK19: omp_offload.cont18: 12654 // CHECK19-NEXT: [[TMP43:%.*]] = load i32, i32* [[M]], align 4 12655 // CHECK19-NEXT: store i32 [[TMP43]], i32* [[M_CASTED19]], align 4 12656 // CHECK19-NEXT: [[TMP44:%.*]] = load i32, i32* [[M_CASTED19]], align 4 12657 // CHECK19-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 12658 // CHECK19-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32* 12659 // CHECK19-NEXT: store i32 [[TMP44]], i32* [[TMP46]], align 4 12660 // CHECK19-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 12661 // CHECK19-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32* 12662 // CHECK19-NEXT: store i32 [[TMP44]], i32* [[TMP48]], align 4 12663 // CHECK19-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 0 12664 // CHECK19-NEXT: store i8* null, i8** [[TMP49]], align 4 12665 // CHECK19-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1 12666 // CHECK19-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]** 12667 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 4 12668 // CHECK19-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 1 12669 // CHECK19-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]** 12670 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 4 12671 // CHECK19-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 1 12672 // CHECK19-NEXT: store i8* null, i8** [[TMP54]], align 4 12673 // CHECK19-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 12674 // CHECK19-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 12675 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 12676 // CHECK19-NEXT: [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.36, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.37, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 12677 // CHECK19-NEXT: [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0 12678 // CHECK19-NEXT: br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]] 12679 // CHECK19: omp_offload.failed24: 12680 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i32 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]] 12681 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT25]] 12682 // CHECK19: omp_offload.cont25: 12683 // CHECK19-NEXT: ret i32 0 12684 // 12685 // 12686 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116 12687 // CHECK19-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 12688 // CHECK19-NEXT: entry: 12689 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 12690 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 12691 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 12692 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 12693 // CHECK19-NEXT: ret void 12694 // 12695 // 12696 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..18 12697 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 12698 // CHECK19-NEXT: entry: 12699 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 12700 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 12701 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 12702 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12703 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 12704 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 12705 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 12706 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12707 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12708 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 12709 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 12710 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 12711 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 12712 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 12713 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 12714 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 12715 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12716 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 12717 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12718 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 12719 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 12720 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12721 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 12722 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12723 // CHECK19: cond.true: 12724 // CHECK19-NEXT: br label [[COND_END:%.*]] 12725 // CHECK19: cond.false: 12726 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12727 // CHECK19-NEXT: br label [[COND_END]] 12728 // CHECK19: cond.end: 12729 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 12730 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 12731 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 12732 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 12733 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12734 // CHECK19: omp.inner.for.cond: 12735 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12736 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12737 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 12738 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12739 // CHECK19: omp.inner.for.body: 12740 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 12741 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12742 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..19 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]) 12743 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12744 // CHECK19: omp.inner.for.inc: 12745 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12746 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 12747 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 12748 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 12749 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 12750 // CHECK19: omp.inner.for.end: 12751 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12752 // CHECK19: omp.loop.exit: 12753 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 12754 // CHECK19-NEXT: ret void 12755 // 12756 // 12757 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..19 12758 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 12759 // CHECK19-NEXT: entry: 12760 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 12761 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 12762 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 12763 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 12764 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 12765 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12766 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 12767 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 12768 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 12769 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12770 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12771 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 12772 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 12773 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 12774 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 12775 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 12776 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 12777 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 12778 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 12779 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 12780 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 12781 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 12782 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 12783 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 12784 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12785 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 12786 // CHECK19-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12787 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 12788 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 12789 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12790 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 12791 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12792 // CHECK19: cond.true: 12793 // CHECK19-NEXT: br label [[COND_END:%.*]] 12794 // CHECK19: cond.false: 12795 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12796 // CHECK19-NEXT: br label [[COND_END]] 12797 // CHECK19: cond.end: 12798 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 12799 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 12800 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 12801 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 12802 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12803 // CHECK19: omp.inner.for.cond: 12804 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12805 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12806 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 12807 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12808 // CHECK19: omp.inner.for.body: 12809 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12810 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 12811 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 12812 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4 12813 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 12814 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]] 12815 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 12816 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 12817 // CHECK19: omp.body.continue: 12818 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12819 // CHECK19: omp.inner.for.inc: 12820 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12821 // CHECK19-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 12822 // CHECK19-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 12823 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 12824 // CHECK19: omp.inner.for.end: 12825 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12826 // CHECK19: omp.loop.exit: 12827 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 12828 // CHECK19-NEXT: ret void 12829 // 12830 // 12831 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121 12832 // CHECK19-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 12833 // CHECK19-NEXT: entry: 12834 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 12835 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 12836 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 12837 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..22 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 12838 // CHECK19-NEXT: ret void 12839 // 12840 // 12841 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..22 12842 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 12843 // CHECK19-NEXT: entry: 12844 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 12845 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 12846 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 12847 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12848 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 12849 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 12850 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 12851 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12852 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12853 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 12854 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 12855 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 12856 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 12857 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 12858 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 12859 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 12860 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12861 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 12862 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12863 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 12864 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 12865 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12866 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 12867 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12868 // CHECK19: cond.true: 12869 // CHECK19-NEXT: br label [[COND_END:%.*]] 12870 // CHECK19: cond.false: 12871 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12872 // CHECK19-NEXT: br label [[COND_END]] 12873 // CHECK19: cond.end: 12874 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 12875 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 12876 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 12877 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 12878 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12879 // CHECK19: omp.inner.for.cond: 12880 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12881 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12882 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 12883 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12884 // CHECK19: omp.inner.for.body: 12885 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 12886 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12887 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..23 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]) 12888 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12889 // CHECK19: omp.inner.for.inc: 12890 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12891 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 12892 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 12893 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 12894 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 12895 // CHECK19: omp.inner.for.end: 12896 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12897 // CHECK19: omp.loop.exit: 12898 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 12899 // CHECK19-NEXT: ret void 12900 // 12901 // 12902 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..23 12903 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 12904 // CHECK19-NEXT: entry: 12905 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 12906 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 12907 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 12908 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 12909 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 12910 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12911 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 12912 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 12913 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 12914 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12915 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12916 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 12917 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 12918 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 12919 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 12920 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 12921 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 12922 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 12923 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 12924 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 12925 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 12926 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 12927 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 12928 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 12929 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12930 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 12931 // CHECK19-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12932 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 12933 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 12934 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12935 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 12936 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12937 // CHECK19: cond.true: 12938 // CHECK19-NEXT: br label [[COND_END:%.*]] 12939 // CHECK19: cond.false: 12940 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12941 // CHECK19-NEXT: br label [[COND_END]] 12942 // CHECK19: cond.end: 12943 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 12944 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 12945 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 12946 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 12947 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12948 // CHECK19: omp.inner.for.cond: 12949 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12950 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12951 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 12952 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12953 // CHECK19: omp.inner.for.body: 12954 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12955 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 12956 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 12957 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4 12958 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 12959 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]] 12960 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 12961 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 12962 // CHECK19: omp.body.continue: 12963 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12964 // CHECK19: omp.inner.for.inc: 12965 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12966 // CHECK19-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 12967 // CHECK19-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 12968 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 12969 // CHECK19: omp.inner.for.end: 12970 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12971 // CHECK19: omp.loop.exit: 12972 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 12973 // CHECK19-NEXT: ret void 12974 // 12975 // 12976 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126 12977 // CHECK19-SAME: (i32 noundef [[M:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 12978 // CHECK19-NEXT: entry: 12979 // CHECK19-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 12980 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 12981 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 12982 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 12983 // CHECK19-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 12984 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 12985 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 12986 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4 12987 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 12988 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 12989 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 12990 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 12991 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..26 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]]) 12992 // CHECK19-NEXT: ret void 12993 // 12994 // 12995 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..26 12996 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 12997 // CHECK19-NEXT: entry: 12998 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 12999 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 13000 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 13001 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 13002 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13003 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 13004 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 13005 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 13006 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13007 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13008 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 13009 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 13010 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 13011 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 13012 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 13013 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 13014 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 13015 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 13016 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 13017 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 13018 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 13019 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 13020 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 13021 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 13022 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13023 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 13024 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13025 // CHECK19: cond.true: 13026 // CHECK19-NEXT: br label [[COND_END:%.*]] 13027 // CHECK19: cond.false: 13028 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13029 // CHECK19-NEXT: br label [[COND_END]] 13030 // CHECK19: cond.end: 13031 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 13032 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 13033 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 13034 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 13035 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13036 // CHECK19: omp.inner.for.cond: 13037 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13038 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13039 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 13040 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13041 // CHECK19: omp.inner.for.body: 13042 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 13043 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13044 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 13045 // CHECK19-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 13046 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 13047 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..27 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]]) 13048 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13049 // CHECK19: omp.inner.for.inc: 13050 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13051 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 13052 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 13053 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 13054 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 13055 // CHECK19: omp.inner.for.end: 13056 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 13057 // CHECK19: omp.loop.exit: 13058 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 13059 // CHECK19-NEXT: ret void 13060 // 13061 // 13062 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..27 13063 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 13064 // CHECK19-NEXT: entry: 13065 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 13066 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 13067 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 13068 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 13069 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 13070 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 13071 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13072 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 13073 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 13074 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 13075 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13076 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13077 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 13078 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 13079 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 13080 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 13081 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 13082 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 13083 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 13084 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 13085 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 13086 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 13087 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 13088 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 13089 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 13090 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 13091 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 13092 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 13093 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 13094 // CHECK19-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 13095 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 13096 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]]) 13097 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 13098 // CHECK19: omp.dispatch.cond: 13099 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13100 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 13101 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]] 13102 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13103 // CHECK19: cond.true: 13104 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 13105 // CHECK19-NEXT: br label [[COND_END:%.*]] 13106 // CHECK19: cond.false: 13107 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13108 // CHECK19-NEXT: br label [[COND_END]] 13109 // CHECK19: cond.end: 13110 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP8]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 13111 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 13112 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 13113 // CHECK19-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 13114 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13115 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13116 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 13117 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 13118 // CHECK19: omp.dispatch.body: 13119 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13120 // CHECK19: omp.inner.for.cond: 13121 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13122 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13123 // CHECK19-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 13124 // CHECK19-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13125 // CHECK19: omp.inner.for.body: 13126 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13127 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 13128 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 13129 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4 13130 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4 13131 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP16]] 13132 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 13133 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 13134 // CHECK19: omp.body.continue: 13135 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13136 // CHECK19: omp.inner.for.inc: 13137 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13138 // CHECK19-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1 13139 // CHECK19-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 13140 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 13141 // CHECK19: omp.inner.for.end: 13142 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 13143 // CHECK19: omp.dispatch.inc: 13144 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 13145 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 13146 // CHECK19-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 13147 // CHECK19-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 13148 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13149 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 13150 // CHECK19-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 13151 // CHECK19-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 13152 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]] 13153 // CHECK19: omp.dispatch.end: 13154 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 13155 // CHECK19-NEXT: ret void 13156 // 13157 // 13158 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131 13159 // CHECK19-SAME: ([10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 13160 // CHECK19-NEXT: entry: 13161 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 13162 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 13163 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 13164 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..30 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 13165 // CHECK19-NEXT: ret void 13166 // 13167 // 13168 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..30 13169 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 13170 // CHECK19-NEXT: entry: 13171 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 13172 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 13173 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 13174 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13175 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 13176 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 13177 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 13178 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13179 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13180 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 13181 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 13182 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 13183 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 13184 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 13185 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 13186 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 13187 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 13188 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 13189 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 13190 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 13191 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 13192 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13193 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 13194 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13195 // CHECK19: cond.true: 13196 // CHECK19-NEXT: br label [[COND_END:%.*]] 13197 // CHECK19: cond.false: 13198 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13199 // CHECK19-NEXT: br label [[COND_END]] 13200 // CHECK19: cond.end: 13201 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 13202 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 13203 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 13204 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 13205 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13206 // CHECK19: omp.inner.for.cond: 13207 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13208 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13209 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 13210 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13211 // CHECK19: omp.inner.for.body: 13212 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 13213 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13214 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..31 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]) 13215 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13216 // CHECK19: omp.inner.for.inc: 13217 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13218 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 13219 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 13220 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 13221 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 13222 // CHECK19: omp.inner.for.end: 13223 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 13224 // CHECK19: omp.loop.exit: 13225 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 13226 // CHECK19-NEXT: ret void 13227 // 13228 // 13229 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..31 13230 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 13231 // CHECK19-NEXT: entry: 13232 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 13233 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 13234 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 13235 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 13236 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 13237 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13238 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 13239 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 13240 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 13241 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13242 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13243 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 13244 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 13245 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 13246 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 13247 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 13248 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 13249 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 13250 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 13251 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 13252 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 13253 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 13254 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 13255 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 13256 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 13257 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 13258 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 13259 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13260 // CHECK19-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 13261 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 13262 // CHECK19-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 13263 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 13264 // CHECK19: omp.dispatch.cond: 13265 // CHECK19-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 13266 // CHECK19-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 13267 // CHECK19-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 13268 // CHECK19: omp.dispatch.body: 13269 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 13270 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 13271 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13272 // CHECK19: omp.inner.for.cond: 13273 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 13274 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !22 13275 // CHECK19-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 13276 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13277 // CHECK19: omp.inner.for.body: 13278 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 13279 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 13280 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 13281 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !22 13282 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !22 13283 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP12]] 13284 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !22 13285 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 13286 // CHECK19: omp.body.continue: 13287 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13288 // CHECK19: omp.inner.for.inc: 13289 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 13290 // CHECK19-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 13291 // CHECK19-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !22 13292 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]] 13293 // CHECK19: omp.inner.for.end: 13294 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 13295 // CHECK19: omp.dispatch.inc: 13296 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]] 13297 // CHECK19: omp.dispatch.end: 13298 // CHECK19-NEXT: ret void 13299 // 13300 // 13301 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136 13302 // CHECK19-SAME: (i32 noundef [[M:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 13303 // CHECK19-NEXT: entry: 13304 // CHECK19-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 13305 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 13306 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 13307 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 13308 // CHECK19-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 13309 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 13310 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 13311 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4 13312 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 13313 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 13314 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 13315 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 13316 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..34 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]]) 13317 // CHECK19-NEXT: ret void 13318 // 13319 // 13320 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..34 13321 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 13322 // CHECK19-NEXT: entry: 13323 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 13324 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 13325 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 13326 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 13327 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13328 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 13329 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 13330 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 13331 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13332 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13333 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 13334 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 13335 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 13336 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 13337 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 13338 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 13339 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 13340 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 13341 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 13342 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 13343 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 13344 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 13345 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 13346 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 13347 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13348 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 13349 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13350 // CHECK19: cond.true: 13351 // CHECK19-NEXT: br label [[COND_END:%.*]] 13352 // CHECK19: cond.false: 13353 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13354 // CHECK19-NEXT: br label [[COND_END]] 13355 // CHECK19: cond.end: 13356 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 13357 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 13358 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 13359 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 13360 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13361 // CHECK19: omp.inner.for.cond: 13362 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13363 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13364 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 13365 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13366 // CHECK19: omp.inner.for.body: 13367 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 13368 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13369 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 13370 // CHECK19-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 13371 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 13372 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..35 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]]) 13373 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13374 // CHECK19: omp.inner.for.inc: 13375 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13376 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 13377 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 13378 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 13379 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 13380 // CHECK19: omp.inner.for.end: 13381 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 13382 // CHECK19: omp.loop.exit: 13383 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 13384 // CHECK19-NEXT: ret void 13385 // 13386 // 13387 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..35 13388 // CHECK19-SAME: (i32* noalias noundef [[DOTGLOBAL_TID_:%.*]], i32* noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 13389 // CHECK19-NEXT: entry: 13390 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 13391 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 13392 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 13393 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 13394 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 13395 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 13396 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13397 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 13398 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 13399 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 13400 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13401 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13402 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 13403 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 13404 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 13405 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 13406 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 13407 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 13408 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 13409 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 13410 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 13411 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 13412 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 13413 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 13414 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 13415 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 13416 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 13417 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 13418 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 13419 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 13420 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13421 // CHECK19-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 13422 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 13423 // CHECK19-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]]) 13424 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 13425 // CHECK19: omp.dispatch.cond: 13426 // CHECK19-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 13427 // CHECK19-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0 13428 // CHECK19-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 13429 // CHECK19: omp.dispatch.body: 13430 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 13431 // CHECK19-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 13432 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13433 // CHECK19: omp.inner.for.cond: 13434 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 13435 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !25 13436 // CHECK19-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 13437 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13438 // CHECK19: omp.inner.for.body: 13439 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 13440 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 13441 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 13442 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !25 13443 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !25 13444 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP13]] 13445 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !25 13446 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 13447 // CHECK19: omp.body.continue: 13448 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13449 // CHECK19: omp.inner.for.inc: 13450 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 13451 // CHECK19-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP14]], 1 13452 // CHECK19-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !25 13453 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]] 13454 // CHECK19: omp.inner.for.end: 13455 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 13456 // CHECK19: omp.dispatch.inc: 13457 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]] 13458 // CHECK19: omp.dispatch.end: 13459 // CHECK19-NEXT: ret void 13460 // 13461 // 13462 // CHECK19-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 13463 // CHECK19-SAME: () #[[ATTR6:[0-9]+]] { 13464 // CHECK19-NEXT: entry: 13465 // CHECK19-NEXT: call void @__tgt_register_requires(i64 1) 13466 // CHECK19-NEXT: ret void 13467 // 13468