1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // expected-no-diagnostics 3 #ifndef HEADER 4 #define HEADER 5 6 // Test host codegen. 7 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 8 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 9 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2 10 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 11 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 12 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4 13 14 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5 15 // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 16 // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK6 17 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7 18 // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 19 // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK8 20 21 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 22 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 23 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 24 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 25 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 26 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 27 #ifdef CK1 28 29 template <typename T, int X, long long Y> 30 struct SS{ 31 T a[X]; 32 float b; 33 int foo(void) { 34 35 #pragma omp target 36 #pragma omp teams distribute parallel for 37 for(int i = 0; i < X; i++) { 38 a[i] = (T)0; 39 } 40 #pragma omp target 41 #pragma omp teams distribute parallel for schedule(static) 42 for(int i = 0; i < X; i++) { 43 a[i] = (T)0; 44 } 45 #pragma omp target 46 #pragma omp teams distribute parallel for schedule(static, X/2) 47 for(int i = 0; i < X; i++) { 48 a[i] = (T)0; 49 } 50 51 #pragma omp target 52 #pragma omp teams distribute parallel for schedule(dynamic) 53 for(int i = 0; i < X; i++) { 54 a[i] = (T)0; 55 } 56 57 #pragma omp target 58 #pragma omp teams distribute parallel for schedule(dynamic, X/2) 59 for(int i = 0; i < X; i++) { 60 a[i] = (T)0; 61 } 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 return a[0]; 79 } 80 }; 81 82 int teams_template_struct(void) { 83 SS<int, 123, 456> V; 84 return V.foo(); 85 86 } 87 #endif // CK1 88 89 // Test host codegen. 90 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13 91 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 92 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK14 93 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15 94 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 95 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK16 96 97 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK17 98 // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 99 // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK18 100 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK19 101 // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 102 // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK20 103 104 // RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 105 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 106 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 107 // RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 108 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 109 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}" 110 #ifdef CK2 111 112 template <typename T, int n> 113 int tmain(T argc) { 114 T a[n]; 115 int m = 10; 116 #pragma omp target 117 #pragma omp teams distribute parallel for 118 for(int i = 0; i < n; i++) { 119 a[i] = (T)0; 120 } 121 #pragma omp target 122 #pragma omp teams distribute parallel for schedule(static) 123 for(int i = 0; i < n; i++) { 124 a[i] = (T)0; 125 } 126 #pragma omp target 127 #pragma omp teams distribute parallel for schedule(static, m) 128 for(int i = 0; i < n; i++) { 129 a[i] = (T)0; 130 } 131 #pragma omp target 132 #pragma omp teams distribute parallel for schedule(dynamic) 133 for(int i = 0; i < n; i++) { 134 a[i] = (T)0; 135 } 136 #pragma omp target 137 #pragma omp teams distribute parallel for schedule(dynamic, m) 138 for(int i = 0; i < n; i++) { 139 a[i] = (T)0; 140 } 141 return 0; 142 } 143 144 int main (int argc, char **argv) { 145 int n = 100; 146 int a[n]; 147 int m = 10; 148 #pragma omp target 149 #pragma omp teams distribute parallel for 150 for(int i = 0; i < n; i++) { 151 a[i] = 0; 152 } 153 #pragma omp target 154 #pragma omp teams distribute parallel for dist_schedule(static) 155 for(int i = 0; i < n; i++) { 156 a[i] = 0; 157 } 158 #pragma omp target 159 #pragma omp teams distribute parallel for dist_schedule(static, m) 160 for(int i = 0; i < n; i++) { 161 a[i] = 0; 162 } 163 #pragma omp target 164 #pragma omp teams distribute parallel for schedule(dynamic) 165 for(int i = 0; i < n; i++) { 166 a[i] = 0; 167 } 168 #pragma omp target 169 #pragma omp teams distribute parallel for schedule(dynamic, m) 170 for(int i = 0; i < n; i++) { 171 a[i] = 0; 172 } 173 return tmain<int, 10>(argc); 174 } 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 #endif // CK2 210 #endif // #ifndef HEADER 211 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv 212 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 213 // CHECK1-NEXT: entry: 214 // CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 215 // CHECK1-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]]) 216 // CHECK1-NEXT: ret i32 [[CALL]] 217 // 218 // 219 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 220 // CHECK1-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 221 // CHECK1-NEXT: entry: 222 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 223 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 224 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 225 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 226 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 227 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8 228 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8 229 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8 230 // CHECK1-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 231 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8 232 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8 233 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8 234 // CHECK1-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 235 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 8 236 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 8 237 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 8 238 // CHECK1-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 239 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 8 240 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 8 241 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 8 242 // CHECK1-NEXT: [[_TMP27:%.*]] = alloca i32, align 4 243 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 244 // CHECK1-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 245 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 246 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 247 // CHECK1-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 248 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 249 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 250 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 251 // CHECK1-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8 252 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 253 // CHECK1-NEXT: store i8* null, i8** [[TMP4]], align 8 254 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 255 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 256 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123) 257 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 258 // CHECK1-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 259 // CHECK1-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 260 // CHECK1: omp_offload.failed: 261 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 262 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 263 // CHECK1: omp_offload.cont: 264 // CHECK1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 265 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 266 // CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** 267 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8 268 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 269 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** 270 // CHECK1-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8 271 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0 272 // CHECK1-NEXT: store i8* null, i8** [[TMP13]], align 8 273 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 274 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 275 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 276 // CHECK1-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 277 // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 278 // CHECK1-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 279 // CHECK1: omp_offload.failed7: 280 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]] 281 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT8]] 282 // CHECK1: omp_offload.cont8: 283 // CHECK1-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 284 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 285 // CHECK1-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 286 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8 287 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 288 // CHECK1-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 289 // CHECK1-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8 290 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0 291 // CHECK1-NEXT: store i8* null, i8** [[TMP22]], align 8 292 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 293 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 294 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 295 // CHECK1-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 296 // CHECK1-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 297 // CHECK1-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 298 // CHECK1: omp_offload.failed14: 299 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(%struct.SS* [[THIS1]]) #[[ATTR2]] 300 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT15]] 301 // CHECK1: omp_offload.cont15: 302 // CHECK1-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 303 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 304 // CHECK1-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS** 305 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 8 306 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 307 // CHECK1-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]** 308 // CHECK1-NEXT: store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 8 309 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i64 0, i64 0 310 // CHECK1-NEXT: store i8* null, i8** [[TMP31]], align 8 311 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 312 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 313 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 314 // CHECK1-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 315 // CHECK1-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 316 // CHECK1-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]] 317 // CHECK1: omp_offload.failed21: 318 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(%struct.SS* [[THIS1]]) #[[ATTR2]] 319 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT22]] 320 // CHECK1: omp_offload.cont22: 321 // CHECK1-NEXT: [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 322 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 323 // CHECK1-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS** 324 // CHECK1-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 8 325 // CHECK1-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 326 // CHECK1-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]** 327 // CHECK1-NEXT: store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 8 328 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 0 329 // CHECK1-NEXT: store i8* null, i8** [[TMP40]], align 8 330 // CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 331 // CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 332 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 333 // CHECK1-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 334 // CHECK1-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 335 // CHECK1-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]] 336 // CHECK1: omp_offload.failed28: 337 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(%struct.SS* [[THIS1]]) #[[ATTR2]] 338 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT29]] 339 // CHECK1: omp_offload.cont29: 340 // CHECK1-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 341 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 0 342 // CHECK1-NEXT: [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 343 // CHECK1-NEXT: ret i32 [[TMP45]] 344 // 345 // 346 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35 347 // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 348 // CHECK1-NEXT: entry: 349 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 350 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 351 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 352 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 353 // CHECK1-NEXT: ret void 354 // 355 // 356 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 357 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 358 // CHECK1-NEXT: entry: 359 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 360 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 361 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 362 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 363 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 364 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 365 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 366 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 367 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 368 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 369 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 370 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 371 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 372 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 373 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 374 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 375 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 376 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 377 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 378 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 379 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 380 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 381 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 382 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 383 // CHECK1: cond.true: 384 // CHECK1-NEXT: br label [[COND_END:%.*]] 385 // CHECK1: cond.false: 386 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 387 // CHECK1-NEXT: br label [[COND_END]] 388 // CHECK1: cond.end: 389 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 390 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 391 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 392 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 393 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 394 // CHECK1: omp.inner.for.cond: 395 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 396 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 397 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 398 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 399 // CHECK1: omp.inner.for.body: 400 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 401 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 402 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 403 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 404 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 405 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 406 // CHECK1: omp.inner.for.inc: 407 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 408 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 409 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 410 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 411 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 412 // CHECK1: omp.inner.for.end: 413 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 414 // CHECK1: omp.loop.exit: 415 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 416 // CHECK1-NEXT: ret void 417 // 418 // 419 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 420 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 421 // CHECK1-NEXT: entry: 422 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 423 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 424 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 425 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 426 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 427 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 428 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 429 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 430 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 431 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 432 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 433 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 434 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 435 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 436 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 437 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 438 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 439 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 440 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 441 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 442 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 443 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 444 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 445 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 446 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 447 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 448 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 449 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 450 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 451 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 452 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 453 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 454 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 455 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 456 // CHECK1: cond.true: 457 // CHECK1-NEXT: br label [[COND_END:%.*]] 458 // CHECK1: cond.false: 459 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 460 // CHECK1-NEXT: br label [[COND_END]] 461 // CHECK1: cond.end: 462 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 463 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 464 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 465 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 466 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 467 // CHECK1: omp.inner.for.cond: 468 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 469 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 470 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 471 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 472 // CHECK1: omp.inner.for.body: 473 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 474 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 475 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 476 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 477 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 478 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 479 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 480 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 481 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 482 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 483 // CHECK1: omp.body.continue: 484 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 485 // CHECK1: omp.inner.for.inc: 486 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 487 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 488 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 489 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 490 // CHECK1: omp.inner.for.end: 491 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 492 // CHECK1: omp.loop.exit: 493 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 494 // CHECK1-NEXT: ret void 495 // 496 // 497 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40 498 // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 499 // CHECK1-NEXT: entry: 500 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 501 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 502 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 503 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 504 // CHECK1-NEXT: ret void 505 // 506 // 507 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..2 508 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 509 // CHECK1-NEXT: entry: 510 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 511 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 512 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 513 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 514 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 515 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 516 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 517 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 518 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 519 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 520 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 521 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 522 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 523 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 524 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 525 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 526 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 527 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 528 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 529 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 530 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 531 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 532 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 533 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 534 // CHECK1: cond.true: 535 // CHECK1-NEXT: br label [[COND_END:%.*]] 536 // CHECK1: cond.false: 537 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 538 // CHECK1-NEXT: br label [[COND_END]] 539 // CHECK1: cond.end: 540 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 541 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 542 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 543 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 544 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 545 // CHECK1: omp.inner.for.cond: 546 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 547 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 548 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 549 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 550 // CHECK1: omp.inner.for.body: 551 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 552 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 553 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 554 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 555 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 556 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 557 // CHECK1: omp.inner.for.inc: 558 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 559 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 560 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 561 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 562 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 563 // CHECK1: omp.inner.for.end: 564 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 565 // CHECK1: omp.loop.exit: 566 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 567 // CHECK1-NEXT: ret void 568 // 569 // 570 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 571 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 572 // CHECK1-NEXT: entry: 573 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 574 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 575 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 576 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 577 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 578 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 579 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 580 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 581 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 582 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 583 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 584 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 585 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 586 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 587 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 588 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 589 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 590 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 591 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 592 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 593 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 594 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 595 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 596 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 597 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 598 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 599 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 600 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 601 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 602 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 603 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 604 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 605 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 606 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 607 // CHECK1: cond.true: 608 // CHECK1-NEXT: br label [[COND_END:%.*]] 609 // CHECK1: cond.false: 610 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 611 // CHECK1-NEXT: br label [[COND_END]] 612 // CHECK1: cond.end: 613 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 614 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 615 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 616 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 617 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 618 // CHECK1: omp.inner.for.cond: 619 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 620 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 621 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 622 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 623 // CHECK1: omp.inner.for.body: 624 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 625 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 626 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 627 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 628 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 629 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 630 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 631 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 632 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 633 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 634 // CHECK1: omp.body.continue: 635 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 636 // CHECK1: omp.inner.for.inc: 637 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 638 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 639 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 640 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 641 // CHECK1: omp.inner.for.end: 642 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 643 // CHECK1: omp.loop.exit: 644 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 645 // CHECK1-NEXT: ret void 646 // 647 // 648 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45 649 // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 650 // CHECK1-NEXT: entry: 651 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 652 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 653 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 654 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 655 // CHECK1-NEXT: ret void 656 // 657 // 658 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..6 659 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 660 // CHECK1-NEXT: entry: 661 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 662 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 663 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 664 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 665 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 666 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 667 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 668 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 669 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 670 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 671 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 672 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 673 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 674 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 675 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 676 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 677 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 678 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 679 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 680 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 681 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 682 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 683 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 684 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 685 // CHECK1: cond.true: 686 // CHECK1-NEXT: br label [[COND_END:%.*]] 687 // CHECK1: cond.false: 688 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 689 // CHECK1-NEXT: br label [[COND_END]] 690 // CHECK1: cond.end: 691 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 692 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 693 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 694 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 695 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 696 // CHECK1: omp.inner.for.cond: 697 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 698 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 699 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 700 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 701 // CHECK1: omp.inner.for.body: 702 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 703 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 704 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 705 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 706 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 707 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 708 // CHECK1: omp.inner.for.inc: 709 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 710 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 711 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 712 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 713 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 714 // CHECK1: omp.inner.for.end: 715 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 716 // CHECK1: omp.loop.exit: 717 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 718 // CHECK1-NEXT: ret void 719 // 720 // 721 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..7 722 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 723 // CHECK1-NEXT: entry: 724 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 725 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 726 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 727 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 728 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 729 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 730 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 731 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 732 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 733 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 734 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 735 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 736 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 737 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 738 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 739 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 740 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 741 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 742 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 743 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 744 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 745 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 746 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 747 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 748 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 749 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 750 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 751 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 752 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 753 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 754 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 755 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 756 // CHECK1: omp.dispatch.cond: 757 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 758 // CHECK1-NEXT: [[CONV2:%.*]] = sext i32 [[TMP5]] to i64 759 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 760 // CHECK1-NEXT: [[CMP:%.*]] = icmp ugt i64 [[CONV2]], [[TMP6]] 761 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 762 // CHECK1: cond.true: 763 // CHECK1-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 764 // CHECK1-NEXT: br label [[COND_END:%.*]] 765 // CHECK1: cond.false: 766 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 767 // CHECK1-NEXT: [[CONV3:%.*]] = sext i32 [[TMP8]] to i64 768 // CHECK1-NEXT: br label [[COND_END]] 769 // CHECK1: cond.end: 770 // CHECK1-NEXT: [[COND:%.*]] = phi i64 [ [[TMP7]], [[COND_TRUE]] ], [ [[CONV3]], [[COND_FALSE]] ] 771 // CHECK1-NEXT: [[CONV4:%.*]] = trunc i64 [[COND]] to i32 772 // CHECK1-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 773 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 774 // CHECK1-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 775 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 776 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 777 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 778 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 779 // CHECK1: omp.dispatch.body: 780 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 781 // CHECK1: omp.inner.for.cond: 782 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 783 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 784 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 785 // CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 786 // CHECK1: omp.inner.for.body: 787 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 788 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 789 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 790 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 791 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 792 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 793 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64 794 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 795 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 796 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 797 // CHECK1: omp.body.continue: 798 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 799 // CHECK1: omp.inner.for.inc: 800 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 801 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP16]], 1 802 // CHECK1-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 803 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 804 // CHECK1: omp.inner.for.end: 805 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 806 // CHECK1: omp.dispatch.inc: 807 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 808 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 809 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 810 // CHECK1-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 811 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 812 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 813 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 814 // CHECK1-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 815 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] 816 // CHECK1: omp.dispatch.end: 817 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 818 // CHECK1-NEXT: ret void 819 // 820 // 821 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51 822 // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 823 // CHECK1-NEXT: entry: 824 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 825 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 826 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 827 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 828 // CHECK1-NEXT: ret void 829 // 830 // 831 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..10 832 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 833 // CHECK1-NEXT: entry: 834 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 835 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 836 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 837 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 838 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 839 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 840 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 841 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 842 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 843 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 844 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 845 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 846 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 847 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 848 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 849 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 850 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 851 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 852 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 853 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 854 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 855 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 856 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 857 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 858 // CHECK1: cond.true: 859 // CHECK1-NEXT: br label [[COND_END:%.*]] 860 // CHECK1: cond.false: 861 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 862 // CHECK1-NEXT: br label [[COND_END]] 863 // CHECK1: cond.end: 864 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 865 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 866 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 867 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 868 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 869 // CHECK1: omp.inner.for.cond: 870 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 871 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 872 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 873 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 874 // CHECK1: omp.inner.for.body: 875 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 876 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 877 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 878 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 879 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 880 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 881 // CHECK1: omp.inner.for.inc: 882 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 883 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 884 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 885 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 886 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 887 // CHECK1: omp.inner.for.end: 888 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 889 // CHECK1: omp.loop.exit: 890 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 891 // CHECK1-NEXT: ret void 892 // 893 // 894 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..11 895 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 896 // CHECK1-NEXT: entry: 897 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 898 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 899 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 900 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 901 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 902 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 903 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 904 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 905 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 906 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 907 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 908 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 909 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 910 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 911 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 912 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 913 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 914 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 915 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 916 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 917 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 918 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 919 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 920 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 921 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 922 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 923 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 924 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 925 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 926 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 927 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 928 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 929 // CHECK1-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 930 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 931 // CHECK1: omp.dispatch.cond: 932 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 933 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 934 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 935 // CHECK1: omp.dispatch.body: 936 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 937 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 938 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 939 // CHECK1: omp.inner.for.cond: 940 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 941 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9 942 // CHECK1-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 943 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 944 // CHECK1: omp.inner.for.body: 945 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 946 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 947 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 948 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9 949 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 950 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !9 951 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 952 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 953 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !9 954 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 955 // CHECK1: omp.body.continue: 956 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 957 // CHECK1: omp.inner.for.inc: 958 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 959 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 960 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 961 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] 962 // CHECK1: omp.inner.for.end: 963 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 964 // CHECK1: omp.dispatch.inc: 965 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] 966 // CHECK1: omp.dispatch.end: 967 // CHECK1-NEXT: ret void 968 // 969 // 970 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57 971 // CHECK1-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 972 // CHECK1-NEXT: entry: 973 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 974 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 975 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 976 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 977 // CHECK1-NEXT: ret void 978 // 979 // 980 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..14 981 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 982 // CHECK1-NEXT: entry: 983 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 984 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 985 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 986 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 987 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 988 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 989 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 990 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 991 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 992 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 993 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 994 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 995 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 996 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 997 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 998 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 999 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1000 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1001 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1002 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1003 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1004 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1005 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1006 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1007 // CHECK1: cond.true: 1008 // CHECK1-NEXT: br label [[COND_END:%.*]] 1009 // CHECK1: cond.false: 1010 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1011 // CHECK1-NEXT: br label [[COND_END]] 1012 // CHECK1: cond.end: 1013 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1014 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1015 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1016 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1017 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1018 // CHECK1: omp.inner.for.cond: 1019 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1020 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1021 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1022 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1023 // CHECK1: omp.inner.for.body: 1024 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1025 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 1026 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1027 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 1028 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 1029 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1030 // CHECK1: omp.inner.for.inc: 1031 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1032 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1033 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1034 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1035 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 1036 // CHECK1: omp.inner.for.end: 1037 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1038 // CHECK1: omp.loop.exit: 1039 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1040 // CHECK1-NEXT: ret void 1041 // 1042 // 1043 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..15 1044 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 1045 // CHECK1-NEXT: entry: 1046 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1047 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1048 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1049 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1050 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1051 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1052 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 1053 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1054 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1055 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1056 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1057 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 1058 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1059 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1060 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1061 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1062 // CHECK1-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1063 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1064 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1065 // CHECK1-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 1066 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1067 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 1068 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1069 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 1070 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1071 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1072 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1073 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1074 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1075 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1076 // CHECK1-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1077 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 1078 // CHECK1-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61) 1079 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 1080 // CHECK1: omp.dispatch.cond: 1081 // CHECK1-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 1082 // CHECK1-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 1083 // CHECK1-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 1084 // CHECK1: omp.dispatch.body: 1085 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1086 // CHECK1-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 1087 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1088 // CHECK1: omp.inner.for.cond: 1089 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 1090 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12 1091 // CHECK1-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 1092 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1093 // CHECK1: omp.inner.for.body: 1094 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 1095 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 1096 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1097 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12 1098 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 1099 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12 1100 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 1101 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 1102 // CHECK1-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12 1103 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1104 // CHECK1: omp.body.continue: 1105 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1106 // CHECK1: omp.inner.for.inc: 1107 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 1108 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 1109 // CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 1110 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 1111 // CHECK1: omp.inner.for.end: 1112 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 1113 // CHECK1: omp.dispatch.inc: 1114 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] 1115 // CHECK1: omp.dispatch.end: 1116 // CHECK1-NEXT: ret void 1117 // 1118 // 1119 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1120 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] { 1121 // CHECK1-NEXT: entry: 1122 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 1123 // CHECK1-NEXT: ret void 1124 // 1125 // 1126 // CHECK2-LABEL: define {{[^@]+}}@_Z21teams_template_structv 1127 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] { 1128 // CHECK2-NEXT: entry: 1129 // CHECK2-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 1130 // CHECK2-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]]) 1131 // CHECK2-NEXT: ret i32 [[CALL]] 1132 // 1133 // 1134 // CHECK2-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 1135 // CHECK2-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 1136 // CHECK2-NEXT: entry: 1137 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1138 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 1139 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 1140 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 1141 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1142 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8 1143 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8 1144 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8 1145 // CHECK2-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 1146 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8 1147 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8 1148 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8 1149 // CHECK2-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 1150 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 8 1151 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 8 1152 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 8 1153 // CHECK2-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 1154 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 8 1155 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 8 1156 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 8 1157 // CHECK2-NEXT: [[_TMP27:%.*]] = alloca i32, align 4 1158 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1159 // CHECK2-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1160 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 1161 // CHECK2-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1162 // CHECK2-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 1163 // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 1164 // CHECK2-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1165 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 1166 // CHECK2-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8 1167 // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 1168 // CHECK2-NEXT: store i8* null, i8** [[TMP4]], align 8 1169 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1170 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1171 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123) 1172 // CHECK2-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1173 // CHECK2-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 1174 // CHECK2-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1175 // CHECK2: omp_offload.failed: 1176 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 1177 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]] 1178 // CHECK2: omp_offload.cont: 1179 // CHECK2-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1180 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 1181 // CHECK2-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** 1182 // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8 1183 // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 1184 // CHECK2-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** 1185 // CHECK2-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8 1186 // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0 1187 // CHECK2-NEXT: store i8* null, i8** [[TMP13]], align 8 1188 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 1189 // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 1190 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 1191 // CHECK2-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1192 // CHECK2-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 1193 // CHECK2-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 1194 // CHECK2: omp_offload.failed7: 1195 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]] 1196 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT8]] 1197 // CHECK2: omp_offload.cont8: 1198 // CHECK2-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1199 // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 1200 // CHECK2-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 1201 // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8 1202 // CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 1203 // CHECK2-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 1204 // CHECK2-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8 1205 // CHECK2-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0 1206 // CHECK2-NEXT: store i8* null, i8** [[TMP22]], align 8 1207 // CHECK2-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 1208 // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 1209 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 1210 // CHECK2-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1211 // CHECK2-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 1212 // CHECK2-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 1213 // CHECK2: omp_offload.failed14: 1214 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(%struct.SS* [[THIS1]]) #[[ATTR2]] 1215 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT15]] 1216 // CHECK2: omp_offload.cont15: 1217 // CHECK2-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1218 // CHECK2-NEXT: [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 1219 // CHECK2-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS** 1220 // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 8 1221 // CHECK2-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 1222 // CHECK2-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]** 1223 // CHECK2-NEXT: store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 8 1224 // CHECK2-NEXT: [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i64 0, i64 0 1225 // CHECK2-NEXT: store i8* null, i8** [[TMP31]], align 8 1226 // CHECK2-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 1227 // CHECK2-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 1228 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 1229 // CHECK2-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1230 // CHECK2-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 1231 // CHECK2-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]] 1232 // CHECK2: omp_offload.failed21: 1233 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(%struct.SS* [[THIS1]]) #[[ATTR2]] 1234 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT22]] 1235 // CHECK2: omp_offload.cont22: 1236 // CHECK2-NEXT: [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1237 // CHECK2-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 1238 // CHECK2-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS** 1239 // CHECK2-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 8 1240 // CHECK2-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 1241 // CHECK2-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]** 1242 // CHECK2-NEXT: store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 8 1243 // CHECK2-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 0 1244 // CHECK2-NEXT: store i8* null, i8** [[TMP40]], align 8 1245 // CHECK2-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 1246 // CHECK2-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 1247 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 1248 // CHECK2-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1249 // CHECK2-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 1250 // CHECK2-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]] 1251 // CHECK2: omp_offload.failed28: 1252 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(%struct.SS* [[THIS1]]) #[[ATTR2]] 1253 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT29]] 1254 // CHECK2: omp_offload.cont29: 1255 // CHECK2-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 1256 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 0 1257 // CHECK2-NEXT: [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 1258 // CHECK2-NEXT: ret i32 [[TMP45]] 1259 // 1260 // 1261 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35 1262 // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 1263 // CHECK2-NEXT: entry: 1264 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1265 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1266 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1267 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 1268 // CHECK2-NEXT: ret void 1269 // 1270 // 1271 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 1272 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 1273 // CHECK2-NEXT: entry: 1274 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1275 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1276 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1277 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1278 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1279 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1280 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1281 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1282 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1283 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1284 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1285 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1286 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1287 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1288 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1289 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 1290 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1291 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1292 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1293 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1294 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1295 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1296 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1297 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1298 // CHECK2: cond.true: 1299 // CHECK2-NEXT: br label [[COND_END:%.*]] 1300 // CHECK2: cond.false: 1301 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1302 // CHECK2-NEXT: br label [[COND_END]] 1303 // CHECK2: cond.end: 1304 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1305 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1306 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1307 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1308 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1309 // CHECK2: omp.inner.for.cond: 1310 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1311 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1312 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1313 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1314 // CHECK2: omp.inner.for.body: 1315 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1316 // CHECK2-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 1317 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1318 // CHECK2-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 1319 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 1320 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1321 // CHECK2: omp.inner.for.inc: 1322 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1323 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1324 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1325 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1326 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1327 // CHECK2: omp.inner.for.end: 1328 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1329 // CHECK2: omp.loop.exit: 1330 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1331 // CHECK2-NEXT: ret void 1332 // 1333 // 1334 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1 1335 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 1336 // CHECK2-NEXT: entry: 1337 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1338 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1339 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1340 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1341 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1342 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1343 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1344 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1345 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1346 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1347 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1348 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1349 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1350 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1351 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1352 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1353 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1354 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1355 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1356 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 1357 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1358 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 1359 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1360 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 1361 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1362 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1363 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1364 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1365 // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1366 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1367 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1368 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1369 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 1370 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1371 // CHECK2: cond.true: 1372 // CHECK2-NEXT: br label [[COND_END:%.*]] 1373 // CHECK2: cond.false: 1374 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1375 // CHECK2-NEXT: br label [[COND_END]] 1376 // CHECK2: cond.end: 1377 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 1378 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1379 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1380 // CHECK2-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 1381 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1382 // CHECK2: omp.inner.for.cond: 1383 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1384 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1385 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1386 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1387 // CHECK2: omp.inner.for.body: 1388 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1389 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 1390 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1391 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1392 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 1393 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 1394 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 1395 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 1396 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1397 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1398 // CHECK2: omp.body.continue: 1399 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1400 // CHECK2: omp.inner.for.inc: 1401 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1402 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 1403 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1404 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1405 // CHECK2: omp.inner.for.end: 1406 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1407 // CHECK2: omp.loop.exit: 1408 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 1409 // CHECK2-NEXT: ret void 1410 // 1411 // 1412 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40 1413 // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 1414 // CHECK2-NEXT: entry: 1415 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1416 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1417 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1418 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 1419 // CHECK2-NEXT: ret void 1420 // 1421 // 1422 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..2 1423 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 1424 // CHECK2-NEXT: entry: 1425 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1426 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1427 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1428 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1429 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1430 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1431 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1432 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1433 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1434 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1435 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1436 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1437 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1438 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1439 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1440 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 1441 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1442 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1443 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1444 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1445 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1446 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1447 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1448 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1449 // CHECK2: cond.true: 1450 // CHECK2-NEXT: br label [[COND_END:%.*]] 1451 // CHECK2: cond.false: 1452 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1453 // CHECK2-NEXT: br label [[COND_END]] 1454 // CHECK2: cond.end: 1455 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1456 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1457 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1458 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1459 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1460 // CHECK2: omp.inner.for.cond: 1461 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1462 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1463 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1464 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1465 // CHECK2: omp.inner.for.body: 1466 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1467 // CHECK2-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 1468 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1469 // CHECK2-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 1470 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 1471 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1472 // CHECK2: omp.inner.for.inc: 1473 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1474 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1475 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1476 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1477 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1478 // CHECK2: omp.inner.for.end: 1479 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1480 // CHECK2: omp.loop.exit: 1481 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1482 // CHECK2-NEXT: ret void 1483 // 1484 // 1485 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..3 1486 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 1487 // CHECK2-NEXT: entry: 1488 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1489 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1490 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1491 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1492 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1493 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1494 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1495 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1496 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1497 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1498 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1499 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1500 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1501 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1502 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1503 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1504 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1505 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1506 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1507 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 1508 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1509 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 1510 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1511 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 1512 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1513 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1514 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1515 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1516 // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1517 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1518 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1519 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1520 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 1521 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1522 // CHECK2: cond.true: 1523 // CHECK2-NEXT: br label [[COND_END:%.*]] 1524 // CHECK2: cond.false: 1525 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1526 // CHECK2-NEXT: br label [[COND_END]] 1527 // CHECK2: cond.end: 1528 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 1529 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1530 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1531 // CHECK2-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 1532 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1533 // CHECK2: omp.inner.for.cond: 1534 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1535 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1536 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1537 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1538 // CHECK2: omp.inner.for.body: 1539 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1540 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 1541 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1542 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1543 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 1544 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 1545 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 1546 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 1547 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1548 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1549 // CHECK2: omp.body.continue: 1550 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1551 // CHECK2: omp.inner.for.inc: 1552 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1553 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 1554 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 1555 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1556 // CHECK2: omp.inner.for.end: 1557 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1558 // CHECK2: omp.loop.exit: 1559 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 1560 // CHECK2-NEXT: ret void 1561 // 1562 // 1563 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45 1564 // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 1565 // CHECK2-NEXT: entry: 1566 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1567 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1568 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1569 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 1570 // CHECK2-NEXT: ret void 1571 // 1572 // 1573 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..6 1574 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 1575 // CHECK2-NEXT: entry: 1576 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1577 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1578 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1579 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1580 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1581 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1582 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1583 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1584 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1585 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1586 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1587 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1588 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1589 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1590 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1591 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 1592 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1593 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1594 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1595 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1596 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1597 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1598 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1599 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1600 // CHECK2: cond.true: 1601 // CHECK2-NEXT: br label [[COND_END:%.*]] 1602 // CHECK2: cond.false: 1603 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1604 // CHECK2-NEXT: br label [[COND_END]] 1605 // CHECK2: cond.end: 1606 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1607 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1608 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1609 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1610 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1611 // CHECK2: omp.inner.for.cond: 1612 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1613 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1614 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1615 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1616 // CHECK2: omp.inner.for.body: 1617 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1618 // CHECK2-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 1619 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1620 // CHECK2-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 1621 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 1622 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1623 // CHECK2: omp.inner.for.inc: 1624 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1625 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1626 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1627 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1628 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1629 // CHECK2: omp.inner.for.end: 1630 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1631 // CHECK2: omp.loop.exit: 1632 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1633 // CHECK2-NEXT: ret void 1634 // 1635 // 1636 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..7 1637 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 1638 // CHECK2-NEXT: entry: 1639 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1640 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1641 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1642 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1643 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1644 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1645 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1646 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1647 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1648 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1649 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1650 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1651 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1652 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1653 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1654 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1655 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1656 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1657 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1658 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 1659 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1660 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 1661 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1662 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 1663 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1664 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1665 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1666 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1667 // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1668 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1669 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 1670 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 1671 // CHECK2: omp.dispatch.cond: 1672 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1673 // CHECK2-NEXT: [[CONV2:%.*]] = sext i32 [[TMP5]] to i64 1674 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1675 // CHECK2-NEXT: [[CMP:%.*]] = icmp ugt i64 [[CONV2]], [[TMP6]] 1676 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1677 // CHECK2: cond.true: 1678 // CHECK2-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1679 // CHECK2-NEXT: br label [[COND_END:%.*]] 1680 // CHECK2: cond.false: 1681 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1682 // CHECK2-NEXT: [[CONV3:%.*]] = sext i32 [[TMP8]] to i64 1683 // CHECK2-NEXT: br label [[COND_END]] 1684 // CHECK2: cond.end: 1685 // CHECK2-NEXT: [[COND:%.*]] = phi i64 [ [[TMP7]], [[COND_TRUE]] ], [ [[CONV3]], [[COND_FALSE]] ] 1686 // CHECK2-NEXT: [[CONV4:%.*]] = trunc i64 [[COND]] to i32 1687 // CHECK2-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 1688 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1689 // CHECK2-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 1690 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1691 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1692 // CHECK2-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 1693 // CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 1694 // CHECK2: omp.dispatch.body: 1695 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1696 // CHECK2: omp.inner.for.cond: 1697 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1698 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1699 // CHECK2-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 1700 // CHECK2-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1701 // CHECK2: omp.inner.for.body: 1702 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1703 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 1704 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1705 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1706 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 1707 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 1708 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64 1709 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 1710 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 1711 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1712 // CHECK2: omp.body.continue: 1713 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1714 // CHECK2: omp.inner.for.inc: 1715 // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1716 // CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP16]], 1 1717 // CHECK2-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 1718 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1719 // CHECK2: omp.inner.for.end: 1720 // CHECK2-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 1721 // CHECK2: omp.dispatch.inc: 1722 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1723 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1724 // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 1725 // CHECK2-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 1726 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1727 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1728 // CHECK2-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 1729 // CHECK2-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 1730 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND]] 1731 // CHECK2: omp.dispatch.end: 1732 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 1733 // CHECK2-NEXT: ret void 1734 // 1735 // 1736 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51 1737 // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 1738 // CHECK2-NEXT: entry: 1739 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1740 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1741 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1742 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 1743 // CHECK2-NEXT: ret void 1744 // 1745 // 1746 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..10 1747 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 1748 // CHECK2-NEXT: entry: 1749 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1750 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1751 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1752 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1753 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1754 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1755 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1756 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1757 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1758 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1759 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1760 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1761 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1762 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1763 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1764 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 1765 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1766 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1767 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1768 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1769 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1770 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1771 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1772 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1773 // CHECK2: cond.true: 1774 // CHECK2-NEXT: br label [[COND_END:%.*]] 1775 // CHECK2: cond.false: 1776 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1777 // CHECK2-NEXT: br label [[COND_END]] 1778 // CHECK2: cond.end: 1779 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1780 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1781 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1782 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1783 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1784 // CHECK2: omp.inner.for.cond: 1785 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1786 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1787 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1788 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1789 // CHECK2: omp.inner.for.body: 1790 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1791 // CHECK2-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 1792 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1793 // CHECK2-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 1794 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 1795 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1796 // CHECK2: omp.inner.for.inc: 1797 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1798 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1799 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1800 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1801 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1802 // CHECK2: omp.inner.for.end: 1803 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1804 // CHECK2: omp.loop.exit: 1805 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1806 // CHECK2-NEXT: ret void 1807 // 1808 // 1809 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..11 1810 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 1811 // CHECK2-NEXT: entry: 1812 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1813 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1814 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1815 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1816 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1817 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1818 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1819 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1820 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1821 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1822 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1823 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1824 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1825 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1826 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1827 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1828 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1829 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1830 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1831 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 1832 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1833 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 1834 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1835 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 1836 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1837 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1838 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1839 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1840 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1841 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1842 // CHECK2-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1843 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 1844 // CHECK2-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 1845 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 1846 // CHECK2: omp.dispatch.cond: 1847 // CHECK2-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 1848 // CHECK2-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 1849 // CHECK2-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 1850 // CHECK2: omp.dispatch.body: 1851 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1852 // CHECK2-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 1853 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1854 // CHECK2: omp.inner.for.cond: 1855 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1856 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9 1857 // CHECK2-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 1858 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1859 // CHECK2: omp.inner.for.body: 1860 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1861 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 1862 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1863 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9 1864 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 1865 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !9 1866 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 1867 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 1868 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !9 1869 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1870 // CHECK2: omp.body.continue: 1871 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1872 // CHECK2: omp.inner.for.inc: 1873 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1874 // CHECK2-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 1875 // CHECK2-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 1876 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] 1877 // CHECK2: omp.inner.for.end: 1878 // CHECK2-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 1879 // CHECK2: omp.dispatch.inc: 1880 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND]] 1881 // CHECK2: omp.dispatch.end: 1882 // CHECK2-NEXT: ret void 1883 // 1884 // 1885 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57 1886 // CHECK2-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 1887 // CHECK2-NEXT: entry: 1888 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1889 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1890 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1891 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 1892 // CHECK2-NEXT: ret void 1893 // 1894 // 1895 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..14 1896 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 1897 // CHECK2-NEXT: entry: 1898 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1899 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1900 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1901 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1902 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1903 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1904 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1905 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1906 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1907 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1908 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1909 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1910 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1911 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1912 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1913 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 1914 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1915 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1916 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1917 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1918 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1919 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1920 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 1921 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1922 // CHECK2: cond.true: 1923 // CHECK2-NEXT: br label [[COND_END:%.*]] 1924 // CHECK2: cond.false: 1925 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1926 // CHECK2-NEXT: br label [[COND_END]] 1927 // CHECK2: cond.end: 1928 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1929 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1930 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1931 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1932 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1933 // CHECK2: omp.inner.for.cond: 1934 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1935 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1936 // CHECK2-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1937 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1938 // CHECK2: omp.inner.for.body: 1939 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1940 // CHECK2-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 1941 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1942 // CHECK2-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 1943 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 1944 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1945 // CHECK2: omp.inner.for.inc: 1946 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1947 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1948 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1949 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1950 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1951 // CHECK2: omp.inner.for.end: 1952 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1953 // CHECK2: omp.loop.exit: 1954 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1955 // CHECK2-NEXT: ret void 1956 // 1957 // 1958 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..15 1959 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 1960 // CHECK2-NEXT: entry: 1961 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1962 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1963 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1964 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1965 // CHECK2-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 1966 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1967 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1968 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1969 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1970 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1971 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1972 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1973 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1974 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1975 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1976 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1977 // CHECK2-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 1978 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 1979 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1980 // CHECK2-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 1981 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1982 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 1983 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1984 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 1985 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1986 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1987 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1988 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1989 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1990 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1991 // CHECK2-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1992 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 1993 // CHECK2-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61) 1994 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 1995 // CHECK2: omp.dispatch.cond: 1996 // CHECK2-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 1997 // CHECK2-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 1998 // CHECK2-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 1999 // CHECK2: omp.dispatch.body: 2000 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2001 // CHECK2-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 2002 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2003 // CHECK2: omp.inner.for.cond: 2004 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 2005 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12 2006 // CHECK2-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 2007 // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2008 // CHECK2: omp.inner.for.body: 2009 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 2010 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 2011 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2012 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12 2013 // CHECK2-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 2014 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12 2015 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 2016 // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 2017 // CHECK2-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12 2018 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2019 // CHECK2: omp.body.continue: 2020 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2021 // CHECK2: omp.inner.for.inc: 2022 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 2023 // CHECK2-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 2024 // CHECK2-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 2025 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 2026 // CHECK2: omp.inner.for.end: 2027 // CHECK2-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2028 // CHECK2: omp.dispatch.inc: 2029 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND]] 2030 // CHECK2: omp.dispatch.end: 2031 // CHECK2-NEXT: ret void 2032 // 2033 // 2034 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2035 // CHECK2-SAME: () #[[ATTR3:[0-9]+]] { 2036 // CHECK2-NEXT: entry: 2037 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1) 2038 // CHECK2-NEXT: ret void 2039 // 2040 // 2041 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv 2042 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 2043 // CHECK3-NEXT: entry: 2044 // CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 2045 // CHECK3-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]]) 2046 // CHECK3-NEXT: ret i32 [[CALL]] 2047 // 2048 // 2049 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 2050 // CHECK3-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 2051 // CHECK3-NEXT: entry: 2052 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2053 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 2054 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 2055 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 2056 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2057 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4 2058 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4 2059 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4 2060 // CHECK3-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 2061 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4 2062 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4 2063 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4 2064 // CHECK3-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 2065 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 4 2066 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 4 2067 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 4 2068 // CHECK3-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 2069 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 4 2070 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 4 2071 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 4 2072 // CHECK3-NEXT: [[_TMP27:%.*]] = alloca i32, align 4 2073 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2074 // CHECK3-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2075 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 2076 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2077 // CHECK3-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 2078 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4 2079 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2080 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 2081 // CHECK3-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4 2082 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2083 // CHECK3-NEXT: store i8* null, i8** [[TMP4]], align 4 2084 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2085 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2086 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123) 2087 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2088 // CHECK3-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 2089 // CHECK3-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2090 // CHECK3: omp_offload.failed: 2091 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 2092 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 2093 // CHECK3: omp_offload.cont: 2094 // CHECK3-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 2095 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 2096 // CHECK3-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** 2097 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4 2098 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 2099 // CHECK3-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** 2100 // CHECK3-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4 2101 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0 2102 // CHECK3-NEXT: store i8* null, i8** [[TMP13]], align 4 2103 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 2104 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 2105 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 2106 // CHECK3-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2107 // CHECK3-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 2108 // CHECK3-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 2109 // CHECK3: omp_offload.failed7: 2110 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]] 2111 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT8]] 2112 // CHECK3: omp_offload.cont8: 2113 // CHECK3-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 2114 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 2115 // CHECK3-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 2116 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4 2117 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 2118 // CHECK3-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 2119 // CHECK3-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4 2120 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0 2121 // CHECK3-NEXT: store i8* null, i8** [[TMP22]], align 4 2122 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 2123 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 2124 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 2125 // CHECK3-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2126 // CHECK3-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 2127 // CHECK3-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 2128 // CHECK3: omp_offload.failed14: 2129 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(%struct.SS* [[THIS1]]) #[[ATTR2]] 2130 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT15]] 2131 // CHECK3: omp_offload.cont15: 2132 // CHECK3-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 2133 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 2134 // CHECK3-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS** 2135 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 4 2136 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 2137 // CHECK3-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]** 2138 // CHECK3-NEXT: store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 4 2139 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 0 2140 // CHECK3-NEXT: store i8* null, i8** [[TMP31]], align 4 2141 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 2142 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 2143 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 2144 // CHECK3-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2145 // CHECK3-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 2146 // CHECK3-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]] 2147 // CHECK3: omp_offload.failed21: 2148 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(%struct.SS* [[THIS1]]) #[[ATTR2]] 2149 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT22]] 2150 // CHECK3: omp_offload.cont22: 2151 // CHECK3-NEXT: [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 2152 // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 2153 // CHECK3-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS** 2154 // CHECK3-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 4 2155 // CHECK3-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 2156 // CHECK3-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]** 2157 // CHECK3-NEXT: store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 4 2158 // CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 0 2159 // CHECK3-NEXT: store i8* null, i8** [[TMP40]], align 4 2160 // CHECK3-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 2161 // CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 2162 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 2163 // CHECK3-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2164 // CHECK3-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 2165 // CHECK3-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]] 2166 // CHECK3: omp_offload.failed28: 2167 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(%struct.SS* [[THIS1]]) #[[ATTR2]] 2168 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT29]] 2169 // CHECK3: omp_offload.cont29: 2170 // CHECK3-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 2171 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i32 0, i32 0 2172 // CHECK3-NEXT: [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 2173 // CHECK3-NEXT: ret i32 [[TMP45]] 2174 // 2175 // 2176 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35 2177 // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 2178 // CHECK3-NEXT: entry: 2179 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2180 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2181 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2182 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 2183 // CHECK3-NEXT: ret void 2184 // 2185 // 2186 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 2187 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 2188 // CHECK3-NEXT: entry: 2189 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2190 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2191 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2192 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2193 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2194 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2195 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2196 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2197 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2198 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2199 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2200 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2201 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2202 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2203 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2204 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 2205 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2206 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2207 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2208 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2209 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2210 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2211 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 2212 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2213 // CHECK3: cond.true: 2214 // CHECK3-NEXT: br label [[COND_END:%.*]] 2215 // CHECK3: cond.false: 2216 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2217 // CHECK3-NEXT: br label [[COND_END]] 2218 // CHECK3: cond.end: 2219 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2220 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2221 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2222 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2223 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2224 // CHECK3: omp.inner.for.cond: 2225 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2226 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2227 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2228 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2229 // CHECK3: omp.inner.for.body: 2230 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2231 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2232 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 2233 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2234 // CHECK3: omp.inner.for.inc: 2235 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2236 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2237 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 2238 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2239 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 2240 // CHECK3: omp.inner.for.end: 2241 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2242 // CHECK3: omp.loop.exit: 2243 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2244 // CHECK3-NEXT: ret void 2245 // 2246 // 2247 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 2248 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 2249 // CHECK3-NEXT: entry: 2250 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2251 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2252 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2253 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2254 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2255 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2256 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2257 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2258 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2259 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2260 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2261 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2262 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2263 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2264 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2265 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2266 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2267 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2268 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2269 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 2270 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2271 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2272 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 2273 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 2274 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2275 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2276 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2277 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 2278 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2279 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2280 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 2281 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2282 // CHECK3: cond.true: 2283 // CHECK3-NEXT: br label [[COND_END:%.*]] 2284 // CHECK3: cond.false: 2285 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2286 // CHECK3-NEXT: br label [[COND_END]] 2287 // CHECK3: cond.end: 2288 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 2289 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2290 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2291 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 2292 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2293 // CHECK3: omp.inner.for.cond: 2294 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2295 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2296 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 2297 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2298 // CHECK3: omp.inner.for.body: 2299 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2300 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 2301 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2302 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2303 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 2304 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 2305 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]] 2306 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2307 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2308 // CHECK3: omp.body.continue: 2309 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2310 // CHECK3: omp.inner.for.inc: 2311 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2312 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 2313 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 2314 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 2315 // CHECK3: omp.inner.for.end: 2316 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2317 // CHECK3: omp.loop.exit: 2318 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 2319 // CHECK3-NEXT: ret void 2320 // 2321 // 2322 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40 2323 // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 2324 // CHECK3-NEXT: entry: 2325 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2326 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2327 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2328 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 2329 // CHECK3-NEXT: ret void 2330 // 2331 // 2332 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..2 2333 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 2334 // CHECK3-NEXT: entry: 2335 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2336 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2337 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2338 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2339 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2340 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2341 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2342 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2343 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2344 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2345 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2346 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2347 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2348 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2349 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2350 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 2351 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2352 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2353 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2354 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2355 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2356 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2357 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 2358 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2359 // CHECK3: cond.true: 2360 // CHECK3-NEXT: br label [[COND_END:%.*]] 2361 // CHECK3: cond.false: 2362 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2363 // CHECK3-NEXT: br label [[COND_END]] 2364 // CHECK3: cond.end: 2365 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2366 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2367 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2368 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2369 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2370 // CHECK3: omp.inner.for.cond: 2371 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2372 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2373 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2374 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2375 // CHECK3: omp.inner.for.body: 2376 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2377 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2378 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 2379 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2380 // CHECK3: omp.inner.for.inc: 2381 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2382 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2383 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 2384 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2385 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 2386 // CHECK3: omp.inner.for.end: 2387 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2388 // CHECK3: omp.loop.exit: 2389 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2390 // CHECK3-NEXT: ret void 2391 // 2392 // 2393 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3 2394 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 2395 // CHECK3-NEXT: entry: 2396 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2397 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2398 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2399 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2400 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2401 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2402 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2403 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2404 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2405 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2406 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2407 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2408 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2409 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2410 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2411 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2412 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2413 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2414 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2415 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 2416 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2417 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2418 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 2419 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 2420 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2421 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2422 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2423 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 2424 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2425 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2426 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 2427 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2428 // CHECK3: cond.true: 2429 // CHECK3-NEXT: br label [[COND_END:%.*]] 2430 // CHECK3: cond.false: 2431 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2432 // CHECK3-NEXT: br label [[COND_END]] 2433 // CHECK3: cond.end: 2434 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 2435 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2436 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2437 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 2438 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2439 // CHECK3: omp.inner.for.cond: 2440 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2441 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2442 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 2443 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2444 // CHECK3: omp.inner.for.body: 2445 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2446 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 2447 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2448 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2449 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 2450 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 2451 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]] 2452 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2453 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2454 // CHECK3: omp.body.continue: 2455 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2456 // CHECK3: omp.inner.for.inc: 2457 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2458 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 2459 // CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 2460 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 2461 // CHECK3: omp.inner.for.end: 2462 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2463 // CHECK3: omp.loop.exit: 2464 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 2465 // CHECK3-NEXT: ret void 2466 // 2467 // 2468 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45 2469 // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 2470 // CHECK3-NEXT: entry: 2471 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2472 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2473 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2474 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 2475 // CHECK3-NEXT: ret void 2476 // 2477 // 2478 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..6 2479 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 2480 // CHECK3-NEXT: entry: 2481 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2482 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2483 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2484 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2485 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2486 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2487 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2488 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2489 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2490 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2491 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2492 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2493 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2494 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2495 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2496 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 2497 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2498 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2499 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2500 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2501 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2502 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2503 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 2504 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2505 // CHECK3: cond.true: 2506 // CHECK3-NEXT: br label [[COND_END:%.*]] 2507 // CHECK3: cond.false: 2508 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2509 // CHECK3-NEXT: br label [[COND_END]] 2510 // CHECK3: cond.end: 2511 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2512 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2513 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2514 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2515 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2516 // CHECK3: omp.inner.for.cond: 2517 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2518 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2519 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2520 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2521 // CHECK3: omp.inner.for.body: 2522 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2523 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2524 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 2525 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2526 // CHECK3: omp.inner.for.inc: 2527 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2528 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2529 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 2530 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2531 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 2532 // CHECK3: omp.inner.for.end: 2533 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2534 // CHECK3: omp.loop.exit: 2535 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2536 // CHECK3-NEXT: ret void 2537 // 2538 // 2539 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..7 2540 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 2541 // CHECK3-NEXT: entry: 2542 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2543 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2544 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2545 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2546 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2547 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2548 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2549 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2550 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2551 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2552 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2553 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2554 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2555 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2556 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2557 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2558 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2559 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2560 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2561 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 2562 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2563 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2564 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 2565 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 2566 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2567 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2568 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2569 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 2570 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 2571 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2572 // CHECK3: omp.dispatch.cond: 2573 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2574 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2575 // CHECK3-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP5]], [[TMP6]] 2576 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2577 // CHECK3: cond.true: 2578 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2579 // CHECK3-NEXT: br label [[COND_END:%.*]] 2580 // CHECK3: cond.false: 2581 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2582 // CHECK3-NEXT: br label [[COND_END]] 2583 // CHECK3: cond.end: 2584 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 2585 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2586 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2587 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 2588 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2589 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2590 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 2591 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2592 // CHECK3: omp.dispatch.body: 2593 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2594 // CHECK3: omp.inner.for.cond: 2595 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2596 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2597 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 2598 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2599 // CHECK3: omp.inner.for.body: 2600 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2601 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 2602 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2603 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2604 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 2605 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 2606 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP15]] 2607 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 2608 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2609 // CHECK3: omp.body.continue: 2610 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2611 // CHECK3: omp.inner.for.inc: 2612 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2613 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1 2614 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 2615 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 2616 // CHECK3: omp.inner.for.end: 2617 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2618 // CHECK3: omp.dispatch.inc: 2619 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2620 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2621 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 2622 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 2623 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2624 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2625 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 2626 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 2627 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] 2628 // CHECK3: omp.dispatch.end: 2629 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 2630 // CHECK3-NEXT: ret void 2631 // 2632 // 2633 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51 2634 // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 2635 // CHECK3-NEXT: entry: 2636 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2637 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2638 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2639 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 2640 // CHECK3-NEXT: ret void 2641 // 2642 // 2643 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..10 2644 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 2645 // CHECK3-NEXT: entry: 2646 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2647 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2648 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2649 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2650 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2651 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2652 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2653 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2654 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2655 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2656 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2657 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2658 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2659 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2660 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2661 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 2662 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2663 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2664 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2665 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2666 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2667 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2668 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 2669 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2670 // CHECK3: cond.true: 2671 // CHECK3-NEXT: br label [[COND_END:%.*]] 2672 // CHECK3: cond.false: 2673 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2674 // CHECK3-NEXT: br label [[COND_END]] 2675 // CHECK3: cond.end: 2676 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2677 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2678 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2679 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2680 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2681 // CHECK3: omp.inner.for.cond: 2682 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2683 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2684 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2685 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2686 // CHECK3: omp.inner.for.body: 2687 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2688 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2689 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 2690 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2691 // CHECK3: omp.inner.for.inc: 2692 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2693 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2694 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 2695 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2696 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 2697 // CHECK3: omp.inner.for.end: 2698 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2699 // CHECK3: omp.loop.exit: 2700 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2701 // CHECK3-NEXT: ret void 2702 // 2703 // 2704 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..11 2705 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 2706 // CHECK3-NEXT: entry: 2707 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2708 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2709 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2710 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2711 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2712 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2713 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2714 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2715 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2716 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2717 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2718 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2719 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2720 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2721 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2722 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2723 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2724 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2725 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2726 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 2727 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2728 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2729 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 2730 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 2731 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2732 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2733 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2734 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2735 // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2736 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 2737 // CHECK3-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 2738 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2739 // CHECK3: omp.dispatch.cond: 2740 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 2741 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 2742 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2743 // CHECK3: omp.dispatch.body: 2744 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2745 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 2746 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2747 // CHECK3: omp.inner.for.cond: 2748 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 2749 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10 2750 // CHECK3-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 2751 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2752 // CHECK3: omp.inner.for.body: 2753 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 2754 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 2755 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2756 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !10 2757 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 2758 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !10 2759 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]] 2760 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !10 2761 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2762 // CHECK3: omp.body.continue: 2763 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2764 // CHECK3: omp.inner.for.inc: 2765 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 2766 // CHECK3-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 2767 // CHECK3-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 2768 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]] 2769 // CHECK3: omp.inner.for.end: 2770 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2771 // CHECK3: omp.dispatch.inc: 2772 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] 2773 // CHECK3: omp.dispatch.end: 2774 // CHECK3-NEXT: ret void 2775 // 2776 // 2777 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57 2778 // CHECK3-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 2779 // CHECK3-NEXT: entry: 2780 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2781 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2782 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2783 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 2784 // CHECK3-NEXT: ret void 2785 // 2786 // 2787 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..14 2788 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 2789 // CHECK3-NEXT: entry: 2790 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2791 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2792 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2793 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2794 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2795 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2796 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2797 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2798 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2799 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2800 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2801 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2802 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2803 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2804 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2805 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 2806 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2807 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2808 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2809 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2810 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2811 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2812 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 2813 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2814 // CHECK3: cond.true: 2815 // CHECK3-NEXT: br label [[COND_END:%.*]] 2816 // CHECK3: cond.false: 2817 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2818 // CHECK3-NEXT: br label [[COND_END]] 2819 // CHECK3: cond.end: 2820 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2821 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2822 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2823 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2824 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2825 // CHECK3: omp.inner.for.cond: 2826 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2827 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2828 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2829 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2830 // CHECK3: omp.inner.for.body: 2831 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2832 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2833 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 2834 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2835 // CHECK3: omp.inner.for.inc: 2836 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2837 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2838 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 2839 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2840 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 2841 // CHECK3: omp.inner.for.end: 2842 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2843 // CHECK3: omp.loop.exit: 2844 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2845 // CHECK3-NEXT: ret void 2846 // 2847 // 2848 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..15 2849 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 2850 // CHECK3-NEXT: entry: 2851 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2852 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2853 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2854 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2855 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2856 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2857 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 2858 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2859 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2860 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2861 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2862 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 2863 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2864 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2865 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2866 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2867 // CHECK3-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2868 // CHECK3-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2869 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2870 // CHECK3-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 2871 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2872 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2873 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 2874 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 2875 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2876 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2877 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2878 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2879 // CHECK3-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2880 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 2881 // CHECK3-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61) 2882 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 2883 // CHECK3: omp.dispatch.cond: 2884 // CHECK3-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 2885 // CHECK3-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 2886 // CHECK3-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 2887 // CHECK3: omp.dispatch.body: 2888 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2889 // CHECK3-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 2890 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2891 // CHECK3: omp.inner.for.cond: 2892 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 2893 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13 2894 // CHECK3-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 2895 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2896 // CHECK3: omp.inner.for.body: 2897 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 2898 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 2899 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2900 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13 2901 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 2902 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13 2903 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]] 2904 // CHECK3-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13 2905 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2906 // CHECK3: omp.body.continue: 2907 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2908 // CHECK3: omp.inner.for.inc: 2909 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 2910 // CHECK3-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 2911 // CHECK3-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 2912 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 2913 // CHECK3: omp.inner.for.end: 2914 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 2915 // CHECK3: omp.dispatch.inc: 2916 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] 2917 // CHECK3: omp.dispatch.end: 2918 // CHECK3-NEXT: ret void 2919 // 2920 // 2921 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2922 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] { 2923 // CHECK3-NEXT: entry: 2924 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 2925 // CHECK3-NEXT: ret void 2926 // 2927 // 2928 // CHECK4-LABEL: define {{[^@]+}}@_Z21teams_template_structv 2929 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] { 2930 // CHECK4-NEXT: entry: 2931 // CHECK4-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 2932 // CHECK4-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]]) 2933 // CHECK4-NEXT: ret i32 [[CALL]] 2934 // 2935 // 2936 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 2937 // CHECK4-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 2938 // CHECK4-NEXT: entry: 2939 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 2940 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 2941 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 2942 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 2943 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 2944 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4 2945 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4 2946 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4 2947 // CHECK4-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 2948 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4 2949 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4 2950 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4 2951 // CHECK4-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 2952 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 4 2953 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 4 2954 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 4 2955 // CHECK4-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 2956 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 4 2957 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 4 2958 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 4 2959 // CHECK4-NEXT: [[_TMP27:%.*]] = alloca i32, align 4 2960 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 2961 // CHECK4-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 2962 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 2963 // CHECK4-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2964 // CHECK4-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 2965 // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4 2966 // CHECK4-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2967 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 2968 // CHECK4-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4 2969 // CHECK4-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2970 // CHECK4-NEXT: store i8* null, i8** [[TMP4]], align 4 2971 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2972 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2973 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123) 2974 // CHECK4-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2975 // CHECK4-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 2976 // CHECK4-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2977 // CHECK4: omp_offload.failed: 2978 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 2979 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]] 2980 // CHECK4: omp_offload.cont: 2981 // CHECK4-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 2982 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 2983 // CHECK4-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** 2984 // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4 2985 // CHECK4-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 2986 // CHECK4-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** 2987 // CHECK4-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4 2988 // CHECK4-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0 2989 // CHECK4-NEXT: store i8* null, i8** [[TMP13]], align 4 2990 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 2991 // CHECK4-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 2992 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 2993 // CHECK4-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2994 // CHECK4-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 2995 // CHECK4-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 2996 // CHECK4: omp_offload.failed7: 2997 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]] 2998 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT8]] 2999 // CHECK4: omp_offload.cont8: 3000 // CHECK4-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 3001 // CHECK4-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 3002 // CHECK4-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 3003 // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4 3004 // CHECK4-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 3005 // CHECK4-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 3006 // CHECK4-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4 3007 // CHECK4-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0 3008 // CHECK4-NEXT: store i8* null, i8** [[TMP22]], align 4 3009 // CHECK4-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 3010 // CHECK4-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 3011 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 3012 // CHECK4-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3013 // CHECK4-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 3014 // CHECK4-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 3015 // CHECK4: omp_offload.failed14: 3016 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(%struct.SS* [[THIS1]]) #[[ATTR2]] 3017 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT15]] 3018 // CHECK4: omp_offload.cont15: 3019 // CHECK4-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 3020 // CHECK4-NEXT: [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 3021 // CHECK4-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS** 3022 // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 4 3023 // CHECK4-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 3024 // CHECK4-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]** 3025 // CHECK4-NEXT: store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 4 3026 // CHECK4-NEXT: [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 0 3027 // CHECK4-NEXT: store i8* null, i8** [[TMP31]], align 4 3028 // CHECK4-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 3029 // CHECK4-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 3030 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 3031 // CHECK4-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3032 // CHECK4-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 3033 // CHECK4-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]] 3034 // CHECK4: omp_offload.failed21: 3035 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(%struct.SS* [[THIS1]]) #[[ATTR2]] 3036 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT22]] 3037 // CHECK4: omp_offload.cont22: 3038 // CHECK4-NEXT: [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 3039 // CHECK4-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 3040 // CHECK4-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS** 3041 // CHECK4-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 4 3042 // CHECK4-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 3043 // CHECK4-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]** 3044 // CHECK4-NEXT: store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 4 3045 // CHECK4-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 0 3046 // CHECK4-NEXT: store i8* null, i8** [[TMP40]], align 4 3047 // CHECK4-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 3048 // CHECK4-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 3049 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 3050 // CHECK4-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3051 // CHECK4-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 3052 // CHECK4-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]] 3053 // CHECK4: omp_offload.failed28: 3054 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(%struct.SS* [[THIS1]]) #[[ATTR2]] 3055 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT29]] 3056 // CHECK4: omp_offload.cont29: 3057 // CHECK4-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 3058 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i32 0, i32 0 3059 // CHECK4-NEXT: [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 3060 // CHECK4-NEXT: ret i32 [[TMP45]] 3061 // 3062 // 3063 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35 3064 // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 3065 // CHECK4-NEXT: entry: 3066 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3067 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3068 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3069 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 3070 // CHECK4-NEXT: ret void 3071 // 3072 // 3073 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 3074 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 3075 // CHECK4-NEXT: entry: 3076 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3077 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3078 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3079 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3080 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 3081 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3082 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3083 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3084 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3085 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 3086 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3087 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3088 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3089 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3090 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3091 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 3092 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3093 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3094 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3095 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3096 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3097 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3098 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 3099 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3100 // CHECK4: cond.true: 3101 // CHECK4-NEXT: br label [[COND_END:%.*]] 3102 // CHECK4: cond.false: 3103 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3104 // CHECK4-NEXT: br label [[COND_END]] 3105 // CHECK4: cond.end: 3106 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3107 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3108 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3109 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3110 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3111 // CHECK4: omp.inner.for.cond: 3112 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3113 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3114 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3115 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3116 // CHECK4: omp.inner.for.body: 3117 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3118 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3119 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 3120 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3121 // CHECK4: omp.inner.for.inc: 3122 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3123 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3124 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 3125 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3126 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 3127 // CHECK4: omp.inner.for.end: 3128 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3129 // CHECK4: omp.loop.exit: 3130 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3131 // CHECK4-NEXT: ret void 3132 // 3133 // 3134 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1 3135 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 3136 // CHECK4-NEXT: entry: 3137 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3138 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3139 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3140 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3141 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3142 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3143 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 3144 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3145 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3146 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3147 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3148 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 3149 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3150 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3151 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3152 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3153 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3154 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3155 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3156 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 3157 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3158 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3159 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 3160 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 3161 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3162 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3163 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3164 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 3165 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3166 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3167 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 3168 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3169 // CHECK4: cond.true: 3170 // CHECK4-NEXT: br label [[COND_END:%.*]] 3171 // CHECK4: cond.false: 3172 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3173 // CHECK4-NEXT: br label [[COND_END]] 3174 // CHECK4: cond.end: 3175 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 3176 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3177 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3178 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 3179 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3180 // CHECK4: omp.inner.for.cond: 3181 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3182 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3183 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 3184 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3185 // CHECK4: omp.inner.for.body: 3186 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3187 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 3188 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3189 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3190 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 3191 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 3192 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]] 3193 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3194 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3195 // CHECK4: omp.body.continue: 3196 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3197 // CHECK4: omp.inner.for.inc: 3198 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3199 // CHECK4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 3200 // CHECK4-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 3201 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 3202 // CHECK4: omp.inner.for.end: 3203 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3204 // CHECK4: omp.loop.exit: 3205 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 3206 // CHECK4-NEXT: ret void 3207 // 3208 // 3209 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40 3210 // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 3211 // CHECK4-NEXT: entry: 3212 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3213 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3214 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3215 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 3216 // CHECK4-NEXT: ret void 3217 // 3218 // 3219 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..2 3220 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 3221 // CHECK4-NEXT: entry: 3222 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3223 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3224 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3225 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3226 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 3227 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3228 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3229 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3230 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3231 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 3232 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3233 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3234 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3235 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3236 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3237 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 3238 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3239 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3240 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3241 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3242 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3243 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3244 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 3245 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3246 // CHECK4: cond.true: 3247 // CHECK4-NEXT: br label [[COND_END:%.*]] 3248 // CHECK4: cond.false: 3249 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3250 // CHECK4-NEXT: br label [[COND_END]] 3251 // CHECK4: cond.end: 3252 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3253 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3254 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3255 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3256 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3257 // CHECK4: omp.inner.for.cond: 3258 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3259 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3260 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3261 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3262 // CHECK4: omp.inner.for.body: 3263 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3264 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3265 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 3266 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3267 // CHECK4: omp.inner.for.inc: 3268 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3269 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3270 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 3271 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3272 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 3273 // CHECK4: omp.inner.for.end: 3274 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3275 // CHECK4: omp.loop.exit: 3276 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3277 // CHECK4-NEXT: ret void 3278 // 3279 // 3280 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..3 3281 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 3282 // CHECK4-NEXT: entry: 3283 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3284 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3285 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3286 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3287 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3288 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3289 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 3290 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3291 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3292 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3293 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3294 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 3295 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3296 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3297 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3298 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3299 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3300 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3301 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3302 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 3303 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3304 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3305 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 3306 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 3307 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3308 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3309 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3310 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 3311 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3312 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3313 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 3314 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3315 // CHECK4: cond.true: 3316 // CHECK4-NEXT: br label [[COND_END:%.*]] 3317 // CHECK4: cond.false: 3318 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3319 // CHECK4-NEXT: br label [[COND_END]] 3320 // CHECK4: cond.end: 3321 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 3322 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3323 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3324 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 3325 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3326 // CHECK4: omp.inner.for.cond: 3327 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3328 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3329 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 3330 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3331 // CHECK4: omp.inner.for.body: 3332 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3333 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 3334 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3335 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3336 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 3337 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 3338 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]] 3339 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3340 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3341 // CHECK4: omp.body.continue: 3342 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3343 // CHECK4: omp.inner.for.inc: 3344 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3345 // CHECK4-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 3346 // CHECK4-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 3347 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 3348 // CHECK4: omp.inner.for.end: 3349 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3350 // CHECK4: omp.loop.exit: 3351 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 3352 // CHECK4-NEXT: ret void 3353 // 3354 // 3355 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45 3356 // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 3357 // CHECK4-NEXT: entry: 3358 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3359 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3360 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3361 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 3362 // CHECK4-NEXT: ret void 3363 // 3364 // 3365 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..6 3366 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 3367 // CHECK4-NEXT: entry: 3368 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3369 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3370 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3371 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3372 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 3373 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3374 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3375 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3376 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3377 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 3378 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3379 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3380 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3381 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3382 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3383 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 3384 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3385 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3386 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3387 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3388 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3389 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3390 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 3391 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3392 // CHECK4: cond.true: 3393 // CHECK4-NEXT: br label [[COND_END:%.*]] 3394 // CHECK4: cond.false: 3395 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3396 // CHECK4-NEXT: br label [[COND_END]] 3397 // CHECK4: cond.end: 3398 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3399 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3400 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3401 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3402 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3403 // CHECK4: omp.inner.for.cond: 3404 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3405 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3406 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3407 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3408 // CHECK4: omp.inner.for.body: 3409 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3410 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3411 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 3412 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3413 // CHECK4: omp.inner.for.inc: 3414 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3415 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3416 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 3417 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3418 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 3419 // CHECK4: omp.inner.for.end: 3420 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3421 // CHECK4: omp.loop.exit: 3422 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3423 // CHECK4-NEXT: ret void 3424 // 3425 // 3426 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..7 3427 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 3428 // CHECK4-NEXT: entry: 3429 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3430 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3431 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3432 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3433 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3434 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3435 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 3436 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3437 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3438 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3439 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3440 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 3441 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3442 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3443 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3444 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3445 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3446 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3447 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3448 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 3449 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3450 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3451 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 3452 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 3453 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3454 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3455 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3456 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 3457 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 3458 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 3459 // CHECK4: omp.dispatch.cond: 3460 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3461 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3462 // CHECK4-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP5]], [[TMP6]] 3463 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3464 // CHECK4: cond.true: 3465 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3466 // CHECK4-NEXT: br label [[COND_END:%.*]] 3467 // CHECK4: cond.false: 3468 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3469 // CHECK4-NEXT: br label [[COND_END]] 3470 // CHECK4: cond.end: 3471 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 3472 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3473 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3474 // CHECK4-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 3475 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3476 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3477 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 3478 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 3479 // CHECK4: omp.dispatch.body: 3480 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3481 // CHECK4: omp.inner.for.cond: 3482 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3483 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3484 // CHECK4-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 3485 // CHECK4-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3486 // CHECK4: omp.inner.for.body: 3487 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3488 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 3489 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3490 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3491 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 3492 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 3493 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP15]] 3494 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 3495 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3496 // CHECK4: omp.body.continue: 3497 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3498 // CHECK4: omp.inner.for.inc: 3499 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3500 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1 3501 // CHECK4-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 3502 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 3503 // CHECK4: omp.inner.for.end: 3504 // CHECK4-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 3505 // CHECK4: omp.dispatch.inc: 3506 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3507 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3508 // CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 3509 // CHECK4-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 3510 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3511 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3512 // CHECK4-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 3513 // CHECK4-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 3514 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND]] 3515 // CHECK4: omp.dispatch.end: 3516 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 3517 // CHECK4-NEXT: ret void 3518 // 3519 // 3520 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51 3521 // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 3522 // CHECK4-NEXT: entry: 3523 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3524 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3525 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3526 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 3527 // CHECK4-NEXT: ret void 3528 // 3529 // 3530 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..10 3531 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 3532 // CHECK4-NEXT: entry: 3533 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3534 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3535 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3536 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3537 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 3538 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3539 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3540 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3541 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3542 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 3543 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3544 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3545 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3546 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3547 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3548 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 3549 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3550 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3551 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3552 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3553 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3554 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3555 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 3556 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3557 // CHECK4: cond.true: 3558 // CHECK4-NEXT: br label [[COND_END:%.*]] 3559 // CHECK4: cond.false: 3560 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3561 // CHECK4-NEXT: br label [[COND_END]] 3562 // CHECK4: cond.end: 3563 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3564 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3565 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3566 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3567 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3568 // CHECK4: omp.inner.for.cond: 3569 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3570 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3571 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3572 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3573 // CHECK4: omp.inner.for.body: 3574 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3575 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3576 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 3577 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3578 // CHECK4: omp.inner.for.inc: 3579 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3580 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3581 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 3582 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3583 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 3584 // CHECK4: omp.inner.for.end: 3585 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3586 // CHECK4: omp.loop.exit: 3587 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3588 // CHECK4-NEXT: ret void 3589 // 3590 // 3591 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..11 3592 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 3593 // CHECK4-NEXT: entry: 3594 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3595 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3596 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3597 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3598 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3599 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3600 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 3601 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3602 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3603 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3604 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3605 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 3606 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3607 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3608 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3609 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3610 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3611 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3612 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3613 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 3614 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3615 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3616 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 3617 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 3618 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3619 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3620 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3621 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3622 // CHECK4-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3623 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 3624 // CHECK4-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 3625 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 3626 // CHECK4: omp.dispatch.cond: 3627 // CHECK4-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 3628 // CHECK4-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 3629 // CHECK4-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 3630 // CHECK4: omp.dispatch.body: 3631 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3632 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 3633 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3634 // CHECK4: omp.inner.for.cond: 3635 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 3636 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10 3637 // CHECK4-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 3638 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3639 // CHECK4: omp.inner.for.body: 3640 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 3641 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 3642 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3643 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !10 3644 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 3645 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !10 3646 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]] 3647 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !10 3648 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3649 // CHECK4: omp.body.continue: 3650 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3651 // CHECK4: omp.inner.for.inc: 3652 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 3653 // CHECK4-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 3654 // CHECK4-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 3655 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]] 3656 // CHECK4: omp.inner.for.end: 3657 // CHECK4-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 3658 // CHECK4: omp.dispatch.inc: 3659 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND]] 3660 // CHECK4: omp.dispatch.end: 3661 // CHECK4-NEXT: ret void 3662 // 3663 // 3664 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57 3665 // CHECK4-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 3666 // CHECK4-NEXT: entry: 3667 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3668 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3669 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3670 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 3671 // CHECK4-NEXT: ret void 3672 // 3673 // 3674 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..14 3675 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 3676 // CHECK4-NEXT: entry: 3677 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3678 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3679 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3680 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3681 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 3682 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3683 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3684 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3685 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3686 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 3687 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3688 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3689 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3690 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3691 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3692 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 3693 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3694 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3695 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3696 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3697 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3698 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3699 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 3700 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3701 // CHECK4: cond.true: 3702 // CHECK4-NEXT: br label [[COND_END:%.*]] 3703 // CHECK4: cond.false: 3704 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3705 // CHECK4-NEXT: br label [[COND_END]] 3706 // CHECK4: cond.end: 3707 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3708 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3709 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3710 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3711 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3712 // CHECK4: omp.inner.for.cond: 3713 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3714 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3715 // CHECK4-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 3716 // CHECK4-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3717 // CHECK4: omp.inner.for.body: 3718 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3719 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3720 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 3721 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3722 // CHECK4: omp.inner.for.inc: 3723 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3724 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 3725 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 3726 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 3727 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 3728 // CHECK4: omp.inner.for.end: 3729 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3730 // CHECK4: omp.loop.exit: 3731 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 3732 // CHECK4-NEXT: ret void 3733 // 3734 // 3735 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..15 3736 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 3737 // CHECK4-NEXT: entry: 3738 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 3739 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 3740 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 3741 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 3742 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 3743 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3744 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 3745 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 3746 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 3747 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3748 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3749 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 3750 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 3751 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 3752 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3753 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3754 // CHECK4-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 3755 // CHECK4-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 3756 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 3757 // CHECK4-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 3758 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 3759 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 3760 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 3761 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 3762 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3763 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3764 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3765 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3766 // CHECK4-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 3767 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 3768 // CHECK4-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61) 3769 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 3770 // CHECK4: omp.dispatch.cond: 3771 // CHECK4-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 3772 // CHECK4-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 3773 // CHECK4-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 3774 // CHECK4: omp.dispatch.body: 3775 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3776 // CHECK4-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 3777 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3778 // CHECK4: omp.inner.for.cond: 3779 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 3780 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13 3781 // CHECK4-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 3782 // CHECK4-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3783 // CHECK4: omp.inner.for.body: 3784 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 3785 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 3786 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3787 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13 3788 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 3789 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13 3790 // CHECK4-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]] 3791 // CHECK4-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13 3792 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3793 // CHECK4: omp.body.continue: 3794 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3795 // CHECK4: omp.inner.for.inc: 3796 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 3797 // CHECK4-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 3798 // CHECK4-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 3799 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 3800 // CHECK4: omp.inner.for.end: 3801 // CHECK4-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 3802 // CHECK4: omp.dispatch.inc: 3803 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND]] 3804 // CHECK4: omp.dispatch.end: 3805 // CHECK4-NEXT: ret void 3806 // 3807 // 3808 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3809 // CHECK4-SAME: () #[[ATTR3:[0-9]+]] { 3810 // CHECK4-NEXT: entry: 3811 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1) 3812 // CHECK4-NEXT: ret void 3813 // 3814 // 3815 // CHECK5-LABEL: define {{[^@]+}}@_Z21teams_template_structv 3816 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { 3817 // CHECK5-NEXT: entry: 3818 // CHECK5-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 3819 // CHECK5-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]]) 3820 // CHECK5-NEXT: ret i32 [[CALL]] 3821 // 3822 // 3823 // CHECK5-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 3824 // CHECK5-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 3825 // CHECK5-NEXT: entry: 3826 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 3827 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 3828 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 3829 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 3830 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3831 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8 3832 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8 3833 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8 3834 // CHECK5-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 3835 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8 3836 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8 3837 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8 3838 // CHECK5-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 3839 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 8 3840 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 8 3841 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 8 3842 // CHECK5-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 3843 // CHECK5-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 8 3844 // CHECK5-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 8 3845 // CHECK5-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 8 3846 // CHECK5-NEXT: [[_TMP27:%.*]] = alloca i32, align 4 3847 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 3848 // CHECK5-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 3849 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 3850 // CHECK5-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3851 // CHECK5-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 3852 // CHECK5-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 3853 // CHECK5-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3854 // CHECK5-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 3855 // CHECK5-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8 3856 // CHECK5-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 3857 // CHECK5-NEXT: store i8* null, i8** [[TMP4]], align 8 3858 // CHECK5-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 3859 // CHECK5-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 3860 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123) 3861 // CHECK5-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3862 // CHECK5-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 3863 // CHECK5-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 3864 // CHECK5: omp_offload.failed: 3865 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 3866 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT]] 3867 // CHECK5: omp_offload.cont: 3868 // CHECK5-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 3869 // CHECK5-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 3870 // CHECK5-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** 3871 // CHECK5-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8 3872 // CHECK5-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 3873 // CHECK5-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** 3874 // CHECK5-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8 3875 // CHECK5-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0 3876 // CHECK5-NEXT: store i8* null, i8** [[TMP13]], align 8 3877 // CHECK5-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 3878 // CHECK5-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 3879 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 3880 // CHECK5-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3881 // CHECK5-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 3882 // CHECK5-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 3883 // CHECK5: omp_offload.failed7: 3884 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]] 3885 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT8]] 3886 // CHECK5: omp_offload.cont8: 3887 // CHECK5-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 3888 // CHECK5-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 3889 // CHECK5-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 3890 // CHECK5-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8 3891 // CHECK5-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 3892 // CHECK5-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 3893 // CHECK5-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8 3894 // CHECK5-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0 3895 // CHECK5-NEXT: store i8* null, i8** [[TMP22]], align 8 3896 // CHECK5-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 3897 // CHECK5-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 3898 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 3899 // CHECK5-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3900 // CHECK5-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 3901 // CHECK5-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 3902 // CHECK5: omp_offload.failed14: 3903 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(%struct.SS* [[THIS1]]) #[[ATTR2]] 3904 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT15]] 3905 // CHECK5: omp_offload.cont15: 3906 // CHECK5-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 3907 // CHECK5-NEXT: [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 3908 // CHECK5-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS** 3909 // CHECK5-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 8 3910 // CHECK5-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 3911 // CHECK5-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]** 3912 // CHECK5-NEXT: store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 8 3913 // CHECK5-NEXT: [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i64 0, i64 0 3914 // CHECK5-NEXT: store i8* null, i8** [[TMP31]], align 8 3915 // CHECK5-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 3916 // CHECK5-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 3917 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 3918 // CHECK5-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3919 // CHECK5-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 3920 // CHECK5-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]] 3921 // CHECK5: omp_offload.failed21: 3922 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(%struct.SS* [[THIS1]]) #[[ATTR2]] 3923 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT22]] 3924 // CHECK5: omp_offload.cont22: 3925 // CHECK5-NEXT: [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 3926 // CHECK5-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 3927 // CHECK5-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS** 3928 // CHECK5-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 8 3929 // CHECK5-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 3930 // CHECK5-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]** 3931 // CHECK5-NEXT: store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 8 3932 // CHECK5-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 0 3933 // CHECK5-NEXT: store i8* null, i8** [[TMP40]], align 8 3934 // CHECK5-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 3935 // CHECK5-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 3936 // CHECK5-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 3937 // CHECK5-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 3938 // CHECK5-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 3939 // CHECK5-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]] 3940 // CHECK5: omp_offload.failed28: 3941 // CHECK5-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(%struct.SS* [[THIS1]]) #[[ATTR2]] 3942 // CHECK5-NEXT: br label [[OMP_OFFLOAD_CONT29]] 3943 // CHECK5: omp_offload.cont29: 3944 // CHECK5-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 3945 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 0 3946 // CHECK5-NEXT: [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 3947 // CHECK5-NEXT: ret i32 [[TMP45]] 3948 // 3949 // 3950 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35 3951 // CHECK5-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 3952 // CHECK5-NEXT: entry: 3953 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 3954 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 3955 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 3956 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 3957 // CHECK5-NEXT: ret void 3958 // 3959 // 3960 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined. 3961 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 3962 // CHECK5-NEXT: entry: 3963 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 3964 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 3965 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 3966 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 3967 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 3968 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 3969 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 3970 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 3971 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 3972 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 3973 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 3974 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 3975 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 3976 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 3977 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 3978 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 3979 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3980 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3981 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3982 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 3983 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3984 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3985 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 3986 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3987 // CHECK5: cond.true: 3988 // CHECK5-NEXT: br label [[COND_END:%.*]] 3989 // CHECK5: cond.false: 3990 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 3991 // CHECK5-NEXT: br label [[COND_END]] 3992 // CHECK5: cond.end: 3993 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 3994 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 3995 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 3996 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 3997 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3998 // CHECK5: omp.inner.for.cond: 3999 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4000 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4001 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4002 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4003 // CHECK5: omp.inner.for.body: 4004 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4005 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 4006 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4007 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 4008 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 4009 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4010 // CHECK5: omp.inner.for.inc: 4011 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4012 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4013 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 4014 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4015 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 4016 // CHECK5: omp.inner.for.end: 4017 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4018 // CHECK5: omp.loop.exit: 4019 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 4020 // CHECK5-NEXT: ret void 4021 // 4022 // 4023 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..1 4024 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 4025 // CHECK5-NEXT: entry: 4026 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4027 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4028 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4029 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4030 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4031 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4032 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 4033 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4034 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4035 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4036 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4037 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 4038 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4039 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4040 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4041 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4042 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4043 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4044 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4045 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 4046 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4047 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 4048 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4049 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 4050 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 4051 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 4052 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4053 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4054 // CHECK5-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4055 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 4056 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4057 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4058 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 4059 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4060 // CHECK5: cond.true: 4061 // CHECK5-NEXT: br label [[COND_END:%.*]] 4062 // CHECK5: cond.false: 4063 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4064 // CHECK5-NEXT: br label [[COND_END]] 4065 // CHECK5: cond.end: 4066 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 4067 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4068 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4069 // CHECK5-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 4070 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4071 // CHECK5: omp.inner.for.cond: 4072 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4073 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4074 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 4075 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4076 // CHECK5: omp.inner.for.body: 4077 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4078 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 4079 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4080 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4081 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 4082 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 4083 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 4084 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 4085 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4086 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4087 // CHECK5: omp.body.continue: 4088 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4089 // CHECK5: omp.inner.for.inc: 4090 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4091 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 4092 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 4093 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 4094 // CHECK5: omp.inner.for.end: 4095 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4096 // CHECK5: omp.loop.exit: 4097 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 4098 // CHECK5-NEXT: ret void 4099 // 4100 // 4101 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40 4102 // CHECK5-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 4103 // CHECK5-NEXT: entry: 4104 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4105 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4106 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4107 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 4108 // CHECK5-NEXT: ret void 4109 // 4110 // 4111 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..2 4112 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 4113 // CHECK5-NEXT: entry: 4114 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4115 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4116 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4117 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4118 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 4119 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4120 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4121 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4122 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4123 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 4124 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4125 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4126 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4127 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4128 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4129 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 4130 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4131 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4132 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4133 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 4134 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4135 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4136 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 4137 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4138 // CHECK5: cond.true: 4139 // CHECK5-NEXT: br label [[COND_END:%.*]] 4140 // CHECK5: cond.false: 4141 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4142 // CHECK5-NEXT: br label [[COND_END]] 4143 // CHECK5: cond.end: 4144 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4145 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4146 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4147 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 4148 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4149 // CHECK5: omp.inner.for.cond: 4150 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4151 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4152 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4153 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4154 // CHECK5: omp.inner.for.body: 4155 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4156 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 4157 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4158 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 4159 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 4160 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4161 // CHECK5: omp.inner.for.inc: 4162 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4163 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4164 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 4165 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4166 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 4167 // CHECK5: omp.inner.for.end: 4168 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4169 // CHECK5: omp.loop.exit: 4170 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 4171 // CHECK5-NEXT: ret void 4172 // 4173 // 4174 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..3 4175 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 4176 // CHECK5-NEXT: entry: 4177 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4178 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4179 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4180 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4181 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4182 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4183 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 4184 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4185 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4186 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4187 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4188 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 4189 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4190 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4191 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4192 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4193 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4194 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4195 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4196 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 4197 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4198 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 4199 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4200 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 4201 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 4202 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 4203 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4204 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4205 // CHECK5-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4206 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 4207 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4208 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4209 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 4210 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4211 // CHECK5: cond.true: 4212 // CHECK5-NEXT: br label [[COND_END:%.*]] 4213 // CHECK5: cond.false: 4214 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4215 // CHECK5-NEXT: br label [[COND_END]] 4216 // CHECK5: cond.end: 4217 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 4218 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4219 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4220 // CHECK5-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 4221 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4222 // CHECK5: omp.inner.for.cond: 4223 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4224 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4225 // CHECK5-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 4226 // CHECK5-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4227 // CHECK5: omp.inner.for.body: 4228 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4229 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 4230 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4231 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4232 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 4233 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 4234 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 4235 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 4236 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4237 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4238 // CHECK5: omp.body.continue: 4239 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4240 // CHECK5: omp.inner.for.inc: 4241 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4242 // CHECK5-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 4243 // CHECK5-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 4244 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 4245 // CHECK5: omp.inner.for.end: 4246 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4247 // CHECK5: omp.loop.exit: 4248 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 4249 // CHECK5-NEXT: ret void 4250 // 4251 // 4252 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45 4253 // CHECK5-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 4254 // CHECK5-NEXT: entry: 4255 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4256 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4257 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4258 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 4259 // CHECK5-NEXT: ret void 4260 // 4261 // 4262 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..6 4263 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 4264 // CHECK5-NEXT: entry: 4265 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4266 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4267 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4268 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4269 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 4270 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4271 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4272 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4273 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4274 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 4275 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4276 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4277 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4278 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4279 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4280 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 4281 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4282 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4283 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4284 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 4285 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4286 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4287 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 4288 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4289 // CHECK5: cond.true: 4290 // CHECK5-NEXT: br label [[COND_END:%.*]] 4291 // CHECK5: cond.false: 4292 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4293 // CHECK5-NEXT: br label [[COND_END]] 4294 // CHECK5: cond.end: 4295 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4296 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4297 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4298 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 4299 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4300 // CHECK5: omp.inner.for.cond: 4301 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4302 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4303 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4304 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4305 // CHECK5: omp.inner.for.body: 4306 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4307 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 4308 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4309 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 4310 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 4311 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4312 // CHECK5: omp.inner.for.inc: 4313 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4314 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4315 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 4316 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4317 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 4318 // CHECK5: omp.inner.for.end: 4319 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4320 // CHECK5: omp.loop.exit: 4321 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 4322 // CHECK5-NEXT: ret void 4323 // 4324 // 4325 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..7 4326 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 4327 // CHECK5-NEXT: entry: 4328 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4329 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4330 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4331 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4332 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4333 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4334 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 4335 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4336 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4337 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4338 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4339 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 4340 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4341 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4342 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4343 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4344 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4345 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4346 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4347 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 4348 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4349 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 4350 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4351 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 4352 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 4353 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 4354 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4355 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4356 // CHECK5-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4357 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 4358 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 4359 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 4360 // CHECK5: omp.dispatch.cond: 4361 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4362 // CHECK5-NEXT: [[CONV2:%.*]] = sext i32 [[TMP5]] to i64 4363 // CHECK5-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4364 // CHECK5-NEXT: [[CMP:%.*]] = icmp ugt i64 [[CONV2]], [[TMP6]] 4365 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4366 // CHECK5: cond.true: 4367 // CHECK5-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4368 // CHECK5-NEXT: br label [[COND_END:%.*]] 4369 // CHECK5: cond.false: 4370 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4371 // CHECK5-NEXT: [[CONV3:%.*]] = sext i32 [[TMP8]] to i64 4372 // CHECK5-NEXT: br label [[COND_END]] 4373 // CHECK5: cond.end: 4374 // CHECK5-NEXT: [[COND:%.*]] = phi i64 [ [[TMP7]], [[COND_TRUE]] ], [ [[CONV3]], [[COND_FALSE]] ] 4375 // CHECK5-NEXT: [[CONV4:%.*]] = trunc i64 [[COND]] to i32 4376 // CHECK5-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 4377 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4378 // CHECK5-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 4379 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4380 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4381 // CHECK5-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 4382 // CHECK5-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 4383 // CHECK5: omp.dispatch.body: 4384 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4385 // CHECK5: omp.inner.for.cond: 4386 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4387 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4388 // CHECK5-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 4389 // CHECK5-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4390 // CHECK5: omp.inner.for.body: 4391 // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4392 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 4393 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4394 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4395 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 4396 // CHECK5-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 4397 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64 4398 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 4399 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 4400 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4401 // CHECK5: omp.body.continue: 4402 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4403 // CHECK5: omp.inner.for.inc: 4404 // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4405 // CHECK5-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP16]], 1 4406 // CHECK5-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 4407 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 4408 // CHECK5: omp.inner.for.end: 4409 // CHECK5-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 4410 // CHECK5: omp.dispatch.inc: 4411 // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4412 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4413 // CHECK5-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 4414 // CHECK5-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 4415 // CHECK5-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4416 // CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4417 // CHECK5-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 4418 // CHECK5-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 4419 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND]] 4420 // CHECK5: omp.dispatch.end: 4421 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 4422 // CHECK5-NEXT: ret void 4423 // 4424 // 4425 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51 4426 // CHECK5-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 4427 // CHECK5-NEXT: entry: 4428 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4429 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4430 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4431 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 4432 // CHECK5-NEXT: ret void 4433 // 4434 // 4435 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..10 4436 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 4437 // CHECK5-NEXT: entry: 4438 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4439 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4440 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4441 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4442 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 4443 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4444 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4445 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4446 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4447 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 4448 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4449 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4450 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4451 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4452 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4453 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 4454 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4455 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4456 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4457 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 4458 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4459 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4460 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 4461 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4462 // CHECK5: cond.true: 4463 // CHECK5-NEXT: br label [[COND_END:%.*]] 4464 // CHECK5: cond.false: 4465 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4466 // CHECK5-NEXT: br label [[COND_END]] 4467 // CHECK5: cond.end: 4468 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4469 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4470 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4471 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 4472 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4473 // CHECK5: omp.inner.for.cond: 4474 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4475 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4476 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4477 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4478 // CHECK5: omp.inner.for.body: 4479 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4480 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 4481 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4482 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 4483 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 4484 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4485 // CHECK5: omp.inner.for.inc: 4486 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4487 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4488 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 4489 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4490 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 4491 // CHECK5: omp.inner.for.end: 4492 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4493 // CHECK5: omp.loop.exit: 4494 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 4495 // CHECK5-NEXT: ret void 4496 // 4497 // 4498 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..11 4499 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 4500 // CHECK5-NEXT: entry: 4501 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4502 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4503 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4504 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4505 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4506 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4507 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 4508 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4509 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4510 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4511 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4512 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 4513 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4514 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4515 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4516 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4517 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4518 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4519 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4520 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 4521 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4522 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 4523 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4524 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 4525 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 4526 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 4527 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4528 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4529 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4530 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4531 // CHECK5-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4532 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 4533 // CHECK5-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 4534 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 4535 // CHECK5: omp.dispatch.cond: 4536 // CHECK5-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 4537 // CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 4538 // CHECK5-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 4539 // CHECK5: omp.dispatch.body: 4540 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4541 // CHECK5-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 4542 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4543 // CHECK5: omp.inner.for.cond: 4544 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 4545 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9 4546 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 4547 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4548 // CHECK5: omp.inner.for.body: 4549 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 4550 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 4551 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4552 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9 4553 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 4554 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !9 4555 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 4556 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 4557 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !9 4558 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4559 // CHECK5: omp.body.continue: 4560 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4561 // CHECK5: omp.inner.for.inc: 4562 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 4563 // CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 4564 // CHECK5-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 4565 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] 4566 // CHECK5: omp.inner.for.end: 4567 // CHECK5-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 4568 // CHECK5: omp.dispatch.inc: 4569 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND]] 4570 // CHECK5: omp.dispatch.end: 4571 // CHECK5-NEXT: ret void 4572 // 4573 // 4574 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57 4575 // CHECK5-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 4576 // CHECK5-NEXT: entry: 4577 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4578 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4579 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4580 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 4581 // CHECK5-NEXT: ret void 4582 // 4583 // 4584 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..14 4585 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 4586 // CHECK5-NEXT: entry: 4587 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4588 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4589 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4590 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4591 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 4592 // CHECK5-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4593 // CHECK5-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4594 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4595 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4596 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 4597 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4598 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4599 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4600 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4601 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4602 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 4603 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4604 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4605 // CHECK5-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4606 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 4607 // CHECK5-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4608 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4609 // CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 4610 // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4611 // CHECK5: cond.true: 4612 // CHECK5-NEXT: br label [[COND_END:%.*]] 4613 // CHECK5: cond.false: 4614 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4615 // CHECK5-NEXT: br label [[COND_END]] 4616 // CHECK5: cond.end: 4617 // CHECK5-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4618 // CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4619 // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4620 // CHECK5-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 4621 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4622 // CHECK5: omp.inner.for.cond: 4623 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4624 // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4625 // CHECK5-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4626 // CHECK5-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4627 // CHECK5: omp.inner.for.body: 4628 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4629 // CHECK5-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 4630 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4631 // CHECK5-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 4632 // CHECK5-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 4633 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4634 // CHECK5: omp.inner.for.inc: 4635 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4636 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4637 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 4638 // CHECK5-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4639 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] 4640 // CHECK5: omp.inner.for.end: 4641 // CHECK5-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4642 // CHECK5: omp.loop.exit: 4643 // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 4644 // CHECK5-NEXT: ret void 4645 // 4646 // 4647 // CHECK5-LABEL: define {{[^@]+}}@.omp_outlined..15 4648 // CHECK5-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 4649 // CHECK5-NEXT: entry: 4650 // CHECK5-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4651 // CHECK5-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4652 // CHECK5-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4653 // CHECK5-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4654 // CHECK5-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4655 // CHECK5-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4656 // CHECK5-NEXT: [[TMP:%.*]] = alloca i32, align 4 4657 // CHECK5-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4658 // CHECK5-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4659 // CHECK5-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4660 // CHECK5-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4661 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 4662 // CHECK5-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4663 // CHECK5-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4664 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4665 // CHECK5-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4666 // CHECK5-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4667 // CHECK5-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4668 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4669 // CHECK5-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 4670 // CHECK5-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4671 // CHECK5-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 4672 // CHECK5-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4673 // CHECK5-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 4674 // CHECK5-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 4675 // CHECK5-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 4676 // CHECK5-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4677 // CHECK5-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4678 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4679 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4680 // CHECK5-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4681 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 4682 // CHECK5-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61) 4683 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 4684 // CHECK5: omp.dispatch.cond: 4685 // CHECK5-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 4686 // CHECK5-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 4687 // CHECK5-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 4688 // CHECK5: omp.dispatch.body: 4689 // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4690 // CHECK5-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 4691 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4692 // CHECK5: omp.inner.for.cond: 4693 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 4694 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12 4695 // CHECK5-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 4696 // CHECK5-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4697 // CHECK5: omp.inner.for.body: 4698 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 4699 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 4700 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4701 // CHECK5-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12 4702 // CHECK5-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 4703 // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12 4704 // CHECK5-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 4705 // CHECK5-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 4706 // CHECK5-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12 4707 // CHECK5-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 4708 // CHECK5: omp.body.continue: 4709 // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4710 // CHECK5: omp.inner.for.inc: 4711 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 4712 // CHECK5-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 4713 // CHECK5-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 4714 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 4715 // CHECK5: omp.inner.for.end: 4716 // CHECK5-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 4717 // CHECK5: omp.dispatch.inc: 4718 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND]] 4719 // CHECK5: omp.dispatch.end: 4720 // CHECK5-NEXT: ret void 4721 // 4722 // 4723 // CHECK5-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 4724 // CHECK5-SAME: () #[[ATTR3:[0-9]+]] { 4725 // CHECK5-NEXT: entry: 4726 // CHECK5-NEXT: call void @__tgt_register_requires(i64 1) 4727 // CHECK5-NEXT: ret void 4728 // 4729 // 4730 // CHECK6-LABEL: define {{[^@]+}}@_Z21teams_template_structv 4731 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] { 4732 // CHECK6-NEXT: entry: 4733 // CHECK6-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 4734 // CHECK6-NEXT: [[CALL:%.*]] = call signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]]) 4735 // CHECK6-NEXT: ret i32 [[CALL]] 4736 // 4737 // 4738 // CHECK6-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 4739 // CHECK6-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 4740 // CHECK6-NEXT: entry: 4741 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4742 // CHECK6-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 4743 // CHECK6-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 4744 // CHECK6-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 4745 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 4746 // CHECK6-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 8 4747 // CHECK6-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 8 4748 // CHECK6-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 8 4749 // CHECK6-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 4750 // CHECK6-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 8 4751 // CHECK6-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 8 4752 // CHECK6-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 8 4753 // CHECK6-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 4754 // CHECK6-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 8 4755 // CHECK6-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 8 4756 // CHECK6-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 8 4757 // CHECK6-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 4758 // CHECK6-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 8 4759 // CHECK6-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 8 4760 // CHECK6-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 8 4761 // CHECK6-NEXT: [[_TMP27:%.*]] = alloca i32, align 4 4762 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4763 // CHECK6-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4764 // CHECK6-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 4765 // CHECK6-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4766 // CHECK6-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 4767 // CHECK6-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 8 4768 // CHECK6-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4769 // CHECK6-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 4770 // CHECK6-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 8 4771 // CHECK6-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 4772 // CHECK6-NEXT: store i8* null, i8** [[TMP4]], align 8 4773 // CHECK6-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 4774 // CHECK6-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 4775 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123) 4776 // CHECK6-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4777 // CHECK6-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 4778 // CHECK6-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 4779 // CHECK6: omp_offload.failed: 4780 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 4781 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT]] 4782 // CHECK6: omp_offload.cont: 4783 // CHECK6-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 4784 // CHECK6-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 4785 // CHECK6-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** 4786 // CHECK6-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 8 4787 // CHECK6-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 4788 // CHECK6-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** 4789 // CHECK6-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 8 4790 // CHECK6-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0 4791 // CHECK6-NEXT: store i8* null, i8** [[TMP13]], align 8 4792 // CHECK6-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 4793 // CHECK6-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 4794 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 4795 // CHECK6-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4796 // CHECK6-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 4797 // CHECK6-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 4798 // CHECK6: omp_offload.failed7: 4799 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]] 4800 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT8]] 4801 // CHECK6: omp_offload.cont8: 4802 // CHECK6-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 4803 // CHECK6-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 4804 // CHECK6-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 4805 // CHECK6-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 8 4806 // CHECK6-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 4807 // CHECK6-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 4808 // CHECK6-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 8 4809 // CHECK6-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i64 0, i64 0 4810 // CHECK6-NEXT: store i8* null, i8** [[TMP22]], align 8 4811 // CHECK6-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 4812 // CHECK6-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 4813 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 4814 // CHECK6-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4815 // CHECK6-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 4816 // CHECK6-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 4817 // CHECK6: omp_offload.failed14: 4818 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(%struct.SS* [[THIS1]]) #[[ATTR2]] 4819 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT15]] 4820 // CHECK6: omp_offload.cont15: 4821 // CHECK6-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 4822 // CHECK6-NEXT: [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 4823 // CHECK6-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS** 4824 // CHECK6-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 8 4825 // CHECK6-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 4826 // CHECK6-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]** 4827 // CHECK6-NEXT: store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 8 4828 // CHECK6-NEXT: [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i64 0, i64 0 4829 // CHECK6-NEXT: store i8* null, i8** [[TMP31]], align 8 4830 // CHECK6-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 4831 // CHECK6-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 4832 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 4833 // CHECK6-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4834 // CHECK6-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 4835 // CHECK6-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]] 4836 // CHECK6: omp_offload.failed21: 4837 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(%struct.SS* [[THIS1]]) #[[ATTR2]] 4838 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT22]] 4839 // CHECK6: omp_offload.cont22: 4840 // CHECK6-NEXT: [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 4841 // CHECK6-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 4842 // CHECK6-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS** 4843 // CHECK6-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 8 4844 // CHECK6-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 4845 // CHECK6-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]** 4846 // CHECK6-NEXT: store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 8 4847 // CHECK6-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 0 4848 // CHECK6-NEXT: store i8* null, i8** [[TMP40]], align 8 4849 // CHECK6-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 4850 // CHECK6-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 4851 // CHECK6-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 4852 // CHECK6-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 4853 // CHECK6-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 4854 // CHECK6-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]] 4855 // CHECK6: omp_offload.failed28: 4856 // CHECK6-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(%struct.SS* [[THIS1]]) #[[ATTR2]] 4857 // CHECK6-NEXT: br label [[OMP_OFFLOAD_CONT29]] 4858 // CHECK6: omp_offload.cont29: 4859 // CHECK6-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 4860 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i64 0, i64 0 4861 // CHECK6-NEXT: [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 4862 // CHECK6-NEXT: ret i32 [[TMP45]] 4863 // 4864 // 4865 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35 4866 // CHECK6-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 4867 // CHECK6-NEXT: entry: 4868 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4869 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4870 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4871 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 4872 // CHECK6-NEXT: ret void 4873 // 4874 // 4875 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined. 4876 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 4877 // CHECK6-NEXT: entry: 4878 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4879 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4880 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4881 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4882 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 4883 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 4884 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 4885 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4886 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4887 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 4888 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4889 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4890 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4891 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4892 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 4893 // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 4894 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4895 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4896 // CHECK6-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4897 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 4898 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4899 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4900 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 4901 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4902 // CHECK6: cond.true: 4903 // CHECK6-NEXT: br label [[COND_END:%.*]] 4904 // CHECK6: cond.false: 4905 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4906 // CHECK6-NEXT: br label [[COND_END]] 4907 // CHECK6: cond.end: 4908 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 4909 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 4910 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4911 // CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 4912 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4913 // CHECK6: omp.inner.for.cond: 4914 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4915 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4916 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 4917 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4918 // CHECK6: omp.inner.for.body: 4919 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 4920 // CHECK6-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 4921 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 4922 // CHECK6-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 4923 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 4924 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 4925 // CHECK6: omp.inner.for.inc: 4926 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4927 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 4928 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 4929 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 4930 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 4931 // CHECK6: omp.inner.for.end: 4932 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 4933 // CHECK6: omp.loop.exit: 4934 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 4935 // CHECK6-NEXT: ret void 4936 // 4937 // 4938 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..1 4939 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 4940 // CHECK6-NEXT: entry: 4941 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 4942 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 4943 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 4944 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 4945 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 4946 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 4947 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 4948 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 4949 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 4950 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 4951 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 4952 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 4953 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 4954 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 4955 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4956 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4957 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 4958 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 4959 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 4960 // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 4961 // CHECK6-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 4962 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 4963 // CHECK6-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 4964 // CHECK6-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 4965 // CHECK6-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 4966 // CHECK6-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 4967 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 4968 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 4969 // CHECK6-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 4970 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 4971 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 4972 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4973 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 4974 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 4975 // CHECK6: cond.true: 4976 // CHECK6-NEXT: br label [[COND_END:%.*]] 4977 // CHECK6: cond.false: 4978 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4979 // CHECK6-NEXT: br label [[COND_END]] 4980 // CHECK6: cond.end: 4981 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 4982 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 4983 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 4984 // CHECK6-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 4985 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 4986 // CHECK6: omp.inner.for.cond: 4987 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4988 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 4989 // CHECK6-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 4990 // CHECK6-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 4991 // CHECK6: omp.inner.for.body: 4992 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 4993 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 4994 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 4995 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4 4996 // CHECK6-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 4997 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 4998 // CHECK6-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 4999 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 5000 // CHECK6-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 5001 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5002 // CHECK6: omp.body.continue: 5003 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5004 // CHECK6: omp.inner.for.inc: 5005 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5006 // CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 5007 // CHECK6-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 5008 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 5009 // CHECK6: omp.inner.for.end: 5010 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5011 // CHECK6: omp.loop.exit: 5012 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 5013 // CHECK6-NEXT: ret void 5014 // 5015 // 5016 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40 5017 // CHECK6-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 5018 // CHECK6-NEXT: entry: 5019 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 5020 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 5021 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 5022 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 5023 // CHECK6-NEXT: ret void 5024 // 5025 // 5026 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..2 5027 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 5028 // CHECK6-NEXT: entry: 5029 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5030 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5031 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 5032 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5033 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 5034 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5035 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5036 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5037 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5038 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 5039 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5040 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5041 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 5042 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 5043 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 5044 // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 5045 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5046 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5047 // CHECK6-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5048 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 5049 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5050 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5051 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 5052 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5053 // CHECK6: cond.true: 5054 // CHECK6-NEXT: br label [[COND_END:%.*]] 5055 // CHECK6: cond.false: 5056 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5057 // CHECK6-NEXT: br label [[COND_END]] 5058 // CHECK6: cond.end: 5059 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 5060 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5061 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5062 // CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 5063 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5064 // CHECK6: omp.inner.for.cond: 5065 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5066 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5067 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5068 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5069 // CHECK6: omp.inner.for.body: 5070 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5071 // CHECK6-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 5072 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5073 // CHECK6-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 5074 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 5075 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5076 // CHECK6: omp.inner.for.inc: 5077 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5078 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5079 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 5080 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 5081 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 5082 // CHECK6: omp.inner.for.end: 5083 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5084 // CHECK6: omp.loop.exit: 5085 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 5086 // CHECK6-NEXT: ret void 5087 // 5088 // 5089 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..3 5090 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 5091 // CHECK6-NEXT: entry: 5092 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5093 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5094 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5095 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5096 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 5097 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5098 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 5099 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5100 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5101 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5102 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5103 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 5104 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5105 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5106 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5107 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5108 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 5109 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 5110 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5111 // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 5112 // CHECK6-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5113 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 5114 // CHECK6-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5115 // CHECK6-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 5116 // CHECK6-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 5117 // CHECK6-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 5118 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5119 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5120 // CHECK6-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5121 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 5122 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5123 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5124 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 5125 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5126 // CHECK6: cond.true: 5127 // CHECK6-NEXT: br label [[COND_END:%.*]] 5128 // CHECK6: cond.false: 5129 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5130 // CHECK6-NEXT: br label [[COND_END]] 5131 // CHECK6: cond.end: 5132 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 5133 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5134 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5135 // CHECK6-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 5136 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5137 // CHECK6: omp.inner.for.cond: 5138 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5139 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5140 // CHECK6-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 5141 // CHECK6-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5142 // CHECK6: omp.inner.for.body: 5143 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5144 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 5145 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5146 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4 5147 // CHECK6-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 5148 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 5149 // CHECK6-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 5150 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 5151 // CHECK6-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 5152 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5153 // CHECK6: omp.body.continue: 5154 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5155 // CHECK6: omp.inner.for.inc: 5156 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5157 // CHECK6-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 5158 // CHECK6-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 5159 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 5160 // CHECK6: omp.inner.for.end: 5161 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5162 // CHECK6: omp.loop.exit: 5163 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 5164 // CHECK6-NEXT: ret void 5165 // 5166 // 5167 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45 5168 // CHECK6-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 5169 // CHECK6-NEXT: entry: 5170 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 5171 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 5172 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 5173 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 5174 // CHECK6-NEXT: ret void 5175 // 5176 // 5177 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..6 5178 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 5179 // CHECK6-NEXT: entry: 5180 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5181 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5182 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 5183 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5184 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 5185 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5186 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5187 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5188 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5189 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 5190 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5191 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5192 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 5193 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 5194 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 5195 // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 5196 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5197 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5198 // CHECK6-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5199 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 5200 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5201 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5202 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 5203 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5204 // CHECK6: cond.true: 5205 // CHECK6-NEXT: br label [[COND_END:%.*]] 5206 // CHECK6: cond.false: 5207 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5208 // CHECK6-NEXT: br label [[COND_END]] 5209 // CHECK6: cond.end: 5210 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 5211 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5212 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5213 // CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 5214 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5215 // CHECK6: omp.inner.for.cond: 5216 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5217 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5218 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5219 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5220 // CHECK6: omp.inner.for.body: 5221 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5222 // CHECK6-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 5223 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5224 // CHECK6-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 5225 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 5226 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5227 // CHECK6: omp.inner.for.inc: 5228 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5229 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5230 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 5231 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 5232 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 5233 // CHECK6: omp.inner.for.end: 5234 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5235 // CHECK6: omp.loop.exit: 5236 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 5237 // CHECK6-NEXT: ret void 5238 // 5239 // 5240 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..7 5241 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 5242 // CHECK6-NEXT: entry: 5243 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5244 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5245 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5246 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5247 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 5248 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5249 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 5250 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5251 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5252 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5253 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5254 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 5255 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5256 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5257 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5258 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5259 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 5260 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 5261 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5262 // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 5263 // CHECK6-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5264 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 5265 // CHECK6-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5266 // CHECK6-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 5267 // CHECK6-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 5268 // CHECK6-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 5269 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5270 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5271 // CHECK6-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5272 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 5273 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 5274 // CHECK6-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 5275 // CHECK6: omp.dispatch.cond: 5276 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5277 // CHECK6-NEXT: [[CONV2:%.*]] = sext i32 [[TMP5]] to i64 5278 // CHECK6-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5279 // CHECK6-NEXT: [[CMP:%.*]] = icmp ugt i64 [[CONV2]], [[TMP6]] 5280 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5281 // CHECK6: cond.true: 5282 // CHECK6-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5283 // CHECK6-NEXT: br label [[COND_END:%.*]] 5284 // CHECK6: cond.false: 5285 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5286 // CHECK6-NEXT: [[CONV3:%.*]] = sext i32 [[TMP8]] to i64 5287 // CHECK6-NEXT: br label [[COND_END]] 5288 // CHECK6: cond.end: 5289 // CHECK6-NEXT: [[COND:%.*]] = phi i64 [ [[TMP7]], [[COND_TRUE]] ], [ [[CONV3]], [[COND_FALSE]] ] 5290 // CHECK6-NEXT: [[CONV4:%.*]] = trunc i64 [[COND]] to i32 5291 // CHECK6-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 5292 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5293 // CHECK6-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 5294 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5295 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5296 // CHECK6-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 5297 // CHECK6-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 5298 // CHECK6: omp.dispatch.body: 5299 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5300 // CHECK6: omp.inner.for.cond: 5301 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5302 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5303 // CHECK6-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 5304 // CHECK6-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5305 // CHECK6: omp.inner.for.body: 5306 // CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5307 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 5308 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5309 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4 5310 // CHECK6-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 5311 // CHECK6-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 5312 // CHECK6-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64 5313 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 5314 // CHECK6-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 5315 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5316 // CHECK6: omp.body.continue: 5317 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5318 // CHECK6: omp.inner.for.inc: 5319 // CHECK6-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5320 // CHECK6-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP16]], 1 5321 // CHECK6-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 5322 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 5323 // CHECK6: omp.inner.for.end: 5324 // CHECK6-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 5325 // CHECK6: omp.dispatch.inc: 5326 // CHECK6-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5327 // CHECK6-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5328 // CHECK6-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 5329 // CHECK6-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 5330 // CHECK6-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5331 // CHECK6-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5332 // CHECK6-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 5333 // CHECK6-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 5334 // CHECK6-NEXT: br label [[OMP_DISPATCH_COND]] 5335 // CHECK6: omp.dispatch.end: 5336 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 5337 // CHECK6-NEXT: ret void 5338 // 5339 // 5340 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51 5341 // CHECK6-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 5342 // CHECK6-NEXT: entry: 5343 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 5344 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 5345 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 5346 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 5347 // CHECK6-NEXT: ret void 5348 // 5349 // 5350 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..10 5351 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 5352 // CHECK6-NEXT: entry: 5353 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5354 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5355 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 5356 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5357 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 5358 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5359 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5360 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5361 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5362 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 5363 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5364 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5365 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 5366 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 5367 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 5368 // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 5369 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5370 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5371 // CHECK6-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5372 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 5373 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5374 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5375 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 5376 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5377 // CHECK6: cond.true: 5378 // CHECK6-NEXT: br label [[COND_END:%.*]] 5379 // CHECK6: cond.false: 5380 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5381 // CHECK6-NEXT: br label [[COND_END]] 5382 // CHECK6: cond.end: 5383 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 5384 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5385 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5386 // CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 5387 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5388 // CHECK6: omp.inner.for.cond: 5389 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5390 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5391 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5392 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5393 // CHECK6: omp.inner.for.body: 5394 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5395 // CHECK6-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 5396 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5397 // CHECK6-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 5398 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 5399 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5400 // CHECK6: omp.inner.for.inc: 5401 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5402 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5403 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 5404 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 5405 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 5406 // CHECK6: omp.inner.for.end: 5407 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5408 // CHECK6: omp.loop.exit: 5409 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 5410 // CHECK6-NEXT: ret void 5411 // 5412 // 5413 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..11 5414 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 5415 // CHECK6-NEXT: entry: 5416 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5417 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5418 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5419 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5420 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 5421 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5422 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 5423 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5424 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5425 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5426 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5427 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 5428 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5429 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5430 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5431 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5432 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 5433 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 5434 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5435 // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 5436 // CHECK6-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5437 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 5438 // CHECK6-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5439 // CHECK6-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 5440 // CHECK6-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 5441 // CHECK6-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 5442 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5443 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5444 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5445 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5446 // CHECK6-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5447 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 5448 // CHECK6-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 5449 // CHECK6-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 5450 // CHECK6: omp.dispatch.cond: 5451 // CHECK6-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 5452 // CHECK6-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 5453 // CHECK6-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 5454 // CHECK6: omp.dispatch.body: 5455 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5456 // CHECK6-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 5457 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5458 // CHECK6: omp.inner.for.cond: 5459 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 5460 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !9 5461 // CHECK6-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 5462 // CHECK6-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5463 // CHECK6: omp.inner.for.body: 5464 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 5465 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 5466 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5467 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !9 5468 // CHECK6-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 5469 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !9 5470 // CHECK6-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 5471 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 5472 // CHECK6-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !9 5473 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5474 // CHECK6: omp.body.continue: 5475 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5476 // CHECK6: omp.inner.for.inc: 5477 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 5478 // CHECK6-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 5479 // CHECK6-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !9 5480 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] 5481 // CHECK6: omp.inner.for.end: 5482 // CHECK6-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 5483 // CHECK6: omp.dispatch.inc: 5484 // CHECK6-NEXT: br label [[OMP_DISPATCH_COND]] 5485 // CHECK6: omp.dispatch.end: 5486 // CHECK6-NEXT: ret void 5487 // 5488 // 5489 // CHECK6-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57 5490 // CHECK6-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 5491 // CHECK6-NEXT: entry: 5492 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 5493 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 5494 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 5495 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 5496 // CHECK6-NEXT: ret void 5497 // 5498 // 5499 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..14 5500 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 5501 // CHECK6-NEXT: entry: 5502 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5503 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5504 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 5505 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5506 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 5507 // CHECK6-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5508 // CHECK6-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5509 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5510 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5511 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 5512 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5513 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5514 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 5515 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 5516 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 5517 // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 5518 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5519 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5520 // CHECK6-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5521 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 5522 // CHECK6-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5523 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5524 // CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 5525 // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5526 // CHECK6: cond.true: 5527 // CHECK6-NEXT: br label [[COND_END:%.*]] 5528 // CHECK6: cond.false: 5529 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5530 // CHECK6-NEXT: br label [[COND_END]] 5531 // CHECK6: cond.end: 5532 // CHECK6-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 5533 // CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5534 // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5535 // CHECK6-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 5536 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5537 // CHECK6: omp.inner.for.cond: 5538 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5539 // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5540 // CHECK6-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5541 // CHECK6-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5542 // CHECK6: omp.inner.for.body: 5543 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5544 // CHECK6-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 5545 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5546 // CHECK6-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 5547 // CHECK6-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], %struct.SS* [[TMP0]]) 5548 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5549 // CHECK6: omp.inner.for.inc: 5550 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5551 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5552 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 5553 // CHECK6-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 5554 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] 5555 // CHECK6: omp.inner.for.end: 5556 // CHECK6-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5557 // CHECK6: omp.loop.exit: 5558 // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 5559 // CHECK6-NEXT: ret void 5560 // 5561 // 5562 // CHECK6-LABEL: define {{[^@]+}}@.omp_outlined..15 5563 // CHECK6-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 5564 // CHECK6-NEXT: entry: 5565 // CHECK6-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 5566 // CHECK6-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 5567 // CHECK6-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 5568 // CHECK6-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 5569 // CHECK6-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 8 5570 // CHECK6-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5571 // CHECK6-NEXT: [[TMP:%.*]] = alloca i32, align 4 5572 // CHECK6-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5573 // CHECK6-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5574 // CHECK6-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5575 // CHECK6-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5576 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 5577 // CHECK6-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 5578 // CHECK6-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 5579 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5580 // CHECK6-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5581 // CHECK6-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 8 5582 // CHECK6-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 8 5583 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5584 // CHECK6-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 5585 // CHECK6-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 5586 // CHECK6-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 5587 // CHECK6-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 5588 // CHECK6-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 5589 // CHECK6-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 5590 // CHECK6-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 5591 // CHECK6-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5592 // CHECK6-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5593 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5594 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5595 // CHECK6-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 5596 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 5597 // CHECK6-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61) 5598 // CHECK6-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 5599 // CHECK6: omp.dispatch.cond: 5600 // CHECK6-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 5601 // CHECK6-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 5602 // CHECK6-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 5603 // CHECK6: omp.dispatch.body: 5604 // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5605 // CHECK6-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 5606 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5607 // CHECK6: omp.inner.for.cond: 5608 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 5609 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !12 5610 // CHECK6-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 5611 // CHECK6-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5612 // CHECK6: omp.inner.for.body: 5613 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 5614 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 5615 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5616 // CHECK6-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !12 5617 // CHECK6-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 5618 // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !12 5619 // CHECK6-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 5620 // CHECK6-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i64 0, i64 [[IDXPROM]] 5621 // CHECK6-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !12 5622 // CHECK6-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5623 // CHECK6: omp.body.continue: 5624 // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5625 // CHECK6: omp.inner.for.inc: 5626 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 5627 // CHECK6-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 5628 // CHECK6-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !12 5629 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] 5630 // CHECK6: omp.inner.for.end: 5631 // CHECK6-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 5632 // CHECK6: omp.dispatch.inc: 5633 // CHECK6-NEXT: br label [[OMP_DISPATCH_COND]] 5634 // CHECK6: omp.dispatch.end: 5635 // CHECK6-NEXT: ret void 5636 // 5637 // 5638 // CHECK6-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 5639 // CHECK6-SAME: () #[[ATTR3:[0-9]+]] { 5640 // CHECK6-NEXT: entry: 5641 // CHECK6-NEXT: call void @__tgt_register_requires(i64 1) 5642 // CHECK6-NEXT: ret void 5643 // 5644 // 5645 // CHECK7-LABEL: define {{[^@]+}}@_Z21teams_template_structv 5646 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { 5647 // CHECK7-NEXT: entry: 5648 // CHECK7-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 5649 // CHECK7-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]]) 5650 // CHECK7-NEXT: ret i32 [[CALL]] 5651 // 5652 // 5653 // CHECK7-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 5654 // CHECK7-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 5655 // CHECK7-NEXT: entry: 5656 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 5657 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 5658 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 5659 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 5660 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 5661 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4 5662 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4 5663 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4 5664 // CHECK7-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 5665 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4 5666 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4 5667 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4 5668 // CHECK7-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 5669 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 4 5670 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 4 5671 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 4 5672 // CHECK7-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 5673 // CHECK7-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 4 5674 // CHECK7-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 4 5675 // CHECK7-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 4 5676 // CHECK7-NEXT: [[_TMP27:%.*]] = alloca i32, align 4 5677 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 5678 // CHECK7-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 5679 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 5680 // CHECK7-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 5681 // CHECK7-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 5682 // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4 5683 // CHECK7-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 5684 // CHECK7-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 5685 // CHECK7-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4 5686 // CHECK7-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 5687 // CHECK7-NEXT: store i8* null, i8** [[TMP4]], align 4 5688 // CHECK7-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 5689 // CHECK7-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 5690 // CHECK7-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123) 5691 // CHECK7-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 5692 // CHECK7-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 5693 // CHECK7-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 5694 // CHECK7: omp_offload.failed: 5695 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 5696 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT]] 5697 // CHECK7: omp_offload.cont: 5698 // CHECK7-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 5699 // CHECK7-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 5700 // CHECK7-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** 5701 // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4 5702 // CHECK7-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 5703 // CHECK7-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** 5704 // CHECK7-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4 5705 // CHECK7-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0 5706 // CHECK7-NEXT: store i8* null, i8** [[TMP13]], align 4 5707 // CHECK7-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 5708 // CHECK7-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 5709 // CHECK7-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 5710 // CHECK7-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 5711 // CHECK7-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 5712 // CHECK7-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 5713 // CHECK7: omp_offload.failed7: 5714 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]] 5715 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT8]] 5716 // CHECK7: omp_offload.cont8: 5717 // CHECK7-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 5718 // CHECK7-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 5719 // CHECK7-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 5720 // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4 5721 // CHECK7-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 5722 // CHECK7-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 5723 // CHECK7-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4 5724 // CHECK7-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0 5725 // CHECK7-NEXT: store i8* null, i8** [[TMP22]], align 4 5726 // CHECK7-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 5727 // CHECK7-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 5728 // CHECK7-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 5729 // CHECK7-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 5730 // CHECK7-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 5731 // CHECK7-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 5732 // CHECK7: omp_offload.failed14: 5733 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(%struct.SS* [[THIS1]]) #[[ATTR2]] 5734 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT15]] 5735 // CHECK7: omp_offload.cont15: 5736 // CHECK7-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 5737 // CHECK7-NEXT: [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 5738 // CHECK7-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS** 5739 // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 4 5740 // CHECK7-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 5741 // CHECK7-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]** 5742 // CHECK7-NEXT: store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 4 5743 // CHECK7-NEXT: [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 0 5744 // CHECK7-NEXT: store i8* null, i8** [[TMP31]], align 4 5745 // CHECK7-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 5746 // CHECK7-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 5747 // CHECK7-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 5748 // CHECK7-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 5749 // CHECK7-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 5750 // CHECK7-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]] 5751 // CHECK7: omp_offload.failed21: 5752 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(%struct.SS* [[THIS1]]) #[[ATTR2]] 5753 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT22]] 5754 // CHECK7: omp_offload.cont22: 5755 // CHECK7-NEXT: [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 5756 // CHECK7-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 5757 // CHECK7-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS** 5758 // CHECK7-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 4 5759 // CHECK7-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 5760 // CHECK7-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]** 5761 // CHECK7-NEXT: store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 4 5762 // CHECK7-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 0 5763 // CHECK7-NEXT: store i8* null, i8** [[TMP40]], align 4 5764 // CHECK7-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 5765 // CHECK7-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 5766 // CHECK7-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 5767 // CHECK7-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 5768 // CHECK7-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 5769 // CHECK7-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]] 5770 // CHECK7: omp_offload.failed28: 5771 // CHECK7-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(%struct.SS* [[THIS1]]) #[[ATTR2]] 5772 // CHECK7-NEXT: br label [[OMP_OFFLOAD_CONT29]] 5773 // CHECK7: omp_offload.cont29: 5774 // CHECK7-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 5775 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i32 0, i32 0 5776 // CHECK7-NEXT: [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 5777 // CHECK7-NEXT: ret i32 [[TMP45]] 5778 // 5779 // 5780 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35 5781 // CHECK7-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 5782 // CHECK7-NEXT: entry: 5783 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 5784 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 5785 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 5786 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 5787 // CHECK7-NEXT: ret void 5788 // 5789 // 5790 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined. 5791 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 5792 // CHECK7-NEXT: entry: 5793 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5794 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5795 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 5796 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5797 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 5798 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5799 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5800 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5801 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5802 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 5803 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5804 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5805 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 5806 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 5807 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 5808 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 5809 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5810 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5811 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5812 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 5813 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5814 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5815 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 5816 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5817 // CHECK7: cond.true: 5818 // CHECK7-NEXT: br label [[COND_END:%.*]] 5819 // CHECK7: cond.false: 5820 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5821 // CHECK7-NEXT: br label [[COND_END]] 5822 // CHECK7: cond.end: 5823 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 5824 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5825 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5826 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 5827 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5828 // CHECK7: omp.inner.for.cond: 5829 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5830 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5831 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5832 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5833 // CHECK7: omp.inner.for.body: 5834 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5835 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5836 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 5837 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5838 // CHECK7: omp.inner.for.inc: 5839 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5840 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5841 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 5842 // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 5843 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]] 5844 // CHECK7: omp.inner.for.end: 5845 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5846 // CHECK7: omp.loop.exit: 5847 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 5848 // CHECK7-NEXT: ret void 5849 // 5850 // 5851 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..1 5852 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 5853 // CHECK7-NEXT: entry: 5854 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5855 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5856 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 5857 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 5858 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 5859 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5860 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 5861 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 5862 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 5863 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5864 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5865 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 5866 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5867 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5868 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 5869 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 5870 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 5871 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 5872 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 5873 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 5874 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 5875 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 5876 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 5877 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 5878 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5879 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5880 // CHECK7-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5881 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 5882 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5883 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5884 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 5885 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5886 // CHECK7: cond.true: 5887 // CHECK7-NEXT: br label [[COND_END:%.*]] 5888 // CHECK7: cond.false: 5889 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5890 // CHECK7-NEXT: br label [[COND_END]] 5891 // CHECK7: cond.end: 5892 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 5893 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 5894 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 5895 // CHECK7-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 5896 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5897 // CHECK7: omp.inner.for.cond: 5898 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5899 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 5900 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 5901 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5902 // CHECK7: omp.inner.for.body: 5903 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5904 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 5905 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 5906 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4 5907 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 5908 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 5909 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]] 5910 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 5911 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 5912 // CHECK7: omp.body.continue: 5913 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5914 // CHECK7: omp.inner.for.inc: 5915 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5916 // CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 5917 // CHECK7-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 5918 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]] 5919 // CHECK7: omp.inner.for.end: 5920 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5921 // CHECK7: omp.loop.exit: 5922 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 5923 // CHECK7-NEXT: ret void 5924 // 5925 // 5926 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40 5927 // CHECK7-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 5928 // CHECK7-NEXT: entry: 5929 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 5930 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 5931 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 5932 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 5933 // CHECK7-NEXT: ret void 5934 // 5935 // 5936 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..2 5937 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 5938 // CHECK7-NEXT: entry: 5939 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 5940 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 5941 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 5942 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 5943 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 5944 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 5945 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 5946 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 5947 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 5948 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 5949 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 5950 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 5951 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 5952 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 5953 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 5954 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 5955 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 5956 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 5957 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 5958 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 5959 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 5960 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5961 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 5962 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 5963 // CHECK7: cond.true: 5964 // CHECK7-NEXT: br label [[COND_END:%.*]] 5965 // CHECK7: cond.false: 5966 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5967 // CHECK7-NEXT: br label [[COND_END]] 5968 // CHECK7: cond.end: 5969 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 5970 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 5971 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5972 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 5973 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 5974 // CHECK7: omp.inner.for.cond: 5975 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5976 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5977 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 5978 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 5979 // CHECK7: omp.inner.for.body: 5980 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 5981 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 5982 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 5983 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 5984 // CHECK7: omp.inner.for.inc: 5985 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 5986 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 5987 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 5988 // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 5989 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]] 5990 // CHECK7: omp.inner.for.end: 5991 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 5992 // CHECK7: omp.loop.exit: 5993 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 5994 // CHECK7-NEXT: ret void 5995 // 5996 // 5997 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..3 5998 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 5999 // CHECK7-NEXT: entry: 6000 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6001 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6002 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 6003 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 6004 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 6005 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6006 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 6007 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6008 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6009 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6010 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6011 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 6012 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6013 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6014 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6015 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6016 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 6017 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 6018 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6019 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 6020 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6021 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6022 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 6023 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 6024 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6025 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6026 // CHECK7-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6027 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 6028 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6029 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6030 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 6031 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6032 // CHECK7: cond.true: 6033 // CHECK7-NEXT: br label [[COND_END:%.*]] 6034 // CHECK7: cond.false: 6035 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6036 // CHECK7-NEXT: br label [[COND_END]] 6037 // CHECK7: cond.end: 6038 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 6039 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 6040 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6041 // CHECK7-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 6042 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6043 // CHECK7: omp.inner.for.cond: 6044 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6045 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6046 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 6047 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6048 // CHECK7: omp.inner.for.body: 6049 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6050 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 6051 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6052 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4 6053 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 6054 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 6055 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]] 6056 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 6057 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6058 // CHECK7: omp.body.continue: 6059 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6060 // CHECK7: omp.inner.for.inc: 6061 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6062 // CHECK7-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 6063 // CHECK7-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 6064 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]] 6065 // CHECK7: omp.inner.for.end: 6066 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6067 // CHECK7: omp.loop.exit: 6068 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 6069 // CHECK7-NEXT: ret void 6070 // 6071 // 6072 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45 6073 // CHECK7-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 6074 // CHECK7-NEXT: entry: 6075 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 6076 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 6077 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 6078 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 6079 // CHECK7-NEXT: ret void 6080 // 6081 // 6082 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..6 6083 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 6084 // CHECK7-NEXT: entry: 6085 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6086 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6087 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 6088 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6089 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 6090 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6091 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6092 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6093 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6094 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 6095 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6096 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6097 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 6098 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 6099 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6100 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 6101 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6102 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6103 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6104 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 6105 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6106 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6107 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 6108 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6109 // CHECK7: cond.true: 6110 // CHECK7-NEXT: br label [[COND_END:%.*]] 6111 // CHECK7: cond.false: 6112 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6113 // CHECK7-NEXT: br label [[COND_END]] 6114 // CHECK7: cond.end: 6115 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 6116 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 6117 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6118 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 6119 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6120 // CHECK7: omp.inner.for.cond: 6121 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6122 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6123 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 6124 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6125 // CHECK7: omp.inner.for.body: 6126 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6127 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6128 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 6129 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6130 // CHECK7: omp.inner.for.inc: 6131 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6132 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6133 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 6134 // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 6135 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]] 6136 // CHECK7: omp.inner.for.end: 6137 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6138 // CHECK7: omp.loop.exit: 6139 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 6140 // CHECK7-NEXT: ret void 6141 // 6142 // 6143 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..7 6144 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 6145 // CHECK7-NEXT: entry: 6146 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6147 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6148 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 6149 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 6150 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 6151 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6152 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 6153 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6154 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6155 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6156 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6157 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 6158 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6159 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6160 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6161 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6162 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 6163 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 6164 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6165 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 6166 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6167 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6168 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 6169 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 6170 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6171 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6172 // CHECK7-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6173 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 6174 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 6175 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 6176 // CHECK7: omp.dispatch.cond: 6177 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6178 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6179 // CHECK7-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP5]], [[TMP6]] 6180 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6181 // CHECK7: cond.true: 6182 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6183 // CHECK7-NEXT: br label [[COND_END:%.*]] 6184 // CHECK7: cond.false: 6185 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6186 // CHECK7-NEXT: br label [[COND_END]] 6187 // CHECK7: cond.end: 6188 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 6189 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 6190 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6191 // CHECK7-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 6192 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6193 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6194 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 6195 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 6196 // CHECK7: omp.dispatch.body: 6197 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6198 // CHECK7: omp.inner.for.cond: 6199 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6200 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6201 // CHECK7-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 6202 // CHECK7-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6203 // CHECK7: omp.inner.for.body: 6204 // CHECK7-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6205 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 6206 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6207 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4 6208 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 6209 // CHECK7-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 6210 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP15]] 6211 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 6212 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6213 // CHECK7: omp.body.continue: 6214 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6215 // CHECK7: omp.inner.for.inc: 6216 // CHECK7-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6217 // CHECK7-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1 6218 // CHECK7-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 6219 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]] 6220 // CHECK7: omp.inner.for.end: 6221 // CHECK7-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 6222 // CHECK7: omp.dispatch.inc: 6223 // CHECK7-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6224 // CHECK7-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6225 // CHECK7-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 6226 // CHECK7-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 6227 // CHECK7-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6228 // CHECK7-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6229 // CHECK7-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 6230 // CHECK7-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 6231 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND]] 6232 // CHECK7: omp.dispatch.end: 6233 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 6234 // CHECK7-NEXT: ret void 6235 // 6236 // 6237 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51 6238 // CHECK7-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 6239 // CHECK7-NEXT: entry: 6240 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 6241 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 6242 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 6243 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 6244 // CHECK7-NEXT: ret void 6245 // 6246 // 6247 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..10 6248 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 6249 // CHECK7-NEXT: entry: 6250 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6251 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6252 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 6253 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6254 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 6255 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6256 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6257 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6258 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6259 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 6260 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6261 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6262 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 6263 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 6264 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6265 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 6266 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6267 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6268 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6269 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 6270 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6271 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6272 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 6273 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6274 // CHECK7: cond.true: 6275 // CHECK7-NEXT: br label [[COND_END:%.*]] 6276 // CHECK7: cond.false: 6277 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6278 // CHECK7-NEXT: br label [[COND_END]] 6279 // CHECK7: cond.end: 6280 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 6281 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 6282 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6283 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 6284 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6285 // CHECK7: omp.inner.for.cond: 6286 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6287 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6288 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 6289 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6290 // CHECK7: omp.inner.for.body: 6291 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6292 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6293 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 6294 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6295 // CHECK7: omp.inner.for.inc: 6296 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6297 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6298 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 6299 // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 6300 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]] 6301 // CHECK7: omp.inner.for.end: 6302 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6303 // CHECK7: omp.loop.exit: 6304 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 6305 // CHECK7-NEXT: ret void 6306 // 6307 // 6308 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..11 6309 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 6310 // CHECK7-NEXT: entry: 6311 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6312 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6313 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 6314 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 6315 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 6316 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6317 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 6318 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6319 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6320 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6321 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6322 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 6323 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6324 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6325 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6326 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6327 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 6328 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 6329 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6330 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 6331 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6332 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6333 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 6334 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 6335 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6336 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6337 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6338 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6339 // CHECK7-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6340 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 6341 // CHECK7-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 6342 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 6343 // CHECK7: omp.dispatch.cond: 6344 // CHECK7-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 6345 // CHECK7-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 6346 // CHECK7-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 6347 // CHECK7: omp.dispatch.body: 6348 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6349 // CHECK7-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 6350 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6351 // CHECK7: omp.inner.for.cond: 6352 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 6353 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10 6354 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 6355 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6356 // CHECK7: omp.inner.for.body: 6357 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 6358 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 6359 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6360 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !10 6361 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 6362 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !10 6363 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]] 6364 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !10 6365 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6366 // CHECK7: omp.body.continue: 6367 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6368 // CHECK7: omp.inner.for.inc: 6369 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 6370 // CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 6371 // CHECK7-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 6372 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]] 6373 // CHECK7: omp.inner.for.end: 6374 // CHECK7-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 6375 // CHECK7: omp.dispatch.inc: 6376 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND]] 6377 // CHECK7: omp.dispatch.end: 6378 // CHECK7-NEXT: ret void 6379 // 6380 // 6381 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57 6382 // CHECK7-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 6383 // CHECK7-NEXT: entry: 6384 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 6385 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 6386 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 6387 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 6388 // CHECK7-NEXT: ret void 6389 // 6390 // 6391 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..14 6392 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 6393 // CHECK7-NEXT: entry: 6394 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6395 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6396 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 6397 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6398 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 6399 // CHECK7-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6400 // CHECK7-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6401 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6402 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6403 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 6404 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6405 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6406 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 6407 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 6408 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6409 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 6410 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6411 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6412 // CHECK7-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6413 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 6414 // CHECK7-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6415 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6416 // CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 6417 // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6418 // CHECK7: cond.true: 6419 // CHECK7-NEXT: br label [[COND_END:%.*]] 6420 // CHECK7: cond.false: 6421 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6422 // CHECK7-NEXT: br label [[COND_END]] 6423 // CHECK7: cond.end: 6424 // CHECK7-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 6425 // CHECK7-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 6426 // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6427 // CHECK7-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 6428 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6429 // CHECK7: omp.inner.for.cond: 6430 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6431 // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6432 // CHECK7-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 6433 // CHECK7-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6434 // CHECK7: omp.inner.for.body: 6435 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6436 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6437 // CHECK7-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 6438 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6439 // CHECK7: omp.inner.for.inc: 6440 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6441 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6442 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 6443 // CHECK7-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 6444 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]] 6445 // CHECK7: omp.inner.for.end: 6446 // CHECK7-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6447 // CHECK7: omp.loop.exit: 6448 // CHECK7-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 6449 // CHECK7-NEXT: ret void 6450 // 6451 // 6452 // CHECK7-LABEL: define {{[^@]+}}@.omp_outlined..15 6453 // CHECK7-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 6454 // CHECK7-NEXT: entry: 6455 // CHECK7-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6456 // CHECK7-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6457 // CHECK7-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 6458 // CHECK7-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 6459 // CHECK7-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 6460 // CHECK7-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6461 // CHECK7-NEXT: [[TMP:%.*]] = alloca i32, align 4 6462 // CHECK7-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6463 // CHECK7-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6464 // CHECK7-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6465 // CHECK7-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6466 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 6467 // CHECK7-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6468 // CHECK7-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6469 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6470 // CHECK7-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6471 // CHECK7-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 6472 // CHECK7-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 6473 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6474 // CHECK7-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 6475 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6476 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6477 // CHECK7-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 6478 // CHECK7-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 6479 // CHECK7-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6480 // CHECK7-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6481 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6482 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6483 // CHECK7-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6484 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 6485 // CHECK7-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61) 6486 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 6487 // CHECK7: omp.dispatch.cond: 6488 // CHECK7-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 6489 // CHECK7-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 6490 // CHECK7-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 6491 // CHECK7: omp.dispatch.body: 6492 // CHECK7-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6493 // CHECK7-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 6494 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6495 // CHECK7: omp.inner.for.cond: 6496 // CHECK7-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 6497 // CHECK7-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13 6498 // CHECK7-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 6499 // CHECK7-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6500 // CHECK7: omp.inner.for.body: 6501 // CHECK7-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 6502 // CHECK7-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 6503 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6504 // CHECK7-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13 6505 // CHECK7-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 6506 // CHECK7-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13 6507 // CHECK7-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]] 6508 // CHECK7-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13 6509 // CHECK7-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6510 // CHECK7: omp.body.continue: 6511 // CHECK7-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6512 // CHECK7: omp.inner.for.inc: 6513 // CHECK7-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 6514 // CHECK7-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 6515 // CHECK7-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 6516 // CHECK7-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 6517 // CHECK7: omp.inner.for.end: 6518 // CHECK7-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 6519 // CHECK7: omp.dispatch.inc: 6520 // CHECK7-NEXT: br label [[OMP_DISPATCH_COND]] 6521 // CHECK7: omp.dispatch.end: 6522 // CHECK7-NEXT: ret void 6523 // 6524 // 6525 // CHECK7-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 6526 // CHECK7-SAME: () #[[ATTR3:[0-9]+]] { 6527 // CHECK7-NEXT: entry: 6528 // CHECK7-NEXT: call void @__tgt_register_requires(i64 1) 6529 // CHECK7-NEXT: ret void 6530 // 6531 // 6532 // CHECK8-LABEL: define {{[^@]+}}@_Z21teams_template_structv 6533 // CHECK8-SAME: () #[[ATTR0:[0-9]+]] { 6534 // CHECK8-NEXT: entry: 6535 // CHECK8-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4 6536 // CHECK8-NEXT: [[CALL:%.*]] = call i32 @_ZN2SSIiLi123ELx456EE3fooEv(%struct.SS* nonnull align 4 dereferenceable(496) [[V]]) 6537 // CHECK8-NEXT: ret i32 [[CALL]] 6538 // 6539 // 6540 // CHECK8-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv 6541 // CHECK8-SAME: (%struct.SS* nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 { 6542 // CHECK8-NEXT: entry: 6543 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 6544 // CHECK8-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 6545 // CHECK8-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 6546 // CHECK8-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 6547 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 6548 // CHECK8-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x i8*], align 4 6549 // CHECK8-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x i8*], align 4 6550 // CHECK8-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x i8*], align 4 6551 // CHECK8-NEXT: [[_TMP6:%.*]] = alloca i32, align 4 6552 // CHECK8-NEXT: [[DOTOFFLOAD_BASEPTRS10:%.*]] = alloca [1 x i8*], align 4 6553 // CHECK8-NEXT: [[DOTOFFLOAD_PTRS11:%.*]] = alloca [1 x i8*], align 4 6554 // CHECK8-NEXT: [[DOTOFFLOAD_MAPPERS12:%.*]] = alloca [1 x i8*], align 4 6555 // CHECK8-NEXT: [[_TMP13:%.*]] = alloca i32, align 4 6556 // CHECK8-NEXT: [[DOTOFFLOAD_BASEPTRS17:%.*]] = alloca [1 x i8*], align 4 6557 // CHECK8-NEXT: [[DOTOFFLOAD_PTRS18:%.*]] = alloca [1 x i8*], align 4 6558 // CHECK8-NEXT: [[DOTOFFLOAD_MAPPERS19:%.*]] = alloca [1 x i8*], align 4 6559 // CHECK8-NEXT: [[_TMP20:%.*]] = alloca i32, align 4 6560 // CHECK8-NEXT: [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [1 x i8*], align 4 6561 // CHECK8-NEXT: [[DOTOFFLOAD_PTRS25:%.*]] = alloca [1 x i8*], align 4 6562 // CHECK8-NEXT: [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [1 x i8*], align 4 6563 // CHECK8-NEXT: [[_TMP27:%.*]] = alloca i32, align 4 6564 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 6565 // CHECK8-NEXT: [[THIS1:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 6566 // CHECK8-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[THIS1]], i32 0, i32 0 6567 // CHECK8-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 6568 // CHECK8-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to %struct.SS** 6569 // CHECK8-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP1]], align 4 6570 // CHECK8-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 6571 // CHECK8-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [123 x i32]** 6572 // CHECK8-NEXT: store [123 x i32]* [[A]], [123 x i32]** [[TMP3]], align 4 6573 // CHECK8-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 6574 // CHECK8-NEXT: store i8* null, i8** [[TMP4]], align 4 6575 // CHECK8-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 6576 // CHECK8-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 6577 // CHECK8-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 123) 6578 // CHECK8-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 6579 // CHECK8-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 6580 // CHECK8-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 6581 // CHECK8: omp_offload.failed: 6582 // CHECK8-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(%struct.SS* [[THIS1]]) #[[ATTR2:[0-9]+]] 6583 // CHECK8-NEXT: br label [[OMP_OFFLOAD_CONT]] 6584 // CHECK8: omp_offload.cont: 6585 // CHECK8-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 6586 // CHECK8-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 6587 // CHECK8-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to %struct.SS** 6588 // CHECK8-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP10]], align 4 6589 // CHECK8-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 6590 // CHECK8-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [123 x i32]** 6591 // CHECK8-NEXT: store [123 x i32]* [[A2]], [123 x i32]** [[TMP12]], align 4 6592 // CHECK8-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0 6593 // CHECK8-NEXT: store i8* null, i8** [[TMP13]], align 4 6594 // CHECK8-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0 6595 // CHECK8-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS4]], i32 0, i32 0 6596 // CHECK8-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 6597 // CHECK8-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.4, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.5, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 6598 // CHECK8-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 6599 // CHECK8-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]] 6600 // CHECK8: omp_offload.failed7: 6601 // CHECK8-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(%struct.SS* [[THIS1]]) #[[ATTR2]] 6602 // CHECK8-NEXT: br label [[OMP_OFFLOAD_CONT8]] 6603 // CHECK8: omp_offload.cont8: 6604 // CHECK8-NEXT: [[A9:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 6605 // CHECK8-NEXT: [[TMP18:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 6606 // CHECK8-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to %struct.SS** 6607 // CHECK8-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP19]], align 4 6608 // CHECK8-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 6609 // CHECK8-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to [123 x i32]** 6610 // CHECK8-NEXT: store [123 x i32]* [[A9]], [123 x i32]** [[TMP21]], align 4 6611 // CHECK8-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS12]], i32 0, i32 0 6612 // CHECK8-NEXT: store i8* null, i8** [[TMP22]], align 4 6613 // CHECK8-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS10]], i32 0, i32 0 6614 // CHECK8-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS11]], i32 0, i32 0 6615 // CHECK8-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 6616 // CHECK8-NEXT: [[TMP25:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, i32 1, i8** [[TMP23]], i8** [[TMP24]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.8, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.9, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 6617 // CHECK8-NEXT: [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0 6618 // CHECK8-NEXT: br i1 [[TMP26]], label [[OMP_OFFLOAD_FAILED14:%.*]], label [[OMP_OFFLOAD_CONT15:%.*]] 6619 // CHECK8: omp_offload.failed14: 6620 // CHECK8-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(%struct.SS* [[THIS1]]) #[[ATTR2]] 6621 // CHECK8-NEXT: br label [[OMP_OFFLOAD_CONT15]] 6622 // CHECK8: omp_offload.cont15: 6623 // CHECK8-NEXT: [[A16:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 6624 // CHECK8-NEXT: [[TMP27:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 6625 // CHECK8-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to %struct.SS** 6626 // CHECK8-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP28]], align 4 6627 // CHECK8-NEXT: [[TMP29:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 6628 // CHECK8-NEXT: [[TMP30:%.*]] = bitcast i8** [[TMP29]] to [123 x i32]** 6629 // CHECK8-NEXT: store [123 x i32]* [[A16]], [123 x i32]** [[TMP30]], align 4 6630 // CHECK8-NEXT: [[TMP31:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS19]], i32 0, i32 0 6631 // CHECK8-NEXT: store i8* null, i8** [[TMP31]], align 4 6632 // CHECK8-NEXT: [[TMP32:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS17]], i32 0, i32 0 6633 // CHECK8-NEXT: [[TMP33:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS18]], i32 0, i32 0 6634 // CHECK8-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 6635 // CHECK8-NEXT: [[TMP34:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, i32 1, i8** [[TMP32]], i8** [[TMP33]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.12, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 6636 // CHECK8-NEXT: [[TMP35:%.*]] = icmp ne i32 [[TMP34]], 0 6637 // CHECK8-NEXT: br i1 [[TMP35]], label [[OMP_OFFLOAD_FAILED21:%.*]], label [[OMP_OFFLOAD_CONT22:%.*]] 6638 // CHECK8: omp_offload.failed21: 6639 // CHECK8-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(%struct.SS* [[THIS1]]) #[[ATTR2]] 6640 // CHECK8-NEXT: br label [[OMP_OFFLOAD_CONT22]] 6641 // CHECK8: omp_offload.cont22: 6642 // CHECK8-NEXT: [[A23:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 6643 // CHECK8-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 6644 // CHECK8-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to %struct.SS** 6645 // CHECK8-NEXT: store %struct.SS* [[THIS1]], %struct.SS** [[TMP37]], align 4 6646 // CHECK8-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 6647 // CHECK8-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to [123 x i32]** 6648 // CHECK8-NEXT: store [123 x i32]* [[A23]], [123 x i32]** [[TMP39]], align 4 6649 // CHECK8-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 0 6650 // CHECK8-NEXT: store i8* null, i8** [[TMP40]], align 4 6651 // CHECK8-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0 6652 // CHECK8-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS25]], i32 0, i32 0 6653 // CHECK8-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 123) 6654 // CHECK8-NEXT: [[TMP43:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, i32 1, i8** [[TMP41]], i8** [[TMP42]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.16, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.17, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 6655 // CHECK8-NEXT: [[TMP44:%.*]] = icmp ne i32 [[TMP43]], 0 6656 // CHECK8-NEXT: br i1 [[TMP44]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]] 6657 // CHECK8: omp_offload.failed28: 6658 // CHECK8-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(%struct.SS* [[THIS1]]) #[[ATTR2]] 6659 // CHECK8-NEXT: br label [[OMP_OFFLOAD_CONT29]] 6660 // CHECK8: omp_offload.cont29: 6661 // CHECK8-NEXT: [[A30:%.*]] = getelementptr inbounds [[STRUCT_SS]], %struct.SS* [[THIS1]], i32 0, i32 0 6662 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A30]], i32 0, i32 0 6663 // CHECK8-NEXT: [[TMP45:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 6664 // CHECK8-NEXT: ret i32 [[TMP45]] 6665 // 6666 // 6667 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35 6668 // CHECK8-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1:[0-9]+]] { 6669 // CHECK8-NEXT: entry: 6670 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 6671 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 6672 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 6673 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined. to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 6674 // CHECK8-NEXT: ret void 6675 // 6676 // 6677 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined. 6678 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 6679 // CHECK8-NEXT: entry: 6680 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6681 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6682 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 6683 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6684 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 6685 // CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6686 // CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6687 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6688 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6689 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 6690 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6691 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6692 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 6693 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 6694 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6695 // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 6696 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6697 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6698 // CHECK8-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6699 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 6700 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6701 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6702 // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 6703 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6704 // CHECK8: cond.true: 6705 // CHECK8-NEXT: br label [[COND_END:%.*]] 6706 // CHECK8: cond.false: 6707 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6708 // CHECK8-NEXT: br label [[COND_END]] 6709 // CHECK8: cond.end: 6710 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 6711 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 6712 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6713 // CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 6714 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6715 // CHECK8: omp.inner.for.cond: 6716 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6717 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6718 // CHECK8-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 6719 // CHECK8-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6720 // CHECK8: omp.inner.for.body: 6721 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6722 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6723 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 6724 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6725 // CHECK8: omp.inner.for.inc: 6726 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6727 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6728 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 6729 // CHECK8-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 6730 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]] 6731 // CHECK8: omp.inner.for.end: 6732 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6733 // CHECK8: omp.loop.exit: 6734 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 6735 // CHECK8-NEXT: ret void 6736 // 6737 // 6738 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..1 6739 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 6740 // CHECK8-NEXT: entry: 6741 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6742 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6743 // CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 6744 // CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 6745 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 6746 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6747 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 6748 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6749 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6750 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6751 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6752 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 6753 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6754 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6755 // CHECK8-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6756 // CHECK8-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6757 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 6758 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 6759 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6760 // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 6761 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6762 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6763 // CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 6764 // CHECK8-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 6765 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6766 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6767 // CHECK8-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6768 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 6769 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6770 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6771 // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 6772 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6773 // CHECK8: cond.true: 6774 // CHECK8-NEXT: br label [[COND_END:%.*]] 6775 // CHECK8: cond.false: 6776 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6777 // CHECK8-NEXT: br label [[COND_END]] 6778 // CHECK8: cond.end: 6779 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 6780 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 6781 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6782 // CHECK8-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 6783 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6784 // CHECK8: omp.inner.for.cond: 6785 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6786 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6787 // CHECK8-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 6788 // CHECK8-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6789 // CHECK8: omp.inner.for.body: 6790 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6791 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 6792 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6793 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4 6794 // CHECK8-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 6795 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 6796 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]] 6797 // CHECK8-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 6798 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6799 // CHECK8: omp.body.continue: 6800 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6801 // CHECK8: omp.inner.for.inc: 6802 // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6803 // CHECK8-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 6804 // CHECK8-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 6805 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]] 6806 // CHECK8: omp.inner.for.end: 6807 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6808 // CHECK8: omp.loop.exit: 6809 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 6810 // CHECK8-NEXT: ret void 6811 // 6812 // 6813 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40 6814 // CHECK8-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 6815 // CHECK8-NEXT: entry: 6816 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 6817 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 6818 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 6819 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 6820 // CHECK8-NEXT: ret void 6821 // 6822 // 6823 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..2 6824 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 6825 // CHECK8-NEXT: entry: 6826 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6827 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6828 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 6829 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6830 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 6831 // CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6832 // CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6833 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6834 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6835 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 6836 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6837 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6838 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 6839 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 6840 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6841 // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 6842 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6843 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6844 // CHECK8-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6845 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 6846 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6847 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6848 // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 6849 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6850 // CHECK8: cond.true: 6851 // CHECK8-NEXT: br label [[COND_END:%.*]] 6852 // CHECK8: cond.false: 6853 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6854 // CHECK8-NEXT: br label [[COND_END]] 6855 // CHECK8: cond.end: 6856 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 6857 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 6858 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6859 // CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 6860 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6861 // CHECK8: omp.inner.for.cond: 6862 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6863 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6864 // CHECK8-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 6865 // CHECK8-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6866 // CHECK8: omp.inner.for.body: 6867 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 6868 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6869 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 6870 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6871 // CHECK8: omp.inner.for.inc: 6872 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6873 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 6874 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 6875 // CHECK8-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 6876 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]] 6877 // CHECK8: omp.inner.for.end: 6878 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6879 // CHECK8: omp.loop.exit: 6880 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 6881 // CHECK8-NEXT: ret void 6882 // 6883 // 6884 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..3 6885 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 6886 // CHECK8-NEXT: entry: 6887 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6888 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6889 // CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 6890 // CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 6891 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 6892 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6893 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 6894 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 6895 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 6896 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6897 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6898 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 6899 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6900 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6901 // CHECK8-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6902 // CHECK8-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6903 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 6904 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 6905 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 6906 // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 6907 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 6908 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 6909 // CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 6910 // CHECK8-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 6911 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6912 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6913 // CHECK8-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6914 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 6915 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6916 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6917 // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122 6918 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6919 // CHECK8: cond.true: 6920 // CHECK8-NEXT: br label [[COND_END:%.*]] 6921 // CHECK8: cond.false: 6922 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6923 // CHECK8-NEXT: br label [[COND_END]] 6924 // CHECK8: cond.end: 6925 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 6926 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 6927 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 6928 // CHECK8-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 6929 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 6930 // CHECK8: omp.inner.for.cond: 6931 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6932 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 6933 // CHECK8-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 6934 // CHECK8-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 6935 // CHECK8: omp.inner.for.body: 6936 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6937 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 6938 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 6939 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4 6940 // CHECK8-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 6941 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 6942 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP11]] 6943 // CHECK8-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 6944 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 6945 // CHECK8: omp.body.continue: 6946 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 6947 // CHECK8: omp.inner.for.inc: 6948 // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 6949 // CHECK8-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 6950 // CHECK8-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 6951 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]] 6952 // CHECK8: omp.inner.for.end: 6953 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 6954 // CHECK8: omp.loop.exit: 6955 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 6956 // CHECK8-NEXT: ret void 6957 // 6958 // 6959 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45 6960 // CHECK8-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 6961 // CHECK8-NEXT: entry: 6962 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 6963 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 6964 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 6965 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..6 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 6966 // CHECK8-NEXT: ret void 6967 // 6968 // 6969 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..6 6970 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 6971 // CHECK8-NEXT: entry: 6972 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 6973 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 6974 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 6975 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 6976 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 6977 // CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 6978 // CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 6979 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 6980 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 6981 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 6982 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 6983 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 6984 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 6985 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 6986 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 6987 // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 6988 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 6989 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 6990 // CHECK8-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 6991 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 6992 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 6993 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 6994 // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 6995 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 6996 // CHECK8: cond.true: 6997 // CHECK8-NEXT: br label [[COND_END:%.*]] 6998 // CHECK8: cond.false: 6999 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7000 // CHECK8-NEXT: br label [[COND_END]] 7001 // CHECK8: cond.end: 7002 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 7003 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 7004 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7005 // CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 7006 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7007 // CHECK8: omp.inner.for.cond: 7008 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7009 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7010 // CHECK8-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 7011 // CHECK8-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7012 // CHECK8: omp.inner.for.body: 7013 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7014 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7015 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..7 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 7016 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7017 // CHECK8: omp.inner.for.inc: 7018 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7019 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7020 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 7021 // CHECK8-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 7022 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]] 7023 // CHECK8: omp.inner.for.end: 7024 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7025 // CHECK8: omp.loop.exit: 7026 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 7027 // CHECK8-NEXT: ret void 7028 // 7029 // 7030 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..7 7031 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 7032 // CHECK8-NEXT: entry: 7033 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 7034 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 7035 // CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 7036 // CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 7037 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 7038 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7039 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 7040 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7041 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7042 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7043 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7044 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 7045 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 7046 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 7047 // CHECK8-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 7048 // CHECK8-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 7049 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 7050 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 7051 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7052 // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 7053 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 7054 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 7055 // CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 7056 // CHECK8-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 7057 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7058 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7059 // CHECK8-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 7060 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 7061 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 61) 7062 // CHECK8-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 7063 // CHECK8: omp.dispatch.cond: 7064 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7065 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 7066 // CHECK8-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP5]], [[TMP6]] 7067 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7068 // CHECK8: cond.true: 7069 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 7070 // CHECK8-NEXT: br label [[COND_END:%.*]] 7071 // CHECK8: cond.false: 7072 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7073 // CHECK8-NEXT: br label [[COND_END]] 7074 // CHECK8: cond.end: 7075 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] 7076 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 7077 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7078 // CHECK8-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 7079 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7080 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7081 // CHECK8-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 7082 // CHECK8-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 7083 // CHECK8: omp.dispatch.body: 7084 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7085 // CHECK8: omp.inner.for.cond: 7086 // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7087 // CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7088 // CHECK8-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] 7089 // CHECK8-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7090 // CHECK8: omp.inner.for.body: 7091 // CHECK8-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7092 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 7093 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7094 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4 7095 // CHECK8-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 7096 // CHECK8-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 7097 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP15]] 7098 // CHECK8-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 7099 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7100 // CHECK8: omp.body.continue: 7101 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7102 // CHECK8: omp.inner.for.inc: 7103 // CHECK8-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7104 // CHECK8-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1 7105 // CHECK8-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 7106 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]] 7107 // CHECK8: omp.inner.for.end: 7108 // CHECK8-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 7109 // CHECK8: omp.dispatch.inc: 7110 // CHECK8-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7111 // CHECK8-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7112 // CHECK8-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] 7113 // CHECK8-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 7114 // CHECK8-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7115 // CHECK8-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7116 // CHECK8-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 7117 // CHECK8-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 7118 // CHECK8-NEXT: br label [[OMP_DISPATCH_COND]] 7119 // CHECK8: omp.dispatch.end: 7120 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 7121 // CHECK8-NEXT: ret void 7122 // 7123 // 7124 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51 7125 // CHECK8-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 7126 // CHECK8-NEXT: entry: 7127 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 7128 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 7129 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 7130 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..10 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 7131 // CHECK8-NEXT: ret void 7132 // 7133 // 7134 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..10 7135 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 7136 // CHECK8-NEXT: entry: 7137 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 7138 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 7139 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 7140 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7141 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 7142 // CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7143 // CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7144 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7145 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7146 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 7147 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 7148 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 7149 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 7150 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 7151 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 7152 // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 7153 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7154 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7155 // CHECK8-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 7156 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 7157 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7158 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7159 // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 7160 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7161 // CHECK8: cond.true: 7162 // CHECK8-NEXT: br label [[COND_END:%.*]] 7163 // CHECK8: cond.false: 7164 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7165 // CHECK8-NEXT: br label [[COND_END]] 7166 // CHECK8: cond.end: 7167 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 7168 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 7169 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7170 // CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 7171 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7172 // CHECK8: omp.inner.for.cond: 7173 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7174 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7175 // CHECK8-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 7176 // CHECK8-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7177 // CHECK8: omp.inner.for.body: 7178 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7179 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7180 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 7181 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7182 // CHECK8: omp.inner.for.inc: 7183 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7184 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7185 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 7186 // CHECK8-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 7187 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]] 7188 // CHECK8: omp.inner.for.end: 7189 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7190 // CHECK8: omp.loop.exit: 7191 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 7192 // CHECK8-NEXT: ret void 7193 // 7194 // 7195 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..11 7196 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 7197 // CHECK8-NEXT: entry: 7198 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 7199 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 7200 // CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 7201 // CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 7202 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 7203 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7204 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 7205 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7206 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7207 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7208 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7209 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 7210 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 7211 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 7212 // CHECK8-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 7213 // CHECK8-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 7214 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 7215 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 7216 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7217 // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 7218 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 7219 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 7220 // CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 7221 // CHECK8-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 7222 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7223 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7224 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7225 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7226 // CHECK8-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 7227 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 7228 // CHECK8-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 7229 // CHECK8-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 7230 // CHECK8: omp.dispatch.cond: 7231 // CHECK8-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 7232 // CHECK8-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 7233 // CHECK8-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 7234 // CHECK8: omp.dispatch.body: 7235 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7236 // CHECK8-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 7237 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7238 // CHECK8: omp.inner.for.cond: 7239 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 7240 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !10 7241 // CHECK8-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 7242 // CHECK8-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7243 // CHECK8: omp.inner.for.body: 7244 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 7245 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 7246 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7247 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !10 7248 // CHECK8-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 7249 // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !10 7250 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]] 7251 // CHECK8-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !10 7252 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7253 // CHECK8: omp.body.continue: 7254 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7255 // CHECK8: omp.inner.for.inc: 7256 // CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 7257 // CHECK8-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 7258 // CHECK8-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !10 7259 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]] 7260 // CHECK8: omp.inner.for.end: 7261 // CHECK8-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 7262 // CHECK8: omp.dispatch.inc: 7263 // CHECK8-NEXT: br label [[OMP_DISPATCH_COND]] 7264 // CHECK8: omp.dispatch.end: 7265 // CHECK8-NEXT: ret void 7266 // 7267 // 7268 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57 7269 // CHECK8-SAME: (%struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 7270 // CHECK8-NEXT: entry: 7271 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 7272 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 7273 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 7274 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, %struct.SS*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), %struct.SS* [[TMP0]]) 7275 // CHECK8-NEXT: ret void 7276 // 7277 // 7278 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..14 7279 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 7280 // CHECK8-NEXT: entry: 7281 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 7282 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 7283 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 7284 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7285 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 7286 // CHECK8-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7287 // CHECK8-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7288 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7289 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7290 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 7291 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 7292 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 7293 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 7294 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 7295 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 7296 // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_COMB_UB]], align 4 7297 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7298 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7299 // CHECK8-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 7300 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 7301 // CHECK8-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7302 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7303 // CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122 7304 // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7305 // CHECK8: cond.true: 7306 // CHECK8-NEXT: br label [[COND_END:%.*]] 7307 // CHECK8: cond.false: 7308 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7309 // CHECK8-NEXT: br label [[COND_END]] 7310 // CHECK8: cond.end: 7311 // CHECK8-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 7312 // CHECK8-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 7313 // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7314 // CHECK8-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 7315 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7316 // CHECK8: omp.inner.for.cond: 7317 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7318 // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7319 // CHECK8-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 7320 // CHECK8-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7321 // CHECK8: omp.inner.for.body: 7322 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7323 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7324 // CHECK8-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, %struct.SS*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], %struct.SS* [[TMP0]]) 7325 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7326 // CHECK8: omp.inner.for.inc: 7327 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7328 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7329 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 7330 // CHECK8-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 7331 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]] 7332 // CHECK8: omp.inner.for.end: 7333 // CHECK8-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7334 // CHECK8: omp.loop.exit: 7335 // CHECK8-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 7336 // CHECK8-NEXT: ret void 7337 // 7338 // 7339 // CHECK8-LABEL: define {{[^@]+}}@.omp_outlined..15 7340 // CHECK8-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], %struct.SS* [[THIS:%.*]]) #[[ATTR1]] { 7341 // CHECK8-NEXT: entry: 7342 // CHECK8-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 7343 // CHECK8-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 7344 // CHECK8-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 7345 // CHECK8-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 7346 // CHECK8-NEXT: [[THIS_ADDR:%.*]] = alloca %struct.SS*, align 4 7347 // CHECK8-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7348 // CHECK8-NEXT: [[TMP:%.*]] = alloca i32, align 4 7349 // CHECK8-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7350 // CHECK8-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7351 // CHECK8-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7352 // CHECK8-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7353 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 7354 // CHECK8-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 7355 // CHECK8-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 7356 // CHECK8-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 7357 // CHECK8-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 7358 // CHECK8-NEXT: store %struct.SS* [[THIS]], %struct.SS** [[THIS_ADDR]], align 4 7359 // CHECK8-NEXT: [[TMP0:%.*]] = load %struct.SS*, %struct.SS** [[THIS_ADDR]], align 4 7360 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7361 // CHECK8-NEXT: store i32 122, i32* [[DOTOMP_UB]], align 4 7362 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 7363 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 7364 // CHECK8-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 7365 // CHECK8-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 7366 // CHECK8-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7367 // CHECK8-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7368 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7369 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7370 // CHECK8-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 7371 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 7372 // CHECK8-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61) 7373 // CHECK8-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 7374 // CHECK8: omp.dispatch.cond: 7375 // CHECK8-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 7376 // CHECK8-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 7377 // CHECK8-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 7378 // CHECK8: omp.dispatch.body: 7379 // CHECK8-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7380 // CHECK8-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 7381 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7382 // CHECK8: omp.inner.for.cond: 7383 // CHECK8-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 7384 // CHECK8-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !13 7385 // CHECK8-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 7386 // CHECK8-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7387 // CHECK8: omp.inner.for.body: 7388 // CHECK8-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 7389 // CHECK8-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 7390 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7391 // CHECK8-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !13 7392 // CHECK8-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], %struct.SS* [[TMP0]], i32 0, i32 0 7393 // CHECK8-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !13 7394 // CHECK8-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], [123 x i32]* [[A]], i32 0, i32 [[TMP12]] 7395 // CHECK8-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !13 7396 // CHECK8-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7397 // CHECK8: omp.body.continue: 7398 // CHECK8-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7399 // CHECK8: omp.inner.for.inc: 7400 // CHECK8-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 7401 // CHECK8-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 7402 // CHECK8-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !13 7403 // CHECK8-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] 7404 // CHECK8: omp.inner.for.end: 7405 // CHECK8-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 7406 // CHECK8: omp.dispatch.inc: 7407 // CHECK8-NEXT: br label [[OMP_DISPATCH_COND]] 7408 // CHECK8: omp.dispatch.end: 7409 // CHECK8-NEXT: ret void 7410 // 7411 // 7412 // CHECK8-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 7413 // CHECK8-SAME: () #[[ATTR3:[0-9]+]] { 7414 // CHECK8-NEXT: entry: 7415 // CHECK8-NEXT: call void @__tgt_register_requires(i64 1) 7416 // CHECK8-NEXT: ret void 7417 // 7418 // 7419 // CHECK13-LABEL: define {{[^@]+}}@main 7420 // CHECK13-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 7421 // CHECK13-NEXT: entry: 7422 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 7423 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 7424 // CHECK13-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 7425 // CHECK13-NEXT: [[N:%.*]] = alloca i32, align 4 7426 // CHECK13-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 7427 // CHECK13-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 7428 // CHECK13-NEXT: [[M:%.*]] = alloca i32, align 4 7429 // CHECK13-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 7430 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 7431 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 7432 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 7433 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 7434 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 7435 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 7436 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 7437 // CHECK13-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8 7438 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8 7439 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8 7440 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8 7441 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8 7442 // CHECK13-NEXT: [[_TMP9:%.*]] = alloca i32, align 4 7443 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 7444 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4 7445 // CHECK13-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 7446 // CHECK13-NEXT: [[N_CASTED19:%.*]] = alloca i64, align 8 7447 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [4 x i8*], align 8 7448 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS22:%.*]] = alloca [4 x i8*], align 8 7449 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [4 x i8*], align 8 7450 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES24:%.*]] = alloca [4 x i64], align 8 7451 // CHECK13-NEXT: [[_TMP25:%.*]] = alloca i32, align 4 7452 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4 7453 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4 7454 // CHECK13-NEXT: [[N_CASTED34:%.*]] = alloca i64, align 8 7455 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS36:%.*]] = alloca [3 x i8*], align 8 7456 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS37:%.*]] = alloca [3 x i8*], align 8 7457 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS38:%.*]] = alloca [3 x i8*], align 8 7458 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES39:%.*]] = alloca [3 x i64], align 8 7459 // CHECK13-NEXT: [[_TMP40:%.*]] = alloca i32, align 4 7460 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4 7461 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4 7462 // CHECK13-NEXT: [[M_CASTED49:%.*]] = alloca i64, align 8 7463 // CHECK13-NEXT: [[N_CASTED51:%.*]] = alloca i64, align 8 7464 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS53:%.*]] = alloca [4 x i8*], align 8 7465 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS54:%.*]] = alloca [4 x i8*], align 8 7466 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS55:%.*]] = alloca [4 x i8*], align 8 7467 // CHECK13-NEXT: [[DOTOFFLOAD_SIZES56:%.*]] = alloca [4 x i64], align 8 7468 // CHECK13-NEXT: [[_TMP57:%.*]] = alloca i32, align 4 7469 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4 7470 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_59:%.*]] = alloca i32, align 4 7471 // CHECK13-NEXT: store i32 0, i32* [[RETVAL]], align 4 7472 // CHECK13-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 7473 // CHECK13-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 7474 // CHECK13-NEXT: store i32 100, i32* [[N]], align 4 7475 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 7476 // CHECK13-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 7477 // CHECK13-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 7478 // CHECK13-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 7479 // CHECK13-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 7480 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 7481 // CHECK13-NEXT: store i32 10, i32* [[M]], align 4 7482 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 7483 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 7484 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 7485 // CHECK13-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 7486 // CHECK13-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 7487 // CHECK13-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 7488 // CHECK13-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* 7489 // CHECK13-NEXT: store i64 [[TMP4]], i64* [[TMP7]], align 8 7490 // CHECK13-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 7491 // CHECK13-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64* 7492 // CHECK13-NEXT: store i64 [[TMP4]], i64* [[TMP9]], align 8 7493 // CHECK13-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 7494 // CHECK13-NEXT: store i64 4, i64* [[TMP10]], align 8 7495 // CHECK13-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 7496 // CHECK13-NEXT: store i8* null, i8** [[TMP11]], align 8 7497 // CHECK13-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 7498 // CHECK13-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 7499 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8 7500 // CHECK13-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 7501 // CHECK13-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 7502 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8 7503 // CHECK13-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 7504 // CHECK13-NEXT: store i64 8, i64* [[TMP16]], align 8 7505 // CHECK13-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 7506 // CHECK13-NEXT: store i8* null, i8** [[TMP17]], align 8 7507 // CHECK13-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 7508 // CHECK13-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32** 7509 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 8 7510 // CHECK13-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 7511 // CHECK13-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32** 7512 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 8 7513 // CHECK13-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 7514 // CHECK13-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 8 7515 // CHECK13-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 7516 // CHECK13-NEXT: store i8* null, i8** [[TMP23]], align 8 7517 // CHECK13-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 7518 // CHECK13-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 7519 // CHECK13-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 7520 // CHECK13-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4 7521 // CHECK13-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4 7522 // CHECK13-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7523 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0 7524 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 7525 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 7526 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 7527 // CHECK13-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7528 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1 7529 // CHECK13-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64 7530 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]]) 7531 // CHECK13-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 7532 // CHECK13-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 7533 // CHECK13-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 7534 // CHECK13: omp_offload.failed: 7535 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 7536 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]] 7537 // CHECK13: omp_offload.cont: 7538 // CHECK13-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4 7539 // CHECK13-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32* 7540 // CHECK13-NEXT: store i32 [[TMP33]], i32* [[CONV4]], align 4 7541 // CHECK13-NEXT: [[TMP34:%.*]] = load i64, i64* [[N_CASTED3]], align 8 7542 // CHECK13-NEXT: [[TMP35:%.*]] = mul nuw i64 [[TMP1]], 4 7543 // CHECK13-NEXT: [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 7544 // CHECK13-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64* 7545 // CHECK13-NEXT: store i64 [[TMP34]], i64* [[TMP37]], align 8 7546 // CHECK13-NEXT: [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 7547 // CHECK13-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64* 7548 // CHECK13-NEXT: store i64 [[TMP34]], i64* [[TMP39]], align 8 7549 // CHECK13-NEXT: [[TMP40:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0 7550 // CHECK13-NEXT: store i64 4, i64* [[TMP40]], align 8 7551 // CHECK13-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0 7552 // CHECK13-NEXT: store i8* null, i8** [[TMP41]], align 8 7553 // CHECK13-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 7554 // CHECK13-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i64* 7555 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP43]], align 8 7556 // CHECK13-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 7557 // CHECK13-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i64* 7558 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP45]], align 8 7559 // CHECK13-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 1 7560 // CHECK13-NEXT: store i64 8, i64* [[TMP46]], align 8 7561 // CHECK13-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1 7562 // CHECK13-NEXT: store i8* null, i8** [[TMP47]], align 8 7563 // CHECK13-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2 7564 // CHECK13-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32** 7565 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP49]], align 8 7566 // CHECK13-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2 7567 // CHECK13-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i32** 7568 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP51]], align 8 7569 // CHECK13-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2 7570 // CHECK13-NEXT: store i64 [[TMP35]], i64* [[TMP52]], align 8 7571 // CHECK13-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2 7572 // CHECK13-NEXT: store i8* null, i8** [[TMP53]], align 8 7573 // CHECK13-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 7574 // CHECK13-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 7575 // CHECK13-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0 7576 // CHECK13-NEXT: [[TMP57:%.*]] = load i32, i32* [[N]], align 4 7577 // CHECK13-NEXT: store i32 [[TMP57]], i32* [[DOTCAPTURE_EXPR_10]], align 4 7578 // CHECK13-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 7579 // CHECK13-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP58]], 0 7580 // CHECK13-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1 7581 // CHECK13-NEXT: [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1 7582 // CHECK13-NEXT: store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4 7583 // CHECK13-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 7584 // CHECK13-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP59]], 1 7585 // CHECK13-NEXT: [[TMP60:%.*]] = zext i32 [[ADD15]] to i64 7586 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP60]]) 7587 // CHECK13-NEXT: [[TMP61:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, i32 3, i8** [[TMP54]], i8** [[TMP55]], i64* [[TMP56]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 7588 // CHECK13-NEXT: [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0 7589 // CHECK13-NEXT: br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 7590 // CHECK13: omp_offload.failed16: 7591 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i64 [[TMP34]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 7592 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT17]] 7593 // CHECK13: omp_offload.cont17: 7594 // CHECK13-NEXT: [[TMP63:%.*]] = load i32, i32* [[M]], align 4 7595 // CHECK13-NEXT: [[CONV18:%.*]] = bitcast i64* [[M_CASTED]] to i32* 7596 // CHECK13-NEXT: store i32 [[TMP63]], i32* [[CONV18]], align 4 7597 // CHECK13-NEXT: [[TMP64:%.*]] = load i64, i64* [[M_CASTED]], align 8 7598 // CHECK13-NEXT: [[TMP65:%.*]] = load i32, i32* [[N]], align 4 7599 // CHECK13-NEXT: [[CONV20:%.*]] = bitcast i64* [[N_CASTED19]] to i32* 7600 // CHECK13-NEXT: store i32 [[TMP65]], i32* [[CONV20]], align 4 7601 // CHECK13-NEXT: [[TMP66:%.*]] = load i64, i64* [[N_CASTED19]], align 8 7602 // CHECK13-NEXT: [[TMP67:%.*]] = mul nuw i64 [[TMP1]], 4 7603 // CHECK13-NEXT: [[TMP68:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 7604 // CHECK13-NEXT: [[TMP69:%.*]] = bitcast i8** [[TMP68]] to i64* 7605 // CHECK13-NEXT: store i64 [[TMP64]], i64* [[TMP69]], align 8 7606 // CHECK13-NEXT: [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 7607 // CHECK13-NEXT: [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i64* 7608 // CHECK13-NEXT: store i64 [[TMP64]], i64* [[TMP71]], align 8 7609 // CHECK13-NEXT: [[TMP72:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0 7610 // CHECK13-NEXT: store i64 4, i64* [[TMP72]], align 8 7611 // CHECK13-NEXT: [[TMP73:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0 7612 // CHECK13-NEXT: store i8* null, i8** [[TMP73]], align 8 7613 // CHECK13-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1 7614 // CHECK13-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i64* 7615 // CHECK13-NEXT: store i64 [[TMP66]], i64* [[TMP75]], align 8 7616 // CHECK13-NEXT: [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1 7617 // CHECK13-NEXT: [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i64* 7618 // CHECK13-NEXT: store i64 [[TMP66]], i64* [[TMP77]], align 8 7619 // CHECK13-NEXT: [[TMP78:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 1 7620 // CHECK13-NEXT: store i64 4, i64* [[TMP78]], align 8 7621 // CHECK13-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1 7622 // CHECK13-NEXT: store i8* null, i8** [[TMP79]], align 8 7623 // CHECK13-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 2 7624 // CHECK13-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i64* 7625 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP81]], align 8 7626 // CHECK13-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 2 7627 // CHECK13-NEXT: [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i64* 7628 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP83]], align 8 7629 // CHECK13-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 2 7630 // CHECK13-NEXT: store i64 8, i64* [[TMP84]], align 8 7631 // CHECK13-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 2 7632 // CHECK13-NEXT: store i8* null, i8** [[TMP85]], align 8 7633 // CHECK13-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 3 7634 // CHECK13-NEXT: [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i32** 7635 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP87]], align 8 7636 // CHECK13-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 3 7637 // CHECK13-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32** 7638 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP89]], align 8 7639 // CHECK13-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 3 7640 // CHECK13-NEXT: store i64 [[TMP67]], i64* [[TMP90]], align 8 7641 // CHECK13-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 3 7642 // CHECK13-NEXT: store i8* null, i8** [[TMP91]], align 8 7643 // CHECK13-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 7644 // CHECK13-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 7645 // CHECK13-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0 7646 // CHECK13-NEXT: [[TMP95:%.*]] = load i32, i32* [[N]], align 4 7647 // CHECK13-NEXT: store i32 [[TMP95]], i32* [[DOTCAPTURE_EXPR_26]], align 4 7648 // CHECK13-NEXT: [[TMP96:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 7649 // CHECK13-NEXT: [[SUB28:%.*]] = sub nsw i32 [[TMP96]], 0 7650 // CHECK13-NEXT: [[DIV29:%.*]] = sdiv i32 [[SUB28]], 1 7651 // CHECK13-NEXT: [[SUB30:%.*]] = sub nsw i32 [[DIV29]], 1 7652 // CHECK13-NEXT: store i32 [[SUB30]], i32* [[DOTCAPTURE_EXPR_27]], align 4 7653 // CHECK13-NEXT: [[TMP97:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 7654 // CHECK13-NEXT: [[ADD31:%.*]] = add nsw i32 [[TMP97]], 1 7655 // CHECK13-NEXT: [[TMP98:%.*]] = zext i32 [[ADD31]] to i64 7656 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP98]]) 7657 // CHECK13-NEXT: [[TMP99:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, i32 4, i8** [[TMP92]], i8** [[TMP93]], i64* [[TMP94]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 7658 // CHECK13-NEXT: [[TMP100:%.*]] = icmp ne i32 [[TMP99]], 0 7659 // CHECK13-NEXT: br i1 [[TMP100]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]] 7660 // CHECK13: omp_offload.failed32: 7661 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i64 [[TMP64]], i64 [[TMP66]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 7662 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT33]] 7663 // CHECK13: omp_offload.cont33: 7664 // CHECK13-NEXT: [[TMP101:%.*]] = load i32, i32* [[N]], align 4 7665 // CHECK13-NEXT: [[CONV35:%.*]] = bitcast i64* [[N_CASTED34]] to i32* 7666 // CHECK13-NEXT: store i32 [[TMP101]], i32* [[CONV35]], align 4 7667 // CHECK13-NEXT: [[TMP102:%.*]] = load i64, i64* [[N_CASTED34]], align 8 7668 // CHECK13-NEXT: [[TMP103:%.*]] = mul nuw i64 [[TMP1]], 4 7669 // CHECK13-NEXT: [[TMP104:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0 7670 // CHECK13-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to i64* 7671 // CHECK13-NEXT: store i64 [[TMP102]], i64* [[TMP105]], align 8 7672 // CHECK13-NEXT: [[TMP106:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0 7673 // CHECK13-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to i64* 7674 // CHECK13-NEXT: store i64 [[TMP102]], i64* [[TMP107]], align 8 7675 // CHECK13-NEXT: [[TMP108:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0 7676 // CHECK13-NEXT: store i64 4, i64* [[TMP108]], align 8 7677 // CHECK13-NEXT: [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 0 7678 // CHECK13-NEXT: store i8* null, i8** [[TMP109]], align 8 7679 // CHECK13-NEXT: [[TMP110:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 1 7680 // CHECK13-NEXT: [[TMP111:%.*]] = bitcast i8** [[TMP110]] to i64* 7681 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP111]], align 8 7682 // CHECK13-NEXT: [[TMP112:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 1 7683 // CHECK13-NEXT: [[TMP113:%.*]] = bitcast i8** [[TMP112]] to i64* 7684 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP113]], align 8 7685 // CHECK13-NEXT: [[TMP114:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 1 7686 // CHECK13-NEXT: store i64 8, i64* [[TMP114]], align 8 7687 // CHECK13-NEXT: [[TMP115:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 1 7688 // CHECK13-NEXT: store i8* null, i8** [[TMP115]], align 8 7689 // CHECK13-NEXT: [[TMP116:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 2 7690 // CHECK13-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to i32** 7691 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP117]], align 8 7692 // CHECK13-NEXT: [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 2 7693 // CHECK13-NEXT: [[TMP119:%.*]] = bitcast i8** [[TMP118]] to i32** 7694 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP119]], align 8 7695 // CHECK13-NEXT: [[TMP120:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 2 7696 // CHECK13-NEXT: store i64 [[TMP103]], i64* [[TMP120]], align 8 7697 // CHECK13-NEXT: [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 2 7698 // CHECK13-NEXT: store i8* null, i8** [[TMP121]], align 8 7699 // CHECK13-NEXT: [[TMP122:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0 7700 // CHECK13-NEXT: [[TMP123:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0 7701 // CHECK13-NEXT: [[TMP124:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0 7702 // CHECK13-NEXT: [[TMP125:%.*]] = load i32, i32* [[N]], align 4 7703 // CHECK13-NEXT: store i32 [[TMP125]], i32* [[DOTCAPTURE_EXPR_41]], align 4 7704 // CHECK13-NEXT: [[TMP126:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4 7705 // CHECK13-NEXT: [[SUB43:%.*]] = sub nsw i32 [[TMP126]], 0 7706 // CHECK13-NEXT: [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1 7707 // CHECK13-NEXT: [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 1 7708 // CHECK13-NEXT: store i32 [[SUB45]], i32* [[DOTCAPTURE_EXPR_42]], align 4 7709 // CHECK13-NEXT: [[TMP127:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_42]], align 4 7710 // CHECK13-NEXT: [[ADD46:%.*]] = add nsw i32 [[TMP127]], 1 7711 // CHECK13-NEXT: [[TMP128:%.*]] = zext i32 [[ADD46]] to i64 7712 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP128]]) 7713 // CHECK13-NEXT: [[TMP129:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, i32 3, i8** [[TMP122]], i8** [[TMP123]], i64* [[TMP124]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 7714 // CHECK13-NEXT: [[TMP130:%.*]] = icmp ne i32 [[TMP129]], 0 7715 // CHECK13-NEXT: br i1 [[TMP130]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]] 7716 // CHECK13: omp_offload.failed47: 7717 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i64 [[TMP102]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 7718 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT48]] 7719 // CHECK13: omp_offload.cont48: 7720 // CHECK13-NEXT: [[TMP131:%.*]] = load i32, i32* [[M]], align 4 7721 // CHECK13-NEXT: [[CONV50:%.*]] = bitcast i64* [[M_CASTED49]] to i32* 7722 // CHECK13-NEXT: store i32 [[TMP131]], i32* [[CONV50]], align 4 7723 // CHECK13-NEXT: [[TMP132:%.*]] = load i64, i64* [[M_CASTED49]], align 8 7724 // CHECK13-NEXT: [[TMP133:%.*]] = load i32, i32* [[N]], align 4 7725 // CHECK13-NEXT: [[CONV52:%.*]] = bitcast i64* [[N_CASTED51]] to i32* 7726 // CHECK13-NEXT: store i32 [[TMP133]], i32* [[CONV52]], align 4 7727 // CHECK13-NEXT: [[TMP134:%.*]] = load i64, i64* [[N_CASTED51]], align 8 7728 // CHECK13-NEXT: [[TMP135:%.*]] = mul nuw i64 [[TMP1]], 4 7729 // CHECK13-NEXT: [[TMP136:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0 7730 // CHECK13-NEXT: [[TMP137:%.*]] = bitcast i8** [[TMP136]] to i64* 7731 // CHECK13-NEXT: store i64 [[TMP132]], i64* [[TMP137]], align 8 7732 // CHECK13-NEXT: [[TMP138:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0 7733 // CHECK13-NEXT: [[TMP139:%.*]] = bitcast i8** [[TMP138]] to i64* 7734 // CHECK13-NEXT: store i64 [[TMP132]], i64* [[TMP139]], align 8 7735 // CHECK13-NEXT: [[TMP140:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0 7736 // CHECK13-NEXT: store i64 4, i64* [[TMP140]], align 8 7737 // CHECK13-NEXT: [[TMP141:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 0 7738 // CHECK13-NEXT: store i8* null, i8** [[TMP141]], align 8 7739 // CHECK13-NEXT: [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 1 7740 // CHECK13-NEXT: [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i64* 7741 // CHECK13-NEXT: store i64 [[TMP134]], i64* [[TMP143]], align 8 7742 // CHECK13-NEXT: [[TMP144:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 1 7743 // CHECK13-NEXT: [[TMP145:%.*]] = bitcast i8** [[TMP144]] to i64* 7744 // CHECK13-NEXT: store i64 [[TMP134]], i64* [[TMP145]], align 8 7745 // CHECK13-NEXT: [[TMP146:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 1 7746 // CHECK13-NEXT: store i64 4, i64* [[TMP146]], align 8 7747 // CHECK13-NEXT: [[TMP147:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 1 7748 // CHECK13-NEXT: store i8* null, i8** [[TMP147]], align 8 7749 // CHECK13-NEXT: [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 2 7750 // CHECK13-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i64* 7751 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP149]], align 8 7752 // CHECK13-NEXT: [[TMP150:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 2 7753 // CHECK13-NEXT: [[TMP151:%.*]] = bitcast i8** [[TMP150]] to i64* 7754 // CHECK13-NEXT: store i64 [[TMP1]], i64* [[TMP151]], align 8 7755 // CHECK13-NEXT: [[TMP152:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 2 7756 // CHECK13-NEXT: store i64 8, i64* [[TMP152]], align 8 7757 // CHECK13-NEXT: [[TMP153:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 2 7758 // CHECK13-NEXT: store i8* null, i8** [[TMP153]], align 8 7759 // CHECK13-NEXT: [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 3 7760 // CHECK13-NEXT: [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32** 7761 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP155]], align 8 7762 // CHECK13-NEXT: [[TMP156:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 3 7763 // CHECK13-NEXT: [[TMP157:%.*]] = bitcast i8** [[TMP156]] to i32** 7764 // CHECK13-NEXT: store i32* [[VLA]], i32** [[TMP157]], align 8 7765 // CHECK13-NEXT: [[TMP158:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 3 7766 // CHECK13-NEXT: store i64 [[TMP135]], i64* [[TMP158]], align 8 7767 // CHECK13-NEXT: [[TMP159:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 3 7768 // CHECK13-NEXT: store i8* null, i8** [[TMP159]], align 8 7769 // CHECK13-NEXT: [[TMP160:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0 7770 // CHECK13-NEXT: [[TMP161:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0 7771 // CHECK13-NEXT: [[TMP162:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0 7772 // CHECK13-NEXT: [[TMP163:%.*]] = load i32, i32* [[N]], align 4 7773 // CHECK13-NEXT: store i32 [[TMP163]], i32* [[DOTCAPTURE_EXPR_58]], align 4 7774 // CHECK13-NEXT: [[TMP164:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_58]], align 4 7775 // CHECK13-NEXT: [[SUB60:%.*]] = sub nsw i32 [[TMP164]], 0 7776 // CHECK13-NEXT: [[DIV61:%.*]] = sdiv i32 [[SUB60]], 1 7777 // CHECK13-NEXT: [[SUB62:%.*]] = sub nsw i32 [[DIV61]], 1 7778 // CHECK13-NEXT: store i32 [[SUB62]], i32* [[DOTCAPTURE_EXPR_59]], align 4 7779 // CHECK13-NEXT: [[TMP165:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_59]], align 4 7780 // CHECK13-NEXT: [[ADD63:%.*]] = add nsw i32 [[TMP165]], 1 7781 // CHECK13-NEXT: [[TMP166:%.*]] = zext i32 [[ADD63]] to i64 7782 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP166]]) 7783 // CHECK13-NEXT: [[TMP167:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, i32 4, i8** [[TMP160]], i8** [[TMP161]], i64* [[TMP162]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 7784 // CHECK13-NEXT: [[TMP168:%.*]] = icmp ne i32 [[TMP167]], 0 7785 // CHECK13-NEXT: br i1 [[TMP168]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]] 7786 // CHECK13: omp_offload.failed64: 7787 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i64 [[TMP132]], i64 [[TMP134]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 7788 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT65]] 7789 // CHECK13: omp_offload.cont65: 7790 // CHECK13-NEXT: [[TMP169:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 7791 // CHECK13-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP169]]) 7792 // CHECK13-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 7793 // CHECK13-NEXT: [[TMP170:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 7794 // CHECK13-NEXT: call void @llvm.stackrestore(i8* [[TMP170]]) 7795 // CHECK13-NEXT: [[TMP171:%.*]] = load i32, i32* [[RETVAL]], align 4 7796 // CHECK13-NEXT: ret i32 [[TMP171]] 7797 // 7798 // 7799 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148 7800 // CHECK13-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 7801 // CHECK13-NEXT: entry: 7802 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 7803 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 7804 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 7805 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 7806 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 7807 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 7808 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 7809 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 7810 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 7811 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 7812 // CHECK13-NEXT: ret void 7813 // 7814 // 7815 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined. 7816 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 7817 // CHECK13-NEXT: entry: 7818 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7819 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7820 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 7821 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 7822 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 7823 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7824 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 7825 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 7826 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 7827 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 7828 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 7829 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 7830 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7831 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7832 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4 7833 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7834 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7835 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 7836 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 7837 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 7838 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 7839 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 7840 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 7841 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 7842 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 7843 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7844 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 7845 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 7846 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 7847 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 7848 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 7849 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7850 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 7851 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 7852 // CHECK13: omp.precond.then: 7853 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 7854 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7855 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 7856 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7857 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7858 // CHECK13-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7859 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 7860 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7861 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7862 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7863 // CHECK13-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 7864 // CHECK13-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7865 // CHECK13: cond.true: 7866 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7867 // CHECK13-NEXT: br label [[COND_END:%.*]] 7868 // CHECK13: cond.false: 7869 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7870 // CHECK13-NEXT: br label [[COND_END]] 7871 // CHECK13: cond.end: 7872 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 7873 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 7874 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7875 // CHECK13-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 7876 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7877 // CHECK13: omp.inner.for.cond: 7878 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7879 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7880 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 7881 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7882 // CHECK13: omp.inner.for.body: 7883 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 7884 // CHECK13-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 7885 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 7886 // CHECK13-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 7887 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 7888 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7889 // CHECK13: omp.inner.for.inc: 7890 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7891 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 7892 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 7893 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 7894 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 7895 // CHECK13: omp.inner.for.end: 7896 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 7897 // CHECK13: omp.loop.exit: 7898 // CHECK13-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7899 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 7900 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 7901 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 7902 // CHECK13: omp.precond.end: 7903 // CHECK13-NEXT: ret void 7904 // 7905 // 7906 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..1 7907 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 7908 // CHECK13-NEXT: entry: 7909 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 7910 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 7911 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 7912 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 7913 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 7914 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 7915 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 7916 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 7917 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 7918 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 7919 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 7920 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 7921 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 7922 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 7923 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 7924 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 7925 // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4 7926 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 7927 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 7928 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7929 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7930 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 7931 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 7932 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 7933 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 7934 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 7935 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 7936 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 7937 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 7938 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7939 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 7940 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 7941 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 7942 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 7943 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 7944 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 7945 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 7946 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 7947 // CHECK13: omp.precond.then: 7948 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 7949 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7950 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 7951 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 7952 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 7953 // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 7954 // CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 7955 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 7956 // CHECK13-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 7957 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 7958 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 7959 // CHECK13-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 7960 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 7961 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 7962 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7963 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7964 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 7965 // CHECK13-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 7966 // CHECK13: cond.true: 7967 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 7968 // CHECK13-NEXT: br label [[COND_END:%.*]] 7969 // CHECK13: cond.false: 7970 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7971 // CHECK13-NEXT: br label [[COND_END]] 7972 // CHECK13: cond.end: 7973 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 7974 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 7975 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 7976 // CHECK13-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 7977 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 7978 // CHECK13: omp.inner.for.cond: 7979 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7980 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 7981 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 7982 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 7983 // CHECK13: omp.inner.for.body: 7984 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7985 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 7986 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 7987 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 7988 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4 7989 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 7990 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 7991 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 7992 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 7993 // CHECK13: omp.body.continue: 7994 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 7995 // CHECK13: omp.inner.for.inc: 7996 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 7997 // CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 7998 // CHECK13-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 7999 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 8000 // CHECK13: omp.inner.for.end: 8001 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8002 // CHECK13: omp.loop.exit: 8003 // CHECK13-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8004 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 8005 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 8006 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 8007 // CHECK13: omp.precond.end: 8008 // CHECK13-NEXT: ret void 8009 // 8010 // 8011 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153 8012 // CHECK13-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 8013 // CHECK13-NEXT: entry: 8014 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 8015 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 8016 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 8017 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 8018 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 8019 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 8020 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 8021 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 8022 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 8023 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 8024 // CHECK13-NEXT: ret void 8025 // 8026 // 8027 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..2 8028 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 8029 // CHECK13-NEXT: entry: 8030 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8031 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8032 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 8033 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 8034 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 8035 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8036 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 8037 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 8038 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8039 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 8040 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8041 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8042 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8043 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8044 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4 8045 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8046 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8047 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 8048 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 8049 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 8050 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 8051 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 8052 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 8053 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 8054 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 8055 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8056 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 8057 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8058 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 8059 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 8060 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 8061 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8062 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 8063 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8064 // CHECK13: omp.precond.then: 8065 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 8066 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8067 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 8068 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8069 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8070 // CHECK13-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8071 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 8072 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8073 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8074 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8075 // CHECK13-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 8076 // CHECK13-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8077 // CHECK13: cond.true: 8078 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8079 // CHECK13-NEXT: br label [[COND_END:%.*]] 8080 // CHECK13: cond.false: 8081 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8082 // CHECK13-NEXT: br label [[COND_END]] 8083 // CHECK13: cond.end: 8084 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 8085 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 8086 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8087 // CHECK13-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 8088 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8089 // CHECK13: omp.inner.for.cond: 8090 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8091 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8092 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 8093 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8094 // CHECK13: omp.inner.for.body: 8095 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8096 // CHECK13-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 8097 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8098 // CHECK13-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 8099 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 8100 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8101 // CHECK13: omp.inner.for.inc: 8102 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8103 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8104 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 8105 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 8106 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 8107 // CHECK13: omp.inner.for.end: 8108 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8109 // CHECK13: omp.loop.exit: 8110 // CHECK13-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8111 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 8112 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 8113 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 8114 // CHECK13: omp.precond.end: 8115 // CHECK13-NEXT: ret void 8116 // 8117 // 8118 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..3 8119 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 8120 // CHECK13-NEXT: entry: 8121 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8122 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8123 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 8124 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 8125 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 8126 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 8127 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 8128 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8129 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 8130 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 8131 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8132 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 8133 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8134 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8135 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8136 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8137 // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4 8138 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8139 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8140 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8141 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8142 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 8143 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 8144 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 8145 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 8146 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 8147 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 8148 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 8149 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 8150 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8151 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 8152 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8153 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 8154 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 8155 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 8156 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8157 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 8158 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8159 // CHECK13: omp.precond.then: 8160 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 8161 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8162 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 8163 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8164 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 8165 // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8166 // CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 8167 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 8168 // CHECK13-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 8169 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8170 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8171 // CHECK13-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8172 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 8173 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8174 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8175 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8176 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 8177 // CHECK13-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8178 // CHECK13: cond.true: 8179 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8180 // CHECK13-NEXT: br label [[COND_END:%.*]] 8181 // CHECK13: cond.false: 8182 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8183 // CHECK13-NEXT: br label [[COND_END]] 8184 // CHECK13: cond.end: 8185 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 8186 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 8187 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8188 // CHECK13-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 8189 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8190 // CHECK13: omp.inner.for.cond: 8191 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8192 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8193 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 8194 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8195 // CHECK13: omp.inner.for.body: 8196 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8197 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 8198 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8199 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 8200 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4 8201 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 8202 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 8203 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 8204 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8205 // CHECK13: omp.body.continue: 8206 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8207 // CHECK13: omp.inner.for.inc: 8208 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8209 // CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 8210 // CHECK13-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 8211 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 8212 // CHECK13: omp.inner.for.end: 8213 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8214 // CHECK13: omp.loop.exit: 8215 // CHECK13-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8216 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 8217 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 8218 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 8219 // CHECK13: omp.precond.end: 8220 // CHECK13-NEXT: ret void 8221 // 8222 // 8223 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158 8224 // CHECK13-SAME: (i64 [[M:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 8225 // CHECK13-NEXT: entry: 8226 // CHECK13-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 8227 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 8228 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 8229 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 8230 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 8231 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 8232 // CHECK13-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 8233 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 8234 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 8235 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 8236 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* 8237 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 8238 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 8239 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 8240 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8 8241 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 8242 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8243 // CHECK13-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 8244 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4 8245 // CHECK13-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 8246 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]]) 8247 // CHECK13-NEXT: ret void 8248 // 8249 // 8250 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..5 8251 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 8252 // CHECK13-NEXT: entry: 8253 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8254 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8255 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 8256 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 8257 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 8258 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 8259 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8260 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 8261 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8262 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 8263 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 8264 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8265 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8266 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8267 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8268 // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4 8269 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 8270 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8271 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8272 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 8273 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 8274 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 8275 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 8276 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 8277 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 8278 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 8279 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 8280 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 8281 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 8282 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8283 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 8284 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8285 // CHECK13-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 8286 // CHECK13-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 8287 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 8288 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8289 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 8290 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8291 // CHECK13: omp.precond.then: 8292 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 8293 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 8294 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 8295 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8296 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8297 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[CONV]], align 8 8298 // CHECK13-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8299 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 8300 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]]) 8301 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8302 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 8303 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 8304 // CHECK13-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8305 // CHECK13: cond.true: 8306 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 8307 // CHECK13-NEXT: br label [[COND_END:%.*]] 8308 // CHECK13: cond.false: 8309 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8310 // CHECK13-NEXT: br label [[COND_END]] 8311 // CHECK13: cond.end: 8312 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 8313 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 8314 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8315 // CHECK13-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 8316 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8317 // CHECK13: omp.inner.for.cond: 8318 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8319 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 8320 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1 8321 // CHECK13-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]] 8322 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8323 // CHECK13: omp.inner.for.body: 8324 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8325 // CHECK13-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 8326 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8327 // CHECK13-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 8328 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV]], align 8 8329 // CHECK13-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 8330 // CHECK13-NEXT: store i32 [[TMP21]], i32* [[CONV7]], align 4 8331 // CHECK13-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 8332 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP22]]) 8333 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8334 // CHECK13: omp.inner.for.inc: 8335 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8336 // CHECK13-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8337 // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 8338 // CHECK13-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 8339 // CHECK13-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8340 // CHECK13-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8341 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 8342 // CHECK13-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4 8343 // CHECK13-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8344 // CHECK13-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8345 // CHECK13-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP27]], [[TMP28]] 8346 // CHECK13-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4 8347 // CHECK13-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8348 // CHECK13-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 8349 // CHECK13-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]] 8350 // CHECK13-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]] 8351 // CHECK13: cond.true12: 8352 // CHECK13-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 8353 // CHECK13-NEXT: br label [[COND_END14:%.*]] 8354 // CHECK13: cond.false13: 8355 // CHECK13-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8356 // CHECK13-NEXT: br label [[COND_END14]] 8357 // CHECK13: cond.end14: 8358 // CHECK13-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE12]] ], [ [[TMP32]], [[COND_FALSE13]] ] 8359 // CHECK13-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4 8360 // CHECK13-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8361 // CHECK13-NEXT: store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4 8362 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 8363 // CHECK13: omp.inner.for.end: 8364 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8365 // CHECK13: omp.loop.exit: 8366 // CHECK13-NEXT: [[TMP34:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8367 // CHECK13-NEXT: [[TMP35:%.*]] = load i32, i32* [[TMP34]], align 4 8368 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP35]]) 8369 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 8370 // CHECK13: omp.precond.end: 8371 // CHECK13-NEXT: ret void 8372 // 8373 // 8374 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..6 8375 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 8376 // CHECK13-NEXT: entry: 8377 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8378 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8379 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 8380 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 8381 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 8382 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 8383 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 8384 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 8385 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8386 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 8387 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8388 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 8389 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 8390 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8391 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8392 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8393 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8394 // CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 4 8395 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8396 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8397 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8398 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8399 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 8400 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 8401 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 8402 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 8403 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 8404 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 8405 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 8406 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 8407 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 8408 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 8409 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8410 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 8411 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8412 // CHECK13-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 8413 // CHECK13-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 8414 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 8415 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8416 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 8417 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8418 // CHECK13: omp.precond.then: 8419 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 8420 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 8421 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 8422 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8423 // CHECK13-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32 8424 // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8425 // CHECK13-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32 8426 // CHECK13-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 8427 // CHECK13-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 8428 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8429 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8430 // CHECK13-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8431 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 8432 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8433 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8434 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 8435 // CHECK13-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 8436 // CHECK13-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8437 // CHECK13: cond.true: 8438 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 8439 // CHECK13-NEXT: br label [[COND_END:%.*]] 8440 // CHECK13: cond.false: 8441 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8442 // CHECK13-NEXT: br label [[COND_END]] 8443 // CHECK13: cond.end: 8444 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 8445 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 8446 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8447 // CHECK13-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 8448 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8449 // CHECK13: omp.inner.for.cond: 8450 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8451 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8452 // CHECK13-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 8453 // CHECK13-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8454 // CHECK13: omp.inner.for.body: 8455 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8456 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 8457 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8458 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I6]], align 4 8459 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4 8460 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 8461 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 8462 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 8463 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8464 // CHECK13: omp.body.continue: 8465 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8466 // CHECK13: omp.inner.for.inc: 8467 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8468 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1 8469 // CHECK13-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 8470 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 8471 // CHECK13: omp.inner.for.end: 8472 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8473 // CHECK13: omp.loop.exit: 8474 // CHECK13-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8475 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 8476 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 8477 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 8478 // CHECK13: omp.precond.end: 8479 // CHECK13-NEXT: ret void 8480 // 8481 // 8482 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163 8483 // CHECK13-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 8484 // CHECK13-NEXT: entry: 8485 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 8486 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 8487 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 8488 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 8489 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 8490 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 8491 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 8492 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 8493 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 8494 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 8495 // CHECK13-NEXT: ret void 8496 // 8497 // 8498 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..8 8499 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 8500 // CHECK13-NEXT: entry: 8501 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8502 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8503 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 8504 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 8505 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 8506 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8507 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 8508 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 8509 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8510 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 8511 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8512 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8513 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8514 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8515 // CHECK13-NEXT: [[I3:%.*]] = alloca i32, align 4 8516 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8517 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8518 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 8519 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 8520 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 8521 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 8522 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 8523 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 8524 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 8525 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 8526 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8527 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 8528 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8529 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 8530 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 8531 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 8532 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8533 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 8534 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8535 // CHECK13: omp.precond.then: 8536 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 8537 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8538 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 8539 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8540 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8541 // CHECK13-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8542 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 8543 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8544 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8545 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8546 // CHECK13-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 8547 // CHECK13-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8548 // CHECK13: cond.true: 8549 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8550 // CHECK13-NEXT: br label [[COND_END:%.*]] 8551 // CHECK13: cond.false: 8552 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8553 // CHECK13-NEXT: br label [[COND_END]] 8554 // CHECK13: cond.end: 8555 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 8556 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 8557 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8558 // CHECK13-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 8559 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8560 // CHECK13: omp.inner.for.cond: 8561 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8562 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8563 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 8564 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8565 // CHECK13: omp.inner.for.body: 8566 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8567 // CHECK13-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 8568 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8569 // CHECK13-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 8570 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 8571 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8572 // CHECK13: omp.inner.for.inc: 8573 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8574 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8575 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 8576 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 8577 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 8578 // CHECK13: omp.inner.for.end: 8579 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8580 // CHECK13: omp.loop.exit: 8581 // CHECK13-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8582 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 8583 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 8584 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 8585 // CHECK13: omp.precond.end: 8586 // CHECK13-NEXT: ret void 8587 // 8588 // 8589 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..9 8590 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 8591 // CHECK13-NEXT: entry: 8592 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8593 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8594 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 8595 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 8596 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 8597 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 8598 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 8599 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8600 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 8601 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 8602 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8603 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 8604 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8605 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8606 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8607 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8608 // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4 8609 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8610 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8611 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8612 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8613 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 8614 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 8615 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 8616 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 8617 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 8618 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 8619 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 8620 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 8621 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8622 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 8623 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8624 // CHECK13-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 8625 // CHECK13-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 8626 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 8627 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8628 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 8629 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8630 // CHECK13: omp.precond.then: 8631 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 8632 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8633 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 8634 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8635 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 8636 // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8637 // CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 8638 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 8639 // CHECK13-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 8640 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8641 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8642 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8643 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8644 // CHECK13-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8645 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 8646 // CHECK13-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1) 8647 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 8648 // CHECK13: omp.dispatch.cond: 8649 // CHECK13-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8650 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 8651 // CHECK13-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 8652 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 8653 // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 8654 // CHECK13: omp.dispatch.body: 8655 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8656 // CHECK13-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 8657 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8658 // CHECK13: omp.inner.for.cond: 8659 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 8660 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14 8661 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 8662 // CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8663 // CHECK13: omp.inner.for.body: 8664 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 8665 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 8666 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8667 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !14 8668 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !14 8669 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64 8670 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 8671 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !14 8672 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8673 // CHECK13: omp.body.continue: 8674 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8675 // CHECK13: omp.inner.for.inc: 8676 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 8677 // CHECK13-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1 8678 // CHECK13-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 8679 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] 8680 // CHECK13: omp.inner.for.end: 8681 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 8682 // CHECK13: omp.dispatch.inc: 8683 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]] 8684 // CHECK13: omp.dispatch.end: 8685 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 8686 // CHECK13: omp.precond.end: 8687 // CHECK13-NEXT: ret void 8688 // 8689 // 8690 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168 8691 // CHECK13-SAME: (i64 [[M:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 8692 // CHECK13-NEXT: entry: 8693 // CHECK13-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 8694 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 8695 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 8696 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 8697 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 8698 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 8699 // CHECK13-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 8700 // CHECK13-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 8701 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 8702 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 8703 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* 8704 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 8705 // CHECK13-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 8706 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 8707 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8 8708 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 8709 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 8710 // CHECK13-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 8711 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4 8712 // CHECK13-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 8713 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]]) 8714 // CHECK13-NEXT: ret void 8715 // 8716 // 8717 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..11 8718 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 8719 // CHECK13-NEXT: entry: 8720 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8721 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8722 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 8723 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 8724 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 8725 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 8726 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8727 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 8728 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8729 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 8730 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 8731 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 8732 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 8733 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8734 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8735 // CHECK13-NEXT: [[I4:%.*]] = alloca i32, align 4 8736 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 8737 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8738 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8739 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 8740 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 8741 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 8742 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 8743 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 8744 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 8745 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 8746 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 8747 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 8748 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 8749 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8750 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 8751 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8752 // CHECK13-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 8753 // CHECK13-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 8754 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 8755 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8756 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 8757 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8758 // CHECK13: omp.precond.then: 8759 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 8760 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 8761 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 8762 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8763 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8764 // CHECK13-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8765 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 8766 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 8767 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8768 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 8769 // CHECK13-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 8770 // CHECK13-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 8771 // CHECK13: cond.true: 8772 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 8773 // CHECK13-NEXT: br label [[COND_END:%.*]] 8774 // CHECK13: cond.false: 8775 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8776 // CHECK13-NEXT: br label [[COND_END]] 8777 // CHECK13: cond.end: 8778 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 8779 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 8780 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8781 // CHECK13-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 8782 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8783 // CHECK13: omp.inner.for.cond: 8784 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8785 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8786 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 8787 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8788 // CHECK13: omp.inner.for.body: 8789 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 8790 // CHECK13-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 8791 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 8792 // CHECK13-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 8793 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV]], align 8 8794 // CHECK13-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 8795 // CHECK13-NEXT: store i32 [[TMP20]], i32* [[CONV7]], align 4 8796 // CHECK13-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 8797 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP21]]) 8798 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8799 // CHECK13: omp.inner.for.inc: 8800 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 8801 // CHECK13-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 8802 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 8803 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 8804 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 8805 // CHECK13: omp.inner.for.end: 8806 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 8807 // CHECK13: omp.loop.exit: 8808 // CHECK13-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8809 // CHECK13-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 8810 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) 8811 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 8812 // CHECK13: omp.precond.end: 8813 // CHECK13-NEXT: ret void 8814 // 8815 // 8816 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..12 8817 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 8818 // CHECK13-NEXT: entry: 8819 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 8820 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 8821 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 8822 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 8823 // CHECK13-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 8824 // CHECK13-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 8825 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 8826 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 8827 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 8828 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 8829 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 8830 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 8831 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 8832 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 8833 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 8834 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 8835 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 8836 // CHECK13-NEXT: [[I6:%.*]] = alloca i32, align 4 8837 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 8838 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 8839 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8840 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8841 // CHECK13-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 8842 // CHECK13-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 8843 // CHECK13-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 8844 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 8845 // CHECK13-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 8846 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 8847 // CHECK13-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 8848 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 8849 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 8850 // CHECK13-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 8851 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8852 // CHECK13-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 8853 // CHECK13-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 8854 // CHECK13-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 8855 // CHECK13-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 8856 // CHECK13-NEXT: store i32 0, i32* [[I]], align 4 8857 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 8858 // CHECK13-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 8859 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 8860 // CHECK13: omp.precond.then: 8861 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 8862 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 8863 // CHECK13-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 8864 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 8865 // CHECK13-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32 8866 // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 8867 // CHECK13-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32 8868 // CHECK13-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 8869 // CHECK13-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 8870 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 8871 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 8872 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 8 8873 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8874 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 8875 // CHECK13-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8876 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 8877 // CHECK13-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 1073741859, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]]) 8878 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 8879 // CHECK13: omp.dispatch.cond: 8880 // CHECK13-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 8881 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 8882 // CHECK13-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 8883 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 8884 // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 8885 // CHECK13: omp.dispatch.body: 8886 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 8887 // CHECK13-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 8888 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 8889 // CHECK13: omp.inner.for.cond: 8890 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 8891 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !17 8892 // CHECK13-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 8893 // CHECK13-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 8894 // CHECK13: omp.inner.for.body: 8895 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 8896 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 8897 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 8898 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !17 8899 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !17 8900 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 8901 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 8902 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !17 8903 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 8904 // CHECK13: omp.body.continue: 8905 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 8906 // CHECK13: omp.inner.for.inc: 8907 // CHECK13-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 8908 // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], 1 8909 // CHECK13-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 8910 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]] 8911 // CHECK13: omp.inner.for.end: 8912 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 8913 // CHECK13: omp.dispatch.inc: 8914 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]] 8915 // CHECK13: omp.dispatch.end: 8916 // CHECK13-NEXT: br label [[OMP_PRECOND_END]] 8917 // CHECK13: omp.precond.end: 8918 // CHECK13-NEXT: ret void 8919 // 8920 // 8921 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 8922 // CHECK13-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat { 8923 // CHECK13-NEXT: entry: 8924 // CHECK13-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 8925 // CHECK13-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 8926 // CHECK13-NEXT: [[M:%.*]] = alloca i32, align 4 8927 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 8928 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 8929 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 8930 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 8931 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8 8932 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8 8933 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8 8934 // CHECK13-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 8935 // CHECK13-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 8936 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 8 8937 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 8 8938 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 8 8939 // CHECK13-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 8940 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 8 8941 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 8 8942 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 8 8943 // CHECK13-NEXT: [[_TMP16:%.*]] = alloca i32, align 4 8944 // CHECK13-NEXT: [[M_CASTED19:%.*]] = alloca i64, align 8 8945 // CHECK13-NEXT: [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [2 x i8*], align 8 8946 // CHECK13-NEXT: [[DOTOFFLOAD_PTRS22:%.*]] = alloca [2 x i8*], align 8 8947 // CHECK13-NEXT: [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [2 x i8*], align 8 8948 // CHECK13-NEXT: [[_TMP24:%.*]] = alloca i32, align 4 8949 // CHECK13-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 8950 // CHECK13-NEXT: store i32 10, i32* [[M]], align 4 8951 // CHECK13-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 8952 // CHECK13-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 8953 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8 8954 // CHECK13-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 8955 // CHECK13-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 8956 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8 8957 // CHECK13-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 8958 // CHECK13-NEXT: store i8* null, i8** [[TMP4]], align 8 8959 // CHECK13-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 8960 // CHECK13-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 8961 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 8962 // CHECK13-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 8963 // CHECK13-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 8964 // CHECK13-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 8965 // CHECK13: omp_offload.failed: 8966 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]] 8967 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT]] 8968 // CHECK13: omp_offload.cont: 8969 // CHECK13-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 8970 // CHECK13-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** 8971 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8 8972 // CHECK13-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 8973 // CHECK13-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** 8974 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8 8975 // CHECK13-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0 8976 // CHECK13-NEXT: store i8* null, i8** [[TMP13]], align 8 8977 // CHECK13-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 8978 // CHECK13-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 8979 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 8980 // CHECK13-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 8981 // CHECK13-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 8982 // CHECK13-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 8983 // CHECK13: omp_offload.failed5: 8984 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121([10 x i32]* [[A]]) #[[ATTR3]] 8985 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT6]] 8986 // CHECK13: omp_offload.cont6: 8987 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[M]], align 4 8988 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[M_CASTED]] to i32* 8989 // CHECK13-NEXT: store i32 [[TMP18]], i32* [[CONV]], align 4 8990 // CHECK13-NEXT: [[TMP19:%.*]] = load i64, i64* [[M_CASTED]], align 8 8991 // CHECK13-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 8992 // CHECK13-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64* 8993 // CHECK13-NEXT: store i64 [[TMP19]], i64* [[TMP21]], align 8 8994 // CHECK13-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 8995 // CHECK13-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64* 8996 // CHECK13-NEXT: store i64 [[TMP19]], i64* [[TMP23]], align 8 8997 // CHECK13-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0 8998 // CHECK13-NEXT: store i8* null, i8** [[TMP24]], align 8 8999 // CHECK13-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1 9000 // CHECK13-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]** 9001 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 8 9002 // CHECK13-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1 9003 // CHECK13-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]** 9004 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 8 9005 // CHECK13-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 1 9006 // CHECK13-NEXT: store i8* null, i8** [[TMP29]], align 8 9007 // CHECK13-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 9008 // CHECK13-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 9009 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 9010 // CHECK13-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 9011 // CHECK13-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 9012 // CHECK13-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] 9013 // CHECK13: omp_offload.failed11: 9014 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i64 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]] 9015 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT12]] 9016 // CHECK13: omp_offload.cont12: 9017 // CHECK13-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 9018 // CHECK13-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]** 9019 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 8 9020 // CHECK13-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 9021 // CHECK13-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]** 9022 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 8 9023 // CHECK13-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i64 0, i64 0 9024 // CHECK13-NEXT: store i8* null, i8** [[TMP38]], align 8 9025 // CHECK13-NEXT: [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 9026 // CHECK13-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 9027 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 9028 // CHECK13-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 9029 // CHECK13-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0 9030 // CHECK13-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]] 9031 // CHECK13: omp_offload.failed17: 9032 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131([10 x i32]* [[A]]) #[[ATTR3]] 9033 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT18]] 9034 // CHECK13: omp_offload.cont18: 9035 // CHECK13-NEXT: [[TMP43:%.*]] = load i32, i32* [[M]], align 4 9036 // CHECK13-NEXT: [[CONV20:%.*]] = bitcast i64* [[M_CASTED19]] to i32* 9037 // CHECK13-NEXT: store i32 [[TMP43]], i32* [[CONV20]], align 4 9038 // CHECK13-NEXT: [[TMP44:%.*]] = load i64, i64* [[M_CASTED19]], align 8 9039 // CHECK13-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 9040 // CHECK13-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64* 9041 // CHECK13-NEXT: store i64 [[TMP44]], i64* [[TMP46]], align 8 9042 // CHECK13-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 9043 // CHECK13-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64* 9044 // CHECK13-NEXT: store i64 [[TMP44]], i64* [[TMP48]], align 8 9045 // CHECK13-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0 9046 // CHECK13-NEXT: store i8* null, i8** [[TMP49]], align 8 9047 // CHECK13-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1 9048 // CHECK13-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]** 9049 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 8 9050 // CHECK13-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1 9051 // CHECK13-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]** 9052 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 8 9053 // CHECK13-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1 9054 // CHECK13-NEXT: store i8* null, i8** [[TMP54]], align 8 9055 // CHECK13-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 9056 // CHECK13-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 9057 // CHECK13-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 9058 // CHECK13-NEXT: [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 9059 // CHECK13-NEXT: [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0 9060 // CHECK13-NEXT: br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED25:%.*]], label [[OMP_OFFLOAD_CONT26:%.*]] 9061 // CHECK13: omp_offload.failed25: 9062 // CHECK13-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i64 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]] 9063 // CHECK13-NEXT: br label [[OMP_OFFLOAD_CONT26]] 9064 // CHECK13: omp_offload.cont26: 9065 // CHECK13-NEXT: ret i32 0 9066 // 9067 // 9068 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116 9069 // CHECK13-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 9070 // CHECK13-NEXT: entry: 9071 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 9072 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 9073 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 9074 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 9075 // CHECK13-NEXT: ret void 9076 // 9077 // 9078 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..14 9079 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 9080 // CHECK13-NEXT: entry: 9081 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9082 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9083 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 9084 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9085 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 9086 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9087 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9088 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9089 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9090 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 9091 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9092 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9093 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 9094 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 9095 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 9096 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 9097 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9098 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9099 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9100 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 9101 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9102 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9103 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 9104 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9105 // CHECK13: cond.true: 9106 // CHECK13-NEXT: br label [[COND_END:%.*]] 9107 // CHECK13: cond.false: 9108 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9109 // CHECK13-NEXT: br label [[COND_END]] 9110 // CHECK13: cond.end: 9111 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 9112 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 9113 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9114 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 9115 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9116 // CHECK13: omp.inner.for.cond: 9117 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9118 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9119 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 9120 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9121 // CHECK13: omp.inner.for.body: 9122 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9123 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 9124 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9125 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 9126 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]) 9127 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9128 // CHECK13: omp.inner.for.inc: 9129 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9130 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9131 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 9132 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 9133 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 9134 // CHECK13: omp.inner.for.end: 9135 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9136 // CHECK13: omp.loop.exit: 9137 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 9138 // CHECK13-NEXT: ret void 9139 // 9140 // 9141 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..15 9142 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 9143 // CHECK13-NEXT: entry: 9144 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9145 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9146 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 9147 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 9148 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 9149 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9150 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 9151 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9152 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9153 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9154 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9155 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 9156 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9157 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9158 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9159 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9160 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 9161 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 9162 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 9163 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 9164 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9165 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 9166 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9167 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 9168 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 9169 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 9170 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9171 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9172 // CHECK13-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9173 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 9174 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9175 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9176 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 9177 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9178 // CHECK13: cond.true: 9179 // CHECK13-NEXT: br label [[COND_END:%.*]] 9180 // CHECK13: cond.false: 9181 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9182 // CHECK13-NEXT: br label [[COND_END]] 9183 // CHECK13: cond.end: 9184 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 9185 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 9186 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9187 // CHECK13-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 9188 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9189 // CHECK13: omp.inner.for.cond: 9190 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9191 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9192 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 9193 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9194 // CHECK13: omp.inner.for.body: 9195 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9196 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 9197 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9198 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4 9199 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 9200 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 9201 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 9202 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 9203 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9204 // CHECK13: omp.body.continue: 9205 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9206 // CHECK13: omp.inner.for.inc: 9207 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9208 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 9209 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 9210 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 9211 // CHECK13: omp.inner.for.end: 9212 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9213 // CHECK13: omp.loop.exit: 9214 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 9215 // CHECK13-NEXT: ret void 9216 // 9217 // 9218 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121 9219 // CHECK13-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 9220 // CHECK13-NEXT: entry: 9221 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 9222 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 9223 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 9224 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 9225 // CHECK13-NEXT: ret void 9226 // 9227 // 9228 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..17 9229 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 9230 // CHECK13-NEXT: entry: 9231 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9232 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9233 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 9234 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9235 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 9236 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9237 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9238 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9239 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9240 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 9241 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9242 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9243 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 9244 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 9245 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 9246 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 9247 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9248 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9249 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9250 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 9251 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9252 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9253 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 9254 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9255 // CHECK13: cond.true: 9256 // CHECK13-NEXT: br label [[COND_END:%.*]] 9257 // CHECK13: cond.false: 9258 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9259 // CHECK13-NEXT: br label [[COND_END]] 9260 // CHECK13: cond.end: 9261 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 9262 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 9263 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9264 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 9265 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9266 // CHECK13: omp.inner.for.cond: 9267 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9268 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9269 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 9270 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9271 // CHECK13: omp.inner.for.body: 9272 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9273 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 9274 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9275 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 9276 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]) 9277 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9278 // CHECK13: omp.inner.for.inc: 9279 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9280 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9281 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 9282 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 9283 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 9284 // CHECK13: omp.inner.for.end: 9285 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9286 // CHECK13: omp.loop.exit: 9287 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 9288 // CHECK13-NEXT: ret void 9289 // 9290 // 9291 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..18 9292 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 9293 // CHECK13-NEXT: entry: 9294 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9295 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9296 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 9297 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 9298 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 9299 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9300 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 9301 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9302 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9303 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9304 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9305 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 9306 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9307 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9308 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9309 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9310 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 9311 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 9312 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 9313 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 9314 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9315 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 9316 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9317 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 9318 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 9319 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 9320 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9321 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9322 // CHECK13-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9323 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 9324 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9325 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9326 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 9327 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9328 // CHECK13: cond.true: 9329 // CHECK13-NEXT: br label [[COND_END:%.*]] 9330 // CHECK13: cond.false: 9331 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9332 // CHECK13-NEXT: br label [[COND_END]] 9333 // CHECK13: cond.end: 9334 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 9335 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 9336 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9337 // CHECK13-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 9338 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9339 // CHECK13: omp.inner.for.cond: 9340 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9341 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9342 // CHECK13-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 9343 // CHECK13-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9344 // CHECK13: omp.inner.for.body: 9345 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9346 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 9347 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9348 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4 9349 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 9350 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 9351 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 9352 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 9353 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9354 // CHECK13: omp.body.continue: 9355 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9356 // CHECK13: omp.inner.for.inc: 9357 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9358 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 9359 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 9360 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 9361 // CHECK13: omp.inner.for.end: 9362 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9363 // CHECK13: omp.loop.exit: 9364 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 9365 // CHECK13-NEXT: ret void 9366 // 9367 // 9368 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126 9369 // CHECK13-SAME: (i64 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 9370 // CHECK13-NEXT: entry: 9371 // CHECK13-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 9372 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 9373 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 9374 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 9375 // CHECK13-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 9376 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 9377 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* 9378 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 9379 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8 9380 // CHECK13-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 9381 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9382 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 9383 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 9384 // CHECK13-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 9385 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]]) 9386 // CHECK13-NEXT: ret void 9387 // 9388 // 9389 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..21 9390 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 9391 // CHECK13-NEXT: entry: 9392 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9393 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9394 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 9395 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 9396 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9397 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 9398 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9399 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9400 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9401 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9402 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 9403 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 9404 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9405 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9406 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 9407 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 9408 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 9409 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 9410 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 9411 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 9412 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9413 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9414 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9415 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 9416 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9417 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9418 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 9419 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9420 // CHECK13: cond.true: 9421 // CHECK13-NEXT: br label [[COND_END:%.*]] 9422 // CHECK13: cond.false: 9423 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9424 // CHECK13-NEXT: br label [[COND_END]] 9425 // CHECK13: cond.end: 9426 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 9427 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 9428 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9429 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 9430 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9431 // CHECK13: omp.inner.for.cond: 9432 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9433 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9434 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 9435 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9436 // CHECK13: omp.inner.for.body: 9437 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9438 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 9439 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9440 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 9441 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8 9442 // CHECK13-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 9443 // CHECK13-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4 9444 // CHECK13-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 9445 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]]) 9446 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9447 // CHECK13: omp.inner.for.inc: 9448 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9449 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9450 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 9451 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 9452 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 9453 // CHECK13: omp.inner.for.end: 9454 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9455 // CHECK13: omp.loop.exit: 9456 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 9457 // CHECK13-NEXT: ret void 9458 // 9459 // 9460 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..22 9461 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 9462 // CHECK13-NEXT: entry: 9463 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9464 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9465 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 9466 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 9467 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 9468 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 9469 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9470 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 9471 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9472 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9473 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9474 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9475 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 9476 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9477 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9478 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9479 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9480 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 9481 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 9482 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 9483 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 9484 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 9485 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 9486 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9487 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 9488 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9489 // CHECK13-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 9490 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4 9491 // CHECK13-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 9492 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9493 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9494 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8 9495 // CHECK13-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9496 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 9497 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]]) 9498 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 9499 // CHECK13: omp.dispatch.cond: 9500 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9501 // CHECK13-NEXT: [[CONV3:%.*]] = sext i32 [[TMP6]] to i64 9502 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9503 // CHECK13-NEXT: [[CMP:%.*]] = icmp ugt i64 [[CONV3]], [[TMP7]] 9504 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9505 // CHECK13: cond.true: 9506 // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9507 // CHECK13-NEXT: br label [[COND_END:%.*]] 9508 // CHECK13: cond.false: 9509 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9510 // CHECK13-NEXT: [[CONV4:%.*]] = sext i32 [[TMP9]] to i64 9511 // CHECK13-NEXT: br label [[COND_END]] 9512 // CHECK13: cond.end: 9513 // CHECK13-NEXT: [[COND:%.*]] = phi i64 [ [[TMP8]], [[COND_TRUE]] ], [ [[CONV4]], [[COND_FALSE]] ] 9514 // CHECK13-NEXT: [[CONV5:%.*]] = trunc i64 [[COND]] to i32 9515 // CHECK13-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 9516 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9517 // CHECK13-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 9518 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9519 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9520 // CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 9521 // CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 9522 // CHECK13: omp.dispatch.body: 9523 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9524 // CHECK13: omp.inner.for.cond: 9525 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9526 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9527 // CHECK13-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 9528 // CHECK13-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9529 // CHECK13: omp.inner.for.body: 9530 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9531 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 9532 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9533 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4 9534 // CHECK13-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4 9535 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 9536 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 9537 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 9538 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9539 // CHECK13: omp.body.continue: 9540 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9541 // CHECK13: omp.inner.for.inc: 9542 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9543 // CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], 1 9544 // CHECK13-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 9545 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 9546 // CHECK13: omp.inner.for.end: 9547 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 9548 // CHECK13: omp.dispatch.inc: 9549 // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9550 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9551 // CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 9552 // CHECK13-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4 9553 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9554 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9555 // CHECK13-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 9556 // CHECK13-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4 9557 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]] 9558 // CHECK13: omp.dispatch.end: 9559 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 9560 // CHECK13-NEXT: ret void 9561 // 9562 // 9563 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131 9564 // CHECK13-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 9565 // CHECK13-NEXT: entry: 9566 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 9567 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 9568 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 9569 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 9570 // CHECK13-NEXT: ret void 9571 // 9572 // 9573 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..25 9574 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 9575 // CHECK13-NEXT: entry: 9576 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9577 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9578 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 9579 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9580 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 9581 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9582 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9583 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9584 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9585 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 9586 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9587 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9588 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 9589 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 9590 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 9591 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 9592 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9593 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9594 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9595 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 9596 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9597 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9598 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 9599 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9600 // CHECK13: cond.true: 9601 // CHECK13-NEXT: br label [[COND_END:%.*]] 9602 // CHECK13: cond.false: 9603 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9604 // CHECK13-NEXT: br label [[COND_END]] 9605 // CHECK13: cond.end: 9606 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 9607 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 9608 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9609 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 9610 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9611 // CHECK13: omp.inner.for.cond: 9612 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9613 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9614 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 9615 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9616 // CHECK13: omp.inner.for.body: 9617 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9618 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 9619 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9620 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 9621 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]) 9622 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9623 // CHECK13: omp.inner.for.inc: 9624 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9625 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9626 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 9627 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 9628 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 9629 // CHECK13: omp.inner.for.end: 9630 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9631 // CHECK13: omp.loop.exit: 9632 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 9633 // CHECK13-NEXT: ret void 9634 // 9635 // 9636 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..26 9637 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 9638 // CHECK13-NEXT: entry: 9639 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9640 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9641 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 9642 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 9643 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 9644 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9645 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 9646 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9647 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9648 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9649 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9650 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 9651 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9652 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9653 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9654 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9655 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 9656 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 9657 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 9658 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 9659 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9660 // CHECK13-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 9661 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9662 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 9663 // CHECK13-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 9664 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 9665 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9666 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9667 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9668 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9669 // CHECK13-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9670 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 9671 // CHECK13-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 9672 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 9673 // CHECK13: omp.dispatch.cond: 9674 // CHECK13-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 9675 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 9676 // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 9677 // CHECK13: omp.dispatch.body: 9678 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9679 // CHECK13-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 9680 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9681 // CHECK13: omp.inner.for.cond: 9682 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 9683 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !20 9684 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 9685 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9686 // CHECK13: omp.inner.for.body: 9687 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 9688 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 9689 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9690 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !20 9691 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !20 9692 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 9693 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 9694 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !20 9695 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9696 // CHECK13: omp.body.continue: 9697 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9698 // CHECK13: omp.inner.for.inc: 9699 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 9700 // CHECK13-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 9701 // CHECK13-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 9702 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]] 9703 // CHECK13: omp.inner.for.end: 9704 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 9705 // CHECK13: omp.dispatch.inc: 9706 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]] 9707 // CHECK13: omp.dispatch.end: 9708 // CHECK13-NEXT: ret void 9709 // 9710 // 9711 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136 9712 // CHECK13-SAME: (i64 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 9713 // CHECK13-NEXT: entry: 9714 // CHECK13-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 9715 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 9716 // CHECK13-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 9717 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 9718 // CHECK13-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 9719 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 9720 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* 9721 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 9722 // CHECK13-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8 9723 // CHECK13-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 9724 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9725 // CHECK13-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 9726 // CHECK13-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 9727 // CHECK13-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 9728 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]]) 9729 // CHECK13-NEXT: ret void 9730 // 9731 // 9732 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..29 9733 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 9734 // CHECK13-NEXT: entry: 9735 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9736 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9737 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 9738 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 9739 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9740 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 9741 // CHECK13-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 9742 // CHECK13-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 9743 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9744 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9745 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 9746 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 9747 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9748 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9749 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 9750 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 9751 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 9752 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 9753 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 9754 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 9755 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9756 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9757 // CHECK13-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9758 // CHECK13-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 9759 // CHECK13-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 9760 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9761 // CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 9762 // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 9763 // CHECK13: cond.true: 9764 // CHECK13-NEXT: br label [[COND_END:%.*]] 9765 // CHECK13: cond.false: 9766 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9767 // CHECK13-NEXT: br label [[COND_END]] 9768 // CHECK13: cond.end: 9769 // CHECK13-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 9770 // CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 9771 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9772 // CHECK13-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 9773 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9774 // CHECK13: omp.inner.for.cond: 9775 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9776 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9777 // CHECK13-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 9778 // CHECK13-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9779 // CHECK13: omp.inner.for.body: 9780 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 9781 // CHECK13-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 9782 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 9783 // CHECK13-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 9784 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8 9785 // CHECK13-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 9786 // CHECK13-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4 9787 // CHECK13-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 9788 // CHECK13-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]]) 9789 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9790 // CHECK13: omp.inner.for.inc: 9791 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 9792 // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 9793 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 9794 // CHECK13-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 9795 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] 9796 // CHECK13: omp.inner.for.end: 9797 // CHECK13-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 9798 // CHECK13: omp.loop.exit: 9799 // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 9800 // CHECK13-NEXT: ret void 9801 // 9802 // 9803 // CHECK13-LABEL: define {{[^@]+}}@.omp_outlined..30 9804 // CHECK13-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 9805 // CHECK13-NEXT: entry: 9806 // CHECK13-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 9807 // CHECK13-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 9808 // CHECK13-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 9809 // CHECK13-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 9810 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 9811 // CHECK13-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 9812 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 9813 // CHECK13-NEXT: [[TMP:%.*]] = alloca i32, align 4 9814 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 9815 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 9816 // CHECK13-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 9817 // CHECK13-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 9818 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4 9819 // CHECK13-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 9820 // CHECK13-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 9821 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9822 // CHECK13-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9823 // CHECK13-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 9824 // CHECK13-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 9825 // CHECK13-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 9826 // CHECK13-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 9827 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 9828 // CHECK13-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 9829 // CHECK13-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 9830 // CHECK13-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 9831 // CHECK13-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 9832 // CHECK13-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 9833 // CHECK13-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4 9834 // CHECK13-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 9835 // CHECK13-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 9836 // CHECK13-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 9837 // CHECK13-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8 9838 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9839 // CHECK13-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 9840 // CHECK13-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 9841 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 9842 // CHECK13-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]]) 9843 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 9844 // CHECK13: omp.dispatch.cond: 9845 // CHECK13-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 9846 // CHECK13-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0 9847 // CHECK13-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 9848 // CHECK13: omp.dispatch.body: 9849 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 9850 // CHECK13-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 9851 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 9852 // CHECK13: omp.inner.for.cond: 9853 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 9854 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !23 9855 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 9856 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 9857 // CHECK13: omp.inner.for.body: 9858 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 9859 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 9860 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 9861 // CHECK13-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !23 9862 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !23 9863 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 9864 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 9865 // CHECK13-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !23 9866 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 9867 // CHECK13: omp.body.continue: 9868 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 9869 // CHECK13: omp.inner.for.inc: 9870 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 9871 // CHECK13-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1 9872 // CHECK13-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 9873 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]] 9874 // CHECK13: omp.inner.for.end: 9875 // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 9876 // CHECK13: omp.dispatch.inc: 9877 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]] 9878 // CHECK13: omp.dispatch.end: 9879 // CHECK13-NEXT: ret void 9880 // 9881 // 9882 // CHECK13-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 9883 // CHECK13-SAME: () #[[ATTR5:[0-9]+]] { 9884 // CHECK13-NEXT: entry: 9885 // CHECK13-NEXT: call void @__tgt_register_requires(i64 1) 9886 // CHECK13-NEXT: ret void 9887 // 9888 // 9889 // CHECK14-LABEL: define {{[^@]+}}@main 9890 // CHECK14-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 9891 // CHECK14-NEXT: entry: 9892 // CHECK14-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 9893 // CHECK14-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 9894 // CHECK14-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 9895 // CHECK14-NEXT: [[N:%.*]] = alloca i32, align 4 9896 // CHECK14-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 9897 // CHECK14-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 9898 // CHECK14-NEXT: [[M:%.*]] = alloca i32, align 4 9899 // CHECK14-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 9900 // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 9901 // CHECK14-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 9902 // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 9903 // CHECK14-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 9904 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 9905 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 9906 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 9907 // CHECK14-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8 9908 // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8 9909 // CHECK14-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8 9910 // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8 9911 // CHECK14-NEXT: [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8 9912 // CHECK14-NEXT: [[_TMP9:%.*]] = alloca i32, align 4 9913 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 9914 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4 9915 // CHECK14-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 9916 // CHECK14-NEXT: [[N_CASTED19:%.*]] = alloca i64, align 8 9917 // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [4 x i8*], align 8 9918 // CHECK14-NEXT: [[DOTOFFLOAD_PTRS22:%.*]] = alloca [4 x i8*], align 8 9919 // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [4 x i8*], align 8 9920 // CHECK14-NEXT: [[DOTOFFLOAD_SIZES24:%.*]] = alloca [4 x i64], align 8 9921 // CHECK14-NEXT: [[_TMP25:%.*]] = alloca i32, align 4 9922 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4 9923 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4 9924 // CHECK14-NEXT: [[N_CASTED34:%.*]] = alloca i64, align 8 9925 // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS36:%.*]] = alloca [3 x i8*], align 8 9926 // CHECK14-NEXT: [[DOTOFFLOAD_PTRS37:%.*]] = alloca [3 x i8*], align 8 9927 // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS38:%.*]] = alloca [3 x i8*], align 8 9928 // CHECK14-NEXT: [[DOTOFFLOAD_SIZES39:%.*]] = alloca [3 x i64], align 8 9929 // CHECK14-NEXT: [[_TMP40:%.*]] = alloca i32, align 4 9930 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4 9931 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4 9932 // CHECK14-NEXT: [[M_CASTED49:%.*]] = alloca i64, align 8 9933 // CHECK14-NEXT: [[N_CASTED51:%.*]] = alloca i64, align 8 9934 // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS53:%.*]] = alloca [4 x i8*], align 8 9935 // CHECK14-NEXT: [[DOTOFFLOAD_PTRS54:%.*]] = alloca [4 x i8*], align 8 9936 // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS55:%.*]] = alloca [4 x i8*], align 8 9937 // CHECK14-NEXT: [[DOTOFFLOAD_SIZES56:%.*]] = alloca [4 x i64], align 8 9938 // CHECK14-NEXT: [[_TMP57:%.*]] = alloca i32, align 4 9939 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4 9940 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_59:%.*]] = alloca i32, align 4 9941 // CHECK14-NEXT: store i32 0, i32* [[RETVAL]], align 4 9942 // CHECK14-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 9943 // CHECK14-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 9944 // CHECK14-NEXT: store i32 100, i32* [[N]], align 4 9945 // CHECK14-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 9946 // CHECK14-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 9947 // CHECK14-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 9948 // CHECK14-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 9949 // CHECK14-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 9950 // CHECK14-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 9951 // CHECK14-NEXT: store i32 10, i32* [[M]], align 4 9952 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 9953 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 9954 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 9955 // CHECK14-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 9956 // CHECK14-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 9957 // CHECK14-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 9958 // CHECK14-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* 9959 // CHECK14-NEXT: store i64 [[TMP4]], i64* [[TMP7]], align 8 9960 // CHECK14-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 9961 // CHECK14-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64* 9962 // CHECK14-NEXT: store i64 [[TMP4]], i64* [[TMP9]], align 8 9963 // CHECK14-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 9964 // CHECK14-NEXT: store i64 4, i64* [[TMP10]], align 8 9965 // CHECK14-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 9966 // CHECK14-NEXT: store i8* null, i8** [[TMP11]], align 8 9967 // CHECK14-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 9968 // CHECK14-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 9969 // CHECK14-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8 9970 // CHECK14-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 9971 // CHECK14-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 9972 // CHECK14-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8 9973 // CHECK14-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 9974 // CHECK14-NEXT: store i64 8, i64* [[TMP16]], align 8 9975 // CHECK14-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 9976 // CHECK14-NEXT: store i8* null, i8** [[TMP17]], align 8 9977 // CHECK14-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 9978 // CHECK14-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32** 9979 // CHECK14-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 8 9980 // CHECK14-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 9981 // CHECK14-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32** 9982 // CHECK14-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 8 9983 // CHECK14-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 9984 // CHECK14-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 8 9985 // CHECK14-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 9986 // CHECK14-NEXT: store i8* null, i8** [[TMP23]], align 8 9987 // CHECK14-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 9988 // CHECK14-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 9989 // CHECK14-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 9990 // CHECK14-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4 9991 // CHECK14-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4 9992 // CHECK14-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 9993 // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0 9994 // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 9995 // CHECK14-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 9996 // CHECK14-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 9997 // CHECK14-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 9998 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1 9999 // CHECK14-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64 10000 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]]) 10001 // CHECK14-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 10002 // CHECK14-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 10003 // CHECK14-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 10004 // CHECK14: omp_offload.failed: 10005 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 10006 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT]] 10007 // CHECK14: omp_offload.cont: 10008 // CHECK14-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4 10009 // CHECK14-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32* 10010 // CHECK14-NEXT: store i32 [[TMP33]], i32* [[CONV4]], align 4 10011 // CHECK14-NEXT: [[TMP34:%.*]] = load i64, i64* [[N_CASTED3]], align 8 10012 // CHECK14-NEXT: [[TMP35:%.*]] = mul nuw i64 [[TMP1]], 4 10013 // CHECK14-NEXT: [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 10014 // CHECK14-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64* 10015 // CHECK14-NEXT: store i64 [[TMP34]], i64* [[TMP37]], align 8 10016 // CHECK14-NEXT: [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 10017 // CHECK14-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64* 10018 // CHECK14-NEXT: store i64 [[TMP34]], i64* [[TMP39]], align 8 10019 // CHECK14-NEXT: [[TMP40:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0 10020 // CHECK14-NEXT: store i64 4, i64* [[TMP40]], align 8 10021 // CHECK14-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0 10022 // CHECK14-NEXT: store i8* null, i8** [[TMP41]], align 8 10023 // CHECK14-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 10024 // CHECK14-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i64* 10025 // CHECK14-NEXT: store i64 [[TMP1]], i64* [[TMP43]], align 8 10026 // CHECK14-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 10027 // CHECK14-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i64* 10028 // CHECK14-NEXT: store i64 [[TMP1]], i64* [[TMP45]], align 8 10029 // CHECK14-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 1 10030 // CHECK14-NEXT: store i64 8, i64* [[TMP46]], align 8 10031 // CHECK14-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1 10032 // CHECK14-NEXT: store i8* null, i8** [[TMP47]], align 8 10033 // CHECK14-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2 10034 // CHECK14-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32** 10035 // CHECK14-NEXT: store i32* [[VLA]], i32** [[TMP49]], align 8 10036 // CHECK14-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2 10037 // CHECK14-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i32** 10038 // CHECK14-NEXT: store i32* [[VLA]], i32** [[TMP51]], align 8 10039 // CHECK14-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2 10040 // CHECK14-NEXT: store i64 [[TMP35]], i64* [[TMP52]], align 8 10041 // CHECK14-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2 10042 // CHECK14-NEXT: store i8* null, i8** [[TMP53]], align 8 10043 // CHECK14-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 10044 // CHECK14-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 10045 // CHECK14-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0 10046 // CHECK14-NEXT: [[TMP57:%.*]] = load i32, i32* [[N]], align 4 10047 // CHECK14-NEXT: store i32 [[TMP57]], i32* [[DOTCAPTURE_EXPR_10]], align 4 10048 // CHECK14-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 10049 // CHECK14-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP58]], 0 10050 // CHECK14-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1 10051 // CHECK14-NEXT: [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1 10052 // CHECK14-NEXT: store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4 10053 // CHECK14-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 10054 // CHECK14-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP59]], 1 10055 // CHECK14-NEXT: [[TMP60:%.*]] = zext i32 [[ADD15]] to i64 10056 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP60]]) 10057 // CHECK14-NEXT: [[TMP61:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, i32 3, i8** [[TMP54]], i8** [[TMP55]], i64* [[TMP56]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 10058 // CHECK14-NEXT: [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0 10059 // CHECK14-NEXT: br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 10060 // CHECK14: omp_offload.failed16: 10061 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i64 [[TMP34]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 10062 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT17]] 10063 // CHECK14: omp_offload.cont17: 10064 // CHECK14-NEXT: [[TMP63:%.*]] = load i32, i32* [[M]], align 4 10065 // CHECK14-NEXT: [[CONV18:%.*]] = bitcast i64* [[M_CASTED]] to i32* 10066 // CHECK14-NEXT: store i32 [[TMP63]], i32* [[CONV18]], align 4 10067 // CHECK14-NEXT: [[TMP64:%.*]] = load i64, i64* [[M_CASTED]], align 8 10068 // CHECK14-NEXT: [[TMP65:%.*]] = load i32, i32* [[N]], align 4 10069 // CHECK14-NEXT: [[CONV20:%.*]] = bitcast i64* [[N_CASTED19]] to i32* 10070 // CHECK14-NEXT: store i32 [[TMP65]], i32* [[CONV20]], align 4 10071 // CHECK14-NEXT: [[TMP66:%.*]] = load i64, i64* [[N_CASTED19]], align 8 10072 // CHECK14-NEXT: [[TMP67:%.*]] = mul nuw i64 [[TMP1]], 4 10073 // CHECK14-NEXT: [[TMP68:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 10074 // CHECK14-NEXT: [[TMP69:%.*]] = bitcast i8** [[TMP68]] to i64* 10075 // CHECK14-NEXT: store i64 [[TMP64]], i64* [[TMP69]], align 8 10076 // CHECK14-NEXT: [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 10077 // CHECK14-NEXT: [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i64* 10078 // CHECK14-NEXT: store i64 [[TMP64]], i64* [[TMP71]], align 8 10079 // CHECK14-NEXT: [[TMP72:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0 10080 // CHECK14-NEXT: store i64 4, i64* [[TMP72]], align 8 10081 // CHECK14-NEXT: [[TMP73:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0 10082 // CHECK14-NEXT: store i8* null, i8** [[TMP73]], align 8 10083 // CHECK14-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1 10084 // CHECK14-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i64* 10085 // CHECK14-NEXT: store i64 [[TMP66]], i64* [[TMP75]], align 8 10086 // CHECK14-NEXT: [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1 10087 // CHECK14-NEXT: [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i64* 10088 // CHECK14-NEXT: store i64 [[TMP66]], i64* [[TMP77]], align 8 10089 // CHECK14-NEXT: [[TMP78:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 1 10090 // CHECK14-NEXT: store i64 4, i64* [[TMP78]], align 8 10091 // CHECK14-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1 10092 // CHECK14-NEXT: store i8* null, i8** [[TMP79]], align 8 10093 // CHECK14-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 2 10094 // CHECK14-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i64* 10095 // CHECK14-NEXT: store i64 [[TMP1]], i64* [[TMP81]], align 8 10096 // CHECK14-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 2 10097 // CHECK14-NEXT: [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i64* 10098 // CHECK14-NEXT: store i64 [[TMP1]], i64* [[TMP83]], align 8 10099 // CHECK14-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 2 10100 // CHECK14-NEXT: store i64 8, i64* [[TMP84]], align 8 10101 // CHECK14-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 2 10102 // CHECK14-NEXT: store i8* null, i8** [[TMP85]], align 8 10103 // CHECK14-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 3 10104 // CHECK14-NEXT: [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i32** 10105 // CHECK14-NEXT: store i32* [[VLA]], i32** [[TMP87]], align 8 10106 // CHECK14-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 3 10107 // CHECK14-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32** 10108 // CHECK14-NEXT: store i32* [[VLA]], i32** [[TMP89]], align 8 10109 // CHECK14-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 3 10110 // CHECK14-NEXT: store i64 [[TMP67]], i64* [[TMP90]], align 8 10111 // CHECK14-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 3 10112 // CHECK14-NEXT: store i8* null, i8** [[TMP91]], align 8 10113 // CHECK14-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 10114 // CHECK14-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 10115 // CHECK14-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0 10116 // CHECK14-NEXT: [[TMP95:%.*]] = load i32, i32* [[N]], align 4 10117 // CHECK14-NEXT: store i32 [[TMP95]], i32* [[DOTCAPTURE_EXPR_26]], align 4 10118 // CHECK14-NEXT: [[TMP96:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 10119 // CHECK14-NEXT: [[SUB28:%.*]] = sub nsw i32 [[TMP96]], 0 10120 // CHECK14-NEXT: [[DIV29:%.*]] = sdiv i32 [[SUB28]], 1 10121 // CHECK14-NEXT: [[SUB30:%.*]] = sub nsw i32 [[DIV29]], 1 10122 // CHECK14-NEXT: store i32 [[SUB30]], i32* [[DOTCAPTURE_EXPR_27]], align 4 10123 // CHECK14-NEXT: [[TMP97:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 10124 // CHECK14-NEXT: [[ADD31:%.*]] = add nsw i32 [[TMP97]], 1 10125 // CHECK14-NEXT: [[TMP98:%.*]] = zext i32 [[ADD31]] to i64 10126 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP98]]) 10127 // CHECK14-NEXT: [[TMP99:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, i32 4, i8** [[TMP92]], i8** [[TMP93]], i64* [[TMP94]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 10128 // CHECK14-NEXT: [[TMP100:%.*]] = icmp ne i32 [[TMP99]], 0 10129 // CHECK14-NEXT: br i1 [[TMP100]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]] 10130 // CHECK14: omp_offload.failed32: 10131 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i64 [[TMP64]], i64 [[TMP66]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 10132 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT33]] 10133 // CHECK14: omp_offload.cont33: 10134 // CHECK14-NEXT: [[TMP101:%.*]] = load i32, i32* [[N]], align 4 10135 // CHECK14-NEXT: [[CONV35:%.*]] = bitcast i64* [[N_CASTED34]] to i32* 10136 // CHECK14-NEXT: store i32 [[TMP101]], i32* [[CONV35]], align 4 10137 // CHECK14-NEXT: [[TMP102:%.*]] = load i64, i64* [[N_CASTED34]], align 8 10138 // CHECK14-NEXT: [[TMP103:%.*]] = mul nuw i64 [[TMP1]], 4 10139 // CHECK14-NEXT: [[TMP104:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0 10140 // CHECK14-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to i64* 10141 // CHECK14-NEXT: store i64 [[TMP102]], i64* [[TMP105]], align 8 10142 // CHECK14-NEXT: [[TMP106:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0 10143 // CHECK14-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to i64* 10144 // CHECK14-NEXT: store i64 [[TMP102]], i64* [[TMP107]], align 8 10145 // CHECK14-NEXT: [[TMP108:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0 10146 // CHECK14-NEXT: store i64 4, i64* [[TMP108]], align 8 10147 // CHECK14-NEXT: [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 0 10148 // CHECK14-NEXT: store i8* null, i8** [[TMP109]], align 8 10149 // CHECK14-NEXT: [[TMP110:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 1 10150 // CHECK14-NEXT: [[TMP111:%.*]] = bitcast i8** [[TMP110]] to i64* 10151 // CHECK14-NEXT: store i64 [[TMP1]], i64* [[TMP111]], align 8 10152 // CHECK14-NEXT: [[TMP112:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 1 10153 // CHECK14-NEXT: [[TMP113:%.*]] = bitcast i8** [[TMP112]] to i64* 10154 // CHECK14-NEXT: store i64 [[TMP1]], i64* [[TMP113]], align 8 10155 // CHECK14-NEXT: [[TMP114:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 1 10156 // CHECK14-NEXT: store i64 8, i64* [[TMP114]], align 8 10157 // CHECK14-NEXT: [[TMP115:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 1 10158 // CHECK14-NEXT: store i8* null, i8** [[TMP115]], align 8 10159 // CHECK14-NEXT: [[TMP116:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 2 10160 // CHECK14-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to i32** 10161 // CHECK14-NEXT: store i32* [[VLA]], i32** [[TMP117]], align 8 10162 // CHECK14-NEXT: [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 2 10163 // CHECK14-NEXT: [[TMP119:%.*]] = bitcast i8** [[TMP118]] to i32** 10164 // CHECK14-NEXT: store i32* [[VLA]], i32** [[TMP119]], align 8 10165 // CHECK14-NEXT: [[TMP120:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 2 10166 // CHECK14-NEXT: store i64 [[TMP103]], i64* [[TMP120]], align 8 10167 // CHECK14-NEXT: [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 2 10168 // CHECK14-NEXT: store i8* null, i8** [[TMP121]], align 8 10169 // CHECK14-NEXT: [[TMP122:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0 10170 // CHECK14-NEXT: [[TMP123:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0 10171 // CHECK14-NEXT: [[TMP124:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0 10172 // CHECK14-NEXT: [[TMP125:%.*]] = load i32, i32* [[N]], align 4 10173 // CHECK14-NEXT: store i32 [[TMP125]], i32* [[DOTCAPTURE_EXPR_41]], align 4 10174 // CHECK14-NEXT: [[TMP126:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4 10175 // CHECK14-NEXT: [[SUB43:%.*]] = sub nsw i32 [[TMP126]], 0 10176 // CHECK14-NEXT: [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1 10177 // CHECK14-NEXT: [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 1 10178 // CHECK14-NEXT: store i32 [[SUB45]], i32* [[DOTCAPTURE_EXPR_42]], align 4 10179 // CHECK14-NEXT: [[TMP127:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_42]], align 4 10180 // CHECK14-NEXT: [[ADD46:%.*]] = add nsw i32 [[TMP127]], 1 10181 // CHECK14-NEXT: [[TMP128:%.*]] = zext i32 [[ADD46]] to i64 10182 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP128]]) 10183 // CHECK14-NEXT: [[TMP129:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, i32 3, i8** [[TMP122]], i8** [[TMP123]], i64* [[TMP124]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 10184 // CHECK14-NEXT: [[TMP130:%.*]] = icmp ne i32 [[TMP129]], 0 10185 // CHECK14-NEXT: br i1 [[TMP130]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]] 10186 // CHECK14: omp_offload.failed47: 10187 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i64 [[TMP102]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 10188 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT48]] 10189 // CHECK14: omp_offload.cont48: 10190 // CHECK14-NEXT: [[TMP131:%.*]] = load i32, i32* [[M]], align 4 10191 // CHECK14-NEXT: [[CONV50:%.*]] = bitcast i64* [[M_CASTED49]] to i32* 10192 // CHECK14-NEXT: store i32 [[TMP131]], i32* [[CONV50]], align 4 10193 // CHECK14-NEXT: [[TMP132:%.*]] = load i64, i64* [[M_CASTED49]], align 8 10194 // CHECK14-NEXT: [[TMP133:%.*]] = load i32, i32* [[N]], align 4 10195 // CHECK14-NEXT: [[CONV52:%.*]] = bitcast i64* [[N_CASTED51]] to i32* 10196 // CHECK14-NEXT: store i32 [[TMP133]], i32* [[CONV52]], align 4 10197 // CHECK14-NEXT: [[TMP134:%.*]] = load i64, i64* [[N_CASTED51]], align 8 10198 // CHECK14-NEXT: [[TMP135:%.*]] = mul nuw i64 [[TMP1]], 4 10199 // CHECK14-NEXT: [[TMP136:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0 10200 // CHECK14-NEXT: [[TMP137:%.*]] = bitcast i8** [[TMP136]] to i64* 10201 // CHECK14-NEXT: store i64 [[TMP132]], i64* [[TMP137]], align 8 10202 // CHECK14-NEXT: [[TMP138:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0 10203 // CHECK14-NEXT: [[TMP139:%.*]] = bitcast i8** [[TMP138]] to i64* 10204 // CHECK14-NEXT: store i64 [[TMP132]], i64* [[TMP139]], align 8 10205 // CHECK14-NEXT: [[TMP140:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0 10206 // CHECK14-NEXT: store i64 4, i64* [[TMP140]], align 8 10207 // CHECK14-NEXT: [[TMP141:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 0 10208 // CHECK14-NEXT: store i8* null, i8** [[TMP141]], align 8 10209 // CHECK14-NEXT: [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 1 10210 // CHECK14-NEXT: [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i64* 10211 // CHECK14-NEXT: store i64 [[TMP134]], i64* [[TMP143]], align 8 10212 // CHECK14-NEXT: [[TMP144:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 1 10213 // CHECK14-NEXT: [[TMP145:%.*]] = bitcast i8** [[TMP144]] to i64* 10214 // CHECK14-NEXT: store i64 [[TMP134]], i64* [[TMP145]], align 8 10215 // CHECK14-NEXT: [[TMP146:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 1 10216 // CHECK14-NEXT: store i64 4, i64* [[TMP146]], align 8 10217 // CHECK14-NEXT: [[TMP147:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 1 10218 // CHECK14-NEXT: store i8* null, i8** [[TMP147]], align 8 10219 // CHECK14-NEXT: [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 2 10220 // CHECK14-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i64* 10221 // CHECK14-NEXT: store i64 [[TMP1]], i64* [[TMP149]], align 8 10222 // CHECK14-NEXT: [[TMP150:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 2 10223 // CHECK14-NEXT: [[TMP151:%.*]] = bitcast i8** [[TMP150]] to i64* 10224 // CHECK14-NEXT: store i64 [[TMP1]], i64* [[TMP151]], align 8 10225 // CHECK14-NEXT: [[TMP152:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 2 10226 // CHECK14-NEXT: store i64 8, i64* [[TMP152]], align 8 10227 // CHECK14-NEXT: [[TMP153:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 2 10228 // CHECK14-NEXT: store i8* null, i8** [[TMP153]], align 8 10229 // CHECK14-NEXT: [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 3 10230 // CHECK14-NEXT: [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32** 10231 // CHECK14-NEXT: store i32* [[VLA]], i32** [[TMP155]], align 8 10232 // CHECK14-NEXT: [[TMP156:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 3 10233 // CHECK14-NEXT: [[TMP157:%.*]] = bitcast i8** [[TMP156]] to i32** 10234 // CHECK14-NEXT: store i32* [[VLA]], i32** [[TMP157]], align 8 10235 // CHECK14-NEXT: [[TMP158:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 3 10236 // CHECK14-NEXT: store i64 [[TMP135]], i64* [[TMP158]], align 8 10237 // CHECK14-NEXT: [[TMP159:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 3 10238 // CHECK14-NEXT: store i8* null, i8** [[TMP159]], align 8 10239 // CHECK14-NEXT: [[TMP160:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0 10240 // CHECK14-NEXT: [[TMP161:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0 10241 // CHECK14-NEXT: [[TMP162:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0 10242 // CHECK14-NEXT: [[TMP163:%.*]] = load i32, i32* [[N]], align 4 10243 // CHECK14-NEXT: store i32 [[TMP163]], i32* [[DOTCAPTURE_EXPR_58]], align 4 10244 // CHECK14-NEXT: [[TMP164:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_58]], align 4 10245 // CHECK14-NEXT: [[SUB60:%.*]] = sub nsw i32 [[TMP164]], 0 10246 // CHECK14-NEXT: [[DIV61:%.*]] = sdiv i32 [[SUB60]], 1 10247 // CHECK14-NEXT: [[SUB62:%.*]] = sub nsw i32 [[DIV61]], 1 10248 // CHECK14-NEXT: store i32 [[SUB62]], i32* [[DOTCAPTURE_EXPR_59]], align 4 10249 // CHECK14-NEXT: [[TMP165:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_59]], align 4 10250 // CHECK14-NEXT: [[ADD63:%.*]] = add nsw i32 [[TMP165]], 1 10251 // CHECK14-NEXT: [[TMP166:%.*]] = zext i32 [[ADD63]] to i64 10252 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP166]]) 10253 // CHECK14-NEXT: [[TMP167:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, i32 4, i8** [[TMP160]], i8** [[TMP161]], i64* [[TMP162]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 10254 // CHECK14-NEXT: [[TMP168:%.*]] = icmp ne i32 [[TMP167]], 0 10255 // CHECK14-NEXT: br i1 [[TMP168]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]] 10256 // CHECK14: omp_offload.failed64: 10257 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i64 [[TMP132]], i64 [[TMP134]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 10258 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT65]] 10259 // CHECK14: omp_offload.cont65: 10260 // CHECK14-NEXT: [[TMP169:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 10261 // CHECK14-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP169]]) 10262 // CHECK14-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 10263 // CHECK14-NEXT: [[TMP170:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 10264 // CHECK14-NEXT: call void @llvm.stackrestore(i8* [[TMP170]]) 10265 // CHECK14-NEXT: [[TMP171:%.*]] = load i32, i32* [[RETVAL]], align 4 10266 // CHECK14-NEXT: ret i32 [[TMP171]] 10267 // 10268 // 10269 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148 10270 // CHECK14-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 10271 // CHECK14-NEXT: entry: 10272 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 10273 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 10274 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 10275 // CHECK14-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 10276 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 10277 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 10278 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 10279 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 10280 // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 10281 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 10282 // CHECK14-NEXT: ret void 10283 // 10284 // 10285 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined. 10286 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 10287 // CHECK14-NEXT: entry: 10288 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10289 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10290 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 10291 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 10292 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 10293 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10294 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 10295 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 10296 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10297 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 10298 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 10299 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 10300 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10301 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10302 // CHECK14-NEXT: [[I3:%.*]] = alloca i32, align 4 10303 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10304 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10305 // CHECK14-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 10306 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 10307 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 10308 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 10309 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 10310 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 10311 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 10312 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 10313 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10314 // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 10315 // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10316 // CHECK14-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 10317 // CHECK14-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 10318 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 10319 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10320 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 10321 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 10322 // CHECK14: omp.precond.then: 10323 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 10324 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10325 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 10326 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10327 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10328 // CHECK14-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10329 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 10330 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10331 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10332 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10333 // CHECK14-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 10334 // CHECK14-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10335 // CHECK14: cond.true: 10336 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10337 // CHECK14-NEXT: br label [[COND_END:%.*]] 10338 // CHECK14: cond.false: 10339 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10340 // CHECK14-NEXT: br label [[COND_END]] 10341 // CHECK14: cond.end: 10342 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 10343 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 10344 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10345 // CHECK14-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 10346 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10347 // CHECK14: omp.inner.for.cond: 10348 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10349 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10350 // CHECK14-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 10351 // CHECK14-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10352 // CHECK14: omp.inner.for.body: 10353 // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10354 // CHECK14-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 10355 // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10356 // CHECK14-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 10357 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 10358 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10359 // CHECK14: omp.inner.for.inc: 10360 // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10361 // CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 10362 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 10363 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 10364 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 10365 // CHECK14: omp.inner.for.end: 10366 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10367 // CHECK14: omp.loop.exit: 10368 // CHECK14-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10369 // CHECK14-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 10370 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 10371 // CHECK14-NEXT: br label [[OMP_PRECOND_END]] 10372 // CHECK14: omp.precond.end: 10373 // CHECK14-NEXT: ret void 10374 // 10375 // 10376 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..1 10377 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 10378 // CHECK14-NEXT: entry: 10379 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10380 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10381 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 10382 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 10383 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 10384 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 10385 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 10386 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10387 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 10388 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 10389 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10390 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 10391 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10392 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10393 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10394 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10395 // CHECK14-NEXT: [[I4:%.*]] = alloca i32, align 4 10396 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10397 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10398 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10399 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10400 // CHECK14-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 10401 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 10402 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 10403 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 10404 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 10405 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 10406 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 10407 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 10408 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10409 // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 10410 // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10411 // CHECK14-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 10412 // CHECK14-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 10413 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 10414 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10415 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 10416 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 10417 // CHECK14: omp.precond.then: 10418 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 10419 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10420 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 10421 // CHECK14-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10422 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 10423 // CHECK14-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10424 // CHECK14-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 10425 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 10426 // CHECK14-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 10427 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10428 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10429 // CHECK14-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10430 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 10431 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10432 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10433 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10434 // CHECK14-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 10435 // CHECK14-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10436 // CHECK14: cond.true: 10437 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10438 // CHECK14-NEXT: br label [[COND_END:%.*]] 10439 // CHECK14: cond.false: 10440 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10441 // CHECK14-NEXT: br label [[COND_END]] 10442 // CHECK14: cond.end: 10443 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 10444 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 10445 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 10446 // CHECK14-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 10447 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10448 // CHECK14: omp.inner.for.cond: 10449 // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10450 // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10451 // CHECK14-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 10452 // CHECK14-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10453 // CHECK14: omp.inner.for.body: 10454 // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10455 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 10456 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10457 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 10458 // CHECK14-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4 10459 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 10460 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 10461 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 10462 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10463 // CHECK14: omp.body.continue: 10464 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10465 // CHECK14: omp.inner.for.inc: 10466 // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10467 // CHECK14-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 10468 // CHECK14-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 10469 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 10470 // CHECK14: omp.inner.for.end: 10471 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10472 // CHECK14: omp.loop.exit: 10473 // CHECK14-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10474 // CHECK14-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 10475 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 10476 // CHECK14-NEXT: br label [[OMP_PRECOND_END]] 10477 // CHECK14: omp.precond.end: 10478 // CHECK14-NEXT: ret void 10479 // 10480 // 10481 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153 10482 // CHECK14-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 10483 // CHECK14-NEXT: entry: 10484 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 10485 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 10486 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 10487 // CHECK14-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 10488 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 10489 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 10490 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 10491 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 10492 // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 10493 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 10494 // CHECK14-NEXT: ret void 10495 // 10496 // 10497 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..2 10498 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 10499 // CHECK14-NEXT: entry: 10500 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10501 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10502 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 10503 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 10504 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 10505 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10506 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 10507 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 10508 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10509 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 10510 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 10511 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 10512 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10513 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10514 // CHECK14-NEXT: [[I3:%.*]] = alloca i32, align 4 10515 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10516 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10517 // CHECK14-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 10518 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 10519 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 10520 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 10521 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 10522 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 10523 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 10524 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 10525 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10526 // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 10527 // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10528 // CHECK14-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 10529 // CHECK14-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 10530 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 10531 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10532 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 10533 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 10534 // CHECK14: omp.precond.then: 10535 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 10536 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10537 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 10538 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10539 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10540 // CHECK14-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10541 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 10542 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10543 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10544 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10545 // CHECK14-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 10546 // CHECK14-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10547 // CHECK14: cond.true: 10548 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10549 // CHECK14-NEXT: br label [[COND_END:%.*]] 10550 // CHECK14: cond.false: 10551 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10552 // CHECK14-NEXT: br label [[COND_END]] 10553 // CHECK14: cond.end: 10554 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 10555 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 10556 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10557 // CHECK14-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 10558 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10559 // CHECK14: omp.inner.for.cond: 10560 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10561 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10562 // CHECK14-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 10563 // CHECK14-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10564 // CHECK14: omp.inner.for.body: 10565 // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10566 // CHECK14-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 10567 // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10568 // CHECK14-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 10569 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 10570 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10571 // CHECK14: omp.inner.for.inc: 10572 // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10573 // CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 10574 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 10575 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 10576 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 10577 // CHECK14: omp.inner.for.end: 10578 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10579 // CHECK14: omp.loop.exit: 10580 // CHECK14-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10581 // CHECK14-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 10582 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 10583 // CHECK14-NEXT: br label [[OMP_PRECOND_END]] 10584 // CHECK14: omp.precond.end: 10585 // CHECK14-NEXT: ret void 10586 // 10587 // 10588 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..3 10589 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 10590 // CHECK14-NEXT: entry: 10591 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10592 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10593 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 10594 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 10595 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 10596 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 10597 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 10598 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10599 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 10600 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 10601 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10602 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 10603 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10604 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10605 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10606 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10607 // CHECK14-NEXT: [[I4:%.*]] = alloca i32, align 4 10608 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10609 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10610 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10611 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10612 // CHECK14-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 10613 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 10614 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 10615 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 10616 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 10617 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 10618 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 10619 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 10620 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10621 // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 10622 // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10623 // CHECK14-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 10624 // CHECK14-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 10625 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 10626 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10627 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 10628 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 10629 // CHECK14: omp.precond.then: 10630 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 10631 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10632 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 10633 // CHECK14-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10634 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 10635 // CHECK14-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10636 // CHECK14-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 10637 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 10638 // CHECK14-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 10639 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10640 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10641 // CHECK14-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10642 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 10643 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10644 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10645 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10646 // CHECK14-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 10647 // CHECK14-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10648 // CHECK14: cond.true: 10649 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10650 // CHECK14-NEXT: br label [[COND_END:%.*]] 10651 // CHECK14: cond.false: 10652 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10653 // CHECK14-NEXT: br label [[COND_END]] 10654 // CHECK14: cond.end: 10655 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 10656 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 10657 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 10658 // CHECK14-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 10659 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10660 // CHECK14: omp.inner.for.cond: 10661 // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10662 // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10663 // CHECK14-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 10664 // CHECK14-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10665 // CHECK14: omp.inner.for.body: 10666 // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10667 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 10668 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10669 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 10670 // CHECK14-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4 10671 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 10672 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 10673 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 10674 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10675 // CHECK14: omp.body.continue: 10676 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10677 // CHECK14: omp.inner.for.inc: 10678 // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10679 // CHECK14-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 10680 // CHECK14-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 10681 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 10682 // CHECK14: omp.inner.for.end: 10683 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10684 // CHECK14: omp.loop.exit: 10685 // CHECK14-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10686 // CHECK14-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 10687 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 10688 // CHECK14-NEXT: br label [[OMP_PRECOND_END]] 10689 // CHECK14: omp.precond.end: 10690 // CHECK14-NEXT: ret void 10691 // 10692 // 10693 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158 10694 // CHECK14-SAME: (i64 [[M:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 10695 // CHECK14-NEXT: entry: 10696 // CHECK14-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 10697 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 10698 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 10699 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 10700 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 10701 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 10702 // CHECK14-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 10703 // CHECK14-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 10704 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 10705 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 10706 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* 10707 // CHECK14-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 10708 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 10709 // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 10710 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8 10711 // CHECK14-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 10712 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10713 // CHECK14-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 10714 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4 10715 // CHECK14-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 10716 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]]) 10717 // CHECK14-NEXT: ret void 10718 // 10719 // 10720 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..5 10721 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 10722 // CHECK14-NEXT: entry: 10723 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10724 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10725 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 10726 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 10727 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 10728 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 10729 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10730 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 10731 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10732 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 10733 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 10734 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 10735 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 10736 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10737 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10738 // CHECK14-NEXT: [[I4:%.*]] = alloca i32, align 4 10739 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 10740 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10741 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10742 // CHECK14-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 10743 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 10744 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 10745 // CHECK14-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 10746 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 10747 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 10748 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 10749 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 10750 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 10751 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 10752 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10753 // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 10754 // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10755 // CHECK14-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 10756 // CHECK14-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 10757 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 10758 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10759 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 10760 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 10761 // CHECK14: omp.precond.then: 10762 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 10763 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 10764 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 10765 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10766 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10767 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[CONV]], align 8 10768 // CHECK14-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10769 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 10770 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]]) 10771 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10772 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 10773 // CHECK14-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 10774 // CHECK14-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10775 // CHECK14: cond.true: 10776 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 10777 // CHECK14-NEXT: br label [[COND_END:%.*]] 10778 // CHECK14: cond.false: 10779 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10780 // CHECK14-NEXT: br label [[COND_END]] 10781 // CHECK14: cond.end: 10782 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 10783 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 10784 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10785 // CHECK14-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 10786 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10787 // CHECK14: omp.inner.for.cond: 10788 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10789 // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 10790 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1 10791 // CHECK14-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]] 10792 // CHECK14-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10793 // CHECK14: omp.inner.for.body: 10794 // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10795 // CHECK14-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 10796 // CHECK14-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10797 // CHECK14-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 10798 // CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV]], align 8 10799 // CHECK14-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 10800 // CHECK14-NEXT: store i32 [[TMP21]], i32* [[CONV7]], align 4 10801 // CHECK14-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 10802 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP22]]) 10803 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10804 // CHECK14: omp.inner.for.inc: 10805 // CHECK14-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10806 // CHECK14-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 10807 // CHECK14-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 10808 // CHECK14-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 10809 // CHECK14-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10810 // CHECK14-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 10811 // CHECK14-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 10812 // CHECK14-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4 10813 // CHECK14-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10814 // CHECK14-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 10815 // CHECK14-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP27]], [[TMP28]] 10816 // CHECK14-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4 10817 // CHECK14-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10818 // CHECK14-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 10819 // CHECK14-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]] 10820 // CHECK14-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]] 10821 // CHECK14: cond.true12: 10822 // CHECK14-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 10823 // CHECK14-NEXT: br label [[COND_END14:%.*]] 10824 // CHECK14: cond.false13: 10825 // CHECK14-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 10826 // CHECK14-NEXT: br label [[COND_END14]] 10827 // CHECK14: cond.end14: 10828 // CHECK14-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE12]] ], [ [[TMP32]], [[COND_FALSE13]] ] 10829 // CHECK14-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4 10830 // CHECK14-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 10831 // CHECK14-NEXT: store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4 10832 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 10833 // CHECK14: omp.inner.for.end: 10834 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10835 // CHECK14: omp.loop.exit: 10836 // CHECK14-NEXT: [[TMP34:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10837 // CHECK14-NEXT: [[TMP35:%.*]] = load i32, i32* [[TMP34]], align 4 10838 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP35]]) 10839 // CHECK14-NEXT: br label [[OMP_PRECOND_END]] 10840 // CHECK14: omp.precond.end: 10841 // CHECK14-NEXT: ret void 10842 // 10843 // 10844 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..6 10845 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 10846 // CHECK14-NEXT: entry: 10847 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10848 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10849 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 10850 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 10851 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 10852 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 10853 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 10854 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 10855 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10856 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 10857 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10858 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 10859 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 10860 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 10861 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 10862 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10863 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10864 // CHECK14-NEXT: [[I6:%.*]] = alloca i32, align 4 10865 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10866 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10867 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10868 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10869 // CHECK14-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 10870 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 10871 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 10872 // CHECK14-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 10873 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 10874 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 10875 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 10876 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 10877 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 10878 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 10879 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10880 // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 10881 // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10882 // CHECK14-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 10883 // CHECK14-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 10884 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 10885 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 10886 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 10887 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 10888 // CHECK14: omp.precond.then: 10889 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 10890 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 10891 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 10892 // CHECK14-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 10893 // CHECK14-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32 10894 // CHECK14-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 10895 // CHECK14-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32 10896 // CHECK14-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 10897 // CHECK14-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 10898 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 10899 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 10900 // CHECK14-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10901 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 10902 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 10903 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10904 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 10905 // CHECK14-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 10906 // CHECK14-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 10907 // CHECK14: cond.true: 10908 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 10909 // CHECK14-NEXT: br label [[COND_END:%.*]] 10910 // CHECK14: cond.false: 10911 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10912 // CHECK14-NEXT: br label [[COND_END]] 10913 // CHECK14: cond.end: 10914 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 10915 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 10916 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 10917 // CHECK14-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 10918 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 10919 // CHECK14: omp.inner.for.cond: 10920 // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10921 // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 10922 // CHECK14-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 10923 // CHECK14-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 10924 // CHECK14: omp.inner.for.body: 10925 // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10926 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 10927 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 10928 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I6]], align 4 10929 // CHECK14-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4 10930 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 10931 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 10932 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 10933 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 10934 // CHECK14: omp.body.continue: 10935 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 10936 // CHECK14: omp.inner.for.inc: 10937 // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 10938 // CHECK14-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1 10939 // CHECK14-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 10940 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 10941 // CHECK14: omp.inner.for.end: 10942 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 10943 // CHECK14: omp.loop.exit: 10944 // CHECK14-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 10945 // CHECK14-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 10946 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 10947 // CHECK14-NEXT: br label [[OMP_PRECOND_END]] 10948 // CHECK14: omp.precond.end: 10949 // CHECK14-NEXT: ret void 10950 // 10951 // 10952 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163 10953 // CHECK14-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 10954 // CHECK14-NEXT: entry: 10955 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 10956 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 10957 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 10958 // CHECK14-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 10959 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 10960 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 10961 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 10962 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 10963 // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 10964 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 10965 // CHECK14-NEXT: ret void 10966 // 10967 // 10968 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..8 10969 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 10970 // CHECK14-NEXT: entry: 10971 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 10972 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 10973 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 10974 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 10975 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 10976 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 10977 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 10978 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 10979 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 10980 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 10981 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 10982 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 10983 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 10984 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 10985 // CHECK14-NEXT: [[I3:%.*]] = alloca i32, align 4 10986 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 10987 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 10988 // CHECK14-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 10989 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 10990 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 10991 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 10992 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 10993 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 10994 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 10995 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 10996 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 10997 // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 10998 // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 10999 // CHECK14-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 11000 // CHECK14-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 11001 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 11002 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11003 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 11004 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11005 // CHECK14: omp.precond.then: 11006 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 11007 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11008 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 11009 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11010 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11011 // CHECK14-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11012 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 11013 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 11014 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11015 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11016 // CHECK14-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 11017 // CHECK14-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11018 // CHECK14: cond.true: 11019 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11020 // CHECK14-NEXT: br label [[COND_END:%.*]] 11021 // CHECK14: cond.false: 11022 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11023 // CHECK14-NEXT: br label [[COND_END]] 11024 // CHECK14: cond.end: 11025 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 11026 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 11027 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11028 // CHECK14-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 11029 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11030 // CHECK14: omp.inner.for.cond: 11031 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11032 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11033 // CHECK14-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 11034 // CHECK14-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11035 // CHECK14: omp.inner.for.body: 11036 // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11037 // CHECK14-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 11038 // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11039 // CHECK14-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 11040 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 11041 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11042 // CHECK14: omp.inner.for.inc: 11043 // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11044 // CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 11045 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 11046 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 11047 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 11048 // CHECK14: omp.inner.for.end: 11049 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11050 // CHECK14: omp.loop.exit: 11051 // CHECK14-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11052 // CHECK14-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 11053 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 11054 // CHECK14-NEXT: br label [[OMP_PRECOND_END]] 11055 // CHECK14: omp.precond.end: 11056 // CHECK14-NEXT: ret void 11057 // 11058 // 11059 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..9 11060 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 11061 // CHECK14-NEXT: entry: 11062 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11063 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11064 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 11065 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 11066 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 11067 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 11068 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 11069 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11070 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 11071 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 11072 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11073 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 11074 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 11075 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 11076 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11077 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11078 // CHECK14-NEXT: [[I4:%.*]] = alloca i32, align 4 11079 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11080 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11081 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 11082 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11083 // CHECK14-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 11084 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 11085 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 11086 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 11087 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 11088 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 11089 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 11090 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 11091 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11092 // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 11093 // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11094 // CHECK14-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 11095 // CHECK14-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 11096 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 11097 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11098 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 11099 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11100 // CHECK14: omp.precond.then: 11101 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 11102 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11103 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 11104 // CHECK14-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 11105 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 11106 // CHECK14-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11107 // CHECK14-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 11108 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 11109 // CHECK14-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 11110 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11111 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11112 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 11113 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11114 // CHECK14-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11115 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 11116 // CHECK14-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1) 11117 // CHECK14-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 11118 // CHECK14: omp.dispatch.cond: 11119 // CHECK14-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11120 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 11121 // CHECK14-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 11122 // CHECK14-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 11123 // CHECK14-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 11124 // CHECK14: omp.dispatch.body: 11125 // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 11126 // CHECK14-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 11127 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11128 // CHECK14: omp.inner.for.cond: 11129 // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 11130 // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14 11131 // CHECK14-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 11132 // CHECK14-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11133 // CHECK14: omp.inner.for.body: 11134 // CHECK14-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 11135 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 11136 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 11137 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !14 11138 // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !14 11139 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64 11140 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 11141 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !14 11142 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 11143 // CHECK14: omp.body.continue: 11144 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11145 // CHECK14: omp.inner.for.inc: 11146 // CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 11147 // CHECK14-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1 11148 // CHECK14-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 11149 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] 11150 // CHECK14: omp.inner.for.end: 11151 // CHECK14-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 11152 // CHECK14: omp.dispatch.inc: 11153 // CHECK14-NEXT: br label [[OMP_DISPATCH_COND]] 11154 // CHECK14: omp.dispatch.end: 11155 // CHECK14-NEXT: br label [[OMP_PRECOND_END]] 11156 // CHECK14: omp.precond.end: 11157 // CHECK14-NEXT: ret void 11158 // 11159 // 11160 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168 11161 // CHECK14-SAME: (i64 [[M:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 11162 // CHECK14-NEXT: entry: 11163 // CHECK14-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 11164 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 11165 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 11166 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 11167 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 11168 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 11169 // CHECK14-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 11170 // CHECK14-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 11171 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 11172 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 11173 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* 11174 // CHECK14-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 11175 // CHECK14-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 11176 // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 11177 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8 11178 // CHECK14-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 11179 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11180 // CHECK14-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 11181 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4 11182 // CHECK14-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 11183 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]]) 11184 // CHECK14-NEXT: ret void 11185 // 11186 // 11187 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..11 11188 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 11189 // CHECK14-NEXT: entry: 11190 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11191 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11192 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 11193 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 11194 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 11195 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 11196 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11197 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 11198 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11199 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 11200 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 11201 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 11202 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 11203 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11204 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11205 // CHECK14-NEXT: [[I4:%.*]] = alloca i32, align 4 11206 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 11207 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11208 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11209 // CHECK14-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 11210 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 11211 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 11212 // CHECK14-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 11213 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 11214 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 11215 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 11216 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 11217 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 11218 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 11219 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11220 // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 11221 // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11222 // CHECK14-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 11223 // CHECK14-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 11224 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 11225 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11226 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 11227 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11228 // CHECK14: omp.precond.then: 11229 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 11230 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 11231 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 11232 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11233 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11234 // CHECK14-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11235 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 11236 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 11237 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11238 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 11239 // CHECK14-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 11240 // CHECK14-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11241 // CHECK14: cond.true: 11242 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 11243 // CHECK14-NEXT: br label [[COND_END:%.*]] 11244 // CHECK14: cond.false: 11245 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11246 // CHECK14-NEXT: br label [[COND_END]] 11247 // CHECK14: cond.end: 11248 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 11249 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 11250 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11251 // CHECK14-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 11252 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11253 // CHECK14: omp.inner.for.cond: 11254 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11255 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11256 // CHECK14-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 11257 // CHECK14-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11258 // CHECK14: omp.inner.for.body: 11259 // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11260 // CHECK14-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 11261 // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11262 // CHECK14-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 11263 // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV]], align 8 11264 // CHECK14-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 11265 // CHECK14-NEXT: store i32 [[TMP20]], i32* [[CONV7]], align 4 11266 // CHECK14-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 11267 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP21]]) 11268 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11269 // CHECK14: omp.inner.for.inc: 11270 // CHECK14-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11271 // CHECK14-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 11272 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 11273 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 11274 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 11275 // CHECK14: omp.inner.for.end: 11276 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11277 // CHECK14: omp.loop.exit: 11278 // CHECK14-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11279 // CHECK14-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 11280 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) 11281 // CHECK14-NEXT: br label [[OMP_PRECOND_END]] 11282 // CHECK14: omp.precond.end: 11283 // CHECK14-NEXT: ret void 11284 // 11285 // 11286 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..12 11287 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 11288 // CHECK14-NEXT: entry: 11289 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11290 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11291 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 11292 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 11293 // CHECK14-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 11294 // CHECK14-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 11295 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 11296 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 11297 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11298 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 11299 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 11300 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 11301 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 11302 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 11303 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 11304 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11305 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11306 // CHECK14-NEXT: [[I6:%.*]] = alloca i32, align 4 11307 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11308 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11309 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 11310 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11311 // CHECK14-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 11312 // CHECK14-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 11313 // CHECK14-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 11314 // CHECK14-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 11315 // CHECK14-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 11316 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 11317 // CHECK14-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 11318 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 11319 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 11320 // CHECK14-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 11321 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11322 // CHECK14-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 11323 // CHECK14-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 11324 // CHECK14-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 11325 // CHECK14-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 11326 // CHECK14-NEXT: store i32 0, i32* [[I]], align 4 11327 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 11328 // CHECK14-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 11329 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 11330 // CHECK14: omp.precond.then: 11331 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 11332 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 11333 // CHECK14-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 11334 // CHECK14-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 11335 // CHECK14-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32 11336 // CHECK14-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11337 // CHECK14-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32 11338 // CHECK14-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 11339 // CHECK14-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 11340 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11341 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11342 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 8 11343 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 11344 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11345 // CHECK14-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11346 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 11347 // CHECK14-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 1073741859, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]]) 11348 // CHECK14-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 11349 // CHECK14: omp.dispatch.cond: 11350 // CHECK14-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11351 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 11352 // CHECK14-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 11353 // CHECK14-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 11354 // CHECK14-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 11355 // CHECK14: omp.dispatch.body: 11356 // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 11357 // CHECK14-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 11358 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11359 // CHECK14: omp.inner.for.cond: 11360 // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 11361 // CHECK14-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !17 11362 // CHECK14-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 11363 // CHECK14-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11364 // CHECK14: omp.inner.for.body: 11365 // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 11366 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 11367 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 11368 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !17 11369 // CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !17 11370 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 11371 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 11372 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !17 11373 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 11374 // CHECK14: omp.body.continue: 11375 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11376 // CHECK14: omp.inner.for.inc: 11377 // CHECK14-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 11378 // CHECK14-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], 1 11379 // CHECK14-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 11380 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]] 11381 // CHECK14: omp.inner.for.end: 11382 // CHECK14-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 11383 // CHECK14: omp.dispatch.inc: 11384 // CHECK14-NEXT: br label [[OMP_DISPATCH_COND]] 11385 // CHECK14: omp.dispatch.end: 11386 // CHECK14-NEXT: br label [[OMP_PRECOND_END]] 11387 // CHECK14: omp.precond.end: 11388 // CHECK14-NEXT: ret void 11389 // 11390 // 11391 // CHECK14-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 11392 // CHECK14-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat { 11393 // CHECK14-NEXT: entry: 11394 // CHECK14-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 11395 // CHECK14-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 11396 // CHECK14-NEXT: [[M:%.*]] = alloca i32, align 4 11397 // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 11398 // CHECK14-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 11399 // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 11400 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 11401 // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8 11402 // CHECK14-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8 11403 // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8 11404 // CHECK14-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 11405 // CHECK14-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 11406 // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 8 11407 // CHECK14-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 8 11408 // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 8 11409 // CHECK14-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 11410 // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 8 11411 // CHECK14-NEXT: [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 8 11412 // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 8 11413 // CHECK14-NEXT: [[_TMP16:%.*]] = alloca i32, align 4 11414 // CHECK14-NEXT: [[M_CASTED19:%.*]] = alloca i64, align 8 11415 // CHECK14-NEXT: [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [2 x i8*], align 8 11416 // CHECK14-NEXT: [[DOTOFFLOAD_PTRS22:%.*]] = alloca [2 x i8*], align 8 11417 // CHECK14-NEXT: [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [2 x i8*], align 8 11418 // CHECK14-NEXT: [[_TMP24:%.*]] = alloca i32, align 4 11419 // CHECK14-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 11420 // CHECK14-NEXT: store i32 10, i32* [[M]], align 4 11421 // CHECK14-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 11422 // CHECK14-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 11423 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8 11424 // CHECK14-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 11425 // CHECK14-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 11426 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8 11427 // CHECK14-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 11428 // CHECK14-NEXT: store i8* null, i8** [[TMP4]], align 8 11429 // CHECK14-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 11430 // CHECK14-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 11431 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 11432 // CHECK14-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 11433 // CHECK14-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 11434 // CHECK14-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 11435 // CHECK14: omp_offload.failed: 11436 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]] 11437 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT]] 11438 // CHECK14: omp_offload.cont: 11439 // CHECK14-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 11440 // CHECK14-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** 11441 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8 11442 // CHECK14-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 11443 // CHECK14-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** 11444 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8 11445 // CHECK14-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0 11446 // CHECK14-NEXT: store i8* null, i8** [[TMP13]], align 8 11447 // CHECK14-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 11448 // CHECK14-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 11449 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 11450 // CHECK14-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 11451 // CHECK14-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 11452 // CHECK14-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 11453 // CHECK14: omp_offload.failed5: 11454 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121([10 x i32]* [[A]]) #[[ATTR3]] 11455 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT6]] 11456 // CHECK14: omp_offload.cont6: 11457 // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[M]], align 4 11458 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[M_CASTED]] to i32* 11459 // CHECK14-NEXT: store i32 [[TMP18]], i32* [[CONV]], align 4 11460 // CHECK14-NEXT: [[TMP19:%.*]] = load i64, i64* [[M_CASTED]], align 8 11461 // CHECK14-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 11462 // CHECK14-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64* 11463 // CHECK14-NEXT: store i64 [[TMP19]], i64* [[TMP21]], align 8 11464 // CHECK14-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 11465 // CHECK14-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64* 11466 // CHECK14-NEXT: store i64 [[TMP19]], i64* [[TMP23]], align 8 11467 // CHECK14-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0 11468 // CHECK14-NEXT: store i8* null, i8** [[TMP24]], align 8 11469 // CHECK14-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1 11470 // CHECK14-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]** 11471 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 8 11472 // CHECK14-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1 11473 // CHECK14-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]** 11474 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 8 11475 // CHECK14-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 1 11476 // CHECK14-NEXT: store i8* null, i8** [[TMP29]], align 8 11477 // CHECK14-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 11478 // CHECK14-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 11479 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 11480 // CHECK14-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 11481 // CHECK14-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 11482 // CHECK14-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] 11483 // CHECK14: omp_offload.failed11: 11484 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i64 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]] 11485 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT12]] 11486 // CHECK14: omp_offload.cont12: 11487 // CHECK14-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 11488 // CHECK14-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]** 11489 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 8 11490 // CHECK14-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 11491 // CHECK14-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]** 11492 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 8 11493 // CHECK14-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i64 0, i64 0 11494 // CHECK14-NEXT: store i8* null, i8** [[TMP38]], align 8 11495 // CHECK14-NEXT: [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 11496 // CHECK14-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 11497 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 11498 // CHECK14-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 11499 // CHECK14-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0 11500 // CHECK14-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]] 11501 // CHECK14: omp_offload.failed17: 11502 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131([10 x i32]* [[A]]) #[[ATTR3]] 11503 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT18]] 11504 // CHECK14: omp_offload.cont18: 11505 // CHECK14-NEXT: [[TMP43:%.*]] = load i32, i32* [[M]], align 4 11506 // CHECK14-NEXT: [[CONV20:%.*]] = bitcast i64* [[M_CASTED19]] to i32* 11507 // CHECK14-NEXT: store i32 [[TMP43]], i32* [[CONV20]], align 4 11508 // CHECK14-NEXT: [[TMP44:%.*]] = load i64, i64* [[M_CASTED19]], align 8 11509 // CHECK14-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 11510 // CHECK14-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64* 11511 // CHECK14-NEXT: store i64 [[TMP44]], i64* [[TMP46]], align 8 11512 // CHECK14-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 11513 // CHECK14-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64* 11514 // CHECK14-NEXT: store i64 [[TMP44]], i64* [[TMP48]], align 8 11515 // CHECK14-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0 11516 // CHECK14-NEXT: store i8* null, i8** [[TMP49]], align 8 11517 // CHECK14-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1 11518 // CHECK14-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]** 11519 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 8 11520 // CHECK14-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1 11521 // CHECK14-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]** 11522 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 8 11523 // CHECK14-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1 11524 // CHECK14-NEXT: store i8* null, i8** [[TMP54]], align 8 11525 // CHECK14-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 11526 // CHECK14-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 11527 // CHECK14-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 11528 // CHECK14-NEXT: [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 11529 // CHECK14-NEXT: [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0 11530 // CHECK14-NEXT: br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED25:%.*]], label [[OMP_OFFLOAD_CONT26:%.*]] 11531 // CHECK14: omp_offload.failed25: 11532 // CHECK14-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i64 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]] 11533 // CHECK14-NEXT: br label [[OMP_OFFLOAD_CONT26]] 11534 // CHECK14: omp_offload.cont26: 11535 // CHECK14-NEXT: ret i32 0 11536 // 11537 // 11538 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116 11539 // CHECK14-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 11540 // CHECK14-NEXT: entry: 11541 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 11542 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 11543 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 11544 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 11545 // CHECK14-NEXT: ret void 11546 // 11547 // 11548 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..14 11549 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 11550 // CHECK14-NEXT: entry: 11551 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11552 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11553 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 11554 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11555 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 11556 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 11557 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 11558 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11559 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11560 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 11561 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11562 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11563 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 11564 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 11565 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 11566 // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 11567 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11568 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11569 // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11570 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 11571 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 11572 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11573 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 11574 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11575 // CHECK14: cond.true: 11576 // CHECK14-NEXT: br label [[COND_END:%.*]] 11577 // CHECK14: cond.false: 11578 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11579 // CHECK14-NEXT: br label [[COND_END]] 11580 // CHECK14: cond.end: 11581 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 11582 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 11583 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11584 // CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 11585 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11586 // CHECK14: omp.inner.for.cond: 11587 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11588 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11589 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 11590 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11591 // CHECK14: omp.inner.for.body: 11592 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11593 // CHECK14-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 11594 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11595 // CHECK14-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 11596 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]) 11597 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11598 // CHECK14: omp.inner.for.inc: 11599 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11600 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 11601 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 11602 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 11603 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 11604 // CHECK14: omp.inner.for.end: 11605 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11606 // CHECK14: omp.loop.exit: 11607 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 11608 // CHECK14-NEXT: ret void 11609 // 11610 // 11611 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..15 11612 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 11613 // CHECK14-NEXT: entry: 11614 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11615 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11616 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 11617 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 11618 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 11619 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11620 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 11621 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 11622 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 11623 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11624 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11625 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 11626 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11627 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11628 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 11629 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11630 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 11631 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 11632 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 11633 // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 11634 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 11635 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 11636 // CHECK14-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11637 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 11638 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 11639 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 11640 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11641 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11642 // CHECK14-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11643 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 11644 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 11645 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11646 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 11647 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11648 // CHECK14: cond.true: 11649 // CHECK14-NEXT: br label [[COND_END:%.*]] 11650 // CHECK14: cond.false: 11651 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11652 // CHECK14-NEXT: br label [[COND_END]] 11653 // CHECK14: cond.end: 11654 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 11655 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 11656 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 11657 // CHECK14-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 11658 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11659 // CHECK14: omp.inner.for.cond: 11660 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11661 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11662 // CHECK14-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 11663 // CHECK14-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11664 // CHECK14: omp.inner.for.body: 11665 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11666 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 11667 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 11668 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4 11669 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 11670 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 11671 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 11672 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 11673 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 11674 // CHECK14: omp.body.continue: 11675 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11676 // CHECK14: omp.inner.for.inc: 11677 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11678 // CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 11679 // CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 11680 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 11681 // CHECK14: omp.inner.for.end: 11682 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11683 // CHECK14: omp.loop.exit: 11684 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 11685 // CHECK14-NEXT: ret void 11686 // 11687 // 11688 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121 11689 // CHECK14-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 11690 // CHECK14-NEXT: entry: 11691 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 11692 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 11693 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 11694 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 11695 // CHECK14-NEXT: ret void 11696 // 11697 // 11698 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..17 11699 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 11700 // CHECK14-NEXT: entry: 11701 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11702 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11703 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 11704 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11705 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 11706 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 11707 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 11708 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11709 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11710 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 11711 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11712 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11713 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 11714 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 11715 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 11716 // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 11717 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11718 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11719 // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11720 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 11721 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 11722 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11723 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 11724 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11725 // CHECK14: cond.true: 11726 // CHECK14-NEXT: br label [[COND_END:%.*]] 11727 // CHECK14: cond.false: 11728 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11729 // CHECK14-NEXT: br label [[COND_END]] 11730 // CHECK14: cond.end: 11731 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 11732 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 11733 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11734 // CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 11735 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11736 // CHECK14: omp.inner.for.cond: 11737 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11738 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11739 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 11740 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11741 // CHECK14: omp.inner.for.body: 11742 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11743 // CHECK14-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 11744 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11745 // CHECK14-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 11746 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]) 11747 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11748 // CHECK14: omp.inner.for.inc: 11749 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11750 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 11751 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 11752 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 11753 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 11754 // CHECK14: omp.inner.for.end: 11755 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11756 // CHECK14: omp.loop.exit: 11757 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 11758 // CHECK14-NEXT: ret void 11759 // 11760 // 11761 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..18 11762 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 11763 // CHECK14-NEXT: entry: 11764 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11765 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11766 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 11767 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 11768 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 11769 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11770 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 11771 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 11772 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 11773 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11774 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11775 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 11776 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11777 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11778 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 11779 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11780 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 11781 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 11782 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 11783 // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 11784 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 11785 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 11786 // CHECK14-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11787 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 11788 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 11789 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 11790 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11791 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11792 // CHECK14-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11793 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 11794 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 11795 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11796 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 11797 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11798 // CHECK14: cond.true: 11799 // CHECK14-NEXT: br label [[COND_END:%.*]] 11800 // CHECK14: cond.false: 11801 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11802 // CHECK14-NEXT: br label [[COND_END]] 11803 // CHECK14: cond.end: 11804 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 11805 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 11806 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 11807 // CHECK14-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 11808 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11809 // CHECK14: omp.inner.for.cond: 11810 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11811 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11812 // CHECK14-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 11813 // CHECK14-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11814 // CHECK14: omp.inner.for.body: 11815 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11816 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 11817 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 11818 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4 11819 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 11820 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 11821 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 11822 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 11823 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 11824 // CHECK14: omp.body.continue: 11825 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11826 // CHECK14: omp.inner.for.inc: 11827 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11828 // CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 11829 // CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 11830 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 11831 // CHECK14: omp.inner.for.end: 11832 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11833 // CHECK14: omp.loop.exit: 11834 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 11835 // CHECK14-NEXT: ret void 11836 // 11837 // 11838 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126 11839 // CHECK14-SAME: (i64 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 11840 // CHECK14-NEXT: entry: 11841 // CHECK14-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 11842 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 11843 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 11844 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 11845 // CHECK14-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 11846 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 11847 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* 11848 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 11849 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8 11850 // CHECK14-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 11851 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 11852 // CHECK14-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 11853 // CHECK14-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 11854 // CHECK14-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 11855 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]]) 11856 // CHECK14-NEXT: ret void 11857 // 11858 // 11859 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..21 11860 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 11861 // CHECK14-NEXT: entry: 11862 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11863 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11864 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 11865 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 11866 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11867 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 11868 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 11869 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 11870 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11871 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11872 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 11873 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 11874 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11875 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11876 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 11877 // CHECK14-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 11878 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 11879 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 11880 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 11881 // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 11882 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11883 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11884 // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11885 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 11886 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 11887 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11888 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 11889 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11890 // CHECK14: cond.true: 11891 // CHECK14-NEXT: br label [[COND_END:%.*]] 11892 // CHECK14: cond.false: 11893 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11894 // CHECK14-NEXT: br label [[COND_END]] 11895 // CHECK14: cond.end: 11896 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 11897 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 11898 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11899 // CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 11900 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11901 // CHECK14: omp.inner.for.cond: 11902 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11903 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11904 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 11905 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11906 // CHECK14: omp.inner.for.body: 11907 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 11908 // CHECK14-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 11909 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 11910 // CHECK14-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 11911 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8 11912 // CHECK14-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 11913 // CHECK14-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4 11914 // CHECK14-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 11915 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]]) 11916 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 11917 // CHECK14: omp.inner.for.inc: 11918 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11919 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 11920 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 11921 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 11922 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 11923 // CHECK14: omp.inner.for.end: 11924 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 11925 // CHECK14: omp.loop.exit: 11926 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 11927 // CHECK14-NEXT: ret void 11928 // 11929 // 11930 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..22 11931 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 11932 // CHECK14-NEXT: entry: 11933 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 11934 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 11935 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 11936 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 11937 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 11938 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 11939 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 11940 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 11941 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 11942 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 11943 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 11944 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 11945 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 11946 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 11947 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 11948 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 11949 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11950 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 11951 // CHECK14-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 11952 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 11953 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 11954 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 11955 // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 11956 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 11957 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 11958 // CHECK14-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11959 // CHECK14-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 11960 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4 11961 // CHECK14-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 11962 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 11963 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 11964 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8 11965 // CHECK14-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 11966 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 11967 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]]) 11968 // CHECK14-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 11969 // CHECK14: omp.dispatch.cond: 11970 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11971 // CHECK14-NEXT: [[CONV3:%.*]] = sext i32 [[TMP6]] to i64 11972 // CHECK14-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11973 // CHECK14-NEXT: [[CMP:%.*]] = icmp ugt i64 [[CONV3]], [[TMP7]] 11974 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 11975 // CHECK14: cond.true: 11976 // CHECK14-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 11977 // CHECK14-NEXT: br label [[COND_END:%.*]] 11978 // CHECK14: cond.false: 11979 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11980 // CHECK14-NEXT: [[CONV4:%.*]] = sext i32 [[TMP9]] to i64 11981 // CHECK14-NEXT: br label [[COND_END]] 11982 // CHECK14: cond.end: 11983 // CHECK14-NEXT: [[COND:%.*]] = phi i64 [ [[TMP8]], [[COND_TRUE]] ], [ [[CONV4]], [[COND_FALSE]] ] 11984 // CHECK14-NEXT: [[CONV5:%.*]] = trunc i64 [[COND]] to i32 11985 // CHECK14-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 11986 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 11987 // CHECK14-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 11988 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11989 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11990 // CHECK14-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 11991 // CHECK14-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 11992 // CHECK14: omp.dispatch.body: 11993 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 11994 // CHECK14: omp.inner.for.cond: 11995 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 11996 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 11997 // CHECK14-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 11998 // CHECK14-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 11999 // CHECK14: omp.inner.for.body: 12000 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12001 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 12002 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 12003 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4 12004 // CHECK14-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4 12005 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 12006 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 12007 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 12008 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 12009 // CHECK14: omp.body.continue: 12010 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12011 // CHECK14: omp.inner.for.inc: 12012 // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12013 // CHECK14-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], 1 12014 // CHECK14-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 12015 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 12016 // CHECK14: omp.inner.for.end: 12017 // CHECK14-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 12018 // CHECK14: omp.dispatch.inc: 12019 // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 12020 // CHECK14-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 12021 // CHECK14-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 12022 // CHECK14-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4 12023 // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12024 // CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 12025 // CHECK14-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 12026 // CHECK14-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4 12027 // CHECK14-NEXT: br label [[OMP_DISPATCH_COND]] 12028 // CHECK14: omp.dispatch.end: 12029 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 12030 // CHECK14-NEXT: ret void 12031 // 12032 // 12033 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131 12034 // CHECK14-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 12035 // CHECK14-NEXT: entry: 12036 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 12037 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 12038 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 12039 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 12040 // CHECK14-NEXT: ret void 12041 // 12042 // 12043 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..25 12044 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 12045 // CHECK14-NEXT: entry: 12046 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 12047 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 12048 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 12049 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12050 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 12051 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 12052 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 12053 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12054 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12055 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 12056 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 12057 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 12058 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 12059 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 12060 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 12061 // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 12062 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12063 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 12064 // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 12065 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 12066 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 12067 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12068 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 12069 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12070 // CHECK14: cond.true: 12071 // CHECK14-NEXT: br label [[COND_END:%.*]] 12072 // CHECK14: cond.false: 12073 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12074 // CHECK14-NEXT: br label [[COND_END]] 12075 // CHECK14: cond.end: 12076 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 12077 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 12078 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 12079 // CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 12080 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12081 // CHECK14: omp.inner.for.cond: 12082 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12083 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12084 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 12085 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12086 // CHECK14: omp.inner.for.body: 12087 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 12088 // CHECK14-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 12089 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12090 // CHECK14-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 12091 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]) 12092 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12093 // CHECK14: omp.inner.for.inc: 12094 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12095 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 12096 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 12097 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 12098 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 12099 // CHECK14: omp.inner.for.end: 12100 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12101 // CHECK14: omp.loop.exit: 12102 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 12103 // CHECK14-NEXT: ret void 12104 // 12105 // 12106 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..26 12107 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 12108 // CHECK14-NEXT: entry: 12109 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 12110 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 12111 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 12112 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 12113 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 12114 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12115 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 12116 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 12117 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 12118 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12119 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12120 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 12121 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 12122 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 12123 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 12124 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 12125 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 12126 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 12127 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 12128 // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 12129 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 12130 // CHECK14-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 12131 // CHECK14-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 12132 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 12133 // CHECK14-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 12134 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 12135 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12136 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 12137 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 12138 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12139 // CHECK14-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 12140 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 12141 // CHECK14-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 12142 // CHECK14-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 12143 // CHECK14: omp.dispatch.cond: 12144 // CHECK14-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 12145 // CHECK14-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 12146 // CHECK14-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 12147 // CHECK14: omp.dispatch.body: 12148 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 12149 // CHECK14-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 12150 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12151 // CHECK14: omp.inner.for.cond: 12152 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 12153 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !20 12154 // CHECK14-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 12155 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12156 // CHECK14: omp.inner.for.body: 12157 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 12158 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 12159 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 12160 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !20 12161 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !20 12162 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 12163 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 12164 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !20 12165 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 12166 // CHECK14: omp.body.continue: 12167 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12168 // CHECK14: omp.inner.for.inc: 12169 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 12170 // CHECK14-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 12171 // CHECK14-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 12172 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]] 12173 // CHECK14: omp.inner.for.end: 12174 // CHECK14-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 12175 // CHECK14: omp.dispatch.inc: 12176 // CHECK14-NEXT: br label [[OMP_DISPATCH_COND]] 12177 // CHECK14: omp.dispatch.end: 12178 // CHECK14-NEXT: ret void 12179 // 12180 // 12181 // CHECK14-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136 12182 // CHECK14-SAME: (i64 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 12183 // CHECK14-NEXT: entry: 12184 // CHECK14-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 12185 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 12186 // CHECK14-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 12187 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 12188 // CHECK14-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 12189 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 12190 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* 12191 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 12192 // CHECK14-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8 12193 // CHECK14-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 12194 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 12195 // CHECK14-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 12196 // CHECK14-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 12197 // CHECK14-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 12198 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]]) 12199 // CHECK14-NEXT: ret void 12200 // 12201 // 12202 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..29 12203 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 12204 // CHECK14-NEXT: entry: 12205 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 12206 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 12207 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 12208 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 12209 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12210 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 12211 // CHECK14-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 12212 // CHECK14-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 12213 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12214 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12215 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 12216 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 12217 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 12218 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 12219 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 12220 // CHECK14-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 12221 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 12222 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 12223 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 12224 // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 12225 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12226 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 12227 // CHECK14-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 12228 // CHECK14-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 12229 // CHECK14-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 12230 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12231 // CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 12232 // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12233 // CHECK14: cond.true: 12234 // CHECK14-NEXT: br label [[COND_END:%.*]] 12235 // CHECK14: cond.false: 12236 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12237 // CHECK14-NEXT: br label [[COND_END]] 12238 // CHECK14: cond.end: 12239 // CHECK14-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 12240 // CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 12241 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 12242 // CHECK14-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 12243 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12244 // CHECK14: omp.inner.for.cond: 12245 // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12246 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12247 // CHECK14-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 12248 // CHECK14-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12249 // CHECK14: omp.inner.for.body: 12250 // CHECK14-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 12251 // CHECK14-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 12252 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12253 // CHECK14-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 12254 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8 12255 // CHECK14-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 12256 // CHECK14-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4 12257 // CHECK14-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 12258 // CHECK14-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]]) 12259 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12260 // CHECK14: omp.inner.for.inc: 12261 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12262 // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 12263 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 12264 // CHECK14-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 12265 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] 12266 // CHECK14: omp.inner.for.end: 12267 // CHECK14-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12268 // CHECK14: omp.loop.exit: 12269 // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 12270 // CHECK14-NEXT: ret void 12271 // 12272 // 12273 // CHECK14-LABEL: define {{[^@]+}}@.omp_outlined..30 12274 // CHECK14-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 12275 // CHECK14-NEXT: entry: 12276 // CHECK14-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 12277 // CHECK14-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 12278 // CHECK14-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 12279 // CHECK14-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 12280 // CHECK14-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 12281 // CHECK14-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 12282 // CHECK14-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12283 // CHECK14-NEXT: [[TMP:%.*]] = alloca i32, align 4 12284 // CHECK14-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 12285 // CHECK14-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 12286 // CHECK14-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12287 // CHECK14-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12288 // CHECK14-NEXT: [[I:%.*]] = alloca i32, align 4 12289 // CHECK14-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 12290 // CHECK14-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 12291 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 12292 // CHECK14-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 12293 // CHECK14-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 12294 // CHECK14-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 12295 // CHECK14-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 12296 // CHECK14-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 12297 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 12298 // CHECK14-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 12299 // CHECK14-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 12300 // CHECK14-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 12301 // CHECK14-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 12302 // CHECK14-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 12303 // CHECK14-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4 12304 // CHECK14-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 12305 // CHECK14-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12306 // CHECK14-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 12307 // CHECK14-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8 12308 // CHECK14-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 12309 // CHECK14-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12310 // CHECK14-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 12311 // CHECK14-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 12312 // CHECK14-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]]) 12313 // CHECK14-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 12314 // CHECK14: omp.dispatch.cond: 12315 // CHECK14-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 12316 // CHECK14-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0 12317 // CHECK14-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 12318 // CHECK14: omp.dispatch.body: 12319 // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 12320 // CHECK14-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 12321 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12322 // CHECK14: omp.inner.for.cond: 12323 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 12324 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !23 12325 // CHECK14-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 12326 // CHECK14-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12327 // CHECK14: omp.inner.for.body: 12328 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 12329 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 12330 // CHECK14-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 12331 // CHECK14-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !23 12332 // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !23 12333 // CHECK14-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 12334 // CHECK14-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 12335 // CHECK14-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !23 12336 // CHECK14-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 12337 // CHECK14: omp.body.continue: 12338 // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12339 // CHECK14: omp.inner.for.inc: 12340 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 12341 // CHECK14-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1 12342 // CHECK14-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 12343 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]] 12344 // CHECK14: omp.inner.for.end: 12345 // CHECK14-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 12346 // CHECK14: omp.dispatch.inc: 12347 // CHECK14-NEXT: br label [[OMP_DISPATCH_COND]] 12348 // CHECK14: omp.dispatch.end: 12349 // CHECK14-NEXT: ret void 12350 // 12351 // 12352 // CHECK14-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 12353 // CHECK14-SAME: () #[[ATTR5:[0-9]+]] { 12354 // CHECK14-NEXT: entry: 12355 // CHECK14-NEXT: call void @__tgt_register_requires(i64 1) 12356 // CHECK14-NEXT: ret void 12357 // 12358 // 12359 // CHECK15-LABEL: define {{[^@]+}}@main 12360 // CHECK15-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 12361 // CHECK15-NEXT: entry: 12362 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 12363 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 12364 // CHECK15-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 12365 // CHECK15-NEXT: [[N:%.*]] = alloca i32, align 4 12366 // CHECK15-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 12367 // CHECK15-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 12368 // CHECK15-NEXT: [[M:%.*]] = alloca i32, align 4 12369 // CHECK15-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 12370 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 12371 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 12372 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 12373 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4 12374 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 12375 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 12376 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 12377 // CHECK15-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4 12378 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4 12379 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4 12380 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4 12381 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4 12382 // CHECK15-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 12383 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 12384 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 12385 // CHECK15-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4 12386 // CHECK15-NEXT: [[N_CASTED17:%.*]] = alloca i32, align 4 12387 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS18:%.*]] = alloca [4 x i8*], align 4 12388 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS19:%.*]] = alloca [4 x i8*], align 4 12389 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS20:%.*]] = alloca [4 x i8*], align 4 12390 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES21:%.*]] = alloca [4 x i64], align 4 12391 // CHECK15-NEXT: [[_TMP22:%.*]] = alloca i32, align 4 12392 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_23:%.*]] = alloca i32, align 4 12393 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4 12394 // CHECK15-NEXT: [[N_CASTED31:%.*]] = alloca i32, align 4 12395 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS32:%.*]] = alloca [3 x i8*], align 4 12396 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS33:%.*]] = alloca [3 x i8*], align 4 12397 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS34:%.*]] = alloca [3 x i8*], align 4 12398 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES35:%.*]] = alloca [3 x i64], align 4 12399 // CHECK15-NEXT: [[_TMP36:%.*]] = alloca i32, align 4 12400 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_37:%.*]] = alloca i32, align 4 12401 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4 12402 // CHECK15-NEXT: [[M_CASTED45:%.*]] = alloca i32, align 4 12403 // CHECK15-NEXT: [[N_CASTED46:%.*]] = alloca i32, align 4 12404 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS47:%.*]] = alloca [4 x i8*], align 4 12405 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS48:%.*]] = alloca [4 x i8*], align 4 12406 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS49:%.*]] = alloca [4 x i8*], align 4 12407 // CHECK15-NEXT: [[DOTOFFLOAD_SIZES50:%.*]] = alloca [4 x i64], align 4 12408 // CHECK15-NEXT: [[_TMP51:%.*]] = alloca i32, align 4 12409 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_52:%.*]] = alloca i32, align 4 12410 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_53:%.*]] = alloca i32, align 4 12411 // CHECK15-NEXT: store i32 0, i32* [[RETVAL]], align 4 12412 // CHECK15-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 12413 // CHECK15-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 12414 // CHECK15-NEXT: store i32 100, i32* [[N]], align 4 12415 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 12416 // CHECK15-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 12417 // CHECK15-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 12418 // CHECK15-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 12419 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 12420 // CHECK15-NEXT: store i32 10, i32* [[M]], align 4 12421 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 12422 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 12423 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 12424 // CHECK15-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4 12425 // CHECK15-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64 12426 // CHECK15-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 12427 // CHECK15-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32* 12428 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[TMP7]], align 4 12429 // CHECK15-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 12430 // CHECK15-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32* 12431 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[TMP9]], align 4 12432 // CHECK15-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 12433 // CHECK15-NEXT: store i64 4, i64* [[TMP10]], align 4 12434 // CHECK15-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 12435 // CHECK15-NEXT: store i8* null, i8** [[TMP11]], align 4 12436 // CHECK15-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 12437 // CHECK15-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 12438 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4 12439 // CHECK15-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 12440 // CHECK15-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 12441 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4 12442 // CHECK15-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 12443 // CHECK15-NEXT: store i64 4, i64* [[TMP16]], align 4 12444 // CHECK15-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 12445 // CHECK15-NEXT: store i8* null, i8** [[TMP17]], align 4 12446 // CHECK15-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 12447 // CHECK15-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32** 12448 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 4 12449 // CHECK15-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 12450 // CHECK15-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32** 12451 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 4 12452 // CHECK15-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 12453 // CHECK15-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 4 12454 // CHECK15-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 12455 // CHECK15-NEXT: store i8* null, i8** [[TMP23]], align 4 12456 // CHECK15-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 12457 // CHECK15-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 12458 // CHECK15-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 12459 // CHECK15-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4 12460 // CHECK15-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4 12461 // CHECK15-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 12462 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0 12463 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 12464 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 12465 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 12466 // CHECK15-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12467 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1 12468 // CHECK15-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64 12469 // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]]) 12470 // CHECK15-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 12471 // CHECK15-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 12472 // CHECK15-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 12473 // CHECK15: omp_offload.failed: 12474 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 12475 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT]] 12476 // CHECK15: omp_offload.cont: 12477 // CHECK15-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4 12478 // CHECK15-NEXT: store i32 [[TMP33]], i32* [[N_CASTED3]], align 4 12479 // CHECK15-NEXT: [[TMP34:%.*]] = load i32, i32* [[N_CASTED3]], align 4 12480 // CHECK15-NEXT: [[TMP35:%.*]] = mul nuw i32 [[TMP0]], 4 12481 // CHECK15-NEXT: [[TMP36:%.*]] = sext i32 [[TMP35]] to i64 12482 // CHECK15-NEXT: [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 12483 // CHECK15-NEXT: [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32* 12484 // CHECK15-NEXT: store i32 [[TMP34]], i32* [[TMP38]], align 4 12485 // CHECK15-NEXT: [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 12486 // CHECK15-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32* 12487 // CHECK15-NEXT: store i32 [[TMP34]], i32* [[TMP40]], align 4 12488 // CHECK15-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0 12489 // CHECK15-NEXT: store i64 4, i64* [[TMP41]], align 4 12490 // CHECK15-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0 12491 // CHECK15-NEXT: store i8* null, i8** [[TMP42]], align 4 12492 // CHECK15-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 12493 // CHECK15-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i32* 12494 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP44]], align 4 12495 // CHECK15-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 12496 // CHECK15-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32* 12497 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP46]], align 4 12498 // CHECK15-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 1 12499 // CHECK15-NEXT: store i64 4, i64* [[TMP47]], align 4 12500 // CHECK15-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1 12501 // CHECK15-NEXT: store i8* null, i8** [[TMP48]], align 4 12502 // CHECK15-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 12503 // CHECK15-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32** 12504 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP50]], align 4 12505 // CHECK15-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 12506 // CHECK15-NEXT: [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32** 12507 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP52]], align 4 12508 // CHECK15-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2 12509 // CHECK15-NEXT: store i64 [[TMP36]], i64* [[TMP53]], align 4 12510 // CHECK15-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2 12511 // CHECK15-NEXT: store i8* null, i8** [[TMP54]], align 4 12512 // CHECK15-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 12513 // CHECK15-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 12514 // CHECK15-NEXT: [[TMP57:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0 12515 // CHECK15-NEXT: [[TMP58:%.*]] = load i32, i32* [[N]], align 4 12516 // CHECK15-NEXT: store i32 [[TMP58]], i32* [[DOTCAPTURE_EXPR_9]], align 4 12517 // CHECK15-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4 12518 // CHECK15-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP59]], 0 12519 // CHECK15-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 12520 // CHECK15-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 12521 // CHECK15-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4 12522 // CHECK15-NEXT: [[TMP60:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 12523 // CHECK15-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP60]], 1 12524 // CHECK15-NEXT: [[TMP61:%.*]] = zext i32 [[ADD14]] to i64 12525 // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP61]]) 12526 // CHECK15-NEXT: [[TMP62:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, i32 3, i8** [[TMP55]], i8** [[TMP56]], i64* [[TMP57]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 12527 // CHECK15-NEXT: [[TMP63:%.*]] = icmp ne i32 [[TMP62]], 0 12528 // CHECK15-NEXT: br i1 [[TMP63]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]] 12529 // CHECK15: omp_offload.failed15: 12530 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i32 [[TMP34]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 12531 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT16]] 12532 // CHECK15: omp_offload.cont16: 12533 // CHECK15-NEXT: [[TMP64:%.*]] = load i32, i32* [[M]], align 4 12534 // CHECK15-NEXT: store i32 [[TMP64]], i32* [[M_CASTED]], align 4 12535 // CHECK15-NEXT: [[TMP65:%.*]] = load i32, i32* [[M_CASTED]], align 4 12536 // CHECK15-NEXT: [[TMP66:%.*]] = load i32, i32* [[N]], align 4 12537 // CHECK15-NEXT: store i32 [[TMP66]], i32* [[N_CASTED17]], align 4 12538 // CHECK15-NEXT: [[TMP67:%.*]] = load i32, i32* [[N_CASTED17]], align 4 12539 // CHECK15-NEXT: [[TMP68:%.*]] = mul nuw i32 [[TMP0]], 4 12540 // CHECK15-NEXT: [[TMP69:%.*]] = sext i32 [[TMP68]] to i64 12541 // CHECK15-NEXT: [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0 12542 // CHECK15-NEXT: [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i32* 12543 // CHECK15-NEXT: store i32 [[TMP65]], i32* [[TMP71]], align 4 12544 // CHECK15-NEXT: [[TMP72:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0 12545 // CHECK15-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to i32* 12546 // CHECK15-NEXT: store i32 [[TMP65]], i32* [[TMP73]], align 4 12547 // CHECK15-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0 12548 // CHECK15-NEXT: store i64 4, i64* [[TMP74]], align 4 12549 // CHECK15-NEXT: [[TMP75:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 0 12550 // CHECK15-NEXT: store i8* null, i8** [[TMP75]], align 4 12551 // CHECK15-NEXT: [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 1 12552 // CHECK15-NEXT: [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i32* 12553 // CHECK15-NEXT: store i32 [[TMP67]], i32* [[TMP77]], align 4 12554 // CHECK15-NEXT: [[TMP78:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 1 12555 // CHECK15-NEXT: [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i32* 12556 // CHECK15-NEXT: store i32 [[TMP67]], i32* [[TMP79]], align 4 12557 // CHECK15-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 1 12558 // CHECK15-NEXT: store i64 4, i64* [[TMP80]], align 4 12559 // CHECK15-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 1 12560 // CHECK15-NEXT: store i8* null, i8** [[TMP81]], align 4 12561 // CHECK15-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 2 12562 // CHECK15-NEXT: [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i32* 12563 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP83]], align 4 12564 // CHECK15-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 2 12565 // CHECK15-NEXT: [[TMP85:%.*]] = bitcast i8** [[TMP84]] to i32* 12566 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP85]], align 4 12567 // CHECK15-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 2 12568 // CHECK15-NEXT: store i64 4, i64* [[TMP86]], align 4 12569 // CHECK15-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 2 12570 // CHECK15-NEXT: store i8* null, i8** [[TMP87]], align 4 12571 // CHECK15-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 3 12572 // CHECK15-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32** 12573 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP89]], align 4 12574 // CHECK15-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 3 12575 // CHECK15-NEXT: [[TMP91:%.*]] = bitcast i8** [[TMP90]] to i32** 12576 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP91]], align 4 12577 // CHECK15-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 3 12578 // CHECK15-NEXT: store i64 [[TMP69]], i64* [[TMP92]], align 4 12579 // CHECK15-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 3 12580 // CHECK15-NEXT: store i8* null, i8** [[TMP93]], align 4 12581 // CHECK15-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0 12582 // CHECK15-NEXT: [[TMP95:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0 12583 // CHECK15-NEXT: [[TMP96:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0 12584 // CHECK15-NEXT: [[TMP97:%.*]] = load i32, i32* [[N]], align 4 12585 // CHECK15-NEXT: store i32 [[TMP97]], i32* [[DOTCAPTURE_EXPR_23]], align 4 12586 // CHECK15-NEXT: [[TMP98:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_23]], align 4 12587 // CHECK15-NEXT: [[SUB25:%.*]] = sub nsw i32 [[TMP98]], 0 12588 // CHECK15-NEXT: [[DIV26:%.*]] = sdiv i32 [[SUB25]], 1 12589 // CHECK15-NEXT: [[SUB27:%.*]] = sub nsw i32 [[DIV26]], 1 12590 // CHECK15-NEXT: store i32 [[SUB27]], i32* [[DOTCAPTURE_EXPR_24]], align 4 12591 // CHECK15-NEXT: [[TMP99:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4 12592 // CHECK15-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP99]], 1 12593 // CHECK15-NEXT: [[TMP100:%.*]] = zext i32 [[ADD28]] to i64 12594 // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP100]]) 12595 // CHECK15-NEXT: [[TMP101:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, i32 4, i8** [[TMP94]], i8** [[TMP95]], i64* [[TMP96]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 12596 // CHECK15-NEXT: [[TMP102:%.*]] = icmp ne i32 [[TMP101]], 0 12597 // CHECK15-NEXT: br i1 [[TMP102]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]] 12598 // CHECK15: omp_offload.failed29: 12599 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i32 [[TMP65]], i32 [[TMP67]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 12600 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT30]] 12601 // CHECK15: omp_offload.cont30: 12602 // CHECK15-NEXT: [[TMP103:%.*]] = load i32, i32* [[N]], align 4 12603 // CHECK15-NEXT: store i32 [[TMP103]], i32* [[N_CASTED31]], align 4 12604 // CHECK15-NEXT: [[TMP104:%.*]] = load i32, i32* [[N_CASTED31]], align 4 12605 // CHECK15-NEXT: [[TMP105:%.*]] = mul nuw i32 [[TMP0]], 4 12606 // CHECK15-NEXT: [[TMP106:%.*]] = sext i32 [[TMP105]] to i64 12607 // CHECK15-NEXT: [[TMP107:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0 12608 // CHECK15-NEXT: [[TMP108:%.*]] = bitcast i8** [[TMP107]] to i32* 12609 // CHECK15-NEXT: store i32 [[TMP104]], i32* [[TMP108]], align 4 12610 // CHECK15-NEXT: [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0 12611 // CHECK15-NEXT: [[TMP110:%.*]] = bitcast i8** [[TMP109]] to i32* 12612 // CHECK15-NEXT: store i32 [[TMP104]], i32* [[TMP110]], align 4 12613 // CHECK15-NEXT: [[TMP111:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 0 12614 // CHECK15-NEXT: store i64 4, i64* [[TMP111]], align 4 12615 // CHECK15-NEXT: [[TMP112:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 0 12616 // CHECK15-NEXT: store i8* null, i8** [[TMP112]], align 4 12617 // CHECK15-NEXT: [[TMP113:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 1 12618 // CHECK15-NEXT: [[TMP114:%.*]] = bitcast i8** [[TMP113]] to i32* 12619 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP114]], align 4 12620 // CHECK15-NEXT: [[TMP115:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 1 12621 // CHECK15-NEXT: [[TMP116:%.*]] = bitcast i8** [[TMP115]] to i32* 12622 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP116]], align 4 12623 // CHECK15-NEXT: [[TMP117:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 1 12624 // CHECK15-NEXT: store i64 4, i64* [[TMP117]], align 4 12625 // CHECK15-NEXT: [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 1 12626 // CHECK15-NEXT: store i8* null, i8** [[TMP118]], align 4 12627 // CHECK15-NEXT: [[TMP119:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 2 12628 // CHECK15-NEXT: [[TMP120:%.*]] = bitcast i8** [[TMP119]] to i32** 12629 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP120]], align 4 12630 // CHECK15-NEXT: [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 2 12631 // CHECK15-NEXT: [[TMP122:%.*]] = bitcast i8** [[TMP121]] to i32** 12632 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP122]], align 4 12633 // CHECK15-NEXT: [[TMP123:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 2 12634 // CHECK15-NEXT: store i64 [[TMP106]], i64* [[TMP123]], align 4 12635 // CHECK15-NEXT: [[TMP124:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 2 12636 // CHECK15-NEXT: store i8* null, i8** [[TMP124]], align 4 12637 // CHECK15-NEXT: [[TMP125:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0 12638 // CHECK15-NEXT: [[TMP126:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0 12639 // CHECK15-NEXT: [[TMP127:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 0 12640 // CHECK15-NEXT: [[TMP128:%.*]] = load i32, i32* [[N]], align 4 12641 // CHECK15-NEXT: store i32 [[TMP128]], i32* [[DOTCAPTURE_EXPR_37]], align 4 12642 // CHECK15-NEXT: [[TMP129:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_37]], align 4 12643 // CHECK15-NEXT: [[SUB39:%.*]] = sub nsw i32 [[TMP129]], 0 12644 // CHECK15-NEXT: [[DIV40:%.*]] = sdiv i32 [[SUB39]], 1 12645 // CHECK15-NEXT: [[SUB41:%.*]] = sub nsw i32 [[DIV40]], 1 12646 // CHECK15-NEXT: store i32 [[SUB41]], i32* [[DOTCAPTURE_EXPR_38]], align 4 12647 // CHECK15-NEXT: [[TMP130:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_38]], align 4 12648 // CHECK15-NEXT: [[ADD42:%.*]] = add nsw i32 [[TMP130]], 1 12649 // CHECK15-NEXT: [[TMP131:%.*]] = zext i32 [[ADD42]] to i64 12650 // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP131]]) 12651 // CHECK15-NEXT: [[TMP132:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, i32 3, i8** [[TMP125]], i8** [[TMP126]], i64* [[TMP127]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 12652 // CHECK15-NEXT: [[TMP133:%.*]] = icmp ne i32 [[TMP132]], 0 12653 // CHECK15-NEXT: br i1 [[TMP133]], label [[OMP_OFFLOAD_FAILED43:%.*]], label [[OMP_OFFLOAD_CONT44:%.*]] 12654 // CHECK15: omp_offload.failed43: 12655 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i32 [[TMP104]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 12656 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT44]] 12657 // CHECK15: omp_offload.cont44: 12658 // CHECK15-NEXT: [[TMP134:%.*]] = load i32, i32* [[M]], align 4 12659 // CHECK15-NEXT: store i32 [[TMP134]], i32* [[M_CASTED45]], align 4 12660 // CHECK15-NEXT: [[TMP135:%.*]] = load i32, i32* [[M_CASTED45]], align 4 12661 // CHECK15-NEXT: [[TMP136:%.*]] = load i32, i32* [[N]], align 4 12662 // CHECK15-NEXT: store i32 [[TMP136]], i32* [[N_CASTED46]], align 4 12663 // CHECK15-NEXT: [[TMP137:%.*]] = load i32, i32* [[N_CASTED46]], align 4 12664 // CHECK15-NEXT: [[TMP138:%.*]] = mul nuw i32 [[TMP0]], 4 12665 // CHECK15-NEXT: [[TMP139:%.*]] = sext i32 [[TMP138]] to i64 12666 // CHECK15-NEXT: [[TMP140:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0 12667 // CHECK15-NEXT: [[TMP141:%.*]] = bitcast i8** [[TMP140]] to i32* 12668 // CHECK15-NEXT: store i32 [[TMP135]], i32* [[TMP141]], align 4 12669 // CHECK15-NEXT: [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0 12670 // CHECK15-NEXT: [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i32* 12671 // CHECK15-NEXT: store i32 [[TMP135]], i32* [[TMP143]], align 4 12672 // CHECK15-NEXT: [[TMP144:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 0 12673 // CHECK15-NEXT: store i64 4, i64* [[TMP144]], align 4 12674 // CHECK15-NEXT: [[TMP145:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 0 12675 // CHECK15-NEXT: store i8* null, i8** [[TMP145]], align 4 12676 // CHECK15-NEXT: [[TMP146:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 1 12677 // CHECK15-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i32* 12678 // CHECK15-NEXT: store i32 [[TMP137]], i32* [[TMP147]], align 4 12679 // CHECK15-NEXT: [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 1 12680 // CHECK15-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i32* 12681 // CHECK15-NEXT: store i32 [[TMP137]], i32* [[TMP149]], align 4 12682 // CHECK15-NEXT: [[TMP150:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 1 12683 // CHECK15-NEXT: store i64 4, i64* [[TMP150]], align 4 12684 // CHECK15-NEXT: [[TMP151:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 1 12685 // CHECK15-NEXT: store i8* null, i8** [[TMP151]], align 4 12686 // CHECK15-NEXT: [[TMP152:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 2 12687 // CHECK15-NEXT: [[TMP153:%.*]] = bitcast i8** [[TMP152]] to i32* 12688 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP153]], align 4 12689 // CHECK15-NEXT: [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 2 12690 // CHECK15-NEXT: [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32* 12691 // CHECK15-NEXT: store i32 [[TMP0]], i32* [[TMP155]], align 4 12692 // CHECK15-NEXT: [[TMP156:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 2 12693 // CHECK15-NEXT: store i64 4, i64* [[TMP156]], align 4 12694 // CHECK15-NEXT: [[TMP157:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 2 12695 // CHECK15-NEXT: store i8* null, i8** [[TMP157]], align 4 12696 // CHECK15-NEXT: [[TMP158:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 3 12697 // CHECK15-NEXT: [[TMP159:%.*]] = bitcast i8** [[TMP158]] to i32** 12698 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP159]], align 4 12699 // CHECK15-NEXT: [[TMP160:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 3 12700 // CHECK15-NEXT: [[TMP161:%.*]] = bitcast i8** [[TMP160]] to i32** 12701 // CHECK15-NEXT: store i32* [[VLA]], i32** [[TMP161]], align 4 12702 // CHECK15-NEXT: [[TMP162:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 3 12703 // CHECK15-NEXT: store i64 [[TMP139]], i64* [[TMP162]], align 4 12704 // CHECK15-NEXT: [[TMP163:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 3 12705 // CHECK15-NEXT: store i8* null, i8** [[TMP163]], align 4 12706 // CHECK15-NEXT: [[TMP164:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0 12707 // CHECK15-NEXT: [[TMP165:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0 12708 // CHECK15-NEXT: [[TMP166:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 0 12709 // CHECK15-NEXT: [[TMP167:%.*]] = load i32, i32* [[N]], align 4 12710 // CHECK15-NEXT: store i32 [[TMP167]], i32* [[DOTCAPTURE_EXPR_52]], align 4 12711 // CHECK15-NEXT: [[TMP168:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_52]], align 4 12712 // CHECK15-NEXT: [[SUB54:%.*]] = sub nsw i32 [[TMP168]], 0 12713 // CHECK15-NEXT: [[DIV55:%.*]] = sdiv i32 [[SUB54]], 1 12714 // CHECK15-NEXT: [[SUB56:%.*]] = sub nsw i32 [[DIV55]], 1 12715 // CHECK15-NEXT: store i32 [[SUB56]], i32* [[DOTCAPTURE_EXPR_53]], align 4 12716 // CHECK15-NEXT: [[TMP169:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_53]], align 4 12717 // CHECK15-NEXT: [[ADD57:%.*]] = add nsw i32 [[TMP169]], 1 12718 // CHECK15-NEXT: [[TMP170:%.*]] = zext i32 [[ADD57]] to i64 12719 // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP170]]) 12720 // CHECK15-NEXT: [[TMP171:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, i32 4, i8** [[TMP164]], i8** [[TMP165]], i64* [[TMP166]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 12721 // CHECK15-NEXT: [[TMP172:%.*]] = icmp ne i32 [[TMP171]], 0 12722 // CHECK15-NEXT: br i1 [[TMP172]], label [[OMP_OFFLOAD_FAILED58:%.*]], label [[OMP_OFFLOAD_CONT59:%.*]] 12723 // CHECK15: omp_offload.failed58: 12724 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i32 [[TMP135]], i32 [[TMP137]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 12725 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT59]] 12726 // CHECK15: omp_offload.cont59: 12727 // CHECK15-NEXT: [[TMP173:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 12728 // CHECK15-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP173]]) 12729 // CHECK15-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 12730 // CHECK15-NEXT: [[TMP174:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 12731 // CHECK15-NEXT: call void @llvm.stackrestore(i8* [[TMP174]]) 12732 // CHECK15-NEXT: [[TMP175:%.*]] = load i32, i32* [[RETVAL]], align 4 12733 // CHECK15-NEXT: ret i32 [[TMP175]] 12734 // 12735 // 12736 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148 12737 // CHECK15-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 12738 // CHECK15-NEXT: entry: 12739 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 12740 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 12741 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 12742 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 12743 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 12744 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 12745 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 12746 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 12747 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 12748 // CHECK15-NEXT: ret void 12749 // 12750 // 12751 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined. 12752 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 12753 // CHECK15-NEXT: entry: 12754 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 12755 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 12756 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 12757 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 12758 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 12759 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12760 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 12761 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 12762 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 12763 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 12764 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 12765 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 12766 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12767 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12768 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 12769 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 12770 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 12771 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 12772 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 12773 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 12774 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 12775 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 12776 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 12777 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 12778 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 12779 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 12780 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 12781 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 12782 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 12783 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 12784 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 12785 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 12786 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 12787 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 12788 // CHECK15: omp.precond.then: 12789 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 12790 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12791 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 12792 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12793 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 12794 // CHECK15-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12795 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 12796 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 12797 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12798 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12799 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 12800 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12801 // CHECK15: cond.true: 12802 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12803 // CHECK15-NEXT: br label [[COND_END:%.*]] 12804 // CHECK15: cond.false: 12805 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12806 // CHECK15-NEXT: br label [[COND_END]] 12807 // CHECK15: cond.end: 12808 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 12809 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 12810 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 12811 // CHECK15-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 12812 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12813 // CHECK15: omp.inner.for.cond: 12814 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12815 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12816 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 12817 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12818 // CHECK15: omp.inner.for.body: 12819 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 12820 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 12821 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 12822 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12823 // CHECK15: omp.inner.for.inc: 12824 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12825 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 12826 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 12827 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 12828 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 12829 // CHECK15: omp.inner.for.end: 12830 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12831 // CHECK15: omp.loop.exit: 12832 // CHECK15-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12833 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 12834 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 12835 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 12836 // CHECK15: omp.precond.end: 12837 // CHECK15-NEXT: ret void 12838 // 12839 // 12840 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..1 12841 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 12842 // CHECK15-NEXT: entry: 12843 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 12844 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 12845 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 12846 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 12847 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 12848 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 12849 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 12850 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12851 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 12852 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 12853 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 12854 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 12855 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 12856 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 12857 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12858 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12859 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 12860 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 12861 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 12862 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 12863 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 12864 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 12865 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 12866 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 12867 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 12868 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 12869 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 12870 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 12871 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 12872 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 12873 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 12874 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 12875 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 12876 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 12877 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 12878 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 12879 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 12880 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 12881 // CHECK15: omp.precond.then: 12882 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 12883 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12884 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 12885 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 12886 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 12887 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 12888 // CHECK15-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 12889 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12890 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 12891 // CHECK15-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12892 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 12893 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 12894 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12895 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12896 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 12897 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 12898 // CHECK15: cond.true: 12899 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12900 // CHECK15-NEXT: br label [[COND_END:%.*]] 12901 // CHECK15: cond.false: 12902 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12903 // CHECK15-NEXT: br label [[COND_END]] 12904 // CHECK15: cond.end: 12905 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 12906 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 12907 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 12908 // CHECK15-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 12909 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 12910 // CHECK15: omp.inner.for.cond: 12911 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12912 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 12913 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 12914 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 12915 // CHECK15: omp.inner.for.body: 12916 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12917 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 12918 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 12919 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 12920 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4 12921 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]] 12922 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 12923 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 12924 // CHECK15: omp.body.continue: 12925 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 12926 // CHECK15: omp.inner.for.inc: 12927 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 12928 // CHECK15-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1 12929 // CHECK15-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 12930 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 12931 // CHECK15: omp.inner.for.end: 12932 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 12933 // CHECK15: omp.loop.exit: 12934 // CHECK15-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 12935 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 12936 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 12937 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 12938 // CHECK15: omp.precond.end: 12939 // CHECK15-NEXT: ret void 12940 // 12941 // 12942 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153 12943 // CHECK15-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 12944 // CHECK15-NEXT: entry: 12945 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 12946 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 12947 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 12948 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 12949 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 12950 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 12951 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 12952 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 12953 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 12954 // CHECK15-NEXT: ret void 12955 // 12956 // 12957 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..2 12958 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 12959 // CHECK15-NEXT: entry: 12960 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 12961 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 12962 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 12963 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 12964 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 12965 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 12966 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 12967 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 12968 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 12969 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 12970 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 12971 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 12972 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 12973 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 12974 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 12975 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 12976 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 12977 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 12978 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 12979 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 12980 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 12981 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 12982 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 12983 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 12984 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 12985 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 12986 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 12987 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 12988 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 12989 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 12990 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 12991 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 12992 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 12993 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 12994 // CHECK15: omp.precond.then: 12995 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 12996 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 12997 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 12998 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 12999 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 13000 // CHECK15-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 13001 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 13002 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 13003 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13004 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13005 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 13006 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13007 // CHECK15: cond.true: 13008 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13009 // CHECK15-NEXT: br label [[COND_END:%.*]] 13010 // CHECK15: cond.false: 13011 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13012 // CHECK15-NEXT: br label [[COND_END]] 13013 // CHECK15: cond.end: 13014 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 13015 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 13016 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 13017 // CHECK15-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 13018 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13019 // CHECK15: omp.inner.for.cond: 13020 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13021 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13022 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 13023 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13024 // CHECK15: omp.inner.for.body: 13025 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 13026 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13027 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 13028 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13029 // CHECK15: omp.inner.for.inc: 13030 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13031 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 13032 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 13033 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 13034 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 13035 // CHECK15: omp.inner.for.end: 13036 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 13037 // CHECK15: omp.loop.exit: 13038 // CHECK15-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 13039 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 13040 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 13041 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 13042 // CHECK15: omp.precond.end: 13043 // CHECK15-NEXT: ret void 13044 // 13045 // 13046 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..3 13047 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 13048 // CHECK15-NEXT: entry: 13049 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 13050 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 13051 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 13052 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 13053 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 13054 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 13055 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 13056 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13057 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 13058 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 13059 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 13060 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 13061 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 13062 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 13063 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13064 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13065 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 13066 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 13067 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 13068 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 13069 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 13070 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 13071 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 13072 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 13073 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 13074 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 13075 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 13076 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 13077 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 13078 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 13079 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 13080 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 13081 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 13082 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 13083 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 13084 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 13085 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 13086 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 13087 // CHECK15: omp.precond.then: 13088 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 13089 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13090 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 13091 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 13092 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 13093 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 13094 // CHECK15-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 13095 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 13096 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 13097 // CHECK15-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 13098 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 13099 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 13100 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13101 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13102 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 13103 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13104 // CHECK15: cond.true: 13105 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13106 // CHECK15-NEXT: br label [[COND_END:%.*]] 13107 // CHECK15: cond.false: 13108 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13109 // CHECK15-NEXT: br label [[COND_END]] 13110 // CHECK15: cond.end: 13111 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 13112 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 13113 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 13114 // CHECK15-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 13115 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13116 // CHECK15: omp.inner.for.cond: 13117 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13118 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13119 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 13120 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13121 // CHECK15: omp.inner.for.body: 13122 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13123 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 13124 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 13125 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 13126 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4 13127 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]] 13128 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 13129 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 13130 // CHECK15: omp.body.continue: 13131 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13132 // CHECK15: omp.inner.for.inc: 13133 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13134 // CHECK15-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1 13135 // CHECK15-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 13136 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 13137 // CHECK15: omp.inner.for.end: 13138 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 13139 // CHECK15: omp.loop.exit: 13140 // CHECK15-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 13141 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 13142 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 13143 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 13144 // CHECK15: omp.precond.end: 13145 // CHECK15-NEXT: ret void 13146 // 13147 // 13148 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158 13149 // CHECK15-SAME: (i32 [[M:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 13150 // CHECK15-NEXT: entry: 13151 // CHECK15-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 13152 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 13153 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 13154 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 13155 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 13156 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 13157 // CHECK15-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 13158 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 13159 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 13160 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 13161 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 13162 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 13163 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4 13164 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 13165 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 13166 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 13167 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 13168 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]]) 13169 // CHECK15-NEXT: ret void 13170 // 13171 // 13172 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..5 13173 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 13174 // CHECK15-NEXT: entry: 13175 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 13176 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 13177 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 13178 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 13179 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 13180 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 13181 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13182 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 13183 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 13184 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 13185 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 13186 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 13187 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 13188 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13189 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13190 // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4 13191 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 13192 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 13193 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 13194 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 13195 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 13196 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 13197 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 13198 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 13199 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 13200 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 13201 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 13202 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 13203 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13204 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 13205 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 13206 // CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 13207 // CHECK15-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 13208 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 13209 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13210 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 13211 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 13212 // CHECK15: omp.precond.then: 13213 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 13214 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 13215 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 13216 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 13217 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 13218 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 13219 // CHECK15-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 13220 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 13221 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]]) 13222 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13223 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 13224 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 13225 // CHECK15-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13226 // CHECK15: cond.true: 13227 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 13228 // CHECK15-NEXT: br label [[COND_END:%.*]] 13229 // CHECK15: cond.false: 13230 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13231 // CHECK15-NEXT: br label [[COND_END]] 13232 // CHECK15: cond.end: 13233 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 13234 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 13235 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 13236 // CHECK15-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 13237 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13238 // CHECK15: omp.inner.for.cond: 13239 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13240 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 13241 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1 13242 // CHECK15-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]] 13243 // CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13244 // CHECK15: omp.inner.for.body: 13245 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 13246 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13247 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 13248 // CHECK15-NEXT: store i32 [[TMP19]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 13249 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 13250 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP20]]) 13251 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13252 // CHECK15: omp.inner.for.inc: 13253 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13254 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 13255 // CHECK15-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 13256 // CHECK15-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 13257 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 13258 // CHECK15-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 13259 // CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 13260 // CHECK15-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4 13261 // CHECK15-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13262 // CHECK15-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 13263 // CHECK15-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 13264 // CHECK15-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4 13265 // CHECK15-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13266 // CHECK15-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 13267 // CHECK15-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP27]], [[TMP28]] 13268 // CHECK15-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]] 13269 // CHECK15: cond.true11: 13270 // CHECK15-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 13271 // CHECK15-NEXT: br label [[COND_END13:%.*]] 13272 // CHECK15: cond.false12: 13273 // CHECK15-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13274 // CHECK15-NEXT: br label [[COND_END13]] 13275 // CHECK15: cond.end13: 13276 // CHECK15-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP29]], [[COND_TRUE11]] ], [ [[TMP30]], [[COND_FALSE12]] ] 13277 // CHECK15-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4 13278 // CHECK15-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 13279 // CHECK15-NEXT: store i32 [[TMP31]], i32* [[DOTOMP_IV]], align 4 13280 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 13281 // CHECK15: omp.inner.for.end: 13282 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 13283 // CHECK15: omp.loop.exit: 13284 // CHECK15-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 13285 // CHECK15-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4 13286 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]]) 13287 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 13288 // CHECK15: omp.precond.end: 13289 // CHECK15-NEXT: ret void 13290 // 13291 // 13292 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..6 13293 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 13294 // CHECK15-NEXT: entry: 13295 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 13296 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 13297 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 13298 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 13299 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 13300 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 13301 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 13302 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 13303 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13304 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 13305 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 13306 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 13307 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 13308 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 13309 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 13310 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13311 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13312 // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4 13313 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 13314 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 13315 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 13316 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 13317 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 13318 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 13319 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 13320 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 13321 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 13322 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 13323 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 13324 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 13325 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 13326 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13327 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 13328 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 13329 // CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 13330 // CHECK15-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 13331 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 13332 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13333 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 13334 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 13335 // CHECK15: omp.precond.then: 13336 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 13337 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 13338 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 13339 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 13340 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 13341 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 13342 // CHECK15-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 13343 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 13344 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 13345 // CHECK15-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 13346 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 13347 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 13348 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13349 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 13350 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 13351 // CHECK15-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13352 // CHECK15: cond.true: 13353 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 13354 // CHECK15-NEXT: br label [[COND_END:%.*]] 13355 // CHECK15: cond.false: 13356 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13357 // CHECK15-NEXT: br label [[COND_END]] 13358 // CHECK15: cond.end: 13359 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 13360 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 13361 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 13362 // CHECK15-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 13363 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13364 // CHECK15: omp.inner.for.cond: 13365 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13366 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13367 // CHECK15-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 13368 // CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13369 // CHECK15: omp.inner.for.body: 13370 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13371 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 13372 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 13373 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 13374 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4 13375 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]] 13376 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 13377 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 13378 // CHECK15: omp.body.continue: 13379 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13380 // CHECK15: omp.inner.for.inc: 13381 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13382 // CHECK15-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 13383 // CHECK15-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 13384 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 13385 // CHECK15: omp.inner.for.end: 13386 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 13387 // CHECK15: omp.loop.exit: 13388 // CHECK15-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 13389 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 13390 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 13391 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 13392 // CHECK15: omp.precond.end: 13393 // CHECK15-NEXT: ret void 13394 // 13395 // 13396 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163 13397 // CHECK15-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 13398 // CHECK15-NEXT: entry: 13399 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 13400 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 13401 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 13402 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 13403 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 13404 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 13405 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 13406 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 13407 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 13408 // CHECK15-NEXT: ret void 13409 // 13410 // 13411 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..8 13412 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 13413 // CHECK15-NEXT: entry: 13414 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 13415 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 13416 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 13417 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 13418 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 13419 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13420 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 13421 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 13422 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 13423 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 13424 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 13425 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 13426 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13427 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13428 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 13429 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 13430 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 13431 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 13432 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 13433 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 13434 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 13435 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 13436 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 13437 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 13438 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 13439 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 13440 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 13441 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 13442 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 13443 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 13444 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 13445 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 13446 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 13447 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 13448 // CHECK15: omp.precond.then: 13449 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 13450 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13451 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 13452 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 13453 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 13454 // CHECK15-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 13455 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 13456 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 13457 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13458 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13459 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 13460 // CHECK15-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13461 // CHECK15: cond.true: 13462 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13463 // CHECK15-NEXT: br label [[COND_END:%.*]] 13464 // CHECK15: cond.false: 13465 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13466 // CHECK15-NEXT: br label [[COND_END]] 13467 // CHECK15: cond.end: 13468 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 13469 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 13470 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 13471 // CHECK15-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 13472 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13473 // CHECK15: omp.inner.for.cond: 13474 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13475 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13476 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 13477 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13478 // CHECK15: omp.inner.for.body: 13479 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 13480 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13481 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 13482 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13483 // CHECK15: omp.inner.for.inc: 13484 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13485 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 13486 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 13487 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 13488 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 13489 // CHECK15: omp.inner.for.end: 13490 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 13491 // CHECK15: omp.loop.exit: 13492 // CHECK15-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 13493 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 13494 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 13495 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 13496 // CHECK15: omp.precond.end: 13497 // CHECK15-NEXT: ret void 13498 // 13499 // 13500 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..9 13501 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 13502 // CHECK15-NEXT: entry: 13503 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 13504 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 13505 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 13506 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 13507 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 13508 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 13509 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 13510 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13511 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 13512 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 13513 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 13514 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 13515 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 13516 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 13517 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13518 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13519 // CHECK15-NEXT: [[I3:%.*]] = alloca i32, align 4 13520 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 13521 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 13522 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 13523 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 13524 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 13525 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 13526 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 13527 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 13528 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 13529 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 13530 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 13531 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 13532 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 13533 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 13534 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 13535 // CHECK15-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 13536 // CHECK15-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 13537 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 13538 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 13539 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 13540 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 13541 // CHECK15: omp.precond.then: 13542 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 13543 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13544 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 13545 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 13546 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 13547 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 13548 // CHECK15-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 13549 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 13550 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 13551 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 13552 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13553 // CHECK15-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 13554 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 13555 // CHECK15-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1) 13556 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 13557 // CHECK15: omp.dispatch.cond: 13558 // CHECK15-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 13559 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 13560 // CHECK15-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 13561 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 13562 // CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 13563 // CHECK15: omp.dispatch.body: 13564 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 13565 // CHECK15-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 13566 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13567 // CHECK15: omp.inner.for.cond: 13568 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 13569 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15 13570 // CHECK15-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 13571 // CHECK15-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13572 // CHECK15: omp.inner.for.body: 13573 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 13574 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 13575 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 13576 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !15 13577 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !15 13578 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP20]] 13579 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15 13580 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 13581 // CHECK15: omp.body.continue: 13582 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13583 // CHECK15: omp.inner.for.inc: 13584 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 13585 // CHECK15-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP21]], 1 13586 // CHECK15-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 13587 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 13588 // CHECK15: omp.inner.for.end: 13589 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 13590 // CHECK15: omp.dispatch.inc: 13591 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]] 13592 // CHECK15: omp.dispatch.end: 13593 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 13594 // CHECK15: omp.precond.end: 13595 // CHECK15-NEXT: ret void 13596 // 13597 // 13598 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168 13599 // CHECK15-SAME: (i32 [[M:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 13600 // CHECK15-NEXT: entry: 13601 // CHECK15-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 13602 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 13603 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 13604 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 13605 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 13606 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 13607 // CHECK15-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 13608 // CHECK15-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 13609 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 13610 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 13611 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 13612 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 13613 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4 13614 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 13615 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 13616 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 13617 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 13618 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]]) 13619 // CHECK15-NEXT: ret void 13620 // 13621 // 13622 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..11 13623 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 13624 // CHECK15-NEXT: entry: 13625 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 13626 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 13627 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 13628 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 13629 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 13630 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 13631 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13632 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 13633 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 13634 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 13635 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 13636 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 13637 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 13638 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13639 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13640 // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4 13641 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 13642 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 13643 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 13644 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 13645 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 13646 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 13647 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 13648 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 13649 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 13650 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 13651 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 13652 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 13653 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13654 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 13655 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 13656 // CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 13657 // CHECK15-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 13658 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 13659 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13660 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 13661 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 13662 // CHECK15: omp.precond.then: 13663 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 13664 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 13665 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 13666 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 13667 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 13668 // CHECK15-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 13669 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 13670 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 13671 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13672 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 13673 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 13674 // CHECK15-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 13675 // CHECK15: cond.true: 13676 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 13677 // CHECK15-NEXT: br label [[COND_END:%.*]] 13678 // CHECK15: cond.false: 13679 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13680 // CHECK15-NEXT: br label [[COND_END]] 13681 // CHECK15: cond.end: 13682 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 13683 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 13684 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 13685 // CHECK15-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 13686 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13687 // CHECK15: omp.inner.for.cond: 13688 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13689 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13690 // CHECK15-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 13691 // CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13692 // CHECK15: omp.inner.for.body: 13693 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 13694 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13695 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 13696 // CHECK15-NEXT: store i32 [[TMP18]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 13697 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 13698 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP19]]) 13699 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13700 // CHECK15: omp.inner.for.inc: 13701 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 13702 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 13703 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 13704 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 13705 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 13706 // CHECK15: omp.inner.for.end: 13707 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 13708 // CHECK15: omp.loop.exit: 13709 // CHECK15-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 13710 // CHECK15-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 13711 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 13712 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 13713 // CHECK15: omp.precond.end: 13714 // CHECK15-NEXT: ret void 13715 // 13716 // 13717 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..12 13718 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 13719 // CHECK15-NEXT: entry: 13720 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 13721 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 13722 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 13723 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 13724 // CHECK15-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 13725 // CHECK15-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 13726 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 13727 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 13728 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13729 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 13730 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 13731 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 13732 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 13733 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 13734 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 13735 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13736 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13737 // CHECK15-NEXT: [[I4:%.*]] = alloca i32, align 4 13738 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 13739 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 13740 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 13741 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 13742 // CHECK15-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 13743 // CHECK15-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 13744 // CHECK15-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 13745 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 13746 // CHECK15-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 13747 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 13748 // CHECK15-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 13749 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 13750 // CHECK15-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 13751 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13752 // CHECK15-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 13753 // CHECK15-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 13754 // CHECK15-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 13755 // CHECK15-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 13756 // CHECK15-NEXT: store i32 0, i32* [[I]], align 4 13757 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 13758 // CHECK15-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 13759 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 13760 // CHECK15: omp.precond.then: 13761 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 13762 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 13763 // CHECK15-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 13764 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 13765 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 13766 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 13767 // CHECK15-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 13768 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 13769 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 13770 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 13771 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 13772 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 13773 // CHECK15-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 13774 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 13775 // CHECK15-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 1073741859, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]]) 13776 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 13777 // CHECK15: omp.dispatch.cond: 13778 // CHECK15-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 13779 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 13780 // CHECK15-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 13781 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 13782 // CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 13783 // CHECK15: omp.dispatch.body: 13784 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 13785 // CHECK15-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 13786 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 13787 // CHECK15: omp.inner.for.cond: 13788 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 13789 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18 13790 // CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 13791 // CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 13792 // CHECK15: omp.inner.for.body: 13793 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 13794 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 13795 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 13796 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !18 13797 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !18 13798 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP21]] 13799 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18 13800 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 13801 // CHECK15: omp.body.continue: 13802 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 13803 // CHECK15: omp.inner.for.inc: 13804 // CHECK15-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 13805 // CHECK15-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP22]], 1 13806 // CHECK15-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 13807 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]] 13808 // CHECK15: omp.inner.for.end: 13809 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 13810 // CHECK15: omp.dispatch.inc: 13811 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]] 13812 // CHECK15: omp.dispatch.end: 13813 // CHECK15-NEXT: br label [[OMP_PRECOND_END]] 13814 // CHECK15: omp.precond.end: 13815 // CHECK15-NEXT: ret void 13816 // 13817 // 13818 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 13819 // CHECK15-SAME: (i32 [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat { 13820 // CHECK15-NEXT: entry: 13821 // CHECK15-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 13822 // CHECK15-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 13823 // CHECK15-NEXT: [[M:%.*]] = alloca i32, align 4 13824 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 13825 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 13826 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 13827 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 13828 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4 13829 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4 13830 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4 13831 // CHECK15-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 13832 // CHECK15-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4 13833 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 4 13834 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 4 13835 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 4 13836 // CHECK15-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 13837 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 4 13838 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 4 13839 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 4 13840 // CHECK15-NEXT: [[_TMP16:%.*]] = alloca i32, align 4 13841 // CHECK15-NEXT: [[M_CASTED19:%.*]] = alloca i32, align 4 13842 // CHECK15-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [2 x i8*], align 4 13843 // CHECK15-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [2 x i8*], align 4 13844 // CHECK15-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [2 x i8*], align 4 13845 // CHECK15-NEXT: [[_TMP23:%.*]] = alloca i32, align 4 13846 // CHECK15-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 13847 // CHECK15-NEXT: store i32 10, i32* [[M]], align 4 13848 // CHECK15-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 13849 // CHECK15-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 13850 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4 13851 // CHECK15-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 13852 // CHECK15-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 13853 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4 13854 // CHECK15-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 13855 // CHECK15-NEXT: store i8* null, i8** [[TMP4]], align 4 13856 // CHECK15-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 13857 // CHECK15-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 13858 // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 13859 // CHECK15-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 13860 // CHECK15-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 13861 // CHECK15-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 13862 // CHECK15: omp_offload.failed: 13863 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]] 13864 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT]] 13865 // CHECK15: omp_offload.cont: 13866 // CHECK15-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 13867 // CHECK15-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** 13868 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4 13869 // CHECK15-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 13870 // CHECK15-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** 13871 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4 13872 // CHECK15-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0 13873 // CHECK15-NEXT: store i8* null, i8** [[TMP13]], align 4 13874 // CHECK15-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 13875 // CHECK15-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 13876 // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 13877 // CHECK15-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 13878 // CHECK15-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 13879 // CHECK15-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 13880 // CHECK15: omp_offload.failed5: 13881 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121([10 x i32]* [[A]]) #[[ATTR3]] 13882 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT6]] 13883 // CHECK15: omp_offload.cont6: 13884 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[M]], align 4 13885 // CHECK15-NEXT: store i32 [[TMP18]], i32* [[M_CASTED]], align 4 13886 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[M_CASTED]], align 4 13887 // CHECK15-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 13888 // CHECK15-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32* 13889 // CHECK15-NEXT: store i32 [[TMP19]], i32* [[TMP21]], align 4 13890 // CHECK15-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 13891 // CHECK15-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32* 13892 // CHECK15-NEXT: store i32 [[TMP19]], i32* [[TMP23]], align 4 13893 // CHECK15-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0 13894 // CHECK15-NEXT: store i8* null, i8** [[TMP24]], align 4 13895 // CHECK15-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1 13896 // CHECK15-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]** 13897 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 4 13898 // CHECK15-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1 13899 // CHECK15-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]** 13900 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 4 13901 // CHECK15-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 1 13902 // CHECK15-NEXT: store i8* null, i8** [[TMP29]], align 4 13903 // CHECK15-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 13904 // CHECK15-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 13905 // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 13906 // CHECK15-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 13907 // CHECK15-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 13908 // CHECK15-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] 13909 // CHECK15: omp_offload.failed11: 13910 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i32 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]] 13911 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT12]] 13912 // CHECK15: omp_offload.cont12: 13913 // CHECK15-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 13914 // CHECK15-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]** 13915 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 4 13916 // CHECK15-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 13917 // CHECK15-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]** 13918 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 4 13919 // CHECK15-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 0 13920 // CHECK15-NEXT: store i8* null, i8** [[TMP38]], align 4 13921 // CHECK15-NEXT: [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 13922 // CHECK15-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 13923 // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 13924 // CHECK15-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 13925 // CHECK15-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0 13926 // CHECK15-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]] 13927 // CHECK15: omp_offload.failed17: 13928 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131([10 x i32]* [[A]]) #[[ATTR3]] 13929 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT18]] 13930 // CHECK15: omp_offload.cont18: 13931 // CHECK15-NEXT: [[TMP43:%.*]] = load i32, i32* [[M]], align 4 13932 // CHECK15-NEXT: store i32 [[TMP43]], i32* [[M_CASTED19]], align 4 13933 // CHECK15-NEXT: [[TMP44:%.*]] = load i32, i32* [[M_CASTED19]], align 4 13934 // CHECK15-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 13935 // CHECK15-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32* 13936 // CHECK15-NEXT: store i32 [[TMP44]], i32* [[TMP46]], align 4 13937 // CHECK15-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 13938 // CHECK15-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32* 13939 // CHECK15-NEXT: store i32 [[TMP44]], i32* [[TMP48]], align 4 13940 // CHECK15-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 0 13941 // CHECK15-NEXT: store i8* null, i8** [[TMP49]], align 4 13942 // CHECK15-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1 13943 // CHECK15-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]** 13944 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 4 13945 // CHECK15-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 1 13946 // CHECK15-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]** 13947 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 4 13948 // CHECK15-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 1 13949 // CHECK15-NEXT: store i8* null, i8** [[TMP54]], align 4 13950 // CHECK15-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 13951 // CHECK15-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 13952 // CHECK15-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 13953 // CHECK15-NEXT: [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 13954 // CHECK15-NEXT: [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0 13955 // CHECK15-NEXT: br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]] 13956 // CHECK15: omp_offload.failed24: 13957 // CHECK15-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i32 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]] 13958 // CHECK15-NEXT: br label [[OMP_OFFLOAD_CONT25]] 13959 // CHECK15: omp_offload.cont25: 13960 // CHECK15-NEXT: ret i32 0 13961 // 13962 // 13963 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116 13964 // CHECK15-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 13965 // CHECK15-NEXT: entry: 13966 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 13967 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 13968 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 13969 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 13970 // CHECK15-NEXT: ret void 13971 // 13972 // 13973 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..14 13974 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 13975 // CHECK15-NEXT: entry: 13976 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 13977 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 13978 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 13979 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 13980 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 13981 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 13982 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 13983 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 13984 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 13985 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 13986 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 13987 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 13988 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 13989 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 13990 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 13991 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 13992 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 13993 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 13994 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 13995 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 13996 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 13997 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 13998 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 13999 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 14000 // CHECK15: cond.true: 14001 // CHECK15-NEXT: br label [[COND_END:%.*]] 14002 // CHECK15: cond.false: 14003 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14004 // CHECK15-NEXT: br label [[COND_END]] 14005 // CHECK15: cond.end: 14006 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 14007 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 14008 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 14009 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 14010 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14011 // CHECK15: omp.inner.for.cond: 14012 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14013 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14014 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 14015 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14016 // CHECK15: omp.inner.for.body: 14017 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 14018 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14019 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]) 14020 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14021 // CHECK15: omp.inner.for.inc: 14022 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14023 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 14024 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 14025 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 14026 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 14027 // CHECK15: omp.inner.for.end: 14028 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 14029 // CHECK15: omp.loop.exit: 14030 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 14031 // CHECK15-NEXT: ret void 14032 // 14033 // 14034 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..15 14035 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 14036 // CHECK15-NEXT: entry: 14037 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 14038 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 14039 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 14040 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 14041 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 14042 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14043 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 14044 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 14045 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 14046 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14047 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14048 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 14049 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 14050 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 14051 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 14052 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 14053 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 14054 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 14055 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 14056 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 14057 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 14058 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 14059 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 14060 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 14061 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 14062 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 14063 // CHECK15-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 14064 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 14065 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 14066 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14067 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 14068 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 14069 // CHECK15: cond.true: 14070 // CHECK15-NEXT: br label [[COND_END:%.*]] 14071 // CHECK15: cond.false: 14072 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14073 // CHECK15-NEXT: br label [[COND_END]] 14074 // CHECK15: cond.end: 14075 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 14076 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 14077 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 14078 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 14079 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14080 // CHECK15: omp.inner.for.cond: 14081 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14082 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14083 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 14084 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14085 // CHECK15: omp.inner.for.body: 14086 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14087 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 14088 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 14089 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4 14090 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 14091 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]] 14092 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 14093 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 14094 // CHECK15: omp.body.continue: 14095 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14096 // CHECK15: omp.inner.for.inc: 14097 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14098 // CHECK15-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 14099 // CHECK15-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 14100 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 14101 // CHECK15: omp.inner.for.end: 14102 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 14103 // CHECK15: omp.loop.exit: 14104 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 14105 // CHECK15-NEXT: ret void 14106 // 14107 // 14108 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121 14109 // CHECK15-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 14110 // CHECK15-NEXT: entry: 14111 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 14112 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 14113 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 14114 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 14115 // CHECK15-NEXT: ret void 14116 // 14117 // 14118 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..17 14119 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 14120 // CHECK15-NEXT: entry: 14121 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 14122 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 14123 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 14124 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14125 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 14126 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 14127 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 14128 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14129 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14130 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 14131 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 14132 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 14133 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 14134 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 14135 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 14136 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 14137 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 14138 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 14139 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 14140 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 14141 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 14142 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14143 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 14144 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 14145 // CHECK15: cond.true: 14146 // CHECK15-NEXT: br label [[COND_END:%.*]] 14147 // CHECK15: cond.false: 14148 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14149 // CHECK15-NEXT: br label [[COND_END]] 14150 // CHECK15: cond.end: 14151 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 14152 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 14153 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 14154 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 14155 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14156 // CHECK15: omp.inner.for.cond: 14157 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14158 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14159 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 14160 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14161 // CHECK15: omp.inner.for.body: 14162 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 14163 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14164 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]) 14165 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14166 // CHECK15: omp.inner.for.inc: 14167 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14168 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 14169 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 14170 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 14171 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 14172 // CHECK15: omp.inner.for.end: 14173 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 14174 // CHECK15: omp.loop.exit: 14175 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 14176 // CHECK15-NEXT: ret void 14177 // 14178 // 14179 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..18 14180 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 14181 // CHECK15-NEXT: entry: 14182 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 14183 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 14184 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 14185 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 14186 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 14187 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14188 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 14189 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 14190 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 14191 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14192 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14193 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 14194 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 14195 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 14196 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 14197 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 14198 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 14199 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 14200 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 14201 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 14202 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 14203 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 14204 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 14205 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 14206 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 14207 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 14208 // CHECK15-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 14209 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 14210 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 14211 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14212 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 14213 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 14214 // CHECK15: cond.true: 14215 // CHECK15-NEXT: br label [[COND_END:%.*]] 14216 // CHECK15: cond.false: 14217 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14218 // CHECK15-NEXT: br label [[COND_END]] 14219 // CHECK15: cond.end: 14220 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 14221 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 14222 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 14223 // CHECK15-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 14224 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14225 // CHECK15: omp.inner.for.cond: 14226 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14227 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14228 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 14229 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14230 // CHECK15: omp.inner.for.body: 14231 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14232 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 14233 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 14234 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4 14235 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 14236 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]] 14237 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 14238 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 14239 // CHECK15: omp.body.continue: 14240 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14241 // CHECK15: omp.inner.for.inc: 14242 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14243 // CHECK15-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 14244 // CHECK15-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 14245 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 14246 // CHECK15: omp.inner.for.end: 14247 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 14248 // CHECK15: omp.loop.exit: 14249 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 14250 // CHECK15-NEXT: ret void 14251 // 14252 // 14253 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126 14254 // CHECK15-SAME: (i32 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 14255 // CHECK15-NEXT: entry: 14256 // CHECK15-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 14257 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 14258 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 14259 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 14260 // CHECK15-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 14261 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 14262 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 14263 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4 14264 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 14265 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 14266 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 14267 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 14268 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]]) 14269 // CHECK15-NEXT: ret void 14270 // 14271 // 14272 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..21 14273 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 14274 // CHECK15-NEXT: entry: 14275 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 14276 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 14277 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 14278 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 14279 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14280 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 14281 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 14282 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 14283 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14284 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14285 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 14286 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 14287 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 14288 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 14289 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 14290 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 14291 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 14292 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 14293 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 14294 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 14295 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 14296 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 14297 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 14298 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 14299 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14300 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 14301 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 14302 // CHECK15: cond.true: 14303 // CHECK15-NEXT: br label [[COND_END:%.*]] 14304 // CHECK15: cond.false: 14305 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14306 // CHECK15-NEXT: br label [[COND_END]] 14307 // CHECK15: cond.end: 14308 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 14309 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 14310 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 14311 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 14312 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14313 // CHECK15: omp.inner.for.cond: 14314 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14315 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14316 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 14317 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14318 // CHECK15: omp.inner.for.body: 14319 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 14320 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14321 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 14322 // CHECK15-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 14323 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 14324 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]]) 14325 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14326 // CHECK15: omp.inner.for.inc: 14327 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14328 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 14329 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 14330 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 14331 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 14332 // CHECK15: omp.inner.for.end: 14333 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 14334 // CHECK15: omp.loop.exit: 14335 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 14336 // CHECK15-NEXT: ret void 14337 // 14338 // 14339 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..22 14340 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 14341 // CHECK15-NEXT: entry: 14342 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 14343 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 14344 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 14345 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 14346 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 14347 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 14348 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14349 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 14350 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 14351 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 14352 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14353 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14354 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 14355 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 14356 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 14357 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 14358 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 14359 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 14360 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 14361 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 14362 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 14363 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 14364 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 14365 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 14366 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 14367 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 14368 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 14369 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 14370 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 14371 // CHECK15-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 14372 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 14373 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]]) 14374 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 14375 // CHECK15: omp.dispatch.cond: 14376 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14377 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 14378 // CHECK15-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP6]], [[TMP7]] 14379 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 14380 // CHECK15: cond.true: 14381 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 14382 // CHECK15-NEXT: br label [[COND_END:%.*]] 14383 // CHECK15: cond.false: 14384 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14385 // CHECK15-NEXT: br label [[COND_END]] 14386 // CHECK15: cond.end: 14387 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[TMP8]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 14388 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 14389 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 14390 // CHECK15-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 14391 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14392 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14393 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 14394 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 14395 // CHECK15: omp.dispatch.body: 14396 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14397 // CHECK15: omp.inner.for.cond: 14398 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14399 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14400 // CHECK15-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 14401 // CHECK15-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14402 // CHECK15: omp.inner.for.body: 14403 // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14404 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 14405 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 14406 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4 14407 // CHECK15-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4 14408 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP16]] 14409 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 14410 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 14411 // CHECK15: omp.body.continue: 14412 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14413 // CHECK15: omp.inner.for.inc: 14414 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14415 // CHECK15-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1 14416 // CHECK15-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 14417 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 14418 // CHECK15: omp.inner.for.end: 14419 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 14420 // CHECK15: omp.dispatch.inc: 14421 // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 14422 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 14423 // CHECK15-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 14424 // CHECK15-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 14425 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14426 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 14427 // CHECK15-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 14428 // CHECK15-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 14429 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]] 14430 // CHECK15: omp.dispatch.end: 14431 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 14432 // CHECK15-NEXT: ret void 14433 // 14434 // 14435 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131 14436 // CHECK15-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 14437 // CHECK15-NEXT: entry: 14438 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 14439 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 14440 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 14441 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 14442 // CHECK15-NEXT: ret void 14443 // 14444 // 14445 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..25 14446 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 14447 // CHECK15-NEXT: entry: 14448 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 14449 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 14450 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 14451 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14452 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 14453 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 14454 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 14455 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14456 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14457 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 14458 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 14459 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 14460 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 14461 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 14462 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 14463 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 14464 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 14465 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 14466 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 14467 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 14468 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 14469 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14470 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 14471 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 14472 // CHECK15: cond.true: 14473 // CHECK15-NEXT: br label [[COND_END:%.*]] 14474 // CHECK15: cond.false: 14475 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14476 // CHECK15-NEXT: br label [[COND_END]] 14477 // CHECK15: cond.end: 14478 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 14479 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 14480 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 14481 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 14482 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14483 // CHECK15: omp.inner.for.cond: 14484 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14485 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14486 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 14487 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14488 // CHECK15: omp.inner.for.body: 14489 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 14490 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14491 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]) 14492 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14493 // CHECK15: omp.inner.for.inc: 14494 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14495 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 14496 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 14497 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 14498 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 14499 // CHECK15: omp.inner.for.end: 14500 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 14501 // CHECK15: omp.loop.exit: 14502 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 14503 // CHECK15-NEXT: ret void 14504 // 14505 // 14506 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..26 14507 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 14508 // CHECK15-NEXT: entry: 14509 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 14510 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 14511 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 14512 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 14513 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 14514 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14515 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 14516 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 14517 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 14518 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14519 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14520 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 14521 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 14522 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 14523 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 14524 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 14525 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 14526 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 14527 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 14528 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 14529 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 14530 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 14531 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 14532 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 14533 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 14534 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 14535 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 14536 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14537 // CHECK15-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 14538 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 14539 // CHECK15-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 14540 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 14541 // CHECK15: omp.dispatch.cond: 14542 // CHECK15-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 14543 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 14544 // CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 14545 // CHECK15: omp.dispatch.body: 14546 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 14547 // CHECK15-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 14548 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14549 // CHECK15: omp.inner.for.cond: 14550 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 14551 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21 14552 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 14553 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14554 // CHECK15: omp.inner.for.body: 14555 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 14556 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 14557 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 14558 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21 14559 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21 14560 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP12]] 14561 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21 14562 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 14563 // CHECK15: omp.body.continue: 14564 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14565 // CHECK15: omp.inner.for.inc: 14566 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 14567 // CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 14568 // CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 14569 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]] 14570 // CHECK15: omp.inner.for.end: 14571 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 14572 // CHECK15: omp.dispatch.inc: 14573 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]] 14574 // CHECK15: omp.dispatch.end: 14575 // CHECK15-NEXT: ret void 14576 // 14577 // 14578 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136 14579 // CHECK15-SAME: (i32 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 14580 // CHECK15-NEXT: entry: 14581 // CHECK15-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 14582 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 14583 // CHECK15-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 14584 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 14585 // CHECK15-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 14586 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 14587 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 14588 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4 14589 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 14590 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 14591 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 14592 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 14593 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]]) 14594 // CHECK15-NEXT: ret void 14595 // 14596 // 14597 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..29 14598 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 14599 // CHECK15-NEXT: entry: 14600 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 14601 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 14602 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 14603 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 14604 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14605 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 14606 // CHECK15-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 14607 // CHECK15-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 14608 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14609 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14610 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 14611 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 14612 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 14613 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 14614 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 14615 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 14616 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 14617 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 14618 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 14619 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 14620 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 14621 // CHECK15-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 14622 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 14623 // CHECK15-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 14624 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14625 // CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 14626 // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 14627 // CHECK15: cond.true: 14628 // CHECK15-NEXT: br label [[COND_END:%.*]] 14629 // CHECK15: cond.false: 14630 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14631 // CHECK15-NEXT: br label [[COND_END]] 14632 // CHECK15: cond.end: 14633 // CHECK15-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 14634 // CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 14635 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 14636 // CHECK15-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 14637 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14638 // CHECK15: omp.inner.for.cond: 14639 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14640 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14641 // CHECK15-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 14642 // CHECK15-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14643 // CHECK15: omp.inner.for.body: 14644 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 14645 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 14646 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 14647 // CHECK15-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 14648 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 14649 // CHECK15-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]]) 14650 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14651 // CHECK15: omp.inner.for.inc: 14652 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 14653 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 14654 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 14655 // CHECK15-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 14656 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]] 14657 // CHECK15: omp.inner.for.end: 14658 // CHECK15-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 14659 // CHECK15: omp.loop.exit: 14660 // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 14661 // CHECK15-NEXT: ret void 14662 // 14663 // 14664 // CHECK15-LABEL: define {{[^@]+}}@.omp_outlined..30 14665 // CHECK15-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 14666 // CHECK15-NEXT: entry: 14667 // CHECK15-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 14668 // CHECK15-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 14669 // CHECK15-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 14670 // CHECK15-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 14671 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 14672 // CHECK15-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 14673 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 14674 // CHECK15-NEXT: [[TMP:%.*]] = alloca i32, align 4 14675 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 14676 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 14677 // CHECK15-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 14678 // CHECK15-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 14679 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4 14680 // CHECK15-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 14681 // CHECK15-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 14682 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 14683 // CHECK15-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 14684 // CHECK15-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 14685 // CHECK15-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 14686 // CHECK15-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 14687 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 14688 // CHECK15-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 14689 // CHECK15-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 14690 // CHECK15-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 14691 // CHECK15-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 14692 // CHECK15-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 14693 // CHECK15-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 14694 // CHECK15-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 14695 // CHECK15-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 14696 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 14697 // CHECK15-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 14698 // CHECK15-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 14699 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 14700 // CHECK15-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]]) 14701 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 14702 // CHECK15: omp.dispatch.cond: 14703 // CHECK15-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 14704 // CHECK15-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0 14705 // CHECK15-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 14706 // CHECK15: omp.dispatch.body: 14707 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 14708 // CHECK15-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 14709 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 14710 // CHECK15: omp.inner.for.cond: 14711 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 14712 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !24 14713 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 14714 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 14715 // CHECK15: omp.inner.for.body: 14716 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 14717 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 14718 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 14719 // CHECK15-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !24 14720 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !24 14721 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP13]] 14722 // CHECK15-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !24 14723 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 14724 // CHECK15: omp.body.continue: 14725 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 14726 // CHECK15: omp.inner.for.inc: 14727 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 14728 // CHECK15-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP14]], 1 14729 // CHECK15-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 14730 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]] 14731 // CHECK15: omp.inner.for.end: 14732 // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 14733 // CHECK15: omp.dispatch.inc: 14734 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]] 14735 // CHECK15: omp.dispatch.end: 14736 // CHECK15-NEXT: ret void 14737 // 14738 // 14739 // CHECK15-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 14740 // CHECK15-SAME: () #[[ATTR5:[0-9]+]] { 14741 // CHECK15-NEXT: entry: 14742 // CHECK15-NEXT: call void @__tgt_register_requires(i64 1) 14743 // CHECK15-NEXT: ret void 14744 // 14745 // 14746 // CHECK16-LABEL: define {{[^@]+}}@main 14747 // CHECK16-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 14748 // CHECK16-NEXT: entry: 14749 // CHECK16-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 14750 // CHECK16-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 14751 // CHECK16-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 14752 // CHECK16-NEXT: [[N:%.*]] = alloca i32, align 4 14753 // CHECK16-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 14754 // CHECK16-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 14755 // CHECK16-NEXT: [[M:%.*]] = alloca i32, align 4 14756 // CHECK16-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 14757 // CHECK16-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 14758 // CHECK16-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 14759 // CHECK16-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 14760 // CHECK16-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4 14761 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 14762 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 14763 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 14764 // CHECK16-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4 14765 // CHECK16-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4 14766 // CHECK16-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4 14767 // CHECK16-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4 14768 // CHECK16-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4 14769 // CHECK16-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 14770 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 14771 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 14772 // CHECK16-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4 14773 // CHECK16-NEXT: [[N_CASTED17:%.*]] = alloca i32, align 4 14774 // CHECK16-NEXT: [[DOTOFFLOAD_BASEPTRS18:%.*]] = alloca [4 x i8*], align 4 14775 // CHECK16-NEXT: [[DOTOFFLOAD_PTRS19:%.*]] = alloca [4 x i8*], align 4 14776 // CHECK16-NEXT: [[DOTOFFLOAD_MAPPERS20:%.*]] = alloca [4 x i8*], align 4 14777 // CHECK16-NEXT: [[DOTOFFLOAD_SIZES21:%.*]] = alloca [4 x i64], align 4 14778 // CHECK16-NEXT: [[_TMP22:%.*]] = alloca i32, align 4 14779 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_23:%.*]] = alloca i32, align 4 14780 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4 14781 // CHECK16-NEXT: [[N_CASTED31:%.*]] = alloca i32, align 4 14782 // CHECK16-NEXT: [[DOTOFFLOAD_BASEPTRS32:%.*]] = alloca [3 x i8*], align 4 14783 // CHECK16-NEXT: [[DOTOFFLOAD_PTRS33:%.*]] = alloca [3 x i8*], align 4 14784 // CHECK16-NEXT: [[DOTOFFLOAD_MAPPERS34:%.*]] = alloca [3 x i8*], align 4 14785 // CHECK16-NEXT: [[DOTOFFLOAD_SIZES35:%.*]] = alloca [3 x i64], align 4 14786 // CHECK16-NEXT: [[_TMP36:%.*]] = alloca i32, align 4 14787 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_37:%.*]] = alloca i32, align 4 14788 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4 14789 // CHECK16-NEXT: [[M_CASTED45:%.*]] = alloca i32, align 4 14790 // CHECK16-NEXT: [[N_CASTED46:%.*]] = alloca i32, align 4 14791 // CHECK16-NEXT: [[DOTOFFLOAD_BASEPTRS47:%.*]] = alloca [4 x i8*], align 4 14792 // CHECK16-NEXT: [[DOTOFFLOAD_PTRS48:%.*]] = alloca [4 x i8*], align 4 14793 // CHECK16-NEXT: [[DOTOFFLOAD_MAPPERS49:%.*]] = alloca [4 x i8*], align 4 14794 // CHECK16-NEXT: [[DOTOFFLOAD_SIZES50:%.*]] = alloca [4 x i64], align 4 14795 // CHECK16-NEXT: [[_TMP51:%.*]] = alloca i32, align 4 14796 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_52:%.*]] = alloca i32, align 4 14797 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_53:%.*]] = alloca i32, align 4 14798 // CHECK16-NEXT: store i32 0, i32* [[RETVAL]], align 4 14799 // CHECK16-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 14800 // CHECK16-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 14801 // CHECK16-NEXT: store i32 100, i32* [[N]], align 4 14802 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 14803 // CHECK16-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 14804 // CHECK16-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 14805 // CHECK16-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 14806 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 14807 // CHECK16-NEXT: store i32 10, i32* [[M]], align 4 14808 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 14809 // CHECK16-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 14810 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 14811 // CHECK16-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4 14812 // CHECK16-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64 14813 // CHECK16-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 14814 // CHECK16-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32* 14815 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[TMP7]], align 4 14816 // CHECK16-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 14817 // CHECK16-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32* 14818 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[TMP9]], align 4 14819 // CHECK16-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 14820 // CHECK16-NEXT: store i64 4, i64* [[TMP10]], align 4 14821 // CHECK16-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 14822 // CHECK16-NEXT: store i8* null, i8** [[TMP11]], align 4 14823 // CHECK16-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 14824 // CHECK16-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 14825 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4 14826 // CHECK16-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 14827 // CHECK16-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 14828 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4 14829 // CHECK16-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 14830 // CHECK16-NEXT: store i64 4, i64* [[TMP16]], align 4 14831 // CHECK16-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 14832 // CHECK16-NEXT: store i8* null, i8** [[TMP17]], align 4 14833 // CHECK16-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 14834 // CHECK16-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32** 14835 // CHECK16-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 4 14836 // CHECK16-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 14837 // CHECK16-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32** 14838 // CHECK16-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 4 14839 // CHECK16-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 14840 // CHECK16-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 4 14841 // CHECK16-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 14842 // CHECK16-NEXT: store i8* null, i8** [[TMP23]], align 4 14843 // CHECK16-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 14844 // CHECK16-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 14845 // CHECK16-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 14846 // CHECK16-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4 14847 // CHECK16-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4 14848 // CHECK16-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 14849 // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0 14850 // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 14851 // CHECK16-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 14852 // CHECK16-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 14853 // CHECK16-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 14854 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1 14855 // CHECK16-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64 14856 // CHECK16-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]]) 14857 // CHECK16-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 14858 // CHECK16-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 14859 // CHECK16-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 14860 // CHECK16: omp_offload.failed: 14861 // CHECK16-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 14862 // CHECK16-NEXT: br label [[OMP_OFFLOAD_CONT]] 14863 // CHECK16: omp_offload.cont: 14864 // CHECK16-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4 14865 // CHECK16-NEXT: store i32 [[TMP33]], i32* [[N_CASTED3]], align 4 14866 // CHECK16-NEXT: [[TMP34:%.*]] = load i32, i32* [[N_CASTED3]], align 4 14867 // CHECK16-NEXT: [[TMP35:%.*]] = mul nuw i32 [[TMP0]], 4 14868 // CHECK16-NEXT: [[TMP36:%.*]] = sext i32 [[TMP35]] to i64 14869 // CHECK16-NEXT: [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 14870 // CHECK16-NEXT: [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32* 14871 // CHECK16-NEXT: store i32 [[TMP34]], i32* [[TMP38]], align 4 14872 // CHECK16-NEXT: [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 14873 // CHECK16-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32* 14874 // CHECK16-NEXT: store i32 [[TMP34]], i32* [[TMP40]], align 4 14875 // CHECK16-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0 14876 // CHECK16-NEXT: store i64 4, i64* [[TMP41]], align 4 14877 // CHECK16-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0 14878 // CHECK16-NEXT: store i8* null, i8** [[TMP42]], align 4 14879 // CHECK16-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 14880 // CHECK16-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i32* 14881 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[TMP44]], align 4 14882 // CHECK16-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 14883 // CHECK16-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32* 14884 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[TMP46]], align 4 14885 // CHECK16-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 1 14886 // CHECK16-NEXT: store i64 4, i64* [[TMP47]], align 4 14887 // CHECK16-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1 14888 // CHECK16-NEXT: store i8* null, i8** [[TMP48]], align 4 14889 // CHECK16-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 14890 // CHECK16-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32** 14891 // CHECK16-NEXT: store i32* [[VLA]], i32** [[TMP50]], align 4 14892 // CHECK16-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 14893 // CHECK16-NEXT: [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32** 14894 // CHECK16-NEXT: store i32* [[VLA]], i32** [[TMP52]], align 4 14895 // CHECK16-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2 14896 // CHECK16-NEXT: store i64 [[TMP36]], i64* [[TMP53]], align 4 14897 // CHECK16-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2 14898 // CHECK16-NEXT: store i8* null, i8** [[TMP54]], align 4 14899 // CHECK16-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 14900 // CHECK16-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 14901 // CHECK16-NEXT: [[TMP57:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0 14902 // CHECK16-NEXT: [[TMP58:%.*]] = load i32, i32* [[N]], align 4 14903 // CHECK16-NEXT: store i32 [[TMP58]], i32* [[DOTCAPTURE_EXPR_9]], align 4 14904 // CHECK16-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4 14905 // CHECK16-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP59]], 0 14906 // CHECK16-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 14907 // CHECK16-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 14908 // CHECK16-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4 14909 // CHECK16-NEXT: [[TMP60:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 14910 // CHECK16-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP60]], 1 14911 // CHECK16-NEXT: [[TMP61:%.*]] = zext i32 [[ADD14]] to i64 14912 // CHECK16-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP61]]) 14913 // CHECK16-NEXT: [[TMP62:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, i32 3, i8** [[TMP55]], i8** [[TMP56]], i64* [[TMP57]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 14914 // CHECK16-NEXT: [[TMP63:%.*]] = icmp ne i32 [[TMP62]], 0 14915 // CHECK16-NEXT: br i1 [[TMP63]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]] 14916 // CHECK16: omp_offload.failed15: 14917 // CHECK16-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i32 [[TMP34]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 14918 // CHECK16-NEXT: br label [[OMP_OFFLOAD_CONT16]] 14919 // CHECK16: omp_offload.cont16: 14920 // CHECK16-NEXT: [[TMP64:%.*]] = load i32, i32* [[M]], align 4 14921 // CHECK16-NEXT: store i32 [[TMP64]], i32* [[M_CASTED]], align 4 14922 // CHECK16-NEXT: [[TMP65:%.*]] = load i32, i32* [[M_CASTED]], align 4 14923 // CHECK16-NEXT: [[TMP66:%.*]] = load i32, i32* [[N]], align 4 14924 // CHECK16-NEXT: store i32 [[TMP66]], i32* [[N_CASTED17]], align 4 14925 // CHECK16-NEXT: [[TMP67:%.*]] = load i32, i32* [[N_CASTED17]], align 4 14926 // CHECK16-NEXT: [[TMP68:%.*]] = mul nuw i32 [[TMP0]], 4 14927 // CHECK16-NEXT: [[TMP69:%.*]] = sext i32 [[TMP68]] to i64 14928 // CHECK16-NEXT: [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0 14929 // CHECK16-NEXT: [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i32* 14930 // CHECK16-NEXT: store i32 [[TMP65]], i32* [[TMP71]], align 4 14931 // CHECK16-NEXT: [[TMP72:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0 14932 // CHECK16-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to i32* 14933 // CHECK16-NEXT: store i32 [[TMP65]], i32* [[TMP73]], align 4 14934 // CHECK16-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0 14935 // CHECK16-NEXT: store i64 4, i64* [[TMP74]], align 4 14936 // CHECK16-NEXT: [[TMP75:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 0 14937 // CHECK16-NEXT: store i8* null, i8** [[TMP75]], align 4 14938 // CHECK16-NEXT: [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 1 14939 // CHECK16-NEXT: [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i32* 14940 // CHECK16-NEXT: store i32 [[TMP67]], i32* [[TMP77]], align 4 14941 // CHECK16-NEXT: [[TMP78:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 1 14942 // CHECK16-NEXT: [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i32* 14943 // CHECK16-NEXT: store i32 [[TMP67]], i32* [[TMP79]], align 4 14944 // CHECK16-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 1 14945 // CHECK16-NEXT: store i64 4, i64* [[TMP80]], align 4 14946 // CHECK16-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 1 14947 // CHECK16-NEXT: store i8* null, i8** [[TMP81]], align 4 14948 // CHECK16-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 2 14949 // CHECK16-NEXT: [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i32* 14950 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[TMP83]], align 4 14951 // CHECK16-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 2 14952 // CHECK16-NEXT: [[TMP85:%.*]] = bitcast i8** [[TMP84]] to i32* 14953 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[TMP85]], align 4 14954 // CHECK16-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 2 14955 // CHECK16-NEXT: store i64 4, i64* [[TMP86]], align 4 14956 // CHECK16-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 2 14957 // CHECK16-NEXT: store i8* null, i8** [[TMP87]], align 4 14958 // CHECK16-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 3 14959 // CHECK16-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32** 14960 // CHECK16-NEXT: store i32* [[VLA]], i32** [[TMP89]], align 4 14961 // CHECK16-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 3 14962 // CHECK16-NEXT: [[TMP91:%.*]] = bitcast i8** [[TMP90]] to i32** 14963 // CHECK16-NEXT: store i32* [[VLA]], i32** [[TMP91]], align 4 14964 // CHECK16-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 3 14965 // CHECK16-NEXT: store i64 [[TMP69]], i64* [[TMP92]], align 4 14966 // CHECK16-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 3 14967 // CHECK16-NEXT: store i8* null, i8** [[TMP93]], align 4 14968 // CHECK16-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0 14969 // CHECK16-NEXT: [[TMP95:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0 14970 // CHECK16-NEXT: [[TMP96:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0 14971 // CHECK16-NEXT: [[TMP97:%.*]] = load i32, i32* [[N]], align 4 14972 // CHECK16-NEXT: store i32 [[TMP97]], i32* [[DOTCAPTURE_EXPR_23]], align 4 14973 // CHECK16-NEXT: [[TMP98:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_23]], align 4 14974 // CHECK16-NEXT: [[SUB25:%.*]] = sub nsw i32 [[TMP98]], 0 14975 // CHECK16-NEXT: [[DIV26:%.*]] = sdiv i32 [[SUB25]], 1 14976 // CHECK16-NEXT: [[SUB27:%.*]] = sub nsw i32 [[DIV26]], 1 14977 // CHECK16-NEXT: store i32 [[SUB27]], i32* [[DOTCAPTURE_EXPR_24]], align 4 14978 // CHECK16-NEXT: [[TMP99:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4 14979 // CHECK16-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP99]], 1 14980 // CHECK16-NEXT: [[TMP100:%.*]] = zext i32 [[ADD28]] to i64 14981 // CHECK16-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP100]]) 14982 // CHECK16-NEXT: [[TMP101:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, i32 4, i8** [[TMP94]], i8** [[TMP95]], i64* [[TMP96]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 14983 // CHECK16-NEXT: [[TMP102:%.*]] = icmp ne i32 [[TMP101]], 0 14984 // CHECK16-NEXT: br i1 [[TMP102]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]] 14985 // CHECK16: omp_offload.failed29: 14986 // CHECK16-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i32 [[TMP65]], i32 [[TMP67]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 14987 // CHECK16-NEXT: br label [[OMP_OFFLOAD_CONT30]] 14988 // CHECK16: omp_offload.cont30: 14989 // CHECK16-NEXT: [[TMP103:%.*]] = load i32, i32* [[N]], align 4 14990 // CHECK16-NEXT: store i32 [[TMP103]], i32* [[N_CASTED31]], align 4 14991 // CHECK16-NEXT: [[TMP104:%.*]] = load i32, i32* [[N_CASTED31]], align 4 14992 // CHECK16-NEXT: [[TMP105:%.*]] = mul nuw i32 [[TMP0]], 4 14993 // CHECK16-NEXT: [[TMP106:%.*]] = sext i32 [[TMP105]] to i64 14994 // CHECK16-NEXT: [[TMP107:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0 14995 // CHECK16-NEXT: [[TMP108:%.*]] = bitcast i8** [[TMP107]] to i32* 14996 // CHECK16-NEXT: store i32 [[TMP104]], i32* [[TMP108]], align 4 14997 // CHECK16-NEXT: [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0 14998 // CHECK16-NEXT: [[TMP110:%.*]] = bitcast i8** [[TMP109]] to i32* 14999 // CHECK16-NEXT: store i32 [[TMP104]], i32* [[TMP110]], align 4 15000 // CHECK16-NEXT: [[TMP111:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 0 15001 // CHECK16-NEXT: store i64 4, i64* [[TMP111]], align 4 15002 // CHECK16-NEXT: [[TMP112:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 0 15003 // CHECK16-NEXT: store i8* null, i8** [[TMP112]], align 4 15004 // CHECK16-NEXT: [[TMP113:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 1 15005 // CHECK16-NEXT: [[TMP114:%.*]] = bitcast i8** [[TMP113]] to i32* 15006 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[TMP114]], align 4 15007 // CHECK16-NEXT: [[TMP115:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 1 15008 // CHECK16-NEXT: [[TMP116:%.*]] = bitcast i8** [[TMP115]] to i32* 15009 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[TMP116]], align 4 15010 // CHECK16-NEXT: [[TMP117:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 1 15011 // CHECK16-NEXT: store i64 4, i64* [[TMP117]], align 4 15012 // CHECK16-NEXT: [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 1 15013 // CHECK16-NEXT: store i8* null, i8** [[TMP118]], align 4 15014 // CHECK16-NEXT: [[TMP119:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 2 15015 // CHECK16-NEXT: [[TMP120:%.*]] = bitcast i8** [[TMP119]] to i32** 15016 // CHECK16-NEXT: store i32* [[VLA]], i32** [[TMP120]], align 4 15017 // CHECK16-NEXT: [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 2 15018 // CHECK16-NEXT: [[TMP122:%.*]] = bitcast i8** [[TMP121]] to i32** 15019 // CHECK16-NEXT: store i32* [[VLA]], i32** [[TMP122]], align 4 15020 // CHECK16-NEXT: [[TMP123:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 2 15021 // CHECK16-NEXT: store i64 [[TMP106]], i64* [[TMP123]], align 4 15022 // CHECK16-NEXT: [[TMP124:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 2 15023 // CHECK16-NEXT: store i8* null, i8** [[TMP124]], align 4 15024 // CHECK16-NEXT: [[TMP125:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0 15025 // CHECK16-NEXT: [[TMP126:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0 15026 // CHECK16-NEXT: [[TMP127:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 0 15027 // CHECK16-NEXT: [[TMP128:%.*]] = load i32, i32* [[N]], align 4 15028 // CHECK16-NEXT: store i32 [[TMP128]], i32* [[DOTCAPTURE_EXPR_37]], align 4 15029 // CHECK16-NEXT: [[TMP129:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_37]], align 4 15030 // CHECK16-NEXT: [[SUB39:%.*]] = sub nsw i32 [[TMP129]], 0 15031 // CHECK16-NEXT: [[DIV40:%.*]] = sdiv i32 [[SUB39]], 1 15032 // CHECK16-NEXT: [[SUB41:%.*]] = sub nsw i32 [[DIV40]], 1 15033 // CHECK16-NEXT: store i32 [[SUB41]], i32* [[DOTCAPTURE_EXPR_38]], align 4 15034 // CHECK16-NEXT: [[TMP130:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_38]], align 4 15035 // CHECK16-NEXT: [[ADD42:%.*]] = add nsw i32 [[TMP130]], 1 15036 // CHECK16-NEXT: [[TMP131:%.*]] = zext i32 [[ADD42]] to i64 15037 // CHECK16-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP131]]) 15038 // CHECK16-NEXT: [[TMP132:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, i32 3, i8** [[TMP125]], i8** [[TMP126]], i64* [[TMP127]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 15039 // CHECK16-NEXT: [[TMP133:%.*]] = icmp ne i32 [[TMP132]], 0 15040 // CHECK16-NEXT: br i1 [[TMP133]], label [[OMP_OFFLOAD_FAILED43:%.*]], label [[OMP_OFFLOAD_CONT44:%.*]] 15041 // CHECK16: omp_offload.failed43: 15042 // CHECK16-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i32 [[TMP104]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 15043 // CHECK16-NEXT: br label [[OMP_OFFLOAD_CONT44]] 15044 // CHECK16: omp_offload.cont44: 15045 // CHECK16-NEXT: [[TMP134:%.*]] = load i32, i32* [[M]], align 4 15046 // CHECK16-NEXT: store i32 [[TMP134]], i32* [[M_CASTED45]], align 4 15047 // CHECK16-NEXT: [[TMP135:%.*]] = load i32, i32* [[M_CASTED45]], align 4 15048 // CHECK16-NEXT: [[TMP136:%.*]] = load i32, i32* [[N]], align 4 15049 // CHECK16-NEXT: store i32 [[TMP136]], i32* [[N_CASTED46]], align 4 15050 // CHECK16-NEXT: [[TMP137:%.*]] = load i32, i32* [[N_CASTED46]], align 4 15051 // CHECK16-NEXT: [[TMP138:%.*]] = mul nuw i32 [[TMP0]], 4 15052 // CHECK16-NEXT: [[TMP139:%.*]] = sext i32 [[TMP138]] to i64 15053 // CHECK16-NEXT: [[TMP140:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0 15054 // CHECK16-NEXT: [[TMP141:%.*]] = bitcast i8** [[TMP140]] to i32* 15055 // CHECK16-NEXT: store i32 [[TMP135]], i32* [[TMP141]], align 4 15056 // CHECK16-NEXT: [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0 15057 // CHECK16-NEXT: [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i32* 15058 // CHECK16-NEXT: store i32 [[TMP135]], i32* [[TMP143]], align 4 15059 // CHECK16-NEXT: [[TMP144:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 0 15060 // CHECK16-NEXT: store i64 4, i64* [[TMP144]], align 4 15061 // CHECK16-NEXT: [[TMP145:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 0 15062 // CHECK16-NEXT: store i8* null, i8** [[TMP145]], align 4 15063 // CHECK16-NEXT: [[TMP146:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 1 15064 // CHECK16-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i32* 15065 // CHECK16-NEXT: store i32 [[TMP137]], i32* [[TMP147]], align 4 15066 // CHECK16-NEXT: [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 1 15067 // CHECK16-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i32* 15068 // CHECK16-NEXT: store i32 [[TMP137]], i32* [[TMP149]], align 4 15069 // CHECK16-NEXT: [[TMP150:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 1 15070 // CHECK16-NEXT: store i64 4, i64* [[TMP150]], align 4 15071 // CHECK16-NEXT: [[TMP151:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 1 15072 // CHECK16-NEXT: store i8* null, i8** [[TMP151]], align 4 15073 // CHECK16-NEXT: [[TMP152:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 2 15074 // CHECK16-NEXT: [[TMP153:%.*]] = bitcast i8** [[TMP152]] to i32* 15075 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[TMP153]], align 4 15076 // CHECK16-NEXT: [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 2 15077 // CHECK16-NEXT: [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32* 15078 // CHECK16-NEXT: store i32 [[TMP0]], i32* [[TMP155]], align 4 15079 // CHECK16-NEXT: [[TMP156:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 2 15080 // CHECK16-NEXT: store i64 4, i64* [[TMP156]], align 4 15081 // CHECK16-NEXT: [[TMP157:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 2 15082 // CHECK16-NEXT: store i8* null, i8** [[TMP157]], align 4 15083 // CHECK16-NEXT: [[TMP158:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 3 15084 // CHECK16-NEXT: [[TMP159:%.*]] = bitcast i8** [[TMP158]] to i32** 15085 // CHECK16-NEXT: store i32* [[VLA]], i32** [[TMP159]], align 4 15086 // CHECK16-NEXT: [[TMP160:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 3 15087 // CHECK16-NEXT: [[TMP161:%.*]] = bitcast i8** [[TMP160]] to i32** 15088 // CHECK16-NEXT: store i32* [[VLA]], i32** [[TMP161]], align 4 15089 // CHECK16-NEXT: [[TMP162:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 3 15090 // CHECK16-NEXT: store i64 [[TMP139]], i64* [[TMP162]], align 4 15091 // CHECK16-NEXT: [[TMP163:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 3 15092 // CHECK16-NEXT: store i8* null, i8** [[TMP163]], align 4 15093 // CHECK16-NEXT: [[TMP164:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0 15094 // CHECK16-NEXT: [[TMP165:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0 15095 // CHECK16-NEXT: [[TMP166:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 0 15096 // CHECK16-NEXT: [[TMP167:%.*]] = load i32, i32* [[N]], align 4 15097 // CHECK16-NEXT: store i32 [[TMP167]], i32* [[DOTCAPTURE_EXPR_52]], align 4 15098 // CHECK16-NEXT: [[TMP168:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_52]], align 4 15099 // CHECK16-NEXT: [[SUB54:%.*]] = sub nsw i32 [[TMP168]], 0 15100 // CHECK16-NEXT: [[DIV55:%.*]] = sdiv i32 [[SUB54]], 1 15101 // CHECK16-NEXT: [[SUB56:%.*]] = sub nsw i32 [[DIV55]], 1 15102 // CHECK16-NEXT: store i32 [[SUB56]], i32* [[DOTCAPTURE_EXPR_53]], align 4 15103 // CHECK16-NEXT: [[TMP169:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_53]], align 4 15104 // CHECK16-NEXT: [[ADD57:%.*]] = add nsw i32 [[TMP169]], 1 15105 // CHECK16-NEXT: [[TMP170:%.*]] = zext i32 [[ADD57]] to i64 15106 // CHECK16-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP170]]) 15107 // CHECK16-NEXT: [[TMP171:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, i32 4, i8** [[TMP164]], i8** [[TMP165]], i64* [[TMP166]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 15108 // CHECK16-NEXT: [[TMP172:%.*]] = icmp ne i32 [[TMP171]], 0 15109 // CHECK16-NEXT: br i1 [[TMP172]], label [[OMP_OFFLOAD_FAILED58:%.*]], label [[OMP_OFFLOAD_CONT59:%.*]] 15110 // CHECK16: omp_offload.failed58: 15111 // CHECK16-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i32 [[TMP135]], i32 [[TMP137]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 15112 // CHECK16-NEXT: br label [[OMP_OFFLOAD_CONT59]] 15113 // CHECK16: omp_offload.cont59: 15114 // CHECK16-NEXT: [[TMP173:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 15115 // CHECK16-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP173]]) 15116 // CHECK16-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 15117 // CHECK16-NEXT: [[TMP174:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 15118 // CHECK16-NEXT: call void @llvm.stackrestore(i8* [[TMP174]]) 15119 // CHECK16-NEXT: [[TMP175:%.*]] = load i32, i32* [[RETVAL]], align 4 15120 // CHECK16-NEXT: ret i32 [[TMP175]] 15121 // 15122 // 15123 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148 15124 // CHECK16-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 15125 // CHECK16-NEXT: entry: 15126 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 15127 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 15128 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 15129 // CHECK16-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 15130 // CHECK16-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 15131 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 15132 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 15133 // CHECK16-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 15134 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 15135 // CHECK16-NEXT: ret void 15136 // 15137 // 15138 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined. 15139 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 15140 // CHECK16-NEXT: entry: 15141 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 15142 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 15143 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 15144 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 15145 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 15146 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 15147 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 15148 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 15149 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 15150 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 15151 // CHECK16-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 15152 // CHECK16-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 15153 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 15154 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 15155 // CHECK16-NEXT: [[I3:%.*]] = alloca i32, align 4 15156 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 15157 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 15158 // CHECK16-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 15159 // CHECK16-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 15160 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 15161 // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 15162 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 15163 // CHECK16-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 15164 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 15165 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 15166 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15167 // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 15168 // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 15169 // CHECK16-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 15170 // CHECK16-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 15171 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 15172 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15173 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 15174 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 15175 // CHECK16: omp.precond.then: 15176 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 15177 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15178 // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 15179 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 15180 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 15181 // CHECK16-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 15182 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 15183 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 15184 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15185 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15186 // CHECK16-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 15187 // CHECK16-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 15188 // CHECK16: cond.true: 15189 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15190 // CHECK16-NEXT: br label [[COND_END:%.*]] 15191 // CHECK16: cond.false: 15192 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15193 // CHECK16-NEXT: br label [[COND_END]] 15194 // CHECK16: cond.end: 15195 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 15196 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 15197 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 15198 // CHECK16-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 15199 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 15200 // CHECK16: omp.inner.for.cond: 15201 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15202 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15203 // CHECK16-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 15204 // CHECK16-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 15205 // CHECK16: omp.inner.for.body: 15206 // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 15207 // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15208 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 15209 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 15210 // CHECK16: omp.inner.for.inc: 15211 // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15212 // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 15213 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 15214 // CHECK16-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 15215 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]] 15216 // CHECK16: omp.inner.for.end: 15217 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 15218 // CHECK16: omp.loop.exit: 15219 // CHECK16-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 15220 // CHECK16-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 15221 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 15222 // CHECK16-NEXT: br label [[OMP_PRECOND_END]] 15223 // CHECK16: omp.precond.end: 15224 // CHECK16-NEXT: ret void 15225 // 15226 // 15227 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..1 15228 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 15229 // CHECK16-NEXT: entry: 15230 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 15231 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 15232 // CHECK16-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 15233 // CHECK16-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 15234 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 15235 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 15236 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 15237 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 15238 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 15239 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 15240 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 15241 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 15242 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 15243 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 15244 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 15245 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 15246 // CHECK16-NEXT: [[I3:%.*]] = alloca i32, align 4 15247 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 15248 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 15249 // CHECK16-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 15250 // CHECK16-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 15251 // CHECK16-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 15252 // CHECK16-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 15253 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 15254 // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 15255 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 15256 // CHECK16-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 15257 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 15258 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 15259 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15260 // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 15261 // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 15262 // CHECK16-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 15263 // CHECK16-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 15264 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 15265 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15266 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 15267 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 15268 // CHECK16: omp.precond.then: 15269 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 15270 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15271 // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 15272 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 15273 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 15274 // CHECK16-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 15275 // CHECK16-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 15276 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 15277 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 15278 // CHECK16-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 15279 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 15280 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 15281 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15282 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15283 // CHECK16-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 15284 // CHECK16-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 15285 // CHECK16: cond.true: 15286 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15287 // CHECK16-NEXT: br label [[COND_END:%.*]] 15288 // CHECK16: cond.false: 15289 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15290 // CHECK16-NEXT: br label [[COND_END]] 15291 // CHECK16: cond.end: 15292 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 15293 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 15294 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 15295 // CHECK16-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 15296 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 15297 // CHECK16: omp.inner.for.cond: 15298 // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15299 // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15300 // CHECK16-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 15301 // CHECK16-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 15302 // CHECK16: omp.inner.for.body: 15303 // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15304 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 15305 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 15306 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 15307 // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4 15308 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]] 15309 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 15310 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 15311 // CHECK16: omp.body.continue: 15312 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 15313 // CHECK16: omp.inner.for.inc: 15314 // CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15315 // CHECK16-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1 15316 // CHECK16-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 15317 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]] 15318 // CHECK16: omp.inner.for.end: 15319 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 15320 // CHECK16: omp.loop.exit: 15321 // CHECK16-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 15322 // CHECK16-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 15323 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 15324 // CHECK16-NEXT: br label [[OMP_PRECOND_END]] 15325 // CHECK16: omp.precond.end: 15326 // CHECK16-NEXT: ret void 15327 // 15328 // 15329 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153 15330 // CHECK16-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 15331 // CHECK16-NEXT: entry: 15332 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 15333 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 15334 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 15335 // CHECK16-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 15336 // CHECK16-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 15337 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 15338 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 15339 // CHECK16-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 15340 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 15341 // CHECK16-NEXT: ret void 15342 // 15343 // 15344 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..2 15345 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 15346 // CHECK16-NEXT: entry: 15347 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 15348 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 15349 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 15350 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 15351 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 15352 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 15353 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 15354 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 15355 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 15356 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 15357 // CHECK16-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 15358 // CHECK16-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 15359 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 15360 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 15361 // CHECK16-NEXT: [[I3:%.*]] = alloca i32, align 4 15362 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 15363 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 15364 // CHECK16-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 15365 // CHECK16-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 15366 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 15367 // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 15368 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 15369 // CHECK16-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 15370 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 15371 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 15372 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15373 // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 15374 // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 15375 // CHECK16-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 15376 // CHECK16-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 15377 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 15378 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15379 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 15380 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 15381 // CHECK16: omp.precond.then: 15382 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 15383 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15384 // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 15385 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 15386 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 15387 // CHECK16-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 15388 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 15389 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 15390 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15391 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15392 // CHECK16-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 15393 // CHECK16-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 15394 // CHECK16: cond.true: 15395 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15396 // CHECK16-NEXT: br label [[COND_END:%.*]] 15397 // CHECK16: cond.false: 15398 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15399 // CHECK16-NEXT: br label [[COND_END]] 15400 // CHECK16: cond.end: 15401 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 15402 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 15403 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 15404 // CHECK16-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 15405 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 15406 // CHECK16: omp.inner.for.cond: 15407 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15408 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15409 // CHECK16-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 15410 // CHECK16-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 15411 // CHECK16: omp.inner.for.body: 15412 // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 15413 // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15414 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 15415 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 15416 // CHECK16: omp.inner.for.inc: 15417 // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15418 // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 15419 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 15420 // CHECK16-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 15421 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]] 15422 // CHECK16: omp.inner.for.end: 15423 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 15424 // CHECK16: omp.loop.exit: 15425 // CHECK16-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 15426 // CHECK16-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 15427 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 15428 // CHECK16-NEXT: br label [[OMP_PRECOND_END]] 15429 // CHECK16: omp.precond.end: 15430 // CHECK16-NEXT: ret void 15431 // 15432 // 15433 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..3 15434 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 15435 // CHECK16-NEXT: entry: 15436 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 15437 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 15438 // CHECK16-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 15439 // CHECK16-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 15440 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 15441 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 15442 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 15443 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 15444 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 15445 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 15446 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 15447 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 15448 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 15449 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 15450 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 15451 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 15452 // CHECK16-NEXT: [[I3:%.*]] = alloca i32, align 4 15453 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 15454 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 15455 // CHECK16-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 15456 // CHECK16-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 15457 // CHECK16-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 15458 // CHECK16-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 15459 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 15460 // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 15461 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 15462 // CHECK16-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 15463 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 15464 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 15465 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15466 // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 15467 // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 15468 // CHECK16-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 15469 // CHECK16-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 15470 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 15471 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15472 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 15473 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 15474 // CHECK16: omp.precond.then: 15475 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 15476 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15477 // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 15478 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 15479 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 15480 // CHECK16-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 15481 // CHECK16-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 15482 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 15483 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 15484 // CHECK16-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 15485 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 15486 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 15487 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15488 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15489 // CHECK16-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 15490 // CHECK16-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 15491 // CHECK16: cond.true: 15492 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15493 // CHECK16-NEXT: br label [[COND_END:%.*]] 15494 // CHECK16: cond.false: 15495 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15496 // CHECK16-NEXT: br label [[COND_END]] 15497 // CHECK16: cond.end: 15498 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 15499 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 15500 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 15501 // CHECK16-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 15502 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 15503 // CHECK16: omp.inner.for.cond: 15504 // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15505 // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15506 // CHECK16-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 15507 // CHECK16-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 15508 // CHECK16: omp.inner.for.body: 15509 // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15510 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 15511 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 15512 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 15513 // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4 15514 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]] 15515 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 15516 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 15517 // CHECK16: omp.body.continue: 15518 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 15519 // CHECK16: omp.inner.for.inc: 15520 // CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15521 // CHECK16-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1 15522 // CHECK16-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 15523 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]] 15524 // CHECK16: omp.inner.for.end: 15525 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 15526 // CHECK16: omp.loop.exit: 15527 // CHECK16-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 15528 // CHECK16-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 15529 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 15530 // CHECK16-NEXT: br label [[OMP_PRECOND_END]] 15531 // CHECK16: omp.precond.end: 15532 // CHECK16-NEXT: ret void 15533 // 15534 // 15535 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158 15536 // CHECK16-SAME: (i32 [[M:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 15537 // CHECK16-NEXT: entry: 15538 // CHECK16-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 15539 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 15540 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 15541 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 15542 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 15543 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 15544 // CHECK16-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 15545 // CHECK16-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 15546 // CHECK16-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 15547 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 15548 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 15549 // CHECK16-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 15550 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4 15551 // CHECK16-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 15552 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15553 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 15554 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 15555 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]]) 15556 // CHECK16-NEXT: ret void 15557 // 15558 // 15559 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..5 15560 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 15561 // CHECK16-NEXT: entry: 15562 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 15563 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 15564 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 15565 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 15566 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 15567 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 15568 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 15569 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 15570 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 15571 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 15572 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 15573 // CHECK16-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 15574 // CHECK16-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 15575 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 15576 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 15577 // CHECK16-NEXT: [[I4:%.*]] = alloca i32, align 4 15578 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 15579 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 15580 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 15581 // CHECK16-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 15582 // CHECK16-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 15583 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 15584 // CHECK16-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 15585 // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 15586 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 15587 // CHECK16-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 15588 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 15589 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 15590 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15591 // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 15592 // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 15593 // CHECK16-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 15594 // CHECK16-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 15595 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 15596 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15597 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 15598 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 15599 // CHECK16: omp.precond.then: 15600 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 15601 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 15602 // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 15603 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 15604 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 15605 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 15606 // CHECK16-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 15607 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 15608 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]]) 15609 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15610 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 15611 // CHECK16-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 15612 // CHECK16-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 15613 // CHECK16: cond.true: 15614 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 15615 // CHECK16-NEXT: br label [[COND_END:%.*]] 15616 // CHECK16: cond.false: 15617 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15618 // CHECK16-NEXT: br label [[COND_END]] 15619 // CHECK16: cond.end: 15620 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 15621 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 15622 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 15623 // CHECK16-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 15624 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 15625 // CHECK16: omp.inner.for.cond: 15626 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15627 // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 15628 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1 15629 // CHECK16-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]] 15630 // CHECK16-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 15631 // CHECK16: omp.inner.for.body: 15632 // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 15633 // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15634 // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 15635 // CHECK16-NEXT: store i32 [[TMP19]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 15636 // CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 15637 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP20]]) 15638 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 15639 // CHECK16: omp.inner.for.inc: 15640 // CHECK16-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15641 // CHECK16-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 15642 // CHECK16-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 15643 // CHECK16-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 15644 // CHECK16-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 15645 // CHECK16-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 15646 // CHECK16-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 15647 // CHECK16-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4 15648 // CHECK16-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15649 // CHECK16-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 15650 // CHECK16-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 15651 // CHECK16-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4 15652 // CHECK16-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15653 // CHECK16-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 15654 // CHECK16-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP27]], [[TMP28]] 15655 // CHECK16-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]] 15656 // CHECK16: cond.true11: 15657 // CHECK16-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 15658 // CHECK16-NEXT: br label [[COND_END13:%.*]] 15659 // CHECK16: cond.false12: 15660 // CHECK16-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15661 // CHECK16-NEXT: br label [[COND_END13]] 15662 // CHECK16: cond.end13: 15663 // CHECK16-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP29]], [[COND_TRUE11]] ], [ [[TMP30]], [[COND_FALSE12]] ] 15664 // CHECK16-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4 15665 // CHECK16-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 15666 // CHECK16-NEXT: store i32 [[TMP31]], i32* [[DOTOMP_IV]], align 4 15667 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]] 15668 // CHECK16: omp.inner.for.end: 15669 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 15670 // CHECK16: omp.loop.exit: 15671 // CHECK16-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 15672 // CHECK16-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4 15673 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]]) 15674 // CHECK16-NEXT: br label [[OMP_PRECOND_END]] 15675 // CHECK16: omp.precond.end: 15676 // CHECK16-NEXT: ret void 15677 // 15678 // 15679 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..6 15680 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 15681 // CHECK16-NEXT: entry: 15682 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 15683 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 15684 // CHECK16-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 15685 // CHECK16-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 15686 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 15687 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 15688 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 15689 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 15690 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 15691 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 15692 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 15693 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 15694 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 15695 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 15696 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 15697 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 15698 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 15699 // CHECK16-NEXT: [[I4:%.*]] = alloca i32, align 4 15700 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 15701 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 15702 // CHECK16-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 15703 // CHECK16-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 15704 // CHECK16-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 15705 // CHECK16-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 15706 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 15707 // CHECK16-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 15708 // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 15709 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 15710 // CHECK16-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 15711 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 15712 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 15713 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15714 // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 15715 // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 15716 // CHECK16-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 15717 // CHECK16-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 15718 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 15719 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15720 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 15721 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 15722 // CHECK16: omp.precond.then: 15723 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 15724 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 15725 // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 15726 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 15727 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 15728 // CHECK16-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 15729 // CHECK16-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 15730 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 15731 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 15732 // CHECK16-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 15733 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 15734 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 15735 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15736 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 15737 // CHECK16-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 15738 // CHECK16-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 15739 // CHECK16: cond.true: 15740 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 15741 // CHECK16-NEXT: br label [[COND_END:%.*]] 15742 // CHECK16: cond.false: 15743 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15744 // CHECK16-NEXT: br label [[COND_END]] 15745 // CHECK16: cond.end: 15746 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 15747 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 15748 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 15749 // CHECK16-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 15750 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 15751 // CHECK16: omp.inner.for.cond: 15752 // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15753 // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15754 // CHECK16-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 15755 // CHECK16-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 15756 // CHECK16: omp.inner.for.body: 15757 // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15758 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 15759 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 15760 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 15761 // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4 15762 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]] 15763 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 15764 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 15765 // CHECK16: omp.body.continue: 15766 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 15767 // CHECK16: omp.inner.for.inc: 15768 // CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15769 // CHECK16-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 15770 // CHECK16-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 15771 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]] 15772 // CHECK16: omp.inner.for.end: 15773 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 15774 // CHECK16: omp.loop.exit: 15775 // CHECK16-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 15776 // CHECK16-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 15777 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 15778 // CHECK16-NEXT: br label [[OMP_PRECOND_END]] 15779 // CHECK16: omp.precond.end: 15780 // CHECK16-NEXT: ret void 15781 // 15782 // 15783 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163 15784 // CHECK16-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 15785 // CHECK16-NEXT: entry: 15786 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 15787 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 15788 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 15789 // CHECK16-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 15790 // CHECK16-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 15791 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 15792 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 15793 // CHECK16-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 15794 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 15795 // CHECK16-NEXT: ret void 15796 // 15797 // 15798 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..8 15799 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 15800 // CHECK16-NEXT: entry: 15801 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 15802 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 15803 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 15804 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 15805 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 15806 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 15807 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 15808 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 15809 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 15810 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 15811 // CHECK16-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 15812 // CHECK16-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 15813 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 15814 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 15815 // CHECK16-NEXT: [[I3:%.*]] = alloca i32, align 4 15816 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 15817 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 15818 // CHECK16-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 15819 // CHECK16-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 15820 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 15821 // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 15822 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 15823 // CHECK16-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 15824 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 15825 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 15826 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15827 // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 15828 // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 15829 // CHECK16-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 15830 // CHECK16-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 15831 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 15832 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15833 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 15834 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 15835 // CHECK16: omp.precond.then: 15836 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 15837 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15838 // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 15839 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 15840 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 15841 // CHECK16-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 15842 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 15843 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 15844 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15845 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15846 // CHECK16-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 15847 // CHECK16-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 15848 // CHECK16: cond.true: 15849 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15850 // CHECK16-NEXT: br label [[COND_END:%.*]] 15851 // CHECK16: cond.false: 15852 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15853 // CHECK16-NEXT: br label [[COND_END]] 15854 // CHECK16: cond.end: 15855 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 15856 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 15857 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 15858 // CHECK16-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 15859 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 15860 // CHECK16: omp.inner.for.cond: 15861 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15862 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15863 // CHECK16-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 15864 // CHECK16-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 15865 // CHECK16: omp.inner.for.body: 15866 // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 15867 // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 15868 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 15869 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 15870 // CHECK16: omp.inner.for.inc: 15871 // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 15872 // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 15873 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 15874 // CHECK16-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 15875 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]] 15876 // CHECK16: omp.inner.for.end: 15877 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 15878 // CHECK16: omp.loop.exit: 15879 // CHECK16-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 15880 // CHECK16-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 15881 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 15882 // CHECK16-NEXT: br label [[OMP_PRECOND_END]] 15883 // CHECK16: omp.precond.end: 15884 // CHECK16-NEXT: ret void 15885 // 15886 // 15887 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..9 15888 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 15889 // CHECK16-NEXT: entry: 15890 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 15891 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 15892 // CHECK16-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 15893 // CHECK16-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 15894 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 15895 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 15896 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 15897 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 15898 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 15899 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 15900 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 15901 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 15902 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 15903 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 15904 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 15905 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 15906 // CHECK16-NEXT: [[I3:%.*]] = alloca i32, align 4 15907 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 15908 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 15909 // CHECK16-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 15910 // CHECK16-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 15911 // CHECK16-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 15912 // CHECK16-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 15913 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 15914 // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 15915 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 15916 // CHECK16-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 15917 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 15918 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 15919 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15920 // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 15921 // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 15922 // CHECK16-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 15923 // CHECK16-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 15924 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 15925 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 15926 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 15927 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 15928 // CHECK16: omp.precond.then: 15929 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 15930 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 15931 // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 15932 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 15933 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 15934 // CHECK16-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 15935 // CHECK16-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 15936 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 15937 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 15938 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 15939 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 15940 // CHECK16-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 15941 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 15942 // CHECK16-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1) 15943 // CHECK16-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 15944 // CHECK16: omp.dispatch.cond: 15945 // CHECK16-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 15946 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 15947 // CHECK16-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 15948 // CHECK16-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 15949 // CHECK16-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 15950 // CHECK16: omp.dispatch.body: 15951 // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 15952 // CHECK16-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 15953 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 15954 // CHECK16: omp.inner.for.cond: 15955 // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 15956 // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15 15957 // CHECK16-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 15958 // CHECK16-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 15959 // CHECK16: omp.inner.for.body: 15960 // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 15961 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 15962 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 15963 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !15 15964 // CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !15 15965 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP20]] 15966 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15 15967 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 15968 // CHECK16: omp.body.continue: 15969 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 15970 // CHECK16: omp.inner.for.inc: 15971 // CHECK16-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 15972 // CHECK16-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP21]], 1 15973 // CHECK16-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 15974 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 15975 // CHECK16: omp.inner.for.end: 15976 // CHECK16-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 15977 // CHECK16: omp.dispatch.inc: 15978 // CHECK16-NEXT: br label [[OMP_DISPATCH_COND]] 15979 // CHECK16: omp.dispatch.end: 15980 // CHECK16-NEXT: br label [[OMP_PRECOND_END]] 15981 // CHECK16: omp.precond.end: 15982 // CHECK16-NEXT: ret void 15983 // 15984 // 15985 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168 15986 // CHECK16-SAME: (i32 [[M:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 15987 // CHECK16-NEXT: entry: 15988 // CHECK16-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 15989 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 15990 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 15991 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 15992 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 15993 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 15994 // CHECK16-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 15995 // CHECK16-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 15996 // CHECK16-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 15997 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 15998 // CHECK16-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 15999 // CHECK16-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 16000 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4 16001 // CHECK16-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 16002 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 16003 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 16004 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 16005 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]]) 16006 // CHECK16-NEXT: ret void 16007 // 16008 // 16009 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..11 16010 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 16011 // CHECK16-NEXT: entry: 16012 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 16013 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 16014 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 16015 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 16016 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 16017 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 16018 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 16019 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 16020 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 16021 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 16022 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 16023 // CHECK16-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 16024 // CHECK16-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 16025 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 16026 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 16027 // CHECK16-NEXT: [[I4:%.*]] = alloca i32, align 4 16028 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 16029 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 16030 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 16031 // CHECK16-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 16032 // CHECK16-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 16033 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 16034 // CHECK16-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 16035 // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 16036 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 16037 // CHECK16-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 16038 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 16039 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 16040 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 16041 // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 16042 // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 16043 // CHECK16-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 16044 // CHECK16-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 16045 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 16046 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 16047 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 16048 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 16049 // CHECK16: omp.precond.then: 16050 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 16051 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 16052 // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 16053 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 16054 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 16055 // CHECK16-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 16056 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 16057 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 16058 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16059 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 16060 // CHECK16-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 16061 // CHECK16-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 16062 // CHECK16: cond.true: 16063 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 16064 // CHECK16-NEXT: br label [[COND_END:%.*]] 16065 // CHECK16: cond.false: 16066 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16067 // CHECK16-NEXT: br label [[COND_END]] 16068 // CHECK16: cond.end: 16069 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 16070 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 16071 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 16072 // CHECK16-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 16073 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 16074 // CHECK16: omp.inner.for.cond: 16075 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16076 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16077 // CHECK16-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 16078 // CHECK16-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 16079 // CHECK16: omp.inner.for.body: 16080 // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 16081 // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16082 // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 16083 // CHECK16-NEXT: store i32 [[TMP18]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 16084 // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 16085 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP19]]) 16086 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 16087 // CHECK16: omp.inner.for.inc: 16088 // CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16089 // CHECK16-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 16090 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 16091 // CHECK16-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 16092 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]] 16093 // CHECK16: omp.inner.for.end: 16094 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 16095 // CHECK16: omp.loop.exit: 16096 // CHECK16-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 16097 // CHECK16-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 16098 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 16099 // CHECK16-NEXT: br label [[OMP_PRECOND_END]] 16100 // CHECK16: omp.precond.end: 16101 // CHECK16-NEXT: ret void 16102 // 16103 // 16104 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..12 16105 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 16106 // CHECK16-NEXT: entry: 16107 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 16108 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 16109 // CHECK16-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 16110 // CHECK16-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 16111 // CHECK16-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 16112 // CHECK16-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 16113 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 16114 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 16115 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 16116 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 16117 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 16118 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 16119 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 16120 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 16121 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 16122 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 16123 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 16124 // CHECK16-NEXT: [[I4:%.*]] = alloca i32, align 4 16125 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 16126 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 16127 // CHECK16-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 16128 // CHECK16-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 16129 // CHECK16-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 16130 // CHECK16-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 16131 // CHECK16-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 16132 // CHECK16-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 16133 // CHECK16-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 16134 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 16135 // CHECK16-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 16136 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 16137 // CHECK16-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 16138 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 16139 // CHECK16-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 16140 // CHECK16-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 16141 // CHECK16-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 16142 // CHECK16-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 16143 // CHECK16-NEXT: store i32 0, i32* [[I]], align 4 16144 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 16145 // CHECK16-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 16146 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 16147 // CHECK16: omp.precond.then: 16148 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 16149 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 16150 // CHECK16-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 16151 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 16152 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 16153 // CHECK16-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 16154 // CHECK16-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 16155 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 16156 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 16157 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 16158 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 16159 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16160 // CHECK16-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 16161 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 16162 // CHECK16-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 1073741859, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]]) 16163 // CHECK16-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 16164 // CHECK16: omp.dispatch.cond: 16165 // CHECK16-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 16166 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 16167 // CHECK16-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 16168 // CHECK16-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 16169 // CHECK16-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 16170 // CHECK16: omp.dispatch.body: 16171 // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 16172 // CHECK16-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 16173 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 16174 // CHECK16: omp.inner.for.cond: 16175 // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 16176 // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18 16177 // CHECK16-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 16178 // CHECK16-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 16179 // CHECK16: omp.inner.for.body: 16180 // CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 16181 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 16182 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 16183 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !18 16184 // CHECK16-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !18 16185 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP21]] 16186 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18 16187 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 16188 // CHECK16: omp.body.continue: 16189 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 16190 // CHECK16: omp.inner.for.inc: 16191 // CHECK16-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 16192 // CHECK16-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP22]], 1 16193 // CHECK16-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 16194 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]] 16195 // CHECK16: omp.inner.for.end: 16196 // CHECK16-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 16197 // CHECK16: omp.dispatch.inc: 16198 // CHECK16-NEXT: br label [[OMP_DISPATCH_COND]] 16199 // CHECK16: omp.dispatch.end: 16200 // CHECK16-NEXT: br label [[OMP_PRECOND_END]] 16201 // CHECK16: omp.precond.end: 16202 // CHECK16-NEXT: ret void 16203 // 16204 // 16205 // CHECK16-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 16206 // CHECK16-SAME: (i32 [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat { 16207 // CHECK16-NEXT: entry: 16208 // CHECK16-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 16209 // CHECK16-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 16210 // CHECK16-NEXT: [[M:%.*]] = alloca i32, align 4 16211 // CHECK16-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 16212 // CHECK16-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 16213 // CHECK16-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 16214 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 16215 // CHECK16-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4 16216 // CHECK16-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4 16217 // CHECK16-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4 16218 // CHECK16-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 16219 // CHECK16-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4 16220 // CHECK16-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 4 16221 // CHECK16-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 4 16222 // CHECK16-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 4 16223 // CHECK16-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 16224 // CHECK16-NEXT: [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 4 16225 // CHECK16-NEXT: [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 4 16226 // CHECK16-NEXT: [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 4 16227 // CHECK16-NEXT: [[_TMP16:%.*]] = alloca i32, align 4 16228 // CHECK16-NEXT: [[M_CASTED19:%.*]] = alloca i32, align 4 16229 // CHECK16-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [2 x i8*], align 4 16230 // CHECK16-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [2 x i8*], align 4 16231 // CHECK16-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [2 x i8*], align 4 16232 // CHECK16-NEXT: [[_TMP23:%.*]] = alloca i32, align 4 16233 // CHECK16-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 16234 // CHECK16-NEXT: store i32 10, i32* [[M]], align 4 16235 // CHECK16-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 16236 // CHECK16-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 16237 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4 16238 // CHECK16-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 16239 // CHECK16-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 16240 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4 16241 // CHECK16-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 16242 // CHECK16-NEXT: store i8* null, i8** [[TMP4]], align 4 16243 // CHECK16-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 16244 // CHECK16-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 16245 // CHECK16-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 16246 // CHECK16-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 16247 // CHECK16-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 16248 // CHECK16-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 16249 // CHECK16: omp_offload.failed: 16250 // CHECK16-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]] 16251 // CHECK16-NEXT: br label [[OMP_OFFLOAD_CONT]] 16252 // CHECK16: omp_offload.cont: 16253 // CHECK16-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 16254 // CHECK16-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** 16255 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4 16256 // CHECK16-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 16257 // CHECK16-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** 16258 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4 16259 // CHECK16-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0 16260 // CHECK16-NEXT: store i8* null, i8** [[TMP13]], align 4 16261 // CHECK16-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 16262 // CHECK16-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 16263 // CHECK16-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 16264 // CHECK16-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 16265 // CHECK16-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 16266 // CHECK16-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 16267 // CHECK16: omp_offload.failed5: 16268 // CHECK16-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121([10 x i32]* [[A]]) #[[ATTR3]] 16269 // CHECK16-NEXT: br label [[OMP_OFFLOAD_CONT6]] 16270 // CHECK16: omp_offload.cont6: 16271 // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[M]], align 4 16272 // CHECK16-NEXT: store i32 [[TMP18]], i32* [[M_CASTED]], align 4 16273 // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[M_CASTED]], align 4 16274 // CHECK16-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 16275 // CHECK16-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32* 16276 // CHECK16-NEXT: store i32 [[TMP19]], i32* [[TMP21]], align 4 16277 // CHECK16-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 16278 // CHECK16-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32* 16279 // CHECK16-NEXT: store i32 [[TMP19]], i32* [[TMP23]], align 4 16280 // CHECK16-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0 16281 // CHECK16-NEXT: store i8* null, i8** [[TMP24]], align 4 16282 // CHECK16-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1 16283 // CHECK16-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]** 16284 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 4 16285 // CHECK16-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1 16286 // CHECK16-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]** 16287 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 4 16288 // CHECK16-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 1 16289 // CHECK16-NEXT: store i8* null, i8** [[TMP29]], align 4 16290 // CHECK16-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 16291 // CHECK16-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 16292 // CHECK16-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 16293 // CHECK16-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 16294 // CHECK16-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 16295 // CHECK16-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] 16296 // CHECK16: omp_offload.failed11: 16297 // CHECK16-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i32 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]] 16298 // CHECK16-NEXT: br label [[OMP_OFFLOAD_CONT12]] 16299 // CHECK16: omp_offload.cont12: 16300 // CHECK16-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 16301 // CHECK16-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]** 16302 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 4 16303 // CHECK16-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 16304 // CHECK16-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]** 16305 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 4 16306 // CHECK16-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 0 16307 // CHECK16-NEXT: store i8* null, i8** [[TMP38]], align 4 16308 // CHECK16-NEXT: [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 16309 // CHECK16-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 16310 // CHECK16-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 16311 // CHECK16-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 16312 // CHECK16-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0 16313 // CHECK16-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]] 16314 // CHECK16: omp_offload.failed17: 16315 // CHECK16-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131([10 x i32]* [[A]]) #[[ATTR3]] 16316 // CHECK16-NEXT: br label [[OMP_OFFLOAD_CONT18]] 16317 // CHECK16: omp_offload.cont18: 16318 // CHECK16-NEXT: [[TMP43:%.*]] = load i32, i32* [[M]], align 4 16319 // CHECK16-NEXT: store i32 [[TMP43]], i32* [[M_CASTED19]], align 4 16320 // CHECK16-NEXT: [[TMP44:%.*]] = load i32, i32* [[M_CASTED19]], align 4 16321 // CHECK16-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 16322 // CHECK16-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32* 16323 // CHECK16-NEXT: store i32 [[TMP44]], i32* [[TMP46]], align 4 16324 // CHECK16-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 16325 // CHECK16-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32* 16326 // CHECK16-NEXT: store i32 [[TMP44]], i32* [[TMP48]], align 4 16327 // CHECK16-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 0 16328 // CHECK16-NEXT: store i8* null, i8** [[TMP49]], align 4 16329 // CHECK16-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1 16330 // CHECK16-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]** 16331 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 4 16332 // CHECK16-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 1 16333 // CHECK16-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]** 16334 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 4 16335 // CHECK16-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 1 16336 // CHECK16-NEXT: store i8* null, i8** [[TMP54]], align 4 16337 // CHECK16-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 16338 // CHECK16-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 16339 // CHECK16-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 16340 // CHECK16-NEXT: [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 16341 // CHECK16-NEXT: [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0 16342 // CHECK16-NEXT: br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]] 16343 // CHECK16: omp_offload.failed24: 16344 // CHECK16-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i32 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]] 16345 // CHECK16-NEXT: br label [[OMP_OFFLOAD_CONT25]] 16346 // CHECK16: omp_offload.cont25: 16347 // CHECK16-NEXT: ret i32 0 16348 // 16349 // 16350 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116 16351 // CHECK16-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 16352 // CHECK16-NEXT: entry: 16353 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 16354 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 16355 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 16356 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 16357 // CHECK16-NEXT: ret void 16358 // 16359 // 16360 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..14 16361 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 16362 // CHECK16-NEXT: entry: 16363 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 16364 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 16365 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 16366 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 16367 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 16368 // CHECK16-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 16369 // CHECK16-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 16370 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 16371 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 16372 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 16373 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 16374 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 16375 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 16376 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 16377 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 16378 // CHECK16-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 16379 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 16380 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 16381 // CHECK16-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 16382 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 16383 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 16384 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16385 // CHECK16-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 16386 // CHECK16-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 16387 // CHECK16: cond.true: 16388 // CHECK16-NEXT: br label [[COND_END:%.*]] 16389 // CHECK16: cond.false: 16390 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16391 // CHECK16-NEXT: br label [[COND_END]] 16392 // CHECK16: cond.end: 16393 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 16394 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 16395 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 16396 // CHECK16-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 16397 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 16398 // CHECK16: omp.inner.for.cond: 16399 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16400 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16401 // CHECK16-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 16402 // CHECK16-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 16403 // CHECK16: omp.inner.for.body: 16404 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 16405 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16406 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]) 16407 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 16408 // CHECK16: omp.inner.for.inc: 16409 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16410 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 16411 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 16412 // CHECK16-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 16413 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]] 16414 // CHECK16: omp.inner.for.end: 16415 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 16416 // CHECK16: omp.loop.exit: 16417 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 16418 // CHECK16-NEXT: ret void 16419 // 16420 // 16421 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..15 16422 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 16423 // CHECK16-NEXT: entry: 16424 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 16425 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 16426 // CHECK16-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 16427 // CHECK16-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 16428 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 16429 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 16430 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 16431 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 16432 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 16433 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 16434 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 16435 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 16436 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 16437 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 16438 // CHECK16-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 16439 // CHECK16-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 16440 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 16441 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 16442 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 16443 // CHECK16-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 16444 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 16445 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 16446 // CHECK16-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 16447 // CHECK16-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 16448 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 16449 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 16450 // CHECK16-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 16451 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 16452 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 16453 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16454 // CHECK16-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 16455 // CHECK16-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 16456 // CHECK16: cond.true: 16457 // CHECK16-NEXT: br label [[COND_END:%.*]] 16458 // CHECK16: cond.false: 16459 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16460 // CHECK16-NEXT: br label [[COND_END]] 16461 // CHECK16: cond.end: 16462 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 16463 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 16464 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 16465 // CHECK16-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 16466 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 16467 // CHECK16: omp.inner.for.cond: 16468 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16469 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16470 // CHECK16-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 16471 // CHECK16-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 16472 // CHECK16: omp.inner.for.body: 16473 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16474 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 16475 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 16476 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4 16477 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 16478 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]] 16479 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 16480 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 16481 // CHECK16: omp.body.continue: 16482 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 16483 // CHECK16: omp.inner.for.inc: 16484 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16485 // CHECK16-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 16486 // CHECK16-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 16487 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]] 16488 // CHECK16: omp.inner.for.end: 16489 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 16490 // CHECK16: omp.loop.exit: 16491 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 16492 // CHECK16-NEXT: ret void 16493 // 16494 // 16495 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121 16496 // CHECK16-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 16497 // CHECK16-NEXT: entry: 16498 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 16499 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 16500 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 16501 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 16502 // CHECK16-NEXT: ret void 16503 // 16504 // 16505 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..17 16506 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 16507 // CHECK16-NEXT: entry: 16508 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 16509 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 16510 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 16511 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 16512 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 16513 // CHECK16-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 16514 // CHECK16-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 16515 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 16516 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 16517 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 16518 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 16519 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 16520 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 16521 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 16522 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 16523 // CHECK16-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 16524 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 16525 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 16526 // CHECK16-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 16527 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 16528 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 16529 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16530 // CHECK16-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 16531 // CHECK16-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 16532 // CHECK16: cond.true: 16533 // CHECK16-NEXT: br label [[COND_END:%.*]] 16534 // CHECK16: cond.false: 16535 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16536 // CHECK16-NEXT: br label [[COND_END]] 16537 // CHECK16: cond.end: 16538 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 16539 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 16540 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 16541 // CHECK16-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 16542 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 16543 // CHECK16: omp.inner.for.cond: 16544 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16545 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16546 // CHECK16-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 16547 // CHECK16-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 16548 // CHECK16: omp.inner.for.body: 16549 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 16550 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16551 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]) 16552 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 16553 // CHECK16: omp.inner.for.inc: 16554 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16555 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 16556 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 16557 // CHECK16-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 16558 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]] 16559 // CHECK16: omp.inner.for.end: 16560 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 16561 // CHECK16: omp.loop.exit: 16562 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 16563 // CHECK16-NEXT: ret void 16564 // 16565 // 16566 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..18 16567 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 16568 // CHECK16-NEXT: entry: 16569 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 16570 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 16571 // CHECK16-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 16572 // CHECK16-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 16573 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 16574 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 16575 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 16576 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 16577 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 16578 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 16579 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 16580 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 16581 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 16582 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 16583 // CHECK16-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 16584 // CHECK16-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 16585 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 16586 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 16587 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 16588 // CHECK16-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 16589 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 16590 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 16591 // CHECK16-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 16592 // CHECK16-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 16593 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 16594 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 16595 // CHECK16-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 16596 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 16597 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 16598 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16599 // CHECK16-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 16600 // CHECK16-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 16601 // CHECK16: cond.true: 16602 // CHECK16-NEXT: br label [[COND_END:%.*]] 16603 // CHECK16: cond.false: 16604 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16605 // CHECK16-NEXT: br label [[COND_END]] 16606 // CHECK16: cond.end: 16607 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 16608 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 16609 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 16610 // CHECK16-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 16611 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 16612 // CHECK16: omp.inner.for.cond: 16613 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16614 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16615 // CHECK16-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 16616 // CHECK16-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 16617 // CHECK16: omp.inner.for.body: 16618 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16619 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 16620 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 16621 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4 16622 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 16623 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]] 16624 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 16625 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 16626 // CHECK16: omp.body.continue: 16627 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 16628 // CHECK16: omp.inner.for.inc: 16629 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16630 // CHECK16-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 16631 // CHECK16-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 16632 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]] 16633 // CHECK16: omp.inner.for.end: 16634 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 16635 // CHECK16: omp.loop.exit: 16636 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 16637 // CHECK16-NEXT: ret void 16638 // 16639 // 16640 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126 16641 // CHECK16-SAME: (i32 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 16642 // CHECK16-NEXT: entry: 16643 // CHECK16-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 16644 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 16645 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 16646 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 16647 // CHECK16-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 16648 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 16649 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 16650 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4 16651 // CHECK16-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 16652 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 16653 // CHECK16-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 16654 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 16655 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]]) 16656 // CHECK16-NEXT: ret void 16657 // 16658 // 16659 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..21 16660 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 16661 // CHECK16-NEXT: entry: 16662 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 16663 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 16664 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 16665 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 16666 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 16667 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 16668 // CHECK16-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 16669 // CHECK16-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 16670 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 16671 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 16672 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 16673 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 16674 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 16675 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 16676 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 16677 // CHECK16-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 16678 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 16679 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 16680 // CHECK16-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 16681 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 16682 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 16683 // CHECK16-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 16684 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 16685 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 16686 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16687 // CHECK16-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 16688 // CHECK16-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 16689 // CHECK16: cond.true: 16690 // CHECK16-NEXT: br label [[COND_END:%.*]] 16691 // CHECK16: cond.false: 16692 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16693 // CHECK16-NEXT: br label [[COND_END]] 16694 // CHECK16: cond.end: 16695 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 16696 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 16697 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 16698 // CHECK16-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 16699 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 16700 // CHECK16: omp.inner.for.cond: 16701 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16702 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16703 // CHECK16-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 16704 // CHECK16-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 16705 // CHECK16: omp.inner.for.body: 16706 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 16707 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16708 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 16709 // CHECK16-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 16710 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 16711 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]]) 16712 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 16713 // CHECK16: omp.inner.for.inc: 16714 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16715 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 16716 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 16717 // CHECK16-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 16718 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]] 16719 // CHECK16: omp.inner.for.end: 16720 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 16721 // CHECK16: omp.loop.exit: 16722 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 16723 // CHECK16-NEXT: ret void 16724 // 16725 // 16726 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..22 16727 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 16728 // CHECK16-NEXT: entry: 16729 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 16730 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 16731 // CHECK16-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 16732 // CHECK16-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 16733 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 16734 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 16735 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 16736 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 16737 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 16738 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 16739 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 16740 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 16741 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 16742 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 16743 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 16744 // CHECK16-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 16745 // CHECK16-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 16746 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 16747 // CHECK16-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 16748 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 16749 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 16750 // CHECK16-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 16751 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 16752 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 16753 // CHECK16-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 16754 // CHECK16-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 16755 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 16756 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 16757 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 16758 // CHECK16-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 16759 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 16760 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]]) 16761 // CHECK16-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 16762 // CHECK16: omp.dispatch.cond: 16763 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16764 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 16765 // CHECK16-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP6]], [[TMP7]] 16766 // CHECK16-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 16767 // CHECK16: cond.true: 16768 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 16769 // CHECK16-NEXT: br label [[COND_END:%.*]] 16770 // CHECK16: cond.false: 16771 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16772 // CHECK16-NEXT: br label [[COND_END]] 16773 // CHECK16: cond.end: 16774 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ [[TMP8]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 16775 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 16776 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 16777 // CHECK16-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 16778 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16779 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16780 // CHECK16-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 16781 // CHECK16-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 16782 // CHECK16: omp.dispatch.body: 16783 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 16784 // CHECK16: omp.inner.for.cond: 16785 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16786 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16787 // CHECK16-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 16788 // CHECK16-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 16789 // CHECK16: omp.inner.for.body: 16790 // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16791 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 16792 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 16793 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4 16794 // CHECK16-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4 16795 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP16]] 16796 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 16797 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 16798 // CHECK16: omp.body.continue: 16799 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 16800 // CHECK16: omp.inner.for.inc: 16801 // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16802 // CHECK16-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1 16803 // CHECK16-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 16804 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]] 16805 // CHECK16: omp.inner.for.end: 16806 // CHECK16-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 16807 // CHECK16: omp.dispatch.inc: 16808 // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 16809 // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 16810 // CHECK16-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 16811 // CHECK16-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 16812 // CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16813 // CHECK16-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 16814 // CHECK16-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 16815 // CHECK16-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 16816 // CHECK16-NEXT: br label [[OMP_DISPATCH_COND]] 16817 // CHECK16: omp.dispatch.end: 16818 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 16819 // CHECK16-NEXT: ret void 16820 // 16821 // 16822 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131 16823 // CHECK16-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 16824 // CHECK16-NEXT: entry: 16825 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 16826 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 16827 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 16828 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 16829 // CHECK16-NEXT: ret void 16830 // 16831 // 16832 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..25 16833 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 16834 // CHECK16-NEXT: entry: 16835 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 16836 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 16837 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 16838 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 16839 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 16840 // CHECK16-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 16841 // CHECK16-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 16842 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 16843 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 16844 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 16845 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 16846 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 16847 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 16848 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 16849 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 16850 // CHECK16-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 16851 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 16852 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 16853 // CHECK16-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 16854 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 16855 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 16856 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16857 // CHECK16-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 16858 // CHECK16-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 16859 // CHECK16: cond.true: 16860 // CHECK16-NEXT: br label [[COND_END:%.*]] 16861 // CHECK16: cond.false: 16862 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16863 // CHECK16-NEXT: br label [[COND_END]] 16864 // CHECK16: cond.end: 16865 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 16866 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 16867 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 16868 // CHECK16-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 16869 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 16870 // CHECK16: omp.inner.for.cond: 16871 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16872 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16873 // CHECK16-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 16874 // CHECK16-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 16875 // CHECK16: omp.inner.for.body: 16876 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 16877 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 16878 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]) 16879 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 16880 // CHECK16: omp.inner.for.inc: 16881 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 16882 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 16883 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 16884 // CHECK16-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 16885 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]] 16886 // CHECK16: omp.inner.for.end: 16887 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 16888 // CHECK16: omp.loop.exit: 16889 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 16890 // CHECK16-NEXT: ret void 16891 // 16892 // 16893 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..26 16894 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 16895 // CHECK16-NEXT: entry: 16896 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 16897 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 16898 // CHECK16-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 16899 // CHECK16-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 16900 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 16901 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 16902 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 16903 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 16904 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 16905 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 16906 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 16907 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 16908 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 16909 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 16910 // CHECK16-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 16911 // CHECK16-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 16912 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 16913 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 16914 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 16915 // CHECK16-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 16916 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 16917 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 16918 // CHECK16-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 16919 // CHECK16-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 16920 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 16921 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 16922 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 16923 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 16924 // CHECK16-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 16925 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 16926 // CHECK16-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 16927 // CHECK16-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 16928 // CHECK16: omp.dispatch.cond: 16929 // CHECK16-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 16930 // CHECK16-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 16931 // CHECK16-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 16932 // CHECK16: omp.dispatch.body: 16933 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 16934 // CHECK16-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 16935 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 16936 // CHECK16: omp.inner.for.cond: 16937 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 16938 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21 16939 // CHECK16-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 16940 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 16941 // CHECK16: omp.inner.for.body: 16942 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 16943 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 16944 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 16945 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21 16946 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21 16947 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP12]] 16948 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21 16949 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 16950 // CHECK16: omp.body.continue: 16951 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 16952 // CHECK16: omp.inner.for.inc: 16953 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 16954 // CHECK16-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 16955 // CHECK16-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 16956 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]] 16957 // CHECK16: omp.inner.for.end: 16958 // CHECK16-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 16959 // CHECK16: omp.dispatch.inc: 16960 // CHECK16-NEXT: br label [[OMP_DISPATCH_COND]] 16961 // CHECK16: omp.dispatch.end: 16962 // CHECK16-NEXT: ret void 16963 // 16964 // 16965 // CHECK16-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136 16966 // CHECK16-SAME: (i32 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 16967 // CHECK16-NEXT: entry: 16968 // CHECK16-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 16969 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 16970 // CHECK16-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 16971 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 16972 // CHECK16-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 16973 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 16974 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 16975 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4 16976 // CHECK16-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 16977 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 16978 // CHECK16-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 16979 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 16980 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]]) 16981 // CHECK16-NEXT: ret void 16982 // 16983 // 16984 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..29 16985 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 16986 // CHECK16-NEXT: entry: 16987 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 16988 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 16989 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 16990 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 16991 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 16992 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 16993 // CHECK16-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 16994 // CHECK16-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 16995 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 16996 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 16997 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 16998 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 16999 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 17000 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 17001 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 17002 // CHECK16-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 17003 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 17004 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 17005 // CHECK16-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 17006 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 17007 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 17008 // CHECK16-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 17009 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 17010 // CHECK16-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 17011 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17012 // CHECK16-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 17013 // CHECK16-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 17014 // CHECK16: cond.true: 17015 // CHECK16-NEXT: br label [[COND_END:%.*]] 17016 // CHECK16: cond.false: 17017 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17018 // CHECK16-NEXT: br label [[COND_END]] 17019 // CHECK16: cond.end: 17020 // CHECK16-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 17021 // CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 17022 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 17023 // CHECK16-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 17024 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 17025 // CHECK16: omp.inner.for.cond: 17026 // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17027 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17028 // CHECK16-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 17029 // CHECK16-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 17030 // CHECK16: omp.inner.for.body: 17031 // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 17032 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17033 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 17034 // CHECK16-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 17035 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 17036 // CHECK16-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]]) 17037 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 17038 // CHECK16: omp.inner.for.inc: 17039 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17040 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 17041 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 17042 // CHECK16-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 17043 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]] 17044 // CHECK16: omp.inner.for.end: 17045 // CHECK16-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 17046 // CHECK16: omp.loop.exit: 17047 // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 17048 // CHECK16-NEXT: ret void 17049 // 17050 // 17051 // CHECK16-LABEL: define {{[^@]+}}@.omp_outlined..30 17052 // CHECK16-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 17053 // CHECK16-NEXT: entry: 17054 // CHECK16-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 17055 // CHECK16-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 17056 // CHECK16-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 17057 // CHECK16-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 17058 // CHECK16-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 17059 // CHECK16-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 17060 // CHECK16-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 17061 // CHECK16-NEXT: [[TMP:%.*]] = alloca i32, align 4 17062 // CHECK16-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 17063 // CHECK16-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 17064 // CHECK16-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 17065 // CHECK16-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 17066 // CHECK16-NEXT: [[I:%.*]] = alloca i32, align 4 17067 // CHECK16-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 17068 // CHECK16-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 17069 // CHECK16-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 17070 // CHECK16-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 17071 // CHECK16-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 17072 // CHECK16-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 17073 // CHECK16-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 17074 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 17075 // CHECK16-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 17076 // CHECK16-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 17077 // CHECK16-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 17078 // CHECK16-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 17079 // CHECK16-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 17080 // CHECK16-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 17081 // CHECK16-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 17082 // CHECK16-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 17083 // CHECK16-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 17084 // CHECK16-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17085 // CHECK16-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 17086 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 17087 // CHECK16-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]]) 17088 // CHECK16-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 17089 // CHECK16: omp.dispatch.cond: 17090 // CHECK16-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 17091 // CHECK16-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0 17092 // CHECK16-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 17093 // CHECK16: omp.dispatch.body: 17094 // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 17095 // CHECK16-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 17096 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 17097 // CHECK16: omp.inner.for.cond: 17098 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 17099 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !24 17100 // CHECK16-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 17101 // CHECK16-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 17102 // CHECK16: omp.inner.for.body: 17103 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 17104 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 17105 // CHECK16-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 17106 // CHECK16-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !24 17107 // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !24 17108 // CHECK16-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP13]] 17109 // CHECK16-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !24 17110 // CHECK16-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 17111 // CHECK16: omp.body.continue: 17112 // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 17113 // CHECK16: omp.inner.for.inc: 17114 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 17115 // CHECK16-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP14]], 1 17116 // CHECK16-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 17117 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]] 17118 // CHECK16: omp.inner.for.end: 17119 // CHECK16-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 17120 // CHECK16: omp.dispatch.inc: 17121 // CHECK16-NEXT: br label [[OMP_DISPATCH_COND]] 17122 // CHECK16: omp.dispatch.end: 17123 // CHECK16-NEXT: ret void 17124 // 17125 // 17126 // CHECK16-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 17127 // CHECK16-SAME: () #[[ATTR5:[0-9]+]] { 17128 // CHECK16-NEXT: entry: 17129 // CHECK16-NEXT: call void @__tgt_register_requires(i64 1) 17130 // CHECK16-NEXT: ret void 17131 // 17132 // 17133 // CHECK17-LABEL: define {{[^@]+}}@main 17134 // CHECK17-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 17135 // CHECK17-NEXT: entry: 17136 // CHECK17-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 17137 // CHECK17-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 17138 // CHECK17-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 17139 // CHECK17-NEXT: [[N:%.*]] = alloca i32, align 4 17140 // CHECK17-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 17141 // CHECK17-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 17142 // CHECK17-NEXT: [[M:%.*]] = alloca i32, align 4 17143 // CHECK17-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 17144 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 17145 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 17146 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 17147 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 17148 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 17149 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 17150 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 17151 // CHECK17-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8 17152 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8 17153 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8 17154 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8 17155 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8 17156 // CHECK17-NEXT: [[_TMP9:%.*]] = alloca i32, align 4 17157 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 17158 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4 17159 // CHECK17-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 17160 // CHECK17-NEXT: [[N_CASTED19:%.*]] = alloca i64, align 8 17161 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [4 x i8*], align 8 17162 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS22:%.*]] = alloca [4 x i8*], align 8 17163 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [4 x i8*], align 8 17164 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES24:%.*]] = alloca [4 x i64], align 8 17165 // CHECK17-NEXT: [[_TMP25:%.*]] = alloca i32, align 4 17166 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4 17167 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4 17168 // CHECK17-NEXT: [[N_CASTED34:%.*]] = alloca i64, align 8 17169 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS36:%.*]] = alloca [3 x i8*], align 8 17170 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS37:%.*]] = alloca [3 x i8*], align 8 17171 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS38:%.*]] = alloca [3 x i8*], align 8 17172 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES39:%.*]] = alloca [3 x i64], align 8 17173 // CHECK17-NEXT: [[_TMP40:%.*]] = alloca i32, align 4 17174 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4 17175 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4 17176 // CHECK17-NEXT: [[M_CASTED49:%.*]] = alloca i64, align 8 17177 // CHECK17-NEXT: [[N_CASTED51:%.*]] = alloca i64, align 8 17178 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS53:%.*]] = alloca [4 x i8*], align 8 17179 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS54:%.*]] = alloca [4 x i8*], align 8 17180 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS55:%.*]] = alloca [4 x i8*], align 8 17181 // CHECK17-NEXT: [[DOTOFFLOAD_SIZES56:%.*]] = alloca [4 x i64], align 8 17182 // CHECK17-NEXT: [[_TMP57:%.*]] = alloca i32, align 4 17183 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4 17184 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_59:%.*]] = alloca i32, align 4 17185 // CHECK17-NEXT: store i32 0, i32* [[RETVAL]], align 4 17186 // CHECK17-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 17187 // CHECK17-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 17188 // CHECK17-NEXT: store i32 100, i32* [[N]], align 4 17189 // CHECK17-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 17190 // CHECK17-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 17191 // CHECK17-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 17192 // CHECK17-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 17193 // CHECK17-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 17194 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 17195 // CHECK17-NEXT: store i32 10, i32* [[M]], align 4 17196 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 17197 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 17198 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 17199 // CHECK17-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 17200 // CHECK17-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 17201 // CHECK17-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 17202 // CHECK17-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* 17203 // CHECK17-NEXT: store i64 [[TMP4]], i64* [[TMP7]], align 8 17204 // CHECK17-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 17205 // CHECK17-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64* 17206 // CHECK17-NEXT: store i64 [[TMP4]], i64* [[TMP9]], align 8 17207 // CHECK17-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 17208 // CHECK17-NEXT: store i64 4, i64* [[TMP10]], align 8 17209 // CHECK17-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 17210 // CHECK17-NEXT: store i8* null, i8** [[TMP11]], align 8 17211 // CHECK17-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 17212 // CHECK17-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 17213 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8 17214 // CHECK17-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 17215 // CHECK17-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 17216 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8 17217 // CHECK17-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 17218 // CHECK17-NEXT: store i64 8, i64* [[TMP16]], align 8 17219 // CHECK17-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 17220 // CHECK17-NEXT: store i8* null, i8** [[TMP17]], align 8 17221 // CHECK17-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 17222 // CHECK17-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32** 17223 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 8 17224 // CHECK17-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 17225 // CHECK17-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32** 17226 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 8 17227 // CHECK17-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 17228 // CHECK17-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 8 17229 // CHECK17-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 17230 // CHECK17-NEXT: store i8* null, i8** [[TMP23]], align 8 17231 // CHECK17-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 17232 // CHECK17-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 17233 // CHECK17-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 17234 // CHECK17-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4 17235 // CHECK17-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4 17236 // CHECK17-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 17237 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0 17238 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 17239 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 17240 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 17241 // CHECK17-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17242 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1 17243 // CHECK17-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64 17244 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]]) 17245 // CHECK17-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 17246 // CHECK17-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 17247 // CHECK17-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 17248 // CHECK17: omp_offload.failed: 17249 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 17250 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]] 17251 // CHECK17: omp_offload.cont: 17252 // CHECK17-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4 17253 // CHECK17-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32* 17254 // CHECK17-NEXT: store i32 [[TMP33]], i32* [[CONV4]], align 4 17255 // CHECK17-NEXT: [[TMP34:%.*]] = load i64, i64* [[N_CASTED3]], align 8 17256 // CHECK17-NEXT: [[TMP35:%.*]] = mul nuw i64 [[TMP1]], 4 17257 // CHECK17-NEXT: [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 17258 // CHECK17-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64* 17259 // CHECK17-NEXT: store i64 [[TMP34]], i64* [[TMP37]], align 8 17260 // CHECK17-NEXT: [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 17261 // CHECK17-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64* 17262 // CHECK17-NEXT: store i64 [[TMP34]], i64* [[TMP39]], align 8 17263 // CHECK17-NEXT: [[TMP40:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0 17264 // CHECK17-NEXT: store i64 4, i64* [[TMP40]], align 8 17265 // CHECK17-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0 17266 // CHECK17-NEXT: store i8* null, i8** [[TMP41]], align 8 17267 // CHECK17-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 17268 // CHECK17-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i64* 17269 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP43]], align 8 17270 // CHECK17-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 17271 // CHECK17-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i64* 17272 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP45]], align 8 17273 // CHECK17-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 1 17274 // CHECK17-NEXT: store i64 8, i64* [[TMP46]], align 8 17275 // CHECK17-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1 17276 // CHECK17-NEXT: store i8* null, i8** [[TMP47]], align 8 17277 // CHECK17-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2 17278 // CHECK17-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32** 17279 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP49]], align 8 17280 // CHECK17-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2 17281 // CHECK17-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i32** 17282 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP51]], align 8 17283 // CHECK17-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2 17284 // CHECK17-NEXT: store i64 [[TMP35]], i64* [[TMP52]], align 8 17285 // CHECK17-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2 17286 // CHECK17-NEXT: store i8* null, i8** [[TMP53]], align 8 17287 // CHECK17-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 17288 // CHECK17-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 17289 // CHECK17-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0 17290 // CHECK17-NEXT: [[TMP57:%.*]] = load i32, i32* [[N]], align 4 17291 // CHECK17-NEXT: store i32 [[TMP57]], i32* [[DOTCAPTURE_EXPR_10]], align 4 17292 // CHECK17-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 17293 // CHECK17-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP58]], 0 17294 // CHECK17-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1 17295 // CHECK17-NEXT: [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1 17296 // CHECK17-NEXT: store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4 17297 // CHECK17-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 17298 // CHECK17-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP59]], 1 17299 // CHECK17-NEXT: [[TMP60:%.*]] = zext i32 [[ADD15]] to i64 17300 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP60]]) 17301 // CHECK17-NEXT: [[TMP61:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, i32 3, i8** [[TMP54]], i8** [[TMP55]], i64* [[TMP56]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 17302 // CHECK17-NEXT: [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0 17303 // CHECK17-NEXT: br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 17304 // CHECK17: omp_offload.failed16: 17305 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i64 [[TMP34]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 17306 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT17]] 17307 // CHECK17: omp_offload.cont17: 17308 // CHECK17-NEXT: [[TMP63:%.*]] = load i32, i32* [[M]], align 4 17309 // CHECK17-NEXT: [[CONV18:%.*]] = bitcast i64* [[M_CASTED]] to i32* 17310 // CHECK17-NEXT: store i32 [[TMP63]], i32* [[CONV18]], align 4 17311 // CHECK17-NEXT: [[TMP64:%.*]] = load i64, i64* [[M_CASTED]], align 8 17312 // CHECK17-NEXT: [[TMP65:%.*]] = load i32, i32* [[N]], align 4 17313 // CHECK17-NEXT: [[CONV20:%.*]] = bitcast i64* [[N_CASTED19]] to i32* 17314 // CHECK17-NEXT: store i32 [[TMP65]], i32* [[CONV20]], align 4 17315 // CHECK17-NEXT: [[TMP66:%.*]] = load i64, i64* [[N_CASTED19]], align 8 17316 // CHECK17-NEXT: [[TMP67:%.*]] = mul nuw i64 [[TMP1]], 4 17317 // CHECK17-NEXT: [[TMP68:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 17318 // CHECK17-NEXT: [[TMP69:%.*]] = bitcast i8** [[TMP68]] to i64* 17319 // CHECK17-NEXT: store i64 [[TMP64]], i64* [[TMP69]], align 8 17320 // CHECK17-NEXT: [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 17321 // CHECK17-NEXT: [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i64* 17322 // CHECK17-NEXT: store i64 [[TMP64]], i64* [[TMP71]], align 8 17323 // CHECK17-NEXT: [[TMP72:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0 17324 // CHECK17-NEXT: store i64 4, i64* [[TMP72]], align 8 17325 // CHECK17-NEXT: [[TMP73:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0 17326 // CHECK17-NEXT: store i8* null, i8** [[TMP73]], align 8 17327 // CHECK17-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1 17328 // CHECK17-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i64* 17329 // CHECK17-NEXT: store i64 [[TMP66]], i64* [[TMP75]], align 8 17330 // CHECK17-NEXT: [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1 17331 // CHECK17-NEXT: [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i64* 17332 // CHECK17-NEXT: store i64 [[TMP66]], i64* [[TMP77]], align 8 17333 // CHECK17-NEXT: [[TMP78:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 1 17334 // CHECK17-NEXT: store i64 4, i64* [[TMP78]], align 8 17335 // CHECK17-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1 17336 // CHECK17-NEXT: store i8* null, i8** [[TMP79]], align 8 17337 // CHECK17-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 2 17338 // CHECK17-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i64* 17339 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP81]], align 8 17340 // CHECK17-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 2 17341 // CHECK17-NEXT: [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i64* 17342 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP83]], align 8 17343 // CHECK17-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 2 17344 // CHECK17-NEXT: store i64 8, i64* [[TMP84]], align 8 17345 // CHECK17-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 2 17346 // CHECK17-NEXT: store i8* null, i8** [[TMP85]], align 8 17347 // CHECK17-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 3 17348 // CHECK17-NEXT: [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i32** 17349 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP87]], align 8 17350 // CHECK17-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 3 17351 // CHECK17-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32** 17352 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP89]], align 8 17353 // CHECK17-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 3 17354 // CHECK17-NEXT: store i64 [[TMP67]], i64* [[TMP90]], align 8 17355 // CHECK17-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 3 17356 // CHECK17-NEXT: store i8* null, i8** [[TMP91]], align 8 17357 // CHECK17-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 17358 // CHECK17-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 17359 // CHECK17-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0 17360 // CHECK17-NEXT: [[TMP95:%.*]] = load i32, i32* [[N]], align 4 17361 // CHECK17-NEXT: store i32 [[TMP95]], i32* [[DOTCAPTURE_EXPR_26]], align 4 17362 // CHECK17-NEXT: [[TMP96:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 17363 // CHECK17-NEXT: [[SUB28:%.*]] = sub nsw i32 [[TMP96]], 0 17364 // CHECK17-NEXT: [[DIV29:%.*]] = sdiv i32 [[SUB28]], 1 17365 // CHECK17-NEXT: [[SUB30:%.*]] = sub nsw i32 [[DIV29]], 1 17366 // CHECK17-NEXT: store i32 [[SUB30]], i32* [[DOTCAPTURE_EXPR_27]], align 4 17367 // CHECK17-NEXT: [[TMP97:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 17368 // CHECK17-NEXT: [[ADD31:%.*]] = add nsw i32 [[TMP97]], 1 17369 // CHECK17-NEXT: [[TMP98:%.*]] = zext i32 [[ADD31]] to i64 17370 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP98]]) 17371 // CHECK17-NEXT: [[TMP99:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, i32 4, i8** [[TMP92]], i8** [[TMP93]], i64* [[TMP94]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 17372 // CHECK17-NEXT: [[TMP100:%.*]] = icmp ne i32 [[TMP99]], 0 17373 // CHECK17-NEXT: br i1 [[TMP100]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]] 17374 // CHECK17: omp_offload.failed32: 17375 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i64 [[TMP64]], i64 [[TMP66]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 17376 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT33]] 17377 // CHECK17: omp_offload.cont33: 17378 // CHECK17-NEXT: [[TMP101:%.*]] = load i32, i32* [[N]], align 4 17379 // CHECK17-NEXT: [[CONV35:%.*]] = bitcast i64* [[N_CASTED34]] to i32* 17380 // CHECK17-NEXT: store i32 [[TMP101]], i32* [[CONV35]], align 4 17381 // CHECK17-NEXT: [[TMP102:%.*]] = load i64, i64* [[N_CASTED34]], align 8 17382 // CHECK17-NEXT: [[TMP103:%.*]] = mul nuw i64 [[TMP1]], 4 17383 // CHECK17-NEXT: [[TMP104:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0 17384 // CHECK17-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to i64* 17385 // CHECK17-NEXT: store i64 [[TMP102]], i64* [[TMP105]], align 8 17386 // CHECK17-NEXT: [[TMP106:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0 17387 // CHECK17-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to i64* 17388 // CHECK17-NEXT: store i64 [[TMP102]], i64* [[TMP107]], align 8 17389 // CHECK17-NEXT: [[TMP108:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0 17390 // CHECK17-NEXT: store i64 4, i64* [[TMP108]], align 8 17391 // CHECK17-NEXT: [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 0 17392 // CHECK17-NEXT: store i8* null, i8** [[TMP109]], align 8 17393 // CHECK17-NEXT: [[TMP110:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 1 17394 // CHECK17-NEXT: [[TMP111:%.*]] = bitcast i8** [[TMP110]] to i64* 17395 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP111]], align 8 17396 // CHECK17-NEXT: [[TMP112:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 1 17397 // CHECK17-NEXT: [[TMP113:%.*]] = bitcast i8** [[TMP112]] to i64* 17398 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP113]], align 8 17399 // CHECK17-NEXT: [[TMP114:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 1 17400 // CHECK17-NEXT: store i64 8, i64* [[TMP114]], align 8 17401 // CHECK17-NEXT: [[TMP115:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 1 17402 // CHECK17-NEXT: store i8* null, i8** [[TMP115]], align 8 17403 // CHECK17-NEXT: [[TMP116:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 2 17404 // CHECK17-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to i32** 17405 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP117]], align 8 17406 // CHECK17-NEXT: [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 2 17407 // CHECK17-NEXT: [[TMP119:%.*]] = bitcast i8** [[TMP118]] to i32** 17408 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP119]], align 8 17409 // CHECK17-NEXT: [[TMP120:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 2 17410 // CHECK17-NEXT: store i64 [[TMP103]], i64* [[TMP120]], align 8 17411 // CHECK17-NEXT: [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 2 17412 // CHECK17-NEXT: store i8* null, i8** [[TMP121]], align 8 17413 // CHECK17-NEXT: [[TMP122:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0 17414 // CHECK17-NEXT: [[TMP123:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0 17415 // CHECK17-NEXT: [[TMP124:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0 17416 // CHECK17-NEXT: [[TMP125:%.*]] = load i32, i32* [[N]], align 4 17417 // CHECK17-NEXT: store i32 [[TMP125]], i32* [[DOTCAPTURE_EXPR_41]], align 4 17418 // CHECK17-NEXT: [[TMP126:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4 17419 // CHECK17-NEXT: [[SUB43:%.*]] = sub nsw i32 [[TMP126]], 0 17420 // CHECK17-NEXT: [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1 17421 // CHECK17-NEXT: [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 1 17422 // CHECK17-NEXT: store i32 [[SUB45]], i32* [[DOTCAPTURE_EXPR_42]], align 4 17423 // CHECK17-NEXT: [[TMP127:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_42]], align 4 17424 // CHECK17-NEXT: [[ADD46:%.*]] = add nsw i32 [[TMP127]], 1 17425 // CHECK17-NEXT: [[TMP128:%.*]] = zext i32 [[ADD46]] to i64 17426 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP128]]) 17427 // CHECK17-NEXT: [[TMP129:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, i32 3, i8** [[TMP122]], i8** [[TMP123]], i64* [[TMP124]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 17428 // CHECK17-NEXT: [[TMP130:%.*]] = icmp ne i32 [[TMP129]], 0 17429 // CHECK17-NEXT: br i1 [[TMP130]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]] 17430 // CHECK17: omp_offload.failed47: 17431 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i64 [[TMP102]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 17432 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT48]] 17433 // CHECK17: omp_offload.cont48: 17434 // CHECK17-NEXT: [[TMP131:%.*]] = load i32, i32* [[M]], align 4 17435 // CHECK17-NEXT: [[CONV50:%.*]] = bitcast i64* [[M_CASTED49]] to i32* 17436 // CHECK17-NEXT: store i32 [[TMP131]], i32* [[CONV50]], align 4 17437 // CHECK17-NEXT: [[TMP132:%.*]] = load i64, i64* [[M_CASTED49]], align 8 17438 // CHECK17-NEXT: [[TMP133:%.*]] = load i32, i32* [[N]], align 4 17439 // CHECK17-NEXT: [[CONV52:%.*]] = bitcast i64* [[N_CASTED51]] to i32* 17440 // CHECK17-NEXT: store i32 [[TMP133]], i32* [[CONV52]], align 4 17441 // CHECK17-NEXT: [[TMP134:%.*]] = load i64, i64* [[N_CASTED51]], align 8 17442 // CHECK17-NEXT: [[TMP135:%.*]] = mul nuw i64 [[TMP1]], 4 17443 // CHECK17-NEXT: [[TMP136:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0 17444 // CHECK17-NEXT: [[TMP137:%.*]] = bitcast i8** [[TMP136]] to i64* 17445 // CHECK17-NEXT: store i64 [[TMP132]], i64* [[TMP137]], align 8 17446 // CHECK17-NEXT: [[TMP138:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0 17447 // CHECK17-NEXT: [[TMP139:%.*]] = bitcast i8** [[TMP138]] to i64* 17448 // CHECK17-NEXT: store i64 [[TMP132]], i64* [[TMP139]], align 8 17449 // CHECK17-NEXT: [[TMP140:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0 17450 // CHECK17-NEXT: store i64 4, i64* [[TMP140]], align 8 17451 // CHECK17-NEXT: [[TMP141:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 0 17452 // CHECK17-NEXT: store i8* null, i8** [[TMP141]], align 8 17453 // CHECK17-NEXT: [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 1 17454 // CHECK17-NEXT: [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i64* 17455 // CHECK17-NEXT: store i64 [[TMP134]], i64* [[TMP143]], align 8 17456 // CHECK17-NEXT: [[TMP144:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 1 17457 // CHECK17-NEXT: [[TMP145:%.*]] = bitcast i8** [[TMP144]] to i64* 17458 // CHECK17-NEXT: store i64 [[TMP134]], i64* [[TMP145]], align 8 17459 // CHECK17-NEXT: [[TMP146:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 1 17460 // CHECK17-NEXT: store i64 4, i64* [[TMP146]], align 8 17461 // CHECK17-NEXT: [[TMP147:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 1 17462 // CHECK17-NEXT: store i8* null, i8** [[TMP147]], align 8 17463 // CHECK17-NEXT: [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 2 17464 // CHECK17-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i64* 17465 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP149]], align 8 17466 // CHECK17-NEXT: [[TMP150:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 2 17467 // CHECK17-NEXT: [[TMP151:%.*]] = bitcast i8** [[TMP150]] to i64* 17468 // CHECK17-NEXT: store i64 [[TMP1]], i64* [[TMP151]], align 8 17469 // CHECK17-NEXT: [[TMP152:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 2 17470 // CHECK17-NEXT: store i64 8, i64* [[TMP152]], align 8 17471 // CHECK17-NEXT: [[TMP153:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 2 17472 // CHECK17-NEXT: store i8* null, i8** [[TMP153]], align 8 17473 // CHECK17-NEXT: [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 3 17474 // CHECK17-NEXT: [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32** 17475 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP155]], align 8 17476 // CHECK17-NEXT: [[TMP156:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 3 17477 // CHECK17-NEXT: [[TMP157:%.*]] = bitcast i8** [[TMP156]] to i32** 17478 // CHECK17-NEXT: store i32* [[VLA]], i32** [[TMP157]], align 8 17479 // CHECK17-NEXT: [[TMP158:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 3 17480 // CHECK17-NEXT: store i64 [[TMP135]], i64* [[TMP158]], align 8 17481 // CHECK17-NEXT: [[TMP159:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 3 17482 // CHECK17-NEXT: store i8* null, i8** [[TMP159]], align 8 17483 // CHECK17-NEXT: [[TMP160:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0 17484 // CHECK17-NEXT: [[TMP161:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0 17485 // CHECK17-NEXT: [[TMP162:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0 17486 // CHECK17-NEXT: [[TMP163:%.*]] = load i32, i32* [[N]], align 4 17487 // CHECK17-NEXT: store i32 [[TMP163]], i32* [[DOTCAPTURE_EXPR_58]], align 4 17488 // CHECK17-NEXT: [[TMP164:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_58]], align 4 17489 // CHECK17-NEXT: [[SUB60:%.*]] = sub nsw i32 [[TMP164]], 0 17490 // CHECK17-NEXT: [[DIV61:%.*]] = sdiv i32 [[SUB60]], 1 17491 // CHECK17-NEXT: [[SUB62:%.*]] = sub nsw i32 [[DIV61]], 1 17492 // CHECK17-NEXT: store i32 [[SUB62]], i32* [[DOTCAPTURE_EXPR_59]], align 4 17493 // CHECK17-NEXT: [[TMP165:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_59]], align 4 17494 // CHECK17-NEXT: [[ADD63:%.*]] = add nsw i32 [[TMP165]], 1 17495 // CHECK17-NEXT: [[TMP166:%.*]] = zext i32 [[ADD63]] to i64 17496 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP166]]) 17497 // CHECK17-NEXT: [[TMP167:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, i32 4, i8** [[TMP160]], i8** [[TMP161]], i64* [[TMP162]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 17498 // CHECK17-NEXT: [[TMP168:%.*]] = icmp ne i32 [[TMP167]], 0 17499 // CHECK17-NEXT: br i1 [[TMP168]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]] 17500 // CHECK17: omp_offload.failed64: 17501 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i64 [[TMP132]], i64 [[TMP134]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 17502 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT65]] 17503 // CHECK17: omp_offload.cont65: 17504 // CHECK17-NEXT: [[TMP169:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 17505 // CHECK17-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP169]]) 17506 // CHECK17-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 17507 // CHECK17-NEXT: [[TMP170:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 17508 // CHECK17-NEXT: call void @llvm.stackrestore(i8* [[TMP170]]) 17509 // CHECK17-NEXT: [[TMP171:%.*]] = load i32, i32* [[RETVAL]], align 4 17510 // CHECK17-NEXT: ret i32 [[TMP171]] 17511 // 17512 // 17513 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148 17514 // CHECK17-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 17515 // CHECK17-NEXT: entry: 17516 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 17517 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 17518 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 17519 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 17520 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 17521 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 17522 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 17523 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 17524 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 17525 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 17526 // CHECK17-NEXT: ret void 17527 // 17528 // 17529 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined. 17530 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 17531 // CHECK17-NEXT: entry: 17532 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 17533 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 17534 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 17535 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 17536 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 17537 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 17538 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 17539 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 17540 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 17541 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 17542 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 17543 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 17544 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 17545 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 17546 // CHECK17-NEXT: [[I3:%.*]] = alloca i32, align 4 17547 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 17548 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 17549 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 17550 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 17551 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 17552 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 17553 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 17554 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 17555 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 17556 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 17557 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 17558 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 17559 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 17560 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 17561 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 17562 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4 17563 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 17564 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 17565 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 17566 // CHECK17: omp.precond.then: 17567 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 17568 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17569 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 17570 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 17571 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 17572 // CHECK17-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 17573 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 17574 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 17575 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17576 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17577 // CHECK17-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 17578 // CHECK17-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 17579 // CHECK17: cond.true: 17580 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17581 // CHECK17-NEXT: br label [[COND_END:%.*]] 17582 // CHECK17: cond.false: 17583 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17584 // CHECK17-NEXT: br label [[COND_END]] 17585 // CHECK17: cond.end: 17586 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 17587 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 17588 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 17589 // CHECK17-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 17590 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 17591 // CHECK17: omp.inner.for.cond: 17592 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17593 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17594 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 17595 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 17596 // CHECK17: omp.inner.for.body: 17597 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 17598 // CHECK17-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 17599 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17600 // CHECK17-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 17601 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 17602 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 17603 // CHECK17: omp.inner.for.inc: 17604 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17605 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 17606 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 17607 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 17608 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 17609 // CHECK17: omp.inner.for.end: 17610 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 17611 // CHECK17: omp.loop.exit: 17612 // CHECK17-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 17613 // CHECK17-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 17614 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 17615 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 17616 // CHECK17: omp.precond.end: 17617 // CHECK17-NEXT: ret void 17618 // 17619 // 17620 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..1 17621 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 17622 // CHECK17-NEXT: entry: 17623 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 17624 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 17625 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 17626 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 17627 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 17628 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 17629 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 17630 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 17631 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 17632 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 17633 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 17634 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 17635 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 17636 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 17637 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 17638 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 17639 // CHECK17-NEXT: [[I4:%.*]] = alloca i32, align 4 17640 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 17641 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 17642 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 17643 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 17644 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 17645 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 17646 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 17647 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 17648 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 17649 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 17650 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 17651 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 17652 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 17653 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 17654 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 17655 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 17656 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 17657 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4 17658 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 17659 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 17660 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 17661 // CHECK17: omp.precond.then: 17662 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 17663 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17664 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 17665 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 17666 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 17667 // CHECK17-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 17668 // CHECK17-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 17669 // CHECK17-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 17670 // CHECK17-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 17671 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 17672 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 17673 // CHECK17-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 17674 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 17675 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 17676 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17677 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17678 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 17679 // CHECK17-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 17680 // CHECK17: cond.true: 17681 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17682 // CHECK17-NEXT: br label [[COND_END:%.*]] 17683 // CHECK17: cond.false: 17684 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17685 // CHECK17-NEXT: br label [[COND_END]] 17686 // CHECK17: cond.end: 17687 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 17688 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 17689 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 17690 // CHECK17-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 17691 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 17692 // CHECK17: omp.inner.for.cond: 17693 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17694 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17695 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 17696 // CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 17697 // CHECK17: omp.inner.for.body: 17698 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17699 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 17700 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 17701 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 17702 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4 17703 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 17704 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 17705 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 17706 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 17707 // CHECK17: omp.body.continue: 17708 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 17709 // CHECK17: omp.inner.for.inc: 17710 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17711 // CHECK17-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 17712 // CHECK17-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 17713 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 17714 // CHECK17: omp.inner.for.end: 17715 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 17716 // CHECK17: omp.loop.exit: 17717 // CHECK17-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 17718 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 17719 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 17720 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 17721 // CHECK17: omp.precond.end: 17722 // CHECK17-NEXT: ret void 17723 // 17724 // 17725 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153 17726 // CHECK17-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 17727 // CHECK17-NEXT: entry: 17728 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 17729 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 17730 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 17731 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 17732 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 17733 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 17734 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 17735 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 17736 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 17737 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 17738 // CHECK17-NEXT: ret void 17739 // 17740 // 17741 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..2 17742 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 17743 // CHECK17-NEXT: entry: 17744 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 17745 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 17746 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 17747 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 17748 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 17749 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 17750 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 17751 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 17752 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 17753 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 17754 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 17755 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 17756 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 17757 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 17758 // CHECK17-NEXT: [[I3:%.*]] = alloca i32, align 4 17759 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 17760 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 17761 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 17762 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 17763 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 17764 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 17765 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 17766 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 17767 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 17768 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 17769 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 17770 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 17771 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 17772 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 17773 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 17774 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4 17775 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 17776 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 17777 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 17778 // CHECK17: omp.precond.then: 17779 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 17780 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17781 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 17782 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 17783 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 17784 // CHECK17-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 17785 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 17786 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 17787 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17788 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17789 // CHECK17-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 17790 // CHECK17-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 17791 // CHECK17: cond.true: 17792 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17793 // CHECK17-NEXT: br label [[COND_END:%.*]] 17794 // CHECK17: cond.false: 17795 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17796 // CHECK17-NEXT: br label [[COND_END]] 17797 // CHECK17: cond.end: 17798 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 17799 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 17800 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 17801 // CHECK17-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 17802 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 17803 // CHECK17: omp.inner.for.cond: 17804 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17805 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17806 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 17807 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 17808 // CHECK17: omp.inner.for.body: 17809 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 17810 // CHECK17-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 17811 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 17812 // CHECK17-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 17813 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 17814 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 17815 // CHECK17: omp.inner.for.inc: 17816 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17817 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 17818 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 17819 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 17820 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 17821 // CHECK17: omp.inner.for.end: 17822 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 17823 // CHECK17: omp.loop.exit: 17824 // CHECK17-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 17825 // CHECK17-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 17826 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 17827 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 17828 // CHECK17: omp.precond.end: 17829 // CHECK17-NEXT: ret void 17830 // 17831 // 17832 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..3 17833 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 17834 // CHECK17-NEXT: entry: 17835 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 17836 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 17837 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 17838 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 17839 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 17840 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 17841 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 17842 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 17843 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 17844 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 17845 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 17846 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 17847 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 17848 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 17849 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 17850 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 17851 // CHECK17-NEXT: [[I4:%.*]] = alloca i32, align 4 17852 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 17853 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 17854 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 17855 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 17856 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 17857 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 17858 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 17859 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 17860 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 17861 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 17862 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 17863 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 17864 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 17865 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 17866 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 17867 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 17868 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 17869 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4 17870 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 17871 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 17872 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 17873 // CHECK17: omp.precond.then: 17874 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 17875 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17876 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 17877 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 17878 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 17879 // CHECK17-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 17880 // CHECK17-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 17881 // CHECK17-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 17882 // CHECK17-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 17883 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 17884 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 17885 // CHECK17-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 17886 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 17887 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 17888 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17889 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17890 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 17891 // CHECK17-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 17892 // CHECK17: cond.true: 17893 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17894 // CHECK17-NEXT: br label [[COND_END:%.*]] 17895 // CHECK17: cond.false: 17896 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17897 // CHECK17-NEXT: br label [[COND_END]] 17898 // CHECK17: cond.end: 17899 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 17900 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 17901 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 17902 // CHECK17-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 17903 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 17904 // CHECK17: omp.inner.for.cond: 17905 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17906 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 17907 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 17908 // CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 17909 // CHECK17: omp.inner.for.body: 17910 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17911 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 17912 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 17913 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 17914 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4 17915 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 17916 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 17917 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 17918 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 17919 // CHECK17: omp.body.continue: 17920 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 17921 // CHECK17: omp.inner.for.inc: 17922 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 17923 // CHECK17-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 17924 // CHECK17-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 17925 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 17926 // CHECK17: omp.inner.for.end: 17927 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 17928 // CHECK17: omp.loop.exit: 17929 // CHECK17-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 17930 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 17931 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 17932 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 17933 // CHECK17: omp.precond.end: 17934 // CHECK17-NEXT: ret void 17935 // 17936 // 17937 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158 17938 // CHECK17-SAME: (i64 [[M:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 17939 // CHECK17-NEXT: entry: 17940 // CHECK17-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 17941 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 17942 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 17943 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 17944 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 17945 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 17946 // CHECK17-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 17947 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 17948 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 17949 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 17950 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* 17951 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 17952 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 17953 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 17954 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8 17955 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 17956 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 17957 // CHECK17-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 17958 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4 17959 // CHECK17-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 17960 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]]) 17961 // CHECK17-NEXT: ret void 17962 // 17963 // 17964 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..5 17965 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 17966 // CHECK17-NEXT: entry: 17967 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 17968 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 17969 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 17970 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 17971 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 17972 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 17973 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 17974 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 17975 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 17976 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 17977 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 17978 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 17979 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 17980 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 17981 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 17982 // CHECK17-NEXT: [[I4:%.*]] = alloca i32, align 4 17983 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 17984 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 17985 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 17986 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 17987 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 17988 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 17989 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 17990 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 17991 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 17992 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 17993 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 17994 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 17995 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 17996 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 17997 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 17998 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 17999 // CHECK17-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 18000 // CHECK17-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 18001 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4 18002 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 18003 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 18004 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 18005 // CHECK17: omp.precond.then: 18006 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 18007 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 18008 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 18009 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 18010 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 18011 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[CONV]], align 8 18012 // CHECK17-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 18013 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 18014 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]]) 18015 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18016 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 18017 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 18018 // CHECK17-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 18019 // CHECK17: cond.true: 18020 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 18021 // CHECK17-NEXT: br label [[COND_END:%.*]] 18022 // CHECK17: cond.false: 18023 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18024 // CHECK17-NEXT: br label [[COND_END]] 18025 // CHECK17: cond.end: 18026 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 18027 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 18028 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 18029 // CHECK17-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 18030 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 18031 // CHECK17: omp.inner.for.cond: 18032 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18033 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 18034 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1 18035 // CHECK17-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]] 18036 // CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 18037 // CHECK17: omp.inner.for.body: 18038 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 18039 // CHECK17-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 18040 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18041 // CHECK17-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 18042 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV]], align 8 18043 // CHECK17-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 18044 // CHECK17-NEXT: store i32 [[TMP21]], i32* [[CONV7]], align 4 18045 // CHECK17-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 18046 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP22]]) 18047 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 18048 // CHECK17: omp.inner.for.inc: 18049 // CHECK17-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18050 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 18051 // CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 18052 // CHECK17-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 18053 // CHECK17-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 18054 // CHECK17-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 18055 // CHECK17-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 18056 // CHECK17-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4 18057 // CHECK17-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18058 // CHECK17-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 18059 // CHECK17-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP27]], [[TMP28]] 18060 // CHECK17-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4 18061 // CHECK17-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18062 // CHECK17-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 18063 // CHECK17-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]] 18064 // CHECK17-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]] 18065 // CHECK17: cond.true12: 18066 // CHECK17-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 18067 // CHECK17-NEXT: br label [[COND_END14:%.*]] 18068 // CHECK17: cond.false13: 18069 // CHECK17-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18070 // CHECK17-NEXT: br label [[COND_END14]] 18071 // CHECK17: cond.end14: 18072 // CHECK17-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE12]] ], [ [[TMP32]], [[COND_FALSE13]] ] 18073 // CHECK17-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4 18074 // CHECK17-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 18075 // CHECK17-NEXT: store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4 18076 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 18077 // CHECK17: omp.inner.for.end: 18078 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 18079 // CHECK17: omp.loop.exit: 18080 // CHECK17-NEXT: [[TMP34:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 18081 // CHECK17-NEXT: [[TMP35:%.*]] = load i32, i32* [[TMP34]], align 4 18082 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP35]]) 18083 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 18084 // CHECK17: omp.precond.end: 18085 // CHECK17-NEXT: ret void 18086 // 18087 // 18088 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..6 18089 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 18090 // CHECK17-NEXT: entry: 18091 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 18092 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 18093 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 18094 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 18095 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 18096 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 18097 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 18098 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 18099 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 18100 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 18101 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 18102 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 18103 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 18104 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 18105 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 18106 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 18107 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 18108 // CHECK17-NEXT: [[I6:%.*]] = alloca i32, align 4 18109 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 18110 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 18111 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 18112 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 18113 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 18114 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 18115 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 18116 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 18117 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 18118 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 18119 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 18120 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 18121 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 18122 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 18123 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 18124 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 18125 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 18126 // CHECK17-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 18127 // CHECK17-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 18128 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4 18129 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 18130 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 18131 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 18132 // CHECK17: omp.precond.then: 18133 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 18134 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 18135 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 18136 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 18137 // CHECK17-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32 18138 // CHECK17-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 18139 // CHECK17-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32 18140 // CHECK17-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 18141 // CHECK17-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 18142 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 18143 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 18144 // CHECK17-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 18145 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 18146 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 18147 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18148 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 18149 // CHECK17-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 18150 // CHECK17-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 18151 // CHECK17: cond.true: 18152 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 18153 // CHECK17-NEXT: br label [[COND_END:%.*]] 18154 // CHECK17: cond.false: 18155 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18156 // CHECK17-NEXT: br label [[COND_END]] 18157 // CHECK17: cond.end: 18158 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 18159 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 18160 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 18161 // CHECK17-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 18162 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 18163 // CHECK17: omp.inner.for.cond: 18164 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18165 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18166 // CHECK17-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 18167 // CHECK17-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 18168 // CHECK17: omp.inner.for.body: 18169 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18170 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 18171 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 18172 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I6]], align 4 18173 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4 18174 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 18175 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 18176 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 18177 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 18178 // CHECK17: omp.body.continue: 18179 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 18180 // CHECK17: omp.inner.for.inc: 18181 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18182 // CHECK17-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1 18183 // CHECK17-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 18184 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 18185 // CHECK17: omp.inner.for.end: 18186 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 18187 // CHECK17: omp.loop.exit: 18188 // CHECK17-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 18189 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 18190 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 18191 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 18192 // CHECK17: omp.precond.end: 18193 // CHECK17-NEXT: ret void 18194 // 18195 // 18196 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163 18197 // CHECK17-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 18198 // CHECK17-NEXT: entry: 18199 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 18200 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 18201 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 18202 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 18203 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 18204 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 18205 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 18206 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 18207 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 18208 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 18209 // CHECK17-NEXT: ret void 18210 // 18211 // 18212 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..8 18213 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 18214 // CHECK17-NEXT: entry: 18215 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 18216 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 18217 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 18218 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 18219 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 18220 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 18221 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 18222 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 18223 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 18224 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 18225 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 18226 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 18227 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 18228 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 18229 // CHECK17-NEXT: [[I3:%.*]] = alloca i32, align 4 18230 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 18231 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 18232 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 18233 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 18234 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 18235 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 18236 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 18237 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 18238 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 18239 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 18240 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 18241 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 18242 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 18243 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 18244 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 18245 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4 18246 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 18247 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 18248 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 18249 // CHECK17: omp.precond.then: 18250 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 18251 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 18252 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 18253 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 18254 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 18255 // CHECK17-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 18256 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 18257 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 18258 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18259 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 18260 // CHECK17-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 18261 // CHECK17-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 18262 // CHECK17: cond.true: 18263 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 18264 // CHECK17-NEXT: br label [[COND_END:%.*]] 18265 // CHECK17: cond.false: 18266 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18267 // CHECK17-NEXT: br label [[COND_END]] 18268 // CHECK17: cond.end: 18269 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 18270 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 18271 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 18272 // CHECK17-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 18273 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 18274 // CHECK17: omp.inner.for.cond: 18275 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18276 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18277 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 18278 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 18279 // CHECK17: omp.inner.for.body: 18280 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 18281 // CHECK17-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 18282 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18283 // CHECK17-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 18284 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 18285 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 18286 // CHECK17: omp.inner.for.inc: 18287 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18288 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 18289 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 18290 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 18291 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 18292 // CHECK17: omp.inner.for.end: 18293 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 18294 // CHECK17: omp.loop.exit: 18295 // CHECK17-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 18296 // CHECK17-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 18297 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 18298 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 18299 // CHECK17: omp.precond.end: 18300 // CHECK17-NEXT: ret void 18301 // 18302 // 18303 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..9 18304 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 18305 // CHECK17-NEXT: entry: 18306 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 18307 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 18308 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 18309 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 18310 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 18311 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 18312 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 18313 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 18314 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 18315 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 18316 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 18317 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 18318 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 18319 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 18320 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 18321 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 18322 // CHECK17-NEXT: [[I4:%.*]] = alloca i32, align 4 18323 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 18324 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 18325 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 18326 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 18327 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 18328 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 18329 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 18330 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 18331 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 18332 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 18333 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 18334 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 18335 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 18336 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 18337 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 18338 // CHECK17-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 18339 // CHECK17-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 18340 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4 18341 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 18342 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 18343 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 18344 // CHECK17: omp.precond.then: 18345 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 18346 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 18347 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 18348 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 18349 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 18350 // CHECK17-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 18351 // CHECK17-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 18352 // CHECK17-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 18353 // CHECK17-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 18354 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 18355 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 18356 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 18357 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18358 // CHECK17-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 18359 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 18360 // CHECK17-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1) 18361 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 18362 // CHECK17: omp.dispatch.cond: 18363 // CHECK17-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 18364 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 18365 // CHECK17-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 18366 // CHECK17-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 18367 // CHECK17-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 18368 // CHECK17: omp.dispatch.body: 18369 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 18370 // CHECK17-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 18371 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 18372 // CHECK17: omp.inner.for.cond: 18373 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 18374 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14 18375 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 18376 // CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 18377 // CHECK17: omp.inner.for.body: 18378 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 18379 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 18380 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 18381 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !14 18382 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !14 18383 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64 18384 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 18385 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !14 18386 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 18387 // CHECK17: omp.body.continue: 18388 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 18389 // CHECK17: omp.inner.for.inc: 18390 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 18391 // CHECK17-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1 18392 // CHECK17-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 18393 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] 18394 // CHECK17: omp.inner.for.end: 18395 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 18396 // CHECK17: omp.dispatch.inc: 18397 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]] 18398 // CHECK17: omp.dispatch.end: 18399 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 18400 // CHECK17: omp.precond.end: 18401 // CHECK17-NEXT: ret void 18402 // 18403 // 18404 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168 18405 // CHECK17-SAME: (i64 [[M:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 18406 // CHECK17-NEXT: entry: 18407 // CHECK17-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 18408 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 18409 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 18410 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 18411 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 18412 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 18413 // CHECK17-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 18414 // CHECK17-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 18415 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 18416 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 18417 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* 18418 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 18419 // CHECK17-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 18420 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 18421 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8 18422 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 18423 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 18424 // CHECK17-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 18425 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4 18426 // CHECK17-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 18427 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]]) 18428 // CHECK17-NEXT: ret void 18429 // 18430 // 18431 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..11 18432 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 18433 // CHECK17-NEXT: entry: 18434 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 18435 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 18436 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 18437 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 18438 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 18439 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 18440 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 18441 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 18442 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 18443 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 18444 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 18445 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 18446 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 18447 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 18448 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 18449 // CHECK17-NEXT: [[I4:%.*]] = alloca i32, align 4 18450 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 18451 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 18452 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 18453 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 18454 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 18455 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 18456 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 18457 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 18458 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 18459 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 18460 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 18461 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 18462 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 18463 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 18464 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 18465 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 18466 // CHECK17-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 18467 // CHECK17-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 18468 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4 18469 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 18470 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 18471 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 18472 // CHECK17: omp.precond.then: 18473 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 18474 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 18475 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 18476 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 18477 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 18478 // CHECK17-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 18479 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 18480 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 18481 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18482 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 18483 // CHECK17-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 18484 // CHECK17-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 18485 // CHECK17: cond.true: 18486 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 18487 // CHECK17-NEXT: br label [[COND_END:%.*]] 18488 // CHECK17: cond.false: 18489 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18490 // CHECK17-NEXT: br label [[COND_END]] 18491 // CHECK17: cond.end: 18492 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 18493 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 18494 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 18495 // CHECK17-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 18496 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 18497 // CHECK17: omp.inner.for.cond: 18498 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18499 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18500 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 18501 // CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 18502 // CHECK17: omp.inner.for.body: 18503 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 18504 // CHECK17-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 18505 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18506 // CHECK17-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 18507 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV]], align 8 18508 // CHECK17-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 18509 // CHECK17-NEXT: store i32 [[TMP20]], i32* [[CONV7]], align 4 18510 // CHECK17-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 18511 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP21]]) 18512 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 18513 // CHECK17: omp.inner.for.inc: 18514 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18515 // CHECK17-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 18516 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 18517 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 18518 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 18519 // CHECK17: omp.inner.for.end: 18520 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 18521 // CHECK17: omp.loop.exit: 18522 // CHECK17-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 18523 // CHECK17-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 18524 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) 18525 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 18526 // CHECK17: omp.precond.end: 18527 // CHECK17-NEXT: ret void 18528 // 18529 // 18530 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..12 18531 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 18532 // CHECK17-NEXT: entry: 18533 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 18534 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 18535 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 18536 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 18537 // CHECK17-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 18538 // CHECK17-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 18539 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 18540 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 18541 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 18542 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 18543 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 18544 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 18545 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 18546 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 18547 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 18548 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 18549 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 18550 // CHECK17-NEXT: [[I6:%.*]] = alloca i32, align 4 18551 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 18552 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 18553 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 18554 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 18555 // CHECK17-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 18556 // CHECK17-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 18557 // CHECK17-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 18558 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 18559 // CHECK17-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 18560 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 18561 // CHECK17-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 18562 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 18563 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 18564 // CHECK17-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 18565 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 18566 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 18567 // CHECK17-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 18568 // CHECK17-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 18569 // CHECK17-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 18570 // CHECK17-NEXT: store i32 0, i32* [[I]], align 4 18571 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 18572 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 18573 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 18574 // CHECK17: omp.precond.then: 18575 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 18576 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 18577 // CHECK17-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 18578 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 18579 // CHECK17-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32 18580 // CHECK17-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 18581 // CHECK17-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32 18582 // CHECK17-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 18583 // CHECK17-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 18584 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 18585 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 18586 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 8 18587 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 18588 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18589 // CHECK17-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 18590 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 18591 // CHECK17-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]]) 18592 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 18593 // CHECK17: omp.dispatch.cond: 18594 // CHECK17-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 18595 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 18596 // CHECK17-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 18597 // CHECK17-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 18598 // CHECK17-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 18599 // CHECK17: omp.dispatch.body: 18600 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 18601 // CHECK17-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 18602 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 18603 // CHECK17: omp.inner.for.cond: 18604 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 18605 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !17 18606 // CHECK17-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 18607 // CHECK17-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 18608 // CHECK17: omp.inner.for.body: 18609 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 18610 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 18611 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 18612 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !17 18613 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !17 18614 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 18615 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 18616 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !17 18617 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 18618 // CHECK17: omp.body.continue: 18619 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 18620 // CHECK17: omp.inner.for.inc: 18621 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 18622 // CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], 1 18623 // CHECK17-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 18624 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]] 18625 // CHECK17: omp.inner.for.end: 18626 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 18627 // CHECK17: omp.dispatch.inc: 18628 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]] 18629 // CHECK17: omp.dispatch.end: 18630 // CHECK17-NEXT: br label [[OMP_PRECOND_END]] 18631 // CHECK17: omp.precond.end: 18632 // CHECK17-NEXT: ret void 18633 // 18634 // 18635 // CHECK17-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 18636 // CHECK17-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat { 18637 // CHECK17-NEXT: entry: 18638 // CHECK17-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 18639 // CHECK17-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 18640 // CHECK17-NEXT: [[M:%.*]] = alloca i32, align 4 18641 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 18642 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 18643 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 18644 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 18645 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8 18646 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8 18647 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8 18648 // CHECK17-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 18649 // CHECK17-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 18650 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 8 18651 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 8 18652 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 8 18653 // CHECK17-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 18654 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 8 18655 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 8 18656 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 8 18657 // CHECK17-NEXT: [[_TMP16:%.*]] = alloca i32, align 4 18658 // CHECK17-NEXT: [[M_CASTED19:%.*]] = alloca i64, align 8 18659 // CHECK17-NEXT: [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [2 x i8*], align 8 18660 // CHECK17-NEXT: [[DOTOFFLOAD_PTRS22:%.*]] = alloca [2 x i8*], align 8 18661 // CHECK17-NEXT: [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [2 x i8*], align 8 18662 // CHECK17-NEXT: [[_TMP24:%.*]] = alloca i32, align 4 18663 // CHECK17-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 18664 // CHECK17-NEXT: store i32 10, i32* [[M]], align 4 18665 // CHECK17-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 18666 // CHECK17-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 18667 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8 18668 // CHECK17-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 18669 // CHECK17-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 18670 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8 18671 // CHECK17-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 18672 // CHECK17-NEXT: store i8* null, i8** [[TMP4]], align 8 18673 // CHECK17-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 18674 // CHECK17-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 18675 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 18676 // CHECK17-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 18677 // CHECK17-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 18678 // CHECK17-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 18679 // CHECK17: omp_offload.failed: 18680 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]] 18681 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT]] 18682 // CHECK17: omp_offload.cont: 18683 // CHECK17-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 18684 // CHECK17-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** 18685 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8 18686 // CHECK17-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 18687 // CHECK17-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** 18688 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8 18689 // CHECK17-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0 18690 // CHECK17-NEXT: store i8* null, i8** [[TMP13]], align 8 18691 // CHECK17-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 18692 // CHECK17-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 18693 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 18694 // CHECK17-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 18695 // CHECK17-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 18696 // CHECK17-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 18697 // CHECK17: omp_offload.failed5: 18698 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121([10 x i32]* [[A]]) #[[ATTR3]] 18699 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT6]] 18700 // CHECK17: omp_offload.cont6: 18701 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[M]], align 4 18702 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[M_CASTED]] to i32* 18703 // CHECK17-NEXT: store i32 [[TMP18]], i32* [[CONV]], align 4 18704 // CHECK17-NEXT: [[TMP19:%.*]] = load i64, i64* [[M_CASTED]], align 8 18705 // CHECK17-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 18706 // CHECK17-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64* 18707 // CHECK17-NEXT: store i64 [[TMP19]], i64* [[TMP21]], align 8 18708 // CHECK17-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 18709 // CHECK17-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64* 18710 // CHECK17-NEXT: store i64 [[TMP19]], i64* [[TMP23]], align 8 18711 // CHECK17-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0 18712 // CHECK17-NEXT: store i8* null, i8** [[TMP24]], align 8 18713 // CHECK17-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1 18714 // CHECK17-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]** 18715 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 8 18716 // CHECK17-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1 18717 // CHECK17-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]** 18718 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 8 18719 // CHECK17-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 1 18720 // CHECK17-NEXT: store i8* null, i8** [[TMP29]], align 8 18721 // CHECK17-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 18722 // CHECK17-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 18723 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 18724 // CHECK17-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 18725 // CHECK17-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 18726 // CHECK17-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] 18727 // CHECK17: omp_offload.failed11: 18728 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i64 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]] 18729 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT12]] 18730 // CHECK17: omp_offload.cont12: 18731 // CHECK17-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 18732 // CHECK17-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]** 18733 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 8 18734 // CHECK17-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 18735 // CHECK17-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]** 18736 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 8 18737 // CHECK17-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i64 0, i64 0 18738 // CHECK17-NEXT: store i8* null, i8** [[TMP38]], align 8 18739 // CHECK17-NEXT: [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 18740 // CHECK17-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 18741 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 18742 // CHECK17-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 18743 // CHECK17-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0 18744 // CHECK17-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]] 18745 // CHECK17: omp_offload.failed17: 18746 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131([10 x i32]* [[A]]) #[[ATTR3]] 18747 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT18]] 18748 // CHECK17: omp_offload.cont18: 18749 // CHECK17-NEXT: [[TMP43:%.*]] = load i32, i32* [[M]], align 4 18750 // CHECK17-NEXT: [[CONV20:%.*]] = bitcast i64* [[M_CASTED19]] to i32* 18751 // CHECK17-NEXT: store i32 [[TMP43]], i32* [[CONV20]], align 4 18752 // CHECK17-NEXT: [[TMP44:%.*]] = load i64, i64* [[M_CASTED19]], align 8 18753 // CHECK17-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 18754 // CHECK17-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64* 18755 // CHECK17-NEXT: store i64 [[TMP44]], i64* [[TMP46]], align 8 18756 // CHECK17-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 18757 // CHECK17-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64* 18758 // CHECK17-NEXT: store i64 [[TMP44]], i64* [[TMP48]], align 8 18759 // CHECK17-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0 18760 // CHECK17-NEXT: store i8* null, i8** [[TMP49]], align 8 18761 // CHECK17-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1 18762 // CHECK17-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]** 18763 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 8 18764 // CHECK17-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1 18765 // CHECK17-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]** 18766 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 8 18767 // CHECK17-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1 18768 // CHECK17-NEXT: store i8* null, i8** [[TMP54]], align 8 18769 // CHECK17-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 18770 // CHECK17-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 18771 // CHECK17-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 18772 // CHECK17-NEXT: [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 18773 // CHECK17-NEXT: [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0 18774 // CHECK17-NEXT: br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED25:%.*]], label [[OMP_OFFLOAD_CONT26:%.*]] 18775 // CHECK17: omp_offload.failed25: 18776 // CHECK17-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i64 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]] 18777 // CHECK17-NEXT: br label [[OMP_OFFLOAD_CONT26]] 18778 // CHECK17: omp_offload.cont26: 18779 // CHECK17-NEXT: ret i32 0 18780 // 18781 // 18782 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116 18783 // CHECK17-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 18784 // CHECK17-NEXT: entry: 18785 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 18786 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 18787 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 18788 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 18789 // CHECK17-NEXT: ret void 18790 // 18791 // 18792 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..14 18793 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 18794 // CHECK17-NEXT: entry: 18795 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 18796 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 18797 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 18798 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 18799 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 18800 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 18801 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 18802 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 18803 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 18804 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 18805 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 18806 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 18807 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 18808 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 18809 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 18810 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 18811 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 18812 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 18813 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 18814 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 18815 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 18816 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18817 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 18818 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 18819 // CHECK17: cond.true: 18820 // CHECK17-NEXT: br label [[COND_END:%.*]] 18821 // CHECK17: cond.false: 18822 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18823 // CHECK17-NEXT: br label [[COND_END]] 18824 // CHECK17: cond.end: 18825 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 18826 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 18827 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 18828 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 18829 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 18830 // CHECK17: omp.inner.for.cond: 18831 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18832 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18833 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 18834 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 18835 // CHECK17: omp.inner.for.body: 18836 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 18837 // CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 18838 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18839 // CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 18840 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]) 18841 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 18842 // CHECK17: omp.inner.for.inc: 18843 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18844 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 18845 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 18846 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 18847 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 18848 // CHECK17: omp.inner.for.end: 18849 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 18850 // CHECK17: omp.loop.exit: 18851 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 18852 // CHECK17-NEXT: ret void 18853 // 18854 // 18855 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..15 18856 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 18857 // CHECK17-NEXT: entry: 18858 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 18859 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 18860 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 18861 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 18862 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 18863 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 18864 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 18865 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 18866 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 18867 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 18868 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 18869 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 18870 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 18871 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 18872 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 18873 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 18874 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 18875 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 18876 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 18877 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 18878 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 18879 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 18880 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 18881 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 18882 // CHECK17-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 18883 // CHECK17-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 18884 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 18885 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 18886 // CHECK17-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 18887 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 18888 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 18889 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18890 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 18891 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 18892 // CHECK17: cond.true: 18893 // CHECK17-NEXT: br label [[COND_END:%.*]] 18894 // CHECK17: cond.false: 18895 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18896 // CHECK17-NEXT: br label [[COND_END]] 18897 // CHECK17: cond.end: 18898 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 18899 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 18900 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 18901 // CHECK17-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 18902 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 18903 // CHECK17: omp.inner.for.cond: 18904 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18905 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 18906 // CHECK17-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 18907 // CHECK17-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 18908 // CHECK17: omp.inner.for.body: 18909 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18910 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 18911 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 18912 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4 18913 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 18914 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 18915 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 18916 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 18917 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 18918 // CHECK17: omp.body.continue: 18919 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 18920 // CHECK17: omp.inner.for.inc: 18921 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18922 // CHECK17-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 18923 // CHECK17-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 18924 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 18925 // CHECK17: omp.inner.for.end: 18926 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 18927 // CHECK17: omp.loop.exit: 18928 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 18929 // CHECK17-NEXT: ret void 18930 // 18931 // 18932 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121 18933 // CHECK17-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 18934 // CHECK17-NEXT: entry: 18935 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 18936 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 18937 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 18938 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 18939 // CHECK17-NEXT: ret void 18940 // 18941 // 18942 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..17 18943 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 18944 // CHECK17-NEXT: entry: 18945 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 18946 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 18947 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 18948 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 18949 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 18950 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 18951 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 18952 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 18953 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 18954 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 18955 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 18956 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 18957 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 18958 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 18959 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 18960 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 18961 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 18962 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 18963 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 18964 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 18965 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 18966 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18967 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 18968 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 18969 // CHECK17: cond.true: 18970 // CHECK17-NEXT: br label [[COND_END:%.*]] 18971 // CHECK17: cond.false: 18972 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18973 // CHECK17-NEXT: br label [[COND_END]] 18974 // CHECK17: cond.end: 18975 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 18976 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 18977 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 18978 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 18979 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 18980 // CHECK17: omp.inner.for.cond: 18981 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18982 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18983 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 18984 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 18985 // CHECK17: omp.inner.for.body: 18986 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 18987 // CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 18988 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 18989 // CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 18990 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]) 18991 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 18992 // CHECK17: omp.inner.for.inc: 18993 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 18994 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 18995 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 18996 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 18997 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 18998 // CHECK17: omp.inner.for.end: 18999 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 19000 // CHECK17: omp.loop.exit: 19001 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 19002 // CHECK17-NEXT: ret void 19003 // 19004 // 19005 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..18 19006 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 19007 // CHECK17-NEXT: entry: 19008 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 19009 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 19010 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 19011 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 19012 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 19013 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 19014 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 19015 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 19016 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 19017 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 19018 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 19019 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 19020 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 19021 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 19022 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 19023 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 19024 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 19025 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 19026 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 19027 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 19028 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 19029 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 19030 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 19031 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 19032 // CHECK17-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 19033 // CHECK17-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 19034 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 19035 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 19036 // CHECK17-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 19037 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 19038 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 19039 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19040 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 19041 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 19042 // CHECK17: cond.true: 19043 // CHECK17-NEXT: br label [[COND_END:%.*]] 19044 // CHECK17: cond.false: 19045 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19046 // CHECK17-NEXT: br label [[COND_END]] 19047 // CHECK17: cond.end: 19048 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 19049 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 19050 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 19051 // CHECK17-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 19052 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 19053 // CHECK17: omp.inner.for.cond: 19054 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19055 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19056 // CHECK17-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 19057 // CHECK17-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 19058 // CHECK17: omp.inner.for.body: 19059 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19060 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 19061 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 19062 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4 19063 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 19064 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 19065 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 19066 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 19067 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 19068 // CHECK17: omp.body.continue: 19069 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 19070 // CHECK17: omp.inner.for.inc: 19071 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19072 // CHECK17-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 19073 // CHECK17-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 19074 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 19075 // CHECK17: omp.inner.for.end: 19076 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 19077 // CHECK17: omp.loop.exit: 19078 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 19079 // CHECK17-NEXT: ret void 19080 // 19081 // 19082 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126 19083 // CHECK17-SAME: (i64 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 19084 // CHECK17-NEXT: entry: 19085 // CHECK17-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 19086 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 19087 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 19088 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 19089 // CHECK17-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 19090 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 19091 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* 19092 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 19093 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8 19094 // CHECK17-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 19095 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 19096 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 19097 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 19098 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 19099 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]]) 19100 // CHECK17-NEXT: ret void 19101 // 19102 // 19103 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..21 19104 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 19105 // CHECK17-NEXT: entry: 19106 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 19107 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 19108 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 19109 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 19110 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 19111 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 19112 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 19113 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 19114 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 19115 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 19116 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 19117 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 19118 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 19119 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 19120 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 19121 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 19122 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 19123 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 19124 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 19125 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 19126 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 19127 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 19128 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 19129 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 19130 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 19131 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19132 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 19133 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 19134 // CHECK17: cond.true: 19135 // CHECK17-NEXT: br label [[COND_END:%.*]] 19136 // CHECK17: cond.false: 19137 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19138 // CHECK17-NEXT: br label [[COND_END]] 19139 // CHECK17: cond.end: 19140 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 19141 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 19142 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 19143 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 19144 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 19145 // CHECK17: omp.inner.for.cond: 19146 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19147 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19148 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 19149 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 19150 // CHECK17: omp.inner.for.body: 19151 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 19152 // CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 19153 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19154 // CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 19155 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8 19156 // CHECK17-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 19157 // CHECK17-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4 19158 // CHECK17-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 19159 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]]) 19160 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 19161 // CHECK17: omp.inner.for.inc: 19162 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19163 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 19164 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 19165 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 19166 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 19167 // CHECK17: omp.inner.for.end: 19168 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 19169 // CHECK17: omp.loop.exit: 19170 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 19171 // CHECK17-NEXT: ret void 19172 // 19173 // 19174 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..22 19175 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 19176 // CHECK17-NEXT: entry: 19177 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 19178 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 19179 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 19180 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 19181 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 19182 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 19183 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 19184 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 19185 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 19186 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 19187 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 19188 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 19189 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 19190 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 19191 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 19192 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 19193 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 19194 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 19195 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 19196 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 19197 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 19198 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 19199 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 19200 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 19201 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 19202 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 19203 // CHECK17-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 19204 // CHECK17-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4 19205 // CHECK17-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 19206 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 19207 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 19208 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8 19209 // CHECK17-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 19210 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 19211 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]]) 19212 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 19213 // CHECK17: omp.dispatch.cond: 19214 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19215 // CHECK17-NEXT: [[CONV3:%.*]] = sext i32 [[TMP6]] to i64 19216 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 19217 // CHECK17-NEXT: [[CMP:%.*]] = icmp ugt i64 [[CONV3]], [[TMP7]] 19218 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 19219 // CHECK17: cond.true: 19220 // CHECK17-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 19221 // CHECK17-NEXT: br label [[COND_END:%.*]] 19222 // CHECK17: cond.false: 19223 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19224 // CHECK17-NEXT: [[CONV4:%.*]] = sext i32 [[TMP9]] to i64 19225 // CHECK17-NEXT: br label [[COND_END]] 19226 // CHECK17: cond.end: 19227 // CHECK17-NEXT: [[COND:%.*]] = phi i64 [ [[TMP8]], [[COND_TRUE]] ], [ [[CONV4]], [[COND_FALSE]] ] 19228 // CHECK17-NEXT: [[CONV5:%.*]] = trunc i64 [[COND]] to i32 19229 // CHECK17-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 19230 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 19231 // CHECK17-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 19232 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19233 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19234 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 19235 // CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 19236 // CHECK17: omp.dispatch.body: 19237 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 19238 // CHECK17: omp.inner.for.cond: 19239 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19240 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19241 // CHECK17-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 19242 // CHECK17-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 19243 // CHECK17: omp.inner.for.body: 19244 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19245 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 19246 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 19247 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4 19248 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4 19249 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 19250 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 19251 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 19252 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 19253 // CHECK17: omp.body.continue: 19254 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 19255 // CHECK17: omp.inner.for.inc: 19256 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19257 // CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], 1 19258 // CHECK17-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 19259 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 19260 // CHECK17: omp.inner.for.end: 19261 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 19262 // CHECK17: omp.dispatch.inc: 19263 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 19264 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 19265 // CHECK17-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 19266 // CHECK17-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4 19267 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19268 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 19269 // CHECK17-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 19270 // CHECK17-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4 19271 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]] 19272 // CHECK17: omp.dispatch.end: 19273 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 19274 // CHECK17-NEXT: ret void 19275 // 19276 // 19277 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131 19278 // CHECK17-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 19279 // CHECK17-NEXT: entry: 19280 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 19281 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 19282 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 19283 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 19284 // CHECK17-NEXT: ret void 19285 // 19286 // 19287 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..25 19288 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 19289 // CHECK17-NEXT: entry: 19290 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 19291 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 19292 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 19293 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 19294 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 19295 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 19296 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 19297 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 19298 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 19299 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 19300 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 19301 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 19302 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 19303 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 19304 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 19305 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 19306 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 19307 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 19308 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 19309 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 19310 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 19311 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19312 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 19313 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 19314 // CHECK17: cond.true: 19315 // CHECK17-NEXT: br label [[COND_END:%.*]] 19316 // CHECK17: cond.false: 19317 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19318 // CHECK17-NEXT: br label [[COND_END]] 19319 // CHECK17: cond.end: 19320 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 19321 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 19322 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 19323 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 19324 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 19325 // CHECK17: omp.inner.for.cond: 19326 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19327 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19328 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 19329 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 19330 // CHECK17: omp.inner.for.body: 19331 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 19332 // CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 19333 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19334 // CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 19335 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]) 19336 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 19337 // CHECK17: omp.inner.for.inc: 19338 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19339 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 19340 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 19341 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 19342 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 19343 // CHECK17: omp.inner.for.end: 19344 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 19345 // CHECK17: omp.loop.exit: 19346 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 19347 // CHECK17-NEXT: ret void 19348 // 19349 // 19350 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..26 19351 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 19352 // CHECK17-NEXT: entry: 19353 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 19354 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 19355 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 19356 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 19357 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 19358 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 19359 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 19360 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 19361 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 19362 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 19363 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 19364 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 19365 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 19366 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 19367 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 19368 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 19369 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 19370 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 19371 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 19372 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 19373 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 19374 // CHECK17-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 19375 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 19376 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 19377 // CHECK17-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 19378 // CHECK17-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 19379 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 19380 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 19381 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 19382 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19383 // CHECK17-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 19384 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 19385 // CHECK17-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 19386 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 19387 // CHECK17: omp.dispatch.cond: 19388 // CHECK17-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 19389 // CHECK17-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 19390 // CHECK17-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 19391 // CHECK17: omp.dispatch.body: 19392 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 19393 // CHECK17-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 19394 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 19395 // CHECK17: omp.inner.for.cond: 19396 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 19397 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !20 19398 // CHECK17-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 19399 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 19400 // CHECK17: omp.inner.for.body: 19401 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 19402 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 19403 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 19404 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !20 19405 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !20 19406 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 19407 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 19408 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !20 19409 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 19410 // CHECK17: omp.body.continue: 19411 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 19412 // CHECK17: omp.inner.for.inc: 19413 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 19414 // CHECK17-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 19415 // CHECK17-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 19416 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]] 19417 // CHECK17: omp.inner.for.end: 19418 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 19419 // CHECK17: omp.dispatch.inc: 19420 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]] 19421 // CHECK17: omp.dispatch.end: 19422 // CHECK17-NEXT: ret void 19423 // 19424 // 19425 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136 19426 // CHECK17-SAME: (i64 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 19427 // CHECK17-NEXT: entry: 19428 // CHECK17-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 19429 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 19430 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 19431 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 19432 // CHECK17-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 19433 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 19434 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* 19435 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 19436 // CHECK17-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8 19437 // CHECK17-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 19438 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 19439 // CHECK17-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 19440 // CHECK17-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 19441 // CHECK17-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 19442 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]]) 19443 // CHECK17-NEXT: ret void 19444 // 19445 // 19446 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..29 19447 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 19448 // CHECK17-NEXT: entry: 19449 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 19450 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 19451 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 19452 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 19453 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 19454 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 19455 // CHECK17-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 19456 // CHECK17-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 19457 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 19458 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 19459 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 19460 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 19461 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 19462 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 19463 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 19464 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 19465 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 19466 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 19467 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 19468 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 19469 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 19470 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 19471 // CHECK17-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 19472 // CHECK17-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 19473 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 19474 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19475 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 19476 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 19477 // CHECK17: cond.true: 19478 // CHECK17-NEXT: br label [[COND_END:%.*]] 19479 // CHECK17: cond.false: 19480 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19481 // CHECK17-NEXT: br label [[COND_END]] 19482 // CHECK17: cond.end: 19483 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 19484 // CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 19485 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 19486 // CHECK17-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 19487 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 19488 // CHECK17: omp.inner.for.cond: 19489 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19490 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19491 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 19492 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 19493 // CHECK17: omp.inner.for.body: 19494 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 19495 // CHECK17-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 19496 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 19497 // CHECK17-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 19498 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8 19499 // CHECK17-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 19500 // CHECK17-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4 19501 // CHECK17-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 19502 // CHECK17-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]]) 19503 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 19504 // CHECK17: omp.inner.for.inc: 19505 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 19506 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 19507 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 19508 // CHECK17-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 19509 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] 19510 // CHECK17: omp.inner.for.end: 19511 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 19512 // CHECK17: omp.loop.exit: 19513 // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 19514 // CHECK17-NEXT: ret void 19515 // 19516 // 19517 // CHECK17-LABEL: define {{[^@]+}}@.omp_outlined..30 19518 // CHECK17-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 19519 // CHECK17-NEXT: entry: 19520 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 19521 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 19522 // CHECK17-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 19523 // CHECK17-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 19524 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 19525 // CHECK17-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 19526 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 19527 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4 19528 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 19529 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 19530 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 19531 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 19532 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4 19533 // CHECK17-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 19534 // CHECK17-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 19535 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 19536 // CHECK17-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 19537 // CHECK17-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 19538 // CHECK17-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 19539 // CHECK17-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 19540 // CHECK17-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 19541 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 19542 // CHECK17-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 19543 // CHECK17-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 19544 // CHECK17-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 19545 // CHECK17-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 19546 // CHECK17-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 19547 // CHECK17-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4 19548 // CHECK17-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 19549 // CHECK17-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 19550 // CHECK17-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 19551 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8 19552 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 19553 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 19554 // CHECK17-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 19555 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 19556 // CHECK17-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]]) 19557 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 19558 // CHECK17: omp.dispatch.cond: 19559 // CHECK17-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 19560 // CHECK17-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0 19561 // CHECK17-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 19562 // CHECK17: omp.dispatch.body: 19563 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 19564 // CHECK17-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 19565 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 19566 // CHECK17: omp.inner.for.cond: 19567 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 19568 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !23 19569 // CHECK17-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 19570 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 19571 // CHECK17: omp.inner.for.body: 19572 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 19573 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 19574 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 19575 // CHECK17-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !23 19576 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !23 19577 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 19578 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 19579 // CHECK17-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !23 19580 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 19581 // CHECK17: omp.body.continue: 19582 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 19583 // CHECK17: omp.inner.for.inc: 19584 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 19585 // CHECK17-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1 19586 // CHECK17-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 19587 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]] 19588 // CHECK17: omp.inner.for.end: 19589 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 19590 // CHECK17: omp.dispatch.inc: 19591 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]] 19592 // CHECK17: omp.dispatch.end: 19593 // CHECK17-NEXT: ret void 19594 // 19595 // 19596 // CHECK17-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 19597 // CHECK17-SAME: () #[[ATTR5:[0-9]+]] { 19598 // CHECK17-NEXT: entry: 19599 // CHECK17-NEXT: call void @__tgt_register_requires(i64 1) 19600 // CHECK17-NEXT: ret void 19601 // 19602 // 19603 // CHECK18-LABEL: define {{[^@]+}}@main 19604 // CHECK18-SAME: (i32 signext [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 19605 // CHECK18-NEXT: entry: 19606 // CHECK18-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 19607 // CHECK18-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 19608 // CHECK18-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 8 19609 // CHECK18-NEXT: [[N:%.*]] = alloca i32, align 4 19610 // CHECK18-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 8 19611 // CHECK18-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8 19612 // CHECK18-NEXT: [[M:%.*]] = alloca i32, align 4 19613 // CHECK18-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8 19614 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 8 19615 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 8 19616 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 8 19617 // CHECK18-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8 19618 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 19619 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 19620 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 19621 // CHECK18-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8 19622 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS5:%.*]] = alloca [3 x i8*], align 8 19623 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS6:%.*]] = alloca [3 x i8*], align 8 19624 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS7:%.*]] = alloca [3 x i8*], align 8 19625 // CHECK18-NEXT: [[DOTOFFLOAD_SIZES8:%.*]] = alloca [3 x i64], align 8 19626 // CHECK18-NEXT: [[_TMP9:%.*]] = alloca i32, align 4 19627 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 19628 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4 19629 // CHECK18-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 19630 // CHECK18-NEXT: [[N_CASTED19:%.*]] = alloca i64, align 8 19631 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [4 x i8*], align 8 19632 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS22:%.*]] = alloca [4 x i8*], align 8 19633 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [4 x i8*], align 8 19634 // CHECK18-NEXT: [[DOTOFFLOAD_SIZES24:%.*]] = alloca [4 x i64], align 8 19635 // CHECK18-NEXT: [[_TMP25:%.*]] = alloca i32, align 4 19636 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4 19637 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_27:%.*]] = alloca i32, align 4 19638 // CHECK18-NEXT: [[N_CASTED34:%.*]] = alloca i64, align 8 19639 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS36:%.*]] = alloca [3 x i8*], align 8 19640 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS37:%.*]] = alloca [3 x i8*], align 8 19641 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS38:%.*]] = alloca [3 x i8*], align 8 19642 // CHECK18-NEXT: [[DOTOFFLOAD_SIZES39:%.*]] = alloca [3 x i64], align 8 19643 // CHECK18-NEXT: [[_TMP40:%.*]] = alloca i32, align 4 19644 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4 19645 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4 19646 // CHECK18-NEXT: [[M_CASTED49:%.*]] = alloca i64, align 8 19647 // CHECK18-NEXT: [[N_CASTED51:%.*]] = alloca i64, align 8 19648 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS53:%.*]] = alloca [4 x i8*], align 8 19649 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS54:%.*]] = alloca [4 x i8*], align 8 19650 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS55:%.*]] = alloca [4 x i8*], align 8 19651 // CHECK18-NEXT: [[DOTOFFLOAD_SIZES56:%.*]] = alloca [4 x i64], align 8 19652 // CHECK18-NEXT: [[_TMP57:%.*]] = alloca i32, align 4 19653 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4 19654 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_59:%.*]] = alloca i32, align 4 19655 // CHECK18-NEXT: store i32 0, i32* [[RETVAL]], align 4 19656 // CHECK18-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 19657 // CHECK18-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 8 19658 // CHECK18-NEXT: store i32 100, i32* [[N]], align 4 19659 // CHECK18-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 19660 // CHECK18-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 19661 // CHECK18-NEXT: [[TMP2:%.*]] = call i8* @llvm.stacksave() 19662 // CHECK18-NEXT: store i8* [[TMP2]], i8** [[SAVED_STACK]], align 8 19663 // CHECK18-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4 19664 // CHECK18-NEXT: store i64 [[TMP1]], i64* [[__VLA_EXPR0]], align 8 19665 // CHECK18-NEXT: store i32 10, i32* [[M]], align 4 19666 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[N]], align 4 19667 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[N_CASTED]] to i32* 19668 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[CONV]], align 4 19669 // CHECK18-NEXT: [[TMP4:%.*]] = load i64, i64* [[N_CASTED]], align 8 19670 // CHECK18-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4 19671 // CHECK18-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 19672 // CHECK18-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i64* 19673 // CHECK18-NEXT: store i64 [[TMP4]], i64* [[TMP7]], align 8 19674 // CHECK18-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 19675 // CHECK18-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i64* 19676 // CHECK18-NEXT: store i64 [[TMP4]], i64* [[TMP9]], align 8 19677 // CHECK18-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 19678 // CHECK18-NEXT: store i64 4, i64* [[TMP10]], align 8 19679 // CHECK18-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 19680 // CHECK18-NEXT: store i8* null, i8** [[TMP11]], align 8 19681 // CHECK18-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 19682 // CHECK18-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i64* 19683 // CHECK18-NEXT: store i64 [[TMP1]], i64* [[TMP13]], align 8 19684 // CHECK18-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 19685 // CHECK18-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i64* 19686 // CHECK18-NEXT: store i64 [[TMP1]], i64* [[TMP15]], align 8 19687 // CHECK18-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 19688 // CHECK18-NEXT: store i64 8, i64* [[TMP16]], align 8 19689 // CHECK18-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1 19690 // CHECK18-NEXT: store i8* null, i8** [[TMP17]], align 8 19691 // CHECK18-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 19692 // CHECK18-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32** 19693 // CHECK18-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 8 19694 // CHECK18-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 19695 // CHECK18-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32** 19696 // CHECK18-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 8 19697 // CHECK18-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 19698 // CHECK18-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 8 19699 // CHECK18-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2 19700 // CHECK18-NEXT: store i8* null, i8** [[TMP23]], align 8 19701 // CHECK18-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 19702 // CHECK18-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 19703 // CHECK18-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 19704 // CHECK18-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4 19705 // CHECK18-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4 19706 // CHECK18-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 19707 // CHECK18-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0 19708 // CHECK18-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 19709 // CHECK18-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 19710 // CHECK18-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 19711 // CHECK18-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 19712 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1 19713 // CHECK18-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64 19714 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]]) 19715 // CHECK18-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 19716 // CHECK18-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 19717 // CHECK18-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 19718 // CHECK18: omp_offload.failed: 19719 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i64 [[TMP4]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 19720 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT]] 19721 // CHECK18: omp_offload.cont: 19722 // CHECK18-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4 19723 // CHECK18-NEXT: [[CONV4:%.*]] = bitcast i64* [[N_CASTED3]] to i32* 19724 // CHECK18-NEXT: store i32 [[TMP33]], i32* [[CONV4]], align 4 19725 // CHECK18-NEXT: [[TMP34:%.*]] = load i64, i64* [[N_CASTED3]], align 8 19726 // CHECK18-NEXT: [[TMP35:%.*]] = mul nuw i64 [[TMP1]], 4 19727 // CHECK18-NEXT: [[TMP36:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 19728 // CHECK18-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to i64* 19729 // CHECK18-NEXT: store i64 [[TMP34]], i64* [[TMP37]], align 8 19730 // CHECK18-NEXT: [[TMP38:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 19731 // CHECK18-NEXT: [[TMP39:%.*]] = bitcast i8** [[TMP38]] to i64* 19732 // CHECK18-NEXT: store i64 [[TMP34]], i64* [[TMP39]], align 8 19733 // CHECK18-NEXT: [[TMP40:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0 19734 // CHECK18-NEXT: store i64 4, i64* [[TMP40]], align 8 19735 // CHECK18-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 0 19736 // CHECK18-NEXT: store i8* null, i8** [[TMP41]], align 8 19737 // CHECK18-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 1 19738 // CHECK18-NEXT: [[TMP43:%.*]] = bitcast i8** [[TMP42]] to i64* 19739 // CHECK18-NEXT: store i64 [[TMP1]], i64* [[TMP43]], align 8 19740 // CHECK18-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 1 19741 // CHECK18-NEXT: [[TMP45:%.*]] = bitcast i8** [[TMP44]] to i64* 19742 // CHECK18-NEXT: store i64 [[TMP1]], i64* [[TMP45]], align 8 19743 // CHECK18-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 1 19744 // CHECK18-NEXT: store i64 8, i64* [[TMP46]], align 8 19745 // CHECK18-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 1 19746 // CHECK18-NEXT: store i8* null, i8** [[TMP47]], align 8 19747 // CHECK18-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 2 19748 // CHECK18-NEXT: [[TMP49:%.*]] = bitcast i8** [[TMP48]] to i32** 19749 // CHECK18-NEXT: store i32* [[VLA]], i32** [[TMP49]], align 8 19750 // CHECK18-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 2 19751 // CHECK18-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to i32** 19752 // CHECK18-NEXT: store i32* [[VLA]], i32** [[TMP51]], align 8 19753 // CHECK18-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 2 19754 // CHECK18-NEXT: store i64 [[TMP35]], i64* [[TMP52]], align 8 19755 // CHECK18-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS7]], i64 0, i64 2 19756 // CHECK18-NEXT: store i8* null, i8** [[TMP53]], align 8 19757 // CHECK18-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS5]], i32 0, i32 0 19758 // CHECK18-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS6]], i32 0, i32 0 19759 // CHECK18-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES8]], i32 0, i32 0 19760 // CHECK18-NEXT: [[TMP57:%.*]] = load i32, i32* [[N]], align 4 19761 // CHECK18-NEXT: store i32 [[TMP57]], i32* [[DOTCAPTURE_EXPR_10]], align 4 19762 // CHECK18-NEXT: [[TMP58:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 19763 // CHECK18-NEXT: [[SUB12:%.*]] = sub nsw i32 [[TMP58]], 0 19764 // CHECK18-NEXT: [[DIV13:%.*]] = sdiv i32 [[SUB12]], 1 19765 // CHECK18-NEXT: [[SUB14:%.*]] = sub nsw i32 [[DIV13]], 1 19766 // CHECK18-NEXT: store i32 [[SUB14]], i32* [[DOTCAPTURE_EXPR_11]], align 4 19767 // CHECK18-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_11]], align 4 19768 // CHECK18-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP59]], 1 19769 // CHECK18-NEXT: [[TMP60:%.*]] = zext i32 [[ADD15]] to i64 19770 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP60]]) 19771 // CHECK18-NEXT: [[TMP61:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, i32 3, i8** [[TMP54]], i8** [[TMP55]], i64* [[TMP56]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 19772 // CHECK18-NEXT: [[TMP62:%.*]] = icmp ne i32 [[TMP61]], 0 19773 // CHECK18-NEXT: br i1 [[TMP62]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]] 19774 // CHECK18: omp_offload.failed16: 19775 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i64 [[TMP34]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 19776 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT17]] 19777 // CHECK18: omp_offload.cont17: 19778 // CHECK18-NEXT: [[TMP63:%.*]] = load i32, i32* [[M]], align 4 19779 // CHECK18-NEXT: [[CONV18:%.*]] = bitcast i64* [[M_CASTED]] to i32* 19780 // CHECK18-NEXT: store i32 [[TMP63]], i32* [[CONV18]], align 4 19781 // CHECK18-NEXT: [[TMP64:%.*]] = load i64, i64* [[M_CASTED]], align 8 19782 // CHECK18-NEXT: [[TMP65:%.*]] = load i32, i32* [[N]], align 4 19783 // CHECK18-NEXT: [[CONV20:%.*]] = bitcast i64* [[N_CASTED19]] to i32* 19784 // CHECK18-NEXT: store i32 [[TMP65]], i32* [[CONV20]], align 4 19785 // CHECK18-NEXT: [[TMP66:%.*]] = load i64, i64* [[N_CASTED19]], align 8 19786 // CHECK18-NEXT: [[TMP67:%.*]] = mul nuw i64 [[TMP1]], 4 19787 // CHECK18-NEXT: [[TMP68:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 19788 // CHECK18-NEXT: [[TMP69:%.*]] = bitcast i8** [[TMP68]] to i64* 19789 // CHECK18-NEXT: store i64 [[TMP64]], i64* [[TMP69]], align 8 19790 // CHECK18-NEXT: [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 19791 // CHECK18-NEXT: [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i64* 19792 // CHECK18-NEXT: store i64 [[TMP64]], i64* [[TMP71]], align 8 19793 // CHECK18-NEXT: [[TMP72:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0 19794 // CHECK18-NEXT: store i64 4, i64* [[TMP72]], align 8 19795 // CHECK18-NEXT: [[TMP73:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0 19796 // CHECK18-NEXT: store i8* null, i8** [[TMP73]], align 8 19797 // CHECK18-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1 19798 // CHECK18-NEXT: [[TMP75:%.*]] = bitcast i8** [[TMP74]] to i64* 19799 // CHECK18-NEXT: store i64 [[TMP66]], i64* [[TMP75]], align 8 19800 // CHECK18-NEXT: [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1 19801 // CHECK18-NEXT: [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i64* 19802 // CHECK18-NEXT: store i64 [[TMP66]], i64* [[TMP77]], align 8 19803 // CHECK18-NEXT: [[TMP78:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 1 19804 // CHECK18-NEXT: store i64 4, i64* [[TMP78]], align 8 19805 // CHECK18-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1 19806 // CHECK18-NEXT: store i8* null, i8** [[TMP79]], align 8 19807 // CHECK18-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 2 19808 // CHECK18-NEXT: [[TMP81:%.*]] = bitcast i8** [[TMP80]] to i64* 19809 // CHECK18-NEXT: store i64 [[TMP1]], i64* [[TMP81]], align 8 19810 // CHECK18-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 2 19811 // CHECK18-NEXT: [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i64* 19812 // CHECK18-NEXT: store i64 [[TMP1]], i64* [[TMP83]], align 8 19813 // CHECK18-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 2 19814 // CHECK18-NEXT: store i64 8, i64* [[TMP84]], align 8 19815 // CHECK18-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 2 19816 // CHECK18-NEXT: store i8* null, i8** [[TMP85]], align 8 19817 // CHECK18-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 3 19818 // CHECK18-NEXT: [[TMP87:%.*]] = bitcast i8** [[TMP86]] to i32** 19819 // CHECK18-NEXT: store i32* [[VLA]], i32** [[TMP87]], align 8 19820 // CHECK18-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 3 19821 // CHECK18-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32** 19822 // CHECK18-NEXT: store i32* [[VLA]], i32** [[TMP89]], align 8 19823 // CHECK18-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 3 19824 // CHECK18-NEXT: store i64 [[TMP67]], i64* [[TMP90]], align 8 19825 // CHECK18-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 3 19826 // CHECK18-NEXT: store i8* null, i8** [[TMP91]], align 8 19827 // CHECK18-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 19828 // CHECK18-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 19829 // CHECK18-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES24]], i32 0, i32 0 19830 // CHECK18-NEXT: [[TMP95:%.*]] = load i32, i32* [[N]], align 4 19831 // CHECK18-NEXT: store i32 [[TMP95]], i32* [[DOTCAPTURE_EXPR_26]], align 4 19832 // CHECK18-NEXT: [[TMP96:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_26]], align 4 19833 // CHECK18-NEXT: [[SUB28:%.*]] = sub nsw i32 [[TMP96]], 0 19834 // CHECK18-NEXT: [[DIV29:%.*]] = sdiv i32 [[SUB28]], 1 19835 // CHECK18-NEXT: [[SUB30:%.*]] = sub nsw i32 [[DIV29]], 1 19836 // CHECK18-NEXT: store i32 [[SUB30]], i32* [[DOTCAPTURE_EXPR_27]], align 4 19837 // CHECK18-NEXT: [[TMP97:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_27]], align 4 19838 // CHECK18-NEXT: [[ADD31:%.*]] = add nsw i32 [[TMP97]], 1 19839 // CHECK18-NEXT: [[TMP98:%.*]] = zext i32 [[ADD31]] to i64 19840 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP98]]) 19841 // CHECK18-NEXT: [[TMP99:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, i32 4, i8** [[TMP92]], i8** [[TMP93]], i64* [[TMP94]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 19842 // CHECK18-NEXT: [[TMP100:%.*]] = icmp ne i32 [[TMP99]], 0 19843 // CHECK18-NEXT: br i1 [[TMP100]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]] 19844 // CHECK18: omp_offload.failed32: 19845 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i64 [[TMP64]], i64 [[TMP66]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 19846 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT33]] 19847 // CHECK18: omp_offload.cont33: 19848 // CHECK18-NEXT: [[TMP101:%.*]] = load i32, i32* [[N]], align 4 19849 // CHECK18-NEXT: [[CONV35:%.*]] = bitcast i64* [[N_CASTED34]] to i32* 19850 // CHECK18-NEXT: store i32 [[TMP101]], i32* [[CONV35]], align 4 19851 // CHECK18-NEXT: [[TMP102:%.*]] = load i64, i64* [[N_CASTED34]], align 8 19852 // CHECK18-NEXT: [[TMP103:%.*]] = mul nuw i64 [[TMP1]], 4 19853 // CHECK18-NEXT: [[TMP104:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0 19854 // CHECK18-NEXT: [[TMP105:%.*]] = bitcast i8** [[TMP104]] to i64* 19855 // CHECK18-NEXT: store i64 [[TMP102]], i64* [[TMP105]], align 8 19856 // CHECK18-NEXT: [[TMP106:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0 19857 // CHECK18-NEXT: [[TMP107:%.*]] = bitcast i8** [[TMP106]] to i64* 19858 // CHECK18-NEXT: store i64 [[TMP102]], i64* [[TMP107]], align 8 19859 // CHECK18-NEXT: [[TMP108:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0 19860 // CHECK18-NEXT: store i64 4, i64* [[TMP108]], align 8 19861 // CHECK18-NEXT: [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 0 19862 // CHECK18-NEXT: store i8* null, i8** [[TMP109]], align 8 19863 // CHECK18-NEXT: [[TMP110:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 1 19864 // CHECK18-NEXT: [[TMP111:%.*]] = bitcast i8** [[TMP110]] to i64* 19865 // CHECK18-NEXT: store i64 [[TMP1]], i64* [[TMP111]], align 8 19866 // CHECK18-NEXT: [[TMP112:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 1 19867 // CHECK18-NEXT: [[TMP113:%.*]] = bitcast i8** [[TMP112]] to i64* 19868 // CHECK18-NEXT: store i64 [[TMP1]], i64* [[TMP113]], align 8 19869 // CHECK18-NEXT: [[TMP114:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 1 19870 // CHECK18-NEXT: store i64 8, i64* [[TMP114]], align 8 19871 // CHECK18-NEXT: [[TMP115:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 1 19872 // CHECK18-NEXT: store i8* null, i8** [[TMP115]], align 8 19873 // CHECK18-NEXT: [[TMP116:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 2 19874 // CHECK18-NEXT: [[TMP117:%.*]] = bitcast i8** [[TMP116]] to i32** 19875 // CHECK18-NEXT: store i32* [[VLA]], i32** [[TMP117]], align 8 19876 // CHECK18-NEXT: [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 2 19877 // CHECK18-NEXT: [[TMP119:%.*]] = bitcast i8** [[TMP118]] to i32** 19878 // CHECK18-NEXT: store i32* [[VLA]], i32** [[TMP119]], align 8 19879 // CHECK18-NEXT: [[TMP120:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 2 19880 // CHECK18-NEXT: store i64 [[TMP103]], i64* [[TMP120]], align 8 19881 // CHECK18-NEXT: [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS38]], i64 0, i64 2 19882 // CHECK18-NEXT: store i8* null, i8** [[TMP121]], align 8 19883 // CHECK18-NEXT: [[TMP122:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS36]], i32 0, i32 0 19884 // CHECK18-NEXT: [[TMP123:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS37]], i32 0, i32 0 19885 // CHECK18-NEXT: [[TMP124:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES39]], i32 0, i32 0 19886 // CHECK18-NEXT: [[TMP125:%.*]] = load i32, i32* [[N]], align 4 19887 // CHECK18-NEXT: store i32 [[TMP125]], i32* [[DOTCAPTURE_EXPR_41]], align 4 19888 // CHECK18-NEXT: [[TMP126:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_41]], align 4 19889 // CHECK18-NEXT: [[SUB43:%.*]] = sub nsw i32 [[TMP126]], 0 19890 // CHECK18-NEXT: [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1 19891 // CHECK18-NEXT: [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 1 19892 // CHECK18-NEXT: store i32 [[SUB45]], i32* [[DOTCAPTURE_EXPR_42]], align 4 19893 // CHECK18-NEXT: [[TMP127:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_42]], align 4 19894 // CHECK18-NEXT: [[ADD46:%.*]] = add nsw i32 [[TMP127]], 1 19895 // CHECK18-NEXT: [[TMP128:%.*]] = zext i32 [[ADD46]] to i64 19896 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP128]]) 19897 // CHECK18-NEXT: [[TMP129:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, i32 3, i8** [[TMP122]], i8** [[TMP123]], i64* [[TMP124]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 19898 // CHECK18-NEXT: [[TMP130:%.*]] = icmp ne i32 [[TMP129]], 0 19899 // CHECK18-NEXT: br i1 [[TMP130]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]] 19900 // CHECK18: omp_offload.failed47: 19901 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i64 [[TMP102]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 19902 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT48]] 19903 // CHECK18: omp_offload.cont48: 19904 // CHECK18-NEXT: [[TMP131:%.*]] = load i32, i32* [[M]], align 4 19905 // CHECK18-NEXT: [[CONV50:%.*]] = bitcast i64* [[M_CASTED49]] to i32* 19906 // CHECK18-NEXT: store i32 [[TMP131]], i32* [[CONV50]], align 4 19907 // CHECK18-NEXT: [[TMP132:%.*]] = load i64, i64* [[M_CASTED49]], align 8 19908 // CHECK18-NEXT: [[TMP133:%.*]] = load i32, i32* [[N]], align 4 19909 // CHECK18-NEXT: [[CONV52:%.*]] = bitcast i64* [[N_CASTED51]] to i32* 19910 // CHECK18-NEXT: store i32 [[TMP133]], i32* [[CONV52]], align 4 19911 // CHECK18-NEXT: [[TMP134:%.*]] = load i64, i64* [[N_CASTED51]], align 8 19912 // CHECK18-NEXT: [[TMP135:%.*]] = mul nuw i64 [[TMP1]], 4 19913 // CHECK18-NEXT: [[TMP136:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0 19914 // CHECK18-NEXT: [[TMP137:%.*]] = bitcast i8** [[TMP136]] to i64* 19915 // CHECK18-NEXT: store i64 [[TMP132]], i64* [[TMP137]], align 8 19916 // CHECK18-NEXT: [[TMP138:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0 19917 // CHECK18-NEXT: [[TMP139:%.*]] = bitcast i8** [[TMP138]] to i64* 19918 // CHECK18-NEXT: store i64 [[TMP132]], i64* [[TMP139]], align 8 19919 // CHECK18-NEXT: [[TMP140:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0 19920 // CHECK18-NEXT: store i64 4, i64* [[TMP140]], align 8 19921 // CHECK18-NEXT: [[TMP141:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 0 19922 // CHECK18-NEXT: store i8* null, i8** [[TMP141]], align 8 19923 // CHECK18-NEXT: [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 1 19924 // CHECK18-NEXT: [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i64* 19925 // CHECK18-NEXT: store i64 [[TMP134]], i64* [[TMP143]], align 8 19926 // CHECK18-NEXT: [[TMP144:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 1 19927 // CHECK18-NEXT: [[TMP145:%.*]] = bitcast i8** [[TMP144]] to i64* 19928 // CHECK18-NEXT: store i64 [[TMP134]], i64* [[TMP145]], align 8 19929 // CHECK18-NEXT: [[TMP146:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 1 19930 // CHECK18-NEXT: store i64 4, i64* [[TMP146]], align 8 19931 // CHECK18-NEXT: [[TMP147:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 1 19932 // CHECK18-NEXT: store i8* null, i8** [[TMP147]], align 8 19933 // CHECK18-NEXT: [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 2 19934 // CHECK18-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i64* 19935 // CHECK18-NEXT: store i64 [[TMP1]], i64* [[TMP149]], align 8 19936 // CHECK18-NEXT: [[TMP150:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 2 19937 // CHECK18-NEXT: [[TMP151:%.*]] = bitcast i8** [[TMP150]] to i64* 19938 // CHECK18-NEXT: store i64 [[TMP1]], i64* [[TMP151]], align 8 19939 // CHECK18-NEXT: [[TMP152:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 2 19940 // CHECK18-NEXT: store i64 8, i64* [[TMP152]], align 8 19941 // CHECK18-NEXT: [[TMP153:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 2 19942 // CHECK18-NEXT: store i8* null, i8** [[TMP153]], align 8 19943 // CHECK18-NEXT: [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 3 19944 // CHECK18-NEXT: [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32** 19945 // CHECK18-NEXT: store i32* [[VLA]], i32** [[TMP155]], align 8 19946 // CHECK18-NEXT: [[TMP156:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 3 19947 // CHECK18-NEXT: [[TMP157:%.*]] = bitcast i8** [[TMP156]] to i32** 19948 // CHECK18-NEXT: store i32* [[VLA]], i32** [[TMP157]], align 8 19949 // CHECK18-NEXT: [[TMP158:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 3 19950 // CHECK18-NEXT: store i64 [[TMP135]], i64* [[TMP158]], align 8 19951 // CHECK18-NEXT: [[TMP159:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS55]], i64 0, i64 3 19952 // CHECK18-NEXT: store i8* null, i8** [[TMP159]], align 8 19953 // CHECK18-NEXT: [[TMP160:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS53]], i32 0, i32 0 19954 // CHECK18-NEXT: [[TMP161:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS54]], i32 0, i32 0 19955 // CHECK18-NEXT: [[TMP162:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES56]], i32 0, i32 0 19956 // CHECK18-NEXT: [[TMP163:%.*]] = load i32, i32* [[N]], align 4 19957 // CHECK18-NEXT: store i32 [[TMP163]], i32* [[DOTCAPTURE_EXPR_58]], align 4 19958 // CHECK18-NEXT: [[TMP164:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_58]], align 4 19959 // CHECK18-NEXT: [[SUB60:%.*]] = sub nsw i32 [[TMP164]], 0 19960 // CHECK18-NEXT: [[DIV61:%.*]] = sdiv i32 [[SUB60]], 1 19961 // CHECK18-NEXT: [[SUB62:%.*]] = sub nsw i32 [[DIV61]], 1 19962 // CHECK18-NEXT: store i32 [[SUB62]], i32* [[DOTCAPTURE_EXPR_59]], align 4 19963 // CHECK18-NEXT: [[TMP165:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_59]], align 4 19964 // CHECK18-NEXT: [[ADD63:%.*]] = add nsw i32 [[TMP165]], 1 19965 // CHECK18-NEXT: [[TMP166:%.*]] = zext i32 [[ADD63]] to i64 19966 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP166]]) 19967 // CHECK18-NEXT: [[TMP167:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, i32 4, i8** [[TMP160]], i8** [[TMP161]], i64* [[TMP162]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 19968 // CHECK18-NEXT: [[TMP168:%.*]] = icmp ne i32 [[TMP167]], 0 19969 // CHECK18-NEXT: br i1 [[TMP168]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]] 19970 // CHECK18: omp_offload.failed64: 19971 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i64 [[TMP132]], i64 [[TMP134]], i64 [[TMP1]], i32* [[VLA]]) #[[ATTR3]] 19972 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT65]] 19973 // CHECK18: omp_offload.cont65: 19974 // CHECK18-NEXT: [[TMP169:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 19975 // CHECK18-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiLi10EEiT_(i32 signext [[TMP169]]) 19976 // CHECK18-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 19977 // CHECK18-NEXT: [[TMP170:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 19978 // CHECK18-NEXT: call void @llvm.stackrestore(i8* [[TMP170]]) 19979 // CHECK18-NEXT: [[TMP171:%.*]] = load i32, i32* [[RETVAL]], align 4 19980 // CHECK18-NEXT: ret i32 [[TMP171]] 19981 // 19982 // 19983 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148 19984 // CHECK18-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 19985 // CHECK18-NEXT: entry: 19986 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 19987 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 19988 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 19989 // CHECK18-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 19990 // CHECK18-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 19991 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 19992 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 19993 // CHECK18-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 19994 // CHECK18-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 19995 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 19996 // CHECK18-NEXT: ret void 19997 // 19998 // 19999 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined. 20000 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 20001 // CHECK18-NEXT: entry: 20002 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 20003 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 20004 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 20005 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 20006 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 20007 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 20008 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 20009 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 20010 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 20011 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 20012 // CHECK18-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 20013 // CHECK18-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 20014 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 20015 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 20016 // CHECK18-NEXT: [[I3:%.*]] = alloca i32, align 4 20017 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 20018 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 20019 // CHECK18-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 20020 // CHECK18-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 20021 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 20022 // CHECK18-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 20023 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 20024 // CHECK18-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 20025 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 20026 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 20027 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 20028 // CHECK18-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 20029 // CHECK18-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 20030 // CHECK18-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 20031 // CHECK18-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 20032 // CHECK18-NEXT: store i32 0, i32* [[I]], align 4 20033 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 20034 // CHECK18-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 20035 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 20036 // CHECK18: omp.precond.then: 20037 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 20038 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20039 // CHECK18-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 20040 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 20041 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 20042 // CHECK18-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 20043 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 20044 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 20045 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20046 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20047 // CHECK18-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 20048 // CHECK18-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 20049 // CHECK18: cond.true: 20050 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20051 // CHECK18-NEXT: br label [[COND_END:%.*]] 20052 // CHECK18: cond.false: 20053 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20054 // CHECK18-NEXT: br label [[COND_END]] 20055 // CHECK18: cond.end: 20056 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 20057 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 20058 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 20059 // CHECK18-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 20060 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 20061 // CHECK18: omp.inner.for.cond: 20062 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20063 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20064 // CHECK18-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 20065 // CHECK18-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 20066 // CHECK18: omp.inner.for.body: 20067 // CHECK18-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 20068 // CHECK18-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 20069 // CHECK18-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20070 // CHECK18-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 20071 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 20072 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 20073 // CHECK18: omp.inner.for.inc: 20074 // CHECK18-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20075 // CHECK18-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 20076 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 20077 // CHECK18-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 20078 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 20079 // CHECK18: omp.inner.for.end: 20080 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 20081 // CHECK18: omp.loop.exit: 20082 // CHECK18-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 20083 // CHECK18-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 20084 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 20085 // CHECK18-NEXT: br label [[OMP_PRECOND_END]] 20086 // CHECK18: omp.precond.end: 20087 // CHECK18-NEXT: ret void 20088 // 20089 // 20090 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..1 20091 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 20092 // CHECK18-NEXT: entry: 20093 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 20094 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 20095 // CHECK18-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 20096 // CHECK18-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 20097 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 20098 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 20099 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 20100 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 20101 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 20102 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 20103 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 20104 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 20105 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 20106 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 20107 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 20108 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 20109 // CHECK18-NEXT: [[I4:%.*]] = alloca i32, align 4 20110 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 20111 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 20112 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 20113 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 20114 // CHECK18-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 20115 // CHECK18-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 20116 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 20117 // CHECK18-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 20118 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 20119 // CHECK18-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 20120 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 20121 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 20122 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 20123 // CHECK18-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 20124 // CHECK18-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 20125 // CHECK18-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 20126 // CHECK18-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 20127 // CHECK18-NEXT: store i32 0, i32* [[I]], align 4 20128 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 20129 // CHECK18-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 20130 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 20131 // CHECK18: omp.precond.then: 20132 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 20133 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20134 // CHECK18-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 20135 // CHECK18-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 20136 // CHECK18-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 20137 // CHECK18-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 20138 // CHECK18-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 20139 // CHECK18-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 20140 // CHECK18-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 20141 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 20142 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 20143 // CHECK18-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 20144 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 20145 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 20146 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 20147 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20148 // CHECK18-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 20149 // CHECK18-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 20150 // CHECK18: cond.true: 20151 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20152 // CHECK18-NEXT: br label [[COND_END:%.*]] 20153 // CHECK18: cond.false: 20154 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 20155 // CHECK18-NEXT: br label [[COND_END]] 20156 // CHECK18: cond.end: 20157 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 20158 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 20159 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 20160 // CHECK18-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 20161 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 20162 // CHECK18: omp.inner.for.cond: 20163 // CHECK18-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20164 // CHECK18-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 20165 // CHECK18-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 20166 // CHECK18-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 20167 // CHECK18: omp.inner.for.body: 20168 // CHECK18-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20169 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 20170 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 20171 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 20172 // CHECK18-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4 20173 // CHECK18-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 20174 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 20175 // CHECK18-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 20176 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 20177 // CHECK18: omp.body.continue: 20178 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 20179 // CHECK18: omp.inner.for.inc: 20180 // CHECK18-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20181 // CHECK18-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 20182 // CHECK18-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 20183 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 20184 // CHECK18: omp.inner.for.end: 20185 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 20186 // CHECK18: omp.loop.exit: 20187 // CHECK18-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 20188 // CHECK18-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 20189 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 20190 // CHECK18-NEXT: br label [[OMP_PRECOND_END]] 20191 // CHECK18: omp.precond.end: 20192 // CHECK18-NEXT: ret void 20193 // 20194 // 20195 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153 20196 // CHECK18-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 20197 // CHECK18-NEXT: entry: 20198 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 20199 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 20200 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 20201 // CHECK18-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 20202 // CHECK18-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 20203 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 20204 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 20205 // CHECK18-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 20206 // CHECK18-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 20207 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 20208 // CHECK18-NEXT: ret void 20209 // 20210 // 20211 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..2 20212 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 20213 // CHECK18-NEXT: entry: 20214 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 20215 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 20216 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 20217 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 20218 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 20219 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 20220 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 20221 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 20222 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 20223 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 20224 // CHECK18-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 20225 // CHECK18-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 20226 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 20227 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 20228 // CHECK18-NEXT: [[I3:%.*]] = alloca i32, align 4 20229 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 20230 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 20231 // CHECK18-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 20232 // CHECK18-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 20233 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 20234 // CHECK18-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 20235 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 20236 // CHECK18-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 20237 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 20238 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 20239 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 20240 // CHECK18-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 20241 // CHECK18-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 20242 // CHECK18-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 20243 // CHECK18-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 20244 // CHECK18-NEXT: store i32 0, i32* [[I]], align 4 20245 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 20246 // CHECK18-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 20247 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 20248 // CHECK18: omp.precond.then: 20249 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 20250 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20251 // CHECK18-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 20252 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 20253 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 20254 // CHECK18-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 20255 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 20256 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 20257 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20258 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20259 // CHECK18-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 20260 // CHECK18-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 20261 // CHECK18: cond.true: 20262 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20263 // CHECK18-NEXT: br label [[COND_END:%.*]] 20264 // CHECK18: cond.false: 20265 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20266 // CHECK18-NEXT: br label [[COND_END]] 20267 // CHECK18: cond.end: 20268 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 20269 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 20270 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 20271 // CHECK18-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 20272 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 20273 // CHECK18: omp.inner.for.cond: 20274 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20275 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20276 // CHECK18-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 20277 // CHECK18-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 20278 // CHECK18: omp.inner.for.body: 20279 // CHECK18-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 20280 // CHECK18-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 20281 // CHECK18-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20282 // CHECK18-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 20283 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 20284 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 20285 // CHECK18: omp.inner.for.inc: 20286 // CHECK18-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20287 // CHECK18-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 20288 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 20289 // CHECK18-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 20290 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 20291 // CHECK18: omp.inner.for.end: 20292 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 20293 // CHECK18: omp.loop.exit: 20294 // CHECK18-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 20295 // CHECK18-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 20296 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 20297 // CHECK18-NEXT: br label [[OMP_PRECOND_END]] 20298 // CHECK18: omp.precond.end: 20299 // CHECK18-NEXT: ret void 20300 // 20301 // 20302 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..3 20303 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 20304 // CHECK18-NEXT: entry: 20305 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 20306 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 20307 // CHECK18-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 20308 // CHECK18-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 20309 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 20310 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 20311 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 20312 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 20313 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 20314 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 20315 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 20316 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 20317 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 20318 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 20319 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 20320 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 20321 // CHECK18-NEXT: [[I4:%.*]] = alloca i32, align 4 20322 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 20323 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 20324 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 20325 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 20326 // CHECK18-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 20327 // CHECK18-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 20328 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 20329 // CHECK18-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 20330 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 20331 // CHECK18-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 20332 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 20333 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 20334 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 20335 // CHECK18-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 20336 // CHECK18-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 20337 // CHECK18-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 20338 // CHECK18-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 20339 // CHECK18-NEXT: store i32 0, i32* [[I]], align 4 20340 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 20341 // CHECK18-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 20342 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 20343 // CHECK18: omp.precond.then: 20344 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 20345 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20346 // CHECK18-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 20347 // CHECK18-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 20348 // CHECK18-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 20349 // CHECK18-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 20350 // CHECK18-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 20351 // CHECK18-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 20352 // CHECK18-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 20353 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 20354 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 20355 // CHECK18-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 20356 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 20357 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 20358 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 20359 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20360 // CHECK18-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 20361 // CHECK18-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 20362 // CHECK18: cond.true: 20363 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20364 // CHECK18-NEXT: br label [[COND_END:%.*]] 20365 // CHECK18: cond.false: 20366 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 20367 // CHECK18-NEXT: br label [[COND_END]] 20368 // CHECK18: cond.end: 20369 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 20370 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 20371 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 20372 // CHECK18-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 20373 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 20374 // CHECK18: omp.inner.for.cond: 20375 // CHECK18-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20376 // CHECK18-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 20377 // CHECK18-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 20378 // CHECK18-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 20379 // CHECK18: omp.inner.for.body: 20380 // CHECK18-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20381 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 20382 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 20383 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 20384 // CHECK18-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4 20385 // CHECK18-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 20386 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 20387 // CHECK18-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 20388 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 20389 // CHECK18: omp.body.continue: 20390 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 20391 // CHECK18: omp.inner.for.inc: 20392 // CHECK18-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20393 // CHECK18-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 20394 // CHECK18-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 20395 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 20396 // CHECK18: omp.inner.for.end: 20397 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 20398 // CHECK18: omp.loop.exit: 20399 // CHECK18-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 20400 // CHECK18-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 20401 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 20402 // CHECK18-NEXT: br label [[OMP_PRECOND_END]] 20403 // CHECK18: omp.precond.end: 20404 // CHECK18-NEXT: ret void 20405 // 20406 // 20407 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158 20408 // CHECK18-SAME: (i64 [[M:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 20409 // CHECK18-NEXT: entry: 20410 // CHECK18-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 20411 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 20412 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 20413 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 20414 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 20415 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 20416 // CHECK18-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 20417 // CHECK18-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 20418 // CHECK18-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 20419 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 20420 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* 20421 // CHECK18-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 20422 // CHECK18-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 20423 // CHECK18-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 20424 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8 20425 // CHECK18-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 20426 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 20427 // CHECK18-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 20428 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4 20429 // CHECK18-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 20430 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]]) 20431 // CHECK18-NEXT: ret void 20432 // 20433 // 20434 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..5 20435 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 20436 // CHECK18-NEXT: entry: 20437 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 20438 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 20439 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 20440 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 20441 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 20442 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 20443 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 20444 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 20445 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 20446 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 20447 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 20448 // CHECK18-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 20449 // CHECK18-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 20450 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 20451 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 20452 // CHECK18-NEXT: [[I4:%.*]] = alloca i32, align 4 20453 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 20454 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 20455 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 20456 // CHECK18-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 20457 // CHECK18-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 20458 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 20459 // CHECK18-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 20460 // CHECK18-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 20461 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 20462 // CHECK18-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 20463 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 20464 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 20465 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 20466 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20467 // CHECK18-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 20468 // CHECK18-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 20469 // CHECK18-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 20470 // CHECK18-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 20471 // CHECK18-NEXT: store i32 0, i32* [[I]], align 4 20472 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20473 // CHECK18-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 20474 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 20475 // CHECK18: omp.precond.then: 20476 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 20477 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 20478 // CHECK18-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 20479 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 20480 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 20481 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[CONV]], align 8 20482 // CHECK18-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 20483 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 20484 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]]) 20485 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20486 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 20487 // CHECK18-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 20488 // CHECK18-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 20489 // CHECK18: cond.true: 20490 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 20491 // CHECK18-NEXT: br label [[COND_END:%.*]] 20492 // CHECK18: cond.false: 20493 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20494 // CHECK18-NEXT: br label [[COND_END]] 20495 // CHECK18: cond.end: 20496 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 20497 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 20498 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 20499 // CHECK18-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 20500 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 20501 // CHECK18: omp.inner.for.cond: 20502 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20503 // CHECK18-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 20504 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1 20505 // CHECK18-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]] 20506 // CHECK18-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 20507 // CHECK18: omp.inner.for.body: 20508 // CHECK18-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 20509 // CHECK18-NEXT: [[TMP18:%.*]] = zext i32 [[TMP17]] to i64 20510 // CHECK18-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20511 // CHECK18-NEXT: [[TMP20:%.*]] = zext i32 [[TMP19]] to i64 20512 // CHECK18-NEXT: [[TMP21:%.*]] = load i32, i32* [[CONV]], align 8 20513 // CHECK18-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 20514 // CHECK18-NEXT: store i32 [[TMP21]], i32* [[CONV7]], align 4 20515 // CHECK18-NEXT: [[TMP22:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 20516 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i64 [[TMP18]], i64 [[TMP20]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP22]]) 20517 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 20518 // CHECK18: omp.inner.for.inc: 20519 // CHECK18-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20520 // CHECK18-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 20521 // CHECK18-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 20522 // CHECK18-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 20523 // CHECK18-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 20524 // CHECK18-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 20525 // CHECK18-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 20526 // CHECK18-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_LB]], align 4 20527 // CHECK18-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20528 // CHECK18-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 20529 // CHECK18-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP27]], [[TMP28]] 20530 // CHECK18-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_COMB_UB]], align 4 20531 // CHECK18-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20532 // CHECK18-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 20533 // CHECK18-NEXT: [[CMP11:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]] 20534 // CHECK18-NEXT: br i1 [[CMP11]], label [[COND_TRUE12:%.*]], label [[COND_FALSE13:%.*]] 20535 // CHECK18: cond.true12: 20536 // CHECK18-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 20537 // CHECK18-NEXT: br label [[COND_END14:%.*]] 20538 // CHECK18: cond.false13: 20539 // CHECK18-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20540 // CHECK18-NEXT: br label [[COND_END14]] 20541 // CHECK18: cond.end14: 20542 // CHECK18-NEXT: [[COND15:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE12]] ], [ [[TMP32]], [[COND_FALSE13]] ] 20543 // CHECK18-NEXT: store i32 [[COND15]], i32* [[DOTOMP_COMB_UB]], align 4 20544 // CHECK18-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 20545 // CHECK18-NEXT: store i32 [[TMP33]], i32* [[DOTOMP_IV]], align 4 20546 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 20547 // CHECK18: omp.inner.for.end: 20548 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 20549 // CHECK18: omp.loop.exit: 20550 // CHECK18-NEXT: [[TMP34:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 20551 // CHECK18-NEXT: [[TMP35:%.*]] = load i32, i32* [[TMP34]], align 4 20552 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP35]]) 20553 // CHECK18-NEXT: br label [[OMP_PRECOND_END]] 20554 // CHECK18: omp.precond.end: 20555 // CHECK18-NEXT: ret void 20556 // 20557 // 20558 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..6 20559 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 20560 // CHECK18-NEXT: entry: 20561 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 20562 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 20563 // CHECK18-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 20564 // CHECK18-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 20565 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 20566 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 20567 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 20568 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 20569 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 20570 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 20571 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 20572 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 20573 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 20574 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 20575 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 20576 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 20577 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 20578 // CHECK18-NEXT: [[I6:%.*]] = alloca i32, align 4 20579 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 20580 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 20581 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 20582 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 20583 // CHECK18-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 20584 // CHECK18-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 20585 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 20586 // CHECK18-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 20587 // CHECK18-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 20588 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 20589 // CHECK18-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 20590 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 20591 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 20592 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 20593 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20594 // CHECK18-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 20595 // CHECK18-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 20596 // CHECK18-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 20597 // CHECK18-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 20598 // CHECK18-NEXT: store i32 0, i32* [[I]], align 4 20599 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20600 // CHECK18-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 20601 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 20602 // CHECK18: omp.precond.then: 20603 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 20604 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 20605 // CHECK18-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 20606 // CHECK18-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 20607 // CHECK18-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32 20608 // CHECK18-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 20609 // CHECK18-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32 20610 // CHECK18-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 20611 // CHECK18-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 20612 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 20613 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 20614 // CHECK18-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 20615 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 20616 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 20617 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 20618 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 20619 // CHECK18-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 20620 // CHECK18-NEXT: br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 20621 // CHECK18: cond.true: 20622 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 20623 // CHECK18-NEXT: br label [[COND_END:%.*]] 20624 // CHECK18: cond.false: 20625 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 20626 // CHECK18-NEXT: br label [[COND_END]] 20627 // CHECK18: cond.end: 20628 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 20629 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 20630 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 20631 // CHECK18-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 20632 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 20633 // CHECK18: omp.inner.for.cond: 20634 // CHECK18-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20635 // CHECK18-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 20636 // CHECK18-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 20637 // CHECK18-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 20638 // CHECK18: omp.inner.for.body: 20639 // CHECK18-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20640 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 20641 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 20642 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I6]], align 4 20643 // CHECK18-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4 20644 // CHECK18-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 20645 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 20646 // CHECK18-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 20647 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 20648 // CHECK18: omp.body.continue: 20649 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 20650 // CHECK18: omp.inner.for.inc: 20651 // CHECK18-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20652 // CHECK18-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1 20653 // CHECK18-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 20654 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 20655 // CHECK18: omp.inner.for.end: 20656 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 20657 // CHECK18: omp.loop.exit: 20658 // CHECK18-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 20659 // CHECK18-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 20660 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 20661 // CHECK18-NEXT: br label [[OMP_PRECOND_END]] 20662 // CHECK18: omp.precond.end: 20663 // CHECK18-NEXT: ret void 20664 // 20665 // 20666 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163 20667 // CHECK18-SAME: (i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 20668 // CHECK18-NEXT: entry: 20669 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 20670 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 20671 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 20672 // CHECK18-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 20673 // CHECK18-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 20674 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 20675 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[N_ADDR]] to i32* 20676 // CHECK18-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 20677 // CHECK18-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 20678 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[CONV]], i64 [[TMP0]], i32* [[TMP1]]) 20679 // CHECK18-NEXT: ret void 20680 // 20681 // 20682 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..8 20683 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 20684 // CHECK18-NEXT: entry: 20685 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 20686 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 20687 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 20688 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 20689 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 20690 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 20691 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 20692 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 20693 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 20694 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 20695 // CHECK18-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 20696 // CHECK18-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 20697 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 20698 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 20699 // CHECK18-NEXT: [[I3:%.*]] = alloca i32, align 4 20700 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 20701 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 20702 // CHECK18-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 20703 // CHECK18-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 20704 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 20705 // CHECK18-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 20706 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 20707 // CHECK18-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 20708 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 20709 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 20710 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 20711 // CHECK18-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 20712 // CHECK18-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 20713 // CHECK18-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 20714 // CHECK18-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 20715 // CHECK18-NEXT: store i32 0, i32* [[I]], align 4 20716 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 20717 // CHECK18-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 20718 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 20719 // CHECK18: omp.precond.then: 20720 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 20721 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20722 // CHECK18-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 20723 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 20724 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 20725 // CHECK18-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 20726 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 20727 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 20728 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20729 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20730 // CHECK18-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 20731 // CHECK18-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 20732 // CHECK18: cond.true: 20733 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20734 // CHECK18-NEXT: br label [[COND_END:%.*]] 20735 // CHECK18: cond.false: 20736 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20737 // CHECK18-NEXT: br label [[COND_END]] 20738 // CHECK18: cond.end: 20739 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 20740 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 20741 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 20742 // CHECK18-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 20743 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 20744 // CHECK18: omp.inner.for.cond: 20745 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20746 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20747 // CHECK18-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 20748 // CHECK18-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 20749 // CHECK18: omp.inner.for.body: 20750 // CHECK18-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 20751 // CHECK18-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 20752 // CHECK18-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20753 // CHECK18-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 20754 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]]) 20755 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 20756 // CHECK18: omp.inner.for.inc: 20757 // CHECK18-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20758 // CHECK18-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 20759 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 20760 // CHECK18-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 20761 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 20762 // CHECK18: omp.inner.for.end: 20763 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 20764 // CHECK18: omp.loop.exit: 20765 // CHECK18-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 20766 // CHECK18-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 20767 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 20768 // CHECK18-NEXT: br label [[OMP_PRECOND_END]] 20769 // CHECK18: omp.precond.end: 20770 // CHECK18-NEXT: ret void 20771 // 20772 // 20773 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..9 20774 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 20775 // CHECK18-NEXT: entry: 20776 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 20777 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 20778 // CHECK18-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 20779 // CHECK18-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 20780 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 20781 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 20782 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 20783 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 20784 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 20785 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 20786 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 20787 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 20788 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 20789 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 20790 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 20791 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 20792 // CHECK18-NEXT: [[I4:%.*]] = alloca i32, align 4 20793 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 20794 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 20795 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 20796 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 20797 // CHECK18-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 20798 // CHECK18-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 20799 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 20800 // CHECK18-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 20801 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 20802 // CHECK18-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 20803 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 20804 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 20805 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 20806 // CHECK18-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 20807 // CHECK18-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 20808 // CHECK18-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 20809 // CHECK18-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 20810 // CHECK18-NEXT: store i32 0, i32* [[I]], align 4 20811 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 20812 // CHECK18-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 20813 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 20814 // CHECK18: omp.precond.then: 20815 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 20816 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20817 // CHECK18-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 20818 // CHECK18-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 20819 // CHECK18-NEXT: [[CONV:%.*]] = trunc i64 [[TMP7]] to i32 20820 // CHECK18-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 20821 // CHECK18-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32 20822 // CHECK18-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 20823 // CHECK18-NEXT: store i32 [[CONV3]], i32* [[DOTOMP_UB]], align 4 20824 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 20825 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 20826 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 20827 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 20828 // CHECK18-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 20829 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 20830 // CHECK18-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1) 20831 // CHECK18-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 20832 // CHECK18: omp.dispatch.cond: 20833 // CHECK18-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 20834 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 20835 // CHECK18-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 20836 // CHECK18-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 20837 // CHECK18-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 20838 // CHECK18: omp.dispatch.body: 20839 // CHECK18-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 20840 // CHECK18-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 20841 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 20842 // CHECK18: omp.inner.for.cond: 20843 // CHECK18-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 20844 // CHECK18-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !14 20845 // CHECK18-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 20846 // CHECK18-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 20847 // CHECK18: omp.inner.for.body: 20848 // CHECK18-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 20849 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 20850 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 20851 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !14 20852 // CHECK18-NEXT: [[TMP20:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !14 20853 // CHECK18-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64 20854 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 20855 // CHECK18-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !14 20856 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 20857 // CHECK18: omp.body.continue: 20858 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 20859 // CHECK18: omp.inner.for.inc: 20860 // CHECK18-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 20861 // CHECK18-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1 20862 // CHECK18-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !14 20863 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] 20864 // CHECK18: omp.inner.for.end: 20865 // CHECK18-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 20866 // CHECK18: omp.dispatch.inc: 20867 // CHECK18-NEXT: br label [[OMP_DISPATCH_COND]] 20868 // CHECK18: omp.dispatch.end: 20869 // CHECK18-NEXT: br label [[OMP_PRECOND_END]] 20870 // CHECK18: omp.precond.end: 20871 // CHECK18-NEXT: ret void 20872 // 20873 // 20874 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168 20875 // CHECK18-SAME: (i64 [[M:%.*]], i64 [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 20876 // CHECK18-NEXT: entry: 20877 // CHECK18-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 20878 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8 20879 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 20880 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 20881 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 20882 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 20883 // CHECK18-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 20884 // CHECK18-NEXT: store i64 [[N]], i64* [[N_ADDR]], align 8 20885 // CHECK18-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 20886 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 20887 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* 20888 // CHECK18-NEXT: [[CONV1:%.*]] = bitcast i64* [[N_ADDR]] to i32* 20889 // CHECK18-NEXT: [[TMP0:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 20890 // CHECK18-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 8 20891 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[CONV]], align 8 20892 // CHECK18-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 20893 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 20894 // CHECK18-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 20895 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[CONV2]], align 4 20896 // CHECK18-NEXT: [[TMP4:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 20897 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i64, i32*, i64)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32* [[CONV1]], i64 [[TMP0]], i32* [[TMP1]], i64 [[TMP4]]) 20898 // CHECK18-NEXT: ret void 20899 // 20900 // 20901 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..11 20902 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 20903 // CHECK18-NEXT: entry: 20904 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 20905 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 20906 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 20907 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 20908 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 20909 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 20910 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 20911 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 20912 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 20913 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 20914 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 20915 // CHECK18-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 20916 // CHECK18-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 20917 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 20918 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 20919 // CHECK18-NEXT: [[I4:%.*]] = alloca i32, align 4 20920 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 20921 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 20922 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 20923 // CHECK18-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 20924 // CHECK18-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 20925 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 20926 // CHECK18-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 20927 // CHECK18-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 20928 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 20929 // CHECK18-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 20930 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 20931 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 20932 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 20933 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20934 // CHECK18-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 20935 // CHECK18-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 20936 // CHECK18-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 20937 // CHECK18-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 20938 // CHECK18-NEXT: store i32 0, i32* [[I]], align 4 20939 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 20940 // CHECK18-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 20941 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 20942 // CHECK18: omp.precond.then: 20943 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 20944 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 20945 // CHECK18-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 20946 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 20947 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 20948 // CHECK18-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 20949 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 20950 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 20951 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20952 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 20953 // CHECK18-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 20954 // CHECK18-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 20955 // CHECK18: cond.true: 20956 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 20957 // CHECK18-NEXT: br label [[COND_END:%.*]] 20958 // CHECK18: cond.false: 20959 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20960 // CHECK18-NEXT: br label [[COND_END]] 20961 // CHECK18: cond.end: 20962 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 20963 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 20964 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 20965 // CHECK18-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 20966 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 20967 // CHECK18: omp.inner.for.cond: 20968 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20969 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20970 // CHECK18-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 20971 // CHECK18-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 20972 // CHECK18: omp.inner.for.body: 20973 // CHECK18-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 20974 // CHECK18-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 20975 // CHECK18-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 20976 // CHECK18-NEXT: [[TMP19:%.*]] = zext i32 [[TMP18]] to i64 20977 // CHECK18-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV]], align 8 20978 // CHECK18-NEXT: [[CONV7:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 20979 // CHECK18-NEXT: store i32 [[TMP20]], i32* [[CONV7]], align 4 20980 // CHECK18-NEXT: [[TMP21:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 20981 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*, i64, i32*, i64)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i64 [[TMP17]], i64 [[TMP19]], i32* [[TMP0]], i64 [[TMP1]], i32* [[TMP2]], i64 [[TMP21]]) 20982 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 20983 // CHECK18: omp.inner.for.inc: 20984 // CHECK18-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 20985 // CHECK18-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 20986 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] 20987 // CHECK18-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 20988 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 20989 // CHECK18: omp.inner.for.end: 20990 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 20991 // CHECK18: omp.loop.exit: 20992 // CHECK18-NEXT: [[TMP24:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 20993 // CHECK18-NEXT: [[TMP25:%.*]] = load i32, i32* [[TMP24]], align 4 20994 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP25]]) 20995 // CHECK18-NEXT: br label [[OMP_PRECOND_END]] 20996 // CHECK18: omp.precond.end: 20997 // CHECK18-NEXT: ret void 20998 // 20999 // 21000 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..12 21001 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i64 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 21002 // CHECK18-NEXT: entry: 21003 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 21004 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 21005 // CHECK18-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 21006 // CHECK18-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 21007 // CHECK18-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 8 21008 // CHECK18-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8 21009 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 8 21010 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 21011 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 21012 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 21013 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 21014 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 21015 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 21016 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 21017 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 21018 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 21019 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 21020 // CHECK18-NEXT: [[I6:%.*]] = alloca i32, align 4 21021 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 21022 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 21023 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 21024 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 21025 // CHECK18-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 8 21026 // CHECK18-NEXT: store i64 [[VLA]], i64* [[VLA_ADDR]], align 8 21027 // CHECK18-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 8 21028 // CHECK18-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 21029 // CHECK18-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 8 21030 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[VLA_ADDR]], align 8 21031 // CHECK18-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 8 21032 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 21033 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 21034 // CHECK18-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 21035 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 21036 // CHECK18-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 21037 // CHECK18-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 21038 // CHECK18-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 21039 // CHECK18-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 21040 // CHECK18-NEXT: store i32 0, i32* [[I]], align 4 21041 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 21042 // CHECK18-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 21043 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 21044 // CHECK18: omp.precond.then: 21045 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 21046 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 21047 // CHECK18-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 21048 // CHECK18-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 21049 // CHECK18-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32 21050 // CHECK18-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 21051 // CHECK18-NEXT: [[CONV5:%.*]] = trunc i64 [[TMP8]] to i32 21052 // CHECK18-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_LB]], align 4 21053 // CHECK18-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 21054 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 21055 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 21056 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[CONV]], align 8 21057 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 21058 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 21059 // CHECK18-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 21060 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 21061 // CHECK18-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]]) 21062 // CHECK18-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 21063 // CHECK18: omp.dispatch.cond: 21064 // CHECK18-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 21065 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 21066 // CHECK18-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 21067 // CHECK18-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 21068 // CHECK18-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 21069 // CHECK18: omp.dispatch.body: 21070 // CHECK18-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 21071 // CHECK18-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 21072 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 21073 // CHECK18: omp.inner.for.cond: 21074 // CHECK18-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 21075 // CHECK18-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !17 21076 // CHECK18-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 21077 // CHECK18-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 21078 // CHECK18: omp.inner.for.body: 21079 // CHECK18-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 21080 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 21081 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 21082 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group !17 21083 // CHECK18-NEXT: [[TMP21:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !17 21084 // CHECK18-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64 21085 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i64 [[IDXPROM]] 21086 // CHECK18-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !17 21087 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 21088 // CHECK18: omp.body.continue: 21089 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 21090 // CHECK18: omp.inner.for.inc: 21091 // CHECK18-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 21092 // CHECK18-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP22]], 1 21093 // CHECK18-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !17 21094 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]] 21095 // CHECK18: omp.inner.for.end: 21096 // CHECK18-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 21097 // CHECK18: omp.dispatch.inc: 21098 // CHECK18-NEXT: br label [[OMP_DISPATCH_COND]] 21099 // CHECK18: omp.dispatch.end: 21100 // CHECK18-NEXT: br label [[OMP_PRECOND_END]] 21101 // CHECK18: omp.precond.end: 21102 // CHECK18-NEXT: ret void 21103 // 21104 // 21105 // CHECK18-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 21106 // CHECK18-SAME: (i32 signext [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat { 21107 // CHECK18-NEXT: entry: 21108 // CHECK18-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 21109 // CHECK18-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 21110 // CHECK18-NEXT: [[M:%.*]] = alloca i32, align 4 21111 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 21112 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 21113 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 21114 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 21115 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 8 21116 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 8 21117 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 8 21118 // CHECK18-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 21119 // CHECK18-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8 21120 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 8 21121 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 8 21122 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 8 21123 // CHECK18-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 21124 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 8 21125 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 8 21126 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 8 21127 // CHECK18-NEXT: [[_TMP16:%.*]] = alloca i32, align 4 21128 // CHECK18-NEXT: [[M_CASTED19:%.*]] = alloca i64, align 8 21129 // CHECK18-NEXT: [[DOTOFFLOAD_BASEPTRS21:%.*]] = alloca [2 x i8*], align 8 21130 // CHECK18-NEXT: [[DOTOFFLOAD_PTRS22:%.*]] = alloca [2 x i8*], align 8 21131 // CHECK18-NEXT: [[DOTOFFLOAD_MAPPERS23:%.*]] = alloca [2 x i8*], align 8 21132 // CHECK18-NEXT: [[_TMP24:%.*]] = alloca i32, align 4 21133 // CHECK18-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 21134 // CHECK18-NEXT: store i32 10, i32* [[M]], align 4 21135 // CHECK18-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 21136 // CHECK18-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 21137 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 8 21138 // CHECK18-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 21139 // CHECK18-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 21140 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 8 21141 // CHECK18-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 21142 // CHECK18-NEXT: store i8* null, i8** [[TMP4]], align 8 21143 // CHECK18-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 21144 // CHECK18-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 21145 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 21146 // CHECK18-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 21147 // CHECK18-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 21148 // CHECK18-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 21149 // CHECK18: omp_offload.failed: 21150 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]] 21151 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT]] 21152 // CHECK18: omp_offload.cont: 21153 // CHECK18-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 21154 // CHECK18-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** 21155 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 8 21156 // CHECK18-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 21157 // CHECK18-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** 21158 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 8 21159 // CHECK18-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0 21160 // CHECK18-NEXT: store i8* null, i8** [[TMP13]], align 8 21161 // CHECK18-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 21162 // CHECK18-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 21163 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 21164 // CHECK18-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 21165 // CHECK18-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 21166 // CHECK18-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 21167 // CHECK18: omp_offload.failed5: 21168 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121([10 x i32]* [[A]]) #[[ATTR3]] 21169 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT6]] 21170 // CHECK18: omp_offload.cont6: 21171 // CHECK18-NEXT: [[TMP18:%.*]] = load i32, i32* [[M]], align 4 21172 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[M_CASTED]] to i32* 21173 // CHECK18-NEXT: store i32 [[TMP18]], i32* [[CONV]], align 4 21174 // CHECK18-NEXT: [[TMP19:%.*]] = load i64, i64* [[M_CASTED]], align 8 21175 // CHECK18-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 21176 // CHECK18-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i64* 21177 // CHECK18-NEXT: store i64 [[TMP19]], i64* [[TMP21]], align 8 21178 // CHECK18-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 21179 // CHECK18-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i64* 21180 // CHECK18-NEXT: store i64 [[TMP19]], i64* [[TMP23]], align 8 21181 // CHECK18-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 0 21182 // CHECK18-NEXT: store i8* null, i8** [[TMP24]], align 8 21183 // CHECK18-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1 21184 // CHECK18-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]** 21185 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 8 21186 // CHECK18-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1 21187 // CHECK18-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]** 21188 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 8 21189 // CHECK18-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i64 0, i64 1 21190 // CHECK18-NEXT: store i8* null, i8** [[TMP29]], align 8 21191 // CHECK18-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 21192 // CHECK18-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 21193 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 21194 // CHECK18-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 21195 // CHECK18-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 21196 // CHECK18-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] 21197 // CHECK18: omp_offload.failed11: 21198 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i64 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]] 21199 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT12]] 21200 // CHECK18: omp_offload.cont12: 21201 // CHECK18-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 21202 // CHECK18-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]** 21203 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 8 21204 // CHECK18-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 21205 // CHECK18-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]** 21206 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 8 21207 // CHECK18-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i64 0, i64 0 21208 // CHECK18-NEXT: store i8* null, i8** [[TMP38]], align 8 21209 // CHECK18-NEXT: [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 21210 // CHECK18-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 21211 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 21212 // CHECK18-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 21213 // CHECK18-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0 21214 // CHECK18-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]] 21215 // CHECK18: omp_offload.failed17: 21216 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131([10 x i32]* [[A]]) #[[ATTR3]] 21217 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT18]] 21218 // CHECK18: omp_offload.cont18: 21219 // CHECK18-NEXT: [[TMP43:%.*]] = load i32, i32* [[M]], align 4 21220 // CHECK18-NEXT: [[CONV20:%.*]] = bitcast i64* [[M_CASTED19]] to i32* 21221 // CHECK18-NEXT: store i32 [[TMP43]], i32* [[CONV20]], align 4 21222 // CHECK18-NEXT: [[TMP44:%.*]] = load i64, i64* [[M_CASTED19]], align 8 21223 // CHECK18-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 21224 // CHECK18-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i64* 21225 // CHECK18-NEXT: store i64 [[TMP44]], i64* [[TMP46]], align 8 21226 // CHECK18-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 21227 // CHECK18-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i64* 21228 // CHECK18-NEXT: store i64 [[TMP44]], i64* [[TMP48]], align 8 21229 // CHECK18-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 0 21230 // CHECK18-NEXT: store i8* null, i8** [[TMP49]], align 8 21231 // CHECK18-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 1 21232 // CHECK18-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]** 21233 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 8 21234 // CHECK18-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 1 21235 // CHECK18-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]** 21236 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 8 21237 // CHECK18-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS23]], i64 0, i64 1 21238 // CHECK18-NEXT: store i8* null, i8** [[TMP54]], align 8 21239 // CHECK18-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS21]], i32 0, i32 0 21240 // CHECK18-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS22]], i32 0, i32 0 21241 // CHECK18-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 21242 // CHECK18-NEXT: [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 21243 // CHECK18-NEXT: [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0 21244 // CHECK18-NEXT: br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED25:%.*]], label [[OMP_OFFLOAD_CONT26:%.*]] 21245 // CHECK18: omp_offload.failed25: 21246 // CHECK18-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i64 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]] 21247 // CHECK18-NEXT: br label [[OMP_OFFLOAD_CONT26]] 21248 // CHECK18: omp_offload.cont26: 21249 // CHECK18-NEXT: ret i32 0 21250 // 21251 // 21252 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116 21253 // CHECK18-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 21254 // CHECK18-NEXT: entry: 21255 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 21256 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 21257 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 21258 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 21259 // CHECK18-NEXT: ret void 21260 // 21261 // 21262 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..14 21263 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 21264 // CHECK18-NEXT: entry: 21265 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 21266 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 21267 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 21268 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 21269 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 21270 // CHECK18-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 21271 // CHECK18-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 21272 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 21273 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 21274 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 21275 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 21276 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 21277 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 21278 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 21279 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 21280 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 21281 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 21282 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 21283 // CHECK18-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 21284 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 21285 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 21286 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21287 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 21288 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 21289 // CHECK18: cond.true: 21290 // CHECK18-NEXT: br label [[COND_END:%.*]] 21291 // CHECK18: cond.false: 21292 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21293 // CHECK18-NEXT: br label [[COND_END]] 21294 // CHECK18: cond.end: 21295 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 21296 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 21297 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 21298 // CHECK18-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 21299 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 21300 // CHECK18: omp.inner.for.cond: 21301 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21302 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21303 // CHECK18-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 21304 // CHECK18-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 21305 // CHECK18: omp.inner.for.body: 21306 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 21307 // CHECK18-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 21308 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21309 // CHECK18-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 21310 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]) 21311 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 21312 // CHECK18: omp.inner.for.inc: 21313 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21314 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 21315 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 21316 // CHECK18-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 21317 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 21318 // CHECK18: omp.inner.for.end: 21319 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 21320 // CHECK18: omp.loop.exit: 21321 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 21322 // CHECK18-NEXT: ret void 21323 // 21324 // 21325 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..15 21326 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 21327 // CHECK18-NEXT: entry: 21328 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 21329 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 21330 // CHECK18-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 21331 // CHECK18-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 21332 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 21333 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 21334 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 21335 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 21336 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 21337 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 21338 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 21339 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 21340 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 21341 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 21342 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 21343 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 21344 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 21345 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 21346 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 21347 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 21348 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 21349 // CHECK18-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 21350 // CHECK18-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 21351 // CHECK18-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 21352 // CHECK18-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 21353 // CHECK18-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 21354 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 21355 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 21356 // CHECK18-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 21357 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 21358 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 21359 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 21360 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 21361 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 21362 // CHECK18: cond.true: 21363 // CHECK18-NEXT: br label [[COND_END:%.*]] 21364 // CHECK18: cond.false: 21365 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 21366 // CHECK18-NEXT: br label [[COND_END]] 21367 // CHECK18: cond.end: 21368 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 21369 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 21370 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 21371 // CHECK18-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 21372 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 21373 // CHECK18: omp.inner.for.cond: 21374 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21375 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 21376 // CHECK18-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 21377 // CHECK18-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 21378 // CHECK18: omp.inner.for.body: 21379 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21380 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 21381 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 21382 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I]], align 4 21383 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 21384 // CHECK18-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 21385 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 21386 // CHECK18-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 21387 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 21388 // CHECK18: omp.body.continue: 21389 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 21390 // CHECK18: omp.inner.for.inc: 21391 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21392 // CHECK18-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 21393 // CHECK18-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 21394 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 21395 // CHECK18: omp.inner.for.end: 21396 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 21397 // CHECK18: omp.loop.exit: 21398 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 21399 // CHECK18-NEXT: ret void 21400 // 21401 // 21402 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121 21403 // CHECK18-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 21404 // CHECK18-NEXT: entry: 21405 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 21406 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 21407 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 21408 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 21409 // CHECK18-NEXT: ret void 21410 // 21411 // 21412 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..17 21413 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 21414 // CHECK18-NEXT: entry: 21415 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 21416 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 21417 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 21418 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 21419 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 21420 // CHECK18-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 21421 // CHECK18-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 21422 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 21423 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 21424 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 21425 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 21426 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 21427 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 21428 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 21429 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 21430 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 21431 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 21432 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 21433 // CHECK18-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 21434 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 21435 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 21436 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21437 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 21438 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 21439 // CHECK18: cond.true: 21440 // CHECK18-NEXT: br label [[COND_END:%.*]] 21441 // CHECK18: cond.false: 21442 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21443 // CHECK18-NEXT: br label [[COND_END]] 21444 // CHECK18: cond.end: 21445 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 21446 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 21447 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 21448 // CHECK18-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 21449 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 21450 // CHECK18: omp.inner.for.cond: 21451 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21452 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21453 // CHECK18-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 21454 // CHECK18-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 21455 // CHECK18: omp.inner.for.body: 21456 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 21457 // CHECK18-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 21458 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21459 // CHECK18-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 21460 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]) 21461 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 21462 // CHECK18: omp.inner.for.inc: 21463 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21464 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 21465 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 21466 // CHECK18-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 21467 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 21468 // CHECK18: omp.inner.for.end: 21469 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 21470 // CHECK18: omp.loop.exit: 21471 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 21472 // CHECK18-NEXT: ret void 21473 // 21474 // 21475 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..18 21476 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 21477 // CHECK18-NEXT: entry: 21478 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 21479 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 21480 // CHECK18-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 21481 // CHECK18-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 21482 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 21483 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 21484 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 21485 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 21486 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 21487 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 21488 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 21489 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 21490 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 21491 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 21492 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 21493 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 21494 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 21495 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 21496 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 21497 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 21498 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 21499 // CHECK18-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 21500 // CHECK18-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 21501 // CHECK18-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 21502 // CHECK18-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 21503 // CHECK18-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 21504 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 21505 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 21506 // CHECK18-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 21507 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 21508 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 21509 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 21510 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 21511 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 21512 // CHECK18: cond.true: 21513 // CHECK18-NEXT: br label [[COND_END:%.*]] 21514 // CHECK18: cond.false: 21515 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 21516 // CHECK18-NEXT: br label [[COND_END]] 21517 // CHECK18: cond.end: 21518 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 21519 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 21520 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 21521 // CHECK18-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 21522 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 21523 // CHECK18: omp.inner.for.cond: 21524 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21525 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 21526 // CHECK18-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 21527 // CHECK18-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 21528 // CHECK18: omp.inner.for.body: 21529 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21530 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 21531 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 21532 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I]], align 4 21533 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 21534 // CHECK18-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64 21535 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 21536 // CHECK18-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 21537 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 21538 // CHECK18: omp.body.continue: 21539 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 21540 // CHECK18: omp.inner.for.inc: 21541 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21542 // CHECK18-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1 21543 // CHECK18-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 21544 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 21545 // CHECK18: omp.inner.for.end: 21546 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 21547 // CHECK18: omp.loop.exit: 21548 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 21549 // CHECK18-NEXT: ret void 21550 // 21551 // 21552 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126 21553 // CHECK18-SAME: (i64 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 21554 // CHECK18-NEXT: entry: 21555 // CHECK18-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 21556 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 21557 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 21558 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 21559 // CHECK18-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 21560 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 21561 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* 21562 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 21563 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8 21564 // CHECK18-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 21565 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 21566 // CHECK18-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 21567 // CHECK18-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 21568 // CHECK18-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 21569 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]]) 21570 // CHECK18-NEXT: ret void 21571 // 21572 // 21573 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..21 21574 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 21575 // CHECK18-NEXT: entry: 21576 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 21577 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 21578 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 21579 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 21580 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 21581 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 21582 // CHECK18-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 21583 // CHECK18-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 21584 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 21585 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 21586 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 21587 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 21588 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 21589 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 21590 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 21591 // CHECK18-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 21592 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 21593 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 21594 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 21595 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 21596 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 21597 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 21598 // CHECK18-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 21599 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 21600 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 21601 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21602 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 21603 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 21604 // CHECK18: cond.true: 21605 // CHECK18-NEXT: br label [[COND_END:%.*]] 21606 // CHECK18: cond.false: 21607 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21608 // CHECK18-NEXT: br label [[COND_END]] 21609 // CHECK18: cond.end: 21610 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 21611 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 21612 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 21613 // CHECK18-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 21614 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 21615 // CHECK18: omp.inner.for.cond: 21616 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21617 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21618 // CHECK18-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 21619 // CHECK18-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 21620 // CHECK18: omp.inner.for.body: 21621 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 21622 // CHECK18-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 21623 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21624 // CHECK18-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 21625 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8 21626 // CHECK18-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 21627 // CHECK18-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4 21628 // CHECK18-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 21629 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]]) 21630 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 21631 // CHECK18: omp.inner.for.inc: 21632 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21633 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 21634 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 21635 // CHECK18-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 21636 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 21637 // CHECK18: omp.inner.for.end: 21638 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 21639 // CHECK18: omp.loop.exit: 21640 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 21641 // CHECK18-NEXT: ret void 21642 // 21643 // 21644 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..22 21645 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 21646 // CHECK18-NEXT: entry: 21647 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 21648 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 21649 // CHECK18-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 21650 // CHECK18-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 21651 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 21652 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 21653 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 21654 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 21655 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 21656 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 21657 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 21658 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 21659 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 21660 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 21661 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 21662 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 21663 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 21664 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 21665 // CHECK18-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 21666 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 21667 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 21668 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 21669 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 21670 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 21671 // CHECK18-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 21672 // CHECK18-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 21673 // CHECK18-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 21674 // CHECK18-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4 21675 // CHECK18-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 21676 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 21677 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 21678 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8 21679 // CHECK18-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 21680 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 21681 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]]) 21682 // CHECK18-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 21683 // CHECK18: omp.dispatch.cond: 21684 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 21685 // CHECK18-NEXT: [[CONV3:%.*]] = sext i32 [[TMP6]] to i64 21686 // CHECK18-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 21687 // CHECK18-NEXT: [[CMP:%.*]] = icmp ugt i64 [[CONV3]], [[TMP7]] 21688 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 21689 // CHECK18: cond.true: 21690 // CHECK18-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 21691 // CHECK18-NEXT: br label [[COND_END:%.*]] 21692 // CHECK18: cond.false: 21693 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 21694 // CHECK18-NEXT: [[CONV4:%.*]] = sext i32 [[TMP9]] to i64 21695 // CHECK18-NEXT: br label [[COND_END]] 21696 // CHECK18: cond.end: 21697 // CHECK18-NEXT: [[COND:%.*]] = phi i64 [ [[TMP8]], [[COND_TRUE]] ], [ [[CONV4]], [[COND_FALSE]] ] 21698 // CHECK18-NEXT: [[CONV5:%.*]] = trunc i64 [[COND]] to i32 21699 // CHECK18-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 21700 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 21701 // CHECK18-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 21702 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21703 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 21704 // CHECK18-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 21705 // CHECK18-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 21706 // CHECK18: omp.dispatch.body: 21707 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 21708 // CHECK18: omp.inner.for.cond: 21709 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21710 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 21711 // CHECK18-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 21712 // CHECK18-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 21713 // CHECK18: omp.inner.for.body: 21714 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21715 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 21716 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 21717 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I]], align 4 21718 // CHECK18-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4 21719 // CHECK18-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64 21720 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 21721 // CHECK18-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 21722 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 21723 // CHECK18: omp.body.continue: 21724 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 21725 // CHECK18: omp.inner.for.inc: 21726 // CHECK18-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21727 // CHECK18-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], 1 21728 // CHECK18-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 21729 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 21730 // CHECK18: omp.inner.for.end: 21731 // CHECK18-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 21732 // CHECK18: omp.dispatch.inc: 21733 // CHECK18-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 21734 // CHECK18-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 21735 // CHECK18-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 21736 // CHECK18-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4 21737 // CHECK18-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 21738 // CHECK18-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 21739 // CHECK18-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 21740 // CHECK18-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4 21741 // CHECK18-NEXT: br label [[OMP_DISPATCH_COND]] 21742 // CHECK18: omp.dispatch.end: 21743 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 21744 // CHECK18-NEXT: ret void 21745 // 21746 // 21747 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131 21748 // CHECK18-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 21749 // CHECK18-NEXT: entry: 21750 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 21751 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 21752 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 21753 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 21754 // CHECK18-NEXT: ret void 21755 // 21756 // 21757 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..25 21758 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 21759 // CHECK18-NEXT: entry: 21760 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 21761 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 21762 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 21763 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 21764 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 21765 // CHECK18-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 21766 // CHECK18-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 21767 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 21768 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 21769 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 21770 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 21771 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 21772 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 21773 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 21774 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 21775 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 21776 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 21777 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 21778 // CHECK18-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 21779 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 21780 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 21781 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21782 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 21783 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 21784 // CHECK18: cond.true: 21785 // CHECK18-NEXT: br label [[COND_END:%.*]] 21786 // CHECK18: cond.false: 21787 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21788 // CHECK18-NEXT: br label [[COND_END]] 21789 // CHECK18: cond.end: 21790 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 21791 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 21792 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 21793 // CHECK18-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 21794 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 21795 // CHECK18: omp.inner.for.cond: 21796 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21797 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21798 // CHECK18-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 21799 // CHECK18-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 21800 // CHECK18: omp.inner.for.body: 21801 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 21802 // CHECK18-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 21803 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21804 // CHECK18-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 21805 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]]) 21806 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 21807 // CHECK18: omp.inner.for.inc: 21808 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21809 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 21810 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 21811 // CHECK18-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 21812 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 21813 // CHECK18: omp.inner.for.end: 21814 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 21815 // CHECK18: omp.loop.exit: 21816 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 21817 // CHECK18-NEXT: ret void 21818 // 21819 // 21820 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..26 21821 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 21822 // CHECK18-NEXT: entry: 21823 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 21824 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 21825 // CHECK18-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 21826 // CHECK18-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 21827 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 21828 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 21829 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 21830 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 21831 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 21832 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 21833 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 21834 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 21835 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 21836 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 21837 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 21838 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 21839 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 21840 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 21841 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 21842 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 21843 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 21844 // CHECK18-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 21845 // CHECK18-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 21846 // CHECK18-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 21847 // CHECK18-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 21848 // CHECK18-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 21849 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 21850 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 21851 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 21852 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 21853 // CHECK18-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 21854 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 21855 // CHECK18-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 21856 // CHECK18-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 21857 // CHECK18: omp.dispatch.cond: 21858 // CHECK18-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 21859 // CHECK18-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 21860 // CHECK18-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 21861 // CHECK18: omp.dispatch.body: 21862 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 21863 // CHECK18-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 21864 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 21865 // CHECK18: omp.inner.for.cond: 21866 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 21867 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !20 21868 // CHECK18-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 21869 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 21870 // CHECK18: omp.inner.for.body: 21871 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 21872 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 21873 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 21874 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !20 21875 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !20 21876 // CHECK18-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64 21877 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 21878 // CHECK18-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !20 21879 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 21880 // CHECK18: omp.body.continue: 21881 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 21882 // CHECK18: omp.inner.for.inc: 21883 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 21884 // CHECK18-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1 21885 // CHECK18-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !20 21886 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]] 21887 // CHECK18: omp.inner.for.end: 21888 // CHECK18-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 21889 // CHECK18: omp.dispatch.inc: 21890 // CHECK18-NEXT: br label [[OMP_DISPATCH_COND]] 21891 // CHECK18: omp.dispatch.end: 21892 // CHECK18-NEXT: ret void 21893 // 21894 // 21895 // CHECK18-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136 21896 // CHECK18-SAME: (i64 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 21897 // CHECK18-NEXT: entry: 21898 // CHECK18-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8 21899 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 21900 // CHECK18-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 21901 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 21902 // CHECK18-NEXT: store i64 [[M]], i64* [[M_ADDR]], align 8 21903 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 21904 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[M_ADDR]] to i32* 21905 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 21906 // CHECK18-NEXT: [[TMP1:%.*]] = load i32, i32* [[CONV]], align 8 21907 // CHECK18-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 21908 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 21909 // CHECK18-NEXT: [[CONV1:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 21910 // CHECK18-NEXT: store i32 [[TMP2]], i32* [[CONV1]], align 4 21911 // CHECK18-NEXT: [[TMP3:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 21912 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i64)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i64 [[TMP3]]) 21913 // CHECK18-NEXT: ret void 21914 // 21915 // 21916 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..29 21917 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 21918 // CHECK18-NEXT: entry: 21919 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 21920 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 21921 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 21922 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 21923 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 21924 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 21925 // CHECK18-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 21926 // CHECK18-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 21927 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 21928 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 21929 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 21930 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8 21931 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 21932 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 21933 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 21934 // CHECK18-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 21935 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 21936 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 21937 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 21938 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 21939 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 21940 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 21941 // CHECK18-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 21942 // CHECK18-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 21943 // CHECK18-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 21944 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21945 // CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 21946 // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 21947 // CHECK18: cond.true: 21948 // CHECK18-NEXT: br label [[COND_END:%.*]] 21949 // CHECK18: cond.false: 21950 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21951 // CHECK18-NEXT: br label [[COND_END]] 21952 // CHECK18: cond.end: 21953 // CHECK18-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 21954 // CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 21955 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 21956 // CHECK18-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 21957 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 21958 // CHECK18: omp.inner.for.cond: 21959 // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21960 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21961 // CHECK18-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 21962 // CHECK18-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 21963 // CHECK18: omp.inner.for.body: 21964 // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 21965 // CHECK18-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 21966 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 21967 // CHECK18-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 21968 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[CONV]], align 8 21969 // CHECK18-NEXT: [[CONV2:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__CASTED]] to i32* 21970 // CHECK18-NEXT: store i32 [[TMP12]], i32* [[CONV2]], align 4 21971 // CHECK18-NEXT: [[TMP13:%.*]] = load i64, i64* [[DOTCAPTURE_EXPR__CASTED]], align 8 21972 // CHECK18-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*, i64)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], [10 x i32]* [[TMP0]], i64 [[TMP13]]) 21973 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 21974 // CHECK18: omp.inner.for.inc: 21975 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 21976 // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 21977 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]] 21978 // CHECK18-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 21979 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] 21980 // CHECK18: omp.inner.for.end: 21981 // CHECK18-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 21982 // CHECK18: omp.loop.exit: 21983 // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 21984 // CHECK18-NEXT: ret void 21985 // 21986 // 21987 // CHECK18-LABEL: define {{[^@]+}}@.omp_outlined..30 21988 // CHECK18-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i64 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 21989 // CHECK18-NEXT: entry: 21990 // CHECK18-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 21991 // CHECK18-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 21992 // CHECK18-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 21993 // CHECK18-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 21994 // CHECK18-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 8 21995 // CHECK18-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8 21996 // CHECK18-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 21997 // CHECK18-NEXT: [[TMP:%.*]] = alloca i32, align 4 21998 // CHECK18-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 21999 // CHECK18-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 22000 // CHECK18-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 22001 // CHECK18-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 22002 // CHECK18-NEXT: [[I:%.*]] = alloca i32, align 4 22003 // CHECK18-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 22004 // CHECK18-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 22005 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 22006 // CHECK18-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 22007 // CHECK18-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 8 22008 // CHECK18-NEXT: store i64 [[DOTCAPTURE_EXPR_]], i64* [[DOTCAPTURE_EXPR__ADDR]], align 8 22009 // CHECK18-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 8 22010 // CHECK18-NEXT: [[CONV:%.*]] = bitcast i64* [[DOTCAPTURE_EXPR__ADDR]] to i32* 22011 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 22012 // CHECK18-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 22013 // CHECK18-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 22014 // CHECK18-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32 22015 // CHECK18-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 22016 // CHECK18-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP2]] to i32 22017 // CHECK18-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_LB]], align 4 22018 // CHECK18-NEXT: store i32 [[CONV2]], i32* [[DOTOMP_UB]], align 4 22019 // CHECK18-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 22020 // CHECK18-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 22021 // CHECK18-NEXT: [[TMP3:%.*]] = load i32, i32* [[CONV]], align 8 22022 // CHECK18-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 22023 // CHECK18-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 22024 // CHECK18-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 22025 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 22026 // CHECK18-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]]) 22027 // CHECK18-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 22028 // CHECK18: omp.dispatch.cond: 22029 // CHECK18-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 22030 // CHECK18-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0 22031 // CHECK18-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 22032 // CHECK18: omp.dispatch.body: 22033 // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 22034 // CHECK18-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 22035 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 22036 // CHECK18: omp.inner.for.cond: 22037 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 22038 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !23 22039 // CHECK18-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 22040 // CHECK18-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 22041 // CHECK18: omp.inner.for.body: 22042 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 22043 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 22044 // CHECK18-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 22045 // CHECK18-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !23 22046 // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !23 22047 // CHECK18-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 22048 // CHECK18-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] 22049 // CHECK18-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !23 22050 // CHECK18-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 22051 // CHECK18: omp.body.continue: 22052 // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 22053 // CHECK18: omp.inner.for.inc: 22054 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 22055 // CHECK18-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1 22056 // CHECK18-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !23 22057 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]] 22058 // CHECK18: omp.inner.for.end: 22059 // CHECK18-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 22060 // CHECK18: omp.dispatch.inc: 22061 // CHECK18-NEXT: br label [[OMP_DISPATCH_COND]] 22062 // CHECK18: omp.dispatch.end: 22063 // CHECK18-NEXT: ret void 22064 // 22065 // 22066 // CHECK18-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 22067 // CHECK18-SAME: () #[[ATTR5:[0-9]+]] { 22068 // CHECK18-NEXT: entry: 22069 // CHECK18-NEXT: call void @__tgt_register_requires(i64 1) 22070 // CHECK18-NEXT: ret void 22071 // 22072 // 22073 // CHECK19-LABEL: define {{[^@]+}}@main 22074 // CHECK19-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 22075 // CHECK19-NEXT: entry: 22076 // CHECK19-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 22077 // CHECK19-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 22078 // CHECK19-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 22079 // CHECK19-NEXT: [[N:%.*]] = alloca i32, align 4 22080 // CHECK19-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 22081 // CHECK19-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 22082 // CHECK19-NEXT: [[M:%.*]] = alloca i32, align 4 22083 // CHECK19-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 22084 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 22085 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 22086 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 22087 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4 22088 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 22089 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 22090 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 22091 // CHECK19-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4 22092 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4 22093 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4 22094 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4 22095 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4 22096 // CHECK19-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 22097 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 22098 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 22099 // CHECK19-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4 22100 // CHECK19-NEXT: [[N_CASTED17:%.*]] = alloca i32, align 4 22101 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS18:%.*]] = alloca [4 x i8*], align 4 22102 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS19:%.*]] = alloca [4 x i8*], align 4 22103 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS20:%.*]] = alloca [4 x i8*], align 4 22104 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES21:%.*]] = alloca [4 x i64], align 4 22105 // CHECK19-NEXT: [[_TMP22:%.*]] = alloca i32, align 4 22106 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_23:%.*]] = alloca i32, align 4 22107 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4 22108 // CHECK19-NEXT: [[N_CASTED31:%.*]] = alloca i32, align 4 22109 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS32:%.*]] = alloca [3 x i8*], align 4 22110 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS33:%.*]] = alloca [3 x i8*], align 4 22111 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS34:%.*]] = alloca [3 x i8*], align 4 22112 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES35:%.*]] = alloca [3 x i64], align 4 22113 // CHECK19-NEXT: [[_TMP36:%.*]] = alloca i32, align 4 22114 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_37:%.*]] = alloca i32, align 4 22115 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4 22116 // CHECK19-NEXT: [[M_CASTED45:%.*]] = alloca i32, align 4 22117 // CHECK19-NEXT: [[N_CASTED46:%.*]] = alloca i32, align 4 22118 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS47:%.*]] = alloca [4 x i8*], align 4 22119 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS48:%.*]] = alloca [4 x i8*], align 4 22120 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS49:%.*]] = alloca [4 x i8*], align 4 22121 // CHECK19-NEXT: [[DOTOFFLOAD_SIZES50:%.*]] = alloca [4 x i64], align 4 22122 // CHECK19-NEXT: [[_TMP51:%.*]] = alloca i32, align 4 22123 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_52:%.*]] = alloca i32, align 4 22124 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_53:%.*]] = alloca i32, align 4 22125 // CHECK19-NEXT: store i32 0, i32* [[RETVAL]], align 4 22126 // CHECK19-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 22127 // CHECK19-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 22128 // CHECK19-NEXT: store i32 100, i32* [[N]], align 4 22129 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 22130 // CHECK19-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 22131 // CHECK19-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 22132 // CHECK19-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 22133 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 22134 // CHECK19-NEXT: store i32 10, i32* [[M]], align 4 22135 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 22136 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 22137 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 22138 // CHECK19-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4 22139 // CHECK19-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64 22140 // CHECK19-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 22141 // CHECK19-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32* 22142 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[TMP7]], align 4 22143 // CHECK19-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 22144 // CHECK19-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32* 22145 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[TMP9]], align 4 22146 // CHECK19-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 22147 // CHECK19-NEXT: store i64 4, i64* [[TMP10]], align 4 22148 // CHECK19-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 22149 // CHECK19-NEXT: store i8* null, i8** [[TMP11]], align 4 22150 // CHECK19-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 22151 // CHECK19-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 22152 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4 22153 // CHECK19-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 22154 // CHECK19-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 22155 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4 22156 // CHECK19-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 22157 // CHECK19-NEXT: store i64 4, i64* [[TMP16]], align 4 22158 // CHECK19-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 22159 // CHECK19-NEXT: store i8* null, i8** [[TMP17]], align 4 22160 // CHECK19-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 22161 // CHECK19-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32** 22162 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 4 22163 // CHECK19-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 22164 // CHECK19-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32** 22165 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 4 22166 // CHECK19-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 22167 // CHECK19-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 4 22168 // CHECK19-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 22169 // CHECK19-NEXT: store i8* null, i8** [[TMP23]], align 4 22170 // CHECK19-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 22171 // CHECK19-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 22172 // CHECK19-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 22173 // CHECK19-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4 22174 // CHECK19-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4 22175 // CHECK19-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 22176 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0 22177 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 22178 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 22179 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 22180 // CHECK19-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22181 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1 22182 // CHECK19-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64 22183 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]]) 22184 // CHECK19-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 22185 // CHECK19-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 22186 // CHECK19-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 22187 // CHECK19: omp_offload.failed: 22188 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 22189 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]] 22190 // CHECK19: omp_offload.cont: 22191 // CHECK19-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4 22192 // CHECK19-NEXT: store i32 [[TMP33]], i32* [[N_CASTED3]], align 4 22193 // CHECK19-NEXT: [[TMP34:%.*]] = load i32, i32* [[N_CASTED3]], align 4 22194 // CHECK19-NEXT: [[TMP35:%.*]] = mul nuw i32 [[TMP0]], 4 22195 // CHECK19-NEXT: [[TMP36:%.*]] = sext i32 [[TMP35]] to i64 22196 // CHECK19-NEXT: [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 22197 // CHECK19-NEXT: [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32* 22198 // CHECK19-NEXT: store i32 [[TMP34]], i32* [[TMP38]], align 4 22199 // CHECK19-NEXT: [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 22200 // CHECK19-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32* 22201 // CHECK19-NEXT: store i32 [[TMP34]], i32* [[TMP40]], align 4 22202 // CHECK19-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0 22203 // CHECK19-NEXT: store i64 4, i64* [[TMP41]], align 4 22204 // CHECK19-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0 22205 // CHECK19-NEXT: store i8* null, i8** [[TMP42]], align 4 22206 // CHECK19-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 22207 // CHECK19-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i32* 22208 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP44]], align 4 22209 // CHECK19-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 22210 // CHECK19-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32* 22211 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP46]], align 4 22212 // CHECK19-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 1 22213 // CHECK19-NEXT: store i64 4, i64* [[TMP47]], align 4 22214 // CHECK19-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1 22215 // CHECK19-NEXT: store i8* null, i8** [[TMP48]], align 4 22216 // CHECK19-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 22217 // CHECK19-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32** 22218 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP50]], align 4 22219 // CHECK19-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 22220 // CHECK19-NEXT: [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32** 22221 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP52]], align 4 22222 // CHECK19-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2 22223 // CHECK19-NEXT: store i64 [[TMP36]], i64* [[TMP53]], align 4 22224 // CHECK19-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2 22225 // CHECK19-NEXT: store i8* null, i8** [[TMP54]], align 4 22226 // CHECK19-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 22227 // CHECK19-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 22228 // CHECK19-NEXT: [[TMP57:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0 22229 // CHECK19-NEXT: [[TMP58:%.*]] = load i32, i32* [[N]], align 4 22230 // CHECK19-NEXT: store i32 [[TMP58]], i32* [[DOTCAPTURE_EXPR_9]], align 4 22231 // CHECK19-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4 22232 // CHECK19-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP59]], 0 22233 // CHECK19-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 22234 // CHECK19-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 22235 // CHECK19-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4 22236 // CHECK19-NEXT: [[TMP60:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 22237 // CHECK19-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP60]], 1 22238 // CHECK19-NEXT: [[TMP61:%.*]] = zext i32 [[ADD14]] to i64 22239 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP61]]) 22240 // CHECK19-NEXT: [[TMP62:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, i32 3, i8** [[TMP55]], i8** [[TMP56]], i64* [[TMP57]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 22241 // CHECK19-NEXT: [[TMP63:%.*]] = icmp ne i32 [[TMP62]], 0 22242 // CHECK19-NEXT: br i1 [[TMP63]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]] 22243 // CHECK19: omp_offload.failed15: 22244 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i32 [[TMP34]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 22245 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT16]] 22246 // CHECK19: omp_offload.cont16: 22247 // CHECK19-NEXT: [[TMP64:%.*]] = load i32, i32* [[M]], align 4 22248 // CHECK19-NEXT: store i32 [[TMP64]], i32* [[M_CASTED]], align 4 22249 // CHECK19-NEXT: [[TMP65:%.*]] = load i32, i32* [[M_CASTED]], align 4 22250 // CHECK19-NEXT: [[TMP66:%.*]] = load i32, i32* [[N]], align 4 22251 // CHECK19-NEXT: store i32 [[TMP66]], i32* [[N_CASTED17]], align 4 22252 // CHECK19-NEXT: [[TMP67:%.*]] = load i32, i32* [[N_CASTED17]], align 4 22253 // CHECK19-NEXT: [[TMP68:%.*]] = mul nuw i32 [[TMP0]], 4 22254 // CHECK19-NEXT: [[TMP69:%.*]] = sext i32 [[TMP68]] to i64 22255 // CHECK19-NEXT: [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0 22256 // CHECK19-NEXT: [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i32* 22257 // CHECK19-NEXT: store i32 [[TMP65]], i32* [[TMP71]], align 4 22258 // CHECK19-NEXT: [[TMP72:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0 22259 // CHECK19-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to i32* 22260 // CHECK19-NEXT: store i32 [[TMP65]], i32* [[TMP73]], align 4 22261 // CHECK19-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0 22262 // CHECK19-NEXT: store i64 4, i64* [[TMP74]], align 4 22263 // CHECK19-NEXT: [[TMP75:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 0 22264 // CHECK19-NEXT: store i8* null, i8** [[TMP75]], align 4 22265 // CHECK19-NEXT: [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 1 22266 // CHECK19-NEXT: [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i32* 22267 // CHECK19-NEXT: store i32 [[TMP67]], i32* [[TMP77]], align 4 22268 // CHECK19-NEXT: [[TMP78:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 1 22269 // CHECK19-NEXT: [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i32* 22270 // CHECK19-NEXT: store i32 [[TMP67]], i32* [[TMP79]], align 4 22271 // CHECK19-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 1 22272 // CHECK19-NEXT: store i64 4, i64* [[TMP80]], align 4 22273 // CHECK19-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 1 22274 // CHECK19-NEXT: store i8* null, i8** [[TMP81]], align 4 22275 // CHECK19-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 2 22276 // CHECK19-NEXT: [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i32* 22277 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP83]], align 4 22278 // CHECK19-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 2 22279 // CHECK19-NEXT: [[TMP85:%.*]] = bitcast i8** [[TMP84]] to i32* 22280 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP85]], align 4 22281 // CHECK19-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 2 22282 // CHECK19-NEXT: store i64 4, i64* [[TMP86]], align 4 22283 // CHECK19-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 2 22284 // CHECK19-NEXT: store i8* null, i8** [[TMP87]], align 4 22285 // CHECK19-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 3 22286 // CHECK19-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32** 22287 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP89]], align 4 22288 // CHECK19-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 3 22289 // CHECK19-NEXT: [[TMP91:%.*]] = bitcast i8** [[TMP90]] to i32** 22290 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP91]], align 4 22291 // CHECK19-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 3 22292 // CHECK19-NEXT: store i64 [[TMP69]], i64* [[TMP92]], align 4 22293 // CHECK19-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 3 22294 // CHECK19-NEXT: store i8* null, i8** [[TMP93]], align 4 22295 // CHECK19-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0 22296 // CHECK19-NEXT: [[TMP95:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0 22297 // CHECK19-NEXT: [[TMP96:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0 22298 // CHECK19-NEXT: [[TMP97:%.*]] = load i32, i32* [[N]], align 4 22299 // CHECK19-NEXT: store i32 [[TMP97]], i32* [[DOTCAPTURE_EXPR_23]], align 4 22300 // CHECK19-NEXT: [[TMP98:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_23]], align 4 22301 // CHECK19-NEXT: [[SUB25:%.*]] = sub nsw i32 [[TMP98]], 0 22302 // CHECK19-NEXT: [[DIV26:%.*]] = sdiv i32 [[SUB25]], 1 22303 // CHECK19-NEXT: [[SUB27:%.*]] = sub nsw i32 [[DIV26]], 1 22304 // CHECK19-NEXT: store i32 [[SUB27]], i32* [[DOTCAPTURE_EXPR_24]], align 4 22305 // CHECK19-NEXT: [[TMP99:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4 22306 // CHECK19-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP99]], 1 22307 // CHECK19-NEXT: [[TMP100:%.*]] = zext i32 [[ADD28]] to i64 22308 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP100]]) 22309 // CHECK19-NEXT: [[TMP101:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, i32 4, i8** [[TMP94]], i8** [[TMP95]], i64* [[TMP96]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 22310 // CHECK19-NEXT: [[TMP102:%.*]] = icmp ne i32 [[TMP101]], 0 22311 // CHECK19-NEXT: br i1 [[TMP102]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]] 22312 // CHECK19: omp_offload.failed29: 22313 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i32 [[TMP65]], i32 [[TMP67]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 22314 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT30]] 22315 // CHECK19: omp_offload.cont30: 22316 // CHECK19-NEXT: [[TMP103:%.*]] = load i32, i32* [[N]], align 4 22317 // CHECK19-NEXT: store i32 [[TMP103]], i32* [[N_CASTED31]], align 4 22318 // CHECK19-NEXT: [[TMP104:%.*]] = load i32, i32* [[N_CASTED31]], align 4 22319 // CHECK19-NEXT: [[TMP105:%.*]] = mul nuw i32 [[TMP0]], 4 22320 // CHECK19-NEXT: [[TMP106:%.*]] = sext i32 [[TMP105]] to i64 22321 // CHECK19-NEXT: [[TMP107:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0 22322 // CHECK19-NEXT: [[TMP108:%.*]] = bitcast i8** [[TMP107]] to i32* 22323 // CHECK19-NEXT: store i32 [[TMP104]], i32* [[TMP108]], align 4 22324 // CHECK19-NEXT: [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0 22325 // CHECK19-NEXT: [[TMP110:%.*]] = bitcast i8** [[TMP109]] to i32* 22326 // CHECK19-NEXT: store i32 [[TMP104]], i32* [[TMP110]], align 4 22327 // CHECK19-NEXT: [[TMP111:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 0 22328 // CHECK19-NEXT: store i64 4, i64* [[TMP111]], align 4 22329 // CHECK19-NEXT: [[TMP112:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 0 22330 // CHECK19-NEXT: store i8* null, i8** [[TMP112]], align 4 22331 // CHECK19-NEXT: [[TMP113:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 1 22332 // CHECK19-NEXT: [[TMP114:%.*]] = bitcast i8** [[TMP113]] to i32* 22333 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP114]], align 4 22334 // CHECK19-NEXT: [[TMP115:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 1 22335 // CHECK19-NEXT: [[TMP116:%.*]] = bitcast i8** [[TMP115]] to i32* 22336 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP116]], align 4 22337 // CHECK19-NEXT: [[TMP117:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 1 22338 // CHECK19-NEXT: store i64 4, i64* [[TMP117]], align 4 22339 // CHECK19-NEXT: [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 1 22340 // CHECK19-NEXT: store i8* null, i8** [[TMP118]], align 4 22341 // CHECK19-NEXT: [[TMP119:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 2 22342 // CHECK19-NEXT: [[TMP120:%.*]] = bitcast i8** [[TMP119]] to i32** 22343 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP120]], align 4 22344 // CHECK19-NEXT: [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 2 22345 // CHECK19-NEXT: [[TMP122:%.*]] = bitcast i8** [[TMP121]] to i32** 22346 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP122]], align 4 22347 // CHECK19-NEXT: [[TMP123:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 2 22348 // CHECK19-NEXT: store i64 [[TMP106]], i64* [[TMP123]], align 4 22349 // CHECK19-NEXT: [[TMP124:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 2 22350 // CHECK19-NEXT: store i8* null, i8** [[TMP124]], align 4 22351 // CHECK19-NEXT: [[TMP125:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0 22352 // CHECK19-NEXT: [[TMP126:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0 22353 // CHECK19-NEXT: [[TMP127:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 0 22354 // CHECK19-NEXT: [[TMP128:%.*]] = load i32, i32* [[N]], align 4 22355 // CHECK19-NEXT: store i32 [[TMP128]], i32* [[DOTCAPTURE_EXPR_37]], align 4 22356 // CHECK19-NEXT: [[TMP129:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_37]], align 4 22357 // CHECK19-NEXT: [[SUB39:%.*]] = sub nsw i32 [[TMP129]], 0 22358 // CHECK19-NEXT: [[DIV40:%.*]] = sdiv i32 [[SUB39]], 1 22359 // CHECK19-NEXT: [[SUB41:%.*]] = sub nsw i32 [[DIV40]], 1 22360 // CHECK19-NEXT: store i32 [[SUB41]], i32* [[DOTCAPTURE_EXPR_38]], align 4 22361 // CHECK19-NEXT: [[TMP130:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_38]], align 4 22362 // CHECK19-NEXT: [[ADD42:%.*]] = add nsw i32 [[TMP130]], 1 22363 // CHECK19-NEXT: [[TMP131:%.*]] = zext i32 [[ADD42]] to i64 22364 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP131]]) 22365 // CHECK19-NEXT: [[TMP132:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, i32 3, i8** [[TMP125]], i8** [[TMP126]], i64* [[TMP127]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 22366 // CHECK19-NEXT: [[TMP133:%.*]] = icmp ne i32 [[TMP132]], 0 22367 // CHECK19-NEXT: br i1 [[TMP133]], label [[OMP_OFFLOAD_FAILED43:%.*]], label [[OMP_OFFLOAD_CONT44:%.*]] 22368 // CHECK19: omp_offload.failed43: 22369 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i32 [[TMP104]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 22370 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT44]] 22371 // CHECK19: omp_offload.cont44: 22372 // CHECK19-NEXT: [[TMP134:%.*]] = load i32, i32* [[M]], align 4 22373 // CHECK19-NEXT: store i32 [[TMP134]], i32* [[M_CASTED45]], align 4 22374 // CHECK19-NEXT: [[TMP135:%.*]] = load i32, i32* [[M_CASTED45]], align 4 22375 // CHECK19-NEXT: [[TMP136:%.*]] = load i32, i32* [[N]], align 4 22376 // CHECK19-NEXT: store i32 [[TMP136]], i32* [[N_CASTED46]], align 4 22377 // CHECK19-NEXT: [[TMP137:%.*]] = load i32, i32* [[N_CASTED46]], align 4 22378 // CHECK19-NEXT: [[TMP138:%.*]] = mul nuw i32 [[TMP0]], 4 22379 // CHECK19-NEXT: [[TMP139:%.*]] = sext i32 [[TMP138]] to i64 22380 // CHECK19-NEXT: [[TMP140:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0 22381 // CHECK19-NEXT: [[TMP141:%.*]] = bitcast i8** [[TMP140]] to i32* 22382 // CHECK19-NEXT: store i32 [[TMP135]], i32* [[TMP141]], align 4 22383 // CHECK19-NEXT: [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0 22384 // CHECK19-NEXT: [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i32* 22385 // CHECK19-NEXT: store i32 [[TMP135]], i32* [[TMP143]], align 4 22386 // CHECK19-NEXT: [[TMP144:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 0 22387 // CHECK19-NEXT: store i64 4, i64* [[TMP144]], align 4 22388 // CHECK19-NEXT: [[TMP145:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 0 22389 // CHECK19-NEXT: store i8* null, i8** [[TMP145]], align 4 22390 // CHECK19-NEXT: [[TMP146:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 1 22391 // CHECK19-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i32* 22392 // CHECK19-NEXT: store i32 [[TMP137]], i32* [[TMP147]], align 4 22393 // CHECK19-NEXT: [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 1 22394 // CHECK19-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i32* 22395 // CHECK19-NEXT: store i32 [[TMP137]], i32* [[TMP149]], align 4 22396 // CHECK19-NEXT: [[TMP150:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 1 22397 // CHECK19-NEXT: store i64 4, i64* [[TMP150]], align 4 22398 // CHECK19-NEXT: [[TMP151:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 1 22399 // CHECK19-NEXT: store i8* null, i8** [[TMP151]], align 4 22400 // CHECK19-NEXT: [[TMP152:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 2 22401 // CHECK19-NEXT: [[TMP153:%.*]] = bitcast i8** [[TMP152]] to i32* 22402 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP153]], align 4 22403 // CHECK19-NEXT: [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 2 22404 // CHECK19-NEXT: [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32* 22405 // CHECK19-NEXT: store i32 [[TMP0]], i32* [[TMP155]], align 4 22406 // CHECK19-NEXT: [[TMP156:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 2 22407 // CHECK19-NEXT: store i64 4, i64* [[TMP156]], align 4 22408 // CHECK19-NEXT: [[TMP157:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 2 22409 // CHECK19-NEXT: store i8* null, i8** [[TMP157]], align 4 22410 // CHECK19-NEXT: [[TMP158:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 3 22411 // CHECK19-NEXT: [[TMP159:%.*]] = bitcast i8** [[TMP158]] to i32** 22412 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP159]], align 4 22413 // CHECK19-NEXT: [[TMP160:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 3 22414 // CHECK19-NEXT: [[TMP161:%.*]] = bitcast i8** [[TMP160]] to i32** 22415 // CHECK19-NEXT: store i32* [[VLA]], i32** [[TMP161]], align 4 22416 // CHECK19-NEXT: [[TMP162:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 3 22417 // CHECK19-NEXT: store i64 [[TMP139]], i64* [[TMP162]], align 4 22418 // CHECK19-NEXT: [[TMP163:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 3 22419 // CHECK19-NEXT: store i8* null, i8** [[TMP163]], align 4 22420 // CHECK19-NEXT: [[TMP164:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0 22421 // CHECK19-NEXT: [[TMP165:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0 22422 // CHECK19-NEXT: [[TMP166:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 0 22423 // CHECK19-NEXT: [[TMP167:%.*]] = load i32, i32* [[N]], align 4 22424 // CHECK19-NEXT: store i32 [[TMP167]], i32* [[DOTCAPTURE_EXPR_52]], align 4 22425 // CHECK19-NEXT: [[TMP168:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_52]], align 4 22426 // CHECK19-NEXT: [[SUB54:%.*]] = sub nsw i32 [[TMP168]], 0 22427 // CHECK19-NEXT: [[DIV55:%.*]] = sdiv i32 [[SUB54]], 1 22428 // CHECK19-NEXT: [[SUB56:%.*]] = sub nsw i32 [[DIV55]], 1 22429 // CHECK19-NEXT: store i32 [[SUB56]], i32* [[DOTCAPTURE_EXPR_53]], align 4 22430 // CHECK19-NEXT: [[TMP169:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_53]], align 4 22431 // CHECK19-NEXT: [[ADD57:%.*]] = add nsw i32 [[TMP169]], 1 22432 // CHECK19-NEXT: [[TMP170:%.*]] = zext i32 [[ADD57]] to i64 22433 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP170]]) 22434 // CHECK19-NEXT: [[TMP171:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, i32 4, i8** [[TMP164]], i8** [[TMP165]], i64* [[TMP166]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 22435 // CHECK19-NEXT: [[TMP172:%.*]] = icmp ne i32 [[TMP171]], 0 22436 // CHECK19-NEXT: br i1 [[TMP172]], label [[OMP_OFFLOAD_FAILED58:%.*]], label [[OMP_OFFLOAD_CONT59:%.*]] 22437 // CHECK19: omp_offload.failed58: 22438 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i32 [[TMP135]], i32 [[TMP137]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 22439 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT59]] 22440 // CHECK19: omp_offload.cont59: 22441 // CHECK19-NEXT: [[TMP173:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 22442 // CHECK19-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP173]]) 22443 // CHECK19-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 22444 // CHECK19-NEXT: [[TMP174:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 22445 // CHECK19-NEXT: call void @llvm.stackrestore(i8* [[TMP174]]) 22446 // CHECK19-NEXT: [[TMP175:%.*]] = load i32, i32* [[RETVAL]], align 4 22447 // CHECK19-NEXT: ret i32 [[TMP175]] 22448 // 22449 // 22450 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148 22451 // CHECK19-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 22452 // CHECK19-NEXT: entry: 22453 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 22454 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 22455 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 22456 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 22457 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 22458 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 22459 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 22460 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 22461 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 22462 // CHECK19-NEXT: ret void 22463 // 22464 // 22465 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined. 22466 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 22467 // CHECK19-NEXT: entry: 22468 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 22469 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 22470 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 22471 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 22472 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 22473 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 22474 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 22475 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 22476 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 22477 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 22478 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 22479 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 22480 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 22481 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 22482 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4 22483 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 22484 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 22485 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 22486 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 22487 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 22488 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 22489 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 22490 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 22491 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 22492 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 22493 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 22494 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 22495 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 22496 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 22497 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 22498 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4 22499 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 22500 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 22501 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 22502 // CHECK19: omp.precond.then: 22503 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 22504 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22505 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 22506 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 22507 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 22508 // CHECK19-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 22509 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 22510 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 22511 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22512 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22513 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 22514 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 22515 // CHECK19: cond.true: 22516 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22517 // CHECK19-NEXT: br label [[COND_END:%.*]] 22518 // CHECK19: cond.false: 22519 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22520 // CHECK19-NEXT: br label [[COND_END]] 22521 // CHECK19: cond.end: 22522 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 22523 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 22524 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 22525 // CHECK19-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 22526 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 22527 // CHECK19: omp.inner.for.cond: 22528 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22529 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22530 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 22531 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 22532 // CHECK19: omp.inner.for.body: 22533 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 22534 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22535 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 22536 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 22537 // CHECK19: omp.inner.for.inc: 22538 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22539 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 22540 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 22541 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 22542 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 22543 // CHECK19: omp.inner.for.end: 22544 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 22545 // CHECK19: omp.loop.exit: 22546 // CHECK19-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 22547 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 22548 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 22549 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 22550 // CHECK19: omp.precond.end: 22551 // CHECK19-NEXT: ret void 22552 // 22553 // 22554 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..1 22555 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 22556 // CHECK19-NEXT: entry: 22557 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 22558 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 22559 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 22560 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 22561 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 22562 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 22563 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 22564 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 22565 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 22566 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 22567 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 22568 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 22569 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 22570 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 22571 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 22572 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 22573 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4 22574 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 22575 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 22576 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 22577 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 22578 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 22579 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 22580 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 22581 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 22582 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 22583 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 22584 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 22585 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 22586 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 22587 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 22588 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 22589 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 22590 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 22591 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4 22592 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 22593 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 22594 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 22595 // CHECK19: omp.precond.then: 22596 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 22597 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22598 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 22599 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 22600 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 22601 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 22602 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 22603 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 22604 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 22605 // CHECK19-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 22606 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 22607 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 22608 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 22609 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22610 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 22611 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 22612 // CHECK19: cond.true: 22613 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22614 // CHECK19-NEXT: br label [[COND_END:%.*]] 22615 // CHECK19: cond.false: 22616 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 22617 // CHECK19-NEXT: br label [[COND_END]] 22618 // CHECK19: cond.end: 22619 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 22620 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 22621 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 22622 // CHECK19-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 22623 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 22624 // CHECK19: omp.inner.for.cond: 22625 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22626 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 22627 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 22628 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 22629 // CHECK19: omp.inner.for.body: 22630 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22631 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 22632 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 22633 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 22634 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4 22635 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]] 22636 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 22637 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 22638 // CHECK19: omp.body.continue: 22639 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 22640 // CHECK19: omp.inner.for.inc: 22641 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22642 // CHECK19-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1 22643 // CHECK19-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 22644 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 22645 // CHECK19: omp.inner.for.end: 22646 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 22647 // CHECK19: omp.loop.exit: 22648 // CHECK19-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 22649 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 22650 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 22651 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 22652 // CHECK19: omp.precond.end: 22653 // CHECK19-NEXT: ret void 22654 // 22655 // 22656 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153 22657 // CHECK19-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 22658 // CHECK19-NEXT: entry: 22659 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 22660 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 22661 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 22662 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 22663 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 22664 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 22665 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 22666 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 22667 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 22668 // CHECK19-NEXT: ret void 22669 // 22670 // 22671 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..2 22672 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 22673 // CHECK19-NEXT: entry: 22674 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 22675 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 22676 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 22677 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 22678 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 22679 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 22680 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 22681 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 22682 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 22683 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 22684 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 22685 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 22686 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 22687 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 22688 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4 22689 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 22690 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 22691 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 22692 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 22693 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 22694 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 22695 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 22696 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 22697 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 22698 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 22699 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 22700 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 22701 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 22702 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 22703 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 22704 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4 22705 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 22706 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 22707 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 22708 // CHECK19: omp.precond.then: 22709 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 22710 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22711 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 22712 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 22713 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 22714 // CHECK19-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 22715 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 22716 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 22717 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22718 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22719 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 22720 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 22721 // CHECK19: cond.true: 22722 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22723 // CHECK19-NEXT: br label [[COND_END:%.*]] 22724 // CHECK19: cond.false: 22725 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22726 // CHECK19-NEXT: br label [[COND_END]] 22727 // CHECK19: cond.end: 22728 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 22729 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 22730 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 22731 // CHECK19-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 22732 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 22733 // CHECK19: omp.inner.for.cond: 22734 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22735 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22736 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 22737 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 22738 // CHECK19: omp.inner.for.body: 22739 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 22740 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22741 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 22742 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 22743 // CHECK19: omp.inner.for.inc: 22744 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22745 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 22746 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 22747 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 22748 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 22749 // CHECK19: omp.inner.for.end: 22750 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 22751 // CHECK19: omp.loop.exit: 22752 // CHECK19-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 22753 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 22754 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 22755 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 22756 // CHECK19: omp.precond.end: 22757 // CHECK19-NEXT: ret void 22758 // 22759 // 22760 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..3 22761 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 22762 // CHECK19-NEXT: entry: 22763 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 22764 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 22765 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 22766 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 22767 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 22768 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 22769 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 22770 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 22771 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 22772 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 22773 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 22774 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 22775 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 22776 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 22777 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 22778 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 22779 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4 22780 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 22781 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 22782 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 22783 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 22784 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 22785 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 22786 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 22787 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 22788 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 22789 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 22790 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 22791 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 22792 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 22793 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 22794 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 22795 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 22796 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 22797 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4 22798 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 22799 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 22800 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 22801 // CHECK19: omp.precond.then: 22802 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 22803 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22804 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 22805 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 22806 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 22807 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 22808 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 22809 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 22810 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 22811 // CHECK19-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 22812 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 22813 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 22814 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 22815 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22816 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 22817 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 22818 // CHECK19: cond.true: 22819 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22820 // CHECK19-NEXT: br label [[COND_END:%.*]] 22821 // CHECK19: cond.false: 22822 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 22823 // CHECK19-NEXT: br label [[COND_END]] 22824 // CHECK19: cond.end: 22825 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 22826 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 22827 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 22828 // CHECK19-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 22829 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 22830 // CHECK19: omp.inner.for.cond: 22831 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22832 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 22833 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 22834 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 22835 // CHECK19: omp.inner.for.body: 22836 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22837 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 22838 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 22839 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 22840 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4 22841 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]] 22842 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 22843 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 22844 // CHECK19: omp.body.continue: 22845 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 22846 // CHECK19: omp.inner.for.inc: 22847 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22848 // CHECK19-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1 22849 // CHECK19-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 22850 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 22851 // CHECK19: omp.inner.for.end: 22852 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 22853 // CHECK19: omp.loop.exit: 22854 // CHECK19-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 22855 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 22856 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 22857 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 22858 // CHECK19: omp.precond.end: 22859 // CHECK19-NEXT: ret void 22860 // 22861 // 22862 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158 22863 // CHECK19-SAME: (i32 [[M:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 22864 // CHECK19-NEXT: entry: 22865 // CHECK19-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 22866 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 22867 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 22868 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 22869 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 22870 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 22871 // CHECK19-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 22872 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 22873 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 22874 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 22875 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 22876 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 22877 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4 22878 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 22879 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 22880 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 22881 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 22882 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]]) 22883 // CHECK19-NEXT: ret void 22884 // 22885 // 22886 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..5 22887 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 22888 // CHECK19-NEXT: entry: 22889 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 22890 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 22891 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 22892 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 22893 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 22894 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 22895 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 22896 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 22897 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 22898 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 22899 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 22900 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 22901 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 22902 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 22903 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 22904 // CHECK19-NEXT: [[I4:%.*]] = alloca i32, align 4 22905 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 22906 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 22907 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 22908 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 22909 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 22910 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 22911 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 22912 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 22913 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 22914 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 22915 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 22916 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 22917 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22918 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 22919 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 22920 // CHECK19-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 22921 // CHECK19-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 22922 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4 22923 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 22924 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 22925 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 22926 // CHECK19: omp.precond.then: 22927 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 22928 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 22929 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 22930 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 22931 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 22932 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 22933 // CHECK19-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 22934 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 22935 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]]) 22936 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22937 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 22938 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 22939 // CHECK19-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 22940 // CHECK19: cond.true: 22941 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 22942 // CHECK19-NEXT: br label [[COND_END:%.*]] 22943 // CHECK19: cond.false: 22944 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22945 // CHECK19-NEXT: br label [[COND_END]] 22946 // CHECK19: cond.end: 22947 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 22948 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 22949 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 22950 // CHECK19-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 22951 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 22952 // CHECK19: omp.inner.for.cond: 22953 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22954 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 22955 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1 22956 // CHECK19-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]] 22957 // CHECK19-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 22958 // CHECK19: omp.inner.for.body: 22959 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 22960 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22961 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 22962 // CHECK19-NEXT: store i32 [[TMP19]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 22963 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 22964 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP20]]) 22965 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 22966 // CHECK19: omp.inner.for.inc: 22967 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 22968 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 22969 // CHECK19-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 22970 // CHECK19-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 22971 // CHECK19-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 22972 // CHECK19-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 22973 // CHECK19-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 22974 // CHECK19-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4 22975 // CHECK19-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22976 // CHECK19-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 22977 // CHECK19-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 22978 // CHECK19-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4 22979 // CHECK19-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22980 // CHECK19-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 22981 // CHECK19-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP27]], [[TMP28]] 22982 // CHECK19-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]] 22983 // CHECK19: cond.true11: 22984 // CHECK19-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 22985 // CHECK19-NEXT: br label [[COND_END13:%.*]] 22986 // CHECK19: cond.false12: 22987 // CHECK19-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 22988 // CHECK19-NEXT: br label [[COND_END13]] 22989 // CHECK19: cond.end13: 22990 // CHECK19-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP29]], [[COND_TRUE11]] ], [ [[TMP30]], [[COND_FALSE12]] ] 22991 // CHECK19-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4 22992 // CHECK19-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 22993 // CHECK19-NEXT: store i32 [[TMP31]], i32* [[DOTOMP_IV]], align 4 22994 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 22995 // CHECK19: omp.inner.for.end: 22996 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 22997 // CHECK19: omp.loop.exit: 22998 // CHECK19-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 22999 // CHECK19-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4 23000 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]]) 23001 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 23002 // CHECK19: omp.precond.end: 23003 // CHECK19-NEXT: ret void 23004 // 23005 // 23006 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..6 23007 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 23008 // CHECK19-NEXT: entry: 23009 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 23010 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 23011 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 23012 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 23013 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 23014 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 23015 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 23016 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 23017 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 23018 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 23019 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 23020 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 23021 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 23022 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 23023 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 23024 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 23025 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 23026 // CHECK19-NEXT: [[I4:%.*]] = alloca i32, align 4 23027 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 23028 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 23029 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 23030 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 23031 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 23032 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 23033 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 23034 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 23035 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 23036 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 23037 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 23038 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 23039 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 23040 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 23041 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 23042 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 23043 // CHECK19-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 23044 // CHECK19-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 23045 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4 23046 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 23047 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 23048 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 23049 // CHECK19: omp.precond.then: 23050 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 23051 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 23052 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 23053 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 23054 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 23055 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 23056 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 23057 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 23058 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 23059 // CHECK19-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 23060 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 23061 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 23062 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 23063 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 23064 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 23065 // CHECK19-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 23066 // CHECK19: cond.true: 23067 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 23068 // CHECK19-NEXT: br label [[COND_END:%.*]] 23069 // CHECK19: cond.false: 23070 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 23071 // CHECK19-NEXT: br label [[COND_END]] 23072 // CHECK19: cond.end: 23073 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 23074 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 23075 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 23076 // CHECK19-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 23077 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 23078 // CHECK19: omp.inner.for.cond: 23079 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 23080 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 23081 // CHECK19-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 23082 // CHECK19-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 23083 // CHECK19: omp.inner.for.body: 23084 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 23085 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 23086 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 23087 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 23088 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4 23089 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]] 23090 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 23091 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 23092 // CHECK19: omp.body.continue: 23093 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 23094 // CHECK19: omp.inner.for.inc: 23095 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 23096 // CHECK19-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 23097 // CHECK19-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 23098 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 23099 // CHECK19: omp.inner.for.end: 23100 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 23101 // CHECK19: omp.loop.exit: 23102 // CHECK19-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 23103 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 23104 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 23105 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 23106 // CHECK19: omp.precond.end: 23107 // CHECK19-NEXT: ret void 23108 // 23109 // 23110 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163 23111 // CHECK19-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 23112 // CHECK19-NEXT: entry: 23113 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 23114 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 23115 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 23116 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 23117 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 23118 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 23119 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 23120 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 23121 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 23122 // CHECK19-NEXT: ret void 23123 // 23124 // 23125 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..8 23126 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 23127 // CHECK19-NEXT: entry: 23128 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 23129 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 23130 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 23131 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 23132 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 23133 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 23134 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 23135 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 23136 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 23137 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 23138 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 23139 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 23140 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 23141 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 23142 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4 23143 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 23144 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 23145 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 23146 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 23147 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 23148 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 23149 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 23150 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 23151 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 23152 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 23153 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 23154 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 23155 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 23156 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 23157 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 23158 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4 23159 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 23160 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 23161 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 23162 // CHECK19: omp.precond.then: 23163 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 23164 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 23165 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 23166 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 23167 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 23168 // CHECK19-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 23169 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 23170 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 23171 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23172 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 23173 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 23174 // CHECK19-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 23175 // CHECK19: cond.true: 23176 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 23177 // CHECK19-NEXT: br label [[COND_END:%.*]] 23178 // CHECK19: cond.false: 23179 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23180 // CHECK19-NEXT: br label [[COND_END]] 23181 // CHECK19: cond.end: 23182 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 23183 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 23184 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 23185 // CHECK19-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 23186 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 23187 // CHECK19: omp.inner.for.cond: 23188 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 23189 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23190 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 23191 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 23192 // CHECK19: omp.inner.for.body: 23193 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 23194 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23195 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 23196 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 23197 // CHECK19: omp.inner.for.inc: 23198 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 23199 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 23200 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 23201 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 23202 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 23203 // CHECK19: omp.inner.for.end: 23204 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 23205 // CHECK19: omp.loop.exit: 23206 // CHECK19-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 23207 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 23208 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 23209 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 23210 // CHECK19: omp.precond.end: 23211 // CHECK19-NEXT: ret void 23212 // 23213 // 23214 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..9 23215 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 23216 // CHECK19-NEXT: entry: 23217 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 23218 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 23219 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 23220 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 23221 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 23222 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 23223 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 23224 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 23225 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 23226 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 23227 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 23228 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 23229 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 23230 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 23231 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 23232 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 23233 // CHECK19-NEXT: [[I3:%.*]] = alloca i32, align 4 23234 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 23235 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 23236 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 23237 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 23238 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 23239 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 23240 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 23241 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 23242 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 23243 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 23244 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 23245 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 23246 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 23247 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 23248 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 23249 // CHECK19-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 23250 // CHECK19-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 23251 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4 23252 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 23253 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 23254 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 23255 // CHECK19: omp.precond.then: 23256 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 23257 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 23258 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 23259 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 23260 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 23261 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 23262 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 23263 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 23264 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 23265 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 23266 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 23267 // CHECK19-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 23268 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 23269 // CHECK19-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1) 23270 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 23271 // CHECK19: omp.dispatch.cond: 23272 // CHECK19-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 23273 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 23274 // CHECK19-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 23275 // CHECK19-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 23276 // CHECK19-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 23277 // CHECK19: omp.dispatch.body: 23278 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 23279 // CHECK19-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 23280 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 23281 // CHECK19: omp.inner.for.cond: 23282 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 23283 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15 23284 // CHECK19-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 23285 // CHECK19-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 23286 // CHECK19: omp.inner.for.body: 23287 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 23288 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 23289 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 23290 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !15 23291 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !15 23292 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP20]] 23293 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15 23294 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 23295 // CHECK19: omp.body.continue: 23296 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 23297 // CHECK19: omp.inner.for.inc: 23298 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 23299 // CHECK19-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP21]], 1 23300 // CHECK19-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 23301 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 23302 // CHECK19: omp.inner.for.end: 23303 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 23304 // CHECK19: omp.dispatch.inc: 23305 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]] 23306 // CHECK19: omp.dispatch.end: 23307 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 23308 // CHECK19: omp.precond.end: 23309 // CHECK19-NEXT: ret void 23310 // 23311 // 23312 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168 23313 // CHECK19-SAME: (i32 [[M:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 23314 // CHECK19-NEXT: entry: 23315 // CHECK19-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 23316 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 23317 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 23318 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 23319 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 23320 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 23321 // CHECK19-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 23322 // CHECK19-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 23323 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 23324 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 23325 // CHECK19-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 23326 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 23327 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4 23328 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 23329 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 23330 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 23331 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 23332 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]]) 23333 // CHECK19-NEXT: ret void 23334 // 23335 // 23336 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..11 23337 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 23338 // CHECK19-NEXT: entry: 23339 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 23340 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 23341 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 23342 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 23343 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 23344 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 23345 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 23346 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 23347 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 23348 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 23349 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 23350 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 23351 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 23352 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 23353 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 23354 // CHECK19-NEXT: [[I4:%.*]] = alloca i32, align 4 23355 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 23356 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 23357 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 23358 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 23359 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 23360 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 23361 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 23362 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 23363 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 23364 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 23365 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 23366 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 23367 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 23368 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 23369 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 23370 // CHECK19-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 23371 // CHECK19-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 23372 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4 23373 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 23374 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 23375 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 23376 // CHECK19: omp.precond.then: 23377 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 23378 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 23379 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 23380 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 23381 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 23382 // CHECK19-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 23383 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 23384 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 23385 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23386 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 23387 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 23388 // CHECK19-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 23389 // CHECK19: cond.true: 23390 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 23391 // CHECK19-NEXT: br label [[COND_END:%.*]] 23392 // CHECK19: cond.false: 23393 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23394 // CHECK19-NEXT: br label [[COND_END]] 23395 // CHECK19: cond.end: 23396 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 23397 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 23398 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 23399 // CHECK19-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 23400 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 23401 // CHECK19: omp.inner.for.cond: 23402 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 23403 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23404 // CHECK19-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 23405 // CHECK19-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 23406 // CHECK19: omp.inner.for.body: 23407 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 23408 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23409 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 23410 // CHECK19-NEXT: store i32 [[TMP18]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 23411 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 23412 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP19]]) 23413 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 23414 // CHECK19: omp.inner.for.inc: 23415 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 23416 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 23417 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 23418 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 23419 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 23420 // CHECK19: omp.inner.for.end: 23421 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 23422 // CHECK19: omp.loop.exit: 23423 // CHECK19-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 23424 // CHECK19-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 23425 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 23426 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 23427 // CHECK19: omp.precond.end: 23428 // CHECK19-NEXT: ret void 23429 // 23430 // 23431 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..12 23432 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 23433 // CHECK19-NEXT: entry: 23434 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 23435 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 23436 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 23437 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 23438 // CHECK19-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 23439 // CHECK19-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 23440 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 23441 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 23442 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 23443 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 23444 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 23445 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 23446 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 23447 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 23448 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 23449 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 23450 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 23451 // CHECK19-NEXT: [[I4:%.*]] = alloca i32, align 4 23452 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 23453 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 23454 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 23455 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 23456 // CHECK19-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 23457 // CHECK19-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 23458 // CHECK19-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 23459 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 23460 // CHECK19-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 23461 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 23462 // CHECK19-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 23463 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 23464 // CHECK19-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 23465 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 23466 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 23467 // CHECK19-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 23468 // CHECK19-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 23469 // CHECK19-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 23470 // CHECK19-NEXT: store i32 0, i32* [[I]], align 4 23471 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 23472 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 23473 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 23474 // CHECK19: omp.precond.then: 23475 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 23476 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 23477 // CHECK19-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 23478 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 23479 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 23480 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 23481 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 23482 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 23483 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 23484 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 23485 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 23486 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 23487 // CHECK19-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 23488 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 23489 // CHECK19-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]]) 23490 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 23491 // CHECK19: omp.dispatch.cond: 23492 // CHECK19-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 23493 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 23494 // CHECK19-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 23495 // CHECK19-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 23496 // CHECK19-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 23497 // CHECK19: omp.dispatch.body: 23498 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 23499 // CHECK19-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 23500 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 23501 // CHECK19: omp.inner.for.cond: 23502 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 23503 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18 23504 // CHECK19-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 23505 // CHECK19-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 23506 // CHECK19: omp.inner.for.body: 23507 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 23508 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 23509 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 23510 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !18 23511 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !18 23512 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP21]] 23513 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18 23514 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 23515 // CHECK19: omp.body.continue: 23516 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 23517 // CHECK19: omp.inner.for.inc: 23518 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 23519 // CHECK19-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP22]], 1 23520 // CHECK19-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 23521 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]] 23522 // CHECK19: omp.inner.for.end: 23523 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 23524 // CHECK19: omp.dispatch.inc: 23525 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]] 23526 // CHECK19: omp.dispatch.end: 23527 // CHECK19-NEXT: br label [[OMP_PRECOND_END]] 23528 // CHECK19: omp.precond.end: 23529 // CHECK19-NEXT: ret void 23530 // 23531 // 23532 // CHECK19-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 23533 // CHECK19-SAME: (i32 [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat { 23534 // CHECK19-NEXT: entry: 23535 // CHECK19-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 23536 // CHECK19-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 23537 // CHECK19-NEXT: [[M:%.*]] = alloca i32, align 4 23538 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 23539 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 23540 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 23541 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 23542 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4 23543 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4 23544 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4 23545 // CHECK19-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 23546 // CHECK19-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4 23547 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 4 23548 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 4 23549 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 4 23550 // CHECK19-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 23551 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 4 23552 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 4 23553 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 4 23554 // CHECK19-NEXT: [[_TMP16:%.*]] = alloca i32, align 4 23555 // CHECK19-NEXT: [[M_CASTED19:%.*]] = alloca i32, align 4 23556 // CHECK19-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [2 x i8*], align 4 23557 // CHECK19-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [2 x i8*], align 4 23558 // CHECK19-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [2 x i8*], align 4 23559 // CHECK19-NEXT: [[_TMP23:%.*]] = alloca i32, align 4 23560 // CHECK19-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 23561 // CHECK19-NEXT: store i32 10, i32* [[M]], align 4 23562 // CHECK19-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 23563 // CHECK19-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 23564 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4 23565 // CHECK19-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 23566 // CHECK19-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 23567 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4 23568 // CHECK19-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 23569 // CHECK19-NEXT: store i8* null, i8** [[TMP4]], align 4 23570 // CHECK19-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 23571 // CHECK19-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 23572 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 23573 // CHECK19-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 23574 // CHECK19-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 23575 // CHECK19-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 23576 // CHECK19: omp_offload.failed: 23577 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]] 23578 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT]] 23579 // CHECK19: omp_offload.cont: 23580 // CHECK19-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 23581 // CHECK19-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** 23582 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4 23583 // CHECK19-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 23584 // CHECK19-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** 23585 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4 23586 // CHECK19-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0 23587 // CHECK19-NEXT: store i8* null, i8** [[TMP13]], align 4 23588 // CHECK19-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 23589 // CHECK19-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 23590 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 23591 // CHECK19-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 23592 // CHECK19-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 23593 // CHECK19-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 23594 // CHECK19: omp_offload.failed5: 23595 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121([10 x i32]* [[A]]) #[[ATTR3]] 23596 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT6]] 23597 // CHECK19: omp_offload.cont6: 23598 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[M]], align 4 23599 // CHECK19-NEXT: store i32 [[TMP18]], i32* [[M_CASTED]], align 4 23600 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[M_CASTED]], align 4 23601 // CHECK19-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 23602 // CHECK19-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32* 23603 // CHECK19-NEXT: store i32 [[TMP19]], i32* [[TMP21]], align 4 23604 // CHECK19-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 23605 // CHECK19-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32* 23606 // CHECK19-NEXT: store i32 [[TMP19]], i32* [[TMP23]], align 4 23607 // CHECK19-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0 23608 // CHECK19-NEXT: store i8* null, i8** [[TMP24]], align 4 23609 // CHECK19-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1 23610 // CHECK19-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]** 23611 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 4 23612 // CHECK19-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1 23613 // CHECK19-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]** 23614 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 4 23615 // CHECK19-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 1 23616 // CHECK19-NEXT: store i8* null, i8** [[TMP29]], align 4 23617 // CHECK19-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 23618 // CHECK19-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 23619 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 23620 // CHECK19-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 23621 // CHECK19-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 23622 // CHECK19-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] 23623 // CHECK19: omp_offload.failed11: 23624 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i32 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]] 23625 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT12]] 23626 // CHECK19: omp_offload.cont12: 23627 // CHECK19-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 23628 // CHECK19-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]** 23629 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 4 23630 // CHECK19-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 23631 // CHECK19-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]** 23632 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 4 23633 // CHECK19-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 0 23634 // CHECK19-NEXT: store i8* null, i8** [[TMP38]], align 4 23635 // CHECK19-NEXT: [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 23636 // CHECK19-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 23637 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 23638 // CHECK19-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 23639 // CHECK19-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0 23640 // CHECK19-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]] 23641 // CHECK19: omp_offload.failed17: 23642 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131([10 x i32]* [[A]]) #[[ATTR3]] 23643 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT18]] 23644 // CHECK19: omp_offload.cont18: 23645 // CHECK19-NEXT: [[TMP43:%.*]] = load i32, i32* [[M]], align 4 23646 // CHECK19-NEXT: store i32 [[TMP43]], i32* [[M_CASTED19]], align 4 23647 // CHECK19-NEXT: [[TMP44:%.*]] = load i32, i32* [[M_CASTED19]], align 4 23648 // CHECK19-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 23649 // CHECK19-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32* 23650 // CHECK19-NEXT: store i32 [[TMP44]], i32* [[TMP46]], align 4 23651 // CHECK19-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 23652 // CHECK19-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32* 23653 // CHECK19-NEXT: store i32 [[TMP44]], i32* [[TMP48]], align 4 23654 // CHECK19-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 0 23655 // CHECK19-NEXT: store i8* null, i8** [[TMP49]], align 4 23656 // CHECK19-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1 23657 // CHECK19-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]** 23658 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 4 23659 // CHECK19-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 1 23660 // CHECK19-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]** 23661 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 4 23662 // CHECK19-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 1 23663 // CHECK19-NEXT: store i8* null, i8** [[TMP54]], align 4 23664 // CHECK19-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 23665 // CHECK19-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 23666 // CHECK19-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 23667 // CHECK19-NEXT: [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 23668 // CHECK19-NEXT: [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0 23669 // CHECK19-NEXT: br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]] 23670 // CHECK19: omp_offload.failed24: 23671 // CHECK19-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i32 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]] 23672 // CHECK19-NEXT: br label [[OMP_OFFLOAD_CONT25]] 23673 // CHECK19: omp_offload.cont25: 23674 // CHECK19-NEXT: ret i32 0 23675 // 23676 // 23677 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116 23678 // CHECK19-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 23679 // CHECK19-NEXT: entry: 23680 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 23681 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 23682 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 23683 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 23684 // CHECK19-NEXT: ret void 23685 // 23686 // 23687 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..14 23688 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 23689 // CHECK19-NEXT: entry: 23690 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 23691 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 23692 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 23693 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 23694 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 23695 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 23696 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 23697 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 23698 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 23699 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 23700 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 23701 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 23702 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 23703 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 23704 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 23705 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 23706 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 23707 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 23708 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 23709 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 23710 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 23711 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23712 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 23713 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 23714 // CHECK19: cond.true: 23715 // CHECK19-NEXT: br label [[COND_END:%.*]] 23716 // CHECK19: cond.false: 23717 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23718 // CHECK19-NEXT: br label [[COND_END]] 23719 // CHECK19: cond.end: 23720 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 23721 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 23722 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 23723 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 23724 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 23725 // CHECK19: omp.inner.for.cond: 23726 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 23727 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23728 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 23729 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 23730 // CHECK19: omp.inner.for.body: 23731 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 23732 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23733 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]) 23734 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 23735 // CHECK19: omp.inner.for.inc: 23736 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 23737 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 23738 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 23739 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 23740 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 23741 // CHECK19: omp.inner.for.end: 23742 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 23743 // CHECK19: omp.loop.exit: 23744 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 23745 // CHECK19-NEXT: ret void 23746 // 23747 // 23748 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..15 23749 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 23750 // CHECK19-NEXT: entry: 23751 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 23752 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 23753 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 23754 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 23755 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 23756 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 23757 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 23758 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 23759 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 23760 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 23761 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 23762 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 23763 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 23764 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 23765 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 23766 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 23767 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 23768 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 23769 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 23770 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 23771 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 23772 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 23773 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 23774 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 23775 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 23776 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 23777 // CHECK19-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 23778 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 23779 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 23780 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 23781 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 23782 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 23783 // CHECK19: cond.true: 23784 // CHECK19-NEXT: br label [[COND_END:%.*]] 23785 // CHECK19: cond.false: 23786 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 23787 // CHECK19-NEXT: br label [[COND_END]] 23788 // CHECK19: cond.end: 23789 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 23790 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 23791 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 23792 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 23793 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 23794 // CHECK19: omp.inner.for.cond: 23795 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 23796 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 23797 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 23798 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 23799 // CHECK19: omp.inner.for.body: 23800 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 23801 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 23802 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 23803 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4 23804 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 23805 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]] 23806 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 23807 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 23808 // CHECK19: omp.body.continue: 23809 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 23810 // CHECK19: omp.inner.for.inc: 23811 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 23812 // CHECK19-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 23813 // CHECK19-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 23814 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 23815 // CHECK19: omp.inner.for.end: 23816 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 23817 // CHECK19: omp.loop.exit: 23818 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 23819 // CHECK19-NEXT: ret void 23820 // 23821 // 23822 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121 23823 // CHECK19-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 23824 // CHECK19-NEXT: entry: 23825 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 23826 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 23827 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 23828 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 23829 // CHECK19-NEXT: ret void 23830 // 23831 // 23832 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..17 23833 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 23834 // CHECK19-NEXT: entry: 23835 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 23836 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 23837 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 23838 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 23839 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 23840 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 23841 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 23842 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 23843 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 23844 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 23845 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 23846 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 23847 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 23848 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 23849 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 23850 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 23851 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 23852 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 23853 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 23854 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 23855 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 23856 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23857 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 23858 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 23859 // CHECK19: cond.true: 23860 // CHECK19-NEXT: br label [[COND_END:%.*]] 23861 // CHECK19: cond.false: 23862 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23863 // CHECK19-NEXT: br label [[COND_END]] 23864 // CHECK19: cond.end: 23865 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 23866 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 23867 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 23868 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 23869 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 23870 // CHECK19: omp.inner.for.cond: 23871 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 23872 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23873 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 23874 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 23875 // CHECK19: omp.inner.for.body: 23876 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 23877 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 23878 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]) 23879 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 23880 // CHECK19: omp.inner.for.inc: 23881 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 23882 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 23883 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 23884 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 23885 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 23886 // CHECK19: omp.inner.for.end: 23887 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 23888 // CHECK19: omp.loop.exit: 23889 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 23890 // CHECK19-NEXT: ret void 23891 // 23892 // 23893 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..18 23894 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 23895 // CHECK19-NEXT: entry: 23896 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 23897 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 23898 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 23899 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 23900 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 23901 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 23902 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 23903 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 23904 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 23905 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 23906 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 23907 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 23908 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 23909 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 23910 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 23911 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 23912 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 23913 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 23914 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 23915 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 23916 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 23917 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 23918 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 23919 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 23920 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 23921 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 23922 // CHECK19-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 23923 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 23924 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 23925 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 23926 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 23927 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 23928 // CHECK19: cond.true: 23929 // CHECK19-NEXT: br label [[COND_END:%.*]] 23930 // CHECK19: cond.false: 23931 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 23932 // CHECK19-NEXT: br label [[COND_END]] 23933 // CHECK19: cond.end: 23934 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 23935 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 23936 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 23937 // CHECK19-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 23938 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 23939 // CHECK19: omp.inner.for.cond: 23940 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 23941 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 23942 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 23943 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 23944 // CHECK19: omp.inner.for.body: 23945 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 23946 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 23947 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 23948 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4 23949 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 23950 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]] 23951 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 23952 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 23953 // CHECK19: omp.body.continue: 23954 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 23955 // CHECK19: omp.inner.for.inc: 23956 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 23957 // CHECK19-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 23958 // CHECK19-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 23959 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 23960 // CHECK19: omp.inner.for.end: 23961 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 23962 // CHECK19: omp.loop.exit: 23963 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 23964 // CHECK19-NEXT: ret void 23965 // 23966 // 23967 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126 23968 // CHECK19-SAME: (i32 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 23969 // CHECK19-NEXT: entry: 23970 // CHECK19-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 23971 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 23972 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 23973 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 23974 // CHECK19-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 23975 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 23976 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 23977 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4 23978 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 23979 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 23980 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 23981 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 23982 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]]) 23983 // CHECK19-NEXT: ret void 23984 // 23985 // 23986 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..21 23987 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 23988 // CHECK19-NEXT: entry: 23989 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 23990 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 23991 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 23992 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 23993 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 23994 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 23995 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 23996 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 23997 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 23998 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 23999 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 24000 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 24001 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 24002 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 24003 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 24004 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 24005 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 24006 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 24007 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 24008 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 24009 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 24010 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 24011 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 24012 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 24013 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24014 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 24015 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 24016 // CHECK19: cond.true: 24017 // CHECK19-NEXT: br label [[COND_END:%.*]] 24018 // CHECK19: cond.false: 24019 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24020 // CHECK19-NEXT: br label [[COND_END]] 24021 // CHECK19: cond.end: 24022 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 24023 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 24024 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 24025 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 24026 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 24027 // CHECK19: omp.inner.for.cond: 24028 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24029 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24030 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 24031 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 24032 // CHECK19: omp.inner.for.body: 24033 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 24034 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24035 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 24036 // CHECK19-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 24037 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 24038 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]]) 24039 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 24040 // CHECK19: omp.inner.for.inc: 24041 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24042 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 24043 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 24044 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 24045 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 24046 // CHECK19: omp.inner.for.end: 24047 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 24048 // CHECK19: omp.loop.exit: 24049 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 24050 // CHECK19-NEXT: ret void 24051 // 24052 // 24053 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..22 24054 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 24055 // CHECK19-NEXT: entry: 24056 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 24057 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 24058 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 24059 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 24060 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 24061 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 24062 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 24063 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 24064 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 24065 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 24066 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 24067 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 24068 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 24069 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 24070 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 24071 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 24072 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 24073 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 24074 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 24075 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 24076 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 24077 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 24078 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 24079 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 24080 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 24081 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 24082 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 24083 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 24084 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 24085 // CHECK19-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 24086 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 24087 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]]) 24088 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 24089 // CHECK19: omp.dispatch.cond: 24090 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 24091 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 24092 // CHECK19-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP6]], [[TMP7]] 24093 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 24094 // CHECK19: cond.true: 24095 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 24096 // CHECK19-NEXT: br label [[COND_END:%.*]] 24097 // CHECK19: cond.false: 24098 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 24099 // CHECK19-NEXT: br label [[COND_END]] 24100 // CHECK19: cond.end: 24101 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP8]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 24102 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 24103 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 24104 // CHECK19-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 24105 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24106 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 24107 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 24108 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 24109 // CHECK19: omp.dispatch.body: 24110 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 24111 // CHECK19: omp.inner.for.cond: 24112 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24113 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 24114 // CHECK19-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 24115 // CHECK19-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 24116 // CHECK19: omp.inner.for.body: 24117 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24118 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 24119 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 24120 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4 24121 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4 24122 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP16]] 24123 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 24124 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 24125 // CHECK19: omp.body.continue: 24126 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 24127 // CHECK19: omp.inner.for.inc: 24128 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24129 // CHECK19-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1 24130 // CHECK19-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 24131 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 24132 // CHECK19: omp.inner.for.end: 24133 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 24134 // CHECK19: omp.dispatch.inc: 24135 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 24136 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 24137 // CHECK19-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 24138 // CHECK19-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 24139 // CHECK19-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 24140 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 24141 // CHECK19-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 24142 // CHECK19-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 24143 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]] 24144 // CHECK19: omp.dispatch.end: 24145 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 24146 // CHECK19-NEXT: ret void 24147 // 24148 // 24149 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131 24150 // CHECK19-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 24151 // CHECK19-NEXT: entry: 24152 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 24153 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 24154 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 24155 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 24156 // CHECK19-NEXT: ret void 24157 // 24158 // 24159 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..25 24160 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 24161 // CHECK19-NEXT: entry: 24162 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 24163 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 24164 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 24165 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 24166 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 24167 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 24168 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 24169 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 24170 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 24171 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 24172 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 24173 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 24174 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 24175 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 24176 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 24177 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 24178 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 24179 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 24180 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 24181 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 24182 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 24183 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24184 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 24185 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 24186 // CHECK19: cond.true: 24187 // CHECK19-NEXT: br label [[COND_END:%.*]] 24188 // CHECK19: cond.false: 24189 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24190 // CHECK19-NEXT: br label [[COND_END]] 24191 // CHECK19: cond.end: 24192 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 24193 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 24194 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 24195 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 24196 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 24197 // CHECK19: omp.inner.for.cond: 24198 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24199 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24200 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 24201 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 24202 // CHECK19: omp.inner.for.body: 24203 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 24204 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24205 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]) 24206 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 24207 // CHECK19: omp.inner.for.inc: 24208 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24209 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 24210 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 24211 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 24212 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 24213 // CHECK19: omp.inner.for.end: 24214 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 24215 // CHECK19: omp.loop.exit: 24216 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 24217 // CHECK19-NEXT: ret void 24218 // 24219 // 24220 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..26 24221 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 24222 // CHECK19-NEXT: entry: 24223 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 24224 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 24225 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 24226 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 24227 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 24228 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 24229 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 24230 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 24231 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 24232 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 24233 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 24234 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 24235 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 24236 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 24237 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 24238 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 24239 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 24240 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 24241 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 24242 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 24243 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 24244 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 24245 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 24246 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 24247 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 24248 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 24249 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 24250 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 24251 // CHECK19-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 24252 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 24253 // CHECK19-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 24254 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 24255 // CHECK19: omp.dispatch.cond: 24256 // CHECK19-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 24257 // CHECK19-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 24258 // CHECK19-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 24259 // CHECK19: omp.dispatch.body: 24260 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 24261 // CHECK19-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 24262 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 24263 // CHECK19: omp.inner.for.cond: 24264 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 24265 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21 24266 // CHECK19-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 24267 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 24268 // CHECK19: omp.inner.for.body: 24269 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 24270 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 24271 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 24272 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21 24273 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21 24274 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP12]] 24275 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21 24276 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 24277 // CHECK19: omp.body.continue: 24278 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 24279 // CHECK19: omp.inner.for.inc: 24280 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 24281 // CHECK19-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 24282 // CHECK19-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 24283 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]] 24284 // CHECK19: omp.inner.for.end: 24285 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 24286 // CHECK19: omp.dispatch.inc: 24287 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]] 24288 // CHECK19: omp.dispatch.end: 24289 // CHECK19-NEXT: ret void 24290 // 24291 // 24292 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136 24293 // CHECK19-SAME: (i32 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 24294 // CHECK19-NEXT: entry: 24295 // CHECK19-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 24296 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 24297 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 24298 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 24299 // CHECK19-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 24300 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 24301 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 24302 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4 24303 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 24304 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 24305 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 24306 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 24307 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]]) 24308 // CHECK19-NEXT: ret void 24309 // 24310 // 24311 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..29 24312 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 24313 // CHECK19-NEXT: entry: 24314 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 24315 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 24316 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 24317 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 24318 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 24319 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 24320 // CHECK19-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 24321 // CHECK19-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 24322 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 24323 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 24324 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 24325 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 24326 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 24327 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 24328 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 24329 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 24330 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 24331 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 24332 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 24333 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 24334 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 24335 // CHECK19-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 24336 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 24337 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 24338 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24339 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 24340 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 24341 // CHECK19: cond.true: 24342 // CHECK19-NEXT: br label [[COND_END:%.*]] 24343 // CHECK19: cond.false: 24344 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24345 // CHECK19-NEXT: br label [[COND_END]] 24346 // CHECK19: cond.end: 24347 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 24348 // CHECK19-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 24349 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 24350 // CHECK19-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 24351 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 24352 // CHECK19: omp.inner.for.cond: 24353 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24354 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24355 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 24356 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 24357 // CHECK19: omp.inner.for.body: 24358 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 24359 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24360 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 24361 // CHECK19-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 24362 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 24363 // CHECK19-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]]) 24364 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 24365 // CHECK19: omp.inner.for.inc: 24366 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24367 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 24368 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 24369 // CHECK19-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 24370 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]] 24371 // CHECK19: omp.inner.for.end: 24372 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 24373 // CHECK19: omp.loop.exit: 24374 // CHECK19-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 24375 // CHECK19-NEXT: ret void 24376 // 24377 // 24378 // CHECK19-LABEL: define {{[^@]+}}@.omp_outlined..30 24379 // CHECK19-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 24380 // CHECK19-NEXT: entry: 24381 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 24382 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 24383 // CHECK19-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 24384 // CHECK19-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 24385 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 24386 // CHECK19-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 24387 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 24388 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4 24389 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 24390 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 24391 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 24392 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 24393 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4 24394 // CHECK19-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 24395 // CHECK19-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 24396 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 24397 // CHECK19-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 24398 // CHECK19-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 24399 // CHECK19-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 24400 // CHECK19-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 24401 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 24402 // CHECK19-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 24403 // CHECK19-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 24404 // CHECK19-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 24405 // CHECK19-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 24406 // CHECK19-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 24407 // CHECK19-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 24408 // CHECK19-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 24409 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 24410 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 24411 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 24412 // CHECK19-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 24413 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 24414 // CHECK19-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]]) 24415 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 24416 // CHECK19: omp.dispatch.cond: 24417 // CHECK19-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 24418 // CHECK19-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0 24419 // CHECK19-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 24420 // CHECK19: omp.dispatch.body: 24421 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 24422 // CHECK19-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 24423 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 24424 // CHECK19: omp.inner.for.cond: 24425 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 24426 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !24 24427 // CHECK19-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 24428 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 24429 // CHECK19: omp.inner.for.body: 24430 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 24431 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 24432 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 24433 // CHECK19-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !24 24434 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !24 24435 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP13]] 24436 // CHECK19-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !24 24437 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 24438 // CHECK19: omp.body.continue: 24439 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 24440 // CHECK19: omp.inner.for.inc: 24441 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 24442 // CHECK19-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP14]], 1 24443 // CHECK19-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 24444 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]] 24445 // CHECK19: omp.inner.for.end: 24446 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 24447 // CHECK19: omp.dispatch.inc: 24448 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]] 24449 // CHECK19: omp.dispatch.end: 24450 // CHECK19-NEXT: ret void 24451 // 24452 // 24453 // CHECK19-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 24454 // CHECK19-SAME: () #[[ATTR5:[0-9]+]] { 24455 // CHECK19-NEXT: entry: 24456 // CHECK19-NEXT: call void @__tgt_register_requires(i64 1) 24457 // CHECK19-NEXT: ret void 24458 // 24459 // 24460 // CHECK20-LABEL: define {{[^@]+}}@main 24461 // CHECK20-SAME: (i32 [[ARGC:%.*]], i8** [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] { 24462 // CHECK20-NEXT: entry: 24463 // CHECK20-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 24464 // CHECK20-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 24465 // CHECK20-NEXT: [[ARGV_ADDR:%.*]] = alloca i8**, align 4 24466 // CHECK20-NEXT: [[N:%.*]] = alloca i32, align 4 24467 // CHECK20-NEXT: [[SAVED_STACK:%.*]] = alloca i8*, align 4 24468 // CHECK20-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4 24469 // CHECK20-NEXT: [[M:%.*]] = alloca i32, align 4 24470 // CHECK20-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4 24471 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x i8*], align 4 24472 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x i8*], align 4 24473 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x i8*], align 4 24474 // CHECK20-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4 24475 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 24476 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 24477 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 24478 // CHECK20-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4 24479 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x i8*], align 4 24480 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x i8*], align 4 24481 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x i8*], align 4 24482 // CHECK20-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4 24483 // CHECK20-NEXT: [[_TMP8:%.*]] = alloca i32, align 4 24484 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4 24485 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4 24486 // CHECK20-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4 24487 // CHECK20-NEXT: [[N_CASTED17:%.*]] = alloca i32, align 4 24488 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS18:%.*]] = alloca [4 x i8*], align 4 24489 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS19:%.*]] = alloca [4 x i8*], align 4 24490 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS20:%.*]] = alloca [4 x i8*], align 4 24491 // CHECK20-NEXT: [[DOTOFFLOAD_SIZES21:%.*]] = alloca [4 x i64], align 4 24492 // CHECK20-NEXT: [[_TMP22:%.*]] = alloca i32, align 4 24493 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_23:%.*]] = alloca i32, align 4 24494 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4 24495 // CHECK20-NEXT: [[N_CASTED31:%.*]] = alloca i32, align 4 24496 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS32:%.*]] = alloca [3 x i8*], align 4 24497 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS33:%.*]] = alloca [3 x i8*], align 4 24498 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS34:%.*]] = alloca [3 x i8*], align 4 24499 // CHECK20-NEXT: [[DOTOFFLOAD_SIZES35:%.*]] = alloca [3 x i64], align 4 24500 // CHECK20-NEXT: [[_TMP36:%.*]] = alloca i32, align 4 24501 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_37:%.*]] = alloca i32, align 4 24502 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4 24503 // CHECK20-NEXT: [[M_CASTED45:%.*]] = alloca i32, align 4 24504 // CHECK20-NEXT: [[N_CASTED46:%.*]] = alloca i32, align 4 24505 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS47:%.*]] = alloca [4 x i8*], align 4 24506 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS48:%.*]] = alloca [4 x i8*], align 4 24507 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS49:%.*]] = alloca [4 x i8*], align 4 24508 // CHECK20-NEXT: [[DOTOFFLOAD_SIZES50:%.*]] = alloca [4 x i64], align 4 24509 // CHECK20-NEXT: [[_TMP51:%.*]] = alloca i32, align 4 24510 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_52:%.*]] = alloca i32, align 4 24511 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_53:%.*]] = alloca i32, align 4 24512 // CHECK20-NEXT: store i32 0, i32* [[RETVAL]], align 4 24513 // CHECK20-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 24514 // CHECK20-NEXT: store i8** [[ARGV]], i8*** [[ARGV_ADDR]], align 4 24515 // CHECK20-NEXT: store i32 100, i32* [[N]], align 4 24516 // CHECK20-NEXT: [[TMP0:%.*]] = load i32, i32* [[N]], align 4 24517 // CHECK20-NEXT: [[TMP1:%.*]] = call i8* @llvm.stacksave() 24518 // CHECK20-NEXT: store i8* [[TMP1]], i8** [[SAVED_STACK]], align 4 24519 // CHECK20-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4 24520 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[__VLA_EXPR0]], align 4 24521 // CHECK20-NEXT: store i32 10, i32* [[M]], align 4 24522 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[N]], align 4 24523 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[N_CASTED]], align 4 24524 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[N_CASTED]], align 4 24525 // CHECK20-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4 24526 // CHECK20-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64 24527 // CHECK20-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 24528 // CHECK20-NEXT: [[TMP7:%.*]] = bitcast i8** [[TMP6]] to i32* 24529 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[TMP7]], align 4 24530 // CHECK20-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 24531 // CHECK20-NEXT: [[TMP9:%.*]] = bitcast i8** [[TMP8]] to i32* 24532 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[TMP9]], align 4 24533 // CHECK20-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 24534 // CHECK20-NEXT: store i64 4, i64* [[TMP10]], align 4 24535 // CHECK20-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 24536 // CHECK20-NEXT: store i8* null, i8** [[TMP11]], align 4 24537 // CHECK20-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1 24538 // CHECK20-NEXT: [[TMP13:%.*]] = bitcast i8** [[TMP12]] to i32* 24539 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[TMP13]], align 4 24540 // CHECK20-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 1 24541 // CHECK20-NEXT: [[TMP15:%.*]] = bitcast i8** [[TMP14]] to i32* 24542 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[TMP15]], align 4 24543 // CHECK20-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 1 24544 // CHECK20-NEXT: store i64 4, i64* [[TMP16]], align 4 24545 // CHECK20-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1 24546 // CHECK20-NEXT: store i8* null, i8** [[TMP17]], align 4 24547 // CHECK20-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2 24548 // CHECK20-NEXT: [[TMP19:%.*]] = bitcast i8** [[TMP18]] to i32** 24549 // CHECK20-NEXT: store i32* [[VLA]], i32** [[TMP19]], align 4 24550 // CHECK20-NEXT: [[TMP20:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 2 24551 // CHECK20-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32** 24552 // CHECK20-NEXT: store i32* [[VLA]], i32** [[TMP21]], align 4 24553 // CHECK20-NEXT: [[TMP22:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 2 24554 // CHECK20-NEXT: store i64 [[TMP5]], i64* [[TMP22]], align 4 24555 // CHECK20-NEXT: [[TMP23:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2 24556 // CHECK20-NEXT: store i8* null, i8** [[TMP23]], align 4 24557 // CHECK20-NEXT: [[TMP24:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 24558 // CHECK20-NEXT: [[TMP25:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 24559 // CHECK20-NEXT: [[TMP26:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES]], i32 0, i32 0 24560 // CHECK20-NEXT: [[TMP27:%.*]] = load i32, i32* [[N]], align 4 24561 // CHECK20-NEXT: store i32 [[TMP27]], i32* [[DOTCAPTURE_EXPR_]], align 4 24562 // CHECK20-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 24563 // CHECK20-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP28]], 0 24564 // CHECK20-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 24565 // CHECK20-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 24566 // CHECK20-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 24567 // CHECK20-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 24568 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP29]], 1 24569 // CHECK20-NEXT: [[TMP30:%.*]] = zext i32 [[ADD]] to i64 24570 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3:[0-9]+]], i64 -1, i64 [[TMP30]]) 24571 // CHECK20-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, i32 3, i8** [[TMP24]], i8** [[TMP25]], i64* [[TMP26]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 24572 // CHECK20-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0 24573 // CHECK20-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 24574 // CHECK20: omp_offload.failed: 24575 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i32 [[TMP3]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3:[0-9]+]] 24576 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT]] 24577 // CHECK20: omp_offload.cont: 24578 // CHECK20-NEXT: [[TMP33:%.*]] = load i32, i32* [[N]], align 4 24579 // CHECK20-NEXT: store i32 [[TMP33]], i32* [[N_CASTED3]], align 4 24580 // CHECK20-NEXT: [[TMP34:%.*]] = load i32, i32* [[N_CASTED3]], align 4 24581 // CHECK20-NEXT: [[TMP35:%.*]] = mul nuw i32 [[TMP0]], 4 24582 // CHECK20-NEXT: [[TMP36:%.*]] = sext i32 [[TMP35]] to i64 24583 // CHECK20-NEXT: [[TMP37:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 24584 // CHECK20-NEXT: [[TMP38:%.*]] = bitcast i8** [[TMP37]] to i32* 24585 // CHECK20-NEXT: store i32 [[TMP34]], i32* [[TMP38]], align 4 24586 // CHECK20-NEXT: [[TMP39:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 24587 // CHECK20-NEXT: [[TMP40:%.*]] = bitcast i8** [[TMP39]] to i32* 24588 // CHECK20-NEXT: store i32 [[TMP34]], i32* [[TMP40]], align 4 24589 // CHECK20-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0 24590 // CHECK20-NEXT: store i64 4, i64* [[TMP41]], align 4 24591 // CHECK20-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0 24592 // CHECK20-NEXT: store i8* null, i8** [[TMP42]], align 4 24593 // CHECK20-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1 24594 // CHECK20-NEXT: [[TMP44:%.*]] = bitcast i8** [[TMP43]] to i32* 24595 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[TMP44]], align 4 24596 // CHECK20-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 1 24597 // CHECK20-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32* 24598 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[TMP46]], align 4 24599 // CHECK20-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 1 24600 // CHECK20-NEXT: store i64 4, i64* [[TMP47]], align 4 24601 // CHECK20-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1 24602 // CHECK20-NEXT: store i8* null, i8** [[TMP48]], align 4 24603 // CHECK20-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2 24604 // CHECK20-NEXT: [[TMP50:%.*]] = bitcast i8** [[TMP49]] to i32** 24605 // CHECK20-NEXT: store i32* [[VLA]], i32** [[TMP50]], align 4 24606 // CHECK20-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 2 24607 // CHECK20-NEXT: [[TMP52:%.*]] = bitcast i8** [[TMP51]] to i32** 24608 // CHECK20-NEXT: store i32* [[VLA]], i32** [[TMP52]], align 4 24609 // CHECK20-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 2 24610 // CHECK20-NEXT: store i64 [[TMP36]], i64* [[TMP53]], align 4 24611 // CHECK20-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2 24612 // CHECK20-NEXT: store i8* null, i8** [[TMP54]], align 4 24613 // CHECK20-NEXT: [[TMP55:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0 24614 // CHECK20-NEXT: [[TMP56:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS5]], i32 0, i32 0 24615 // CHECK20-NEXT: [[TMP57:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES7]], i32 0, i32 0 24616 // CHECK20-NEXT: [[TMP58:%.*]] = load i32, i32* [[N]], align 4 24617 // CHECK20-NEXT: store i32 [[TMP58]], i32* [[DOTCAPTURE_EXPR_9]], align 4 24618 // CHECK20-NEXT: [[TMP59:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_9]], align 4 24619 // CHECK20-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP59]], 0 24620 // CHECK20-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1 24621 // CHECK20-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1 24622 // CHECK20-NEXT: store i32 [[SUB13]], i32* [[DOTCAPTURE_EXPR_10]], align 4 24623 // CHECK20-NEXT: [[TMP60:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_10]], align 4 24624 // CHECK20-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP60]], 1 24625 // CHECK20-NEXT: [[TMP61:%.*]] = zext i32 [[ADD14]] to i64 24626 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP61]]) 24627 // CHECK20-NEXT: [[TMP62:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, i32 3, i8** [[TMP55]], i8** [[TMP56]], i64* [[TMP57]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.4, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 24628 // CHECK20-NEXT: [[TMP63:%.*]] = icmp ne i32 [[TMP62]], 0 24629 // CHECK20-NEXT: br i1 [[TMP63]], label [[OMP_OFFLOAD_FAILED15:%.*]], label [[OMP_OFFLOAD_CONT16:%.*]] 24630 // CHECK20: omp_offload.failed15: 24631 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i32 [[TMP34]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 24632 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT16]] 24633 // CHECK20: omp_offload.cont16: 24634 // CHECK20-NEXT: [[TMP64:%.*]] = load i32, i32* [[M]], align 4 24635 // CHECK20-NEXT: store i32 [[TMP64]], i32* [[M_CASTED]], align 4 24636 // CHECK20-NEXT: [[TMP65:%.*]] = load i32, i32* [[M_CASTED]], align 4 24637 // CHECK20-NEXT: [[TMP66:%.*]] = load i32, i32* [[N]], align 4 24638 // CHECK20-NEXT: store i32 [[TMP66]], i32* [[N_CASTED17]], align 4 24639 // CHECK20-NEXT: [[TMP67:%.*]] = load i32, i32* [[N_CASTED17]], align 4 24640 // CHECK20-NEXT: [[TMP68:%.*]] = mul nuw i32 [[TMP0]], 4 24641 // CHECK20-NEXT: [[TMP69:%.*]] = sext i32 [[TMP68]] to i64 24642 // CHECK20-NEXT: [[TMP70:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0 24643 // CHECK20-NEXT: [[TMP71:%.*]] = bitcast i8** [[TMP70]] to i32* 24644 // CHECK20-NEXT: store i32 [[TMP65]], i32* [[TMP71]], align 4 24645 // CHECK20-NEXT: [[TMP72:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0 24646 // CHECK20-NEXT: [[TMP73:%.*]] = bitcast i8** [[TMP72]] to i32* 24647 // CHECK20-NEXT: store i32 [[TMP65]], i32* [[TMP73]], align 4 24648 // CHECK20-NEXT: [[TMP74:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0 24649 // CHECK20-NEXT: store i64 4, i64* [[TMP74]], align 4 24650 // CHECK20-NEXT: [[TMP75:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 0 24651 // CHECK20-NEXT: store i8* null, i8** [[TMP75]], align 4 24652 // CHECK20-NEXT: [[TMP76:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 1 24653 // CHECK20-NEXT: [[TMP77:%.*]] = bitcast i8** [[TMP76]] to i32* 24654 // CHECK20-NEXT: store i32 [[TMP67]], i32* [[TMP77]], align 4 24655 // CHECK20-NEXT: [[TMP78:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 1 24656 // CHECK20-NEXT: [[TMP79:%.*]] = bitcast i8** [[TMP78]] to i32* 24657 // CHECK20-NEXT: store i32 [[TMP67]], i32* [[TMP79]], align 4 24658 // CHECK20-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 1 24659 // CHECK20-NEXT: store i64 4, i64* [[TMP80]], align 4 24660 // CHECK20-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 1 24661 // CHECK20-NEXT: store i8* null, i8** [[TMP81]], align 4 24662 // CHECK20-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 2 24663 // CHECK20-NEXT: [[TMP83:%.*]] = bitcast i8** [[TMP82]] to i32* 24664 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[TMP83]], align 4 24665 // CHECK20-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 2 24666 // CHECK20-NEXT: [[TMP85:%.*]] = bitcast i8** [[TMP84]] to i32* 24667 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[TMP85]], align 4 24668 // CHECK20-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 2 24669 // CHECK20-NEXT: store i64 4, i64* [[TMP86]], align 4 24670 // CHECK20-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 2 24671 // CHECK20-NEXT: store i8* null, i8** [[TMP87]], align 4 24672 // CHECK20-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 3 24673 // CHECK20-NEXT: [[TMP89:%.*]] = bitcast i8** [[TMP88]] to i32** 24674 // CHECK20-NEXT: store i32* [[VLA]], i32** [[TMP89]], align 4 24675 // CHECK20-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 3 24676 // CHECK20-NEXT: [[TMP91:%.*]] = bitcast i8** [[TMP90]] to i32** 24677 // CHECK20-NEXT: store i32* [[VLA]], i32** [[TMP91]], align 4 24678 // CHECK20-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 3 24679 // CHECK20-NEXT: store i64 [[TMP69]], i64* [[TMP92]], align 4 24680 // CHECK20-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS20]], i32 0, i32 3 24681 // CHECK20-NEXT: store i8* null, i8** [[TMP93]], align 4 24682 // CHECK20-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS18]], i32 0, i32 0 24683 // CHECK20-NEXT: [[TMP95:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS19]], i32 0, i32 0 24684 // CHECK20-NEXT: [[TMP96:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES21]], i32 0, i32 0 24685 // CHECK20-NEXT: [[TMP97:%.*]] = load i32, i32* [[N]], align 4 24686 // CHECK20-NEXT: store i32 [[TMP97]], i32* [[DOTCAPTURE_EXPR_23]], align 4 24687 // CHECK20-NEXT: [[TMP98:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_23]], align 4 24688 // CHECK20-NEXT: [[SUB25:%.*]] = sub nsw i32 [[TMP98]], 0 24689 // CHECK20-NEXT: [[DIV26:%.*]] = sdiv i32 [[SUB25]], 1 24690 // CHECK20-NEXT: [[SUB27:%.*]] = sub nsw i32 [[DIV26]], 1 24691 // CHECK20-NEXT: store i32 [[SUB27]], i32* [[DOTCAPTURE_EXPR_24]], align 4 24692 // CHECK20-NEXT: [[TMP99:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_24]], align 4 24693 // CHECK20-NEXT: [[ADD28:%.*]] = add nsw i32 [[TMP99]], 1 24694 // CHECK20-NEXT: [[TMP100:%.*]] = zext i32 [[ADD28]] to i64 24695 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP100]]) 24696 // CHECK20-NEXT: [[TMP101:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, i32 4, i8** [[TMP94]], i8** [[TMP95]], i64* [[TMP96]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.7, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 24697 // CHECK20-NEXT: [[TMP102:%.*]] = icmp ne i32 [[TMP101]], 0 24698 // CHECK20-NEXT: br i1 [[TMP102]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]] 24699 // CHECK20: omp_offload.failed29: 24700 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i32 [[TMP65]], i32 [[TMP67]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 24701 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT30]] 24702 // CHECK20: omp_offload.cont30: 24703 // CHECK20-NEXT: [[TMP103:%.*]] = load i32, i32* [[N]], align 4 24704 // CHECK20-NEXT: store i32 [[TMP103]], i32* [[N_CASTED31]], align 4 24705 // CHECK20-NEXT: [[TMP104:%.*]] = load i32, i32* [[N_CASTED31]], align 4 24706 // CHECK20-NEXT: [[TMP105:%.*]] = mul nuw i32 [[TMP0]], 4 24707 // CHECK20-NEXT: [[TMP106:%.*]] = sext i32 [[TMP105]] to i64 24708 // CHECK20-NEXT: [[TMP107:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0 24709 // CHECK20-NEXT: [[TMP108:%.*]] = bitcast i8** [[TMP107]] to i32* 24710 // CHECK20-NEXT: store i32 [[TMP104]], i32* [[TMP108]], align 4 24711 // CHECK20-NEXT: [[TMP109:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0 24712 // CHECK20-NEXT: [[TMP110:%.*]] = bitcast i8** [[TMP109]] to i32* 24713 // CHECK20-NEXT: store i32 [[TMP104]], i32* [[TMP110]], align 4 24714 // CHECK20-NEXT: [[TMP111:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 0 24715 // CHECK20-NEXT: store i64 4, i64* [[TMP111]], align 4 24716 // CHECK20-NEXT: [[TMP112:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 0 24717 // CHECK20-NEXT: store i8* null, i8** [[TMP112]], align 4 24718 // CHECK20-NEXT: [[TMP113:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 1 24719 // CHECK20-NEXT: [[TMP114:%.*]] = bitcast i8** [[TMP113]] to i32* 24720 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[TMP114]], align 4 24721 // CHECK20-NEXT: [[TMP115:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 1 24722 // CHECK20-NEXT: [[TMP116:%.*]] = bitcast i8** [[TMP115]] to i32* 24723 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[TMP116]], align 4 24724 // CHECK20-NEXT: [[TMP117:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 1 24725 // CHECK20-NEXT: store i64 4, i64* [[TMP117]], align 4 24726 // CHECK20-NEXT: [[TMP118:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 1 24727 // CHECK20-NEXT: store i8* null, i8** [[TMP118]], align 4 24728 // CHECK20-NEXT: [[TMP119:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 2 24729 // CHECK20-NEXT: [[TMP120:%.*]] = bitcast i8** [[TMP119]] to i32** 24730 // CHECK20-NEXT: store i32* [[VLA]], i32** [[TMP120]], align 4 24731 // CHECK20-NEXT: [[TMP121:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 2 24732 // CHECK20-NEXT: [[TMP122:%.*]] = bitcast i8** [[TMP121]] to i32** 24733 // CHECK20-NEXT: store i32* [[VLA]], i32** [[TMP122]], align 4 24734 // CHECK20-NEXT: [[TMP123:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 2 24735 // CHECK20-NEXT: store i64 [[TMP106]], i64* [[TMP123]], align 4 24736 // CHECK20-NEXT: [[TMP124:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_MAPPERS34]], i32 0, i32 2 24737 // CHECK20-NEXT: store i8* null, i8** [[TMP124]], align 4 24738 // CHECK20-NEXT: [[TMP125:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_BASEPTRS32]], i32 0, i32 0 24739 // CHECK20-NEXT: [[TMP126:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[DOTOFFLOAD_PTRS33]], i32 0, i32 0 24740 // CHECK20-NEXT: [[TMP127:%.*]] = getelementptr inbounds [3 x i64], [3 x i64]* [[DOTOFFLOAD_SIZES35]], i32 0, i32 0 24741 // CHECK20-NEXT: [[TMP128:%.*]] = load i32, i32* [[N]], align 4 24742 // CHECK20-NEXT: store i32 [[TMP128]], i32* [[DOTCAPTURE_EXPR_37]], align 4 24743 // CHECK20-NEXT: [[TMP129:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_37]], align 4 24744 // CHECK20-NEXT: [[SUB39:%.*]] = sub nsw i32 [[TMP129]], 0 24745 // CHECK20-NEXT: [[DIV40:%.*]] = sdiv i32 [[SUB39]], 1 24746 // CHECK20-NEXT: [[SUB41:%.*]] = sub nsw i32 [[DIV40]], 1 24747 // CHECK20-NEXT: store i32 [[SUB41]], i32* [[DOTCAPTURE_EXPR_38]], align 4 24748 // CHECK20-NEXT: [[TMP130:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_38]], align 4 24749 // CHECK20-NEXT: [[ADD42:%.*]] = add nsw i32 [[TMP130]], 1 24750 // CHECK20-NEXT: [[TMP131:%.*]] = zext i32 [[ADD42]] to i64 24751 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP131]]) 24752 // CHECK20-NEXT: [[TMP132:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, i32 3, i8** [[TMP125]], i8** [[TMP126]], i64* [[TMP127]], i64* getelementptr inbounds ([3 x i64], [3 x i64]* @.offload_maptypes.10, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 24753 // CHECK20-NEXT: [[TMP133:%.*]] = icmp ne i32 [[TMP132]], 0 24754 // CHECK20-NEXT: br i1 [[TMP133]], label [[OMP_OFFLOAD_FAILED43:%.*]], label [[OMP_OFFLOAD_CONT44:%.*]] 24755 // CHECK20: omp_offload.failed43: 24756 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i32 [[TMP104]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 24757 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT44]] 24758 // CHECK20: omp_offload.cont44: 24759 // CHECK20-NEXT: [[TMP134:%.*]] = load i32, i32* [[M]], align 4 24760 // CHECK20-NEXT: store i32 [[TMP134]], i32* [[M_CASTED45]], align 4 24761 // CHECK20-NEXT: [[TMP135:%.*]] = load i32, i32* [[M_CASTED45]], align 4 24762 // CHECK20-NEXT: [[TMP136:%.*]] = load i32, i32* [[N]], align 4 24763 // CHECK20-NEXT: store i32 [[TMP136]], i32* [[N_CASTED46]], align 4 24764 // CHECK20-NEXT: [[TMP137:%.*]] = load i32, i32* [[N_CASTED46]], align 4 24765 // CHECK20-NEXT: [[TMP138:%.*]] = mul nuw i32 [[TMP0]], 4 24766 // CHECK20-NEXT: [[TMP139:%.*]] = sext i32 [[TMP138]] to i64 24767 // CHECK20-NEXT: [[TMP140:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0 24768 // CHECK20-NEXT: [[TMP141:%.*]] = bitcast i8** [[TMP140]] to i32* 24769 // CHECK20-NEXT: store i32 [[TMP135]], i32* [[TMP141]], align 4 24770 // CHECK20-NEXT: [[TMP142:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0 24771 // CHECK20-NEXT: [[TMP143:%.*]] = bitcast i8** [[TMP142]] to i32* 24772 // CHECK20-NEXT: store i32 [[TMP135]], i32* [[TMP143]], align 4 24773 // CHECK20-NEXT: [[TMP144:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 0 24774 // CHECK20-NEXT: store i64 4, i64* [[TMP144]], align 4 24775 // CHECK20-NEXT: [[TMP145:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 0 24776 // CHECK20-NEXT: store i8* null, i8** [[TMP145]], align 4 24777 // CHECK20-NEXT: [[TMP146:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 1 24778 // CHECK20-NEXT: [[TMP147:%.*]] = bitcast i8** [[TMP146]] to i32* 24779 // CHECK20-NEXT: store i32 [[TMP137]], i32* [[TMP147]], align 4 24780 // CHECK20-NEXT: [[TMP148:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 1 24781 // CHECK20-NEXT: [[TMP149:%.*]] = bitcast i8** [[TMP148]] to i32* 24782 // CHECK20-NEXT: store i32 [[TMP137]], i32* [[TMP149]], align 4 24783 // CHECK20-NEXT: [[TMP150:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 1 24784 // CHECK20-NEXT: store i64 4, i64* [[TMP150]], align 4 24785 // CHECK20-NEXT: [[TMP151:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 1 24786 // CHECK20-NEXT: store i8* null, i8** [[TMP151]], align 4 24787 // CHECK20-NEXT: [[TMP152:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 2 24788 // CHECK20-NEXT: [[TMP153:%.*]] = bitcast i8** [[TMP152]] to i32* 24789 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[TMP153]], align 4 24790 // CHECK20-NEXT: [[TMP154:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 2 24791 // CHECK20-NEXT: [[TMP155:%.*]] = bitcast i8** [[TMP154]] to i32* 24792 // CHECK20-NEXT: store i32 [[TMP0]], i32* [[TMP155]], align 4 24793 // CHECK20-NEXT: [[TMP156:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 2 24794 // CHECK20-NEXT: store i64 4, i64* [[TMP156]], align 4 24795 // CHECK20-NEXT: [[TMP157:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 2 24796 // CHECK20-NEXT: store i8* null, i8** [[TMP157]], align 4 24797 // CHECK20-NEXT: [[TMP158:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 3 24798 // CHECK20-NEXT: [[TMP159:%.*]] = bitcast i8** [[TMP158]] to i32** 24799 // CHECK20-NEXT: store i32* [[VLA]], i32** [[TMP159]], align 4 24800 // CHECK20-NEXT: [[TMP160:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 3 24801 // CHECK20-NEXT: [[TMP161:%.*]] = bitcast i8** [[TMP160]] to i32** 24802 // CHECK20-NEXT: store i32* [[VLA]], i32** [[TMP161]], align 4 24803 // CHECK20-NEXT: [[TMP162:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 3 24804 // CHECK20-NEXT: store i64 [[TMP139]], i64* [[TMP162]], align 4 24805 // CHECK20-NEXT: [[TMP163:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_MAPPERS49]], i32 0, i32 3 24806 // CHECK20-NEXT: store i8* null, i8** [[TMP163]], align 4 24807 // CHECK20-NEXT: [[TMP164:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_BASEPTRS47]], i32 0, i32 0 24808 // CHECK20-NEXT: [[TMP165:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[DOTOFFLOAD_PTRS48]], i32 0, i32 0 24809 // CHECK20-NEXT: [[TMP166:%.*]] = getelementptr inbounds [4 x i64], [4 x i64]* [[DOTOFFLOAD_SIZES50]], i32 0, i32 0 24810 // CHECK20-NEXT: [[TMP167:%.*]] = load i32, i32* [[N]], align 4 24811 // CHECK20-NEXT: store i32 [[TMP167]], i32* [[DOTCAPTURE_EXPR_52]], align 4 24812 // CHECK20-NEXT: [[TMP168:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_52]], align 4 24813 // CHECK20-NEXT: [[SUB54:%.*]] = sub nsw i32 [[TMP168]], 0 24814 // CHECK20-NEXT: [[DIV55:%.*]] = sdiv i32 [[SUB54]], 1 24815 // CHECK20-NEXT: [[SUB56:%.*]] = sub nsw i32 [[DIV55]], 1 24816 // CHECK20-NEXT: store i32 [[SUB56]], i32* [[DOTCAPTURE_EXPR_53]], align 4 24817 // CHECK20-NEXT: [[TMP169:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_53]], align 4 24818 // CHECK20-NEXT: [[ADD57:%.*]] = add nsw i32 [[TMP169]], 1 24819 // CHECK20-NEXT: [[TMP170:%.*]] = zext i32 [[ADD57]] to i64 24820 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 [[TMP170]]) 24821 // CHECK20-NEXT: [[TMP171:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, i32 4, i8** [[TMP164]], i8** [[TMP165]], i64* [[TMP166]], i64* getelementptr inbounds ([4 x i64], [4 x i64]* @.offload_maptypes.13, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 24822 // CHECK20-NEXT: [[TMP172:%.*]] = icmp ne i32 [[TMP171]], 0 24823 // CHECK20-NEXT: br i1 [[TMP172]], label [[OMP_OFFLOAD_FAILED58:%.*]], label [[OMP_OFFLOAD_CONT59:%.*]] 24824 // CHECK20: omp_offload.failed58: 24825 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i32 [[TMP135]], i32 [[TMP137]], i32 [[TMP0]], i32* [[VLA]]) #[[ATTR3]] 24826 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT59]] 24827 // CHECK20: omp_offload.cont59: 24828 // CHECK20-NEXT: [[TMP173:%.*]] = load i32, i32* [[ARGC_ADDR]], align 4 24829 // CHECK20-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiLi10EEiT_(i32 [[TMP173]]) 24830 // CHECK20-NEXT: store i32 [[CALL]], i32* [[RETVAL]], align 4 24831 // CHECK20-NEXT: [[TMP174:%.*]] = load i8*, i8** [[SAVED_STACK]], align 4 24832 // CHECK20-NEXT: call void @llvm.stackrestore(i8* [[TMP174]]) 24833 // CHECK20-NEXT: [[TMP175:%.*]] = load i32, i32* [[RETVAL]], align 4 24834 // CHECK20-NEXT: ret i32 [[TMP175]] 24835 // 24836 // 24837 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148 24838 // CHECK20-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] { 24839 // CHECK20-NEXT: entry: 24840 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 24841 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 24842 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 24843 // CHECK20-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 24844 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 24845 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 24846 // CHECK20-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 24847 // CHECK20-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 24848 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 24849 // CHECK20-NEXT: ret void 24850 // 24851 // 24852 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined. 24853 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 24854 // CHECK20-NEXT: entry: 24855 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 24856 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 24857 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 24858 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 24859 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 24860 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 24861 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 24862 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 24863 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 24864 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 24865 // CHECK20-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 24866 // CHECK20-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 24867 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 24868 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 24869 // CHECK20-NEXT: [[I3:%.*]] = alloca i32, align 4 24870 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 24871 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 24872 // CHECK20-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 24873 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 24874 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 24875 // CHECK20-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 24876 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 24877 // CHECK20-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 24878 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 24879 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 24880 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 24881 // CHECK20-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 24882 // CHECK20-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 24883 // CHECK20-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 24884 // CHECK20-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 24885 // CHECK20-NEXT: store i32 0, i32* [[I]], align 4 24886 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 24887 // CHECK20-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 24888 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 24889 // CHECK20: omp.precond.then: 24890 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 24891 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 24892 // CHECK20-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 24893 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 24894 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 24895 // CHECK20-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 24896 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 24897 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 24898 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24899 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 24900 // CHECK20-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 24901 // CHECK20-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 24902 // CHECK20: cond.true: 24903 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 24904 // CHECK20-NEXT: br label [[COND_END:%.*]] 24905 // CHECK20: cond.false: 24906 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24907 // CHECK20-NEXT: br label [[COND_END]] 24908 // CHECK20: cond.end: 24909 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 24910 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 24911 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 24912 // CHECK20-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 24913 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 24914 // CHECK20: omp.inner.for.cond: 24915 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24916 // CHECK20-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24917 // CHECK20-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 24918 // CHECK20-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 24919 // CHECK20: omp.inner.for.body: 24920 // CHECK20-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 24921 // CHECK20-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 24922 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 24923 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 24924 // CHECK20: omp.inner.for.inc: 24925 // CHECK20-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 24926 // CHECK20-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 24927 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 24928 // CHECK20-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 24929 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 24930 // CHECK20: omp.inner.for.end: 24931 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 24932 // CHECK20: omp.loop.exit: 24933 // CHECK20-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 24934 // CHECK20-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 24935 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 24936 // CHECK20-NEXT: br label [[OMP_PRECOND_END]] 24937 // CHECK20: omp.precond.end: 24938 // CHECK20-NEXT: ret void 24939 // 24940 // 24941 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..1 24942 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 24943 // CHECK20-NEXT: entry: 24944 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 24945 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 24946 // CHECK20-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 24947 // CHECK20-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 24948 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 24949 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 24950 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 24951 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 24952 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 24953 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 24954 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 24955 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 24956 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 24957 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 24958 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 24959 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 24960 // CHECK20-NEXT: [[I3:%.*]] = alloca i32, align 4 24961 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 24962 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 24963 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 24964 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 24965 // CHECK20-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 24966 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 24967 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 24968 // CHECK20-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 24969 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 24970 // CHECK20-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 24971 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 24972 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 24973 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 24974 // CHECK20-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 24975 // CHECK20-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 24976 // CHECK20-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 24977 // CHECK20-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 24978 // CHECK20-NEXT: store i32 0, i32* [[I]], align 4 24979 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 24980 // CHECK20-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 24981 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 24982 // CHECK20: omp.precond.then: 24983 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 24984 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 24985 // CHECK20-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 24986 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 24987 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 24988 // CHECK20-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 24989 // CHECK20-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 24990 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 24991 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 24992 // CHECK20-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 24993 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 24994 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 24995 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 24996 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 24997 // CHECK20-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 24998 // CHECK20-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 24999 // CHECK20: cond.true: 25000 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 25001 // CHECK20-NEXT: br label [[COND_END:%.*]] 25002 // CHECK20: cond.false: 25003 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 25004 // CHECK20-NEXT: br label [[COND_END]] 25005 // CHECK20: cond.end: 25006 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 25007 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 25008 // CHECK20-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 25009 // CHECK20-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 25010 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 25011 // CHECK20: omp.inner.for.cond: 25012 // CHECK20-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 25013 // CHECK20-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 25014 // CHECK20-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 25015 // CHECK20-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 25016 // CHECK20: omp.inner.for.body: 25017 // CHECK20-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 25018 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 25019 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 25020 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 25021 // CHECK20-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4 25022 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]] 25023 // CHECK20-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 25024 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 25025 // CHECK20: omp.body.continue: 25026 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 25027 // CHECK20: omp.inner.for.inc: 25028 // CHECK20-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 25029 // CHECK20-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1 25030 // CHECK20-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 25031 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 25032 // CHECK20: omp.inner.for.end: 25033 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 25034 // CHECK20: omp.loop.exit: 25035 // CHECK20-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 25036 // CHECK20-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 25037 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 25038 // CHECK20-NEXT: br label [[OMP_PRECOND_END]] 25039 // CHECK20: omp.precond.end: 25040 // CHECK20-NEXT: ret void 25041 // 25042 // 25043 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153 25044 // CHECK20-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 25045 // CHECK20-NEXT: entry: 25046 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 25047 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 25048 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 25049 // CHECK20-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 25050 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 25051 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 25052 // CHECK20-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 25053 // CHECK20-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 25054 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..2 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 25055 // CHECK20-NEXT: ret void 25056 // 25057 // 25058 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..2 25059 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 25060 // CHECK20-NEXT: entry: 25061 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 25062 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 25063 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 25064 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 25065 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 25066 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 25067 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 25068 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 25069 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 25070 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 25071 // CHECK20-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 25072 // CHECK20-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 25073 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 25074 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 25075 // CHECK20-NEXT: [[I3:%.*]] = alloca i32, align 4 25076 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 25077 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 25078 // CHECK20-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 25079 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 25080 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 25081 // CHECK20-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 25082 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 25083 // CHECK20-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 25084 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 25085 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 25086 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 25087 // CHECK20-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 25088 // CHECK20-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 25089 // CHECK20-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 25090 // CHECK20-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 25091 // CHECK20-NEXT: store i32 0, i32* [[I]], align 4 25092 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 25093 // CHECK20-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 25094 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 25095 // CHECK20: omp.precond.then: 25096 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 25097 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 25098 // CHECK20-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 25099 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 25100 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 25101 // CHECK20-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 25102 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 25103 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 25104 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 25105 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 25106 // CHECK20-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 25107 // CHECK20-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 25108 // CHECK20: cond.true: 25109 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 25110 // CHECK20-NEXT: br label [[COND_END:%.*]] 25111 // CHECK20: cond.false: 25112 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 25113 // CHECK20-NEXT: br label [[COND_END]] 25114 // CHECK20: cond.end: 25115 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 25116 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 25117 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 25118 // CHECK20-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 25119 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 25120 // CHECK20: omp.inner.for.cond: 25121 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 25122 // CHECK20-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 25123 // CHECK20-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 25124 // CHECK20-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 25125 // CHECK20: omp.inner.for.body: 25126 // CHECK20-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 25127 // CHECK20-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 25128 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 25129 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 25130 // CHECK20: omp.inner.for.inc: 25131 // CHECK20-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 25132 // CHECK20-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 25133 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 25134 // CHECK20-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 25135 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 25136 // CHECK20: omp.inner.for.end: 25137 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 25138 // CHECK20: omp.loop.exit: 25139 // CHECK20-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 25140 // CHECK20-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 25141 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 25142 // CHECK20-NEXT: br label [[OMP_PRECOND_END]] 25143 // CHECK20: omp.precond.end: 25144 // CHECK20-NEXT: ret void 25145 // 25146 // 25147 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..3 25148 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 25149 // CHECK20-NEXT: entry: 25150 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 25151 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 25152 // CHECK20-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 25153 // CHECK20-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 25154 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 25155 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 25156 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 25157 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 25158 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 25159 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 25160 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 25161 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 25162 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 25163 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 25164 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 25165 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 25166 // CHECK20-NEXT: [[I3:%.*]] = alloca i32, align 4 25167 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 25168 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 25169 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 25170 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 25171 // CHECK20-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 25172 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 25173 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 25174 // CHECK20-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 25175 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 25176 // CHECK20-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 25177 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 25178 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 25179 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 25180 // CHECK20-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 25181 // CHECK20-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 25182 // CHECK20-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 25183 // CHECK20-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 25184 // CHECK20-NEXT: store i32 0, i32* [[I]], align 4 25185 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 25186 // CHECK20-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 25187 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 25188 // CHECK20: omp.precond.then: 25189 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 25190 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 25191 // CHECK20-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 25192 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 25193 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 25194 // CHECK20-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 25195 // CHECK20-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 25196 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 25197 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 25198 // CHECK20-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 25199 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 25200 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 25201 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 25202 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 25203 // CHECK20-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 25204 // CHECK20-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 25205 // CHECK20: cond.true: 25206 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 25207 // CHECK20-NEXT: br label [[COND_END:%.*]] 25208 // CHECK20: cond.false: 25209 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 25210 // CHECK20-NEXT: br label [[COND_END]] 25211 // CHECK20: cond.end: 25212 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 25213 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 25214 // CHECK20-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 25215 // CHECK20-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 25216 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 25217 // CHECK20: omp.inner.for.cond: 25218 // CHECK20-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 25219 // CHECK20-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 25220 // CHECK20-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 25221 // CHECK20-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 25222 // CHECK20: omp.inner.for.body: 25223 // CHECK20-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 25224 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 25225 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 25226 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 25227 // CHECK20-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4 25228 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]] 25229 // CHECK20-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 25230 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 25231 // CHECK20: omp.body.continue: 25232 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 25233 // CHECK20: omp.inner.for.inc: 25234 // CHECK20-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 25235 // CHECK20-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1 25236 // CHECK20-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 25237 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 25238 // CHECK20: omp.inner.for.end: 25239 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 25240 // CHECK20: omp.loop.exit: 25241 // CHECK20-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 25242 // CHECK20-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 25243 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 25244 // CHECK20-NEXT: br label [[OMP_PRECOND_END]] 25245 // CHECK20: omp.precond.end: 25246 // CHECK20-NEXT: ret void 25247 // 25248 // 25249 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158 25250 // CHECK20-SAME: (i32 [[M:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 25251 // CHECK20-NEXT: entry: 25252 // CHECK20-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 25253 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 25254 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 25255 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 25256 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 25257 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 25258 // CHECK20-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 25259 // CHECK20-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 25260 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 25261 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 25262 // CHECK20-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 25263 // CHECK20-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 25264 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4 25265 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 25266 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 25267 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 25268 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 25269 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..5 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]]) 25270 // CHECK20-NEXT: ret void 25271 // 25272 // 25273 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..5 25274 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 25275 // CHECK20-NEXT: entry: 25276 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 25277 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 25278 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 25279 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 25280 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 25281 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 25282 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 25283 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 25284 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 25285 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 25286 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 25287 // CHECK20-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 25288 // CHECK20-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 25289 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 25290 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 25291 // CHECK20-NEXT: [[I4:%.*]] = alloca i32, align 4 25292 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 25293 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 25294 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 25295 // CHECK20-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 25296 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 25297 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 25298 // CHECK20-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 25299 // CHECK20-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 25300 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 25301 // CHECK20-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 25302 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 25303 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 25304 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 25305 // CHECK20-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 25306 // CHECK20-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 25307 // CHECK20-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 25308 // CHECK20-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 25309 // CHECK20-NEXT: store i32 0, i32* [[I]], align 4 25310 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 25311 // CHECK20-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 25312 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 25313 // CHECK20: omp.precond.then: 25314 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 25315 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 25316 // CHECK20-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 25317 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 25318 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 25319 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 25320 // CHECK20-NEXT: [[TMP8:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 25321 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[TMP8]], align 4 25322 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP9]], i32 91, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]]) 25323 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 25324 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 25325 // CHECK20-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] 25326 // CHECK20-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 25327 // CHECK20: cond.true: 25328 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 25329 // CHECK20-NEXT: br label [[COND_END:%.*]] 25330 // CHECK20: cond.false: 25331 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 25332 // CHECK20-NEXT: br label [[COND_END]] 25333 // CHECK20: cond.end: 25334 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] 25335 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 25336 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 25337 // CHECK20-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 25338 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 25339 // CHECK20: omp.inner.for.cond: 25340 // CHECK20-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 25341 // CHECK20-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 25342 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], 1 25343 // CHECK20-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]] 25344 // CHECK20-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 25345 // CHECK20: omp.inner.for.body: 25346 // CHECK20-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 25347 // CHECK20-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 25348 // CHECK20-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 25349 // CHECK20-NEXT: store i32 [[TMP19]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 25350 // CHECK20-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 25351 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..6 to void (i32*, i32*, ...)*), i32 [[TMP17]], i32 [[TMP18]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP20]]) 25352 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 25353 // CHECK20: omp.inner.for.inc: 25354 // CHECK20-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 25355 // CHECK20-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 25356 // CHECK20-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] 25357 // CHECK20-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 25358 // CHECK20-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 25359 // CHECK20-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 25360 // CHECK20-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] 25361 // CHECK20-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4 25362 // CHECK20-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 25363 // CHECK20-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 25364 // CHECK20-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]] 25365 // CHECK20-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4 25366 // CHECK20-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 25367 // CHECK20-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 25368 // CHECK20-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP27]], [[TMP28]] 25369 // CHECK20-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]] 25370 // CHECK20: cond.true11: 25371 // CHECK20-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 25372 // CHECK20-NEXT: br label [[COND_END13:%.*]] 25373 // CHECK20: cond.false12: 25374 // CHECK20-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 25375 // CHECK20-NEXT: br label [[COND_END13]] 25376 // CHECK20: cond.end13: 25377 // CHECK20-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP29]], [[COND_TRUE11]] ], [ [[TMP30]], [[COND_FALSE12]] ] 25378 // CHECK20-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4 25379 // CHECK20-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 25380 // CHECK20-NEXT: store i32 [[TMP31]], i32* [[DOTOMP_IV]], align 4 25381 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 25382 // CHECK20: omp.inner.for.end: 25383 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 25384 // CHECK20: omp.loop.exit: 25385 // CHECK20-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 25386 // CHECK20-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4 25387 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP33]]) 25388 // CHECK20-NEXT: br label [[OMP_PRECOND_END]] 25389 // CHECK20: omp.precond.end: 25390 // CHECK20-NEXT: ret void 25391 // 25392 // 25393 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..6 25394 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 25395 // CHECK20-NEXT: entry: 25396 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 25397 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 25398 // CHECK20-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 25399 // CHECK20-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 25400 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 25401 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 25402 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 25403 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 25404 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 25405 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 25406 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 25407 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 25408 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 25409 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 25410 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 25411 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 25412 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 25413 // CHECK20-NEXT: [[I4:%.*]] = alloca i32, align 4 25414 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 25415 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 25416 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 25417 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 25418 // CHECK20-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 25419 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 25420 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 25421 // CHECK20-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 25422 // CHECK20-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 25423 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 25424 // CHECK20-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 25425 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 25426 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 25427 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 25428 // CHECK20-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 25429 // CHECK20-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 25430 // CHECK20-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 25431 // CHECK20-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 25432 // CHECK20-NEXT: store i32 0, i32* [[I]], align 4 25433 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 25434 // CHECK20-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 25435 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 25436 // CHECK20: omp.precond.then: 25437 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 25438 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 25439 // CHECK20-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 25440 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 25441 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 25442 // CHECK20-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 25443 // CHECK20-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 25444 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 25445 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 25446 // CHECK20-NEXT: [[TMP9:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 25447 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[TMP9]], align 4 25448 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP10]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 25449 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 25450 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 25451 // CHECK20-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]] 25452 // CHECK20-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 25453 // CHECK20: cond.true: 25454 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 25455 // CHECK20-NEXT: br label [[COND_END:%.*]] 25456 // CHECK20: cond.false: 25457 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 25458 // CHECK20-NEXT: br label [[COND_END]] 25459 // CHECK20: cond.end: 25460 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ] 25461 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 25462 // CHECK20-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 25463 // CHECK20-NEXT: store i32 [[TMP15]], i32* [[DOTOMP_IV]], align 4 25464 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 25465 // CHECK20: omp.inner.for.cond: 25466 // CHECK20-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 25467 // CHECK20-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 25468 // CHECK20-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] 25469 // CHECK20-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 25470 // CHECK20: omp.inner.for.body: 25471 // CHECK20-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 25472 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 25473 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 25474 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I4]], align 4 25475 // CHECK20-NEXT: [[TMP19:%.*]] = load i32, i32* [[I4]], align 4 25476 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP19]] 25477 // CHECK20-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 25478 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 25479 // CHECK20: omp.body.continue: 25480 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 25481 // CHECK20: omp.inner.for.inc: 25482 // CHECK20-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 25483 // CHECK20-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1 25484 // CHECK20-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 25485 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 25486 // CHECK20: omp.inner.for.end: 25487 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 25488 // CHECK20: omp.loop.exit: 25489 // CHECK20-NEXT: [[TMP21:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 25490 // CHECK20-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4 25491 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP22]]) 25492 // CHECK20-NEXT: br label [[OMP_PRECOND_END]] 25493 // CHECK20: omp.precond.end: 25494 // CHECK20-NEXT: ret void 25495 // 25496 // 25497 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163 25498 // CHECK20-SAME: (i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 25499 // CHECK20-NEXT: entry: 25500 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 25501 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 25502 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 25503 // CHECK20-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 25504 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 25505 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 25506 // CHECK20-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 25507 // CHECK20-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 25508 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*)* @.omp_outlined..8 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]]) 25509 // CHECK20-NEXT: ret void 25510 // 25511 // 25512 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..8 25513 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 25514 // CHECK20-NEXT: entry: 25515 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 25516 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 25517 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 25518 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 25519 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 25520 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 25521 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 25522 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 25523 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 25524 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 25525 // CHECK20-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 25526 // CHECK20-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 25527 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 25528 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 25529 // CHECK20-NEXT: [[I3:%.*]] = alloca i32, align 4 25530 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 25531 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 25532 // CHECK20-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 25533 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 25534 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 25535 // CHECK20-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 25536 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 25537 // CHECK20-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 25538 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 25539 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 25540 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 25541 // CHECK20-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 25542 // CHECK20-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 25543 // CHECK20-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 25544 // CHECK20-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 25545 // CHECK20-NEXT: store i32 0, i32* [[I]], align 4 25546 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 25547 // CHECK20-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 25548 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 25549 // CHECK20: omp.precond.then: 25550 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 25551 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 25552 // CHECK20-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 25553 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 25554 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 25555 // CHECK20-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 25556 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 25557 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 25558 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 25559 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 25560 // CHECK20-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 25561 // CHECK20-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 25562 // CHECK20: cond.true: 25563 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 25564 // CHECK20-NEXT: br label [[COND_END:%.*]] 25565 // CHECK20: cond.false: 25566 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 25567 // CHECK20-NEXT: br label [[COND_END]] 25568 // CHECK20: cond.end: 25569 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 25570 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 25571 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 25572 // CHECK20-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 25573 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 25574 // CHECK20: omp.inner.for.cond: 25575 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 25576 // CHECK20-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 25577 // CHECK20-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 25578 // CHECK20-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 25579 // CHECK20: omp.inner.for.body: 25580 // CHECK20-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 25581 // CHECK20-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 25582 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 5, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*)* @.omp_outlined..9 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]]) 25583 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 25584 // CHECK20: omp.inner.for.inc: 25585 // CHECK20-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 25586 // CHECK20-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 25587 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 25588 // CHECK20-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 25589 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 25590 // CHECK20: omp.inner.for.end: 25591 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 25592 // CHECK20: omp.loop.exit: 25593 // CHECK20-NEXT: [[TMP20:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 25594 // CHECK20-NEXT: [[TMP21:%.*]] = load i32, i32* [[TMP20]], align 4 25595 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP21]]) 25596 // CHECK20-NEXT: br label [[OMP_PRECOND_END]] 25597 // CHECK20: omp.precond.end: 25598 // CHECK20-NEXT: ret void 25599 // 25600 // 25601 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..9 25602 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 25603 // CHECK20-NEXT: entry: 25604 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 25605 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 25606 // CHECK20-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 25607 // CHECK20-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 25608 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 25609 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 25610 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 25611 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 25612 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 25613 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 25614 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 25615 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 25616 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 25617 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 25618 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 25619 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 25620 // CHECK20-NEXT: [[I3:%.*]] = alloca i32, align 4 25621 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 25622 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 25623 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 25624 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 25625 // CHECK20-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 25626 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 25627 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 25628 // CHECK20-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 25629 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 25630 // CHECK20-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 25631 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 25632 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_]], align 4 25633 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 25634 // CHECK20-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 25635 // CHECK20-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 25636 // CHECK20-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1 25637 // CHECK20-NEXT: store i32 [[SUB2]], i32* [[DOTCAPTURE_EXPR_1]], align 4 25638 // CHECK20-NEXT: store i32 0, i32* [[I]], align 4 25639 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 25640 // CHECK20-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 25641 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 25642 // CHECK20: omp.precond.then: 25643 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 25644 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 25645 // CHECK20-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 25646 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 25647 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 25648 // CHECK20-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 25649 // CHECK20-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 25650 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 25651 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 25652 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 25653 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 25654 // CHECK20-NEXT: [[TMP11:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 25655 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 25656 // CHECK20-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1) 25657 // CHECK20-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 25658 // CHECK20: omp.dispatch.cond: 25659 // CHECK20-NEXT: [[TMP13:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 25660 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[TMP13]], align 4 25661 // CHECK20-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP14]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 25662 // CHECK20-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0 25663 // CHECK20-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 25664 // CHECK20: omp.dispatch.body: 25665 // CHECK20-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 25666 // CHECK20-NEXT: store i32 [[TMP16]], i32* [[DOTOMP_IV]], align 4 25667 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 25668 // CHECK20: omp.inner.for.cond: 25669 // CHECK20-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 25670 // CHECK20-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !15 25671 // CHECK20-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] 25672 // CHECK20-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 25673 // CHECK20: omp.inner.for.body: 25674 // CHECK20-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 25675 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 25676 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 25677 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group !15 25678 // CHECK20-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group !15 25679 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP20]] 25680 // CHECK20-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !15 25681 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 25682 // CHECK20: omp.body.continue: 25683 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 25684 // CHECK20: omp.inner.for.inc: 25685 // CHECK20-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 25686 // CHECK20-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP21]], 1 25687 // CHECK20-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !15 25688 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] 25689 // CHECK20: omp.inner.for.end: 25690 // CHECK20-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 25691 // CHECK20: omp.dispatch.inc: 25692 // CHECK20-NEXT: br label [[OMP_DISPATCH_COND]] 25693 // CHECK20: omp.dispatch.end: 25694 // CHECK20-NEXT: br label [[OMP_PRECOND_END]] 25695 // CHECK20: omp.precond.end: 25696 // CHECK20-NEXT: ret void 25697 // 25698 // 25699 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168 25700 // CHECK20-SAME: (i32 [[M:%.*]], i32 [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] { 25701 // CHECK20-NEXT: entry: 25702 // CHECK20-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 25703 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4 25704 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 25705 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 25706 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 25707 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 25708 // CHECK20-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 25709 // CHECK20-NEXT: store i32 [[N]], i32* [[N_ADDR]], align 4 25710 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 25711 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 25712 // CHECK20-NEXT: [[TMP0:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 25713 // CHECK20-NEXT: [[TMP1:%.*]] = load i32*, i32** [[A_ADDR]], align 4 25714 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[M_ADDR]], align 4 25715 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR_]], align 4 25716 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 25717 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 25718 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 25719 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*, i32, i32*, i32)* @.omp_outlined..11 to void (i32*, i32*, ...)*), i32* [[N_ADDR]], i32 [[TMP0]], i32* [[TMP1]], i32 [[TMP4]]) 25720 // CHECK20-NEXT: ret void 25721 // 25722 // 25723 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..11 25724 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 25725 // CHECK20-NEXT: entry: 25726 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 25727 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 25728 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 25729 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 25730 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 25731 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 25732 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 25733 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 25734 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 25735 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 25736 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 25737 // CHECK20-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 25738 // CHECK20-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 25739 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 25740 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 25741 // CHECK20-NEXT: [[I4:%.*]] = alloca i32, align 4 25742 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 25743 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 25744 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 25745 // CHECK20-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 25746 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 25747 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 25748 // CHECK20-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 25749 // CHECK20-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 25750 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 25751 // CHECK20-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 25752 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 25753 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 25754 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 25755 // CHECK20-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 25756 // CHECK20-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 25757 // CHECK20-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 25758 // CHECK20-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 25759 // CHECK20-NEXT: store i32 0, i32* [[I]], align 4 25760 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 25761 // CHECK20-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 25762 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 25763 // CHECK20: omp.precond.then: 25764 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 25765 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 25766 // CHECK20-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_COMB_UB]], align 4 25767 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 25768 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 25769 // CHECK20-NEXT: [[TMP7:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 25770 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[TMP7]], align 4 25771 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP8]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 25772 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 25773 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 25774 // CHECK20-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] 25775 // CHECK20-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 25776 // CHECK20: cond.true: 25777 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 25778 // CHECK20-NEXT: br label [[COND_END:%.*]] 25779 // CHECK20: cond.false: 25780 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 25781 // CHECK20-NEXT: br label [[COND_END]] 25782 // CHECK20: cond.end: 25783 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] 25784 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 25785 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 25786 // CHECK20-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 25787 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 25788 // CHECK20: omp.inner.for.cond: 25789 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 25790 // CHECK20-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 25791 // CHECK20-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] 25792 // CHECK20-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 25793 // CHECK20: omp.inner.for.body: 25794 // CHECK20-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 25795 // CHECK20-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 25796 // CHECK20-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 25797 // CHECK20-NEXT: store i32 [[TMP18]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 25798 // CHECK20-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 25799 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 6, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*, i32, i32*, i32)* @.omp_outlined..12 to void (i32*, i32*, ...)*), i32 [[TMP16]], i32 [[TMP17]], i32* [[TMP0]], i32 [[TMP1]], i32* [[TMP2]], i32 [[TMP19]]) 25800 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 25801 // CHECK20: omp.inner.for.inc: 25802 // CHECK20-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 25803 // CHECK20-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 25804 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 25805 // CHECK20-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 25806 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 25807 // CHECK20: omp.inner.for.end: 25808 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 25809 // CHECK20: omp.loop.exit: 25810 // CHECK20-NEXT: [[TMP22:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 25811 // CHECK20-NEXT: [[TMP23:%.*]] = load i32, i32* [[TMP22]], align 4 25812 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP23]]) 25813 // CHECK20-NEXT: br label [[OMP_PRECOND_END]] 25814 // CHECK20: omp.precond.end: 25815 // CHECK20-NEXT: ret void 25816 // 25817 // 25818 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..12 25819 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[N:%.*]], i32 [[VLA:%.*]], i32* nonnull align 4 dereferenceable(4) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 25820 // CHECK20-NEXT: entry: 25821 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 25822 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 25823 // CHECK20-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 25824 // CHECK20-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 25825 // CHECK20-NEXT: [[N_ADDR:%.*]] = alloca i32*, align 4 25826 // CHECK20-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4 25827 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca i32*, align 4 25828 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 25829 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 25830 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 25831 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4 25832 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4 25833 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 25834 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 25835 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 25836 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 25837 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 25838 // CHECK20-NEXT: [[I4:%.*]] = alloca i32, align 4 25839 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 25840 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 25841 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 25842 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 25843 // CHECK20-NEXT: store i32* [[N]], i32** [[N_ADDR]], align 4 25844 // CHECK20-NEXT: store i32 [[VLA]], i32* [[VLA_ADDR]], align 4 25845 // CHECK20-NEXT: store i32* [[A]], i32** [[A_ADDR]], align 4 25846 // CHECK20-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 25847 // CHECK20-NEXT: [[TMP0:%.*]] = load i32*, i32** [[N_ADDR]], align 4 25848 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[VLA_ADDR]], align 4 25849 // CHECK20-NEXT: [[TMP2:%.*]] = load i32*, i32** [[A_ADDR]], align 4 25850 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[TMP0]], align 4 25851 // CHECK20-NEXT: store i32 [[TMP3]], i32* [[DOTCAPTURE_EXPR_1]], align 4 25852 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 25853 // CHECK20-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0 25854 // CHECK20-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1 25855 // CHECK20-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1 25856 // CHECK20-NEXT: store i32 [[SUB3]], i32* [[DOTCAPTURE_EXPR_2]], align 4 25857 // CHECK20-NEXT: store i32 0, i32* [[I]], align 4 25858 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 25859 // CHECK20-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP5]] 25860 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]] 25861 // CHECK20: omp.precond.then: 25862 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 25863 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 25864 // CHECK20-NEXT: store i32 [[TMP6]], i32* [[DOTOMP_UB]], align 4 25865 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 25866 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 25867 // CHECK20-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_LB]], align 4 25868 // CHECK20-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_UB]], align 4 25869 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 25870 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 25871 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 25872 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 25873 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 25874 // CHECK20-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 25875 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP12]], align 4 25876 // CHECK20-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]]) 25877 // CHECK20-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 25878 // CHECK20: omp.dispatch.cond: 25879 // CHECK20-NEXT: [[TMP14:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 25880 // CHECK20-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4 25881 // CHECK20-NEXT: [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP15]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 25882 // CHECK20-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0 25883 // CHECK20-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 25884 // CHECK20: omp.dispatch.body: 25885 // CHECK20-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 25886 // CHECK20-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 25887 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 25888 // CHECK20: omp.inner.for.cond: 25889 // CHECK20-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 25890 // CHECK20-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !18 25891 // CHECK20-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] 25892 // CHECK20-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 25893 // CHECK20: omp.inner.for.body: 25894 // CHECK20-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 25895 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1 25896 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 25897 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I4]], align 4, !llvm.access.group !18 25898 // CHECK20-NEXT: [[TMP21:%.*]] = load i32, i32* [[I4]], align 4, !llvm.access.group !18 25899 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[TMP2]], i32 [[TMP21]] 25900 // CHECK20-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !18 25901 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 25902 // CHECK20: omp.body.continue: 25903 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 25904 // CHECK20: omp.inner.for.inc: 25905 // CHECK20-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 25906 // CHECK20-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP22]], 1 25907 // CHECK20-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !18 25908 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]] 25909 // CHECK20: omp.inner.for.end: 25910 // CHECK20-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 25911 // CHECK20: omp.dispatch.inc: 25912 // CHECK20-NEXT: br label [[OMP_DISPATCH_COND]] 25913 // CHECK20: omp.dispatch.end: 25914 // CHECK20-NEXT: br label [[OMP_PRECOND_END]] 25915 // CHECK20: omp.precond.end: 25916 // CHECK20-NEXT: ret void 25917 // 25918 // 25919 // CHECK20-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_ 25920 // CHECK20-SAME: (i32 [[ARGC:%.*]]) #[[ATTR4:[0-9]+]] comdat { 25921 // CHECK20-NEXT: entry: 25922 // CHECK20-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4 25923 // CHECK20-NEXT: [[A:%.*]] = alloca [10 x i32], align 4 25924 // CHECK20-NEXT: [[M:%.*]] = alloca i32, align 4 25925 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 25926 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 25927 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 25928 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 25929 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x i8*], align 4 25930 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x i8*], align 4 25931 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x i8*], align 4 25932 // CHECK20-NEXT: [[_TMP4:%.*]] = alloca i32, align 4 25933 // CHECK20-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4 25934 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS7:%.*]] = alloca [2 x i8*], align 4 25935 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS8:%.*]] = alloca [2 x i8*], align 4 25936 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS9:%.*]] = alloca [2 x i8*], align 4 25937 // CHECK20-NEXT: [[_TMP10:%.*]] = alloca i32, align 4 25938 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS13:%.*]] = alloca [1 x i8*], align 4 25939 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS14:%.*]] = alloca [1 x i8*], align 4 25940 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS15:%.*]] = alloca [1 x i8*], align 4 25941 // CHECK20-NEXT: [[_TMP16:%.*]] = alloca i32, align 4 25942 // CHECK20-NEXT: [[M_CASTED19:%.*]] = alloca i32, align 4 25943 // CHECK20-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [2 x i8*], align 4 25944 // CHECK20-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [2 x i8*], align 4 25945 // CHECK20-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [2 x i8*], align 4 25946 // CHECK20-NEXT: [[_TMP23:%.*]] = alloca i32, align 4 25947 // CHECK20-NEXT: store i32 [[ARGC]], i32* [[ARGC_ADDR]], align 4 25948 // CHECK20-NEXT: store i32 10, i32* [[M]], align 4 25949 // CHECK20-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 25950 // CHECK20-NEXT: [[TMP1:%.*]] = bitcast i8** [[TMP0]] to [10 x i32]** 25951 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP1]], align 4 25952 // CHECK20-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 25953 // CHECK20-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to [10 x i32]** 25954 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP3]], align 4 25955 // CHECK20-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 25956 // CHECK20-NEXT: store i8* null, i8** [[TMP4]], align 4 25957 // CHECK20-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 25958 // CHECK20-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 25959 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 25960 // CHECK20-NEXT: [[TMP7:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, i32 1, i8** [[TMP5]], i8** [[TMP6]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.16, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 25961 // CHECK20-NEXT: [[TMP8:%.*]] = icmp ne i32 [[TMP7]], 0 25962 // CHECK20-NEXT: br i1 [[TMP8]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 25963 // CHECK20: omp_offload.failed: 25964 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116([10 x i32]* [[A]]) #[[ATTR3]] 25965 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT]] 25966 // CHECK20: omp_offload.cont: 25967 // CHECK20-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 25968 // CHECK20-NEXT: [[TMP10:%.*]] = bitcast i8** [[TMP9]] to [10 x i32]** 25969 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP10]], align 4 25970 // CHECK20-NEXT: [[TMP11:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 25971 // CHECK20-NEXT: [[TMP12:%.*]] = bitcast i8** [[TMP11]] to [10 x i32]** 25972 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP12]], align 4 25973 // CHECK20-NEXT: [[TMP13:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0 25974 // CHECK20-NEXT: store i8* null, i8** [[TMP13]], align 4 25975 // CHECK20-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0 25976 // CHECK20-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS2]], i32 0, i32 0 25977 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 25978 // CHECK20-NEXT: [[TMP16:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, i32 1, i8** [[TMP14]], i8** [[TMP15]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.19, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.20, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 25979 // CHECK20-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0 25980 // CHECK20-NEXT: br i1 [[TMP17]], label [[OMP_OFFLOAD_FAILED5:%.*]], label [[OMP_OFFLOAD_CONT6:%.*]] 25981 // CHECK20: omp_offload.failed5: 25982 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121([10 x i32]* [[A]]) #[[ATTR3]] 25983 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT6]] 25984 // CHECK20: omp_offload.cont6: 25985 // CHECK20-NEXT: [[TMP18:%.*]] = load i32, i32* [[M]], align 4 25986 // CHECK20-NEXT: store i32 [[TMP18]], i32* [[M_CASTED]], align 4 25987 // CHECK20-NEXT: [[TMP19:%.*]] = load i32, i32* [[M_CASTED]], align 4 25988 // CHECK20-NEXT: [[TMP20:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 25989 // CHECK20-NEXT: [[TMP21:%.*]] = bitcast i8** [[TMP20]] to i32* 25990 // CHECK20-NEXT: store i32 [[TMP19]], i32* [[TMP21]], align 4 25991 // CHECK20-NEXT: [[TMP22:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 25992 // CHECK20-NEXT: [[TMP23:%.*]] = bitcast i8** [[TMP22]] to i32* 25993 // CHECK20-NEXT: store i32 [[TMP19]], i32* [[TMP23]], align 4 25994 // CHECK20-NEXT: [[TMP24:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 0 25995 // CHECK20-NEXT: store i8* null, i8** [[TMP24]], align 4 25996 // CHECK20-NEXT: [[TMP25:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 1 25997 // CHECK20-NEXT: [[TMP26:%.*]] = bitcast i8** [[TMP25]] to [10 x i32]** 25998 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP26]], align 4 25999 // CHECK20-NEXT: [[TMP27:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 1 26000 // CHECK20-NEXT: [[TMP28:%.*]] = bitcast i8** [[TMP27]] to [10 x i32]** 26001 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP28]], align 4 26002 // CHECK20-NEXT: [[TMP29:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS9]], i32 0, i32 1 26003 // CHECK20-NEXT: store i8* null, i8** [[TMP29]], align 4 26004 // CHECK20-NEXT: [[TMP30:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS7]], i32 0, i32 0 26005 // CHECK20-NEXT: [[TMP31:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS8]], i32 0, i32 0 26006 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 26007 // CHECK20-NEXT: [[TMP32:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, i32 2, i8** [[TMP30]], i8** [[TMP31]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.23, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.24, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 26008 // CHECK20-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0 26009 // CHECK20-NEXT: br i1 [[TMP33]], label [[OMP_OFFLOAD_FAILED11:%.*]], label [[OMP_OFFLOAD_CONT12:%.*]] 26010 // CHECK20: omp_offload.failed11: 26011 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i32 [[TMP19]], [10 x i32]* [[A]]) #[[ATTR3]] 26012 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT12]] 26013 // CHECK20: omp_offload.cont12: 26014 // CHECK20-NEXT: [[TMP34:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 26015 // CHECK20-NEXT: [[TMP35:%.*]] = bitcast i8** [[TMP34]] to [10 x i32]** 26016 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP35]], align 4 26017 // CHECK20-NEXT: [[TMP36:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 26018 // CHECK20-NEXT: [[TMP37:%.*]] = bitcast i8** [[TMP36]] to [10 x i32]** 26019 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP37]], align 4 26020 // CHECK20-NEXT: [[TMP38:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS15]], i32 0, i32 0 26021 // CHECK20-NEXT: store i8* null, i8** [[TMP38]], align 4 26022 // CHECK20-NEXT: [[TMP39:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS13]], i32 0, i32 0 26023 // CHECK20-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS14]], i32 0, i32 0 26024 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 26025 // CHECK20-NEXT: [[TMP41:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, i32 1, i8** [[TMP39]], i8** [[TMP40]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.27, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.28, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 26026 // CHECK20-NEXT: [[TMP42:%.*]] = icmp ne i32 [[TMP41]], 0 26027 // CHECK20-NEXT: br i1 [[TMP42]], label [[OMP_OFFLOAD_FAILED17:%.*]], label [[OMP_OFFLOAD_CONT18:%.*]] 26028 // CHECK20: omp_offload.failed17: 26029 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131([10 x i32]* [[A]]) #[[ATTR3]] 26030 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT18]] 26031 // CHECK20: omp_offload.cont18: 26032 // CHECK20-NEXT: [[TMP43:%.*]] = load i32, i32* [[M]], align 4 26033 // CHECK20-NEXT: store i32 [[TMP43]], i32* [[M_CASTED19]], align 4 26034 // CHECK20-NEXT: [[TMP44:%.*]] = load i32, i32* [[M_CASTED19]], align 4 26035 // CHECK20-NEXT: [[TMP45:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 26036 // CHECK20-NEXT: [[TMP46:%.*]] = bitcast i8** [[TMP45]] to i32* 26037 // CHECK20-NEXT: store i32 [[TMP44]], i32* [[TMP46]], align 4 26038 // CHECK20-NEXT: [[TMP47:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 26039 // CHECK20-NEXT: [[TMP48:%.*]] = bitcast i8** [[TMP47]] to i32* 26040 // CHECK20-NEXT: store i32 [[TMP44]], i32* [[TMP48]], align 4 26041 // CHECK20-NEXT: [[TMP49:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 0 26042 // CHECK20-NEXT: store i8* null, i8** [[TMP49]], align 4 26043 // CHECK20-NEXT: [[TMP50:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1 26044 // CHECK20-NEXT: [[TMP51:%.*]] = bitcast i8** [[TMP50]] to [10 x i32]** 26045 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP51]], align 4 26046 // CHECK20-NEXT: [[TMP52:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 1 26047 // CHECK20-NEXT: [[TMP53:%.*]] = bitcast i8** [[TMP52]] to [10 x i32]** 26048 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[TMP53]], align 4 26049 // CHECK20-NEXT: [[TMP54:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 1 26050 // CHECK20-NEXT: store i8* null, i8** [[TMP54]], align 4 26051 // CHECK20-NEXT: [[TMP55:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0 26052 // CHECK20-NEXT: [[TMP56:%.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* [[DOTOFFLOAD_PTRS21]], i32 0, i32 0 26053 // CHECK20-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i64 10) 26054 // CHECK20-NEXT: [[TMP57:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB3]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, i32 2, i8** [[TMP55]], i8** [[TMP56]], i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_sizes.31, i32 0, i32 0), i64* getelementptr inbounds ([2 x i64], [2 x i64]* @.offload_maptypes.32, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 26055 // CHECK20-NEXT: [[TMP58:%.*]] = icmp ne i32 [[TMP57]], 0 26056 // CHECK20-NEXT: br i1 [[TMP58]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]] 26057 // CHECK20: omp_offload.failed24: 26058 // CHECK20-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i32 [[TMP44]], [10 x i32]* [[A]]) #[[ATTR3]] 26059 // CHECK20-NEXT: br label [[OMP_OFFLOAD_CONT25]] 26060 // CHECK20: omp_offload.cont25: 26061 // CHECK20-NEXT: ret i32 0 26062 // 26063 // 26064 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116 26065 // CHECK20-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 26066 // CHECK20-NEXT: entry: 26067 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 26068 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 26069 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 26070 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..14 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 26071 // CHECK20-NEXT: ret void 26072 // 26073 // 26074 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..14 26075 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 26076 // CHECK20-NEXT: entry: 26077 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 26078 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 26079 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 26080 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 26081 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 26082 // CHECK20-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 26083 // CHECK20-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 26084 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 26085 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 26086 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 26087 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 26088 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 26089 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 26090 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 26091 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 26092 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 26093 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 26094 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 26095 // CHECK20-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 26096 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 26097 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 26098 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 26099 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 26100 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 26101 // CHECK20: cond.true: 26102 // CHECK20-NEXT: br label [[COND_END:%.*]] 26103 // CHECK20: cond.false: 26104 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 26105 // CHECK20-NEXT: br label [[COND_END]] 26106 // CHECK20: cond.end: 26107 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 26108 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 26109 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 26110 // CHECK20-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 26111 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 26112 // CHECK20: omp.inner.for.cond: 26113 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 26114 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 26115 // CHECK20-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 26116 // CHECK20-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 26117 // CHECK20: omp.inner.for.body: 26118 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 26119 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 26120 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..15 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]) 26121 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 26122 // CHECK20: omp.inner.for.inc: 26123 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 26124 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 26125 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 26126 // CHECK20-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 26127 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 26128 // CHECK20: omp.inner.for.end: 26129 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 26130 // CHECK20: omp.loop.exit: 26131 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 26132 // CHECK20-NEXT: ret void 26133 // 26134 // 26135 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..15 26136 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 26137 // CHECK20-NEXT: entry: 26138 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 26139 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 26140 // CHECK20-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 26141 // CHECK20-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 26142 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 26143 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 26144 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 26145 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 26146 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 26147 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 26148 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 26149 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 26150 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 26151 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 26152 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 26153 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 26154 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 26155 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 26156 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 26157 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 26158 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 26159 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 26160 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 26161 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 26162 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 26163 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 26164 // CHECK20-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 26165 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 26166 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 26167 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 26168 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 26169 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 26170 // CHECK20: cond.true: 26171 // CHECK20-NEXT: br label [[COND_END:%.*]] 26172 // CHECK20: cond.false: 26173 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 26174 // CHECK20-NEXT: br label [[COND_END]] 26175 // CHECK20: cond.end: 26176 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 26177 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 26178 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 26179 // CHECK20-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 26180 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 26181 // CHECK20: omp.inner.for.cond: 26182 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 26183 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 26184 // CHECK20-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 26185 // CHECK20-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 26186 // CHECK20: omp.inner.for.body: 26187 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 26188 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 26189 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 26190 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I]], align 4 26191 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 26192 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]] 26193 // CHECK20-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 26194 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 26195 // CHECK20: omp.body.continue: 26196 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 26197 // CHECK20: omp.inner.for.inc: 26198 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 26199 // CHECK20-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 26200 // CHECK20-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 26201 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 26202 // CHECK20: omp.inner.for.end: 26203 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 26204 // CHECK20: omp.loop.exit: 26205 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 26206 // CHECK20-NEXT: ret void 26207 // 26208 // 26209 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121 26210 // CHECK20-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 26211 // CHECK20-NEXT: entry: 26212 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 26213 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 26214 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 26215 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..17 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 26216 // CHECK20-NEXT: ret void 26217 // 26218 // 26219 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..17 26220 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 26221 // CHECK20-NEXT: entry: 26222 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 26223 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 26224 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 26225 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 26226 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 26227 // CHECK20-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 26228 // CHECK20-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 26229 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 26230 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 26231 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 26232 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 26233 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 26234 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 26235 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 26236 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 26237 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 26238 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 26239 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 26240 // CHECK20-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 26241 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 26242 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 26243 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 26244 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 26245 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 26246 // CHECK20: cond.true: 26247 // CHECK20-NEXT: br label [[COND_END:%.*]] 26248 // CHECK20: cond.false: 26249 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 26250 // CHECK20-NEXT: br label [[COND_END]] 26251 // CHECK20: cond.end: 26252 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 26253 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 26254 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 26255 // CHECK20-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 26256 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 26257 // CHECK20: omp.inner.for.cond: 26258 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 26259 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 26260 // CHECK20-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 26261 // CHECK20-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 26262 // CHECK20: omp.inner.for.body: 26263 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 26264 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 26265 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..18 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]) 26266 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 26267 // CHECK20: omp.inner.for.inc: 26268 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 26269 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 26270 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 26271 // CHECK20-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 26272 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 26273 // CHECK20: omp.inner.for.end: 26274 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 26275 // CHECK20: omp.loop.exit: 26276 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 26277 // CHECK20-NEXT: ret void 26278 // 26279 // 26280 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..18 26281 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 26282 // CHECK20-NEXT: entry: 26283 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 26284 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 26285 // CHECK20-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 26286 // CHECK20-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 26287 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 26288 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 26289 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 26290 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 26291 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 26292 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 26293 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 26294 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 26295 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 26296 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 26297 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 26298 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 26299 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 26300 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 26301 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 26302 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 26303 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 26304 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 26305 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 26306 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 26307 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 26308 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 26309 // CHECK20-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 26310 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 26311 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 26312 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 26313 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9 26314 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 26315 // CHECK20: cond.true: 26316 // CHECK20-NEXT: br label [[COND_END:%.*]] 26317 // CHECK20: cond.false: 26318 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 26319 // CHECK20-NEXT: br label [[COND_END]] 26320 // CHECK20: cond.end: 26321 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 26322 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 26323 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 26324 // CHECK20-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 26325 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 26326 // CHECK20: omp.inner.for.cond: 26327 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 26328 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 26329 // CHECK20-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 26330 // CHECK20-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 26331 // CHECK20: omp.inner.for.body: 26332 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 26333 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 26334 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 26335 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I]], align 4 26336 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 26337 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP11]] 26338 // CHECK20-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 26339 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 26340 // CHECK20: omp.body.continue: 26341 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 26342 // CHECK20: omp.inner.for.inc: 26343 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 26344 // CHECK20-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1 26345 // CHECK20-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 26346 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 26347 // CHECK20: omp.inner.for.end: 26348 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 26349 // CHECK20: omp.loop.exit: 26350 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 26351 // CHECK20-NEXT: ret void 26352 // 26353 // 26354 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126 26355 // CHECK20-SAME: (i32 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 26356 // CHECK20-NEXT: entry: 26357 // CHECK20-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 26358 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 26359 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 26360 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 26361 // CHECK20-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 26362 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 26363 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 26364 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4 26365 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 26366 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 26367 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 26368 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 26369 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..21 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]]) 26370 // CHECK20-NEXT: ret void 26371 // 26372 // 26373 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..21 26374 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 26375 // CHECK20-NEXT: entry: 26376 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 26377 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 26378 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 26379 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 26380 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 26381 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 26382 // CHECK20-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 26383 // CHECK20-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 26384 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 26385 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 26386 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 26387 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 26388 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 26389 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 26390 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 26391 // CHECK20-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 26392 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 26393 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 26394 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 26395 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 26396 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 26397 // CHECK20-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 26398 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 26399 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 26400 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 26401 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 26402 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 26403 // CHECK20: cond.true: 26404 // CHECK20-NEXT: br label [[COND_END:%.*]] 26405 // CHECK20: cond.false: 26406 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 26407 // CHECK20-NEXT: br label [[COND_END]] 26408 // CHECK20: cond.end: 26409 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 26410 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 26411 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 26412 // CHECK20-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 26413 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 26414 // CHECK20: omp.inner.for.cond: 26415 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 26416 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 26417 // CHECK20-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 26418 // CHECK20-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 26419 // CHECK20: omp.inner.for.body: 26420 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 26421 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 26422 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 26423 // CHECK20-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 26424 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 26425 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..22 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]]) 26426 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 26427 // CHECK20: omp.inner.for.inc: 26428 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 26429 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 26430 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 26431 // CHECK20-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 26432 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 26433 // CHECK20: omp.inner.for.end: 26434 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 26435 // CHECK20: omp.loop.exit: 26436 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 26437 // CHECK20-NEXT: ret void 26438 // 26439 // 26440 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..22 26441 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 26442 // CHECK20-NEXT: entry: 26443 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 26444 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 26445 // CHECK20-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 26446 // CHECK20-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 26447 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 26448 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 26449 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 26450 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 26451 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 26452 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 26453 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 26454 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 26455 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 26456 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 26457 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 26458 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 26459 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 26460 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 26461 // CHECK20-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 26462 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 26463 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 26464 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 26465 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 26466 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 26467 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 26468 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 26469 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 26470 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 26471 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 26472 // CHECK20-NEXT: [[TMP4:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 26473 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[TMP4]], align 4 26474 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP5]], i32 33, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]]) 26475 // CHECK20-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 26476 // CHECK20: omp.dispatch.cond: 26477 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 26478 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 26479 // CHECK20-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP6]], [[TMP7]] 26480 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 26481 // CHECK20: cond.true: 26482 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 26483 // CHECK20-NEXT: br label [[COND_END:%.*]] 26484 // CHECK20: cond.false: 26485 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 26486 // CHECK20-NEXT: br label [[COND_END]] 26487 // CHECK20: cond.end: 26488 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ [[TMP8]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] 26489 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 26490 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 26491 // CHECK20-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 26492 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 26493 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 26494 // CHECK20-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] 26495 // CHECK20-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 26496 // CHECK20: omp.dispatch.body: 26497 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 26498 // CHECK20: omp.inner.for.cond: 26499 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 26500 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 26501 // CHECK20-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] 26502 // CHECK20-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 26503 // CHECK20: omp.inner.for.body: 26504 // CHECK20-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 26505 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 26506 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 26507 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I]], align 4 26508 // CHECK20-NEXT: [[TMP16:%.*]] = load i32, i32* [[I]], align 4 26509 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP16]] 26510 // CHECK20-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4 26511 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 26512 // CHECK20: omp.body.continue: 26513 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 26514 // CHECK20: omp.inner.for.inc: 26515 // CHECK20-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 26516 // CHECK20-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1 26517 // CHECK20-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_IV]], align 4 26518 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 26519 // CHECK20: omp.inner.for.end: 26520 // CHECK20-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 26521 // CHECK20: omp.dispatch.inc: 26522 // CHECK20-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 26523 // CHECK20-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 26524 // CHECK20-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 26525 // CHECK20-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_LB]], align 4 26526 // CHECK20-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 26527 // CHECK20-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 26528 // CHECK20-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] 26529 // CHECK20-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_UB]], align 4 26530 // CHECK20-NEXT: br label [[OMP_DISPATCH_COND]] 26531 // CHECK20: omp.dispatch.end: 26532 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) 26533 // CHECK20-NEXT: ret void 26534 // 26535 // 26536 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131 26537 // CHECK20-SAME: ([10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 26538 // CHECK20-NEXT: entry: 26539 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 26540 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 26541 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 26542 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*)* @.omp_outlined..25 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]]) 26543 // CHECK20-NEXT: ret void 26544 // 26545 // 26546 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..25 26547 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 26548 // CHECK20-NEXT: entry: 26549 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 26550 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 26551 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 26552 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 26553 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 26554 // CHECK20-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 26555 // CHECK20-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 26556 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 26557 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 26558 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 26559 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 26560 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 26561 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 26562 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 26563 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 26564 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 26565 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 26566 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 26567 // CHECK20-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 26568 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 26569 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 26570 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 26571 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 26572 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 26573 // CHECK20: cond.true: 26574 // CHECK20-NEXT: br label [[COND_END:%.*]] 26575 // CHECK20: cond.false: 26576 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 26577 // CHECK20-NEXT: br label [[COND_END]] 26578 // CHECK20: cond.end: 26579 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 26580 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 26581 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 26582 // CHECK20-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 26583 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 26584 // CHECK20: omp.inner.for.cond: 26585 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 26586 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 26587 // CHECK20-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 26588 // CHECK20-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 26589 // CHECK20: omp.inner.for.body: 26590 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 26591 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 26592 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @.omp_outlined..26 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]]) 26593 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 26594 // CHECK20: omp.inner.for.inc: 26595 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 26596 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 26597 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 26598 // CHECK20-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 26599 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 26600 // CHECK20: omp.inner.for.end: 26601 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 26602 // CHECK20: omp.loop.exit: 26603 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 26604 // CHECK20-NEXT: ret void 26605 // 26606 // 26607 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..26 26608 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 26609 // CHECK20-NEXT: entry: 26610 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 26611 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 26612 // CHECK20-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 26613 // CHECK20-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 26614 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 26615 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 26616 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 26617 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 26618 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 26619 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 26620 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 26621 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 26622 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 26623 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 26624 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 26625 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 26626 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 26627 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 26628 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 26629 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 26630 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 26631 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 26632 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 26633 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 26634 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 26635 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 26636 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 26637 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 26638 // CHECK20-NEXT: [[TMP5:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 26639 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[TMP5]], align 4 26640 // CHECK20-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1) 26641 // CHECK20-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 26642 // CHECK20: omp.dispatch.cond: 26643 // CHECK20-NEXT: [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP6]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 26644 // CHECK20-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0 26645 // CHECK20-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 26646 // CHECK20: omp.dispatch.body: 26647 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 26648 // CHECK20-NEXT: store i32 [[TMP8]], i32* [[DOTOMP_IV]], align 4 26649 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 26650 // CHECK20: omp.inner.for.cond: 26651 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 26652 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !21 26653 // CHECK20-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]] 26654 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 26655 // CHECK20: omp.inner.for.body: 26656 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 26657 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1 26658 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 26659 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !21 26660 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !21 26661 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP12]] 26662 // CHECK20-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !21 26663 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 26664 // CHECK20: omp.body.continue: 26665 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 26666 // CHECK20: omp.inner.for.inc: 26667 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 26668 // CHECK20-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1 26669 // CHECK20-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !21 26670 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]] 26671 // CHECK20: omp.inner.for.end: 26672 // CHECK20-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 26673 // CHECK20: omp.dispatch.inc: 26674 // CHECK20-NEXT: br label [[OMP_DISPATCH_COND]] 26675 // CHECK20: omp.dispatch.end: 26676 // CHECK20-NEXT: ret void 26677 // 26678 // 26679 // CHECK20-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136 26680 // CHECK20-SAME: (i32 [[M:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] { 26681 // CHECK20-NEXT: entry: 26682 // CHECK20-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4 26683 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 26684 // CHECK20-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4 26685 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 26686 // CHECK20-NEXT: store i32 [[M]], i32* [[M_ADDR]], align 4 26687 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 26688 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 26689 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[M_ADDR]], align 4 26690 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[DOTCAPTURE_EXPR_]], align 4 26691 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 26692 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 26693 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 26694 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB3]], i32 2, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, [10 x i32]*, i32)* @.omp_outlined..29 to void (i32*, i32*, ...)*), [10 x i32]* [[TMP0]], i32 [[TMP3]]) 26695 // CHECK20-NEXT: ret void 26696 // 26697 // 26698 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..29 26699 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 26700 // CHECK20-NEXT: entry: 26701 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 26702 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 26703 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 26704 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 26705 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 26706 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 26707 // CHECK20-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 26708 // CHECK20-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 26709 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 26710 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 26711 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 26712 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4 26713 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 26714 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 26715 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 26716 // CHECK20-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 26717 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 26718 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 26719 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_COMB_UB]], align 4 26720 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 26721 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 26722 // CHECK20-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 26723 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 26724 // CHECK20-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 26725 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 26726 // CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9 26727 // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 26728 // CHECK20: cond.true: 26729 // CHECK20-NEXT: br label [[COND_END:%.*]] 26730 // CHECK20: cond.false: 26731 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 26732 // CHECK20-NEXT: br label [[COND_END]] 26733 // CHECK20: cond.end: 26734 // CHECK20-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 26735 // CHECK20-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 26736 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 26737 // CHECK20-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 26738 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 26739 // CHECK20: omp.inner.for.cond: 26740 // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 26741 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 26742 // CHECK20-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 26743 // CHECK20-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 26744 // CHECK20: omp.inner.for.body: 26745 // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 26746 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 26747 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 26748 // CHECK20-NEXT: store i32 [[TMP10]], i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 26749 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__CASTED]], align 4 26750 // CHECK20-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB3]], i32 4, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*, i32)* @.omp_outlined..30 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], [10 x i32]* [[TMP0]], i32 [[TMP11]]) 26751 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 26752 // CHECK20: omp.inner.for.inc: 26753 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 26754 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 26755 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 26756 // CHECK20-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 26757 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]] 26758 // CHECK20: omp.inner.for.end: 26759 // CHECK20-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 26760 // CHECK20: omp.loop.exit: 26761 // CHECK20-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 26762 // CHECK20-NEXT: ret void 26763 // 26764 // 26765 // CHECK20-LABEL: define {{[^@]+}}@.omp_outlined..30 26766 // CHECK20-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], [10 x i32]* nonnull align 4 dereferenceable(40) [[A:%.*]], i32 [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] { 26767 // CHECK20-NEXT: entry: 26768 // CHECK20-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 26769 // CHECK20-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 26770 // CHECK20-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 26771 // CHECK20-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 26772 // CHECK20-NEXT: [[A_ADDR:%.*]] = alloca [10 x i32]*, align 4 26773 // CHECK20-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4 26774 // CHECK20-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 26775 // CHECK20-NEXT: [[TMP:%.*]] = alloca i32, align 4 26776 // CHECK20-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 26777 // CHECK20-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 26778 // CHECK20-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 26779 // CHECK20-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 26780 // CHECK20-NEXT: [[I:%.*]] = alloca i32, align 4 26781 // CHECK20-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 26782 // CHECK20-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 26783 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 26784 // CHECK20-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 26785 // CHECK20-NEXT: store [10 x i32]* [[A]], [10 x i32]** [[A_ADDR]], align 4 26786 // CHECK20-NEXT: store i32 [[DOTCAPTURE_EXPR_]], i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 26787 // CHECK20-NEXT: [[TMP0:%.*]] = load [10 x i32]*, [10 x i32]** [[A_ADDR]], align 4 26788 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 26789 // CHECK20-NEXT: store i32 9, i32* [[DOTOMP_UB]], align 4 26790 // CHECK20-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 26791 // CHECK20-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 26792 // CHECK20-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 26793 // CHECK20-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 26794 // CHECK20-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 26795 // CHECK20-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 26796 // CHECK20-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR__ADDR]], align 4 26797 // CHECK20-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 26798 // CHECK20-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 26799 // CHECK20-NEXT: [[TMP6:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 26800 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[TMP6]], align 4 26801 // CHECK20-NEXT: call void @__kmpc_dispatch_init_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]]) 26802 // CHECK20-NEXT: br label [[OMP_DISPATCH_COND:%.*]] 26803 // CHECK20: omp.dispatch.cond: 26804 // CHECK20-NEXT: [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* @[[GLOB3]], i32 [[TMP7]], i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]]) 26805 // CHECK20-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0 26806 // CHECK20-NEXT: br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] 26807 // CHECK20: omp.dispatch.body: 26808 // CHECK20-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 26809 // CHECK20-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 26810 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 26811 // CHECK20: omp.inner.for.cond: 26812 // CHECK20-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 26813 // CHECK20-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !24 26814 // CHECK20-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] 26815 // CHECK20-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 26816 // CHECK20: omp.inner.for.body: 26817 // CHECK20-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 26818 // CHECK20-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 26819 // CHECK20-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 26820 // CHECK20-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group !24 26821 // CHECK20-NEXT: [[TMP13:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group !24 26822 // CHECK20-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP13]] 26823 // CHECK20-NEXT: store i32 0, i32* [[ARRAYIDX]], align 4, !llvm.access.group !24 26824 // CHECK20-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 26825 // CHECK20: omp.body.continue: 26826 // CHECK20-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 26827 // CHECK20: omp.inner.for.inc: 26828 // CHECK20-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 26829 // CHECK20-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP14]], 1 26830 // CHECK20-NEXT: store i32 [[ADD1]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !24 26831 // CHECK20-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]] 26832 // CHECK20: omp.inner.for.end: 26833 // CHECK20-NEXT: br label [[OMP_DISPATCH_INC:%.*]] 26834 // CHECK20: omp.dispatch.inc: 26835 // CHECK20-NEXT: br label [[OMP_DISPATCH_COND]] 26836 // CHECK20: omp.dispatch.end: 26837 // CHECK20-NEXT: ret void 26838 // 26839 // 26840 // CHECK20-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 26841 // CHECK20-SAME: () #[[ATTR5:[0-9]+]] { 26842 // CHECK20-NEXT: entry: 26843 // CHECK20-NEXT: call void @__tgt_register_requires(i64 1) 26844 // CHECK20-NEXT: ret void 26845 // 26846 //