1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ 2 // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1 3 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 4 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK2 5 // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3 6 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 7 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK4 8 9 // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5 10 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 11 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK6 12 // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7 13 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s 14 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK8 15 16 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9 17 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 18 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK10 19 20 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11 21 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s 22 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK12 23 24 // expected-no-diagnostics 25 #ifndef HEADER 26 #define HEADER 27 28 template <typename T> 29 T tmain() { 30 T t_var = T(); 31 T vec[] = {1, 2}; 32 #pragma omp target 33 #pragma omp teams distribute parallel for reduction(+: t_var) 34 for (int i = 0; i < 2; ++i) { 35 t_var += (T) i; 36 } 37 return T(); 38 } 39 40 int main() { 41 static int sivar; 42 #ifdef LAMBDA 43 44 [&]() { 45 #pragma omp target 46 #pragma omp teams distribute parallel for reduction(+: sivar) 47 for (int i = 0; i < 2; ++i) { 48 49 // Skip global and bound tid vars 50 51 52 53 // Skip global and bound tid vars, and prev lb and ub vars 54 // skip loop vars 55 56 57 sivar += i; 58 59 [&]() { 60 61 sivar += 4; 62 63 }(); 64 } 65 }(); 66 return 0; 67 #else 68 #pragma omp target 69 #pragma omp teams distribute parallel for reduction(+: sivar) 70 for (int i = 0; i < 2; ++i) { 71 sivar += i; 72 } 73 return tmain<int>(); 74 #endif 75 } 76 77 78 79 80 // Skip global and bound tid vars 81 82 83 // Skip global and bound tid vars, and prev lb and ub 84 // skip loop vars 85 86 87 88 89 // Skip global and bound tid vars 90 91 92 // Skip global and bound tid vars, and prev lb and ub vars 93 // skip loop vars 94 95 #endif 96 // CHECK1-LABEL: define {{[^@]+}}@main 97 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] { 98 // CHECK1-NEXT: entry: 99 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 100 // CHECK1-NEXT: [[SIVAR_CASTED:%.*]] = alloca i64, align 8 101 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 102 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 103 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 104 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 105 // CHECK1-NEXT: store i32 0, i32* [[RETVAL]], align 4 106 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4 107 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[SIVAR_CASTED]] to i32* 108 // CHECK1-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 109 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[SIVAR_CASTED]], align 8 110 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 111 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i64* 112 // CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP3]], align 8 113 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 114 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64* 115 // CHECK1-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8 116 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 117 // CHECK1-NEXT: store i8* null, i8** [[TMP6]], align 8 118 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 119 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 120 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i64 2) 121 // CHECK1-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, i32 1, i8** [[TMP7]], i8** [[TMP8]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 122 // CHECK1-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0 123 // CHECK1-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 124 // CHECK1: omp_offload.failed: 125 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68(i64 [[TMP1]]) #[[ATTR2:[0-9]+]] 126 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 127 // CHECK1: omp_offload.cont: 128 // CHECK1-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v() 129 // CHECK1-NEXT: ret i32 [[CALL]] 130 // 131 // 132 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 133 // CHECK1-SAME: (i64 [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] { 134 // CHECK1-NEXT: entry: 135 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 8 136 // CHECK1-NEXT: store i64 [[SIVAR]], i64* [[SIVAR_ADDR]], align 8 137 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[SIVAR_ADDR]] to i32* 138 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]]) 139 // CHECK1-NEXT: ret void 140 // 141 // 142 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined. 143 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 144 // CHECK1-NEXT: entry: 145 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 146 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 147 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8 148 // CHECK1-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 149 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 150 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 151 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 152 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 153 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 154 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 155 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 156 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 157 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 158 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 159 // CHECK1-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8 160 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8 161 // CHECK1-NEXT: store i32 0, i32* [[SIVAR1]], align 4 162 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 163 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 164 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 165 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 166 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 167 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 168 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 169 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 170 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 171 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 172 // CHECK1: cond.true: 173 // CHECK1-NEXT: br label [[COND_END:%.*]] 174 // CHECK1: cond.false: 175 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 176 // CHECK1-NEXT: br label [[COND_END]] 177 // CHECK1: cond.end: 178 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 179 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 180 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 181 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 182 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 183 // CHECK1: omp.inner.for.cond: 184 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 185 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 186 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 187 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 188 // CHECK1: omp.inner.for.body: 189 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 190 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 191 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 192 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 193 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], i32* [[SIVAR1]]) 194 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 195 // CHECK1: omp.inner.for.inc: 196 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 197 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 198 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 199 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 200 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 201 // CHECK1: omp.inner.for.end: 202 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 203 // CHECK1: omp.loop.exit: 204 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 205 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 206 // CHECK1-NEXT: [[TMP15:%.*]] = bitcast i32* [[SIVAR1]] to i8* 207 // CHECK1-NEXT: store i8* [[TMP15]], i8** [[TMP14]], align 8 208 // CHECK1-NEXT: [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 209 // CHECK1-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var) 210 // CHECK1-NEXT: switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 211 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 212 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 213 // CHECK1-NEXT: ] 214 // CHECK1: .omp.reduction.case1: 215 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP0]], align 4 216 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[SIVAR1]], align 4 217 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 218 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[TMP0]], align 4 219 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 220 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 221 // CHECK1: .omp.reduction.case2: 222 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[SIVAR1]], align 4 223 // CHECK1-NEXT: [[TMP21:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP20]] monotonic, align 4 224 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 225 // CHECK1: .omp.reduction.default: 226 // CHECK1-NEXT: ret void 227 // 228 // 229 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..1 230 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 231 // CHECK1-NEXT: entry: 232 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 233 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 234 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 235 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 236 // CHECK1-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8 237 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 238 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 239 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 240 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 241 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 242 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 243 // CHECK1-NEXT: [[SIVAR2:%.*]] = alloca i32, align 4 244 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 245 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 246 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 247 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 248 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 249 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 250 // CHECK1-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8 251 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8 252 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 253 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 254 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 255 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 256 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 257 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 258 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 259 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 260 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 261 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 262 // CHECK1-NEXT: store i32 0, i32* [[SIVAR2]], align 4 263 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 264 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 265 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 266 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 267 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1 268 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 269 // CHECK1: cond.true: 270 // CHECK1-NEXT: br label [[COND_END:%.*]] 271 // CHECK1: cond.false: 272 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 273 // CHECK1-NEXT: br label [[COND_END]] 274 // CHECK1: cond.end: 275 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 276 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 277 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 278 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 279 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 280 // CHECK1: omp.inner.for.cond: 281 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 282 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 283 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 284 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 285 // CHECK1: omp.inner.for.body: 286 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 287 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 288 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 289 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 290 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 291 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[SIVAR2]], align 4 292 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], [[TMP11]] 293 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[SIVAR2]], align 4 294 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 295 // CHECK1: omp.body.continue: 296 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 297 // CHECK1: omp.inner.for.inc: 298 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 299 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], 1 300 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 301 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 302 // CHECK1: omp.inner.for.end: 303 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 304 // CHECK1: omp.loop.exit: 305 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 306 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 307 // CHECK1-NEXT: [[TMP15:%.*]] = bitcast i32* [[SIVAR2]] to i8* 308 // CHECK1-NEXT: store i8* [[TMP15]], i8** [[TMP14]], align 8 309 // CHECK1-NEXT: [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 310 // CHECK1-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 1, i64 8, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var) 311 // CHECK1-NEXT: switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 312 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 313 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 314 // CHECK1-NEXT: ] 315 // CHECK1: .omp.reduction.case1: 316 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP0]], align 4 317 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[SIVAR2]], align 4 318 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 319 // CHECK1-NEXT: store i32 [[ADD6]], i32* [[TMP0]], align 4 320 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var) 321 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 322 // CHECK1: .omp.reduction.case2: 323 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[SIVAR2]], align 4 324 // CHECK1-NEXT: [[TMP21:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP20]] monotonic, align 4 325 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 326 // CHECK1: .omp.reduction.default: 327 // CHECK1-NEXT: ret void 328 // 329 // 330 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func 331 // CHECK1-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] { 332 // CHECK1-NEXT: entry: 333 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 334 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 335 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 336 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 337 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 338 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 339 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 340 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 341 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 342 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 343 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 344 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 345 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 346 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 347 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 348 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 349 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 350 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 351 // CHECK1-NEXT: ret void 352 // 353 // 354 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2 355 // CHECK1-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] { 356 // CHECK1-NEXT: entry: 357 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 358 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 359 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 360 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 361 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 362 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 363 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 364 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 365 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 366 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 367 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 368 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 369 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 370 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 371 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 372 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 373 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 374 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 375 // CHECK1-NEXT: ret void 376 // 377 // 378 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 379 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] comdat { 380 // CHECK1-NEXT: entry: 381 // CHECK1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 382 // CHECK1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 383 // CHECK1-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 384 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 385 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 386 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 387 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 388 // CHECK1-NEXT: store i32 0, i32* [[T_VAR]], align 4 389 // CHECK1-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 390 // CHECK1-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 391 // CHECK1-NEXT: [[TMP1:%.*]] = load i32, i32* [[T_VAR]], align 4 392 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 393 // CHECK1-NEXT: store i32 [[TMP1]], i32* [[CONV]], align 4 394 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 395 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 396 // CHECK1-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i64* 397 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP4]], align 8 398 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 399 // CHECK1-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64* 400 // CHECK1-NEXT: store i64 [[TMP2]], i64* [[TMP6]], align 8 401 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 402 // CHECK1-NEXT: store i8* null, i8** [[TMP7]], align 8 403 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 404 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 405 // CHECK1-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i64 2) 406 // CHECK1-NEXT: [[TMP10:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, i32 1, i8** [[TMP8]], i8** [[TMP9]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.7, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.8, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 407 // CHECK1-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0 408 // CHECK1-NEXT: br i1 [[TMP11]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 409 // CHECK1: omp_offload.failed: 410 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i64 [[TMP2]]) #[[ATTR2]] 411 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]] 412 // CHECK1: omp_offload.cont: 413 // CHECK1-NEXT: ret i32 0 414 // 415 // 416 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32 417 // CHECK1-SAME: (i64 [[T_VAR:%.*]]) #[[ATTR1]] { 418 // CHECK1-NEXT: entry: 419 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 420 // CHECK1-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 421 // CHECK1-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 422 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32* [[CONV]]) 423 // CHECK1-NEXT: ret void 424 // 425 // 426 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..3 427 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 428 // CHECK1-NEXT: entry: 429 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 430 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 431 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 432 // CHECK1-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 433 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 434 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 435 // CHECK1-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 436 // CHECK1-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 437 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 438 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 439 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 440 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 441 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 442 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 443 // CHECK1-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 444 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 445 // CHECK1-NEXT: store i32 0, i32* [[T_VAR1]], align 4 446 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 447 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 448 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 449 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 450 // CHECK1-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 451 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 452 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 453 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 454 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 455 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 456 // CHECK1: cond.true: 457 // CHECK1-NEXT: br label [[COND_END:%.*]] 458 // CHECK1: cond.false: 459 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 460 // CHECK1-NEXT: br label [[COND_END]] 461 // CHECK1: cond.end: 462 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 463 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 464 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 465 // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 466 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 467 // CHECK1: omp.inner.for.cond: 468 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 469 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 470 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 471 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 472 // CHECK1: omp.inner.for.body: 473 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 474 // CHECK1-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 475 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 476 // CHECK1-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 477 // CHECK1-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], i32* [[T_VAR1]]) 478 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 479 // CHECK1: omp.inner.for.inc: 480 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 481 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 482 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 483 // CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 484 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 485 // CHECK1: omp.inner.for.end: 486 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 487 // CHECK1: omp.loop.exit: 488 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 489 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 490 // CHECK1-NEXT: [[TMP15:%.*]] = bitcast i32* [[T_VAR1]] to i8* 491 // CHECK1-NEXT: store i8* [[TMP15]], i8** [[TMP14]], align 8 492 // CHECK1-NEXT: [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 493 // CHECK1-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func.6, [8 x i32]* @.gomp_critical_user_.reduction.var) 494 // CHECK1-NEXT: switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 495 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 496 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 497 // CHECK1-NEXT: ] 498 // CHECK1: .omp.reduction.case1: 499 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP0]], align 4 500 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[T_VAR1]], align 4 501 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 502 // CHECK1-NEXT: store i32 [[ADD3]], i32* [[TMP0]], align 4 503 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 504 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 505 // CHECK1: .omp.reduction.case2: 506 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[T_VAR1]], align 4 507 // CHECK1-NEXT: [[TMP21:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP20]] monotonic, align 4 508 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 509 // CHECK1: .omp.reduction.default: 510 // CHECK1-NEXT: ret void 511 // 512 // 513 // CHECK1-LABEL: define {{[^@]+}}@.omp_outlined..4 514 // CHECK1-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 515 // CHECK1-NEXT: entry: 516 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 517 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 518 // CHECK1-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 519 // CHECK1-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 520 // CHECK1-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 521 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 522 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4 523 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 524 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 525 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 526 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 527 // CHECK1-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 528 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 529 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 530 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 531 // CHECK1-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 532 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 533 // CHECK1-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 534 // CHECK1-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 535 // CHECK1-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 536 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 537 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 538 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 539 // CHECK1-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 540 // CHECK1-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 541 // CHECK1-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 542 // CHECK1-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 543 // CHECK1-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 544 // CHECK1-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 545 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 546 // CHECK1-NEXT: store i32 0, i32* [[T_VAR2]], align 4 547 // CHECK1-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 548 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 549 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 550 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 551 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1 552 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 553 // CHECK1: cond.true: 554 // CHECK1-NEXT: br label [[COND_END:%.*]] 555 // CHECK1: cond.false: 556 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 557 // CHECK1-NEXT: br label [[COND_END]] 558 // CHECK1: cond.end: 559 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 560 // CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 561 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 562 // CHECK1-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 563 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 564 // CHECK1: omp.inner.for.cond: 565 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 566 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 567 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 568 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 569 // CHECK1: omp.inner.for.body: 570 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 571 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 572 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 573 // CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 574 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 575 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[T_VAR2]], align 4 576 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], [[TMP11]] 577 // CHECK1-NEXT: store i32 [[ADD4]], i32* [[T_VAR2]], align 4 578 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 579 // CHECK1: omp.body.continue: 580 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 581 // CHECK1: omp.inner.for.inc: 582 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 583 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], 1 584 // CHECK1-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 585 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] 586 // CHECK1: omp.inner.for.end: 587 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 588 // CHECK1: omp.loop.exit: 589 // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 590 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 591 // CHECK1-NEXT: [[TMP15:%.*]] = bitcast i32* [[T_VAR2]] to i8* 592 // CHECK1-NEXT: store i8* [[TMP15]], i8** [[TMP14]], align 8 593 // CHECK1-NEXT: [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 594 // CHECK1-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 1, i64 8, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func.5, [8 x i32]* @.gomp_critical_user_.reduction.var) 595 // CHECK1-NEXT: switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 596 // CHECK1-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 597 // CHECK1-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 598 // CHECK1-NEXT: ] 599 // CHECK1: .omp.reduction.case1: 600 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP0]], align 4 601 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[T_VAR2]], align 4 602 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 603 // CHECK1-NEXT: store i32 [[ADD6]], i32* [[TMP0]], align 4 604 // CHECK1-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var) 605 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 606 // CHECK1: .omp.reduction.case2: 607 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[T_VAR2]], align 4 608 // CHECK1-NEXT: [[TMP21:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP20]] monotonic, align 4 609 // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 610 // CHECK1: .omp.reduction.default: 611 // CHECK1-NEXT: ret void 612 // 613 // 614 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.5 615 // CHECK1-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] { 616 // CHECK1-NEXT: entry: 617 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 618 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 619 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 620 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 621 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 622 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 623 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 624 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 625 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 626 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 627 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 628 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 629 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 630 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 631 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 632 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 633 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 634 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 635 // CHECK1-NEXT: ret void 636 // 637 // 638 // CHECK1-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.6 639 // CHECK1-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] { 640 // CHECK1-NEXT: entry: 641 // CHECK1-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 642 // CHECK1-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 643 // CHECK1-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 644 // CHECK1-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 645 // CHECK1-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 646 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 647 // CHECK1-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 648 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 649 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 650 // CHECK1-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 651 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 652 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 653 // CHECK1-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 654 // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 655 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 656 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 657 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 658 // CHECK1-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 659 // CHECK1-NEXT: ret void 660 // 661 // 662 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 663 // CHECK1-SAME: () #[[ATTR7:[0-9]+]] { 664 // CHECK1-NEXT: entry: 665 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1) 666 // CHECK1-NEXT: ret void 667 // 668 // 669 // CHECK2-LABEL: define {{[^@]+}}@main 670 // CHECK2-SAME: () #[[ATTR0:[0-9]+]] { 671 // CHECK2-NEXT: entry: 672 // CHECK2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 673 // CHECK2-NEXT: [[SIVAR_CASTED:%.*]] = alloca i64, align 8 674 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 675 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 676 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 677 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 678 // CHECK2-NEXT: store i32 0, i32* [[RETVAL]], align 4 679 // CHECK2-NEXT: [[TMP0:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4 680 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[SIVAR_CASTED]] to i32* 681 // CHECK2-NEXT: store i32 [[TMP0]], i32* [[CONV]], align 4 682 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[SIVAR_CASTED]], align 8 683 // CHECK2-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 684 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i64* 685 // CHECK2-NEXT: store i64 [[TMP1]], i64* [[TMP3]], align 8 686 // CHECK2-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 687 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i64* 688 // CHECK2-NEXT: store i64 [[TMP1]], i64* [[TMP5]], align 8 689 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 690 // CHECK2-NEXT: store i8* null, i8** [[TMP6]], align 8 691 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 692 // CHECK2-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 693 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i64 2) 694 // CHECK2-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, i32 1, i8** [[TMP7]], i8** [[TMP8]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 695 // CHECK2-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0 696 // CHECK2-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 697 // CHECK2: omp_offload.failed: 698 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68(i64 [[TMP1]]) #[[ATTR2:[0-9]+]] 699 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]] 700 // CHECK2: omp_offload.cont: 701 // CHECK2-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v() 702 // CHECK2-NEXT: ret i32 [[CALL]] 703 // 704 // 705 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 706 // CHECK2-SAME: (i64 [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] { 707 // CHECK2-NEXT: entry: 708 // CHECK2-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 8 709 // CHECK2-NEXT: store i64 [[SIVAR]], i64* [[SIVAR_ADDR]], align 8 710 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[SIVAR_ADDR]] to i32* 711 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]]) 712 // CHECK2-NEXT: ret void 713 // 714 // 715 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined. 716 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 717 // CHECK2-NEXT: entry: 718 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 719 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 720 // CHECK2-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8 721 // CHECK2-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 722 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 723 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 724 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 725 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 726 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 727 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 728 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 729 // CHECK2-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 730 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 731 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 732 // CHECK2-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8 733 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8 734 // CHECK2-NEXT: store i32 0, i32* [[SIVAR1]], align 4 735 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 736 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 737 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 738 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 739 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 740 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 741 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 742 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 743 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 744 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 745 // CHECK2: cond.true: 746 // CHECK2-NEXT: br label [[COND_END:%.*]] 747 // CHECK2: cond.false: 748 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 749 // CHECK2-NEXT: br label [[COND_END]] 750 // CHECK2: cond.end: 751 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 752 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 753 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 754 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 755 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 756 // CHECK2: omp.inner.for.cond: 757 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 758 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 759 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 760 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 761 // CHECK2: omp.inner.for.body: 762 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 763 // CHECK2-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 764 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 765 // CHECK2-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 766 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], i32* [[SIVAR1]]) 767 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 768 // CHECK2: omp.inner.for.inc: 769 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 770 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 771 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 772 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 773 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 774 // CHECK2: omp.inner.for.end: 775 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 776 // CHECK2: omp.loop.exit: 777 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 778 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 779 // CHECK2-NEXT: [[TMP15:%.*]] = bitcast i32* [[SIVAR1]] to i8* 780 // CHECK2-NEXT: store i8* [[TMP15]], i8** [[TMP14]], align 8 781 // CHECK2-NEXT: [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 782 // CHECK2-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var) 783 // CHECK2-NEXT: switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 784 // CHECK2-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 785 // CHECK2-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 786 // CHECK2-NEXT: ] 787 // CHECK2: .omp.reduction.case1: 788 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP0]], align 4 789 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[SIVAR1]], align 4 790 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 791 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[TMP0]], align 4 792 // CHECK2-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 793 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 794 // CHECK2: .omp.reduction.case2: 795 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[SIVAR1]], align 4 796 // CHECK2-NEXT: [[TMP21:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP20]] monotonic, align 4 797 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 798 // CHECK2: .omp.reduction.default: 799 // CHECK2-NEXT: ret void 800 // 801 // 802 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..1 803 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 804 // CHECK2-NEXT: entry: 805 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 806 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 807 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 808 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 809 // CHECK2-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8 810 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 811 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 812 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 813 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 814 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 815 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 816 // CHECK2-NEXT: [[SIVAR2:%.*]] = alloca i32, align 4 817 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 818 // CHECK2-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 819 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 820 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 821 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 822 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 823 // CHECK2-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8 824 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8 825 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 826 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 827 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 828 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 829 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 830 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 831 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 832 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 833 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 834 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 835 // CHECK2-NEXT: store i32 0, i32* [[SIVAR2]], align 4 836 // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 837 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 838 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 839 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 840 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1 841 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 842 // CHECK2: cond.true: 843 // CHECK2-NEXT: br label [[COND_END:%.*]] 844 // CHECK2: cond.false: 845 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 846 // CHECK2-NEXT: br label [[COND_END]] 847 // CHECK2: cond.end: 848 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 849 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 850 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 851 // CHECK2-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 852 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 853 // CHECK2: omp.inner.for.cond: 854 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 855 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 856 // CHECK2-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 857 // CHECK2-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 858 // CHECK2: omp.inner.for.body: 859 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 860 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 861 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 862 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 863 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 864 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[SIVAR2]], align 4 865 // CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], [[TMP11]] 866 // CHECK2-NEXT: store i32 [[ADD4]], i32* [[SIVAR2]], align 4 867 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 868 // CHECK2: omp.body.continue: 869 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 870 // CHECK2: omp.inner.for.inc: 871 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 872 // CHECK2-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], 1 873 // CHECK2-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 874 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 875 // CHECK2: omp.inner.for.end: 876 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 877 // CHECK2: omp.loop.exit: 878 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 879 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 880 // CHECK2-NEXT: [[TMP15:%.*]] = bitcast i32* [[SIVAR2]] to i8* 881 // CHECK2-NEXT: store i8* [[TMP15]], i8** [[TMP14]], align 8 882 // CHECK2-NEXT: [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 883 // CHECK2-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 1, i64 8, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var) 884 // CHECK2-NEXT: switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 885 // CHECK2-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 886 // CHECK2-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 887 // CHECK2-NEXT: ] 888 // CHECK2: .omp.reduction.case1: 889 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP0]], align 4 890 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[SIVAR2]], align 4 891 // CHECK2-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 892 // CHECK2-NEXT: store i32 [[ADD6]], i32* [[TMP0]], align 4 893 // CHECK2-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var) 894 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 895 // CHECK2: .omp.reduction.case2: 896 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[SIVAR2]], align 4 897 // CHECK2-NEXT: [[TMP21:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP20]] monotonic, align 4 898 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 899 // CHECK2: .omp.reduction.default: 900 // CHECK2-NEXT: ret void 901 // 902 // 903 // CHECK2-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func 904 // CHECK2-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] { 905 // CHECK2-NEXT: entry: 906 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 907 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 908 // CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 909 // CHECK2-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 910 // CHECK2-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 911 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 912 // CHECK2-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 913 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 914 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 915 // CHECK2-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 916 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 917 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 918 // CHECK2-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 919 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 920 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 921 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 922 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 923 // CHECK2-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 924 // CHECK2-NEXT: ret void 925 // 926 // 927 // CHECK2-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2 928 // CHECK2-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] { 929 // CHECK2-NEXT: entry: 930 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 931 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 932 // CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 933 // CHECK2-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 934 // CHECK2-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 935 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 936 // CHECK2-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 937 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 938 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 939 // CHECK2-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 940 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 941 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 942 // CHECK2-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 943 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 944 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 945 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 946 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 947 // CHECK2-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 948 // CHECK2-NEXT: ret void 949 // 950 // 951 // CHECK2-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 952 // CHECK2-SAME: () #[[ATTR5:[0-9]+]] comdat { 953 // CHECK2-NEXT: entry: 954 // CHECK2-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 955 // CHECK2-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 956 // CHECK2-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8 957 // CHECK2-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 8 958 // CHECK2-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 8 959 // CHECK2-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 8 960 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 961 // CHECK2-NEXT: store i32 0, i32* [[T_VAR]], align 4 962 // CHECK2-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 963 // CHECK2-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 964 // CHECK2-NEXT: [[TMP1:%.*]] = load i32, i32* [[T_VAR]], align 4 965 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_CASTED]] to i32* 966 // CHECK2-NEXT: store i32 [[TMP1]], i32* [[CONV]], align 4 967 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[T_VAR_CASTED]], align 8 968 // CHECK2-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 969 // CHECK2-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i64* 970 // CHECK2-NEXT: store i64 [[TMP2]], i64* [[TMP4]], align 8 971 // CHECK2-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 972 // CHECK2-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i64* 973 // CHECK2-NEXT: store i64 [[TMP2]], i64* [[TMP6]], align 8 974 // CHECK2-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0 975 // CHECK2-NEXT: store i8* null, i8** [[TMP7]], align 8 976 // CHECK2-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 977 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 978 // CHECK2-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i64 2) 979 // CHECK2-NEXT: [[TMP10:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, i32 1, i8** [[TMP8]], i8** [[TMP9]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.7, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.8, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 980 // CHECK2-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0 981 // CHECK2-NEXT: br i1 [[TMP11]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 982 // CHECK2: omp_offload.failed: 983 // CHECK2-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i64 [[TMP2]]) #[[ATTR2]] 984 // CHECK2-NEXT: br label [[OMP_OFFLOAD_CONT]] 985 // CHECK2: omp_offload.cont: 986 // CHECK2-NEXT: ret i32 0 987 // 988 // 989 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32 990 // CHECK2-SAME: (i64 [[T_VAR:%.*]]) #[[ATTR1]] { 991 // CHECK2-NEXT: entry: 992 // CHECK2-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8 993 // CHECK2-NEXT: store i64 [[T_VAR]], i64* [[T_VAR_ADDR]], align 8 994 // CHECK2-NEXT: [[CONV:%.*]] = bitcast i64* [[T_VAR_ADDR]] to i32* 995 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32* [[CONV]]) 996 // CHECK2-NEXT: ret void 997 // 998 // 999 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..3 1000 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 1001 // CHECK2-NEXT: entry: 1002 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1003 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1004 // CHECK2-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 1005 // CHECK2-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 1006 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1007 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1008 // CHECK2-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1009 // CHECK2-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1010 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1011 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1012 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1013 // CHECK2-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 1014 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1015 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1016 // CHECK2-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 1017 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 1018 // CHECK2-NEXT: store i32 0, i32* [[T_VAR1]], align 4 1019 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1020 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 1021 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1022 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1023 // CHECK2-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1024 // CHECK2-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1025 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1026 // CHECK2-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1027 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 1028 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1029 // CHECK2: cond.true: 1030 // CHECK2-NEXT: br label [[COND_END:%.*]] 1031 // CHECK2: cond.false: 1032 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1033 // CHECK2-NEXT: br label [[COND_END]] 1034 // CHECK2: cond.end: 1035 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1036 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1037 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1038 // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1039 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1040 // CHECK2: omp.inner.for.cond: 1041 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1042 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1043 // CHECK2-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1044 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1045 // CHECK2: omp.inner.for.body: 1046 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1047 // CHECK2-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 1048 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1049 // CHECK2-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 1050 // CHECK2-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], i32* [[T_VAR1]]) 1051 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1052 // CHECK2: omp.inner.for.inc: 1053 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1054 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1055 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1056 // CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1057 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1058 // CHECK2: omp.inner.for.end: 1059 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1060 // CHECK2: omp.loop.exit: 1061 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1062 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 1063 // CHECK2-NEXT: [[TMP15:%.*]] = bitcast i32* [[T_VAR1]] to i8* 1064 // CHECK2-NEXT: store i8* [[TMP15]], i8** [[TMP14]], align 8 1065 // CHECK2-NEXT: [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 1066 // CHECK2-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func.6, [8 x i32]* @.gomp_critical_user_.reduction.var) 1067 // CHECK2-NEXT: switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 1068 // CHECK2-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 1069 // CHECK2-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 1070 // CHECK2-NEXT: ] 1071 // CHECK2: .omp.reduction.case1: 1072 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP0]], align 4 1073 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[T_VAR1]], align 4 1074 // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 1075 // CHECK2-NEXT: store i32 [[ADD3]], i32* [[TMP0]], align 4 1076 // CHECK2-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 1077 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1078 // CHECK2: .omp.reduction.case2: 1079 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[T_VAR1]], align 4 1080 // CHECK2-NEXT: [[TMP21:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP20]] monotonic, align 4 1081 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1082 // CHECK2: .omp.reduction.default: 1083 // CHECK2-NEXT: ret void 1084 // 1085 // 1086 // CHECK2-LABEL: define {{[^@]+}}@.omp_outlined..4 1087 // CHECK2-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 1088 // CHECK2-NEXT: entry: 1089 // CHECK2-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 1090 // CHECK2-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 1091 // CHECK2-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 1092 // CHECK2-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 1093 // CHECK2-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 8 1094 // CHECK2-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1095 // CHECK2-NEXT: [[TMP:%.*]] = alloca i32, align 4 1096 // CHECK2-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1097 // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1098 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1099 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1100 // CHECK2-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4 1101 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 1102 // CHECK2-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 1103 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 1104 // CHECK2-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 1105 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1106 // CHECK2-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1107 // CHECK2-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 8 1108 // CHECK2-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 8 1109 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1110 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1111 // CHECK2-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 1112 // CHECK2-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 1113 // CHECK2-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 1114 // CHECK2-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 1115 // CHECK2-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 1116 // CHECK2-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 1117 // CHECK2-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1118 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1119 // CHECK2-NEXT: store i32 0, i32* [[T_VAR2]], align 4 1120 // CHECK2-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 1121 // CHECK2-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1122 // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1123 // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1124 // CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1 1125 // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1126 // CHECK2: cond.true: 1127 // CHECK2-NEXT: br label [[COND_END:%.*]] 1128 // CHECK2: cond.false: 1129 // CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1130 // CHECK2-NEXT: br label [[COND_END]] 1131 // CHECK2: cond.end: 1132 // CHECK2-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 1133 // CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1134 // CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1135 // CHECK2-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 1136 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1137 // CHECK2: omp.inner.for.cond: 1138 // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1139 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1140 // CHECK2-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1141 // CHECK2-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1142 // CHECK2: omp.inner.for.body: 1143 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1144 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 1145 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1146 // CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1147 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 1148 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[T_VAR2]], align 4 1149 // CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], [[TMP11]] 1150 // CHECK2-NEXT: store i32 [[ADD4]], i32* [[T_VAR2]], align 4 1151 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1152 // CHECK2: omp.body.continue: 1153 // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1154 // CHECK2: omp.inner.for.inc: 1155 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1156 // CHECK2-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP13]], 1 1157 // CHECK2-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 1158 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] 1159 // CHECK2: omp.inner.for.end: 1160 // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1161 // CHECK2: omp.loop.exit: 1162 // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 1163 // CHECK2-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 1164 // CHECK2-NEXT: [[TMP15:%.*]] = bitcast i32* [[T_VAR2]] to i8* 1165 // CHECK2-NEXT: store i8* [[TMP15]], i8** [[TMP14]], align 8 1166 // CHECK2-NEXT: [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 1167 // CHECK2-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 1, i64 8, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func.5, [8 x i32]* @.gomp_critical_user_.reduction.var) 1168 // CHECK2-NEXT: switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 1169 // CHECK2-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 1170 // CHECK2-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 1171 // CHECK2-NEXT: ] 1172 // CHECK2: .omp.reduction.case1: 1173 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP0]], align 4 1174 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[T_VAR2]], align 4 1175 // CHECK2-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 1176 // CHECK2-NEXT: store i32 [[ADD6]], i32* [[TMP0]], align 4 1177 // CHECK2-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var) 1178 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1179 // CHECK2: .omp.reduction.case2: 1180 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[T_VAR2]], align 4 1181 // CHECK2-NEXT: [[TMP21:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP20]] monotonic, align 4 1182 // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1183 // CHECK2: .omp.reduction.default: 1184 // CHECK2-NEXT: ret void 1185 // 1186 // 1187 // CHECK2-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.5 1188 // CHECK2-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] { 1189 // CHECK2-NEXT: entry: 1190 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 1191 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 1192 // CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 1193 // CHECK2-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 1194 // CHECK2-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 1195 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 1196 // CHECK2-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 1197 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 1198 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 1199 // CHECK2-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 1200 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 1201 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 1202 // CHECK2-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 1203 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 1204 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 1205 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 1206 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1207 // CHECK2-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 1208 // CHECK2-NEXT: ret void 1209 // 1210 // 1211 // CHECK2-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.6 1212 // CHECK2-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] { 1213 // CHECK2-NEXT: entry: 1214 // CHECK2-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 1215 // CHECK2-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 1216 // CHECK2-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 1217 // CHECK2-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 1218 // CHECK2-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 1219 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 1220 // CHECK2-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 1221 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 1222 // CHECK2-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 1223 // CHECK2-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 1224 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 1225 // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 1226 // CHECK2-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 1227 // CHECK2-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 1228 // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 1229 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 1230 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1231 // CHECK2-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 1232 // CHECK2-NEXT: ret void 1233 // 1234 // 1235 // CHECK2-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1236 // CHECK2-SAME: () #[[ATTR7:[0-9]+]] { 1237 // CHECK2-NEXT: entry: 1238 // CHECK2-NEXT: call void @__tgt_register_requires(i64 1) 1239 // CHECK2-NEXT: ret void 1240 // 1241 // 1242 // CHECK3-LABEL: define {{[^@]+}}@main 1243 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] { 1244 // CHECK3-NEXT: entry: 1245 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1246 // CHECK3-NEXT: [[SIVAR_CASTED:%.*]] = alloca i32, align 4 1247 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 1248 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 1249 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 1250 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1251 // CHECK3-NEXT: store i32 0, i32* [[RETVAL]], align 4 1252 // CHECK3-NEXT: [[TMP0:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4 1253 // CHECK3-NEXT: store i32 [[TMP0]], i32* [[SIVAR_CASTED]], align 4 1254 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[SIVAR_CASTED]], align 4 1255 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1256 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32* 1257 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP3]], align 4 1258 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1259 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32* 1260 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[TMP5]], align 4 1261 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1262 // CHECK3-NEXT: store i8* null, i8** [[TMP6]], align 4 1263 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1264 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1265 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i64 2) 1266 // CHECK3-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, i32 1, i8** [[TMP7]], i8** [[TMP8]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1267 // CHECK3-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0 1268 // CHECK3-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1269 // CHECK3: omp_offload.failed: 1270 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68(i32 [[TMP1]]) #[[ATTR2:[0-9]+]] 1271 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 1272 // CHECK3: omp_offload.cont: 1273 // CHECK3-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 1274 // CHECK3-NEXT: ret i32 [[CALL]] 1275 // 1276 // 1277 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 1278 // CHECK3-SAME: (i32 [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] { 1279 // CHECK3-NEXT: entry: 1280 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32, align 4 1281 // CHECK3-NEXT: store i32 [[SIVAR]], i32* [[SIVAR_ADDR]], align 4 1282 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[SIVAR_ADDR]]) 1283 // CHECK3-NEXT: ret void 1284 // 1285 // 1286 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined. 1287 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 1288 // CHECK3-NEXT: entry: 1289 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1290 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1291 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 4 1292 // CHECK3-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 1293 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1294 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1295 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1296 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1297 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1298 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1299 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1300 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4 1301 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1302 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1303 // CHECK3-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 4 1304 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 4 1305 // CHECK3-NEXT: store i32 0, i32* [[SIVAR1]], align 4 1306 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1307 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 1308 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1309 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1310 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1311 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1312 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1313 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1314 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 1315 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1316 // CHECK3: cond.true: 1317 // CHECK3-NEXT: br label [[COND_END:%.*]] 1318 // CHECK3: cond.false: 1319 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1320 // CHECK3-NEXT: br label [[COND_END]] 1321 // CHECK3: cond.end: 1322 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1323 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1324 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1325 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1326 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1327 // CHECK3: omp.inner.for.cond: 1328 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1329 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1330 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1331 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1332 // CHECK3: omp.inner.for.body: 1333 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1334 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1335 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], i32* [[SIVAR1]]) 1336 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1337 // CHECK3: omp.inner.for.inc: 1338 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1339 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1340 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 1341 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1342 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1343 // CHECK3: omp.inner.for.end: 1344 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1345 // CHECK3: omp.loop.exit: 1346 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1347 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 1348 // CHECK3-NEXT: [[TMP13:%.*]] = bitcast i32* [[SIVAR1]] to i8* 1349 // CHECK3-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 4 1350 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 1351 // CHECK3-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP2]], i32 1, i32 4, i8* [[TMP14]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var) 1352 // CHECK3-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 1353 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 1354 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 1355 // CHECK3-NEXT: ] 1356 // CHECK3: .omp.reduction.case1: 1357 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP0]], align 4 1358 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[SIVAR1]], align 4 1359 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 1360 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[TMP0]], align 4 1361 // CHECK3-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 1362 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1363 // CHECK3: .omp.reduction.case2: 1364 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[SIVAR1]], align 4 1365 // CHECK3-NEXT: [[TMP19:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP18]] monotonic, align 4 1366 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1367 // CHECK3: .omp.reduction.default: 1368 // CHECK3-NEXT: ret void 1369 // 1370 // 1371 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..1 1372 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 1373 // CHECK3-NEXT: entry: 1374 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1375 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1376 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1377 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1378 // CHECK3-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 4 1379 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1380 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1381 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1382 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1383 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1384 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1385 // CHECK3-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 1386 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1387 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4 1388 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1389 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1390 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1391 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1392 // CHECK3-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 4 1393 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 4 1394 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1395 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1396 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1397 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1398 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 1399 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 1400 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1401 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1402 // CHECK3-NEXT: store i32 0, i32* [[SIVAR1]], align 4 1403 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1404 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1405 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1406 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1407 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1 1408 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1409 // CHECK3: cond.true: 1410 // CHECK3-NEXT: br label [[COND_END:%.*]] 1411 // CHECK3: cond.false: 1412 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1413 // CHECK3-NEXT: br label [[COND_END]] 1414 // CHECK3: cond.end: 1415 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 1416 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1417 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1418 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 1419 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1420 // CHECK3: omp.inner.for.cond: 1421 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1422 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1423 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1424 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1425 // CHECK3: omp.inner.for.body: 1426 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1427 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 1428 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1429 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1430 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 1431 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[SIVAR1]], align 4 1432 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], [[TMP11]] 1433 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[SIVAR1]], align 4 1434 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1435 // CHECK3: omp.body.continue: 1436 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1437 // CHECK3: omp.inner.for.inc: 1438 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1439 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], 1 1440 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 1441 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1442 // CHECK3: omp.inner.for.end: 1443 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1444 // CHECK3: omp.loop.exit: 1445 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 1446 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 1447 // CHECK3-NEXT: [[TMP15:%.*]] = bitcast i32* [[SIVAR1]] to i8* 1448 // CHECK3-NEXT: store i8* [[TMP15]], i8** [[TMP14]], align 4 1449 // CHECK3-NEXT: [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 1450 // CHECK3-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 1, i32 4, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var) 1451 // CHECK3-NEXT: switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 1452 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 1453 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 1454 // CHECK3-NEXT: ] 1455 // CHECK3: .omp.reduction.case1: 1456 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP0]], align 4 1457 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[SIVAR1]], align 4 1458 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 1459 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4 1460 // CHECK3-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var) 1461 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1462 // CHECK3: .omp.reduction.case2: 1463 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[SIVAR1]], align 4 1464 // CHECK3-NEXT: [[TMP21:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP20]] monotonic, align 4 1465 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1466 // CHECK3: .omp.reduction.default: 1467 // CHECK3-NEXT: ret void 1468 // 1469 // 1470 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func 1471 // CHECK3-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] { 1472 // CHECK3-NEXT: entry: 1473 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4 1474 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4 1475 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4 1476 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4 1477 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4 1478 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 1479 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4 1480 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 1481 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0 1482 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4 1483 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 1484 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0 1485 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4 1486 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 1487 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 1488 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 1489 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1490 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 1491 // CHECK3-NEXT: ret void 1492 // 1493 // 1494 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2 1495 // CHECK3-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] { 1496 // CHECK3-NEXT: entry: 1497 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4 1498 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4 1499 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4 1500 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4 1501 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4 1502 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 1503 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4 1504 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 1505 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0 1506 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4 1507 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 1508 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0 1509 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4 1510 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 1511 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 1512 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 1513 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1514 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 1515 // CHECK3-NEXT: ret void 1516 // 1517 // 1518 // CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 1519 // CHECK3-SAME: () #[[ATTR5:[0-9]+]] comdat { 1520 // CHECK3-NEXT: entry: 1521 // CHECK3-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 1522 // CHECK3-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 1523 // CHECK3-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 1524 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 1525 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 1526 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 1527 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1528 // CHECK3-NEXT: store i32 0, i32* [[T_VAR]], align 4 1529 // CHECK3-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 1530 // CHECK3-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 1531 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[T_VAR]], align 4 1532 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[T_VAR_CASTED]], align 4 1533 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 1534 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1535 // CHECK3-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32* 1536 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[TMP4]], align 4 1537 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1538 // CHECK3-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32* 1539 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[TMP6]], align 4 1540 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1541 // CHECK3-NEXT: store i8* null, i8** [[TMP7]], align 4 1542 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1543 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1544 // CHECK3-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i64 2) 1545 // CHECK3-NEXT: [[TMP10:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, i32 1, i8** [[TMP8]], i8** [[TMP9]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.7, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.8, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1546 // CHECK3-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0 1547 // CHECK3-NEXT: br i1 [[TMP11]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1548 // CHECK3: omp_offload.failed: 1549 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i32 [[TMP2]]) #[[ATTR2]] 1550 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]] 1551 // CHECK3: omp_offload.cont: 1552 // CHECK3-NEXT: ret i32 0 1553 // 1554 // 1555 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32 1556 // CHECK3-SAME: (i32 [[T_VAR:%.*]]) #[[ATTR1]] { 1557 // CHECK3-NEXT: entry: 1558 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 1559 // CHECK3-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 1560 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]]) 1561 // CHECK3-NEXT: ret void 1562 // 1563 // 1564 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..3 1565 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 1566 // CHECK3-NEXT: entry: 1567 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1568 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1569 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 1570 // CHECK3-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 1571 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1572 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1573 // CHECK3-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1574 // CHECK3-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1575 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1576 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1577 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1578 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4 1579 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1580 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1581 // CHECK3-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 1582 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 1583 // CHECK3-NEXT: store i32 0, i32* [[T_VAR1]], align 4 1584 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1585 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 1586 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1587 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1588 // CHECK3-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1589 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1590 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1591 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1592 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 1593 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1594 // CHECK3: cond.true: 1595 // CHECK3-NEXT: br label [[COND_END:%.*]] 1596 // CHECK3: cond.false: 1597 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1598 // CHECK3-NEXT: br label [[COND_END]] 1599 // CHECK3: cond.end: 1600 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1601 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1602 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1603 // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1604 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1605 // CHECK3: omp.inner.for.cond: 1606 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1607 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1608 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1609 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1610 // CHECK3: omp.inner.for.body: 1611 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1612 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1613 // CHECK3-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], i32* [[T_VAR1]]) 1614 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1615 // CHECK3: omp.inner.for.inc: 1616 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1617 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1618 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 1619 // CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1620 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1621 // CHECK3: omp.inner.for.end: 1622 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1623 // CHECK3: omp.loop.exit: 1624 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1625 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 1626 // CHECK3-NEXT: [[TMP13:%.*]] = bitcast i32* [[T_VAR1]] to i8* 1627 // CHECK3-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 4 1628 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 1629 // CHECK3-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 4, i8* [[TMP14]], void (i8*, i8*)* @.omp.reduction.reduction_func.6, [8 x i32]* @.gomp_critical_user_.reduction.var) 1630 // CHECK3-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 1631 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 1632 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 1633 // CHECK3-NEXT: ] 1634 // CHECK3: .omp.reduction.case1: 1635 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP0]], align 4 1636 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[T_VAR1]], align 4 1637 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 1638 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[TMP0]], align 4 1639 // CHECK3-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 1640 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1641 // CHECK3: .omp.reduction.case2: 1642 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[T_VAR1]], align 4 1643 // CHECK3-NEXT: [[TMP19:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP18]] monotonic, align 4 1644 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1645 // CHECK3: .omp.reduction.default: 1646 // CHECK3-NEXT: ret void 1647 // 1648 // 1649 // CHECK3-LABEL: define {{[^@]+}}@.omp_outlined..4 1650 // CHECK3-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 1651 // CHECK3-NEXT: entry: 1652 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1653 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1654 // CHECK3-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1655 // CHECK3-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1656 // CHECK3-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 1657 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1658 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4 1659 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1660 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1661 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1662 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1663 // CHECK3-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 1664 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4 1665 // CHECK3-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4 1666 // CHECK3-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1667 // CHECK3-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1668 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1669 // CHECK3-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1670 // CHECK3-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 1671 // CHECK3-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 1672 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1673 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1674 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1675 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1676 // CHECK3-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 1677 // CHECK3-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 1678 // CHECK3-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1679 // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1680 // CHECK3-NEXT: store i32 0, i32* [[T_VAR1]], align 4 1681 // CHECK3-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1682 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1683 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1684 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1685 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1 1686 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1687 // CHECK3: cond.true: 1688 // CHECK3-NEXT: br label [[COND_END:%.*]] 1689 // CHECK3: cond.false: 1690 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1691 // CHECK3-NEXT: br label [[COND_END]] 1692 // CHECK3: cond.end: 1693 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 1694 // CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1695 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1696 // CHECK3-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 1697 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1698 // CHECK3: omp.inner.for.cond: 1699 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1700 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1701 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1702 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1703 // CHECK3: omp.inner.for.body: 1704 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1705 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 1706 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1707 // CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1708 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 1709 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[T_VAR1]], align 4 1710 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], [[TMP11]] 1711 // CHECK3-NEXT: store i32 [[ADD3]], i32* [[T_VAR1]], align 4 1712 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1713 // CHECK3: omp.body.continue: 1714 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1715 // CHECK3: omp.inner.for.inc: 1716 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1717 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], 1 1718 // CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 1719 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]] 1720 // CHECK3: omp.inner.for.end: 1721 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1722 // CHECK3: omp.loop.exit: 1723 // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 1724 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 1725 // CHECK3-NEXT: [[TMP15:%.*]] = bitcast i32* [[T_VAR1]] to i8* 1726 // CHECK3-NEXT: store i8* [[TMP15]], i8** [[TMP14]], align 4 1727 // CHECK3-NEXT: [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 1728 // CHECK3-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 1, i32 4, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func.5, [8 x i32]* @.gomp_critical_user_.reduction.var) 1729 // CHECK3-NEXT: switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 1730 // CHECK3-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 1731 // CHECK3-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 1732 // CHECK3-NEXT: ] 1733 // CHECK3: .omp.reduction.case1: 1734 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP0]], align 4 1735 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[T_VAR1]], align 4 1736 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 1737 // CHECK3-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4 1738 // CHECK3-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var) 1739 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1740 // CHECK3: .omp.reduction.case2: 1741 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[T_VAR1]], align 4 1742 // CHECK3-NEXT: [[TMP21:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP20]] monotonic, align 4 1743 // CHECK3-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1744 // CHECK3: .omp.reduction.default: 1745 // CHECK3-NEXT: ret void 1746 // 1747 // 1748 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.5 1749 // CHECK3-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] { 1750 // CHECK3-NEXT: entry: 1751 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4 1752 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4 1753 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4 1754 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4 1755 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4 1756 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 1757 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4 1758 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 1759 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0 1760 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4 1761 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 1762 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0 1763 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4 1764 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 1765 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 1766 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 1767 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1768 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 1769 // CHECK3-NEXT: ret void 1770 // 1771 // 1772 // CHECK3-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.6 1773 // CHECK3-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] { 1774 // CHECK3-NEXT: entry: 1775 // CHECK3-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4 1776 // CHECK3-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4 1777 // CHECK3-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4 1778 // CHECK3-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4 1779 // CHECK3-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4 1780 // CHECK3-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 1781 // CHECK3-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4 1782 // CHECK3-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 1783 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0 1784 // CHECK3-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4 1785 // CHECK3-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 1786 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0 1787 // CHECK3-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4 1788 // CHECK3-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 1789 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 1790 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 1791 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 1792 // CHECK3-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 1793 // CHECK3-NEXT: ret void 1794 // 1795 // 1796 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 1797 // CHECK3-SAME: () #[[ATTR7:[0-9]+]] { 1798 // CHECK3-NEXT: entry: 1799 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1) 1800 // CHECK3-NEXT: ret void 1801 // 1802 // 1803 // CHECK4-LABEL: define {{[^@]+}}@main 1804 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] { 1805 // CHECK4-NEXT: entry: 1806 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 1807 // CHECK4-NEXT: [[SIVAR_CASTED:%.*]] = alloca i32, align 4 1808 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 1809 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 1810 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 1811 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1812 // CHECK4-NEXT: store i32 0, i32* [[RETVAL]], align 4 1813 // CHECK4-NEXT: [[TMP0:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4 1814 // CHECK4-NEXT: store i32 [[TMP0]], i32* [[SIVAR_CASTED]], align 4 1815 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[SIVAR_CASTED]], align 4 1816 // CHECK4-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1817 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8** [[TMP2]] to i32* 1818 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TMP3]], align 4 1819 // CHECK4-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1820 // CHECK4-NEXT: [[TMP5:%.*]] = bitcast i8** [[TMP4]] to i32* 1821 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[TMP5]], align 4 1822 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 1823 // CHECK4-NEXT: store i8* null, i8** [[TMP6]], align 4 1824 // CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 1825 // CHECK4-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 1826 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4:[0-9]+]], i64 -1, i64 2) 1827 // CHECK4-NEXT: [[TMP9:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, i32 1, i8** [[TMP7]], i8** [[TMP8]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 1828 // CHECK4-NEXT: [[TMP10:%.*]] = icmp ne i32 [[TMP9]], 0 1829 // CHECK4-NEXT: br i1 [[TMP10]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 1830 // CHECK4: omp_offload.failed: 1831 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68(i32 [[TMP1]]) #[[ATTR2:[0-9]+]] 1832 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]] 1833 // CHECK4: omp_offload.cont: 1834 // CHECK4-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 1835 // CHECK4-NEXT: ret i32 [[CALL]] 1836 // 1837 // 1838 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68 1839 // CHECK4-SAME: (i32 [[SIVAR:%.*]]) #[[ATTR1:[0-9]+]] { 1840 // CHECK4-NEXT: entry: 1841 // CHECK4-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32, align 4 1842 // CHECK4-NEXT: store i32 [[SIVAR]], i32* [[SIVAR_ADDR]], align 4 1843 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[SIVAR_ADDR]]) 1844 // CHECK4-NEXT: ret void 1845 // 1846 // 1847 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined. 1848 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 1849 // CHECK4-NEXT: entry: 1850 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1851 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1852 // CHECK4-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 4 1853 // CHECK4-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 1854 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1855 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1856 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 1857 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 1858 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1859 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1860 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1861 // CHECK4-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4 1862 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1863 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1864 // CHECK4-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 4 1865 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 4 1866 // CHECK4-NEXT: store i32 0, i32* [[SIVAR1]], align 4 1867 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 1868 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 1869 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1870 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1871 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1872 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 1873 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1874 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1875 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 1876 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1877 // CHECK4: cond.true: 1878 // CHECK4-NEXT: br label [[COND_END:%.*]] 1879 // CHECK4: cond.false: 1880 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1881 // CHECK4-NEXT: br label [[COND_END]] 1882 // CHECK4: cond.end: 1883 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 1884 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 1885 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1886 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 1887 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1888 // CHECK4: omp.inner.for.cond: 1889 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1890 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1891 // CHECK4-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 1892 // CHECK4-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1893 // CHECK4: omp.inner.for.body: 1894 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 1895 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 1896 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], i32* [[SIVAR1]]) 1897 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1898 // CHECK4: omp.inner.for.inc: 1899 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1900 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 1901 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 1902 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 1903 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 1904 // CHECK4: omp.inner.for.end: 1905 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 1906 // CHECK4: omp.loop.exit: 1907 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 1908 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 1909 // CHECK4-NEXT: [[TMP13:%.*]] = bitcast i32* [[SIVAR1]] to i8* 1910 // CHECK4-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 4 1911 // CHECK4-NEXT: [[TMP14:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 1912 // CHECK4-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP2]], i32 1, i32 4, i8* [[TMP14]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var) 1913 // CHECK4-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 1914 // CHECK4-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 1915 // CHECK4-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 1916 // CHECK4-NEXT: ] 1917 // CHECK4: .omp.reduction.case1: 1918 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP0]], align 4 1919 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[SIVAR1]], align 4 1920 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 1921 // CHECK4-NEXT: store i32 [[ADD3]], i32* [[TMP0]], align 4 1922 // CHECK4-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 1923 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1924 // CHECK4: .omp.reduction.case2: 1925 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[SIVAR1]], align 4 1926 // CHECK4-NEXT: [[TMP19:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP18]] monotonic, align 4 1927 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 1928 // CHECK4: .omp.reduction.default: 1929 // CHECK4-NEXT: ret void 1930 // 1931 // 1932 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..1 1933 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR1]] { 1934 // CHECK4-NEXT: entry: 1935 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 1936 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 1937 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 1938 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 1939 // CHECK4-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 4 1940 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 1941 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 1942 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 1943 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 1944 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 1945 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 1946 // CHECK4-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 1947 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 1948 // CHECK4-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4 1949 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 1950 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 1951 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1952 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1953 // CHECK4-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 4 1954 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 4 1955 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 1956 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 1957 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 1958 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 1959 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 1960 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 1961 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 1962 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 1963 // CHECK4-NEXT: store i32 0, i32* [[SIVAR1]], align 4 1964 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 1965 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 1966 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 1967 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1968 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1 1969 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 1970 // CHECK4: cond.true: 1971 // CHECK4-NEXT: br label [[COND_END:%.*]] 1972 // CHECK4: cond.false: 1973 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1974 // CHECK4-NEXT: br label [[COND_END]] 1975 // CHECK4: cond.end: 1976 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 1977 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 1978 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 1979 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 1980 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 1981 // CHECK4: omp.inner.for.cond: 1982 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1983 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 1984 // CHECK4-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 1985 // CHECK4-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 1986 // CHECK4: omp.inner.for.body: 1987 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 1988 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 1989 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 1990 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 1991 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 1992 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[SIVAR1]], align 4 1993 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], [[TMP11]] 1994 // CHECK4-NEXT: store i32 [[ADD3]], i32* [[SIVAR1]], align 4 1995 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 1996 // CHECK4: omp.body.continue: 1997 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 1998 // CHECK4: omp.inner.for.inc: 1999 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2000 // CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], 1 2001 // CHECK4-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 2002 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 2003 // CHECK4: omp.inner.for.end: 2004 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2005 // CHECK4: omp.loop.exit: 2006 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 2007 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 2008 // CHECK4-NEXT: [[TMP15:%.*]] = bitcast i32* [[SIVAR1]] to i8* 2009 // CHECK4-NEXT: store i8* [[TMP15]], i8** [[TMP14]], align 4 2010 // CHECK4-NEXT: [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 2011 // CHECK4-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 1, i32 4, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var) 2012 // CHECK4-NEXT: switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 2013 // CHECK4-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 2014 // CHECK4-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 2015 // CHECK4-NEXT: ] 2016 // CHECK4: .omp.reduction.case1: 2017 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP0]], align 4 2018 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[SIVAR1]], align 4 2019 // CHECK4-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 2020 // CHECK4-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4 2021 // CHECK4-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var) 2022 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2023 // CHECK4: .omp.reduction.case2: 2024 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[SIVAR1]], align 4 2025 // CHECK4-NEXT: [[TMP21:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP20]] monotonic, align 4 2026 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2027 // CHECK4: .omp.reduction.default: 2028 // CHECK4-NEXT: ret void 2029 // 2030 // 2031 // CHECK4-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func 2032 // CHECK4-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] { 2033 // CHECK4-NEXT: entry: 2034 // CHECK4-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4 2035 // CHECK4-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4 2036 // CHECK4-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4 2037 // CHECK4-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4 2038 // CHECK4-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4 2039 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 2040 // CHECK4-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4 2041 // CHECK4-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 2042 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0 2043 // CHECK4-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4 2044 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 2045 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0 2046 // CHECK4-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4 2047 // CHECK4-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 2048 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 2049 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 2050 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 2051 // CHECK4-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 2052 // CHECK4-NEXT: ret void 2053 // 2054 // 2055 // CHECK4-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2 2056 // CHECK4-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] { 2057 // CHECK4-NEXT: entry: 2058 // CHECK4-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4 2059 // CHECK4-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4 2060 // CHECK4-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4 2061 // CHECK4-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4 2062 // CHECK4-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4 2063 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 2064 // CHECK4-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4 2065 // CHECK4-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 2066 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0 2067 // CHECK4-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4 2068 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 2069 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0 2070 // CHECK4-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4 2071 // CHECK4-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 2072 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 2073 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 2074 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 2075 // CHECK4-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 2076 // CHECK4-NEXT: ret void 2077 // 2078 // 2079 // CHECK4-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 2080 // CHECK4-SAME: () #[[ATTR5:[0-9]+]] comdat { 2081 // CHECK4-NEXT: entry: 2082 // CHECK4-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2083 // CHECK4-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2084 // CHECK4-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4 2085 // CHECK4-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x i8*], align 4 2086 // CHECK4-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x i8*], align 4 2087 // CHECK4-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x i8*], align 4 2088 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 2089 // CHECK4-NEXT: store i32 0, i32* [[T_VAR]], align 4 2090 // CHECK4-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2091 // CHECK4-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 2092 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[T_VAR]], align 4 2093 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[T_VAR_CASTED]], align 4 2094 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[T_VAR_CASTED]], align 4 2095 // CHECK4-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2096 // CHECK4-NEXT: [[TMP4:%.*]] = bitcast i8** [[TMP3]] to i32* 2097 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[TMP4]], align 4 2098 // CHECK4-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2099 // CHECK4-NEXT: [[TMP6:%.*]] = bitcast i8** [[TMP5]] to i32* 2100 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[TMP6]], align 4 2101 // CHECK4-NEXT: [[TMP7:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0 2102 // CHECK4-NEXT: store i8* null, i8** [[TMP7]], align 4 2103 // CHECK4-NEXT: [[TMP8:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0 2104 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOFFLOAD_PTRS]], i32 0, i32 0 2105 // CHECK4-NEXT: call void @__kmpc_push_target_tripcount_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i64 2) 2106 // CHECK4-NEXT: [[TMP10:%.*]] = call i32 @__tgt_target_teams_mapper(%struct.ident_t* @[[GLOB4]], i64 -1, i8* @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32.region_id, i32 1, i8** [[TMP8]], i8** [[TMP9]], i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_sizes.7, i32 0, i32 0), i64* getelementptr inbounds ([1 x i64], [1 x i64]* @.offload_maptypes.8, i32 0, i32 0), i8** null, i8** null, i32 0, i32 0) 2107 // CHECK4-NEXT: [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0 2108 // CHECK4-NEXT: br i1 [[TMP11]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]] 2109 // CHECK4: omp_offload.failed: 2110 // CHECK4-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32(i32 [[TMP2]]) #[[ATTR2]] 2111 // CHECK4-NEXT: br label [[OMP_OFFLOAD_CONT]] 2112 // CHECK4: omp_offload.cont: 2113 // CHECK4-NEXT: ret i32 0 2114 // 2115 // 2116 // CHECK4-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l32 2117 // CHECK4-SAME: (i32 [[T_VAR:%.*]]) #[[ATTR1]] { 2118 // CHECK4-NEXT: entry: 2119 // CHECK4-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4 2120 // CHECK4-NEXT: store i32 [[T_VAR]], i32* [[T_VAR_ADDR]], align 4 2121 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined..3 to void (i32*, i32*, ...)*), i32* [[T_VAR_ADDR]]) 2122 // CHECK4-NEXT: ret void 2123 // 2124 // 2125 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..3 2126 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 2127 // CHECK4-NEXT: entry: 2128 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2129 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2130 // CHECK4-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 2131 // CHECK4-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 2132 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2133 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 2134 // CHECK4-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2135 // CHECK4-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2136 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2137 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2138 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 2139 // CHECK4-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4 2140 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2141 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2142 // CHECK4-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 2143 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 2144 // CHECK4-NEXT: store i32 0, i32* [[T_VAR1]], align 4 2145 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2146 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 2147 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2148 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2149 // CHECK4-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2150 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2151 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2152 // CHECK4-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2153 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 2154 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2155 // CHECK4: cond.true: 2156 // CHECK4-NEXT: br label [[COND_END:%.*]] 2157 // CHECK4: cond.false: 2158 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2159 // CHECK4-NEXT: br label [[COND_END]] 2160 // CHECK4: cond.end: 2161 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2162 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2163 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2164 // CHECK4-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2165 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2166 // CHECK4: omp.inner.for.cond: 2167 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2168 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2169 // CHECK4-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2170 // CHECK4-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2171 // CHECK4: omp.inner.for.body: 2172 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2173 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2174 // CHECK4-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32, i32, i32*)* @.omp_outlined..4 to void (i32*, i32*, ...)*), i32 [[TMP8]], i32 [[TMP9]], i32* [[T_VAR1]]) 2175 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2176 // CHECK4: omp.inner.for.inc: 2177 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2178 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2179 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]] 2180 // CHECK4-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2181 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 2182 // CHECK4: omp.inner.for.end: 2183 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2184 // CHECK4: omp.loop.exit: 2185 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2186 // CHECK4-NEXT: [[TMP12:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 2187 // CHECK4-NEXT: [[TMP13:%.*]] = bitcast i32* [[T_VAR1]] to i8* 2188 // CHECK4-NEXT: store i8* [[TMP13]], i8** [[TMP12]], align 4 2189 // CHECK4-NEXT: [[TMP14:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 2190 // CHECK4-NEXT: [[TMP15:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 4, i8* [[TMP14]], void (i8*, i8*)* @.omp.reduction.reduction_func.6, [8 x i32]* @.gomp_critical_user_.reduction.var) 2191 // CHECK4-NEXT: switch i32 [[TMP15]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 2192 // CHECK4-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 2193 // CHECK4-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 2194 // CHECK4-NEXT: ] 2195 // CHECK4: .omp.reduction.case1: 2196 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[TMP0]], align 4 2197 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[T_VAR1]], align 4 2198 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] 2199 // CHECK4-NEXT: store i32 [[ADD3]], i32* [[TMP0]], align 4 2200 // CHECK4-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 2201 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2202 // CHECK4: .omp.reduction.case2: 2203 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[T_VAR1]], align 4 2204 // CHECK4-NEXT: [[TMP19:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP18]] monotonic, align 4 2205 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2206 // CHECK4: .omp.reduction.default: 2207 // CHECK4-NEXT: ret void 2208 // 2209 // 2210 // CHECK4-LABEL: define {{[^@]+}}@.omp_outlined..4 2211 // CHECK4-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32 [[DOTPREVIOUS_LB_:%.*]], i32 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[T_VAR:%.*]]) #[[ATTR1]] { 2212 // CHECK4-NEXT: entry: 2213 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 4 2214 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 4 2215 // CHECK4-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4 2216 // CHECK4-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4 2217 // CHECK4-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32*, align 4 2218 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2219 // CHECK4-NEXT: [[TMP:%.*]] = alloca i32, align 4 2220 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2221 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2222 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2223 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2224 // CHECK4-NEXT: [[T_VAR1:%.*]] = alloca i32, align 4 2225 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4 2226 // CHECK4-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 4 2227 // CHECK4-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 4 2228 // CHECK4-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 4 2229 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_LB_]], i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2230 // CHECK4-NEXT: store i32 [[DOTPREVIOUS_UB_]], i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2231 // CHECK4-NEXT: store i32* [[T_VAR]], i32** [[T_VAR_ADDR]], align 4 2232 // CHECK4-NEXT: [[TMP0:%.*]] = load i32*, i32** [[T_VAR_ADDR]], align 4 2233 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2234 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2235 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, i32* [[DOTPREVIOUS_LB__ADDR]], align 4 2236 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 2237 // CHECK4-NEXT: store i32 [[TMP1]], i32* [[DOTOMP_LB]], align 4 2238 // CHECK4-NEXT: store i32 [[TMP2]], i32* [[DOTOMP_UB]], align 4 2239 // CHECK4-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2240 // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2241 // CHECK4-NEXT: store i32 0, i32* [[T_VAR1]], align 4 2242 // CHECK4-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 2243 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 2244 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2245 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2246 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1 2247 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2248 // CHECK4: cond.true: 2249 // CHECK4-NEXT: br label [[COND_END:%.*]] 2250 // CHECK4: cond.false: 2251 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2252 // CHECK4-NEXT: br label [[COND_END]] 2253 // CHECK4: cond.end: 2254 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 2255 // CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2256 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2257 // CHECK4-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 2258 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2259 // CHECK4: omp.inner.for.cond: 2260 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2261 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2262 // CHECK4-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 2263 // CHECK4-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2264 // CHECK4: omp.inner.for.body: 2265 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2266 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 2267 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2268 // CHECK4-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2269 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 2270 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[T_VAR1]], align 4 2271 // CHECK4-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], [[TMP11]] 2272 // CHECK4-NEXT: store i32 [[ADD3]], i32* [[T_VAR1]], align 4 2273 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2274 // CHECK4: omp.body.continue: 2275 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2276 // CHECK4: omp.inner.for.inc: 2277 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2278 // CHECK4-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], 1 2279 // CHECK4-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 2280 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] 2281 // CHECK4: omp.inner.for.end: 2282 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2283 // CHECK4: omp.loop.exit: 2284 // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 2285 // CHECK4-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i32 0, i32 0 2286 // CHECK4-NEXT: [[TMP15:%.*]] = bitcast i32* [[T_VAR1]] to i8* 2287 // CHECK4-NEXT: store i8* [[TMP15]], i8** [[TMP14]], align 4 2288 // CHECK4-NEXT: [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 2289 // CHECK4-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 1, i32 4, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func.5, [8 x i32]* @.gomp_critical_user_.reduction.var) 2290 // CHECK4-NEXT: switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 2291 // CHECK4-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 2292 // CHECK4-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 2293 // CHECK4-NEXT: ] 2294 // CHECK4: .omp.reduction.case1: 2295 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP0]], align 4 2296 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[T_VAR1]], align 4 2297 // CHECK4-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 2298 // CHECK4-NEXT: store i32 [[ADD5]], i32* [[TMP0]], align 4 2299 // CHECK4-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var) 2300 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2301 // CHECK4: .omp.reduction.case2: 2302 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[T_VAR1]], align 4 2303 // CHECK4-NEXT: [[TMP21:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP20]] monotonic, align 4 2304 // CHECK4-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2305 // CHECK4: .omp.reduction.default: 2306 // CHECK4-NEXT: ret void 2307 // 2308 // 2309 // CHECK4-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.5 2310 // CHECK4-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] { 2311 // CHECK4-NEXT: entry: 2312 // CHECK4-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4 2313 // CHECK4-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4 2314 // CHECK4-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4 2315 // CHECK4-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4 2316 // CHECK4-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4 2317 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 2318 // CHECK4-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4 2319 // CHECK4-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 2320 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0 2321 // CHECK4-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4 2322 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 2323 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0 2324 // CHECK4-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4 2325 // CHECK4-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 2326 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 2327 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 2328 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 2329 // CHECK4-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 2330 // CHECK4-NEXT: ret void 2331 // 2332 // 2333 // CHECK4-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.6 2334 // CHECK4-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR3]] { 2335 // CHECK4-NEXT: entry: 2336 // CHECK4-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 4 2337 // CHECK4-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 4 2338 // CHECK4-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 4 2339 // CHECK4-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 4 2340 // CHECK4-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 4 2341 // CHECK4-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 2342 // CHECK4-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 4 2343 // CHECK4-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 2344 // CHECK4-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i32 0, i32 0 2345 // CHECK4-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 4 2346 // CHECK4-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 2347 // CHECK4-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i32 0, i32 0 2348 // CHECK4-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 4 2349 // CHECK4-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 2350 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 2351 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 2352 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 2353 // CHECK4-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 2354 // CHECK4-NEXT: ret void 2355 // 2356 // 2357 // CHECK4-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2358 // CHECK4-SAME: () #[[ATTR7:[0-9]+]] { 2359 // CHECK4-NEXT: entry: 2360 // CHECK4-NEXT: call void @__tgt_register_requires(i64 1) 2361 // CHECK4-NEXT: ret void 2362 // 2363 // 2364 // CHECK5-LABEL: define {{[^@]+}}@main 2365 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] { 2366 // CHECK5-NEXT: entry: 2367 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2368 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 2369 // CHECK5-NEXT: store i32 0, i32* [[RETVAL]], align 4 2370 // CHECK5-NEXT: store i32 0, i32* [[I]], align 4 2371 // CHECK5-NEXT: br label [[FOR_COND:%.*]] 2372 // CHECK5: for.cond: 2373 // CHECK5-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 2374 // CHECK5-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 2 2375 // CHECK5-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 2376 // CHECK5: for.body: 2377 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 2378 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4 2379 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], [[TMP1]] 2380 // CHECK5-NEXT: store i32 [[ADD]], i32* @_ZZ4mainE5sivar, align 4 2381 // CHECK5-NEXT: br label [[FOR_INC:%.*]] 2382 // CHECK5: for.inc: 2383 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 2384 // CHECK5-NEXT: [[INC:%.*]] = add nsw i32 [[TMP3]], 1 2385 // CHECK5-NEXT: store i32 [[INC]], i32* [[I]], align 4 2386 // CHECK5-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 2387 // CHECK5: for.end: 2388 // CHECK5-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v() 2389 // CHECK5-NEXT: ret i32 [[CALL]] 2390 // 2391 // 2392 // CHECK5-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 2393 // CHECK5-SAME: () #[[ATTR1:[0-9]+]] comdat { 2394 // CHECK5-NEXT: entry: 2395 // CHECK5-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2396 // CHECK5-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2397 // CHECK5-NEXT: [[I:%.*]] = alloca i32, align 4 2398 // CHECK5-NEXT: store i32 0, i32* [[T_VAR]], align 4 2399 // CHECK5-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2400 // CHECK5-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 2401 // CHECK5-NEXT: store i32 0, i32* [[I]], align 4 2402 // CHECK5-NEXT: br label [[FOR_COND:%.*]] 2403 // CHECK5: for.cond: 2404 // CHECK5-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 2405 // CHECK5-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], 2 2406 // CHECK5-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 2407 // CHECK5: for.body: 2408 // CHECK5-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 2409 // CHECK5-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR]], align 4 2410 // CHECK5-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP3]], [[TMP2]] 2411 // CHECK5-NEXT: store i32 [[ADD]], i32* [[T_VAR]], align 4 2412 // CHECK5-NEXT: br label [[FOR_INC:%.*]] 2413 // CHECK5: for.inc: 2414 // CHECK5-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4 2415 // CHECK5-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 2416 // CHECK5-NEXT: store i32 [[INC]], i32* [[I]], align 4 2417 // CHECK5-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 2418 // CHECK5: for.end: 2419 // CHECK5-NEXT: ret i32 0 2420 // 2421 // 2422 // CHECK6-LABEL: define {{[^@]+}}@main 2423 // CHECK6-SAME: () #[[ATTR0:[0-9]+]] { 2424 // CHECK6-NEXT: entry: 2425 // CHECK6-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2426 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 2427 // CHECK6-NEXT: store i32 0, i32* [[RETVAL]], align 4 2428 // CHECK6-NEXT: store i32 0, i32* [[I]], align 4 2429 // CHECK6-NEXT: br label [[FOR_COND:%.*]] 2430 // CHECK6: for.cond: 2431 // CHECK6-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 2432 // CHECK6-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 2 2433 // CHECK6-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 2434 // CHECK6: for.body: 2435 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 2436 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4 2437 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], [[TMP1]] 2438 // CHECK6-NEXT: store i32 [[ADD]], i32* @_ZZ4mainE5sivar, align 4 2439 // CHECK6-NEXT: br label [[FOR_INC:%.*]] 2440 // CHECK6: for.inc: 2441 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 2442 // CHECK6-NEXT: [[INC:%.*]] = add nsw i32 [[TMP3]], 1 2443 // CHECK6-NEXT: store i32 [[INC]], i32* [[I]], align 4 2444 // CHECK6-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]] 2445 // CHECK6: for.end: 2446 // CHECK6-NEXT: [[CALL:%.*]] = call signext i32 @_Z5tmainIiET_v() 2447 // CHECK6-NEXT: ret i32 [[CALL]] 2448 // 2449 // 2450 // CHECK6-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 2451 // CHECK6-SAME: () #[[ATTR1:[0-9]+]] comdat { 2452 // CHECK6-NEXT: entry: 2453 // CHECK6-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2454 // CHECK6-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2455 // CHECK6-NEXT: [[I:%.*]] = alloca i32, align 4 2456 // CHECK6-NEXT: store i32 0, i32* [[T_VAR]], align 4 2457 // CHECK6-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2458 // CHECK6-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i64 8, i1 false) 2459 // CHECK6-NEXT: store i32 0, i32* [[I]], align 4 2460 // CHECK6-NEXT: br label [[FOR_COND:%.*]] 2461 // CHECK6: for.cond: 2462 // CHECK6-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 2463 // CHECK6-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], 2 2464 // CHECK6-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 2465 // CHECK6: for.body: 2466 // CHECK6-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 2467 // CHECK6-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR]], align 4 2468 // CHECK6-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP3]], [[TMP2]] 2469 // CHECK6-NEXT: store i32 [[ADD]], i32* [[T_VAR]], align 4 2470 // CHECK6-NEXT: br label [[FOR_INC:%.*]] 2471 // CHECK6: for.inc: 2472 // CHECK6-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4 2473 // CHECK6-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 2474 // CHECK6-NEXT: store i32 [[INC]], i32* [[I]], align 4 2475 // CHECK6-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]] 2476 // CHECK6: for.end: 2477 // CHECK6-NEXT: ret i32 0 2478 // 2479 // 2480 // CHECK7-LABEL: define {{[^@]+}}@main 2481 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] { 2482 // CHECK7-NEXT: entry: 2483 // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2484 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 2485 // CHECK7-NEXT: store i32 0, i32* [[RETVAL]], align 4 2486 // CHECK7-NEXT: store i32 0, i32* [[I]], align 4 2487 // CHECK7-NEXT: br label [[FOR_COND:%.*]] 2488 // CHECK7: for.cond: 2489 // CHECK7-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 2490 // CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 2 2491 // CHECK7-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 2492 // CHECK7: for.body: 2493 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 2494 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4 2495 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], [[TMP1]] 2496 // CHECK7-NEXT: store i32 [[ADD]], i32* @_ZZ4mainE5sivar, align 4 2497 // CHECK7-NEXT: br label [[FOR_INC:%.*]] 2498 // CHECK7: for.inc: 2499 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 2500 // CHECK7-NEXT: [[INC:%.*]] = add nsw i32 [[TMP3]], 1 2501 // CHECK7-NEXT: store i32 [[INC]], i32* [[I]], align 4 2502 // CHECK7-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 2503 // CHECK7: for.end: 2504 // CHECK7-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 2505 // CHECK7-NEXT: ret i32 [[CALL]] 2506 // 2507 // 2508 // CHECK7-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 2509 // CHECK7-SAME: () #[[ATTR1:[0-9]+]] comdat { 2510 // CHECK7-NEXT: entry: 2511 // CHECK7-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2512 // CHECK7-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2513 // CHECK7-NEXT: [[I:%.*]] = alloca i32, align 4 2514 // CHECK7-NEXT: store i32 0, i32* [[T_VAR]], align 4 2515 // CHECK7-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2516 // CHECK7-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 2517 // CHECK7-NEXT: store i32 0, i32* [[I]], align 4 2518 // CHECK7-NEXT: br label [[FOR_COND:%.*]] 2519 // CHECK7: for.cond: 2520 // CHECK7-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 2521 // CHECK7-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], 2 2522 // CHECK7-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 2523 // CHECK7: for.body: 2524 // CHECK7-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 2525 // CHECK7-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR]], align 4 2526 // CHECK7-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP3]], [[TMP2]] 2527 // CHECK7-NEXT: store i32 [[ADD]], i32* [[T_VAR]], align 4 2528 // CHECK7-NEXT: br label [[FOR_INC:%.*]] 2529 // CHECK7: for.inc: 2530 // CHECK7-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4 2531 // CHECK7-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 2532 // CHECK7-NEXT: store i32 [[INC]], i32* [[I]], align 4 2533 // CHECK7-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 2534 // CHECK7: for.end: 2535 // CHECK7-NEXT: ret i32 0 2536 // 2537 // 2538 // CHECK8-LABEL: define {{[^@]+}}@main 2539 // CHECK8-SAME: () #[[ATTR0:[0-9]+]] { 2540 // CHECK8-NEXT: entry: 2541 // CHECK8-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2542 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 2543 // CHECK8-NEXT: store i32 0, i32* [[RETVAL]], align 4 2544 // CHECK8-NEXT: store i32 0, i32* [[I]], align 4 2545 // CHECK8-NEXT: br label [[FOR_COND:%.*]] 2546 // CHECK8: for.cond: 2547 // CHECK8-NEXT: [[TMP0:%.*]] = load i32, i32* [[I]], align 4 2548 // CHECK8-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 2 2549 // CHECK8-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 2550 // CHECK8: for.body: 2551 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 2552 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* @_ZZ4mainE5sivar, align 4 2553 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], [[TMP1]] 2554 // CHECK8-NEXT: store i32 [[ADD]], i32* @_ZZ4mainE5sivar, align 4 2555 // CHECK8-NEXT: br label [[FOR_INC:%.*]] 2556 // CHECK8: for.inc: 2557 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[I]], align 4 2558 // CHECK8-NEXT: [[INC:%.*]] = add nsw i32 [[TMP3]], 1 2559 // CHECK8-NEXT: store i32 [[INC]], i32* [[I]], align 4 2560 // CHECK8-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]] 2561 // CHECK8: for.end: 2562 // CHECK8-NEXT: [[CALL:%.*]] = call i32 @_Z5tmainIiET_v() 2563 // CHECK8-NEXT: ret i32 [[CALL]] 2564 // 2565 // 2566 // CHECK8-LABEL: define {{[^@]+}}@_Z5tmainIiET_v 2567 // CHECK8-SAME: () #[[ATTR1:[0-9]+]] comdat { 2568 // CHECK8-NEXT: entry: 2569 // CHECK8-NEXT: [[T_VAR:%.*]] = alloca i32, align 4 2570 // CHECK8-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4 2571 // CHECK8-NEXT: [[I:%.*]] = alloca i32, align 4 2572 // CHECK8-NEXT: store i32 0, i32* [[T_VAR]], align 4 2573 // CHECK8-NEXT: [[TMP0:%.*]] = bitcast [2 x i32]* [[VEC]] to i8* 2574 // CHECK8-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 [[TMP0]], i8* align 4 bitcast ([2 x i32]* @__const._Z5tmainIiET_v.vec to i8*), i32 8, i1 false) 2575 // CHECK8-NEXT: store i32 0, i32* [[I]], align 4 2576 // CHECK8-NEXT: br label [[FOR_COND:%.*]] 2577 // CHECK8: for.cond: 2578 // CHECK8-NEXT: [[TMP1:%.*]] = load i32, i32* [[I]], align 4 2579 // CHECK8-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP1]], 2 2580 // CHECK8-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]] 2581 // CHECK8: for.body: 2582 // CHECK8-NEXT: [[TMP2:%.*]] = load i32, i32* [[I]], align 4 2583 // CHECK8-NEXT: [[TMP3:%.*]] = load i32, i32* [[T_VAR]], align 4 2584 // CHECK8-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP3]], [[TMP2]] 2585 // CHECK8-NEXT: store i32 [[ADD]], i32* [[T_VAR]], align 4 2586 // CHECK8-NEXT: br label [[FOR_INC:%.*]] 2587 // CHECK8: for.inc: 2588 // CHECK8-NEXT: [[TMP4:%.*]] = load i32, i32* [[I]], align 4 2589 // CHECK8-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1 2590 // CHECK8-NEXT: store i32 [[INC]], i32* [[I]], align 4 2591 // CHECK8-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]] 2592 // CHECK8: for.end: 2593 // CHECK8-NEXT: ret i32 0 2594 // 2595 // 2596 // CHECK9-LABEL: define {{[^@]+}}@main 2597 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] { 2598 // CHECK9-NEXT: entry: 2599 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2600 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 2601 // CHECK9-NEXT: store i32 0, i32* [[RETVAL]], align 4 2602 // CHECK9-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]]) 2603 // CHECK9-NEXT: ret i32 0 2604 // 2605 // 2606 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l45 2607 // CHECK9-SAME: (i64 [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] { 2608 // CHECK9-NEXT: entry: 2609 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 8 2610 // CHECK9-NEXT: store i64 [[SIVAR]], i64* [[SIVAR_ADDR]], align 8 2611 // CHECK9-NEXT: [[CONV:%.*]] = bitcast i64* [[SIVAR_ADDR]] to i32* 2612 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]]) 2613 // CHECK9-NEXT: ret void 2614 // 2615 // 2616 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined. 2617 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] { 2618 // CHECK9-NEXT: entry: 2619 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2620 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2621 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8 2622 // CHECK9-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 2623 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2624 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2625 // CHECK9-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2626 // CHECK9-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2627 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2628 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2629 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2630 // CHECK9-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 2631 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2632 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2633 // CHECK9-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8 2634 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8 2635 // CHECK9-NEXT: store i32 0, i32* [[SIVAR1]], align 4 2636 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2637 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 2638 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2639 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2640 // CHECK9-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2641 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2642 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2643 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2644 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 2645 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2646 // CHECK9: cond.true: 2647 // CHECK9-NEXT: br label [[COND_END:%.*]] 2648 // CHECK9: cond.false: 2649 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2650 // CHECK9-NEXT: br label [[COND_END]] 2651 // CHECK9: cond.end: 2652 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2653 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2654 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2655 // CHECK9-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2656 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2657 // CHECK9: omp.inner.for.cond: 2658 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2659 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2660 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2661 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2662 // CHECK9: omp.inner.for.body: 2663 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2664 // CHECK9-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 2665 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2666 // CHECK9-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 2667 // CHECK9-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], i32* [[SIVAR1]]) 2668 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2669 // CHECK9: omp.inner.for.inc: 2670 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2671 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2672 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 2673 // CHECK9-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2674 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 2675 // CHECK9: omp.inner.for.end: 2676 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2677 // CHECK9: omp.loop.exit: 2678 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2679 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 2680 // CHECK9-NEXT: [[TMP15:%.*]] = bitcast i32* [[SIVAR1]] to i8* 2681 // CHECK9-NEXT: store i8* [[TMP15]], i8** [[TMP14]], align 8 2682 // CHECK9-NEXT: [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 2683 // CHECK9-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var) 2684 // CHECK9-NEXT: switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 2685 // CHECK9-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 2686 // CHECK9-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 2687 // CHECK9-NEXT: ] 2688 // CHECK9: .omp.reduction.case1: 2689 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP0]], align 4 2690 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[SIVAR1]], align 4 2691 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 2692 // CHECK9-NEXT: store i32 [[ADD3]], i32* [[TMP0]], align 4 2693 // CHECK9-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 2694 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2695 // CHECK9: .omp.reduction.case2: 2696 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[SIVAR1]], align 4 2697 // CHECK9-NEXT: [[TMP21:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP20]] monotonic, align 4 2698 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2699 // CHECK9: .omp.reduction.default: 2700 // CHECK9-NEXT: ret void 2701 // 2702 // 2703 // CHECK9-LABEL: define {{[^@]+}}@.omp_outlined..1 2704 // CHECK9-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] { 2705 // CHECK9-NEXT: entry: 2706 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2707 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2708 // CHECK9-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2709 // CHECK9-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2710 // CHECK9-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8 2711 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2712 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4 2713 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2714 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2715 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2716 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2717 // CHECK9-NEXT: [[SIVAR2:%.*]] = alloca i32, align 4 2718 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4 2719 // CHECK9-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 2720 // CHECK9-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 2721 // CHECK9-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2722 // CHECK9-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2723 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2724 // CHECK9-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2725 // CHECK9-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8 2726 // CHECK9-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8 2727 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2728 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2729 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2730 // CHECK9-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 2731 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2732 // CHECK9-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 2733 // CHECK9-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 2734 // CHECK9-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 2735 // CHECK9-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2736 // CHECK9-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2737 // CHECK9-NEXT: store i32 0, i32* [[SIVAR2]], align 4 2738 // CHECK9-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2739 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 2740 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2741 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2742 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1 2743 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2744 // CHECK9: cond.true: 2745 // CHECK9-NEXT: br label [[COND_END:%.*]] 2746 // CHECK9: cond.false: 2747 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2748 // CHECK9-NEXT: br label [[COND_END]] 2749 // CHECK9: cond.end: 2750 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 2751 // CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 2752 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 2753 // CHECK9-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 2754 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2755 // CHECK9: omp.inner.for.cond: 2756 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2757 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 2758 // CHECK9-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 2759 // CHECK9-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2760 // CHECK9: omp.inner.for.body: 2761 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2762 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 2763 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 2764 // CHECK9-NEXT: store i32 [[ADD]], i32* [[I]], align 4 2765 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 2766 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[SIVAR2]], align 4 2767 // CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], [[TMP11]] 2768 // CHECK9-NEXT: store i32 [[ADD4]], i32* [[SIVAR2]], align 4 2769 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 2770 // CHECK9-NEXT: store i32* [[SIVAR2]], i32** [[TMP13]], align 8 2771 // CHECK9-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(8) [[REF_TMP]]) 2772 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 2773 // CHECK9: omp.body.continue: 2774 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2775 // CHECK9: omp.inner.for.inc: 2776 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2777 // CHECK9-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], 1 2778 // CHECK9-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 2779 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] 2780 // CHECK9: omp.inner.for.end: 2781 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2782 // CHECK9: omp.loop.exit: 2783 // CHECK9-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 2784 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 2785 // CHECK9-NEXT: [[TMP16:%.*]] = bitcast i32* [[SIVAR2]] to i8* 2786 // CHECK9-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8 2787 // CHECK9-NEXT: [[TMP17:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 2788 // CHECK9-NEXT: [[TMP18:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 1, i64 8, i8* [[TMP17]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var) 2789 // CHECK9-NEXT: switch i32 [[TMP18]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 2790 // CHECK9-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 2791 // CHECK9-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 2792 // CHECK9-NEXT: ] 2793 // CHECK9: .omp.reduction.case1: 2794 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP0]], align 4 2795 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[SIVAR2]], align 4 2796 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 2797 // CHECK9-NEXT: store i32 [[ADD6]], i32* [[TMP0]], align 4 2798 // CHECK9-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var) 2799 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2800 // CHECK9: .omp.reduction.case2: 2801 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[SIVAR2]], align 4 2802 // CHECK9-NEXT: [[TMP22:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP21]] monotonic, align 4 2803 // CHECK9-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2804 // CHECK9: .omp.reduction.default: 2805 // CHECK9-NEXT: ret void 2806 // 2807 // 2808 // CHECK9-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func 2809 // CHECK9-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] { 2810 // CHECK9-NEXT: entry: 2811 // CHECK9-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 2812 // CHECK9-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 2813 // CHECK9-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 2814 // CHECK9-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 2815 // CHECK9-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 2816 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 2817 // CHECK9-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 2818 // CHECK9-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 2819 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 2820 // CHECK9-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 2821 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 2822 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 2823 // CHECK9-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 2824 // CHECK9-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 2825 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 2826 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 2827 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 2828 // CHECK9-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 2829 // CHECK9-NEXT: ret void 2830 // 2831 // 2832 // CHECK9-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2 2833 // CHECK9-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR4]] { 2834 // CHECK9-NEXT: entry: 2835 // CHECK9-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 2836 // CHECK9-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 2837 // CHECK9-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 2838 // CHECK9-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 2839 // CHECK9-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 2840 // CHECK9-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 2841 // CHECK9-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 2842 // CHECK9-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 2843 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 2844 // CHECK9-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 2845 // CHECK9-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 2846 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 2847 // CHECK9-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 2848 // CHECK9-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 2849 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 2850 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 2851 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 2852 // CHECK9-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 2853 // CHECK9-NEXT: ret void 2854 // 2855 // 2856 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 2857 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] { 2858 // CHECK9-NEXT: entry: 2859 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1) 2860 // CHECK9-NEXT: ret void 2861 // 2862 // 2863 // CHECK10-LABEL: define {{[^@]+}}@main 2864 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] { 2865 // CHECK10-NEXT: entry: 2866 // CHECK10-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 2867 // CHECK10-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 2868 // CHECK10-NEXT: store i32 0, i32* [[RETVAL]], align 4 2869 // CHECK10-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]]) 2870 // CHECK10-NEXT: ret i32 0 2871 // 2872 // 2873 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l45 2874 // CHECK10-SAME: (i64 [[SIVAR:%.*]]) #[[ATTR2:[0-9]+]] { 2875 // CHECK10-NEXT: entry: 2876 // CHECK10-NEXT: [[SIVAR_ADDR:%.*]] = alloca i64, align 8 2877 // CHECK10-NEXT: store i64 [[SIVAR]], i64* [[SIVAR_ADDR]], align 8 2878 // CHECK10-NEXT: [[CONV:%.*]] = bitcast i64* [[SIVAR_ADDR]] to i32* 2879 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_teams(%struct.ident_t* @[[GLOB4:[0-9]+]], i32 1, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i32*)* @.omp_outlined. to void (i32*, i32*, ...)*), i32* [[CONV]]) 2880 // CHECK10-NEXT: ret void 2881 // 2882 // 2883 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined. 2884 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] { 2885 // CHECK10-NEXT: entry: 2886 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2887 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2888 // CHECK10-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8 2889 // CHECK10-NEXT: [[SIVAR1:%.*]] = alloca i32, align 4 2890 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2891 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 2892 // CHECK10-NEXT: [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4 2893 // CHECK10-NEXT: [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4 2894 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2895 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2896 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 2897 // CHECK10-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 2898 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2899 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2900 // CHECK10-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8 2901 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8 2902 // CHECK10-NEXT: store i32 0, i32* [[SIVAR1]], align 4 2903 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_COMB_LB]], align 4 2904 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_COMB_UB]], align 4 2905 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 2906 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 2907 // CHECK10-NEXT: [[TMP1:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 2908 // CHECK10-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4 2909 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_COMB_LB]], i32* [[DOTOMP_COMB_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 2910 // CHECK10-NEXT: [[TMP3:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2911 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1 2912 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 2913 // CHECK10: cond.true: 2914 // CHECK10-NEXT: br label [[COND_END:%.*]] 2915 // CHECK10: cond.false: 2916 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2917 // CHECK10-NEXT: br label [[COND_END]] 2918 // CHECK10: cond.end: 2919 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ] 2920 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_COMB_UB]], align 4 2921 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2922 // CHECK10-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 2923 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 2924 // CHECK10: omp.inner.for.cond: 2925 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2926 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2927 // CHECK10-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]] 2928 // CHECK10-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 2929 // CHECK10: omp.inner.for.body: 2930 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 2931 // CHECK10-NEXT: [[TMP9:%.*]] = zext i32 [[TMP8]] to i64 2932 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 2933 // CHECK10-NEXT: [[TMP11:%.*]] = zext i32 [[TMP10]] to i64 2934 // CHECK10-NEXT: call void (%struct.ident_t*, i32, void (i32*, i32*, ...)*, ...) @__kmpc_fork_call(%struct.ident_t* @[[GLOB4]], i32 3, void (i32*, i32*, ...)* bitcast (void (i32*, i32*, i64, i64, i32*)* @.omp_outlined..1 to void (i32*, i32*, ...)*), i64 [[TMP9]], i64 [[TMP11]], i32* [[SIVAR1]]) 2935 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 2936 // CHECK10: omp.inner.for.inc: 2937 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 2938 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 2939 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 2940 // CHECK10-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 2941 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 2942 // CHECK10: omp.inner.for.end: 2943 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 2944 // CHECK10: omp.loop.exit: 2945 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP2]]) 2946 // CHECK10-NEXT: [[TMP14:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 2947 // CHECK10-NEXT: [[TMP15:%.*]] = bitcast i32* [[SIVAR1]] to i8* 2948 // CHECK10-NEXT: store i8* [[TMP15]], i8** [[TMP14]], align 8 2949 // CHECK10-NEXT: [[TMP16:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 2950 // CHECK10-NEXT: [[TMP17:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3:[0-9]+]], i32 [[TMP2]], i32 1, i64 8, i8* [[TMP16]], void (i8*, i8*)* @.omp.reduction.reduction_func.2, [8 x i32]* @.gomp_critical_user_.reduction.var) 2951 // CHECK10-NEXT: switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 2952 // CHECK10-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 2953 // CHECK10-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 2954 // CHECK10-NEXT: ] 2955 // CHECK10: .omp.reduction.case1: 2956 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[TMP0]], align 4 2957 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[SIVAR1]], align 4 2958 // CHECK10-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] 2959 // CHECK10-NEXT: store i32 [[ADD3]], i32* [[TMP0]], align 4 2960 // CHECK10-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], [8 x i32]* @.gomp_critical_user_.reduction.var) 2961 // CHECK10-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2962 // CHECK10: .omp.reduction.case2: 2963 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[SIVAR1]], align 4 2964 // CHECK10-NEXT: [[TMP21:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP20]] monotonic, align 4 2965 // CHECK10-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 2966 // CHECK10: .omp.reduction.default: 2967 // CHECK10-NEXT: ret void 2968 // 2969 // 2970 // CHECK10-LABEL: define {{[^@]+}}@.omp_outlined..1 2971 // CHECK10-SAME: (i32* noalias [[DOTGLOBAL_TID_:%.*]], i32* noalias [[DOTBOUND_TID_:%.*]], i64 [[DOTPREVIOUS_LB_:%.*]], i64 [[DOTPREVIOUS_UB_:%.*]], i32* nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR2]] { 2972 // CHECK10-NEXT: entry: 2973 // CHECK10-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca i32*, align 8 2974 // CHECK10-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca i32*, align 8 2975 // CHECK10-NEXT: [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8 2976 // CHECK10-NEXT: [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8 2977 // CHECK10-NEXT: [[SIVAR_ADDR:%.*]] = alloca i32*, align 8 2978 // CHECK10-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4 2979 // CHECK10-NEXT: [[TMP:%.*]] = alloca i32, align 4 2980 // CHECK10-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4 2981 // CHECK10-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 2982 // CHECK10-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 2983 // CHECK10-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 2984 // CHECK10-NEXT: [[SIVAR2:%.*]] = alloca i32, align 4 2985 // CHECK10-NEXT: [[I:%.*]] = alloca i32, align 4 2986 // CHECK10-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8 2987 // CHECK10-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 2988 // CHECK10-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 2989 // CHECK10-NEXT: store i32* [[DOTBOUND_TID_]], i32** [[DOTBOUND_TID__ADDR]], align 8 2990 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_LB_]], i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2991 // CHECK10-NEXT: store i64 [[DOTPREVIOUS_UB_]], i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2992 // CHECK10-NEXT: store i32* [[SIVAR]], i32** [[SIVAR_ADDR]], align 8 2993 // CHECK10-NEXT: [[TMP0:%.*]] = load i32*, i32** [[SIVAR_ADDR]], align 8 2994 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_LB]], align 4 2995 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_UB]], align 4 2996 // CHECK10-NEXT: [[TMP1:%.*]] = load i64, i64* [[DOTPREVIOUS_LB__ADDR]], align 8 2997 // CHECK10-NEXT: [[CONV:%.*]] = trunc i64 [[TMP1]] to i32 2998 // CHECK10-NEXT: [[TMP2:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 2999 // CHECK10-NEXT: [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32 3000 // CHECK10-NEXT: store i32 [[CONV]], i32* [[DOTOMP_LB]], align 4 3001 // CHECK10-NEXT: store i32 [[CONV1]], i32* [[DOTOMP_UB]], align 4 3002 // CHECK10-NEXT: store i32 1, i32* [[DOTOMP_STRIDE]], align 4 3003 // CHECK10-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 3004 // CHECK10-NEXT: store i32 0, i32* [[SIVAR2]], align 4 3005 // CHECK10-NEXT: [[TMP3:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 3006 // CHECK10-NEXT: [[TMP4:%.*]] = load i32, i32* [[TMP3]], align 4 3007 // CHECK10-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) 3008 // CHECK10-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3009 // CHECK10-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1 3010 // CHECK10-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] 3011 // CHECK10: cond.true: 3012 // CHECK10-NEXT: br label [[COND_END:%.*]] 3013 // CHECK10: cond.false: 3014 // CHECK10-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3015 // CHECK10-NEXT: br label [[COND_END]] 3016 // CHECK10: cond.end: 3017 // CHECK10-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ] 3018 // CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 3019 // CHECK10-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 3020 // CHECK10-NEXT: store i32 [[TMP7]], i32* [[DOTOMP_IV]], align 4 3021 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] 3022 // CHECK10: omp.inner.for.cond: 3023 // CHECK10-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3024 // CHECK10-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 3025 // CHECK10-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]] 3026 // CHECK10-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] 3027 // CHECK10: omp.inner.for.body: 3028 // CHECK10-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3029 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1 3030 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] 3031 // CHECK10-NEXT: store i32 [[ADD]], i32* [[I]], align 4 3032 // CHECK10-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 3033 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[SIVAR2]], align 4 3034 // CHECK10-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP12]], [[TMP11]] 3035 // CHECK10-NEXT: store i32 [[ADD4]], i32* [[SIVAR2]], align 4 3036 // CHECK10-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], %class.anon.0* [[REF_TMP]], i32 0, i32 0 3037 // CHECK10-NEXT: store i32* [[SIVAR2]], i32** [[TMP13]], align 8 3038 // CHECK10-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(%class.anon.0* nonnull align 8 dereferenceable(8) [[REF_TMP]]) 3039 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] 3040 // CHECK10: omp.body.continue: 3041 // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] 3042 // CHECK10: omp.inner.for.inc: 3043 // CHECK10-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 3044 // CHECK10-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP14]], 1 3045 // CHECK10-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_IV]], align 4 3046 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] 3047 // CHECK10: omp.inner.for.end: 3048 // CHECK10-NEXT: br label [[OMP_LOOP_EXIT:%.*]] 3049 // CHECK10: omp.loop.exit: 3050 // CHECK10-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) 3051 // CHECK10-NEXT: [[TMP15:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0 3052 // CHECK10-NEXT: [[TMP16:%.*]] = bitcast i32* [[SIVAR2]] to i8* 3053 // CHECK10-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8 3054 // CHECK10-NEXT: [[TMP17:%.*]] = bitcast [1 x i8*]* [[DOTOMP_REDUCTION_RED_LIST]] to i8* 3055 // CHECK10-NEXT: [[TMP18:%.*]] = call i32 @__kmpc_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], i32 1, i64 8, i8* [[TMP17]], void (i8*, i8*)* @.omp.reduction.reduction_func, [8 x i32]* @.gomp_critical_user_.reduction.var) 3056 // CHECK10-NEXT: switch i32 [[TMP18]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [ 3057 // CHECK10-NEXT: i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]] 3058 // CHECK10-NEXT: i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]] 3059 // CHECK10-NEXT: ] 3060 // CHECK10: .omp.reduction.case1: 3061 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP0]], align 4 3062 // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[SIVAR2]], align 4 3063 // CHECK10-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] 3064 // CHECK10-NEXT: store i32 [[ADD6]], i32* [[TMP0]], align 4 3065 // CHECK10-NEXT: call void @__kmpc_end_reduce_nowait(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var) 3066 // CHECK10-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3067 // CHECK10: .omp.reduction.case2: 3068 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[SIVAR2]], align 4 3069 // CHECK10-NEXT: [[TMP22:%.*]] = atomicrmw add i32* [[TMP0]], i32 [[TMP21]] monotonic, align 4 3070 // CHECK10-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] 3071 // CHECK10: .omp.reduction.default: 3072 // CHECK10-NEXT: ret void 3073 // 3074 // 3075 // CHECK10-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func 3076 // CHECK10-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] { 3077 // CHECK10-NEXT: entry: 3078 // CHECK10-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 3079 // CHECK10-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 3080 // CHECK10-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 3081 // CHECK10-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 3082 // CHECK10-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 3083 // CHECK10-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 3084 // CHECK10-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 3085 // CHECK10-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 3086 // CHECK10-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 3087 // CHECK10-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 3088 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 3089 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 3090 // CHECK10-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 3091 // CHECK10-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 3092 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 3093 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 3094 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 3095 // CHECK10-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 3096 // CHECK10-NEXT: ret void 3097 // 3098 // 3099 // CHECK10-LABEL: define {{[^@]+}}@.omp.reduction.reduction_func.2 3100 // CHECK10-SAME: (i8* [[TMP0:%.*]], i8* [[TMP1:%.*]]) #[[ATTR4]] { 3101 // CHECK10-NEXT: entry: 3102 // CHECK10-NEXT: [[DOTADDR:%.*]] = alloca i8*, align 8 3103 // CHECK10-NEXT: [[DOTADDR1:%.*]] = alloca i8*, align 8 3104 // CHECK10-NEXT: store i8* [[TMP0]], i8** [[DOTADDR]], align 8 3105 // CHECK10-NEXT: store i8* [[TMP1]], i8** [[DOTADDR1]], align 8 3106 // CHECK10-NEXT: [[TMP2:%.*]] = load i8*, i8** [[DOTADDR]], align 8 3107 // CHECK10-NEXT: [[TMP3:%.*]] = bitcast i8* [[TMP2]] to [1 x i8*]* 3108 // CHECK10-NEXT: [[TMP4:%.*]] = load i8*, i8** [[DOTADDR1]], align 8 3109 // CHECK10-NEXT: [[TMP5:%.*]] = bitcast i8* [[TMP4]] to [1 x i8*]* 3110 // CHECK10-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP5]], i64 0, i64 0 3111 // CHECK10-NEXT: [[TMP7:%.*]] = load i8*, i8** [[TMP6]], align 8 3112 // CHECK10-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP7]] to i32* 3113 // CHECK10-NEXT: [[TMP9:%.*]] = getelementptr inbounds [1 x i8*], [1 x i8*]* [[TMP3]], i64 0, i64 0 3114 // CHECK10-NEXT: [[TMP10:%.*]] = load i8*, i8** [[TMP9]], align 8 3115 // CHECK10-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to i32* 3116 // CHECK10-NEXT: [[TMP12:%.*]] = load i32, i32* [[TMP11]], align 4 3117 // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[TMP8]], align 4 3118 // CHECK10-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]] 3119 // CHECK10-NEXT: store i32 [[ADD]], i32* [[TMP11]], align 4 3120 // CHECK10-NEXT: ret void 3121 // 3122 // 3123 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg 3124 // CHECK10-SAME: () #[[ATTR6:[0-9]+]] { 3125 // CHECK10-NEXT: entry: 3126 // CHECK10-NEXT: call void @__tgt_register_requires(i64 1) 3127 // CHECK10-NEXT: ret void 3128 // 3129 // 3130 // CHECK11-LABEL: define {{[^@]+}}@main 3131 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] { 3132 // CHECK11-NEXT: entry: 3133 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3134 // CHECK11-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 3135 // CHECK11-NEXT: store i32 0, i32* [[RETVAL]], align 4 3136 // CHECK11-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]]) 3137 // CHECK11-NEXT: ret i32 0 3138 // 3139 // 3140 // CHECK12-LABEL: define {{[^@]+}}@main 3141 // CHECK12-SAME: () #[[ATTR0:[0-9]+]] { 3142 // CHECK12-NEXT: entry: 3143 // CHECK12-NEXT: [[RETVAL:%.*]] = alloca i32, align 4 3144 // CHECK12-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1 3145 // CHECK12-NEXT: store i32 0, i32* [[RETVAL]], align 4 3146 // CHECK12-NEXT: call void @"_ZZ4mainENK3$_0clEv"(%class.anon* nonnull align 1 dereferenceable(1) [[REF_TMP]]) 3147 // CHECK12-NEXT: ret i32 0 3148 // 3149